Patent ID: 7358550
Filing Date: 2008-04-15
Classification: H01L

Abstract:
1. An field effect transistor comprising: a first semiconductor region forming a channel region; a gate electrode insulatively disposed over the first semiconductor region; a source electrode and a drain electrode between which the first semiconductor region is sandwiched; and second semiconductor regions each having impurity concentration higher than that of the first semiconductor region, one of the second semiconductor regions being formed between the first semiconductor region and the source electrode and another of the second semiconductor regions being formed between the first semiconductor region and the drain electrode, and wherein the source electrode is offset to the gate electrode in a direction in which the source electrode and the drain electrode are separated from each other with respect to a channel direction, and the one of the second semiconductor regions has a thickness not more than a thickness with which the one of the second semiconductor regions is completely depleted in the channel direction with the source electrode being in thermal equilibrium with the one of the second semiconductor regions.