Patent ID: 7409490
Filing Date: 2008-08-05
Classification: G06F,G11C

Abstract:
1. A wear-leveling method for managing flash memory, said flash memory having a data region and a spare region, said spare region further storing a logical address and an enduring counter (EC) for a data block in said data region, said wear-leveling method using a translation table, and a wear-leveling algorithm comprising the following steps of: reconstructing said translation table when said flash memory is powered on; determining whether an operation is a read operation or an erase/program operation; proceeding to a read process if the operation is a read operation; otherwise, proceeding to an erase/program process if the operation is an erase/program operation; and waiting for a next operation and returning to said step of determining whether an operation is a read operation until no further operations; wherein variables n, p, q, m, x, BaseEC, MaxEC and Reverse are defined and used in said wear-leveling algorithm according to the following definition and rules: