Patent ID: 7589596
Filing Date: 2009-09-15
Classification: H03B,H03J

Abstract:
1. A voltage controlled oscillator, comprising: a differential negative conductance generator circuit having first and second terminals for differential output; a differential resonant circuit having a variable capacitance which is controlled by voltage control and an inductance connected in parallel to each other, the differential resonant circuit being connected between the first terminal and the second terminal; and a differential negative impedance circuit connected between the first terminal and the second terminal, wherein a capacitance of a capacitor with a constant capacitance that occurs between the first terminal and the second terminal is reduced by a negative impedance of the differential negative impedance circuit, wherein the differential negative conductance generator circuit includes: a first transistor whose output terminal is connected to the first terminal; and a second transistor whose output terminal is connected to the second terminal, wherein an input terminal of the first transistor is connected to the second terminal through a first capacitor, an input terminal of the second transistor is connected to the first terminal through a second capacitor, ground terminals of the first transistor and the second transistor are connected to each other, and a first current source is connected to a connection node of the ground terminals, wherein the differential negative impedance circuit includes: a third transistor whose output terminal is connected to the second terminal; a fourth transistor whose output terminal is connected to the first terminal; a third capacitor which is connected between a ground terminal of the third transistor and a ground terminal of the fourth transistor, and wherein an input terminal of the third transistor is connected to an input terminal of the second transistor, an input terminal of the fourth transistor is connected to an input terminal of the first transistor, a second current source is connected to the ground terminal of the third transistor, and a third current source is connected to the ground terminal of the fourth transistor, wherein the first current source includes a fifth transistor whose output terminal is connected to the connection node, wherein an input terminal of the fifth transistor is connected to a first voltage source, and a ground terminal of the fifth transistor is coupled to a second voltage source, wherein the second current source includes a sixth transistor whose output terminal is connected to the ground terminal of the third transistor, wherein an input terminal of the sixth transistor is connected to a third voltage source, and a ground terminal of the sixth transistor is coupled to a fourth voltage source, wherein the third current source includes a seventh transistor whose output terminal is connected to the ground terminal of the fourth transistor, and wherein an input terminal of the seventh transistor is connected to the third voltage source, and a ground terminal of the seventh transistor is coupled with the fourth voltage source.