Patent ID: 8709931
Filing Date: 2014-04-29
Classification: H01L

Abstract:
1. A method for forming a fuse part in a semiconductor device, the fuse part having a plurality of fuse lines extended along a first direction with a given width along a second direction, the method comprising: forming a first conductive pattern having a space part in a fuse line region over a substrate, wherein portions of the first conductive pattern are spaced apart by the space part along the first direction; forming an inter-layer insulation layer over first conductive pattern; etching the inter-layer insulation layer using a mask pattern to expose the space part, the mask pattern having openings with a width smaller than a width of the space part along the second direction; burying an insulation layer in the etched region of the inter-layer insulation layer to form a first insulation pattern; forming a second conductive pattern over the first insulation pattern and the inter-layer insulation layer, the second conductive pattern covering the space part; and removing remaining portions of the inter-layer insulation layer.