Patent ID: 7148529
Filing Date: 2006-12-12
Classification: H01L

Abstract:
1. A semiconductor chip package comprising: a light-transmissive interposer having a no-wiring area and a predetermined area on a surface of the interposer; a wiring layer positioned over the interposer and substantially covering the predetermined area so as to prevent the transmission of natural light having predetermined wavelengths from passing through the predetermined area of the interposer, the wiring layer having a plurality of conductors having predetermined linewidths regularly spaced at an interval in a range of about 0.010 to 0.100 mm capable of preventing natural light from passing through the interval, each of the linewidths being wider than the interval; a semiconductor chip partially positioned over the no-wiring area and partially positioned over the predetermined area, and electrically connected to the wiring layer; a light blocking layer formed between the interposer and the semiconductor chip substantially covering all of the no-wiring area so as to block light passing through the no-wiring area of the interposer; and a resin mold covering a top side of the semiconductor chip and said chip package, wherein the interposer is a bottom layer of the semiconductor chip package.