Patent ID: 8527857
Filing Date: 2013-09-03
Classification: H03M,H04L

Abstract:
1. A receiving system adapted to receive through a channel at least N modulated data that are encoded through parity-check (PC) coding, the receiving system comprising: a channel estimator to estimate a channel quality ratio of a channel receiving quality based on the modulated data; and a PC code decoder, coupled to said channel estimator, to obtain at least N bit nodes based on the modulated data, said PC code decoder including a verifying circuit, a reliability-generating circuit, a bit-exchange circuit, a check-exchange circuit, and a reliability-updating circuit, wherein, the verifying circuit is configured to multiply the at least N bit nodes by a PC code matrix so as to obtain N-K check nodes, each of the check nodes exchanging messages with at least two of the at least N bit nodes based on the PC code matrix, wherein, the reliability-generating circuit is configured to generate a reliability index for each of the bit nodes, the reliability index serving as an extrinsic check index, wherein, the bit-exchange circuit is configured to generate at least two extrinsic bit indices for each of the check nodes based on the channel quality ratio, an extrinsic bit offset value, and the extrinsic check indices.