Patent ID: 6197665
Filing Date: 2001-03-06
Classification: H01L

Abstract:
A method of laminating a coverlay to a microelectronic package, said method comprising:A. providing a lamination machine havingi. a top plate,ii. a bottom plate having a bottom recess,iii. means for bringing the top plate and bottom plate towards one and another and thereby forming a bottom chamber,iv. means for regulating pressure in the bottom chamber, andv. means for activating a coverlay adhesive;B. disposing a microelectronic packaging on the bottom plate, wherein1) the microelectronic package comprises a dielectric layer having a top surface and a bottom surface; andat least one semiconductor element connected to the bottom surface of the dielectric layer;2) the at least one semiconductor element has a face surface facing the bottom surface of the dielectric layer and a back surface opposite the face surface; and3) the at least one semiconductor element is disposed within the bottom recess;C. disposing a coverlay beneath the top plate and over the top surface of the dielectric layer; wherein the coverlay includes an adhesive disposed on a surface facing the top surface of the dielectric layer;D. bringing the top and bottom plates toward one another to form a bottom chamber;E. activating the adhesive on the surface of the coverlay; andF. increasing the pressure in the bottom chamber.