Patent ID: 6363447
Filing Date: 2002-03-26
Classification: G06F

Abstract:
An apparatus that selectively encodes bus grant lines to reduce I/O pin requirements, comprising:a semiconductor chip; a bus arbitration circuit on the semiconductor chip; a plurality of grant lines emanating from the bus arbitration circuit for granting control of a bus to devices on the bus, the plurality of grant lines being divided into a first subset of grant lines and a second subset of grant lines; an encoder circuit that encodes the plurality of grant lines into a plurality of encoded grant lines, the number of encoded grant lines being smaller than the number of grant lines; a selector circuit that selects a plurality of outputs from between the plurality of encoded grant lines and the first subset of grant lines; and a plurality of output pins through which the plurality of outputs is driven off of the semiconductor chip; wherein during a first mode of operation the first subset of grant lines is driven through the plurality of output pins, and during a second mode of operation the plurality of encoded grant lines is driven through the plurality of output pins.