Patent ID: 7893502
Filing Date: 2011-02-22
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a p-type field effect transistor including a first gate stack and located on a semiconductor substrate, said first gate stack including, from bottom to top, a first high dielectric constant (high-k) gate dielectric having a dielectric constant greater than 4.0, a first adjustment oxide portion, and a first conductive gate material portion, wherein said first high-k gate dielectric abuts a fluorine-doped semiconductor layer; an n-type field effect transistor including a second gate stack and located on said semiconductor substrate, said second gate stack including, from bottom to top, a second high-k gate dielectric having a dielectric constant greater than 4.0, a second adjustment oxide portion, and a second conductive gate material portion, wherein said second high-k gate dielectric abuts a substantially fluorine-free semiconductor layer; and another fluorine-doped semiconductor layer located directly beneath said fluorine-doped semiconductor layer and including a different semiconductor material, wherein said another fluorine-doped semiconductor layer and said substantially fluorine-free semiconductor layer have substantially coplanar top surfaces.