Patent ID: 8653559
Filing Date: 2014-02-18
Classification: H01L

Abstract:
1. A field effect transistor (FET) comprising: a source electrode; a drain electrode; a channel layer; a barrier layer over the channel layer and coupled to the source and drain electrodes; a gate electrode extending through the barrier layer; a passivation layer over the barrier layer for passivating the barrier layer between the gate electrode and the source electrode and between the gate electrode and the drain electrode, wherein the gate electrode extends through the passivation layer; and a gate dielectric surrounding the portion of the gate electrode that extends through the barrier layer and the passivation layer; wherein the gate dielectric is annealed to improve an interface between the gate dielectric and the channel layer for reducing electron trap density and increasing channel mobility; wherein the passivation layer is a first material and the gate dielectric is a second material; and wherein the first material is different than the second material.