Patent ID: 6911985
Filing Date: 2005-06-28
Classification: G06T,G09G

Abstract:
1. A method for reducing a frame buffer size in a graphics system, comprising steps of: (a) generating a first rendering command list and a second rendering command list for a next frame, said first rendering command list for a first section of a screen and said second rendering command list for a second section of said screen; (b) sorting polygons of said next frame based upon locations of said polygons on said screen; (c) providing a third rendering command list for said second section of said screen for a current frame; (d) when a VSYNC signal is asserted, reading pixel data from a display region of a frame buffer to display said first section of said screen for said current frame, fetching rendering commands from said third rendering command list, and drawing pixels for said second section of said screen in said frame buffer to complete a full picture of said current frame; (e) when said displaying said first section of said screen for said current frame is completed, signaling a GPU to swap said display region and a drawing region of said frame buffer; and (f) discarding said third rendering command list, processing rendering commands in said first rendering command list to draw pixels for said first section of said screen for said next frame into said frame buffer, and reading pixel data for said second section of said screen for said current frame.