Patent ID: 7816247
Filing Date: 2010-10-19
Classification: H01L,H05K

Abstract:
1. A method for designing a land pattern for mating an integrated circuit device to a printed circuit board, the method comprising the steps of: (1) determining a number of required pads; (2) determining a number of required perimeter routing channels; and (3) selecting a land pattern to yield the required number of pads and number of required perimeter routing channels, including the steps of: wherein the under populating at least one perimeter edge comprises forming in a perimeter edge of the selected potential land pattern a pattern including a first conductive pad, a space, and a second conductive pad, wherein the pattern is repeated immediately in series in an outermost row; wherein step (d) comprises calculating a number of perimeter routing channels yielded by the selected potential land pattern, wherein said calculating step comprises the steps of: