Patent ID: 7250344
Filing Date: 2007-07-31
Classification: H01L

Abstract:
1. A method of forming an isolation region in a semiconductor substrate, comprising: forming an insulator filled shallow trench shape with a smooth top surface topography in a first portion of said semiconductor substrate; forming a deep trench shape in said insulator filled shallow trench shape and in an underlying second portion of said semiconductor substrate; forming an insulator layer on exposed semiconductor surfaces of said deep trench shape; forming a conductive shape in bottom portion of said deep trench shape; and forming an insulator plug with a smooth top surface topography in a top portion of said deep trench shape overlying conductive shape, resulting in said isolation region comprised with said deep trench shape, featuring said insulator plug on underlying said conductive shape, with a top portion of said deep trench shape surrounded by said insulator filled shallow trench shape.