Patent ID: 6306698
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A method, comprising:depositing a first layer comprised of silicon;depositing a second layer comprised of titanium above said first layer;converting at least a portion of said second layer to a first metal silicide layer comprised of titanium silicide;patterning said first metal silicide layer and said first layer to define a portion of a gate stack comprised of a first metal silicide region and a layer comprised of silicon,said first metal silicide region having a thickness;forming a plurality of source/drain regions in said substrate;depositing a third layer comprised of cobalt above at least the gate stack and said source/drain regions; andconverting at least a portion of the third layer to a second metal silicide region comprised of cobalt silicide above each of said source/drain regions, said second metal silicide region having a thickness, the thickness of said first metal silicide region being approximately 2-10 times as thick as the thickness of said second metal slicide region.