Patent ID: 6580306
Filing Date: 2003-06-17
Classification: H03K

Abstract:
An integrated circuit device including a switching circuit comprising:first and second series coupled MOS transistors having a gate oxide of a first thickness, each of said first and second MOS transistors having a gate terminal thereof; third and fourth MOS series coupled transistors having a gate oxide of a second thickness lesser than said first thickness, each of said third and fourth MOS transistors having a gate terminal thereof, said first, second, third and fourth MOS transistors being coupled in series between a high voltage source and a reference voltage source with an output node defined intermediate said first and second MOS transistors; a first signal input coupled to said gate terminal of said first transistor for receiving a first input signal capable of transitioning between a level of said high voltage source and a level of said reference voltage source, said gate terminal of said second transistor being coupled to said high voltage source; a supply voltage source coupled to said gate terminal of said third transistor; and a second signal input coupled to said gate terminal of said fourth transistor for receiving a second input signal capable of transitioning between a level of said supply voltage source and a level of said reference voltage source.