Patent ID: 6624660
Filing Date: 2003-09-23
Classification: H03K

Abstract:
An output driver circuit coupled to an output pad of a semiconductor device, comprising:a pull-up transistor having a first terminal coupled to a supply potential and a second terminal coupled to said output pad, said pull-up transistor having a gate terminal responsive to application of a pull-up signal asserted thereon to couple said output pad to said supply potential; a pull-down transistor having a first terminal coupled to said output pad and a second terminal coupled to a ground potential, said pull-down transistor having a gate terminal responsive to application of a pull-down signal asserted thereon to couple said output pad to said ground potential; said output driver circuit being implemented as a CMOS circuit with a first doped region being in contact with said supply potential and a second doped region selectively coupled to said first doped region such that when said first doped region and said second doped region are connected, an overdrive condition on said output pad causes parasitic current to flow between said first and second doped regions; said output driver circuit further comprising: an overdrive detection circuit comprising a p-channel transistor having a substrate and source terminal each coupled to said output pad, having a drain terminal coupled to ground potential via a resistive coupling, and having a gate terminal having a bias voltage applied thereto, said bias voltage being greater than said ground potential and less than said supply voltage, said overdrive detection circuit responsive to an overdrive condition on said pad to deassert a control signal; and a decoupling transistor coupled to said first doped region, said second doped region, and said overdrive detection circuit, said decoupling transistor being responsive to deassertion of said control signal to decouple said first doped region from said second doped region.