Patent ID: 9112027
Filing Date: 2015-08-18
Classification: H01L,Y10S

Abstract:
1. A semiconductor device comprising: a silicon substrate; a gate insulating film over the silicon substrate; a gate electrode formed over the gate insulating film; a source region and a drain region formed in the silicon substrate; a first SiGe mixed crystal region formed in the source region, a bottom of the first SiGe mixed crystal region being located shallower than a bottom of the source region; a second SiGe mixed crystal region formed in the drain region, a bottom of the second SiGe mixed crystal region being located shallower than a bottom of the drain region; a first silicide layer over the first SiGe mixed crystal region; and a second silicide layer over the second SiGe mixed crystal region, wherein a bottom of the first silicide layer and a bottom of the second silicide layer are located higher than a first boundary between the silicon substrate and the gate insulating film, and wherein each of the first and second SiGe mixed crystal regions is defined by a plurality of facets that are (111) planes of the silicon substrate which form respective, mutually different angles with respect to a surface of the substrate under the gate insulating film.