Patent ID: 9188961
Filing Date: 2015-11-17
Classification: G04F,H03M

Abstract:
1. A time-to-digital converter, comprising: a resistor-stabilized delay line comprising a serial configuration of delay elements and a resistor chain connected to the delay elements, each resistor of the resistor chain being connected across two common mode nodes of adjacent delay elements in the delay line, the resistor-stabilized delay line being configured to receive an event signal having an edge transition and to generate at the delay elements a plurality of delayed event signals with increasing delay; a sampling circuit configured to receive the event signal and the plurality of delayed event signals as input signals, the sampling circuit being configured to sample the input signals in response to an edge transition on a reference signal and to generate an output signal being a thermometer code having a transition between a first logical state to a second logical state indicative of a time interval between the edge transition of the event signal and the edge transition of the reference signal; and a processing circuit configured to receive the output signal of the sampling circuit and to generate a processed output signal indicative of the time interval.