Patent ID: 6734681
Filing Date: 2004-05-11
Classification: G01R

Abstract:
A device for testing an unpopulated printed circuit board under test (BUT) having electrically conductive paths and surfaces whose electrical and physical continuity and conformance to a known standard is to be verified, the device comprising:a signal plate adjacent to the BUT; a signal generator for providing an alternating test signal to the signal plate; wherein the signal plate radiates an electric field onto the BUT according to the test signal, and wherein the electric field induces currents and charges on the BUT's electrically conductive paths and surfaces; a pin array assembly (PAA) adjacent to the BUT for detecting the signals induced on the BUT's electrically conductive paths and surfaces, wherein each relative movement between the BUT and the PAA produces signal measurements of BUT test points; a selector to provide isolation between the pins of the array assembly; a moving mechanism for moving the PAA relative to the BUT; a digital signal processor for converting the detected signals to digital data; a computer for controlling the relative pin array assembly movements, sequencing the selector, storing digital data from the digital signal processor, and analyzing the digital data.