Patent ID: 6453385
Filing Date: 2002-09-17
Classification: G06F

Abstract:
A cache system for operating between a processor and a main memory of a computer, the cache system comprising:a cache memory having a set of cache partitions, each cache partition comprising a plurality of addressable storage locations for holding items fetched from the main memory for use by the processor, a cache partition table holding in association with addresses of items to be cached respective multi-bit partition indicators identifying each cache partition of the set of cache partitions in which the item can be loaded; a cache refill mechanism arranged to fetch an item from the main memory and to load the item into the cache memory at one of said addressable storage locations, wherein the cache refill mechanism is operable to receive the partition indicators and to allocate to each item fetched from the main memory one or more of the cache partitions in dependence on the address of the item in the main memory; and a cache access circuit which accesses items from the cache memory according to the addresses in main memory of the items and regardless of the cache partition in which the item is held in the cache memory.