Patent ID: 6107835
Filing Date: 2000-08-22
Classification: G06F,G11C,H03K

Abstract:
A logic circuit with substantially constant power consumption, comprising:a 1 of P first input signal that comprises a plurality of wires wherein each wire of said plurality of wires has substantially the same capacitive loading;a 1 of Q second input signal that comprises a plurality of wires wherein each wire of said plurality of wires has substantially the same capacitive loading;a logic tree circuit that couples to said first input signal and said second input signal; anda 1 of R output signal that couples to said logic tree circuit and that further comprises a plurality of wires wherein each wire of said plurality of wires has substantially the same capacitive loading;wherein the power consumption of the logic circuit is independent of the value of said first signal or said second signal that results in the logic circuit having substantially constant power consumption.