Patent ID: 6163208
Filing Date: 2000-12-19
Classification: H04L

Abstract:
A digital phase shift keyed carrier recovery and demodulator circuit, comprising:an input for receiving an incoming phase modulated carrier;a local oscillator for generating a reference frequency as a function of a control signal, the local oscillator providing as outputs a plurality of phases of the reference frequency;a phase detector and feedback loop, operatively coupled to the input and the local oscillator, for comparing a phase of the incoming phase modulated carrier with the plurality of phases of the reference frequency, for producing the control signal based on the phase comparison initially to phase lock edges of any two consecutive phases of the plurality of phases to phase positions on respective sides of a corresponding edge of the incoming phase modulated carrier, and wherein the control signal as produced by the phase detector and feedback loop is thereafter generally insensitive to phase changes in the incoming phase modulated carrier due to data phase modulation; anda demodulation circuit for producing at least one output signal representing phase modulated bit data based on the outputs of the local oscillator and the incoming phase modulated carrier.