Patent ID: 7172972
Filing Date: 2007-02-06
Classification: H01L

Abstract:
1. A semiconductor device manufacture method comprising steps of: (a) preparing a semiconductor substrate having a work target layer; (b) forming a resist layer above said work target layer; (c) exposing and developing said resist layer to form resist patterns including an isolated pattern and a dense pattern; (d) monitoring widths of isolated pattern and dense pattern of said resist patterns to determine trimming amounts of widths to be reduced; (e) determining etching conditions realizing said trimming amounts of both the isolated and dense patterns, the etching conditions using mixed gas comprising a first gas having a function of mainly enhancing etching and a second gas having a function of mainly suppressing etching; (f) trimming said resist patterns under said determined etching conditions; and (g) etching said work target layer by using said trimmed resist patterns wherein the etching conditions in said step (e) use at least one of etching time period and mixing ratio of the mixed gas as a variable.