Patent ID: 8594991
Filing Date: 2013-11-26
Classification: G06F

Abstract:
1. A method for mapping a source memory system having a source memory depth that comprises a predetermined number of source memory registers and a source data width that includes a preselected quantity of source data bits that can be stored in each of the source memory registers, comprising: providing a destination memory system having a destination memory depth that comprises a predetermined number of destination memory registers and a destination data width including a preselected power-of-two quantity of destination data bits; factorizing the source data width of the source memory system to form a plurality of source memory sub-regions having respective sub-region memory depths that are equal to the source memory depth and respective sub-region data widths that include respective portions of the source data bits, the source data width being spanned by said sub-region data widths, said respective sub-region data widths being equal to said destination data width divided by respective predetermined integer values; selecting a selected source memory sub-region with a selected sub-region memory depth and a selected sub-region data width that is equal to said destination data width divided by a selected integer value; identifying sub-region register contents within the source memory registers, said sub-region register contents comprising memory contents within the source memory registers that are associated with said selected source memory sub-region; dividing said selected sub-region memory depth into a plurality of sub-region memory depth groups each including said selected integer value of the source memory registers; and storing said sub-region register contents associated with each respective sub-region memory depth group in a side-by-side manner across a selected destination memory register of said destination memory system.