Patent ID: 8081705
Filing Date: 2011-12-20
Classification: G09G,H03M,H04L,H04N

Abstract:
1. A digital visual interface system configured to transmit data, control, and BIT signals, said system comprising: (a) a clock channel ( (b) a first data channel ( (c) a second data channel ( (d) a third data channel ( (e) wherein each block of multi-level symbols within said first, second, and third data channels is aligned with reference to the clock channel; (f) wherein each block of multi-level symbols comprises a sequence of at least three multi-level symbols; (g) wherein each multi-level symbol has an analog voltage level selected from a predetermined number of possible values, said predetermined number being an integer greater than two; and (h) wherein said fixed multiple of the clock rate being an integer greater than one.