Patent ID: 6304107
Filing Date: 2001-10-16
Classification: H03K

Abstract:
A detection circuit for receiving a pair of unstable input signals along a pair of input leads and providing a stable output signal along an output lead, said detection circuit comprising: a first transistor and a second transistor, wherein at least one of said first and second transistors is configured to turn on upon said detection circuit receiving input signals along the pair of input leads, and wherein at least one of said first and second transistors is configured to provide a signal along a lead to circuitry which is configured to condition said output signal and turn on a third transistor, said third transistor being connected to said first and said second transistors such that when said third transistor turns on, said third transistor prevents said first and second transistors from turning on, thereby generally preventing any new input signals received along the input leads from propagating substantially through the detection circuit, further comprising a fourth transistor and a fifth transistor, said fourth and fifth transistors connected to said first and second transistors, wherein said first and second transistors are configured to be off and said fourth and fifth transistors are configured to be on when generally equal input signals are received along the input leads, wherein said detection circuit comprises means for holding a previous clock cycle value output at the output lead when generally equal input signals arc received along the input leads.