Patent ID: 9210808
Filing Date: 2015-12-08
Classification: C25D,H01L,H05K,Y10T

Abstract:
1. A wiring substrate, comprising: an insulating layer; a connection pad buried in the insulating layer in a state that an upper surface of the connection pad is exposed from an upper surface of the insulating layer and a lower surface and at least a part of a side surface of the connection pad contact the insulating layer; and a concave level difference portion formed in the insulating layer around an outer periphery part of the connection pad, wherein the upper surface of the connection pad and the upper surface of the insulating layer are arranged at a same height, wherein the connection pad has two layers structure in which an upper layer part is formed on a lower layer part, and an outer peripheral edge of the lower layer part retrogresses toward a center of the connection pad from an outer peripheral edge of the upper layer part, and wherein the upper layer part of the connection pad and the concave level difference portion have the same height, and a solder is formed on the connection pad and in a whole of the concave level difference portion.