Patent ID: 6356111
Filing Date: 2002-03-12
Classification: H03K,H04Q

Abstract:
A switch cell for a crosspoint switch array, wherein the crosspoint switch array routes input signals between a plurality of input lines and a plurality of output lines, wherein the switch cell responds to input control signals by selectively providing a signal path between one input line and one output line of the crosspoint switch array, and wherein the switch cell comprises:a first memory cell for storing a data bit, a second memory cell for storing a control bit, first means for setting the data bit stored in the first memory cell to a state indicated by the input control signals and for setting the control bit stored in the second memory cell to a state determined by the state of the data bit stored in the first memory cell in response to the input control signals, and second means for selectively making and breaking the signal path between the input line and the output line in accordance with the state of the control bit stored in the second memory cell.