Patent ID: 8853001
Filing Date: 2014-10-07
Classification: H01L

Abstract:
1. A method of making a semiconductor device, comprising: providing a semiconductor die including a die pad layout comprising signal pads located in no more than two peripheral rows in a perimeter region of the semiconductor die, and power pads and ground pads located primarily in an inboard region of the semiconductor die from the signal pads; forming a plurality of bumps over the signal pads, power pads, and ground pads of the semiconductor die; providing a substrate; forming a plurality of conductive traces including interconnect sites disposed over the substrate, the bumps over the signal pads, power pads, and ground pads of the semiconductor die being wider than the interconnect sites of the conductive traces; mounting the semiconductor die to the substrate with the bumps over the signal pads, power pads, and ground pads of the semiconductor die being bonded to the interconnect sites over the substrate so that the bumps cover a top surface and side surfaces of the interconnect sites; and depositing an encapsulant around the bumps between the semiconductor die and substrate.