Patent ID: 6809675
Filing Date: 2004-10-26
Classification: H03M

Abstract:
An analog-to-digital converter system, comprising:a first charging circuit; a first discharge circuit; a first termination circuit; a first sense line; and a programmable logic device including a first state machine; wherein said first state machine is structured to direct said first discharge circuit to remove a first residual electric charge from said first sense line, said first charging circuit is structured to subsequently place a first additional electric charge on said first sense line, said first state machine is structured to subsequently wait for a first pre-determined period of time, said first state machine is structured to subsequently sample a first voltage on said first sense line, said first state machine is structured to subsequently wait for a second pre-determined period of time, said first state machine is structured to subsequently sample a second voltage on said first sense line, and said sampled first voltage and said sampled second voltage are subsequently evaluated by said first state machine to determine a first capacitive value of said first termination circuit.