Patent ID: 7602209
Filing Date: 2009-10-13
Classification: G06F,G11C,H03K

Abstract:
1. A memory controller comprising: an output driver to output a first data signal onto a data line; and termination control circuitry to output termination control signals to a plurality of integrated circuit memory devices, the termination control signals to control coupling and decoupling of termination elements to the data line according to which of the plurality of integrated circuit memory devices is selected to receive the first data signal, wherein the termination control signals specify coupling a termination element having an impedance indicated by a first termination value to the data line within one of the plurality of integrated circuit memory devices selected to receive the first data signal, and wherein the termination control signals further specify coupling a termination element having an impedance indicated by a second termination value to the data line within at least one other of the plurality of integrated circuit memory devices.