Patent ID: 6696881
Filing Date: 2004-02-24
Classification: G05F

Abstract:
A compensation circuit coupled to a first capacitor, said compensation circuit comprising:a first supply voltage, said first supply voltage being coupled to said first capacitor; a second supply voltage; a first node, said first node being coupled to said first capacitor; a compensation capacitor; a first compensation transistor, said first compensation transistor having a first compensation transistor first flow electrode, a first compensation transistor second flow electrode and a first compensation transistor control electrode, said first compensation transistor first flow electrode being coupled to said compensation capacitor, said first compensation transistor second flow electrode being coupled to said second supply voltage; a second compensation transistor, said second compensation transistor having a second compensation transistor first flow electrode, a second compensation transistor second flow electrode and a second compensation transistor control electrode, said second compensation transistor first flow electrode being coupled to said first capacitor, said second compensation transistor second flow electrode being coupled to said second supply voltage, said second compensation transistor control electrode being coupled to said first compensation transistor control electrode; and a biasing circuit, said biasing circuit having a first input coupled to said first supply voltage, said biasing circuit having a second input coupled to said second supply voltage, said biasing circuit having a third input coupled to said first node and said second compensation transistor first flow electrode, said biasing circuit having an output coupled to said compensation capacitor, wherein said biasing circuit is configured such that a bias voltage across said compensation capacitor is equal to a bias voltage across said first capacitor, further wherein a ratio of the area of said compensation capacitor divided by the area of said first capacitor is equal to a ratio of the size of said first compensation transistor divided by the size of said second compensation transistor such that a gate current through said first capacitor is equal a current through said second compensation transistor; and further wherein said compensation capacitor is coupled in series with the first compensation transistor.