Patent ID: 7618856
Filing Date: 2009-11-17
Classification: H01L

Abstract:
1. A method for fabricating a strained-silicon CMOS transistor, comprising: providing a semiconductor substrate having a first active region for fabricating a first transistor, a second active region for fabricating a second transistor, and an isolation structure disposed between the first active region and the second active region; forming a first gate structure on the first active region and a second gate structure on the second active region; forming a first spacer around the first gate structure and the second gate structure; forming a source/drain region for the first transistor and a source/drain region for the second transistor; removing the first spacer from the first gate structure and the second gate structure; depositing a cap layer on the first transistor and the second transistor; removing the cap layer disposed on the second transistor; performing an etching process for forming a recess on the second gate structure and in the semiconductor substrate surrounding the second gate structure; performing a selective epitaxial growth process for forming an epitaxial layer in the recess; and removing the cap layer from the surface of the first transistor.