Patent ID: 8878251
Filing Date: 2014-11-04
Classification: H01L

Abstract:
1. A compound junctionless field effect transistor comprising: a bulk silicon substrate not having a buried oxide layer; a blocking semiconductor layer formed of a first semiconductor material having a lattice constant difference with silicon 5% or less and doped to have a first conductive type on the silicon substrate; an active layer formed of a second semiconductor material having a lattice constant difference with the first semiconductor material 2% or less, an electron affinity difference with the first semiconductor material 0.1 eV or less, and an energy bandgap 0.5 eV greater than that of the first semiconductor material and doped to have a second conductive type opposite to the first conductive type on the blocking semiconductor layer; a gate electrode formed to be separated by a gate dielectric layer on the active layer; and source and drain electrodes formed to contact electrically to the active layer with having a specific interval from each other and being separated by the gate electrode, wherein a first heterojunction is formed between the bulk silicon substrate and the blocking semiconductor layer and a second heterojunction is formed between the blocking semiconductor layer and the active layer.