Patent ID: 7135423
Filing Date: 2006-11-14
Classification: H01L

Abstract:
1. A method for forming an ultra-shallow junction in a semiconductor wafer, comprising: introducing into a shallow surface layer of a semiconductor wafer a dopant material that is selected to form charge carrier complexes which produce at least two charge carriers per complex; and short-time thermal processing of the doped surface layer using predetermined parameters to cause chemical bonding by rapid heating the substrate of the semiconductor wafer to an intermediate temperature by a first heat source in proximity to a side of the semiconductor wafer opposite from the shallow surface layer and flash heating the doped surface layer to a final temperature that is higher than the intermediate temperature by a second heat source that is positioned in proximity to the semiconductor wafer on the same side as the shallow surface layer to form said charge carrier complexes including bound exciton complexes while preventing dissociation of said charge carrier complexes.