Patent ID: 7288981
Filing Date: 2007-10-30
Classification: H03K

Abstract:
1. A voltage translator circuit, comprising: (a) an input node, an output node, and a ground node, wherein the ground node is electrically coupled to ground; (b) a voltage divider circuit including a first resistor and a second resistor electrically coupled in series between the input node and the ground node; (c) a start voltage circuit electrically coupled to a first voltage and to the input node; (d) a transfer circuit electrically coupled to the output node; and (e) a capacitive circuit having a first capacitive node and a second capacitive node, wherein the first capacitive node is electrically coupled to the voltage divider circuit, wherein the second capacitive node is electrically coupled to the first voltage via the start voltage circuit, wherein the second capacitive node is electrically coupled to the output node via the transfer circuit, and wherein in response to the input node changing in voltage level towards the first voltage, the start voltage circuit is capable of electrically disconnecting the second capacitive node from the first voltage.