Patent ID: 6438082
Filing Date: 2002-08-20
Classification: G11B

Abstract:
A reference mark detection circuit for detecting a reference mark from a recording medium in which the plane configuration of at least one sidewall of a groove for tracking is formed so that said reference mark having, on a relatively gentle first waveform modulated by a predetermined information signal, a relatively abrupt second waveform is overlapped at a constant interval, said first waveform and said second waveform having the same amplitude, said reference mark detection circuit comprising:a first generating circuit (32) disposed to generate an electrical signal having a waveform corresponding to said plane configuration of the sidewall, a comparing circuit (35) disposed to compare a level of said generated electrical signal with a predetermined reference level to generate a first logic signal of a first pulse having a first duration indicating the comparison result between said first waveform and said reference level and a second pulse having a second duration indicating the comparison result between said second waveform and said reference level, a second generating circuit (36) disposed to generate a second logic signal of a third pulse having a fixed third duration in synchronization with a leading edge of each pulse of said first logic signal, and a latching circuit (37) for latching a logic level of said second logic signal in synchronization with a trailing edge of each pulse of said first logic signal to provide the result of said reference mark, wherein said third duration is longer than said second duration and shorter than said first duration.