Patent ID: 6931467
Filing Date: 2005-08-16
Classification: G06F,G11C

Abstract:
1. A method of operation of a semiconductor memory device, wherein the memory device includes a plurality of banks, wherein each bank of the plurality of banks includes a memory cell array, wherein the method comprises: receiving an external clock signal; receiving a first code, wherein the first code specifies that a write operation is to be initiated in the memory device; detecting an external strobe signal, wherein the external strobe signal indicates when the memory device begins sampling data; sampling the data upon detection of the external strobe signal, wherein first and a second portions of the data are sampled, in succession, during a clock cycle of the external clock signal; receiving bank selection information, wherein the bank selection information identifies a bank of the plurality of banks; and writing the data to a subset of the memory cell array included in the bank identified by the bank selection information, wherein the data is written during the write operation.