Patent ID: 6235569
Filing Date: 2001-05-22
Classification: H01L,Y10S

Abstract:
A method of fabricating a voltage sense amplifier, the method comprising:forming a pair of cross coupled inverters, wherein forming each inverter comprises forming a complementary pair of gate-body transistors, the complementary pair comprising a first channel type transistor and a second channel type transistor, and wherein forming each gate-body transistor comprises:forming a body region formed of single crystalline semiconductor material and extending outwardly from a substrate, the body region having an upper surface and opposing sidewalls;forming a source region within a portion of the upper surface of the body region;forming a drain region within a portion of the upper surface of the body region;forming a gate above the upper surface of the body region; andforming conductive sidewall members disposed adjacent to the opposing sidewalls of the body region;coupling a pair of bit lines, such that each bit line couples to the gates of one of the complementary pair of transistors and to the drain regions of the other complementary pair of transistors.