Patent ID: 6157229
Filing Date: 2000-12-05
Classification: H03L,H04L

Abstract:
A skew compensation device for compensating for a skew between an input data signal and a clock signal, comprising:(a) a transition detector for detecting a transition of said input data signal and for providing a pulse signal representative of said transition detection,(b) a variable delay line for generating a first delayed data signal which lags said input data signal by a variable delay amount,(c) a fixed delay line for generating a second further delayed data signal which lags said first delayed data signal by a fixed delay amount,(d) a phase comparator for:comparing a transition of said second delayed data signal with a phase of said clock signal,on the condition that said phase comparator receives said pulse signal from said transition detector, said phase comparator sending to said variable delay line:a first control signal for increasing said variable delay amount when said transition of said second delayed data signal leads a clocking edge of said clock signal, anda second control signal for decreasing said variable delay amount when said transition of said second delayed data signal lags said clocking edge of said clock signal, and(e) means for outputting said first delayed data signal and said clock signal to data and clock input terminals of a data receiving component, respectively.