Patent ID: 6627529
Filing Date: 2003-09-30
Classification: H01L

Abstract:
A method used to manufacture a semiconductor device comprising:providing at least first, second, and third spaced conductive structures, wherein said second conductive structure is interposed between said first and third conductive structures; forming a first dielectric layer overlying said first, second, and third conductive structures; removing only a portion of said first dielectric layer to form an access hole to said second conductive structure in said first dielectric layer and to expose said second conductive structure at said access hole; subsequent to exposing said second conductive structure, removing at least a portion of said second conductive structure to leave a void in said first dielectric layer; and forming a second dielectric layer over said void and within said access hole in said first dielectric layer and to leave said void in said first dielectric layer subsequent to forming said second dielectric layer.