Patent ID: 7616063
Filing Date: 2009-11-10
Classification: H03D,H03L

Abstract:
1. A frequency synthesizer comprising: a phase-locked loop (PLL) with a feedback loop and a frequency output; said PLL having a phase and frequency detector, said phase and frequency detector with a reference divider input path and an integer divider input path; said integer divider input path being in said feedback loop of said PLL; a reference oscillator connected to said reference divider input path; a single side band (SSB) mixer having an intermediate frequency (IF) input and a local oscillator (LO) input and producing a signal frequency (RF) output signal; said RF output signal forming at least a portion of a signal path for said integer divider input path; a reference divider in said reference divider input path, said reference divider connected to said reference oscillator and providing input to said phrase and frequency detector; an intermediate divider connected to said reference divider input path, said intermediate divider providing said IF input to said SSB mixer; said frequency output providing said LO input to said SSB mixer; said RF out signal and said LO input comprising a portion of said integer divider input path; said SSB mixer, in turn, further comprising: