Patent ID: 6366230
Filing Date: 2002-04-02
Classification: H03M

Abstract:
An analog-to-digital converter comprising:a first stage comprising: at least three comparators, each comparator having inputs coupled to a respective transition voltage node and an analog input signal node; a decoder coupled to outputs of each of the comparators, the decoder including at least one output that is related to the magnitude of an analog input signal carried at the analog input signal node; a switched capacitor circuit including a first input coupled to receive the analog input signal and a second input coupled to receive a variable reference voltage the magnitude of which is selected by the at least one decoder output, the switched capacitor circuit also including an output for carrying a residue signal; a second stage with an input coupled to the switched capacitor circuit output of the first stage, the second stage comprising an sub-analog-to-digital converter configured to quantize the residue signal.