Patent ID: 7564226
Filing Date: 2009-07-21
Classification: G06F,H02J,Y10S

Abstract:
1. In a system including an integrated circuit coupled to a node to receive a supply voltage and having bypass capacitors coupled in parallel with the integrated circuit to the node, an apparatus comprising: a first capacitor; a control unit configured to assert a control signal to indicate that the supply voltage to the integrated circuit is to be activated, wherein the supply voltage is deactivated in a powered-down state of the integrated circuit at a time that the control unit asserts the control signal; a switch coupled to the first capacitor and coupled to receive the control signal, wherein the switch is configured to electrically couple the first capacitor to the node in response to an assertion of the control signal; and a voltage source configured to charge the first capacitor; wherein the first capacitor supplies charge to the bypass capacitors when electrically coupled to the node, and wherein the switch is configured to electrically isolate the voltage source from the first capacitor responsive to the assertion of the control signal.