Patent ID: 8423706
Filing Date: 2013-04-16
Classification: G11C

Abstract:
1. An apparatus to prevent data loss in a nonvolatile memory device, comprising: a nonvolatile memory comprising a memory cell which writes bit information to a first page and a second page included in a first block using plural states which are implemented using at least 2 bits; and a data-processing unit which writes the bit information of the first page to a second block in the nonvolatile memory while the bit information is written to the second page after the bit information is written to the first page, wherein the nonvolatile memory is partitioned into at least three regions in which the first block belongs to a first region, the second block belongs to the second region, and the third region comprises at least one third block which stores a copy of the first page written to the second block in the nonvolatile memory.