Patent ID: 6998673
Filing Date: 2006-02-14
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate including a plurality of trench type isolation regions and a plurality of semiconductor active regions alternately located with each other; a plurality of first electrode layers, each first electrode layer formed over the isolation regions and the active regions, the adjacent first electrode layers formed with predetermined interval; and a plurality of second electrode layers located between the active regions and the first electrode layers, a first upper surface of the isolation regions facing the first electrode layers protruding from a second upper surface of the semiconductor substrate and a height of the first upper surface being lower than a height of a third upper surface of the second electrode layers, a height of a fourth upper surface of the isolation regions located between the first electrode layers being lower than the height of the first upper surface, and a height of a fifth upper surface of the active regions located under the second electrode layers being substantially the same as a height of a sixth upper surface of the active regions located between the first electrode layers, relative to the second upper surface.