Patent ID: 6555424
Filing Date: 2003-04-29
Classification: H01L

Abstract:
A manufacturing method for a thin film transistor with sub-gates and Schottky source/drain, comprising:providing an insulation substrate; forming an island-shaped semiconductor layers on the insulation substrate; forming a gate dielectric layer on the surface of the island-shaped semiconductor layer; forming an island-shaped main gate layer on the gate dielectric layer; forming insulation spacers on the side walls of the island-shaped main gate layer; removing the gate dielectric layer on the two sides of the insulation spacers to expose the island-shaped semiconductor layer; forming a metal-containing replacement layer on the island-shaped semiconductor layer exposed; wherein the replacement layer and the island-shaped semiconductor layer existing underneath the insulation spacers form a Schottky contact, which serves as the Schottky source/drain in the thin film transistor; removing the metal layer which has not reacted to form the replacement layer; forming an insulation layer to cover the main gate layer, insulation spacers, and the Schottky source/drain; planarizing the insulation layer; and forming an island-shaped sub-gate layer over the top of the main gate layer, the two ends of the island-shaped sub-gate layer overlap with the Schottky source/drain respectively.