Patent ID: 6580381
Filing Date: 2003-06-17
Classification: H03M

Abstract:
An analog-to-digital converter, comprising:a first reference potential source for providing first reference potentials; a first input stage having at least two differential amplifiers, each of said differential amplifiers having a first and second transistor, a first input for feeding in one of the reference potentials, a second input for feeding in a first input signal, and two output terminals; said first and second transistors of a first of said differential amplifiers complementing said first and second transistors of a second of said differential amplifiers; a differential amplifier pair formed by one of said differential amplifiers of said first input stage and one of said differential amplifiers of said second input stage, said transistors of said differential amplifier pair having outputs complementing each other and coupled to one another; a switch coupling said outputs of said differential amplifiers of said differential amplifier pair to combine the output currents available at said outputs; said switch having a first input terminal for connection to said second output terminal of said differential amplifier of said second input stage, a second input terminal for connecting to said first output terminal of said differential amplifier of said second input stage, a third input terminal for connection to said first output terminal of said differential amplifier of said first input stage, a fourth input terminal for connection to said second output terminal of said differential amplifier of said first input stage, a first output terminal for providing a first output signal, and a second output terminal for providing a second output signal; said current at said first output terminal equaling: IM1=IL+I22âˆ’I11, â€ƒwhere IM1 is the current at said first output terminal, IL is a constant current, I22 is the current at said first input terminal, and I11 is the current at said third input terminal; and the current at said second output terminal equals: IP1=IL+I21âˆ’I12, â€ƒwhere IP1 is the current at said second output terminal, I21 is the current at said second input terminal, and I12 is the current at said fourth input terminal.