Patent ID: 6747302
Filing Date: 2004-06-08
Classification: H01L

Abstract:
A method for manufacturing ferroelectric memory device, comprising:a) forming a first conductive layer for a bottom electrode on a semiconductor substrate; b) forming a (BixLay)Ti3O12 ferroelectric layer, wherein â€˜xâ€™ representing atomic concentration of Bi ranging from about 3.25 to about 3.35 and â€˜yâ€™ representing atomic concentration of La ranges from about 0.70 to about 0.90; c) forming a second conductive layer for a top electrode on the (BixLay)Ti3O12 ferroelectric layer; and d) performing a thermal treatment to align a crystal direction on a side of the (BixLay)Ti3O12 ferroelectric layer, wherein an angle between the crystal direction and a direction of the bottom and ton electrodes is about 90Â°.