Patent ID: 9037911
Filing Date: 2015-05-19
Classification: G06F

Abstract:
1. A method for performing validation operations of a computing system that includes an electronic module and a debug circuit, the method comprising: executing a first program that configures the debug circuit to perform a first set of state transitions in response to detecting that one or more first pre-selected triggers have been produced by the computing system, the configuration comprising setting, in the debug circuit, both: determining whether the first set of state transitions were performed; and storing information indicating whether the first set of state transitions were performed; wherein the first program is further configured to perform a function selected from a group consisting of: determining that a memory controller spent more than a first threshold number of clock cycles in a particular state when going through a precharge operation, determining that an illegal arc was taken in transitioning between states, determining that more than a second threshold number of clock cycles was spent in a particular state, and determining whether the electronic module encountered an error condition.