Patent ID: 6765428
Filing Date: 2004-07-20
Classification: H02M,Y02B

Abstract:
A charge pump circuit for supplying a boosted voltage to a memory device, comprising:a charge pump part constructed with first to nth unit charge pumps; and a multi-level detector that detects a level variation of the boosted voltage and outputs first to nth level detection signals for selectively driving corresponding individual unit charge pumps, the multi-level detector including: a voltage distributor for dividing the boosted voltage into first to nth voltage levels; first to nth level detectors for comparing the first to nth voltage levels with a reference level and generating the first to nth level detection signals; an oscillator for producing a pulse signal in accordance with the first level detection signal from the first level detector; and a logic operation part for logically operating the pulse signal of the oscillator and the second to nth level detection signal from the second to nth level detectors, and outputting first to nth operated signals to the first to nth unit charge pumps.