Patent ID: 7277331
Filing Date: 2007-10-02
Classification: G11C

Abstract:
1. A semiconductor memory device for adjusting an output impedance of a data output driver, comprising: a reference signal generating unit for generating a reference signal; a comparing unit for comparing the reference signal with a test signal applied to a test pad to thereby output an adjusted value to the test pad after adjusting the adjusted value until the test signal is equal to the reference signal; and an impedance measuring unit for measuring an impedance of the test pad based on the adjusted value to output the test signal to the comparing unit, wherein the comparing unit includes: a voltage comparator for comparing a first input signal applied to its positive input node with a second input signal applied to its negative input node to output a first output signal to its positive output node and a second output signal to its negative output node; a switched capacitive unit for receiving the reference signal and the test signal to remove an offset voltage occurred in the positive input node, the negative input node, the positive output node and the negative output node of the voltage comparator; and a latch unit for latching the first output signal and the second output signal to output the adjusted value.