Patent ID: 6417072
Filing Date: 2002-07-09
Classification: H01L

Abstract:
A method of forming STI oxide regions and alignment marks in a semiconductor substrate, comprising the steps of:a) patterning a layer of photoresist on the surface of a semiconductor substrate, said substrate having an array area and a kerf area, said array area having trenches of a first type, said kerf area having trenches of a second type, said first and second type trenches filled with an insulator material, at least one of each of said first and second trenches insulator material comprising at least two parts, the first part comprising a first insulating material and a second part comprising a second insulating material, said second part isolated from the substrate, and wherein the patterning exposes at least a portion of at least one of the trenches in the array area and the patterning does not expose at least one trench in the kerf area; b) etching the substrate with a first etch such that less than substantially all of the first insulating material exposed by the patterning is removed, the continuing until a recess of a predetermined depth, D2, is formed; c) stripping the photoresist from substantially all of at least one of the trenches in the array area etched in step b; d) etching the structure with a second etch such that at least a portion of the substrate not exposed in step b is etched, said etching extending said recess to a second depth, D1, where D1>D2; e) stripping substantially all of the photoresist from the surface of the substrate; f) depositing a layer of oxide; and g) planarizing the layer of oxide such that the first material in the kerf area is exposed.