Patent ID: 9201086
Filing Date: 2015-12-01
Classification: G01D,G01P

Abstract:
1. A speed sensor comprising: at least one sensor element; an analog-to-digital converter (ADC), which digitizes an output signal of the at least one sensor element to produce a digitized signal; and a Costas loop unit, which is connected to an output of the ADC, the Costas loop unit including: a numerically controlled oscillator (NCO) generating a clock signal, two multipliers multiplying the clock signal with the digitized signal, a phase detector computing a difference signal indicating a phase difference between signals output from the two multipliers, a controller configured to synchronize the clock signal with the digitized signal based on the difference signal, and a summation unit that produces a corrected phase signal based on a sum or a difference between a) a phase of the clock signal output by the NCO and b) the difference signal output by the phase detector.