Patent ID: 6233668
Filing Date: 2001-05-15
Classification: G06F

Abstract:
For employing at least one processor in a computer system to translate a reference virtual address of a location within a virtual page into a physical address, within a memory accessible by each said processor and organized into page frames that can contain virtual-address pages, of a corresponding location within one said page frame that contains that virtual page, a method comprising:A) providing in the memory, for each process in a set of at least one thereof, a composite page table that includes a plurality of constituent page tables, each of which contains page-table entries, is associated with a separate virtual-address range and a separate base-address value that identifies the associated constituent page table's physical location, and maps that separate base-address value to a common virtual address, to which each other constituent page table maps the separate base-address value with which it is associated;B) providing in each said processor a translation buffer containing page-table entries loaded from the constituent page tables;C) fetching from the translation buffer the identity of the physical page frame associated with the reference virtual address's virtual page by a page-table entry loaded into the translation buffer from the constituent page table associated with the separate virtual-address range in which the reference virtual address falls; andD) generating the physical address of a location within the page frame whose identity was thus fetched.