Patent ID: 6957162
Filing Date: 2005-10-18
Classification: G06F

Abstract:
1. A low-impact universal interface for analyzing a SCSI bus with a digital logic analyzer comprising: a SCSI bus interface connector that connects said universal interface to said SCSI bus; one or more transceivers connected to said SCSI bus interface connector that convert a set of low voltage differential input signals to a set of single ended transceiver output signals; a field programmable gate array controller that receives said set of single ended transceiver output signals and provides programmed post-processing to at least a portion of said set of single ended transceiver output signals; a programmable clock connected to said field programmable gate array controller that produces a programmed clock signal that is utilized by said digital logic analyzer to synchronize data sampling on said SCSI bus; an erasable programmable read-only memory circuit connected to said field programmable gate array controller that provides programming information for said post-processing; a set of field programmable gate array controller output signals produced by said field programmable gate array controller; said set of field programmable gate array controller output signals that include an output clock signal and one or more trigger signals; and, an analyzer output connector that receives said set of single ended transceiver output signals and said set of field programmable gate array controller output signals and produces a digital logic analyzer input.