Patent ID: 6538939
Filing Date: 2003-03-25
Classification: G11C

Abstract:
A method of testing a memory, the memory including a memory array having a plurality of storage elements and a plurality of replacement storage elements, each of which may be substituted for one of the storage elements of the memory array when enabled, the method comprising:conducting a first test on the plurality of storage elements of the memory array; enabling a first set of the replacement storage elements to replace a corresponding first set of the storage elements of the memory array in response to results of the first test; conducting a second test on the plurality of storage elements of the memory array as replaced by the first set of replacement storage elements; enabling a second set of the replacement storage elements to replace a corresponding second set of the storage elements of the memory array in response to results of the second test; conducting a third test on the plurality of storage elements of the memory array as replaced by the first and second sets of replacement storage elements and determining a first yield based thereon; disabling one of the first and second sets of replacement storage elements; conducting the third test on the plurality of storage elements of the memory array as replaced by the remaining one of the first and second sets of replacement storage elements and determining a second yield based thereon; and comparing the first and second yields to determine the efficacy of the first or second test.