Patent ID: 9129992
Filing Date: 2015-09-08
Classification: H01L

Abstract:
1. A method for manufacturing a transistor, comprising forming a bottom gate electrode, an active region and a conductive thin film on a top of a substrate; coating a photoresist on the conductive thin film and forming a photoresist pattern by exposure during which light is from a bottom of the substrate; and etching the conductive thin film to form a top gate electrode by using the photoresist pattern formed by photolithography, wherein the top gate electrode is separated from the bottom gate electrode by the active region, wherein the bottom gate electrode is made of a non-transparent material, and wherein a bottom gate dielectric layer is formed between the bottom gate electrode and the active region, a top gate dielectric is formed between the active region and the conductive thin film, the conductive thin film and the top gate dielectric are simultaneously etched by using the photoresist pattern formed by photolithography as a mask to form the top gate electrode and the top gate dielectric layer, respectively, and the substrate, the bottom gate dielectric layer, the active region, the top gate dielectric and the conductive thin film are transparent, and wherein the forming of the bottom gate electrode, the active region and the conductive thin film on the top of a substrate comprises: