Patent ID: 8154133
Filing Date: 2012-04-10
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having an upper surface and a lower surface; a low dielectric constant film/wiring line stack structure which is provided in a region on the upper surface of the semiconductor substrate except for a peripheral part of the upper surface, and which comprises a stack of low dielectric constant films having a relative dielectric constant of 3.0 or less and wiring lines; an insulating film provided on the low dielectric constant film/wiring line stack structure; an electrode connection pad portion provided on the insulating film and connected to one of the wiring lines of the low dielectric constant film/wiring line stack structure; an external connection bump electrode provided on the electrode connection pad portion; a sealing film made of an organic resin and provided on peripheral side surfaces of the semiconductor substrate, the low dielectric constant film/wiring line stack structure, and the insulating film, and on the insulating film around the external connection bump electrode; and a lower protective film made of an organic resin and provided on at least the lower surface of the semiconductor substrate; wherein the insulating film includes a passivation film made of an inorganic material, and an upper protective film made of an organic resin and provided on the passivation film; and wherein a side surface of the passivation film is substantially flush with the side surface of the low dielectric constant film/wiring line stack structure, and a side surface of the upper protective film is located inward with respect to the side surface of the passivation film.