Patent ID: 6128227
Filing Date: 2000-10-03
Classification: G11C

Abstract:
A sense amplifier circuit for reading-out information stored in a memory cell, included in a flash memory device having a main cell array in which a plurality of memory cells are connected between a plurality of word lines and at least one bit line, the memory cells also connecting to a common source line of the memory cell array, the sense amplifier circuit comprising:an auxiliary cell array in which a plurality of memory cells are connected between a plurality of word lines and a bit line;a reference cell connected between a source voltage and ground and in which a drain thereof is connected to a common source line of said auxiliary cell array;a sense amplifier having first and second input terminals connected to said common source line of said auxiliary cell array and said at least one bit line of said main cell array, respectively, andan auxiliary cell array decoder configured to select a memory cell in the auxiliary cell array depending on a position of a source contact of a corresponding memory cell selected in the main memory cell array, such that a first resistance value of the common source line of the main cell array and a second resistance value of the common source line of the auxiliary cell array are maintained substantially similar to one another, regardless of which cell within the main cell array is selected.