Patent ID: 6304834
Filing Date: 2001-10-16
Classification: G06F

Abstract:
A computer implemented semiconductor device simulation method, configured such that a result of the simulation is used for manufacturing the semiconductor device, comprising the steps of:(a) defining grid points inside and around a semiconductor device, and generating a plurality of grids, configured such that said grid points are disposed at respective vertexes of the grids;(b) setting linearly changing quasi-Fermi potential profiles of carrier inside spaces defined by each of the grids;(c) obtaining carrier concentrations from said linearly changing quasi-Fermi potential profiles in each of said spaces; and(d) solving basic equations comprising Poisson's equation and carrier continuity equation under a predetermined boundary condition, using said obtained carrier concentrations,wherein device behavior characteristics of the semiconductor device to be manufactured are obtained as a result of the computer implemented semiconductor device simulation method.