Patent ID: 8819385
Filing Date: 2014-08-26
Classification: G06F

Abstract:
1. A method for accessing a flash memory, the method comprises: receiving a read request that is associated with a logical address that is mapped to a physical address of a set of flash memory cells; accessing multiple mapping data structures of different granularity to obtain the physical address of the set of flash memory cells; wherein the accessing comprises accessing a first mapping data structure that maps logical erase block addresses to physical erase block addresses and accessing a second mapping data structure that comprises mapping information relating to multiple physical or logical pages; wherein the flash memory comprises multiple erase blocks, each erase block comprises multiple physical pages that are written in a sequential manner and are associated with logical page addresses that are assigned in a random manner; reading a content of the set of flash memory cells; writing to an erase block of the flash memory the second mapping data structure only after all the multiple physical pages of the erase block were written to the erase block; accessing the first mapping data structure, the second mapping data structure and a third mapping data structure; wherein the second mapping data structure maps logical page addresses to indexes into the third mapping data structure; wherein the third mapping data structure maps the indexes to locations of sets of flash memory cells to overcome misalignments between information unit representations stored in the physical pages of the flash memory and physical page boundaries of the flash memory; and wherein at least one erasure block comprises at least two sets of flash memory cells that differ from each other by their size but store representations of information units of the same size.