Patent ID: 6853082
Filing Date: 2005-02-08
Classification: H01L

Abstract:
1. An integrated circuit device, the device comprising: a substrate; an insulating layer overlying the substrate; a copper metal layer overlying the insulating layer; an etch stop layer overlying the copper metal layer; an interlayer dielectric material overlying the etch stop layer, the interlayer dielectric material including an upper surface; a plurality of via openings defined within a region of the interlayer dielectric layer from the upper surface through the etch stop layer to the copper metal layer; a copper fill material within each of the plurality of via openings to define a plurality of copper structure extending from the upper surface through the etch stop layer to the copper metal layer; a first barrier metal layer overlying each of the plurality of copper structures to define a first electrode of a capacitor structure; an insulating layer overlying the first barrier metal layer to define an insulating layer for the capacitor structure; and a second barrier metal layer overlying the insulating layer to define the second electrode.