Patent ID: 6836002
Filing Date: 2004-12-28
Classification: H01L

Abstract:
A semiconductor device, comprising:a plurality of semiconductor chips, equipped with respective external lead electrodes, being laminated on a lamination substrate; and at least one first re-wiring layer having a rectangular shape and being formed on a circuit-formed surface of one of said plurality of semiconductor chips where the re-wiring layer is formed via an insulating film, the re-wiring layer being provided between two of the plurality of semiconductor chips, said at least one re-wiring layer being thinner than any one of said plurality of semiconductor chips and being smaller in size than said one semiconductor chip where said re-wiring layer is formed, wherein said at least one first re-wiring layer includes: first electrode pads disposed directly on a periphery of said first re-wiring layer and electrically connected with traces of said lamination substrate; second electrode pads disposed directly on said first re-wiring layer at positions closer to a center of the first re-wiring layer than said first electrode pads and electrically connected with external lead electrodes of one of the plurality of semiconductor chips above the first re-wiring layer; and traces for electrically connecting said first electrode pads with said second electrode pads.