Patent ID: 6584588
Filing Date: 2003-06-24
Classification: G06F,G11C

Abstract:
A computer system comprising:system processing circuitry including a main processor and a memory bus for standard memory modules coupled to said main processor; and a processor/memory module coupled to said main processor via said memory bus, wherein said processor/memory module is configured as standard memory module adapted to fit a standard memory slot for said memory bus in said systems processing circuitry, said processor/memory module comprising: semiconductor memory; one or more local processors coupled to said semiconductor memory; and control circuitry for providing communications between said main processor in said system processing circuitry and said one or more local processors in said processor/memory module by memory addresses such that said system processing circuitry can access said semiconductor memory and can instruct said one or more local processors to transform data and store transformed data in said semiconductor memory for access by said system processing circuitry and such that said one or more local processors relinquishes access to said semiconductor memory when accessed by said main processor.