Patent ID: 6516463
Filing Date: 2003-02-04
Classification: G06F

Abstract:
A method, performed by a compiler, for reducing the critical path of a block in a dependence graph, with the dependence graph including a store predecessor operation that outputs a first output operand, a store operation that receives said first output operand and stores the first output operand at a first storage location having a first address, and a load operation, executed after said store operation, for loading a second output operand from a storage location having a second address, where the load operation depends on the store operation if the second and first addresses are equal, and a load successor operation that receives the second operand as an input operand, said method comprising the steps of:scheduling store predecessor and load operations to output the first and second operands respectively; predicating the second output operand and the first output operand on the outcome of an address compare operation; scheduling an address comparison operation to generate a Boolean operand having a first value if the first and second addresses are equal and a second value if the first and second addresses are not equal; and selecting the first output operand as the input operand of the load successor operation if the Boolean operand has said first value or said second output operand as the input operand of the load successor operation if the Boolean operand has the second value.