Patent ID: 7475272
Filing Date: 2009-01-06
Classification: G06F

Abstract:
1. A method of calculating clock offset and skew in a computer system, the method comprising the steps of: sending data packets from a first processing unit in the computer system to a second processing unit in the computer system; sending the data packets from the second processing unit to the first processing unit; providing first time stamps to indicate when the packets leave the first processing unit; providing second time stamps to indicate when the packets arrive at the second processing unit; providing third time stamps to indicate when the packets leave the second processing unit; providing fourth time stamps to indicate when the packets arrive at the first processing unit; defining a set of backward delay points using the fourth time stamps; and calculating a clock offset between clocks on the first and second processing units and clock skews of said clocks using said set of backward delay points; wherein: the set of backward delay points comprises {T4( each backward delay value is calculated using a respective one set of the time stamps.