Patent ID: 6140698
Filing Date: 2000-10-31
Classification: H01L

Abstract:
An integrated circuit package comprising:a dielectric package substrate having a plurality of conductive transmission lines located thereon;at least one integrated circuit die mounted on a top surface of the dielectric package substrate and electrically connected to at least some of the plurality of conductive transmission lines;a continuous outer dielectric wall sealed to the dielectric package substrate and defining a cavity;at least one conductive transmission line, of the plurality of conductive transmission lines, passing under the outer dielectric wall for carrying a signal of frequency F;at least one inner dielectric wall spaced apart a distance from the outer dielectric wall over the at least one conductive transmission line;the at least one inner dielectric wall being of substantially the same width and height as the outer dielectric wall such that in operation it presents a discontinuity effect substantially the same as a discontinuity effect presented by the outer dielectric wall;a plate sealed to a top of the outer dielectric wall and a top of the inner dielectric wall enclosing the cavity created by the outer dielectric wall creating a hermetic enclosure for the integrated circuit die; andan impedance transformer in the conductive transmission line between the outer dielectric wall and the inner dielectric wall;such that at frequency F, the combination of the inner dielectric wall, the distance between the inner dielectric wall and the outer dielectric wall and the impedance transformer cancel out the discontinuity effect created in the at least one conductive transmission line by the outer dielectric wall.