Patent ID: 8329539
Filing Date: 2012-12-11
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: preparing a semiconductor substrate having a cell region, a first transistor region, and a second transistor region; forming a channel trench by etching the cell region of the semiconductor substrate, wherein forming the channel trench comprises forming the channel trench to include a lower channel trench having an inner wall with a substantially round profile, wherein a portion of the lower channel trench above a widest portion of the lower channel trench has the substantially round profile; forming a first semiconductor layer of a first conductivity type on the semiconductor substrate that fills the channel trench; forming a second semiconductor layer of the first conductivity type on the first semiconductor layer, the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; implanting impurities of a second conductivity type that is different from the first conductivity type into the first and second semiconductor layers formed in the second transistor region; before forming the first semiconductor layer, forming a gate insulating layer on an inner wall of the channel trench and on a surface of the semiconductor substrate; before forming the first semiconductor layer, forming an interface semiconductor layer to cover the gate insulating layer, wherein the interface semiconductor layer is formed of one of a semiconductor layer of the first conductivity type having a lower impurity concentration than the first semiconductor layer and an undoped semiconductor layer; and after implanting the impurities of the second conductivity type,