Patent ID: 6535029
Filing Date: 2003-03-18
Classification: H03K

Abstract:
A comparator circuit comprising:a pair of cross-coupled inverters having a pair of outputs; a pair of input transistors, each having a gate for receiving an input voltage signal, and a source and drain; means, responsive to a first signal, for connecting together the outputs of the cross-coupled inverters so that the inverter outputs have a nearly equal voltage and for supplying a bias current to the input transistors so as to charge the drains of the input transistors based on input voltage signals present at the gates of the input transistors; means, responsive to a second signal, for applying the charged drains of the input transistors to the outputs of the cross-coupled inverters to establish, on the outputs of the cross-coupled inverters, a voltage difference representative of a voltage difference at the inputs and for supplying a source current, from a supply voltage, to the bias current means; and means for establishing an RC time-constant at the drains of the input transistors.