Patent ID: 6618780
Filing Date: 2003-09-09
Classification: G06F

Abstract:
A computer system comprising:a plurality of interrupt sources; a processor operable for servicing interrupt requests generated by the interrupt sources; a priority selection device for storage of a plurality of available IRQ source numbers according to assigned priority levels, comprising a first plurality of sequentially ordered priority level registers, each representing an IRQ priority level and storing an IRQ source number assigned to the IRQ priority level; and a priority resolution device coupled to said processor and said priority selection device, said priority resolution device comprising: a plurality of sequentially ordered first multiplexers, each comprising: a plurality of inputs, each coupled to receive a signal representing a status of an IRQ; a select input coupled to receive the IRQ source number stored in a corresponding one of the priority level registers; and an output representing the status of the IRQ assigned to the corresponding one of the priority level registers; and an encoder, comprising: a plurality of inputs, each coupled to receive the output from one of the plurality of multiplexers; and an output representing the level of a selected IRQ having the highest priority level of IRQs with an active status.