Patent ID: 7582559
Filing Date: 2009-09-01
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming an insulation pattern over a substrate, the insulation pattern having at least one opening that exposes a surface of the substrate; forming a first polysilicon layer over the substrates such that the first polysilicon layer fills the opening, the first polysilicon layer including a void therein; removing an upper portion of the first polysilicon layer such that void expands to a recess and the recess is exposed; forming a second polysilicon layer over the substrate such that the second polysilicon layer fills the recess; and partially removing an upper portion of the second polysilicon layer except for the portion of the second polysilicon layer filling the recess, to form a polysilicon pattern in the opening, wherein the removing the upper portion of the first polysilicon layer includes: