Patent ID: 8582275
Filing Date: 2013-11-12
Classification: F42B,F42C

Abstract:
1. An electronic detonator control chip, characterized by comprising a communication interface circuit, a rectifier bridge circuit, a charging circuit, a charging control circuit, a power supply management circuit, a firing control circuit, a logic control circuit, a non-volatile memory, a reset circuit, a safe discharging circuit, and a clock circuit, wherein one end of the rectifier bridge circuit is connected to the communication interface circuit, forming a set of first pin extending to the exterior of the chip; one end of the rectifier bridge circuit leads to the charging circuit and the charging control circuit, supplying power to the charging circuit and the charging control circuit; the other end of the rectifier bridge circuit is grounded; one end of the charging circuit is connected to the rectifier bridge circuit; the other end is connected to the power supply management circuit and also extends to the exterior of the chip, forming a set of second pin; one end of the charging control circuit is connected to the rectifier bridge circuit, one end is grounded, and one end is connected to the logic control circuit; another end of the charging control circuit is connected to the safe discharging circuit and also extends to the exterior of the control chip, forming a set of third pin; one end of the safe discharging circuit is connected to the logic control circuit, one end is grounded, and the other end is connected to the third pin within the control chip; one end of the power supply management circuit is connected to the second pin within the control chip, and one end is grounded; the other end of the power supply management circuit extends to the exterior of the chip, forming a set of fourth pin of the power supply output terminal of the control chip; one end of the communication interface circuit is grounded, one end is connected to the first pin within the control chip, one end leads to the logic control circuit, and the other end is connected to the fourth pin within the control chip; one end of the reset circuit is grounded, one end is connected to the fourth pin within the control chip, and the other end is connected to the logic control circuit; one end of the firing control circuit is grounded; one end extends to the exterior of the control chip, forming a set of fifth pin, and the other end leads to the logic control circuit; one end of the clock circuit is connected to the fourth pin within the chip, and the other end leads to the logic control circuit; one end of the logic control circuit is connected to the clock circuit, one end is connected to the fourth pin within the control chip, one end is grounded, one end is connected to the non-volatile memory, one end is connected to the communication interface circuit, one end is connected to the reset circuit, one end is connected to the safe discharging circuit, one end is connected to the charging control circuit, and the other end is connected to the firing control circuit; and one end of the non-volatile memory is connected to the fourth pin within the control chip, one end is connected to the logic control circuit, and the other end is grounded; wherein the safe discharging circuit includes a second resistor and a first NMOS transistor; the source and the substrate of the first NMOS transistor are grounded, its drain is connected to the third pin via the second resistor, and its grid is connected to the logic control circuit.