Patent ID: 8122420
Filing Date: 2012-02-21
Classification: G06F

Abstract:
1. A method of routing a circuit design for implementation within a target integrated circuit (IC), the method comprising: determining a characterization of routing congestion of the circuit design within the target IC; wherein the characterization specifies at least one instance of first order congestion and at least one instance of higher order congestion; determining a first order cost component of using routing resources of the target IC for the at least one instance of first order congestion wherein the first order cost component specifies a cost of using at least one routing resource involved in an overlap condition for which removal of the overlap condition requires reassigning one routing resource; determining a higher order cost component of using routing resources of the target IC for the at least one instance of higher order congestion wherein the higher order cost component specifies a cost of using at least one routing resource involved in an overlap condition for which removal of the overlap condition requires reassigning at least two routing resources; wherein the higher order cost component is determined using an expression that is different from an expression used for the first order cost component; assigning, by a processor, signals of the circuit design to routing resources according to costs calculated using the first order cost component and the higher order cost component; and outputting signal assignments of the circuit design.