Patent ID: 6587635
Filing Date: 2003-07-01
Classification: H04N

Abstract:
A method of operating a digital video processor including a CPU and a memory to control the presentation of demultiplexed subpicture data, the subpicture data comprising a serial stream of subpicture units (â€œSPU'sâ€ ), each of the SPU's including in part a plurality of display control sequence (â€œDCSQâ€ ) commands and associated start time values, a start of each of the SPU's being defined by a presentation time stamp (â€œPTSâ€ ) associated therewith, the play back of the subpicture being synchronized with a system clock having a clock rate varying as a function of a desired play back speed selected by a user, the method comprising:testing during a vertical blanking period, consecutive ones of the SPU's to identify a first SPU including a PTS value having a desired relationship with respect to a value of the system clock; testing during the vertical blanking period, consecutive ones of the DCSQ commands in the first SPU to identify one or more DCSQ commands with respective start time values having the desired relationship with respect to the value of the system clock; and parsing during the vertical blanking period, the one or more DCSQ commands associated with the first SPU in response to their respective start time values having the desired relationship with respect to the value of the system clock, thereby commanding a play back of the subpicture defined by the first SPU.