Patent ID: 6577604
Filing Date: 2003-06-10
Classification: H04L,H04W

Abstract:
A method for determining, by a circuit, link capacity utilization for High Level Data Link Control encoded links, wherein the links transport frames comprised of a known number of bits during a time period, wherein the frames comprise variable length data packets and uniform length sync flags, and wherein the circuit comprises a flag detector, a counter, a timeout register, and a shadow register, the method comprising the steps of:entering a sync flag count state if a sync flag is detected by the flag detector; incrementing the counter if a repeated sync flag is detected within a next data byte, wherein the counter is coupled to the flag detector; when the time period expires, forwarding, to the shadow register, a number of the repeated sync flags, wherein the shadow register is coupled to the counter; accessing, by a processor, the number of repeated sync flags, wherein the processor is coupled to the shadow register; and calculating, by the processor, the link capacity utilization.