Patent ID: 8053349
Filing Date: 2011-11-08
Classification: H01L

Abstract:
1. A method for fabricating an electronic device comprising the steps of: opening n times m through-holes at the center of a substrate forming a n-row-by-m-column first array of through-holes at a first pitch, where n and m are integers no smaller than 3; opening through-holes adjacent to the first array extending towards edges of the substrate forming a second array of through-holes, including the first array of through-holes, at the first pitch; forming metal lands on a first substrate surface covering the through-holes; forming a metal trace on the first substrate surface extending from each metal land; and placing a plurality of the traces on the first substrate surface between at least two adjacent pairs of through-holes of the second array of through-holes where the two through-holes of each of the at least two adjacent through-hole pairs are spaced multiple first pitches apart from each other.