Patent ID: 6373703
Filing Date: 2002-04-16
Classification: H01L

Abstract:
An electronic package assembly comprising:a substrate having a first surface and a second surface; an integrated circuit chip having a top surface; first attaching means for attaching the integrated circuit chip to the first surface of the substrate; encapsulating means for encapsulating the integrated circuit chip, the encapsulating means contacting at least a portion of the first surface of the substrate; an orifice formed in a top portion of the encapsulating means, the orifice partially penetrating a surface of the encapsulating means; heat dissipating means disposed on the top portion of the encapsulating means; and second attaching means detachably coupled to the orifice, the second attaching means aligned with and separate from the heat dissipating means to maintain the heat dissipating means in contact with the top portion of the encapsulating means.