Patent ID: 8935684
Filing Date: 2015-01-13
Classification: G06F

Abstract:
1. A computer-implementable method for improving the performance of a compiler, comprising: identifying, in source code, an expression that is included in a nested loop, the expression including at least one term that is dependent on at least one iterator variable of the nested loop; generating a sum-of-products (SOP) representation of the expression, the sum-of-products representation including a summation of groups of multiplied terms in the expression, wherein the SOP representation comprises an SOP expression tree; flattening operations the SOP expression tree to generate a flattened SOP expression tree, the flattening operations comprising traversing the SOP expression tree to generate an array of sums-of-products; sorting on the array of sums-of-products to generate a sorted SOP expression tree, wherein sorting comprises generating a plurality of partial expressions respectively comprising a variance value and sorting the partial expressions according to the variance value corresponding to each partial expression; for each multiplied term in the sum-of-products representation, compiling the source code to produce object code.