Patent ID: 6146952
Filing Date: 2000-11-14
Classification: H01L

Abstract:
A process of forming a semiconductor device, comprising:forming a gate electrode on a substrate;forming a dielectric layer over the substrate and adjacent the gate electrode including planarizing above the gate electrode;forming a masking layer over the dielectric layer and the gate electrode;selectively removing portions of the masking layer to form an implant mask over the gate electrode, the implant mask extending further over a first side of the gate electrode than a second side of the gate electrode; andimplanting, using the implant mask, dopant into the active regions of the substrate adjacent the gate electrode to form a first heavily-doped region adjacent the first side of the gate electrode and a second heavily-doped region adjacent the second side of the gate electrode, the first heavily-doped region being spaced further from the gate electrode than the second heavily-doped region.