Patent ID: 6849500
Filing Date: 2005-02-01
Classification: H01L

Abstract:
1. A method for manufacturing a nonvolatile memory device, the method comprising: forming a first insulating layer above a semiconductor layer; forming a first conductive layer above the first insulating layer; forming a stopper layer above the first conductive layer; patterning the stopper layer and the first conductive layer; forming an ONO film made of a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer above the semiconductor layer and on both side surfaces of the first conductive layer; forming a second conductive layer above the ONO film; applying anisotropic etching to the second conductive layer, and thereby forming a side wall control gate aside each of both side surfaces of the first conductive layer, the ONO film being interposed therebetween; forming an impurity layer to be a source region or a drain region inside of the semiconductor layer; forming a second insulating layer above an entire surface of the semiconductor layer; polishing the second insulating layer so as to expose the stopper layer; removing the stopper layer; forming, on the entire surface, a third conductive layer made of a laminate film of a titanium layer and a titanium nitride layer; patterning the third conductive layer and thereby forming a word line; and patterning the first conductive layer and thereby forming a word gate; wherein an opening is formed in the second insulating layer by removing the stopper layer, an upper portion of the opening of the second insulating layer is subjected to reverse sputter, and thereby the opening is formed into an inverse-tapered shape.