Patent ID: 7103043
Filing Date: 2006-09-05
Classification: H04L

Abstract:
1. A packet transmission apparatus comprising: a buffer unit which stores packet data in a memory constructed by arranging a plurality of memory areas, each memory area having a bit width equal to the smallest bit width with which to perform processing for altering the packet data; a non-copy packet arbiter which selects one of non-copy packets stored in the buffer unit by a prescribed algorithm, and requests transmission of the selected non-copy packet; a copy packet arbiter which selects one of copy packets stored in the buffer unit by a prescribed algorithm, and requests transmission of the selected copy packet, said copy packet arbiter determining packet transmission spacing based on the packet length of the copy packet and on line speed, and transmitting the selected copy packet based on the packet transmission spacing; a final arbiter which selects either one of the transmit requests, the transmit request from the non-copy packet arbiter or the transmit request from the copy packet arbiter, by a prescribed algorithm, and requests transmission of the selected packet; and a MUX unit which applies an alteration to the packet data supplied from the buffer unit, on a memory area by memory area basis by rearranging the memory areas, said packet transmission apparatus transmitting out the packet requested by the final arbiter and altered by the MUX unit for transmission.