Patent ID: 6350952
Filing Date: 2002-02-26
Classification: H01L

Abstract:
A semiconductor package comprising:a printed wiring board having a first surface and an oppositely facing second surface; a metal sheet within said printed wiring board; at least one semiconductor chip on said first surface of said printed wiring board; a first conductive circuit on said first surface of said printed wiring board, with said first conductive circuit and said metal sheet being electrically insulated from each other, and with said first conductive circuit and said at least one semiconductor chip being electrically connected to each other; at least one of a second conductive circuit and a resin-encapsulated conductive circuit pad on said second surface of said printed wiring board and electrically insulated from said metal sheet, with said first conductive circuit being electrically connected to said at least one of a second conductive circuit and a conductive circuit pad; at least one blind via hole extending from said second surface of said printed wiring board to said metal sheet, with said at least one blind via hole being defined by a thermally conductive inner wall; and at least one of an elevated metal portion and at least one blind via hole, defined by a thermally conductive inner wall, in said printed wiring board between said first surface and said metal sheet.