Patent ID: 8410544
Filing Date: 2013-04-02
Classification: H01L

Abstract:
1. A structure, comprising: two or more silicon fins on a top surface of an insulating layer, said insulating layer on a silicon substrate, each fin of said two or more fins having opposite sidewalls connecting opposite first and second ends; a gate dielectric layer on said sidewalls of each fin of said two or more fins; an electrically conductive gate over said gate dielectric layer; first and second regions of said silicon substrate on opposite sides of said gate; a first merged source/drain comprising first epitaxial silicon regions extending from said first region of said silicon substrate, through said insulating layer, and abutting second epitaxial regions extending from said first ends of each fin of said two or more fins; and a second merged source/drain comprising third epitaxial silicon regions extending from said second region of said silicon substrate, through said insulating layer, and abutting fourth epitaxial regions extending from said second ends of each fin of said two or more fins.