Patent ID: 7795668
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate including a surface having a plurality of trenches each formed along a first direction and element regions located between the trenches; a pair of selective gate lines formed above the semiconductor substrate and formed along a second direction which intersects perpendicularly in the first direction; a plurality of word lines formed above the semiconductor substrate and formed adjacent to the selective gate lines along the second direction; a plurality of contact plugs located between the selective gate lines, the contact plugs being formed on the element regions respectively; a first insulator formed in the trenches between the word lines, the first insulator including a first insulating film having a first upper surface that is flush with the surface of the semiconductor substrate; a second insulator formed in the trenches between the contact plugs and including a second insulating film and a third insulating film formed on the second insulating film; and a boro-phosphor-silicate glass (BPSG) film formed on the third insulating film and between the contact plugs, wherein the second insulating film is of a kind same as the first insulating film, the third insulating film has a higher resistance to a wet etching process than the second insulating film, an interface between the second and third insulating films is located between a bottom and an upper end portion of the trench.