Patent ID: 7310759
Filing Date: 2007-12-18
Classification: G06F,G11C

Abstract:
1. A method ensuring correct output from a first logic design, the method comprising the steps of: configuring the first logic design and a redundant instance thereof in a first configurable device, the first logic design and redundant instance thereof each producing at least one logic output on a first logic path connected to a data line; configuring a second logic design and a redundant instance thereof in a second configurable device, the second logic design being identical to the first logic design, the second logic design and the redundant instance thereof each producing at least one logic output on a second logic path connected to the data line; synchronizing the first and second devices; comparing the logic output of the first logic design to the logic output of the redundant instance thereof to produce a first comparison result; reconfiguring the first logic function and the redundant instance thereof if the first comparison result is a predetermined value; re-synchronizing the first and second devices if the first logic design has been reconfigured; comparing the output of the second logic design to the output of the redundant instance thereof to produce a second comparison result; reconfiguring the second logic design and the redundant instance thereof if the comparison result is a predetermined value; and re-synchronizing the first and second devices if the second logic design has been reconfigured.