Patent ID: 6656806
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A method of producing an SOI structure, comprising:providing a substrate having a silicon substrate, a BOX layer and an SOI layer; forming, sequentially, a pad oxide film, a nitride film and a first oxide layer on the SOI layer; patterning the nitride film and the first oxide layer of a device isolation area of the SOI layer by a mask; injecting ion impurities onto the resultant structure to form a well area in the SOI layer having a lower surface in contact with the BOX layer in the device isolation area of the SOI layer; forming a spacer on both side walls of the nitride film and the first oxide layer remaining on an active area in the SOI layer; etching the pad oxide film and the well area of the SOI layer to form an SOI well having a constant thickness on the BOX layer; forming a second oxide layer on the resultant structure; CMP-processing the second oxide layer so that the nitride film remains at a constant thickness on the active area, and so that a field oxide film of second oxide layer material is formed on a surface of the well; eliminating the nitride film, the pad oxide film and the spacer remaining on the active area, to expose the active area of the SOI layer; forming a gate line across the active area and over a portion of the field oxide film; forming an insulation layer on the resultant structure; executing a primary damascene process in which the insulation layer is etched to a constant thickness so that the gate line on the field oxide film is partially exposed, and after that, performing a secondary damascene process in which the remaining insulation layer on the active area is etched, and thus forming an opening part that is opened in a full trench structure on the active area and that is opened in a partial trench structure on the field oxide film; filling the opening part with a metal layer; CMP-processing the metal layer; and forming an LIC in the opening part.