Patent ID: 6701445
Filing Date: 2004-03-02
Classification: H03L,H04L

Abstract:
A frequency control system comprising voltage-controlled oscillator means for generating a clock signal, means for receiving a digital incoming signal with unstable frequency for sampling said clock signal at two pairs of times corresponding to two consecutive transitions of said incoming signal in response to each of predetermined transitions of said incoming signal, said times of one pair being separated by a predetermined time-delay at most equal to half the period of said clock signal, to produce four state signals of said clock signal, a frequency comparator for combining said four state signals to form an upcounting signal only in response to the frequency of said clock signal being substantially less than the frequency of said incoming signal and to form a downcounting signal only in response to the frequency of said clock signal being greater than the frequency of said incoming signal, and upcounting and downcounting means for respectively upcounting and downcounting predetermined transitions of said incoming signal in response to said upcounting signal and said downcounting signal for applying a control voltage dependent on a content of said upcounting and downcounting means to said oscillator means via a digital-to-analog converter.