Patent ID: 6677705
Filing Date: 2004-01-13
Classification: H01J

Abstract:
In a cathode connection array for a flat panel display, said cathode connection array having a base structure, said base structure comprising an inter-layer dielectric disposed upon a glass substrate, said inter-layer dielectric covering a first metallic conductor, said first metallic conductor disposed upon at least a part of said glass substrate in a first conductor pad area, and a second metallic conductor, said second metallic conductor disposed upon at least a part of said inter-layer dielectric in a second conductor pad area, said second conductor covered by a layer of chromium, a method of forming a direct via for an electrical access to said first and said second metallic conductors, said method comprising:depositing a passivation layer upon said base structure; patterning said passivation layer; etching said passivation layer accordingly; and etching said inter-layer dielectric accordingly; wherein said method does not require deposition of a photoresistive mask for etching said direct via nor process steps corresponding to deposition thereof.