Patent ID: 8860522
Filing Date: 2014-10-14
Classification: H04L

Abstract:
1. A modulator for an electrical signal, comprising: a data input port; a clock frequency input port; a first phase shifter adapted to keep a phase of an input clock frequency signal aligned with a phase of a data stream which is input at the data input port independent of data values of the data stream; a first exclusive OR (XOR) gate with an output port, to which first XOR gate the input ports of the modulator are connected, by means of which a Binary Phase Shift Keying (BPSK) signal is created at the output port when a first data stream is connected to the data input port and a first clock frequency signal is connected to the clock frequency input port; a second XOR gate with a data input port, a clock frequency input port and an output port; a second phase shifter connected to the data input port of the second XOR gate; a third phase shifter connected to the output port of the second XOR gate; and a first adder for adding an output of the first XOR gate and an output of the third phase shifter, so that a Quadrature Phase Shift Keying (QPSK) signal is created when the first data stream and a second data stream are connected to the data input ports of the first and second XOR gates, respectively, and the first clock frequency signal and a second clock frequency signal at a same frequency are connected to the clock frequency input ports of the first and second XOR gates, respectively.