Patent ID: 7278119
Filing Date: 2007-10-02
Classification: G06F,H02J,H04M,H04W,Y02D

Abstract:
1. A battery-optimized system-on-a-chip comprises: multimedia module operably coupled to produce rendered output data; high-speed interface; processing module; on-chip memory operably coupled to store at least a portion of a multimedia application, wherein the processing module processes input multimedia data in accordance with the at least the portion of the multimedia application to produce output multimedia data, wherein the input multimedia data is received from at least one of the multimedia module and the high-speed interface, and wherein the output multimedia data is provided to at least one of the multimedia module arid the highspeed interface; and on-chip DC-to-DC converter operably coupled to convert a battery voltage into a supply voltage, wherein the DC-to-DC converter provides the supply voltage to at least one of the multimedia module, the highspeed interface, the processing module, and the on-chip memory.