Patent ID: 6460062
Filing Date: 2002-10-01
Classification: G06F

Abstract:
A discrete cosine transformation circuit including a multiplier and an adder/subtracter having a first input and a second input, for performing a discrete cosine transformation from either one of time series audio data and frequency composition data to the other thereof, the multiplier outputting a result to the adder/subtracter, the discrete cosine transformation being performed through multiplication of operand data by a proportional coefficient and addition/subtraction using terms based on the operand data, the operand data being based on data before conversion, which is either the time series audio data or the frequency composition data, the circuit comprising:an addition-subtraction result register for holding an output from the adder/subtracter; an addition-subtraction result selector for outputting either content of the addition-subtraction result register or a value â€œ0â€ , an output of the multiplier being connected to the first input of the adder/subtracter, an output of the addition-subtraction result selector being connected to the second input of the adder/subtracter, the addition-subtraction result selector outputting the value â€œ0â€  so that the addition-subtraction result register is loaded with the output of the multiplier in order to supply the output of the multiplier to the second input of the adder/subtracter; and a proportional coefficient selector for supplying either the proportional coefficient or a value â€œ1â€  to the first input of the multiplier, wherein the proportional coefficient selector outputs the value â€œ1â€  when a value of the operand data supplied to the adder/subtracter via the second input is used intact in the addition/subtraction.