Patent ID: 7061798
Filing Date: 2006-06-13
Classification: G11C

Abstract:
1. A method of operating a non-volatile memory having an array of semiconductor memory cells organized into blocks that are erased together prior to re-programming memory cells thereof, wherein charge levels stored in some charge storage elements of the memory cells affect readings from other charge storage elements on account of at least electric field coupling between neighboring storage elements, comprising: storing in a first group of storage elements a first set of charge levels corresponding to a first set of data, thereafter storing in a second group of storage elements different from the first group a second set of charge levels corresponding to a second set of data, wherein at least some of the stored second set of charge levels affect values read from memory cells including at least some of the first group of storage elements because of at least field coupling between the storage elements, and altering the first set of stored charge levels of the first group of storage elements in order to counteract an effect of the second set of stored charge levels on the values read from memory cells including at least some of the first group of storage elements because of field coupling between the storage elements, thereby to facilitate accurate reading of the first set of data from the first group of storage elements.