Patent ID: 6015757
Filing Date: 2000-01-18
Classification: H01L

Abstract:
A method of forming a shallow trench isolation on a wafer, said method comprising the following steps of:forming a pad layer on said wafer;forming a silicon nitride layer over said pad layer;forming a hard mask layer over said silicon nitride layer;forming a trench by etching said hard mask layer, said silicon nitride layer, said pad layer and said wafer;forming a trench filling layer for isolation on said hard mask layer and filling into said trench, a first etching rate of said trench filling layer being faster than a second etching rate of said hard mask layer; andselectively etching said trench filling layer, resulting in a residual protruded trench filling layer remaining over said trench to act as a reverse tone structure, wherein said hard mask is used to prevent said silicon nitride layer from being etched during said selectively etching.