Patent ID: 6313704
Filing Date: 2001-11-06
Classification: H03F

Abstract:
A multi-stage signal amplifying circuit in which a plurality of differential signal amplifiers are serially arranged in multi-stage to receive an output of one differential signal amplifier in another differential signal amplifier, to differentially amplifying a differential input signal input to the differential signal amplifier of a first stage and to output a differential output signal from the differential signal amplifier of a final stage, comprising:a detecting amplifier for receiving a differential amplified signal output from a particular differential signal amplifier placed on a second stage or after the second stage and differentially amplifying the differential amplified signal to output an offset detecting differential signal;a low-pass filter for passing only a direct-current component of the offset detecting differential signal output from the detecting amplifier; anda compensating current generating amplifier for receiving the offset detecting differential signal passing through the low-pass filter, producing an offset compensation differential signal according to the offset detecting differential signal and inputting the offset compensation differential signal to a specific differential signal amplifier preceding to the particular differential signal amplifier.