Patent ID: 8077496
Filing Date: 2011-12-13
Classification: G11C

Abstract:
1. A method of driving a nonvolatile memory device including a plurality of variable resistance memory cells, each of the plurality of variable resistance memory cells having a bit line coupled to the variable resistance memory cell and a column selection transistor coupled between the variable resistance memory cell and the bit line to receive a first control voltage being applied to a gate of the column selection transistor, the method comprising: setting the first control voltage at a first level; changing a resistance of a selected memory cell from among the plurality of variable resistance memory cells by providing a write bias to the selected memory cell while setting the first control voltage; determining whether the changed resistance of the selected memory cell enters into a desired resistance window; changing, based on the determining step, the first control voltage to a second level that is different from the first level; and changing the resistance of the selected memory cells by providing the write bias to the selected memory cell while changing the first control voltage.