Patent ID: 7802041
Filing Date: 2010-09-21
Classification: G06F

Abstract:
1. An apparatus comprising: a plurality of first system boards, each of the first system boards including a first port, a second port, and a first processor that sends a first request through the first port and a second request identical to the first request through the second port respectively, and each of the first system boards is mirrored; a plurality of second system boards, each of the second system boards including a third port, a fourth port, and a second processor that seconds a third request through either of the third port and fourth ports, and the second system boards are not mirrored; a first transfer device, connected to the first port of each of the first system boards and the third port of each of the second system boards, having a first arbiter that selectively receives the first request sent from the first port of one of the first system boards, and that outputs the received first request to at least one of the first ports of the first system boards, and a second arbiter that selectively receives the third request sent from the third ports of the second system boards and that outputs the received third request to at least one of the third ports of the second system boards; and a second transfer device, connected to the second ports of the first system boards and the fourth ports of the second system boards, having a third arbiter that selectively receives the second request sent from the second port of the one of the first system boards and that outputs the received second request to at least one of the second ports of the first system boards in synchronization with the first request outputted from the first arbiter, and a fourth arbiter that selectively receives the third request sent from the fourth ports of the second system boards and that outputs the received third request to at least one of the fourth ports of the second system boards.