Patent ID: 7528482
Filing Date: 2009-05-05
Classification: H01L

Abstract:
1. An embedded chip package with improved heat dissipation performance comprising: a double-sided substrate comprising a dielectric interposer, a first metal foil positioned on a first surface of the dielectric interposer, and a second metal foil directly contacting a second surface of the dielectric interposer; a recessed cavity formed in the second metal foil and the dielectric interposer, and the recessed cavity has a bottom on the first metal foil; a die positioned in the recessed cavity having a bottom contacting thermally with the first metal foil; a build-up material layer covering the second metal foil and an active surface of the die, the build-up material layer filling in the gap between the side of the die and the dielectric interposer; a bonding pad disposed on the active surface of the die; at least one first interconnect layer on the build-up material layer, and the first interconnect layer being directly above the bonding pad; and a first conductive via electrically coupling to the first interconnect layer and the bonding pad; wherein heat generated on the die during operation conducts through the first metal foil to an external environment.