Patent ID: 8019009
Filing Date: 2011-09-13
Classification: H04B,H04L

Abstract:
1. An equalizer circuit, comprising: a first Fourier transform circuit which Fourier-transforms an input signal and outputs a corresponding first Fourier-transformed signal; a first extracting circuit which extracts a plurality of pilot symbols from the first Fourier-transformed signal; an inverse Fourier transform circuit which calculates a complex gain of each path of the input signal by inverse-transforming the plurality of pilot symbols extracted by the first extracting circuit; a detecting circuit which detects at least one of a power value and a mean amplitude of the input signal; a coefficient determining circuit which determines a coefficient corresponding to the at least one of the power value and the mean amplitude detected by the detecting circuit; a second extracting circuit which extracts complex gains having a power larger than a threshold obtained by multiplying the coefficient determined by the coefficient determining circuit by a value obtained by integrating the power for a period of time, wherein the power is obtained from the complex gains of each path of the input signal calculated by the inverse Fourier transform circuit; a second Fourier transform circuit which Fourier-transforms the extracted complex gains from the second extracting circuit to obtain a corresponding second Fourier-transformed signal; and an equalizing calculation circuit which equalizes the input signal using the second Fourier-transformed signal.