Patent ID: 8098394
Filing Date: 2012-01-17
Classification: H04N

Abstract:
1. An image processing circuit for generating processed image data from processing object image data indicative of a processing object image which virtually has a plurality of cells each of which includes a set of M×N pixels in which M pixels are arranged in the X direction and N pixels are arranged in Y direction, the cells are arranged in a plurality of steps and are shifted each other by Dx pixels in the X direction and by Dy pixels in the Y direction, the image processing circuit: comprising: an input raster buffer operable to store (N−1) raster data each of which includes pixel values regarding pixels aligned on one line in the X direction in the processing object image; a data updating circuit to which each of the pixel values included in the raster data is sequentially inputted, the data updating circuit operable to update the raster data in the input raster buffer so as to sequentially replace each of the pixel values in the oldest stored raster data by each of the inputted pixel values; a plurality of cell buffers, each of which is operable to store M×N pixel values regarding one of the cells; a plurality of screen processing circuits, each of which is operable to generate and output partial data for the processed image data by executing a predetermined process for obtaining a center of gravity position of gradation values in the one of the cells from the M×N pixel values stored in one of the cell buffers; and a control circuit operable to execute a control process for sequentially storing pixel values regarding each of cells in k-th step into one of the cell buffers based on the raster data inputted in the data updating circuit and the raster data stored in the input raster buffer when “k·(N−1)+1”-th raster data is inputted to the data updating circuit.