Patent ID: 7392503
Filing Date: 2008-06-24
Classification: B82Y,G03F,H01J

Abstract:
1. A method for correcting a mask pattern, comprising the steps of: inputting an original writer drawing data of a circuit layout pattern; searching out a correcting writer rule that corresponds to the original writer drawing data from a look-up table wherein; and correcting the writer drawing data according to the correcting writer rule to obtain a corrected writer drawing data of the circuit layout pattern, wherein the correcting writer rule is obtained by forming a plurality of testing patterns on a testing mask through a writer and performing in inspection to find a testing pattern that matches the circuit layout pattern, the correcting writer rule includes adding a serif pattern to the corner of the circuit layout pattern and determines the dimension of the serif pattern by the length of the shorter side of the circuit layout pattern and the aspect ratio of the circuit layout pattern.