Patent ID: 6624999
Filing Date: 2003-09-23
Classification: H01L

Abstract:
An electrostatic discharge (ESD) protected circuit, comprising:a first circuit having an output and an operating frequency; an ESD clamp circuit; a first inductor coupled between the output of the first circuit and the ESD clamp circuit, wherein the first inductor has an inductance value such the first inductor has a higher impedance at the operating frequency of the first circuit and a lower impedance at an ESD event, wherein the first circuit has a first and a second output, and the first inductor is coupled between the first output and the ESD clamp circuit; and a second inductor, wherein the second inductor is coupled between the first output and the second output of the first circuit, and the second inductor has an inductance value such that the second inductor has a higher impedance at the operating frequency of the first circuit and a lower impedance at the ESD event.