Patent ID: 6182195
Filing Date: 2001-01-30
Classification: G06F

Abstract:
A multiprocessor computer system supporting memory page migration, comprising:a plurality of nodes each having(a) at least one processor,(b) a cache memory associated with the processor,(c) a portion of memory that can be accessed by multiple requestors located within any of the plurality of nodes, wherein said portion of memory is organized in pages comprising memory blocks, wherein each of said memory blocks has an associated poison state; and(d) a memory controller that maintains coherency between virtual-to-physical translations of said multiple requestors in the system, wherein said controllersets a first poison state for a first one of said memory blocks when a virtual-to-physical memory translation for said first one of said memory blocks is stale, andgenerates an exception in response to an access by one of said multiple requesters to said first one of said memory blocks if said first poison state is set, thereby indicating that said virtual-to-physical memory translation for said first one of said memory blocks is stale,wherein another one of said multiple requesters ascertains that said virtual-to-physical memory translation for said first one of said memory blocks is stale if said another one of said multiple requestors attempts to access said first one of said memory blocks while said first poison state is set.