Patent ID: 9213602
Filing Date: 2015-12-15
Classification: G06F,G11C,H03M

Abstract:
1. An apparatus comprising: a mapping circuit configured to (i) generate a coded item by performing a mapping operation on one or more bits of a write unit using a modulation or a recursion of past-seen bits, and (ii) calculate a particular state to program one or more bits of the coded item into a cell of a nonvolatile memory; and an interface circuit configured to program the cell at the particular state, wherein (i) two normal states of the cell are treated as at least four refined states, (ii) the particular state is one of the refined states, (iii) the mapping operation mitigates write error that shifts an analog voltage of the cell from the particular state to an erroneous state of the refined states, and (iv) a voltage swing between the particular state and the erroneous state is less than a voltage difference between the two normal states.