Patent ID: 6751773
Filing Date: 2004-06-15
Classification: H03M

Abstract:
A coding apparatus comprising:a first shift register for performing bit shifting on an input bit sequence and storing each bit of the input bit sequence in a sequential manner; an input register for storing coefficients of terms of respective orders of a generator polynomial; and a logical operation section for obtaining: logical products of the respective bits stored in the first shift register and corresponding coefficients of terms stored in the input register, a logical product of a next bit of the input bit sequence to be input into the first shift register and a corresponding coefficient of term stored in the input register; and deriving an exclusive logical sum of the logical products obtained; and then outputting the sum as one bit of a code sequence, wherein each time a given bit of the input bit sequence is shifted into said first shift register, said given bit corresponds with a higher order of the coefficients of terms of the generator polynomial stored in said input register.