Patent ID: 9136259
Filing Date: 2015-09-15
Classification: H01L,Y10T

Abstract:
1. A method of forming a die stack, comprising: forming a plurality of through-wafer vias extending through a planar surface of a first die; forming one or more alignment features directly on a first surface of the first die, wherein the first surface comprises the planar surface of the first die, wherein the one or more alignment features are electrically separate from and non-conducting with the through-wafer vias, wherein none of the plurality of through-wafer vias are formed between the one or more alignment features and an edge of the planar surface comprising a die street of the first die, wherein the one or more alignment features comprise at least one protrusion extending from the first die; and creating one or more second alignment features in a second die, wherein the one or more second alignment features comprise a plurality of protrusions extending from the second die, wherein the second alignment features are configured to engage the one or more alignment features of the first die.