Patent ID: 8169029
Filing Date: 2012-05-01
Classification: H01L

Abstract:
1. A high voltage device with constant current source, comprising: a P type silicon substrate ( 1 ), an oxide layer ( 6 ) formed on the front face of the said silicon substrate ( 1 ), a drain metal ( 2 ), a source metal ( 3 ) and a gate metal ( 4 ) which are formed on the front face of the said oxide layer ( 6 ); wherein it is further composed of a P+substrate contact region ( 51 ), an N+drain region ( 52 ) and an N+source region ( 53 ) which are implanted in the said silicon substrate ( 1 ), an N−channel region ( 54 ) connected between the said N+drain region ( 52 ) and N+source region ( 53 ), an N−drain region ( 92 ) enveloping the said N+drain region ( 52 ); several drain through holes ( 82 ) and source through holes ( 83 ) are formed on the said oxide layer ( 6 ); the said drain metal ( 2 ) fills the drain through holes ( 82 ) and connects the said N+drain region ( 52 ); the said source metal ( 3 ) fills the source through holes ( 83 ) and connects the said N+source region ( 53 ) and P+substrate contact region ( 51 ) respectively; the said source metal ( 3 ) and gate metal ( 4 ) are electrically connected by connecting metal ( 34 ), the drain metal ( 2 ) and the source metal ( 3 ) and the gate metal ( 4 ) are in the same plane, the gate metal ( 4 ) is disposed covering above a border of the N+drain region ( 52 ), the N−drain region ( 92 ) and the N+source region ( 53 ).