Patent ID: 6815967
Filing Date: 2004-11-09
Classification: G01R

Abstract:
A burn-in board for testing a plurality of integrated circuit devices disposed in a plurality of cells arranged in a pattern on a tray, the burn-in board comprising:a substrate having an interface surface; a plurality of footprints disposed on the interface surface and arranged substantially congruent with the pattern of cells; wherein each footprint of the plurality of footprints comprises a plurality of electrical contacts, each electrical contact of the plurality of electrical contacts being located on the interface surface and configured for establishing electrical contact with at least one lead extending from one integrated circuit device of the plurality of integrated circuit devices disposed on the tray; wherein at least one footprint of the plurality of footprints includes a socket removably attached to the interface surface and wherein plurality of electrical contacts of the socket of the at least one footprint exhibits a first contact pattern and wherein the socket of the at least one footprint is replaceable with another socket including a plurality of contacts exhibiting a second contact pattern different than the first contact pattern.