Patent ID: 6300201
Filing Date: 2001-10-09
Classification: H01L

Abstract:
A method of fabricating a metal oxide semiconductor field effect, (MOSFET), device, on a semiconductor substrate, comprising the steps of:forming a well region, in said semiconductor substrate;growing a silicon oxide layer on said semiconductor substrate;forming a disposable gate structure, on said silicon oxide layer;forming a lightly doped source/drain region, in an area of said semiconductor substrate not covered by said disposable gate structure;forming insulator spacers on the sides of said disposable gate structure, removing portions of said silicon oxide layer not covered by said disposable gate structure, or by said insulator spacers;forming a heavily doped source/drain region in an area of said semiconductor substrate not covered by said dummy gate structure or by said insulator spacers;forming a metal silicide layer on the top surface of said heavily doped source/drain region;depositing an interlevel dielectric layer;planarizing said interlevel dielectric layer, exposing the top surface of said dummy gate structure;selectively removing said dummy gate structure, resulting in an opening, created in said interlevel dielectric layer, and in said insulator spacers, exposing a region of said semiconductor substrate to be used for MOSFET channel region;forming a threshold adjust region in a top portion of said MOSFET channel region;forming a anti-punchthrough region in a bottom portion of said MOSFET channel region;forming a gate insulator layer on the top surface of said MOSFET channel region, exposed in said opening; andforming a gate structure, on said gate insulator layer, in said opening.