Patent ID: 8211805
Filing Date: 2012-07-03
Classification: H01L

Abstract:
1. A method for forming a via, comprising: providing a substrate, comprising: a first dielectric layer over the substrate; a first conductive structure in the first dielectric layer; and a second dielectric layer over the first dielectric layer and the conductive structure; performing a first etching step by using a first etching recipe for forming a first via in the second dielectric layer; and performing a second etching step by using a second etching recipe for forming a second via under the first via, wherein the second via exposes at least a top surface of the conductive structure, and an etching rate of the second etching step is slower than an etching rate of the first etching step, wherein the second etching step for forming the second via is performed on the first dielectric layer and the second dielectric layer such that the second via has a tapered bottom exposing a side wall of the conductive structure, and wherein an angle between a tangent of the tapered bottom of the second via at the side wall of the conductive structure and the side wall is 45-100° and a depth of the first via is 30-80% of a thickness of the second dielectric layer.