Patent ID: 6566201
Filing Date: 2003-05-20
Classification: H01L

Abstract:
A method of forming a high voltage semiconductor device comprising the steps of:A. providing a substrate of a first or second conductivity type; B. forming a voltage sustaining region on said substrate by: 1. depositing an epitaxial layer on the substrate, said epitaxial layer having a first conductivity type; 2. forming at least one trench in said epitaxial layer; 3. depositing a barrier material along the walls of said trench; 4. implanting a dopant of a second conductivity type through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of said trench; 5. diffusing said dopant to form a first doped layer in said epitaxial layer; 6. removing the barrier material from at least the bottom of the trench; 7. etching the trench through the first doped layer to a greater depth and repeating steps (B.3)-(B.5) to form a second doped layer vertically below said first doped layer; 8. removing the barrier material from surfaces of the trench; 9. depositing a diffusion facilitating material along the walls of the trench, said implanted dopant having a higher diffusion coefficient in the deposited material than in the epitaxial layer of the voltage sustaining layer; 10. diffusing said dopant into the diffusion facilitating material so that said dopant diffuses into sidewalls of the trench between said first and second doped layers; 11. depositing a filler material in said trench to substantially fill said trench; and C. forming above but in contact with said voltage sustaining region at least one region of said second conductivity type.