Patent ID: 8037385
Filing Date: 2011-10-11
Classification: G01R

Abstract:
1. An apparatus, comprising: a chain of serially coupled clocked circuits, wherein in a first mode of operation, each of the clocked circuits toggles in response to a rising edge of a clock signal and in a second mode of operation, a first set of the clocked circuits in the chain of serially coupled clocked circuits toggle in response to a rising edge of an inverted clock signal and a second set of the clocked circuits in the chain of serially coupled clocked circuits toggle in response to the rising edge of the clock signal; input logic configured to provide the clock signal or the inverted clock signal to the first set of the clocked circuits based on a control signal, wherein the control signal is indicative of the first mode of operation or the second mode of operation; and selection logic configured to provide an output signal of the first set of the clocked circuits or a data input signal to an input of the second set of the clocked circuits based on the control signal.