Patent ID: 8368418
Filing Date: 2013-02-05
Classification: G01R,G11C

Abstract:
1. A test apparatus configured to test a plurality of identical circuit components included in at least one test target device, and to judge whether or not test target data output from the plurality of identical circuit components match an expected value, the test apparatus comprising: a plurality of test pins configured to receive, as input data, the test target data output from the plurality of identical circuit components; and a plurality of logical comparators each of which is configured to be assigned to a test pin selected from among the plurality of test pins, and configured to judge whether or not the test target data input to the test pin thus assigned matches the expected value; and a plurality of multiplexers where are respectively provided for the plurality of logical comparators, and which are configured to receive a plurality of data input via the plurality of test pins, to select one from among the multiple data thus input, and to output the data thus selected to the a respective one of the plurality of logical comparators; wherein the plurality of identical circuit components respectively include corresponding terminals, data output from the corresponding terminals of the plurality of identical circuit components are test target data for the same test item, and the corresponding terminals of the plurality of identical circuit components are connected to corresponding ones of the plurality of test pins in the same manner, wherein multiple n logical comparators are assigned to each test pin, n being the number of identical circuit components in the plurality of identical circuit components; and wherein, when a given identical circuit component outputs the test target data, the logical comparator assigned to this identical circuit component is operated.