Patent ID: 6566210
Filing Date: 2003-05-20
Classification: H01L

Abstract:
A method of forming a Si-based metal-insulator-semiconductor (MIS) transistor comprising the steps of:(a) forming a structure comprising a patterned Si-containing semiconductor polycrystalline region with grains of less than about 0.1 &mgr;m on a surface of a gate dielectric, said structure is formed by the steps of: forming said gate dielectric on a surface of a Si-containing substrate; forming a layer of Si-containing semiconductor polycrystalline material on said gate dielectric; applying a resist to said layer of Si-containing semiconductor polycrystalline material; exposing said resist to a pattern of radiation; developing the pattern in said resist; and transfering said pattern to said Si-containing semiconductor polycrystalline material via an etching step; (b) subjecting said structure to a sidewall oxidation process in which atomic oxygen is employed so as to oxidize a portion of said Si-containing semiconductor polycrystalline region; (c) implanting dopant ions into said Si-containing substrate and said Si-containing semiconductor polycrystalline region; and (d) activating said dopant ions.