Patent ID: 7436680
Filing Date: 2008-10-14
Classification: H01L

Abstract:
1. A multi-chip build-up package of an optoelectronic chip, comprising: a metal carrier; an IC chip disposed on the metal carrier and having a plurality of first electrodes; a first dielectric layer formed on the metal carrier to cover the IC chip and expose the first electrodes; a first wiring layer formed on the first dielectric layer and electrically connected to the first electrodes; an optoelectronic chip disposed above the first dielectric layer and having a plurality of second electrodes and an optoelectronic working region; a second dielectric layer formed above the first dielectric layer to partially cover the optoelectronic chip and expose the second electrodes and the optoelectronic working region; a plurality of conductive elements electrically connected to the first wiring layer and exposed outside the second dielectric layer; and a transparent conductive substrate disposed on the second dielectric layer and the optoelectronic chip, and electrically connected to the conductive elements and the second electrodes.