Patent ID: 9214806
Filing Date: 2015-12-15
Classification: H01L,H02H

Abstract:
1. An ESD protecting circuit, comprising: a first voltage pad; a second voltage pad; an I/O pad; a first ESD protecting module, comprising a first terminal coupled to the first voltage pad, and comprising a second terminal; a MOS transistor, comprising a first terminal coupled to the second terminal of the first ESD protecting module, comprising a second terminal coupled to the I/O pad, and comprising a control terminal for receiving a control signal, wherein none of the first terminal and the second terminal is directly connected to a power or a ground level; a second ESD protecting module, comprising a first terminal coupled to the first terminal of the MOS transistor, and comprising a second terminal coupled to the second voltage pad; and an ESD detecting circuit, for detecting if an ESD voltage exists, for generating the control signal to control the MOS transistor to be conductive when an ESD voltage is detected and to control the MOS transistor to be nonconductive when the ESD voltage is not detected.