Patent ID: 7491992
Filing Date: 2009-02-17
Classification: H01L

Abstract:
1. A structure fabrication method, comprising the steps of: providing a semiconductor substrate; forming a charge collection well in the semiconductor substrate, the charge collection well comprising dopants of a first doping polarity; forming a surface pinning layer in the charge collection well, the surface pinning layer comprising dopants of a second doping polarity opposite to the first doping polarity; forming an electrically conductive push electrode being in direct physical contact with the surface pinning layer but not being in direct physical contact with the charge collection well; forming a transfer transistor on the semiconductor substrate, exposing the charge collection well to light resulting in free charged particles in the charge collection well; and applying a first voltage potential and a second voltage potential to the electrically conductive push electrode and the semiconductor substrate, respectively, the first voltage potential being different from the second voltage potential, resulting in an electric force that tends to push the free charged particles away from the push electrode.