Patent ID: 7913001
Filing Date: 2011-03-22
Classification: G06F,H04L

Abstract:
1. A method comprising: a) receiving in parallel a plurality of symbol sequences in a first integrated circuit (IC) device, the symbol sequences having been transmitted by a second IC device over a serial point to point link, wherein each symbol sequence includes an instance of a first non-data symbol; b) buffering the plurality of symbol sequences to compensate for tolerances allowed for a transmit clock of the second IC device and a receive clock of the first IC device; c) reducing skew among the plurality of buffered symbol sequences by inserting an instance of a second, different non-data symbol into one but not all of the buffered plurality of symbol sequences immediately preceding an instance of the first non-data symbol; and d) prior to c), asserting a first deskew enable control signal, and, after c), reducing skew among the plurality of buffered symbol sequences by asserting a second, different deskew enable control signal; and then inserting an instance of the second non-data symbol into one of the buffered plurality of symbol sequences immediately following an instance of the first non-data symbol, after detecting the combination of an instance of the first non-data symbol followed by an instance of the second non-data symbol in one but not all of the plurality of symbol sequences.