Patent ID: 8245173
Filing Date: 2012-08-14
Classification: G06F

Abstract:
1. A computer-implemented method of generating a schedule for parallel processing of placement computations for movebounds of an integrated circuit design having associated placeable objects, comprising: receiving a list of the movebounds and placeable objects associated with the movebounds by executing first instructions in the computer system; first determining that a total number of movebounds in the design is large by executing second instructions in the computer system to compare the total number of the movebounds to a threshold number of movebounds; second determining that an average number of placeable objects per movebound in the design is large by executing third instructions in the computer system to compare the average number of placeable objects per movebound to a threshold number of objects per movebound; and in response to said first and second determining, creating a schedule which balances the placeable objects and the movebounds amongst host processors of a computer system by executing fourth instructions in the computer system to storing the schedule in a memory device of the computer system by executing fifth instructions in the computer system.