Patent ID: 6395586
Filing Date: 2002-05-28
Classification: H01L

Abstract:
A method for fabricating a high aperture ratio thin film transistor (TFT) structure comprising the steps of:providing a glass substrate, forming a metal gate on said substrate, depositing gate nitride, intrinsic amorphous silicon and n+ amorphous silicon layers sequentially on said substrate embedding said metal gate, depositing a metal layer on said n+ amorphous silicon layer, patterning and etching said metal layer to expose said n+ amorphous silicon layer in an opening for a back channel, defining an amorphous silicon island by a dry etching method and over-etching said gate nitride layer by at least 20% of its original thickness, etching said n+ amorphous silicon layer on said back channel to expose the intrinsic amorphous silicon layer, depositing a passivation nitride layer on top of said TFT structure, etching away a portion of said passivation nitride layer in said back channel, and said passivation nitride and gate nitride layers in a first contact opening for said substrate by a first etch recipe, etching away a portion of said intrinsic amorphous silicon layer in said back channel not covered by said passivation nitride layer by a second etch recipe, depositing an organic polymer layer on top of the TFT structure and forming a second contact opening to said metal layer, and depositing a transparent electrode layer on top of the TFT structure and into said second contact opening with said organic polymer layer insulating said transparent electrode from other layers.