Patent ID: 7518917
Filing Date: 2009-04-14
Classification: G11C

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a latch configured to store data; a plurality of word lines; a driver configured to activate one of the plurality of word lines; and a plurality of nonvolatile memory cells coupled to the respective word lines, each of the nonvolatile memory cells coupled to the latch so as to exchange stored data with the latch upon activation of a corresponding one of the word lines, each of the nonvolatile memory cells including two MIS transistors and configured to store data as an irreversible change of transistor characteristics occurring in one of the two MIS transistors, wherein the driver includes at least one nonvolatile memory cell storing count data responsive to a number of times storing of data has been performed with respect to the plurality of nonvolatile memory cells, and is configured to activate one of the word lines indicated by the count data.