Patent ID: 6128697
Filing Date: 2000-10-03
Classification: G11C

Abstract:
A selectively updateable mapped data storage system capable of mapping between a first set of data and a second set of data in a one-to-one manner, which storage system comprises:an address decoder for decoding an address signal;a first improved CAM block for storing the first set of data which can be accessed by the decoded address data from the address decoder, the first improved CAM block generating a first match drive signal when a first set of memory data is stored therein;a second improved CAM block for storing the second set of data which can be accessed by the first match drive signal from the first improved CAM block, the second improved CAM block generating a second match drive signal when a second set of memory data is stored therein, and the second match drive signal is transferred to the first improved CAM block in order to access the first set of data, which are mapped to the second set of data, anda converter, coupled between the first and second improved CAM blocks, for transferring the first and second match drive signals between the first and second improved CAM blocks.