Patent ID: 7924887
Filing Date: 2011-04-12
Classification: H04J,H04L

Abstract:
1. A method for improving clock stability, comprising: determining whether a difference between a current sender timestamp (ST) and a current receiver timestamp (RT) is a mutated value, wherein a mutated value occurs when a value for the difference and an average value for the difference exceed a predetermined range but subsequent values of the difference and the average value for the subsequent values of the difference do not exceed the predetermined range; replacing the difference between the current ST and the current RT with an average difference between ST and the RT, if the difference between the current ST and current RT is a mutated value; computing a new average difference between ST and the RT according to the replaced difference between the current ST and the current RT; and acquiring a service clock according to the current ST, the current RT and the new average difference between ST and the RT.