Patent ID: 7135908
Filing Date: 2006-11-14
Classification: H03K

Abstract:
1. A circuit comprising: signal input (IN) for receiving an input signal (s(t)), a digital input stage ( voltage limiting means (B) being arranged between the signal input (IN) and the input (IINV) for limiting voltages at the input (IINV) to the supply voltage (VDD), the voltage limiting means (B) comprising: means for over-voltage protection (A) being situated between the signal input (IN) and the supply voltage (VDD), the means for over-voltage protection (A) comprising at least one active circuit element which functions so as to mimic at least a breakdown part of a zener function, and speed boost means (C) having at least one capacitive element (Cb) speeding up the turn-on/turn-off behavior of the input switch (ns).