Patent ID: 7687803
Filing Date: 2010-03-30
Classification: G01R,H01L

Abstract:
1. A semiconductor device comprising: a semiconductor chip; and a wiring substrate, having a mounting surface for mounting said semiconductor chip and a terminal surface having a plurality of wiring terminals, said terminal surface on a side opposite that of said mounting surface, said wiring substrate configured to be electrically connected to said semiconductor chip said plurality of wiring terminals comprising: a plurality of test terminals configured to be arranged closely to each other, provided such that said semiconductor chip is connectable to an external test device through at least one terminal of said plurality of test terminals during testing of said semiconductor chip; and a plurality of non-test terminals arranged apart from said plurality of test terminals provided such that said semiconductor chip is connectable to an external non-test device during normal operation of said semiconductor chip through said plurality of non-test terminals, wherein each of said plurality of test terminals is not configured to connect to said test device through a metal ball, while each of said plurality of non-test terminals is configured to connect to said non-test device through a metal ball.