Patent ID: 9204839
Filing Date: 2015-12-08
Classification: A61B,H01L,Y02E

Abstract:
1. A device, comprising: a layered structure in Si configured to form Si Vias for hermetically sealed electrical connectivity between two sets of devices, which are realized on at least two Si layers of a Si-on-insulator substrate, wherein the Si-on-insulator substrate is comprised of a first Si layer and a second Si layer separated by a first SiO2 layer serving as an insulator, wherein the Ohmic contact is deposited with a metal pad selected from a biocompatible non-corrosive metal selected from Au, Pt, and Pd, and wherein the second Si layer side opposite to the first SiO2 layer is deposited with a passivation insulator layer selected from SiO2, HfO2, SiN, and Al2O3, and wherein the passivation insulator layer is patterned to expose second Si layer which is deposited with electrodes to form biosensors, electronic circuits, optoelectronic circuits, ultrasonic transducers and other devices that operate electrically, wherein the top side of the Si pillars are deposited with a metal providing Ohmic contact, and wherein the metal is selected from gold, arsenic doped gold, aluminum, Pt, Pd, TiN, and TaN, and wherein the Ohmic contact is deposited with a metal pad selected from Au, Pt, Pd, and wherein the metal pads on top side of Si pillars are connected to devices selected from electronic, photonic, optoelectronic, and micro-electro-mechanical realized in first Si layer.