Patent ID: 6205515
Filing Date: 2001-03-20
Classification: G11C

Abstract:
A method of accessing a memory array including a plurality of blocks of columns each block sensing data independently, wherein said each block has an associated accessing address and each column has an associated accessing address, and wherein each of said plurality of blocks has an associated access time factor relating to its relative position in said memory array which determines the speed at which select signal are made available to said each block, said method comprising the steps of:including in one of said plurality of blocks a set of redundant columns, wherein said one block has the fastest access time factor than any other of said plurality of blocks;accessing said array with non-defective column input addresses each having an associated decoded block select address and a decoded column select address wherein data is accessed from said array at said non-defective input address associated decoded block and column select addresses;accessing said array with defective column input addresses each having an associated decoded block select address and column select address wherein data is accessed from one of said set of redundant columns in said one block instead of said defective column input addresses' associated decoded block and column select address; andwherein said step of accessing with said array with said defective column input addresses and said step of accessing said array with said non-defective column input addresses comprises the steps of comparing one of said defective column and non-defective column input addresses to at least one pre-programmed repair block and column address to generate a match signal, said match signal having a first state indicating that no match exists and a second state indicating a match exists.