Patent ID: 7880558
Filing Date: 2011-02-01
Classification: H03F

Abstract:
1. A distributed power amplifier comprising: an off-chip output transmission line having a first load impedance at a summing junction; at least one off-chip component, coupled between the off-chip output transmission line and at least one on-chip component, the at least one on-chip component coupled to an output of a power transistor, wherein the off-chip component provides an offset to the first load impedance such that a second load impedance at an output of a power transistor converges to the first load impedance of the distributed amplifier, the off-chip component including at least one of a transmission line component and an inductive component, the at least one of the transmission line component and a capacitive component providing a first sub-offset to the first load impedance so that the first load impedance diverges away from a desired load impedance of the distributed amplifier; and a plurality of sections, each section having a plurality off-chip components coupled to the transmission line, wherein the inductive component provides a second sub-offset to the first load impedance so that the first load impedance moves to an optimized pre-biased location such that constituent movements of the on-chip components move and re-converge the second set of load impedances, over frequency, close to the desired load impedance at each section of the distributed amplifier.