Patent ID: 6602781
Filing Date: 2003-08-05
Classification: H01L

Abstract:
A method for forming a semiconductor structure comprising the steps of:forming a precursor having a substrate with active regions separated by a channel, and a temporary gate over the channel and between dielectric structures; removing the temporary gate to form a recess with a bottom and sidewalls between the dielectric structures; depositing a gate dielectric formed of oxynitride in the recess on the bottom and sidewalls; depositing a metal over the gate dielectric and on the dielectric structures; removing the metal except for a portion in the recess; depositing amorphous silicon over the metal and on the dielectric structures; annealing to cause the amorphous silicon and the portion of the metal in the recess to react to form a self-aligned metal suicide gate; and planarizing to remove the amorphous silicon on the dielectric structures.