Patent ID: 7098129
Filing Date: 2006-08-29
Classification: C23C,H01L

Abstract:
1. A method for forming an interlayer insulation film for multilayer interconnect of a semiconductor integrated circuit, comprising the steps of: forming a first insulation film on a substrate in a reactor by plasma CVD using a first source gas comprising a silicon-containing hydrocarbon gas; continuously forming a second insulation film on the first insulation film in the same reactor at a thickness less than the first insulation film in situ by plasma CVD using a second source gas comprising a silicon-containing hydrocarbon gas and an oxidizing gas under a pressure of 3 Torr or less which is lower than a pressure used for the formation of the first insulation film; and subjecting the second insulation film to polishing for forming a subsequent layer thereon wherein the first insulation film has a hardness of less than 6 GPa, and the second insulation film has a hardness of no less than 6 GPa.