Patent ID: 7709884
Filing Date: 2010-05-04
Classification: G11C,H01L

Abstract:
1. Nonvolatile two-transistor semiconductor memory cell comprising: a memory transistor having a predetermined threshold voltage, the memory transistor having source and drain regions with a channel region lying in between in a substrate which has a semiconductor material with a doping of a first conduction type, a first memory transistor insulation layer, a charge storage layer, a second memory transistor insulation layer and a memory transistor control layer being formed at the surface of the channel region of the memory transistor; and a selection transistor having a predetermined threshold voltage, the selection transistor having source and drain regions with a channel region lying in between in the substrate, a first selection transistor insulation layer and a selection transistor control layer being formed at the surface of the channel region of the selection transistor, characterized in that the selection transistor control layer has a semiconductor material with a doping of the first conduction type, and the charge storage layer has a semiconductor material with a doping of a second conductivity type which is opposite to the first conduction type, the first conduction type doping level of the selection transistor control layer being selected to compensate a threshold raising in the selection transistor.