Patent ID: 7800177
Filing Date: 2010-09-21
Classification: H01L

Abstract:
1. A thin film transistor (TFT) plate, comprising: a substrate; a semiconductor layer formed on the substrate and including a lightly doped region adjacent to both sides of a channel region, and a source region and a drain region adjacent to the lightly doped region; a gate electrode formed on the channel region of the semiconductor layer; a first gate insulating layer formed between the semiconductor layer and the gate electrode; a second gate insulating layer formed between the first gate insulating layer and the gate electrode and having sidewalls with upper portions having boundaries that are substantially aligned with the gate electrode and lower portions having boundaries that are substantially aligned with a boundary portion between the lightly doped region and the source region and a boundary portion between the lightly doped region and the drain region; an interlayer insulating layer formed on the gate electrode, the first gate insulating layer, and the second gate insulating layer; and a source electrode and a drain electrode formed on the interlayer insulating layer, the source electrode electrically connected to the source region through a first contact hole and the drain electrode electrically connected to the drain region through a second contact hole, wherein boundaries of lower portions of sidewalls of the gate electrode completely contact boundaries of the upper portions of the sidewalls of the second gate insulating layer.