Patent ID: 9082723
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor package, comprising the steps of: forming a first circuit layer on a carrier; forming a first dielectric layer on the carrier for encapsulating the first circuit layer, wherein the first dielectric layer has a first surface adjacent to the carrier and a second surface opposite to the first surface; forming in the first dielectric layer a cavity penetrating the first and second surfaces of the first dielectric layer; forming at least an adhesive member in the cavity of the first dielectric layer; disposing an electronic element on the adhesive member; forming a second dielectric layer on the first dielectric layer and in the cavity to encapsulate the electronic element and the adhesive member; forming a second circuit layer on the second dielectric layer and forming a plurality of conductive vias in the second dielectric layer for electrically connecting the second circuit layer and the electronic element; and removing the carrier.