Patent ID: 7423573
Filing Date: 2008-09-09
Classification: H03H,H03M

Abstract:
1. A digital to analog converter comprising: a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on said input signal, said first continuous-time stage outputs a first output signal; a second switched-capacitor stage that receives said first output signal and performs switched-capacitor filtering on said first output signal, said second switched-capacitor stage outputs a continuous analog signal associated with said digital signal; a digital modulator that receives said digital signal having a lower-sample-rate wide-bit-width data and provides a third output signal having a high-sample-rate small-bit-width; and a scrambler that receives said third output signal and outputs a fourth output signal by selecting a different combination of data units on a pseudo-random basis to achieve the desired signal current to drive the first continuous-time stage.