Patent ID: 7573290
Filing Date: 2009-08-11
Classification: G11C

Abstract:
1. A data input/output driver for use in a semiconductor memory device, comprising: a data transmitting block for transmitting data between an inside and an outside of the semiconductor memory device, and generating, when sensing the data transmitted through the data transmitting block, a first timing control signal when the data has a logic high level and a second timing control signal when the data has a logic low level; a reference data generating block for generating a reference data including a first reference signal having a first stable period and a first stable voltage level corresponding to a logic high level data, and a second reference signal having a second stable period and a second stable voltage level corresponding to a logic low level data; and a switching block for selectively transferring the first and second reference signals into a node as an output signal wherein the switching block transfers the first reference signal into the node in response to the first timing control signal, and transfers the second reference signal into the node in response to the second timing control signal, wherein the first reference signal provides the first stable voltage level to the node as the output signal during an entire period when the output signal has the logic high level, and the second reference signal provides the second stable voltage level to node as the output signal during an entire period when the output signal has the logic low level.