Patent ID: 8294191
Filing Date: 2012-10-23
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a first stacked structure body including a plurality of first electrode films and a plurality of first inter-electrode insulating films alternately stacked in a first direction; a second stacked structure body adjacent to the first stacked structure body in a second direction perpendicular to the first direction including a plurality of second electrode films and a plurality of second inter-electrode insulating films alternately stacked in the first direction; a first semiconductor pillar piercing the first stacked structure body in the first direction; a second semiconductor pillar piercing the second stacked structure body in the first direction; a semiconductor connection portion connecting one end of the first semiconductor pillar and one end of the second semiconductor pillar; a first connection portion conductive layer opposed to a first portion of the semiconductor connection portion on the first semiconductor pillar side; a second connection portion conductive layer opposed to a second portion of the semiconductor connection portion on the second semiconductor pillar side; a first pillar portion memory layer provided between the plurality of first electrode films and the first semiconductor pillar; a second pillar portion memory layer provided between the plurality of second electrode films and the second semiconductor pillar; a first connection portion memory layer provided between the first connection portion conductive layer and the semiconductor connection portion; and a second connection portion memory layer provided between the second connection portion conductive layer and the semiconductor connection portion.