Patent ID: 8250307
Filing Date: 2012-08-21
Classification: G06F

Abstract:
1. A method of data processing in a data processing system having a system memory controlled by a memory controller, said method comprising: the memory controller receiving a prefetch load request from a processor core of the data processing system, wherein the prefetch load request identifies a line of data; in response to receipt of the prefetch load request, the memory controller determining by reference to a stream of demand requests how much data is to be supplied to the processor core in response to the prefetch load request, wherein the determining includes electing to provide less than all of the line of data in response to the prefetch load request if the line of data identified by the prefetch load request is in a same row of the system memory as that accessed by a demand request concurrently being serviced by the memory controller and electing to provide none of the line of data in response to the prefetch load request if the line of data identified by the prefetch load request is not in the same row of the system memory as that accessed by the demand request concurrently being serviced by the memory controller; and in response to the memory controller determining to provide less than all of the identified line of data, providing less than all of the identified line of data to the processor core.