Patent ID: 7071097
Filing Date: 2006-07-04
Classification: H01L

Abstract:
1. A method for fabricating an interconnect dual damascene structure which comprises: a) providing a layer of at least one dielectric on a substrate surface; b) depositing on the layer of the at least one dielectric, a mask forming layer for providing a via-level mask layer; c) creating an elongated via pattern in the via-level mask layer; wherein said elongated via pattern is elongated in the orthogonal direction to a subsequently to be formed line level pattern; d) depositing a layer of line-level dielectric; e) creating a line pattern through the layer of line-level dielectric; f) transferring the line pattern through the projected intersection of the elongated via-level pattern and of the line-level pattern to generate an aligned dual damascene structure, which is self aligned in said orthogonal direction; g) depositing a conductive liner layer and then filling the dual damascene structure with a conductive fill metal to form a set of metal lines; and h) planarizing the metal and liner layers so that the metal is coplanar with the top of layer of at least one dielectric on the substrate surface.