Patent ID: 7687842
Filing Date: 2010-03-30
Classification: H01L

Abstract:
1. A bit line structure comprising a substrate containing a trench, the trench having a bottom and sidewall portions extending from the bottom along the length of the trench; a first trench insulating layer disposed at the bottom of the trench and at least portions of the sidewall of the trench; a first trench filling layer disposed at a surface of the first trench insulating layer and fills a majority of the trench and forms a surface that is entirely planar, the entire surface of the first trench filling layer being substantially perpendicular to the length of the trench and bounded by the first trench insulating layer disposed at the sidewall of the trench; a second trench insulating layer disposed on the surface of the first trench filling layer, the second trench insulating layer forming a surface that is entirely planar, the second trench insulating layer covers entirely the surface of the first trench filling layer; a second electrically conductive trench filling layer forming a buried bit line which is at least partly formed at the surface of the second trench insulating layer and fills an upper section of the trench up to a surface of the substrate; first and second doping regions of a first conduction type, which are disposed in the substrate, portions of the first and second doping regions being directly adjacent to the first trench insulating layer; a first electrically conductive connection layer that electrically connects the first doping region to the second trench filling layer and is directly adjacent to the first doping region, the first trench insulating layer, and the second trench filling layer; a surface dielectric disposed at the surface of the substrate and the filled trench; a surface bit line disposed at a surface of the surface dielectric; and a second connection layer in the surface dielectric, the second connection layer connecting the surface bit line to the second doping region.