Patent ID: 6373424
Filing Date: 2002-04-16
Classification: H03M

Abstract:
An apparatus, comprising a pipelined analog-to-digital converting circuit which includes first and second stages that each have an analog input, an analog output, and a multi-bit digital output, said analog input of one of said first and second stages being coupled to said analog output of the other of said first and second stages, and said first stage including:an analog-to-digital converter responsive to said analog input of said first stage for generating a multi-bit digital output that is based on said analog input of said first stage and that serves as said multi-bit digital output of said first stage; a shuffler having a plurality of inputs and a plurality of outputs, each said input of said shuffler having applied thereto a respective one of a plurality of switching signals derived from said multi-bit digital output of said analog-to-digital converter, said shuffler being operative to couple each said input thereof to a respective said output thereof according to a mapping function, and being further operative to dynamically vary said mapping function so as to dynamically vary which of said inputs thereof is coupled to which of said outputs thereof; and circuitry for generating an analog residue signal which represents a difference between a magnitude corresponding to said analog input of said first stage and a magnitude corresponding to said multi-bit digital output of said analog-to-digital converter, said circuitry including a plurality of circuit portions which can each be selectively switched to one of first and second states under control of a respective signal received from a respective one of said outputs of said shuffler, said first and second states being different, and said analog residue signal serving as said analog output of said first stage, and having a magnitude which is a function of the number of said circuit portions which are switched so as to be in said first state.