Patent ID: 6400185
Filing Date: 2002-06-04
Classification: G05F

Abstract:
A transconductance bias circuit comprising:a differential pair having a first transistor and a second transistor; a resistor coupled between a gate of the first transistor and a gate of the second transistor, the gate of the first transistor is coupled to a reference voltage node; a third transistor coupled to the first transistor; and having a gate coupled to the gate of the third transistors a fourth transistor coupled to the second transistor the gates of the third and fourth transistors being coupled to a control voltage; a fifth transistor coupled to the third transistor, a gate of the fifth transistor is coupled to the reference voltage node; a sixth transistor coupled to the fourth transistor, a gate of the sixth transistor is coupled to the reference voltage node; and a current mirror coupled to the fifth and sixth transistor and resistor and having, and a seventh transistor coupled to the fourth transistor, a current in the seventh transistor is equal to a current in the resistor.