Patent ID: 6153456
Filing Date: 2000-11-28
Classification: H01L

Abstract:
A method, comprising:(a) forming an oxide layer on a semiconductor substrate;(b) establishing a polysilicon layer on the oxide layer, the polysilicon layer being doped with a first dopant to enhance electrical conductivity;(c) defining a transistor having a source region, a drain region, and a gate structure, the gate structure being positioned between the source region and drain region along the substrate, the gate structure being formed from a portion of the polysilicon layer and a pad of the oxide layer;(d) implanting a second dopant in the source region, the drain region, and an upper part of the polysilicon portion of the gate structure, the upper part being positioned above the drain region and source region, the second dopant being provided in the form of a different dopant species than the first dopant;(e) depositing a coating on the source region, the drain region, and the gate structure;(f) etching away the upper part of the gate structure to substantially remove the second dopant therefrom; and(g) heating the transistor to activate the second dopant.