Patent ID: 9029227
Filing Date: 2015-05-12
Classification: H01L

Abstract:
1. A method comprising: forming a dummy gate stack on a substrate; forming a first layer of a narrow bandgap material on the substrate by selective epitaxial growth, on each side of the dummy gate stack; forming spacers on the first layer; forming raised source/drains; removing the dummy gate stack, subsequent to forming the raised source/drains, forming a cavity between the spacers; and forming a memory gate stack in the cavity recess etching the first layer, leaving only the portion under the spacers; forming a second layer, by selective epitaxial growth on the substrate, adjacent the first layer and to substantially the same thickness as the first layer; and subsequently forming the raised source/drains by deep source/drain implantation in the second layer, wherein forming the second layer of a wide bandgap material.