Patent ID: 6617909
Filing Date: 2003-09-09
Classification: H03K,H03L

Abstract:
A phase blender, comprising:first and second phase delay units for respectively inputting first and second input voltages having a certain phase difference from each other, and outputting first and second output voltages having phases corresponding to phases of the first and second input voltages respectively; an intermediate phase output unit having a pair of first inverters for inputting the first and second input voltages, respectively, the output ports of the first inverters being mutually connected, and a pair of second inverters for inputting the output voltages of the first inverters and outputting third and fourth output voltages, respectively; and an output selection unit having a first multiplexer for selectively outputting the first and third output voltages, and a second multiplexer for selectively outputting the second and fourth output voltages, wherein the first and second inverters each include PMOS and NMOS transistors which perform mutually opposite switching operations according to the magnitudes of the voltages inputted to the gates thereof, and the first and second input voltages are inputted to the gates of the PMOS and NMOS transistors, whereby the third and fourth output voltages have an intermediate phase between the phases of the first and second output voltages.