Patent ID: 6965141
Filing Date: 2005-11-15
Classification: H01L

Abstract:
1. A ferroelectric memory, comprising: a transistor formed in one region on a semiconductor substrate; a conductive layer formed in another region on the semiconductor substrate; a first interlayer insulating film formed on the semiconductor substrate including the transistor and the conductive layer; a capacitor lower electrode formed on the first interlayer insulating film; a capacitor insulative film made of a ferroelectric film and formed on the capacitor lower electrode; a capacitor upper electrode formed on the capacitor insulative film; a conductive hydrogen barrier film formed on the capacitor upper electrode so as to extend beyond an area of the capacitor upper electrode; a second interlayer insulating film formed on the first interlayer insulating film including the conductive hydrogen barrier film; a wiring formed on the second interlayer insulating film; a first plug formed through the first interlayer insulating film so as to connect the transistor and the capacitor lower electrode to each other; a second plug formed through the first interlayer insulating film so as to electrically connect the conductive layer and the conductive hydrogen barrier film to each other; and a third plug formed through the first interlayer insulating film and the second interlayer insulating film so as to connect the conductive layer and the wiring to each other.