Patent ID: 8081142
Filing Date: 2011-12-20
Classification: G06F,G09G

Abstract:
1. A memory device for driving a display panel comprising: arrays of memory cells storing binary information; pairs of bit line-bit bar line connected to the memory cells; first transfer gates connected to one end of the bit line-bit bar line pairs and switched by first signals to write the binary information into the memory cells; second transfer gates connected to the other end of bit line-bit bar line pairs and switched to read out the binary information stored in the memory cells; and data buffers to receive the read-out binary information of the memory cells from the second transfer gates, by the switching operation of the second transfer gates and to store the read-out binary information, wherein the second transfer gates are switched by second signals which are derived from a single enable signal and divided into several groups, each group of the second signals having a different time delay, wherein the second signals of each group switch the second transfer gates of a corresponding group to allow the binary information to be transferred from the memory cells to the data buffers through the switched second transfer gates of the corresponding group.