Patent ID: 6184738
Filing Date: 2001-02-06
Classification: H03K

Abstract:
An input buffer of a semiconductor device in which a first potential between first and second power supply potentials or a second potential between said first power supply potential and said first potential is supplied as an external reference potential, an external signal formed of a low amplitude logic signal overlapping said first or second potential is supplied, said external signal is compared with said external reference potential, and an internal signal according to a result of the comparison is supplied to an internal circuit, comprising:signal conversion means for converting said external signal formed of said low amplitude logic signal overlapping said first or second potential to a signal formed of a complementary signal of said low amplitude logic signal overlapping said second or first potential;potential conversion means for converting said first or second potential supplied as said external reference potential to said second or first potential;first and second transistors serially connected between a first node and a line of said second power supply potential, with an input electrode of one transistor receiving said external reference potential, and an input electrode of the other transistor receiving an output signal from said signal conversion means;third and fourth transistors serially connected between a second node from which said internal signal is output and a line of said second power supply potential, with an input electrode of one transistor receiving said external signal and an input electrode of the other transistor receiving an output potential from said potential conversion means; anda current mirror circuit connected between a line of a third power supply potential and said first and second nodes, which supplies current which is equal to that flowing through said first node to said second node.