Patent ID: 8041981
Filing Date: 2011-10-18
Classification: H03L

Abstract:
1. A synchronization circuit, comprising: a comparison circuit to determine state-variable differences between a first clock signal in a first timing domain and a second clock signal in a second timing domain; an aggregation circuit, electrically coupled to the comparison circuit, to collect a temporal history of the state-variable differences between the first clock signal and the second clock signal; an estimation circuit, electrically coupled to the aggregation circuit, to generate a synchronization acquisition curve based on the temporal history; a summation circuit, electrically coupled to the comparison circuit and the estimation circuit, to sum the state-variable differences output by the comparison circuit with the synchronization acquisition curve; and a synchronization processing circuit, electrically coupled to the summation circuit, to determine the second clock signal based on the sum of the state-variable differences and the synchronization acquisition curve.