Patent ID: 8563416
Filing Date: 2013-10-22
Classification: H01L

Abstract:
1. A method of forming a solder bump support structure comprising: forming an inter-level dielectric (ILD) layer over a silicon substrate; forming a plurality of via openings in the ILD layer; forming an insulation layer over the ILD layer; forming a plurality of openings in the insulation layer, exposing the plurality of via openings in the ILD layer; filling the plurality of openings in the insulation layer and the plurality of via openings in the ILD layer with a conductive material; forming a plurality of pedestal members above the plurality of via openings by selectively patterning the insulation layer; and, forming a capping under bump metal (UBM) layer over, and in electrical contact with, the conductive material and over at least a portion of the insulation layer of the pedestal member.