Patent ID: 6341345
Filing Date: 2002-01-22
Classification: G06F

Abstract:
A computer system, said computer system comprising:a conventional bi-endian processor, said processor being used to execute a plurality of tasks, said tasks including big endian tasks and little endian tasks; memory, said memory being divided into a plurality of storage apprepates, said plurality of storage aggregates containing data, said data including big endian data and little endian data, said plurality of storage aggregates including markings, said markings indicating whether said storage aggregates contain data formatted as big endian data or contain data formatted as little endian data, said memory comprising big endian programs and little endian programs, said big endian programs executing as said big endian tasks and said little endian programs executing as said little endian tasks, said tasks executing on a task-for-task basis directly on said conventional bi-endian processor; a memory management mechanism, said memory management mechanism using said markings to allow said big endian programs to share said big endian data with said little endian programs.