Patent ID: 6242327
Filing Date: 2001-06-05
Classification: H01L

Abstract:
A method of fabricating a compound semiconductor device including a channel layer formed on a substrate, a gate electrode formed on said channel layer and a pair of diffusion regions formed in said channel layer at both lateral sides of said gate electrode, said method comprising the steps of:introducing an impurity element into said channel layer while using said gate electrode as a mask by an ion implantation process;forming first and second protective layers of a compound semiconductor material on said channel layer at both lateral sides of said gate electrode respectively in contact with first and second side walls of said gate electrode;applying an annealing process to said channel layer in a state in which said first and second protective layers cover said channel layer, such that said impurity element forms first and second diffusion regions in said channel layer at both lateral sides of said gate electrode as a result of said annealing process respectively in correspondence to said first and second protective layers; andforming first and second ohmic electrodes respectively on said first and second diffusion regions.