Patent ID: 7170343
Filing Date: 2007-01-30
Classification: H03F

Abstract:
1. A fast look up table (LUT) predistortion apparatus comprising: a predistortion means for predistorting an input complex digital signal based on an LUT implementation and outputting a predistorted complex signal; and a power amplifier for amplifying the predistorted signal and outputting an amplified complex signal, wherein the predistortion means includes: a selection unit for receiving the input complex digital signal, generating an access point and a quantized signal based on the input complex digital signal; a memory unit for storing values of the input complex digital signal corresponding to the accessing point from the selection unit and outputting a stored signal; a multiplexer for generating a multiplexed signal by selecting one of the stored signal and the input digital complex signal; a address generator for generating an access point according to the quantized signal from the selection unit; a LUT for storing complex gain values according to the access point from the address generator and outputting stored complex gain value; a multiplier for multiplying the multiplexed signal from the multiplexer and stored complex gain value from the LUT; a delayer for receiving the multiplexed signal, and generating a delayed signal by delaying the multiplexed signal to match a feedback signal from the power amplifier; a adaptation unit for calculating an error signal by comparing the delayed signal and the feedback signal and updating the complex gain values of the LUT; and a control unit for controlling the selection unit and multiplexer by state of the error signal from the adaptation unit.