Patent ID: 8946069
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A fabricating method of a semiconductor device, comprising: providing a substrate having a first region and a second region; forming a plurality of first gates in the first region, such that the first gates are spaced apart at a first pitch; forming a plurality of second gates in the second region, such that the second gates are spaced apart at a second pitch different from the first pitch; implanting etch rate adjusting dopants in regions between the adjacent second gates, while blocking the first region; simultaneously etching the first region and the second region so as to form a first plurality of trenches in the first region and a second plurality of trenches in the second region, wherein a depth of the first plurality of trenches and a depth of the second plurality of trenches are substantially equal; and epitaxially growing a semiconductor material in the first and the second plurality of trenches.