Patent ID: 6948149
Filing Date: 2005-09-20
Classification: G03F

Abstract:
1. A method of determining the overlay accuracy of multiple patterns formed within an arrangement of exposure fields on a semiconductor wafer, comprising: providing a test wafer to an overlay measurement tool, the test wafer comprising the exposure fields with the patterns and a plurality of overlay targets formed with the patterns across the test wafer; measuring first shifts of each of the overlay targets; determining a first set of correctable and/or non-correctable overlay errors from the measured first shifts of the plurality of overlay targets; selecting a number of overlay targets from said plurality of patterns and forming at least two different subsets thereof, wherein each subset comprises overlay targets residing in at least three of the exposure fields; for each of the subsets performing the steps a) to c): a) obtaining the measured first shifts, which correspond to said selected overlay targets; b) calculate a second set of correctable and/or non-correctable errors from the measured first shifts of the selected overlay targets; c) comparing the second set of correctable and/or non-correctable errors with the first set of correctable and/or non-correctable errors; selecting one of the subsets in dependence of the comparison results; providing the semiconductor wafer and measuring second shifts of those overlay targets, whose positions on the semiconductor wafer coincide with positions of the overlay targets of the selected subset on said test wafer; and assessing the quality of said semiconductor wafer based on said measured second shifts.