Patent ID: 7133315
Filing Date: 2006-11-07
Classification: G11C,H01L

Abstract:
1. A method for operating a memory, comprising: programming one or more MOSFETs in a DRAM array in a reverse direction, wherein each MOSFET in the DRAM array includes a source region, a drain region, a channel region between the source and the drain regions, and a gate separated from the channel region by a gate insulator, each MOSFET having a plug coupling the source region to an array plate and a bitline coupled to the drain region along rows in the DRAM array, and wherein programming the one or more MOSFETs in the reverse direction includes: wherein applying the first, second and gate potentials to the one or more MOSFETs includes creating a hot electron injection into the gate insulator of the one or more MOSFETs adjacent to the source region such that the one or more MOSFETs become programmed MOSFETs and operate at reduced drain source current in a forward direction.