Patent ID: 6323100
Filing Date: 2001-11-27
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, comprising the steps of:forming a first insulating film on a semiconductor substrate;forming a second insulating film on the first insulating film;selectively removing the first insulating film and the second insulating film to form a contact hole to penetrate through the first insulating film and the second insulating film and to expose a portion of the semiconductor substrate;forming a first conducting layer on the whole surface including an inner surface of the contact hole;forming a multi-layer insulating film composed of at least three layers, on the whole surface of the first conducting layer;patterning a stacked structure composed of the first conducting layer and the multi-layer insulating film into a pillar form;selectively etching the patterned multi-layer insulating film to partially remove and retract an intermediate layer between an upper layer and a lower layer of the multi-layer insulating film so as to form a recess between the upper layer and the lower layer of the multi-layer insulating film;forming a second conducting layer on the whole surface including an area inside the recess;etching back the second conducting film by an anisotropic etching, so that a cylindrical side wall formed of the second conducting film is formed on a side surface of the patterned multi-layer insulating film having the recess;removing the multi-layer insulating film to form a storage electrode formed of the remaining first and second conducting layers;forming a dielectric film on a surface of the storage electrode, and forming a third conducting layer on the dielectric film as a plate electrode.