Patent ID: 6335284
Filing Date: 2002-01-01
Classification: H01L

Abstract:
A metallization process for manufacturing semiconductor devices, comprising the steps of:a) loading a semiconductor wafer into a load lock chamber, the semiconductor wafer having a photoresist pattern formed over a metal material layer to be etched; b) pumping and purging the load lock chamber; c) transferring the semiconductor wafer from the load lock chamber into an etching chamber via a transfer module, the transfer module being maintained under vacuum conditions and being purged; d) etching the metal material layer by using the photoresist pattern as an etch mask while supplying etching gas containing chlorine to form a metal pattern; e) purging the etching chamber after the etching step; f) transferring the wafer from the etching chamber into an ashing chamber via the transfer module, the transfer module being maintained under vacuum conditions; g) performing an ashing process on the metal pattern in the ashing chamber; and h) transferring the wafer from the ashing chamber into the load lock chamber via the transfer module, the load lock chamber being continuously purged and the pressure in the load lock chamber and the transfer module being maintained higher than that in the etching chamber and the ashing chamber, in order to prevent the gas remaining in the etching chamber and the ashing chamber from flowing back into the load lock chamber and the transfer module.