Patent ID: 9093471
Filing Date: 2015-07-28
Classification: H01L

Abstract:
1. A method for forming a trench MOS structure, comprising: providing a substrate, an epitaxial layer, a doping well and a doping region, said substrate of a first conductivity type and with a first side and a second side opposite to said first side, said epitaxial layer of said first conductivity type disposed on said first side, said doping well of a second conductivity type disposed on said epitaxial layer, and said doping region of said first conductivity type disposed on said doping well; performing a vertical etching step to form a gate trench which penetrates said doping region and said doping well; providing a mask disposed in said gate trench and covering said doping well; performing a doping region oxidizing step to form a sacrificial layer covering an inner wall of said doping region and exposing said mask; removing said mask to expose said doping well; performing a lateral etching step to partially remove said doping well for forming a bottom section of said gate trench; performing an oxidizing step to form a gate isolation covering the inner wall of said bottom section and a top section of said gate trench; and filling said gate trench with a conductive material to form a trench gate.