Patent ID: 7509048
Filing Date: 2009-03-24
Classification: G02B,H04J

Abstract:
1. A device comprising: a processor configured to convert a collimated input beam into a plurality of discrete time-delayed collimated output beams, the processor having an input and an output, the processor configured to maintain the collimation of the input beam so that the plurality of discrete time-delayed output beams maintain the collimation of the input beam, a focal plane at which the time-delayed beams interfere, a first reflective surface, the first reflective surface and the focal plane mutually defining an angle, the first reflective surface defining a size and a location relative to the focal plane, the first reflective surface positioned to direct interfered beams incident on the focal plane to the output, wherein the processor comprises a second reflective surface and a third reflective surface, the second reflective surface and the third reflective surface being in spaced relationship, whereby at least a portion of the collimated beam directed toward the third reflective surface is reflected multiple times between the second and third reflective surfaces, thereby producing multiple time-delayed signals.