Patent ID: 6822476
Filing Date: 2004-11-23
Classification: H03K

Abstract:
A logic circuit comprising:a first supply line to be supplied with a first potential; a first local supply line; a first switch between the first supply line and the first local supply line; a second supply line to be supplied with a second potential; a second local supply line; a second switch between the second supply line and the second local supply line; a first logic gate receiving a state control signal and an input signal, an output of the first logic gate being at the first potential when the state control signal is a first state regardless of a state of the input signal; and a plurality of second logic gates including a first-type second logic gate and a second-type second logic gate, an output of the first-type second logic gate being at the first potential and an output of the second-type second logic gate being at the second potential the state control signal is the first state, wherein the first-type second logic gate is connected to the first supply line and the second local supply line; wherein the second-type second logic gate is connected to the first local supply line and the second supply line; and wherein the state control signal is the first state when the first and second switches are in an OFF state, and the state control signal changes from the first state to a second state after the first and second switches change from the OFF state to an ON state.