Patent ID: 6184905
Filing Date: 2001-02-06
Classification: G09G

Abstract:
A video graphics circuit comprising:a graphical user interface module that operates at a first clock rate, wherein the graphical user interface generates interface information based on user inputs;a buffer coupled to the graphic user interface module, wherein the buffer temporarily stores the interface information at the first clock rate; anda memory interface coupled to the buffer, wherein the memory interface retrieves the interface information from the buffer and provides the interface information to a memory at a memory clock rate, wherein the memory clock rate is substantially greater than the first clock rate, wherein the memory interface subsequently retrieves the interface information from the memory at the memory clock rate and provides the retrieved interface information to the buffer, and wherein the graphical user interface retrieves the retrieved interface information from the buffer at the first clock rate;a video module that operates at a second clock rate, wherein the video module generates video graphics information which is provided to the buffer for temporary storage, and wherein the buffer provides the video graphics information to the memory, via the memory interface, at the memory clock rate, wherein the memory interface subsequently retrieves the video graphics information from the memory at the memory clock rate and provides the retrieved video graphics information to the buffer, and wherein the video module retrieves the retrieved video graphics information from the buffer at the second clock rate.