Patent ID: 8300732
Filing Date: 2012-10-30
Classification: H04B,H04L

Abstract:
1. An apparatus for removing a dc offset in a feedback loop, comprising: a comparator operative to sample a feedback loop output signal and provide a comparator output signal; a digital signal processing (DSP) module configured to receive the comparator output signal and, at least in part in response to the comparator output signal, determine a dc offset level in the feedback loop output signal; a digital to analog (D/A) converter coupled to the DSP module to provide an offset compensation signal based on the dc offset level; a moving average filter (MAF) coupled to an output of the comparator; an up/down (U/D) counter having a variable step size, the up/down counter being coupled to an output of the MAF; and control logic configured to: strobe the comparator; define a number of filter taps of the MAF; and set at least one of the step size and/or rate for the U/D counter.