Patent ID: 6430187
Filing Date: 2002-08-06
Classification: H04L,H04Q

Abstract:
Apparatus, comprising:a plurality of local area network (LAN) interface logic blocks, each LAN interface logic block being operative to send and receive LAN frames to and from a corresponding different LAN; cell-based-network interface logic operative to send and receive cells to and from a cell-based network; a cell buffer memory; and segmentation and reassembly (SAR) logic coupled to the LAN interface logic blocks, the cell buffer memory, and the cell-based-network interface logic, the SAR logic being operative to programmably partition the cell buffer memory into distinct buffer regions, each buffer region being associated with a respective LAN and with a respective set of virtual connections defined between the SAR logic and the cell-based-network interface logic, the SAR logic being operative to segment PDUs received from each LAN interface logic block into corresponding groups of cells and to store each group of cells into the buffer region associated with the respective LAN, the SAR logic being further operative to transfer the groups of cells from each buffer region to the cell-based-network interface logic via the virtual connections associated with the buffer region.