Patent ID: 9183394
Filing Date: 2015-11-10
Classification: G06F

Abstract:
1. An apparatus for protecting a basic input/output system (BIOS) in a computing system, the apparatus comprising: a BIOS read only memory (ROM), comprising: a partition selector, configured to select one or more of said plurality of BIOS content partitions responsive to a BIOS check interrupt that interrupts normal operation of the computing system; and a tamper detector, operatively coupled to said BIOS ROM and said partition selector, configured to generate said BIOS check interrupt at a combination of prescribed intervals and event occurrences, and configured to access said one or more of said plurality of BIOS content partitions and corresponding one or more of said plurality of encrypted message digests upon assertion of said BIOS check interrupt, and configured to direct a microprocessor to generate corresponding one or more of a plurality of second message digests corresponding to said one or more of said plurality of BIOS content partitions and corresponding one or more of a plurality of decrypted message digests corresponding to said one or more of said plurality of encrypted message digests using the same algorithms and key that were employed to generate said first message digest and said plurality of encrypted message digests, and configured to compare said one or more of said plurality of second message digests with said one or more of said plurality of decrypted message digests, and configured to preclude said operation of said microprocessor if said one or more of said plurality of second message digests and said one or more of said plurality of decrypted message digests are not pair wise equal, and configured to allow said operation of said microprocessor if said one or more of said plurality of second message digests and said one or more of said plurality of decrypted message digests are pair wise equal.