Patent ID: 6958948
Filing Date: 2005-10-25
Classification: G11C

Abstract:
1. A semiconductor device comprising: a latch circuit including at least one MOS transistor for latching one bit of data electrically in the form of a voltage; a peripheral circuit including at least one MOS transistor for exchanging data with said latch circuit; a switch circuit including at least one MOS transistor for connecting and disconnecting said latch circuit to and from said peripheral circuit; a first source voltage supply part for supplying a first source voltage to said peripheral circuit; a second source voltage supply part for supplying a second source voltage to the latch circuit; a first controller part for controlling the turning on and off of the first source voltage supply part independently of the second source voltage supply part; and a second controller part for controlling the turning on and off of the switch circuit sequentially with the turning on and off of the first source voltage supply part, wherein the MOS transistors included in the latch circuit and the switch circuit are configured using a low-leakage MOS transistor with a lower leakage current than that of the MOS transistor included in the peripheral circuit.