Patent ID: 8278716
Filing Date: 2012-10-02
Classification: H01L

Abstract:
1. A thin film transistor comprising: a substrate; a buffer layer disposed on the substrate; a first semiconductor layer comprising a lowermost surface disposed on the substrate, the first semiconductor layer further comprising an uppermost surface opposite the lowermost surface, a first side surface, and a second side surface; a second semiconductor layer disposed directly on the uppermost surface, the first side surface, and the second side surface of the first semiconductor layer, the second semiconductor layer having a larger surface area than the first semiconductor layer; a gate electrode disposed on the substrate; a gate insulating layer disposed on the substrate, between the gate electrode and the first and second semiconductor layers; and source and drain electrodes connected to the second semiconductor layer, the source and drain electrodes being insulated from the gate electrode, wherein a channel region of the second semiconductor layer is disposed on the entire uppermost surface of the first semiconductor layer.