Patent ID: 6954096
Filing Date: 2005-10-11
Classification: H02M,H02P

Abstract:
1. A semiconductor integrated circuit device formed on a semiconductor chip comprising: an analog voltage processing section for sampling analog voltage in synchronization with a sampling signal and processing the analog voltage; a PWM driving section for generating a PWM driving signal on the basis of digital processing, to provide a driven section with the PWM driving signal; and a sampling signal generation circuit for acquiring a variation point of the PWM driving signal from a first level to a second level, wherein the variation point defines a period start point, wherein the variation point is acquired based on a condition that delay time td is shorter than at least a minimum duration of the second level of the PWM driving signal, wherein the delay time td is defined as time from variation of level of the PWM driving signal to actual variation in the passage of current through the driven section, and for providing the analog voltage processing section with a sampling signal at a predetermined point in time when the delay time td elapses from the period start point of the PWM driving signal.