Patent ID: 8546870
Filing Date: 2013-10-01
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first dielectric pattern on a semiconductor substrate; a data storage pattern on the first dielectric pattern; a second dielectric pattern on the data storage pattern so that the data storage pattern is between the first and second dielectric patterns; a first conductive pattern that is directly on the second dielectric pattern; a second conductive pattern on the first conductive pattern so that the first conductive pattern is between the second dielectric pattern and the second conductive pattern; and a sidewall insulating layer on a sidewall of the first conductive pattern, wherein the sidewall insulating layer directly contacts an upper surface of the second dielectric pattern and a lower surface of the second conductive pattern, and wherein the first conductive pattern has a first width that is less than a second width of the second conductive pattern and that is less than a third width of the second dielectric pattern.