Patent ID: 8296597
Filing Date: 2012-10-23
Classification: G06F,Y02D

Abstract:
1. A computer system capable of dynamically overclocking or underclocking of a central processing unit, comprising: a central processing unit from which a first voltage identification signal is outputted based on a real load of the central processing unit; a voltage identification converting/comparing controller capable of determining to operate in an bypass mode or a calculation mode in response to the received first voltage identification signal and capable of outputting a second voltage identification signal and a control signal, wherein a predefined maximum voltage identification value and a predefined minimum voltage identification value are installed in the voltage identification converting/comparing controller; a frequency generator for generating a central-processing-unit clock with a specific frequency to the central processing unit in response to the control signal; and a pulse-width-modulation controller capable of generating the operation voltage to the central processing unit in response to the second voltage identification signal, wherein the voltage identification converting/comparing controller is switched to operate in the calculation mode if the first voltage identification signal is up to the predefined maximum voltage identification value or down to the predefined minimum voltage identification value, and the first voltage identification signal is not equal to the second voltage identification signal, the voltage identification converting/comparing controller executes overclocking or underclocking to the central processing unit, wherein the voltage identification converting/comparing controller is switched to operate in the bypass mode if the first voltage identification signal is less than the predefined maximum voltage identification value and greater than the predefined minimum voltage identification value, and the second voltage identification signal is equal to the first voltage identification signal, the voltage identification converting/comparing controller is without executing overclocking or underclocking to the central processing unit.