Patent ID: 6411239
Filing Date: 2002-06-25
Classification: H03M

Abstract:
A Digital to Analog (DA) converter comprising:n switching circuits equipped with a first input terminal, a second input terminal, a control terminal, and a switch terminal, which can be connected to the aforementioned first input terminal or the aforementioned second input terminal according to the signals input from the aforementioned control terminal, (nâˆ’1) first-value resistors connected in series, n second-value resistors, which are each connected at one end to the aforementioned switch terminal of the aforementioned n switching circuits, first and second third-value resistors connected between one end of the first first-value resistors and a standard voltage and between one end of the (nâˆ’1)th first-value resistors and the aforementioned standard voltage, respectively, standard voltage input terminals connected to each first input terminal of the aforementioned n switching circuits, and an output terminal connected to the mid-point of the connection between one end of the first of the aforementioned first-value resistors and the aforementioned first third-value resistor, and to the other end of the first of the aforementioned second-value resistors, wherein the other end of the second to (nâˆ’1)th of the aforementioned second-value resistors is connected to the mid-point of the connection between the other end of the kth (k=1 to (nâˆ’2) first-value resistors and the aforementioned end of the (k+1)th first-value resistors, the other end of the nth second-value resistor is connected to the mid-point of the connection of the other end of the (k+1)th first-value resistors and the aforementioned second third-value resistor, each of the second input terminals of the aforementioned n switching circuits is connected to the aforementioned standard voltage, and the resistance values of the aforementioned first-value resistors, the aforementioned second-value resistors, and the aforementioned third-value resistors are set to Râˆ’&Dgr;R, 2R+&Dgr;R, and 2Râˆ’&Dgr;R, respectively (&Dgr;R is the resistance value error for a resistance value R).