Patent ID: 9160270
Filing Date: 2015-10-13
Classification: G11B,H02P,H03F

Abstract:
1. An operational amplifier comprising: an input stage which generates a first input current and a second input current in accordance with a first input signal and a second input signal; an offset adjuster which gives offsets to the first input current and the second input current respectively to generate a first output current and a second output current; an output stage which generates an output signal in accordance with the first output current and the second output current; and an offset current generator which generates a first offset current and a second offset current in accordance with an offset adjustment signal, wherein the offset adjuster gives the offsets to the first input current and the second input current respectively by using the first offset current and the second offset current, and the offset adjuster includes: first to fourth NMOSFETs; and first to fourth resistors, wherein a drain of the first NMOSFET is connected to an output terminal of the first output current, a drain of the second NMOSFET is connected to an input terminal of the first input current, a drain of the third NMOSFET is connected to an input terminal of the second input current, a drain of the first NMOSFET is connected to an output terminal of the second output current, gates of the first NMOSFET and the second NMOSFET are connected to the drain of the second NMOSFET, gates of the third NMOSFET and the fourth NMOSFET are connected to the drain of the third NMOSFET, a first terminal of the first resistor is connected to the source of the first NMOSFET and an input terminal of the first offset current, a first terminal of the second resistor is connected to the source of the second NMOSFET, a first terminal of the third resistor is connected to the source of the third NMOSFET, a first terminal of the fourth resistor is connected to the source of the fourth NMOSFET and an input terminal of the second offset current, and each of the second terminals of the first to fourth resistors are connected to a ground terminal.