Patent ID: 6238940
Filing Date: 2001-05-29
Classification: H01L

Abstract:
A method of analyzing defects in a semiconductor manufacturing process, the method comprising the steps of:sending a production lot of wafers through a manufacturing process;scanning a selected wafer from the production lot of wafers for defects in a selected scanning tool;sending location information for defects caught during the step of scanning to a defect management system;combining the location information for defects caught during the step of scanning with offset information for the selected scanning tool to obtain accurate scanning tool defect location information;selecting a review analysis tool to review the accurate scanning tool defect location information;combining the accurate scanning tool defect location information with offset information for the selected review analysis tool to obtain accurate review tool defect location information for the selected review analysis tool; andanalyzing in the selected review analysis tool the defects caught during the step of scanning using the accurate review tool defect location information for the selected review analysis tool.