Patent ID: 6060385
Filing Date: 2000-05-09
Classification: H01L,Y10S

Abstract:
A method of forming an interconnect structure comprising:forming a first dielectric layer upon a substrate assembly;forming a second dielectric layer upon said first dielectric layer;forming a first recess extending through said second dielectric layer and into said first dielectric layer;forming a second recess extending through said first recess and into said second dielectric layer, said second recess having a first trench defined by said second dielectric layer and a first contact corridor defined by said first dielectric layer, said first contact corridor having a first maximum width, said first trench having a second maximum width not less than the first maximum width; andforming a first metal layer filling said first contact corridor and said first trench, said first metal layer extending from a top surface above the second dielectric layer through said first trench and terminating at a bottom surface thereof within said first contact corridor, said first metal layer having a first portion thereof extending from the first trench and above the second dielectric layer with a third maximum width not less than the second maximum width, wherein:said first dielectric layer is composed of a material that is dissimilar from a material from which said second dielectric layer is composed; andforming said second recess extending through said first recess and into said second dielectric layer is accomplished by etching said second dielectric layer with an etch recipe that is selective to the material from which said first dielectric layer is composed.