Patent ID: 7719369
Filing Date: 2010-05-18
Classification: H03L,H03M

Abstract:
1. A sigma delta digital to analog converter (DAC) to generate an analog signal having a strength proportionate to a digital value, said digital value having a set of more significant bits (MSBs) and a set of less significant bits (LSBs), said sigma delta DAC comprising: a set of DAC elements each to provide a corresponding analog quantity; a first set of switches, each operable to couple the corresponding analog quantity to a first path; a second set of switches, each operable to couple the corresponding analog quantity to a second path; a sigma delta modulator to generate a sequence of quantized values over a duration such that the average of said quantized values represents a first value formed from said set of LSBs, wherein said sequence of quantized values operate said second set of switches to cause a first analog quantity portion proportionate to the value of said LSBs on said second path; and a control logic to operate a number of said first set of switches according to a value of said set of MSBs to cause a second analog quantity portion proportionate to the value of said MSBs on said first path, wherein a sum of said first analog quantity portion and said second analog quantity portion represents said analog signal corresponding to said digital value, wherein there is at least one common DAC element which is operable to be connected to both of said first path and said second path by the corresponding one of said first set of switches and said second set of switches respectively.