Patent ID: 6768385
Filing Date: 2004-07-27
Classification: H03L,Y10S

Abstract:
A phase lock loop comprising:a digitally controlled oscillator for creating an oscillating signal; a counter that is coupled to the digitally controlled oscillator for determining a period of the oscillating signal of the digitally controlled oscillator in comparison with a reference signal; a lock indicator for determining a lock state of the phase lock loop; a phase detector that is coupled to the lock indicator and the counter for determining a frequency difference and a phase difference between the reference signal and the oscillating signal from the digitally controlled oscillator; a digital signal processing loop filter; and a phase booster, wherein the digital signal processing loop filter is coupled to the phase detector and the phase booster, and the digital signal processing loop filter for receiving input signals and exporting an output signal to the digitally controlled oscillator under control, wherein the phase booster changes an operating efficiency of the digital signal processing loop filter.