Patent ID: 6696721
Filing Date: 2004-02-24
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate; a pair of transistors formed on the semiconductor substrate, each of the transistors having a gate electrode formed on a gate insulating film on the semiconductor substrate and impurity diffusion layers formed in the semiconductor substrate and on both sides of the gate electrode; an isolation insulating film formed on the semiconductor substrate between the transistors; a plurality of storage node plugs electrically connected to the impurity diffusion layers of the respective transistors; and a plurality of capacitors formed on the storage node plugs and having a plurality of first electrodes, a capacitor insulating film and a second electrode, the plurality of first electrodes being electrically connected to the plurality of storage node plugs, the capacitor insulating film being interposed between the first electrodes and the second electrode, wherein a cavity is present in the second electrode.