Patent ID: 6124628
Filing Date: 2000-09-26
Classification: H01L

Abstract:
A high voltage integrated circuit comprising:a first region of first conductivity type;a second region of second conductivity type formed in a selected area of a first major surface of said first region;a third region of first conductivity type formed in a selected area of a surface of said second region;first source region and first drain region of the first conductivity type formed in selected areas of the surface of said second region, apart from said third region;a first gate electrode formed on a surface of said second region between said first source region and said first drain region, over an insulating film;second source region and second drain region of second conductivity type formed in selected areas of a surface of said third region; anda second gate electrode formed on a surface of said third region between said second source region and said second drain region, over an insulating film;wherein a net doping amount of said second region interposed between said first region and said third region is in a range of 1.times.10.sup.12 cm.sup.-2 to 3.times.10.sup.13 cm.sup.-2, said net doping amount being obtained by subtracting a doping amount of first-conductivity-type impurities from a doping amount of second-conductivity-type impurities.