Patent ID: 8089743
Filing Date: 2012-01-03
Classification: G05F

Abstract:
1. A power regulator, comprising: a P-typed power transistor, its source receiving an unregulated first voltage source and generating a regulated second voltage at drain according to a control signal; a feedback circuit, for generating a feedback signal via the division to said second voltage; a differential operation amplifier, its output is coupled to a gate of said power transistor, its positive input terminal is coupled to said feedback signal, and its negative input terminal is coupled to a reference voltage; a protecting circuit, for being configured so as to limit a first current flowing through said power transistor, and when said first current exceeds a predetermined value, a voltage of said gate of said power transistor is enhanced higher; wherein, said protecting circuit further comprises a first DC current mirror, said first DC current mirror further comprises a pair of N transistor, for which gates of said N transistors are interconnected together, and for one of the pair its gate and drain are interconnected as an input terminal, and a drain of another N transistors is defined as output terminal; and an active foldback current limiting circuit, for limiting the first current flowing through said P-typed power transistor, and when a short circuit current is happening to said P-typed power transistor, a current at the DC current mirror's output terminal is increased; wherein said active foldback current limiting circuit further comprising: a plurality of current sources, being composed of P-typed transistors; a plurality of inverters, sources of P-typed transistors in the inverters are supplied a current by said plurality of current sources; and a plurality of P-typed transistor switches, for controlling whether said plurality of P-typed current sources supply currents to said first DC current mirrors' output, and gates of said plurality of P-typed current sources are coupled to outputs of said inverters; wherein, outputs of said plurality of P-typed current sources are coupled to said first DC current mirrors' outputs.