Patent ID: 9142653
Filing Date: 2015-09-22
Classification: H01L

Abstract:
1. A b method for manufacturing a thin-film transistor (TFT) array substrate, wherein the TFT array substrate is of a top-gate structure, the method for manufacturing a thin-film transistor comprising the following steps: (1) providing a substrate; (2) sequentially depositing and forming a buffer layer, an oxide semiconductor film, and a first metal layer on the substrate; (3) forming a first photoresist layer on the first metal layer and patterning the first photoresist layer to form, at a predetermined location, a first photoresist pattern, which comprises a first portion and a second portion defining a ditch zone corresponding to the oxide semiconductor film, wherein the first photoresist pattern has a thickness in the second portion that is greater than that of the first portion; (4) etching off parts of the first metal layer and the oxide semiconductor film that are located in areas not covered by the first photoresist pattern, removing the first portion of the first photoresist pattern to expose the first metal layer, etching off the first metal layer by using the second portion of the first photoresist pattern as a mask in order to expose the oxide semiconductor film, and peeling off the first photoresist pattern in order to form a source terminal and a drain terminal on the first metal layer; (5) sequentially depositing an insulation layer and a second metal layer on the substrate and patterning the second metal layer to form a gate terminal; (6) depositing a protective layer on the substrate, forming a second photoresist layer on the protective layer, and patterning the second photoresist layer to form, at a predetermined location, a second photoresist pattern, which comprises a third portion that is located at one side of the drain terminal and on a portion of the drain terminal and a fourth portion that is located at an opposite side of the drain terminal and on a portion of the drain terminal, wherein the third portion and the fourth portion of the second photoresist pattern define therebetween a recess; (7) etching off a part of the protective layer that is not covered by the second photoresist pattern and a part of the insulation layer corresponding to the part of the protective layer in order to expose the drain terminal, thereby forming a contact hole, and removing the third portion of the second photoresist pattern; and (8) depositing a transparent conductive layer on the substrate and peeling and removing the fourth portion of the second photoresist pattern and the transparent conductive layer located thereon through photoresist peeling.