Patent ID: 7935603
Filing Date: 2011-05-03
Classification: H01L,Y10S

Abstract:
1. A method of camouflaging a circuit, comprising: forming a gate structure in a substrate; forming a first active region in the substrate; providing a first lightly doped density active region adjacent the first active region, said first lightly doped density active region having a first conductivity type and said adjacent first active region having a second conductivity type; forming a second active region in the substrate; forming a second lightly doped density active region adjacent the second active region, said second lightly doped density active region having a first conductivity type and said adjacent second active region having a second conductivity type; forming a conductive layer disposed over at least a portion of said first active regions; and forming a gap in the conductive layer such that the gap prevents an electrical path from the conductive layer to the first lightly doped density active region for a nominal voltage applied to the conductive layer; wherein the circuit is non-operational when the nominal voltage is applied.