Patent ID: 8779519
Filing Date: 2014-07-15
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate; a first doped region formed in said substrate and adapted to receive an external voltage; a second doped region formed in said substrate and connected to ground; and a third doped region formed in said substrate and connected to ground; each of said substrate and said third doped region being doped with a first type dopant, and each of said first and second doped regions being doped with a second type dopant such that said semiconductor device is configured to have a first threshold voltage for forward conduction between said first and second doped regions, and a second threshold voltage for forward conduction between said first and third doped regions; wherein, when said first type dopant and said second type dopant are respectively a p-type dopant and an n-type dopant, wherein, when said first type dopant and said second type dopant are respectively an n-type dopant and a p-type dopant,