Patent ID: 8609540
Filing Date: 2013-12-17
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming an electrically conductive interconnect structure on a substrate, wherein: the electrically conductive interconnect structure partially extends within at least one trench in a dielectric region of the substrate; and the electrically conductive interconnect structure has a top surface and at least one sidewall; removing a portion of the top surface and a portion of the at least one sidewall of the electrically conductive interconnect structure to create at least one gap between the at least one sidewall of the electrically conductive interconnect structure and at least one wall of the at least one trench; and covering the top surface and a portion of the at least one sidewall of the electrically conductive interconnect structure with a dissimilar material to at least partially fill the at least one gap, wherein the dissimilar material comprises a nano-metal.