Patent ID: 8395452
Filing Date: 2013-03-12
Classification: H03F

Abstract:
1. A signal amplification circuit for processing an input signal, comprising: an input stage, having an input node for receiving the input signal and an output node for outputting an intermediate signal; a plurality of output stages, coupled to a plurality of output ports of the signal amplification circuit, respectively, wherein each of the output stages generates a corresponding processed signal to a corresponding output port according to a gain and the intermediate signal when enabled; and a selecting stage, arranged for selectively coupling the output node of the input stage to at least one of the output stages; wherein the signal amplification circuit outputs a first number of processed signal(s) in response to the input signal when operated under a first operational mode, and the signal amplification circuit outputs a second number of processed signal(s) in response to the input signal when operated under a second operational mode, where the second number is different from the first number.