Patent ID: 6377486
Filing Date: 2002-04-23
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device comprising:a memory cell array including a plurality of normal blocks for storing normal data and a plurality of boot blocks for storing boot codes initializing a system in which the semiconductor memory device is used, the memory cell array having a plurality of boot block architecture options; means for storing block architecture information indicating one of a plurality of the boot block architecture options, wherein the means for storing block architecture information are drawn from the set including a pair of pad terminals and a bonding wire, a laser fuse, an electrical fuse, and at least one cell of the memory cell array storing the block architecture information; a block address input circuit including means for converting an external block address into an internal block address in accordance with the stored boot block architecture information; and a block selection circuit for selecting a corresponding one of the blocks of the memory cell array in response to the internal block address.