Patent ID: 8164702
Filing Date: 2012-04-24
Classification: G02F

Abstract:
1. A display substrate comprising: a dual transistor electrically connected to a first gate line and a data line, which is disposed in a direction substantially perpendicular to the first gate line, the dual transistor comprising a first drain electrode and a second drain electrode; a pixel electrode having a first pixel part and a second pixel part which are respectively connected to the first drain electrode and the second drain electrode; a connection transistor electrically connected to the second pixel part and a second gate line which is adjacent to the first gate line, the connection transistor comprising a connection drain electrode; a voltage-decreasing electrode extended from the connection drain electrode of the connection transistor; a data insulation layer disposed on the voltage-decreasing electrode; and a voltage-decreasing line extended in substantially the same direction as the first gate line and the second gate line, the voltage-decreasing line overlapping the voltage-decreasing electrode and the data insulation layer.