Patent ID: 6141269
Filing Date: 2000-10-31
Classification: G11C

Abstract:
A semiconductor integrated circuit device, comprising:a plurality of parallel selection lines;first and second spare selection lines parallel to and adjacent said plurality of selection lines;first selection means at one end side of said plurality of selection lines for selecting any of said plurality of selection lines; andsecond selection means at the other end side of said plurality of selection lines for selecting any of said plurality of selection lines,alternate ones of said plurality of selection lines being coupled only to said first selection means and the remaining of said selection lines being coupled to only said second selection means in a first configuration;first defect repairing means for coupling said first spare selection line to said first selection means and changing the first configuration coupling of the selection lines to said first selection means; andsecond defect repairing means for coupling said second spare selection line to said second selection means and changing the first configuration coupling of the selection lines to said second selection means.