Patent ID: 7215132
Filing Date: 2007-05-08
Classification: G01R

Abstract:
1. An integrated circuit comprising: an output circuit that outputs a logic signal; a leadless terminal connecting an output line of the output circuit and being connected by soldering to a circuit board; and a fault diagnosing unit that tests an output voltage of the leadless terminal as being implemented on the circuit board to determine whether the output voltage is a normal voltage or an abnormal voltage; wherein the fault diagnosing unit further comprises: a pseudo-output unit that applies a predetermined pseudo-output voltage to the leadless terminal; a switching unit that cuts a connection of the output circuit to the leadless terminal at the time of fault diagnosis, and supplies the pseudo-output voltage of the pseudo-output unit to the leadless terminal side as being cut; a measuring unit that measures a voltage of the leadless terminal in a fault diagnosis state by the switching unit; and a determining unit that determines, from the voltage measured by the measuring unit, whether the voltage of the leadless terminal is a normal voltage or an abnormal voltage.