Patent ID: 7777350
Filing Date: 2010-08-17
Classification: H01L

Abstract:
1. A semiconductor stack package comprising: a first printed wiring board; a plurality of semiconductor chips stacked on the first printed wiring board, including first and second semiconductor chips, the second semiconductor chip comprising an uppermost semiconductor chip which has an electrode pad for providing power supply, a ground pad for providing grounding, and a signal pad for signal transmission in a center area on the upper surface of the chip; connection lands formed on the first printed wiring board on the outside of the stacked semiconductor chips; a wiring extension part which is formed on the uppermost semiconductor chip, and has wiring circuits extending from the center to the periphery thereof, wherein at least one of the electrode pad and the ground pad is electrically connected to one end of one of the wiring circuits; and a wire for connecting the other end of the relevant wiring circuit of the wiring extension part and one of the connection lands on the first printed wiring board, the wiring circuit comprising a conductive layer having a width which is greater than a diameter of the wire.