Patent ID: 6880099
Filing Date: 2005-04-12
Classification: G06F

Abstract:
1. A clock free apparatus for sampling an input signal that has a pulse-width defined between a first edge and a second edge, comprising: a timing delay circuit arranged to produce at least two strobe signals in response to the input signal such that the at least two strobe signals each have a corresponding pulse width that are no greater than the pulse-width associated with the input signal; a comparator circuit arranged to produce a comparator output signal in response to a comparison between the input signal and a reference level signal; and a sampling logic arranged to sample at least two data points within a sampling window in response to the at least two strobe signals and the comparator output signal, the sampling window having edges that correspond to the pulse-width of the input signal such that the at least two sampled data points correspond to at least two samples from the comparator output signal over the time period associated with the pulse-width of the input signal.