Patent ID: 6597749
Filing Date: 2003-07-22
Classification: H03K

Abstract:
A pulse monitoring circuit for recognizing pulse duration within a predetermined time range comprising:first pulse detecting device having: a logic signal input node for receiving a logic signal alternating between a first logic state pulse and a second logic state pulse; a first voltage ramp generator coupled to said logic signal input node for producing a first linear voltage ramp upon reception of said first logic state pulse; a second voltage ramp generator coupled to said logic signal input node for producing a second linear voltage ramp upon reception of said first logic state pulse; a reference voltage input node for receiving a reference voltage; a first voltage level detecting means having a first input node coupled to said reference voltage input node and having a second input node coupled to receive said first linear voltage ramp, said first voltage level detecting means being effective for issuing a first detection signal in response to said first linear voltage ramp having a potential below said reference voltage; a second voltage level detecting means having a first input node coupled to said reference voltage input node and having a second input node coupled to receive said second linear voltage ramp, said second voltage level detecting means being effective for issuing a second detection signal in response to said second linear voltage ramp having a potential above said reference voltage; a control means coupled to said first and second voltage level detecting means for determining when said first detection signal is coincident with said second detection signal.