Patent ID: 6627491
Filing Date: 2003-09-30
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having a memory region which includes a non-volatile memory device and a logic circuit region which includes a peripheral circuit of the non-volatile memory device, the method comprising the steps of:forming a first insulating layer above a semiconductor layer; forming a first conductive layer above the first insulating layer; forming a stopper layer above the first conductive layer; patterning the stopper layer and the first conductive layer within the memory region; forming an ONO film at least above the semiconductor layer and on both sides of the first conductive layer; forming a second conductive layer at least on the entire surface of the memory region; forming a side-wall shaped control gate at least on both sides of the first conductive layer within the memory region with the ONO film interposed, by anisotropically etching the second conductive layer; removing the stopper layer within the logic circuit region; pattering the first conductive layer within the logic circuit region to form a gate electrode of an insulated-gate field effect transistor in the logic circuit region; forming a side-wall insulating layer at least on both sides of the gate electrode; forming a first impurity layer as a source or drain region of the non-volatile memory device, and a second impurity layer as a source or drain region of the insulated-gate field effect transistor; forming a silicide layer on the first impurity layer, the second impurity layer and the gate electrode; forming a second insulating layer over the memory region and the logic circuit region; polishing the second insulating layer such that the stopper layer within the memory region is exposed and the gate electrode within the logic circuit region is not exposed; removing the stopper layer within the memory region; and patterning the first conductive layer within the memory region to provide word gates of the non-volatile memory device in the memory region.