Patent ID: 6449753
Filing Date: 2002-09-10
Classification: G06F

Abstract:
A computer software product for analyzing coupling between signals in a circuit, having machine readable code for reducing a resistance-capacitance network having a driving gate or module and a receiving gate or module, the network having at least one path from the driving gate or module to the receiving gate or module, the machine readable code including code for:replacing any parallel resistances of the network located on a path from the driving gate or module to the receiving gate or module with the lower valued resistance of the parallel resistances; summing series resistances of the network located on a path from the driving gate or module to the receiving gate or module, replacing the series resistances with a resistance having resistance equal to the sum of the series resistances; repeating the steps of replacing and summing until a single resistance remains of the network between the driving gate or module and the receiving gate or module; summing capacitances on the path from the driving gate or module to the receiving gate or module to form a total path capacitance; and splitting the total path capacitance between the driving gate or module end of the network and the receiving gate or end of the network, and adding the divided capacitance to terminal capacitances of the network.