Patent ID: 8356138
Filing Date: 2013-01-15
Classification: G06F

Abstract:
1. A memory controller system for providing access from connection ports to one or more memory devices comprising: a plurality of controller interface devices, each comprising: a plurality of physical interfaces for receiving the control, the address and the data signals from the outputs of the plurality of controller interface devices and providing the received control and data signals to the memory devices; and a bank management interface for connecting the plurality of controller interfaces to the plurality of physical interfaces, the bank management interface being programmable to selectively implement one of a plurality of modes comprising a first mode and a second mode, wherein, the first mode aggregates the plurality of controller interface devices into an aggregated controller interface device and wherein the bank management interface is configured to provide the aggregated controller interface device with access to each of the plurality of physical interfaces, and the second mode segments the plurality of controller interface devices among a plurality of regions and the plurality of physical interfaces among the plurality of regions and wherein the bank management interface is configured to provide controller interface devices with access only to physical interfaces that are within the same region.