Patent ID: 6330181
Filing Date: 2001-12-11
Classification: G11C,H01L,Y10S

Abstract:
A method for fabricating a memory cell, comprising:forming an elongated projection on a substrate, the elongated projection protruding from a surrounding area of a first side of the substrate and including an access channel for the memory cell;forming a first terminal and a second terminal coupled to the access channel, each of the first and second terminals extending the height of the elongated projection above the substrate;forming a storage node disposed above the first side of the substrate and coupled to the first terminal for the memory cell;forming a bit line coupled to the second terminal for the memory cell;removing a portion of the substrate from a second side to expose a portion of the access channel and the first and second terminals; andforming a gate structure operable to control the access channel at the exposed portion, to selectively couple the bit line to the storage node.