Patent ID: 9082968
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A method of manufacturing a variable resistance non-volatile memory device including non-volatile memory element layers stacked together by repeating a step of forming a non-volatile memory element layer plural times, the step of forming the non-volatile memory element layer including steps of: the step of forming the variable resistance layer including steps of: when a thickness of the second metal oxide layer included in each of the non-volatile memory element layers just after the step of forming a corresponding non-volatile memory element layer is completed is a thickness in formation, and when an area of a portion of the second metal oxide layer included in each of the non-volatile memory element layers and a portion of the first metal oxide layer included in a corresponding non-volatile memory element layer, which portions are in contact with each other, just after the step of forming the corresponding non-volatile memory element layer is completed is an area in formation, at least one of the thickness in formation and the area in formation is made different among the steps of forming the non-volatile memory element layers, to cause all of the non-volatile memory element layers in a state in which formation of an uppermost non-volatile memory element layer is completed, to have an equal initial resistance.