Patent ID: 6420224
Filing Date: 2002-07-16
Classification: G03F,H01L

Abstract:
A method for preserving alignment marker integrity in fabricating a semiconductor device, comprising the steps of:(a) forming a first mask member disposed on a semiconductor substrate, said step (a) comprising: (1) forming a primary first mask member portion for patterning at least one first field oxide region, and (2) forming a secondary first mask member portion for patterning at least one alignment marker region, whereby said primary first mask member portion facilitates formation of said at least one first field oxide region on a core region of a semiconductor substrate, and whereby said secondary first mask member portion facilitates formation of said at least one alignment marker; and (b) forming a second mask member disposed on a semiconductor substrate, said step (b) comprising: (1) forming a corresponding primary second mask member portion for patterning at least one second field oxide region, and (2) forming a corresponding secondary second mask member portion for covering and preserving said at least one formed alignment marker, whereby said corresponding primary second mask member portion facilitates formation of said at least one second field oxide region on a peripheral region of a semiconductor substrate, whereby said corresponding secondary second mask member portion covers and preserves said at least one formed alignment marker during formation of said at least one second field oxide region, and whereby said first mask member and said second mask member comprise a dual mask set apparatus.