Patent ID: 8976567
Filing Date: 2015-03-10
Classification: G11C

Abstract:
1. A semiconductor apparatus having a core area and a peripheral area, comprising: a first bank group including a plurality of banks stacked with each other and arranged at the core area, wherein the plurality of banks of the first bank group are arranged in a first direction; a second bank group including a plurality of banks stacked with each other and arranged at the core area, wherein the plurality of banks of the second bank group are arranged in the first direction; a write driver and a sense amplifier connected to the plurality of banks of the first and second bank groups; and a verify sense amplifier connected to the write driver and configured to verify a write operation performed in any one bank selected among the plurality of banks of the first or second bank groups, wherein the write driver and the verify sense amplifier are arranged between the first and second bank groups, the sense amplifier are arranged between the second bank group and the peripheral area, the first and second banks include a plurality of mats, respectively and the second bank group is located between the verify sense amplifier and the sense amplifier.