Patent ID: 9202691
Filing Date: 2015-12-01
Classification: H01L

Abstract:
1. A method, comprising: providing a semiconductor substrate having a trench disposed in a dielectric layer over the semiconductor substrate, wherein the trench has a bottom surface and opposing sidewalls extending from the bottom surface to a top of the trench, wherein the opposing sidewalls are substantially perpendicular to the bottom surface; forming a plurality of layers including a gate dielectric layer and a work function layer on the semiconductor substrate including in the trench by forming a conformal layer of the gate dielectric on the bottom surface and on the opposing sidewalls of the trench, and wherein the forming the plurality of layers also includes forming a barrier layer interposing the gate dielectric layer and the work function layer; thereafter, etching the gate dielectric layer and work function layer to form an etched gate dielectric layer and an etched work function layer that define a substantially v-shaped profile opening above the trench; and forming a fill metal layer in the trench, wherein the fill metal layer has an interface with each of the gate dielectric layer, the barrier layer, and the work function metal layer.