Patent ID: 6185221
Filing Date: 2001-02-06
Classification: H04L,H04Q

Abstract:
An apparatus for scheduling packets in an input-buffered multipoint switch comprising:a plurality of input channels;a plurality of output channels;multilevel request buffers, each multilevel request buffer being specific to one of said plurality of input channels, said multilevel request buffers having discrete buffer priority levels for storing requests having alternative quality of service (QoS) priorities, said requests having specific request buffer priorities that are determined by the discrete buffer priority level in which said requests are stored; andscheduler means in communication with said multilevel request buffers forindicating a transmission status for each of said input and output channels, said transmission status being indicative of channel availability,arbitrating among selected requests which have an equal QoS priority and which are stored in any of said discrete buffer priority levels of said multilevel request buffers, said arbitrating being at least partially based upon a combination of said request buffer priorities and said transmission statuses of said input and output channels, andissuing grants to said requests in a channel-by-channel sequence based upon said arbitrating among said selected requests having equal QoS priority.