Patent ID: 6043669
Filing Date: 2000-03-28
Classification: G01R,H05K

Abstract:
A printed circuit board test fixture comprising:a well plate having a plurality of first holes passing therethrough;a plurality of test probe pin assemblies passing through and secured relative to the first holes of the well plate the test probe pin assemblies being adapted to make electrical contact with test points of a printed circuit board;an interface panel for receiving a plurality of interface connector pins, said interface panel being adapted to be connected to a test electronics analyzer for sending test signals to the test fixture;a plurality of flexible printed circuit layers for interconnecting the test probe pin assemblies with the interface connector pins, each of the flexible printed circuit layers including:a substrate having circuit traces on at least one side thereof running between first contact apertures located in a first contact area and second contact apertures located in a second contact area,the first contact area being positioned adjacent the well plate and the test probe pin assemblies extending through the first contact apertures of the first contact area to secure the first contact area relative to the well plate, andthe substrate being folded to position the second contact area adjacent the interface panel and the interface connector pins extending through the second contact apertures of the second contact area to secure the second contact area relative to the interface panel; and,the plurality of flexible printed circuit layers being positioned, adjacent the first contact areas, in spaced apart non-contacting relation from each other and adjacent the first holes in the well plate such that the test probe pin assemblies make electrical contact with at least one of a selected one of the plurality of flexible circuit layers;the plurality of flexible printed circuit layers being positioned, adjacent the second contact areas, in spaced apart non-contacting relation from each other and adjacent the interface connector pins of the interface panel such that the interface connector pins make electrical contact with at least one of a selected one of the plurality of flexible circuit layers;the plurality of flexible printed circuit layers further including non-contact through holes in each of the first and second contact areas permitting test probe pin assemblies and interface connector pins to pass through selected other layers of the plurality of flexible printed circuit layers without making electrical contact therewith; and,the flexible printed circuit layers each having a thickness in the range of 0.002 to 0.012 inches.