Patent ID: 6207515
Filing Date: 2001-03-27
Classification: H01L

Abstract:
A method of forming buried source in a memory array comprising the steps of:providing a silicon substrate having a plurality of active and field areas defined;forming a pad oxide layer over said substrate;depositing a layer of nitride over said pad oxide layer;forming a patterned photoresist mask over said layer of nitride, wherein said patterns correspond to source regions formed in said active areas of said silicon substrate;etching said underlying layer of nitride and said pad oxide through openings in said patterned photoresist mask;etching further to form a trench with internal surfaces comprising sidewalls and a bottom surface in said silicon substrate;removing said photoresist mask;growing surface oxide on said internal surfaces of said trench;etching portions of said surface oxide on portions of said internal surfaces, including upper portions of said sidewalls and said bottom surface of said trench;performing selective epitaxial growth (SEG) in said trench;forming a source line in said SEG by implantation, wherein said source line integrated with any one of said source regions in said, SEG in said trench over said active regions;removing said layer of nitride and pad oxide layer; andusing conventional techniques for forming and completing a semiconductor device.