Patent ID: 8816417
Filing Date: 2014-08-26
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate; a device isolation layer extending in a first direction on the semiconductor substrate and at least partially defining a bit line; a pair of semiconductor structures electrically contacting the bit line and disposed on the bit line, the semiconductor structures extending in a second direction crossing the first direction; a back bias dielectric disposed on a first side of each of the semiconductor structures, the back bias dielectric being on the bit line and spaced apart from an upper surface of the semiconductor substrate; gate electrodes disposed on a second side of each of the semiconductor structures, the gate electrodes extending in the second direction; and a gate dielectric disposed between each of the corresponding ones of the gate electrodes and the semiconductor structures, wherein: the back bias dielectric is disposed between the first sides of the semiconductor structures facing each other, the back bias dielectric includes a negative fixed charge, and the negative fixed charge accumulates holes at surfaces of the first sides of the semiconductor structures.