Patent ID: 9095081
Filing Date: 2015-07-28
Classification: B23K,H01L,H05K

Abstract:
1. A method comprising: obtaining a structure including: a substrate including a plurality of recesses; a plurality of electrically conductive contact pads, each contact pad being positioned in one of the plurality of recesses in the substrate, and a plurality of solder bumps, each solder bump comprising a solder element comprised of a first solder having a first melting point, each solder element being positioned within one of the plurality of recesses, contacting one of the plurality of contact pads and having a top surface coplanar with a top surface of the substrate, each solder bump further comprising a covering layer comprised of a second solder having a second melting point lower than the first melting point, each covering layer contacting one of the solder elements and extending above the top surface of the substrate; aligning electrically conductive elements of an integrated circuit chip with the solder bumps; causing reflow of the covering layers of second solder, the solder elements comprised of the first solder remaining in a solid state during reflow of the covering layers of second solder, and causing the second solder to solidify such that the structure is attached and electrically connected to the integrated circuit chip.