Patent ID: 9043581
Filing Date: 2015-05-26
Classification: G06F

Abstract:
1. A processing apparatus comprising: a first execution unit which performs computation on two operand inputs each being selectable between read data from a register and an immediate value; a second execution unit which performs computation on two operand inputs, one of which is selectable between read data from a register and an immediate value, and the other of which is only of an immediate value; a control unit which determines, based on a received instruction specifying a computation on first and second source operands, whether each of the first and second source operands specifies read data from a register or an immediate value; a first reservation station, coupled to the first execution unit and including a first execution queue to temporarily store instructions, to dispatch the instructions in the first execution queue to the first execution unit in an order that the instructions are ready for dispatching; a second reservation station, coupled to the second execution unit and including a second execution queue to temporarily store instructions, to dispatch the instructions in the second execution queue to the second execution unit in an order that the instructions are ready for dispatching; wherein: