Patent ID: 8397032
Filing Date: 2013-03-12
Classification: G06F

Abstract:
1. A computer implemented method for recovery in a shared memory data processing environment, the computer implemented method comprising: designating, using a data processing device and a data storage device, a first core in a multi-core processor configuration as a user level core (ULC), wherein the ULC executes an instruction to modify a memory during the course of executing an instruction of an application; designating a second core in the multi-core processor configuration as a operating system core (OSC), wherein the OSC manages checkpointing of a plurality of segments of the shared memory; maintaining a set of flags, the set of flags being accessible to a memory controller, the memory controller managing access to a shared memory in the shared memory data processing environment, a flag in the set of flags corresponding to one segment in the plurality of segments of the shared memory; receiving a message for modification of a cache line in a segment in the plurality of segments; determining, forming a cache line tracking, whether a cache line to be used for the modification has already been used for a similar modification of the segment as requested by the message; sending, responsive to the cache line tracking being negative, an instruction to checkpoint an older version of the cache line in the segment; detecting a successful completion of checkpointing of the older version of the cache line in the segment; and sending an instruction to proceed with the modification requested in the message.