Patent ID: 8766449
Filing Date: 2014-07-01
Classification: H01L,H01R,Y10T

Abstract:
1. A method comprising providing a substrate; forming a first mold on the substrate that defines bottom posts of a plurality of free-standing interconnects; forming bottom posts using the first mold; forming a second mold above the first mold that defines a plurality of different mold geometries corresponding to a plurality of interconnects whose compliance varies from a center of the substrate to edges of the substrate; forming the plurality of interconnects whose compliance varies from the center of the substrate to edges of the substrate using the second mold; forming a third mold above the second mold that defines a top post of each of the plurality of free-standing interconnects; forming top posts for each of the interconnects using the third mold; removing the molds to create free-standing interconnects; wherein forming the second mold comprises depositing a second seed layer and depositing a second layer of photoresist to define the plurality of different mold geometries comprising column interconnects and helix interconnects; wherein forming the third mold comprises depositing a third seed layer and depositing a third layer of photoresist on the third seed layer to define the third mold; and wherein the free-standing interconnects include column interconnects, low/medium compliance helix interconnects and high compliance helix interconnects disposed on the substrate.