Patent ID: 7143243
Filing Date: 2006-11-28
Classification: G06F,Y02D

Abstract:
1. A method for reducing power consumption of a cache memory by eliminating unnecessary tag array searches for sequential memory accesses, the method comprising: receiving a first memory access request by the cache memory; searching the tag array by comparing a tag address associated with the first memory access request with a tag entry stored therein; recording a match result based on the comparison; accessing a first data address on a predetermined cacheline in a data array of the cache memory if the match result indicates that the tag address matches with the tag entry; and using the match result for a second memory access request that intends to access a second data address sequential to the first data address in the cacheline, thereby avoiding searching the tag array for the second memory access request, wherein the recording further includes utilizing a multiplexer to generate an output to enable the data array for the second memory access request if it is sequential to the first memory access request.