Patent ID: 6093936
Filing Date: 2000-07-25
Classification: H01L

Abstract:
An integrated circuit comprising:a single-crystal silicon substrate;said silicon substrate including a pair of adjacent wells of single-crystal silicon, one of said pair of adjacent wells being implanted with a P-type charge carrier dopant and the other of said pair of wells being implanted with an N-type charge carrier dopant;one of said pair of wells including an anti-migration layer of single-crystal silicon over said one well, which anti-migration layer to inhibit migration is implanted with anti-migration atoms selected from the group consisting of: boron, germanium, phosphorous, and arsenic;said pari of wells each also including an amorphized-silicon layer over said single-crystal silicon, which amorphized-silicon layer is formed of silicon of said substrate which is substantially amorphized by implantation of noble gas atoms, at said amorphized silicon layer over said one well silicon of said substrate further forming triplex compounds to inhibit lateral migration of said anti-migration layer; andsaid integrated circuit also including a field oxidation layer over said amorphized-silicon layer, said field oxidation layer including silicon of said amorphized silicon layer which is oxidized to form silicon oxide including noble gas atoms.