Patent ID: 7611949
Filing Date: 2009-11-03
Classification: H01L

Abstract:
1. A method of fabricating a metal-oxide-semiconductor transistor, comprising: forming a patterned hard mask layer on a substrate, wherein the patterned hard mask layer has an opening formed therein; forming a spacer on a sidewall of the patterned hard mask layer in the opening; using the patterned hard mask layer and the spacer as a mask, performing an isotropic etching process on the substrate to form a recess in the substrate, wherein the recess includes an upper portion and a lower portion; using the patterned hard mask layer and the spacer as a mask, performing an ion implant process using oxygen-restrained ions on the substrate in the lower portion of the recess; removing the spacer; and performing a thermal oxidation process to form a gate oxide layer on a surface of the substrate within the recess such that a thickness of the gate oxide layer in the upper portion of the recess is greater than that of the gate oxide layer in the lower portion of the recess.