Patent ID: 6548883
Filing Date: 2003-04-15
Classification: H01L

Abstract:
A semiconductor substrate having a spacing between at least two adjacent wiring lines, the substrate comprising:at least two wiring lines extending substantially, adjacently parallel along at least a portion of a longitudinal length of each, said at least two wiring lines defining a space therebetween along said at least said portions of said longitudinal lengths, said space defining a lateral width and a height thereof; and a plurality of hollow spheres disposed in said space between said at least two wiring lines along said at least said portions of said longitudinal lengths, each of said plurality of hollow spheres having a substantially equal diameter; wherein said lateral width of said space substantially corresponds with at least one of said diameter and an integer multiple of said diameter of said plurality of hollow spheres; and wherein said height of said space substantially corresponds with at least one of said diameter and an integer multiple of said diameter of said plurality of hollow spheres.