Patent ID: 8012650
Filing Date: 2011-09-06
Classification: G03F,H01L

Abstract:
1. A semiconductor device manufacturing method, comprising: forming a resist over a wafer; performing a first exposure exposing a first shot position of the resist using a reticle including a first area and a second area in an outer periphery of the first area, the first area having first patterns for forming semiconductor chips, and the second area having second patterns for forming monitor elements or monitor circuits; performing a second exposure exposing a second shot position adjacent to the first shot position of the resist using the reticle so that the second area in the first exposure and the second area in the second exposure overlap with each other between the first shot position and the second shot position; and forming the semiconductor chips and a circuit enclosing all the semiconductor chips on the wafer, the formed circuit including the monitor elements or the monitor circuits electrically connected in series; wherein neither the monitor elements nor the monitor circuits are formed between the first area in the first exposure and the first area in the second exposure.