Patent ID: 9135011
Filing Date: 2015-09-15
Classification: G06F

Abstract:
1. Apparatus for processing data comprising: instruction decoding circuitry configured to decode program instructions, each having an instruction address, to generate control signals for controlling data processing circuitry to perform data processing operations specified by said program instructions; branch prediction circuitry configured to perform a prediction of a branch outcome of a branch instruction in dependence upon at least an instruction address of said branch instruction; and next branch table circuitry configured to store data identifying for given instruction address in a computer program flow a next branch instruction address of a next branch instruction following said given instruction address within a current pass through said computer program flow; wherein said next branch table circuitry is configured to supply said next branch instruction address to said branch prediction circuitry before said instruction decoding circuitry identifies said next branch instruction as a branch instruction during said current pass; and said branch prediction circuitry is configured to use said next branch instruction address received from said next branch table circuitry to commence prediction of a next branch outcome of said next branch instruction before said instruction decoding circuitry decodes said next branch instruction during said current pass.