Patent ID: 6815746
Filing Date: 2004-11-09
Classification: B82Y,G11C,H01L

Abstract:
A semiconductor device comprising:a wiring board having a main surface, an insulating film formed on the main surface, and a plurality of electrodes formed on the main surf ace, said wiring board having external electrode terminals formed on a back surface used as a reverse side of the main surface; semiconductor chips each having a main surface and a back surface and having one or more semiconductor elements and a plurality of electrodes formed on the main surface, said back surface being fixed to the main surface of said wiring board face to face therewith with an adhesive interposed therebetween; conductive wires which connect electrodes on the main surface of said wiring board to electrodes of said each semiconductor chip; and an encapsulater which covers said semiconductor chips, the main surface of said wiring board and the electrodes, wherein at least one dynamic random access memory chip with a dynamic random access memory built therein and at least one flash memory chip with a flash memory built therein are fixed to said wiring board as said semiconductor chips, wherein the electrodes of said flash memory chip are respectively disposed side by side in a row along edges of both short sides thereof, wherein the electrodes of said dynamic random access memory chip are disposed side by side along a long side thereof, wherein the address electrodes are larger in number than the data electrodes in an electrode row of one short side of said flash memory chip, and the data electrodes are larger in number than the address electrodes in an electrode row of the other short side of said flash memory chip, wherein the address electrodes are larger in number than the data electrodes in a half electrode row close to one short side of said flash memory chip with respect to distributions of the address electrodes and data electrodes in the electrode rows of said dynamic random access memory chip, and wherein the data electrodes are larger in number than the address electrodes in a half electrode row close to the other short side of said flash memory chip.