Patent ID: 6133145
Filing Date: 2000-10-17
Classification: H01L

Abstract:
A method for fabricating a metal interconnect structure, on a semiconductor substrate, comprising the steps of:providing conductive elements in said semiconductor substrate;providing an insulator layer on said semiconductor substrate, and providing an opening in said insulator layer, exposing a conductive element;depositing an adhesive metal layer on the top surface of said insulator layer, and on said conductive element, located in the opening in said insulator layer;depositing a barrier layer on said adhesive layer;depositing a conductive metal layer on said barrier layer;depositing an anti-reflective coating, (ARC), layer, on said conductive metal layer;forming a photoresist shape on said ARC layer;performing a first dry etching cycle, in a plasma etch system, removing regions of said ARC layer, not protected by said photoresist shape;performing a plasma treatment to said photoresist shape, in a nitrogen containing ambient, in situ in said plasma etch system, creating a plasma treated photoresist shape;performing a second dry etching cycle, in situ in said plasma etch system, removing: regions of said conductive metal layer; regions of said barrier layer; and regions of said adhesive metal layer, not protected by said plasma treated photoresist shape; andremoving said plasma treated photoresist shape, resulting in said metal interconnect structure comprised of: said ARC layer; said conductive metal layer; said barrier layer; and said adhesive layer.