Patent ID: 8330873
Filing Date: 2012-12-11
Classification: H04N

Abstract:
1. A processing block configured to demodulate a channel signal component contained within an input signal, wherein the processing block comprises: a first signal processing pathway configured to process the input signal to remove extraneous signal components and output down-shifted frequency components of the channel signal component; and a carrier recovery block coupled to the first signal processing pathway and configured to receive the down-shifted frequency components of the channel signal component, lock onto a carrier signal frequency in the down-shifted frequency components of the channel signal component, and provide a demodulated channel signal, wherein the carrier recovery block is further configured to operate in an overmodulation handling mode that modifies operation when locking onto the carrier signal frequency in the presence of overmodulation by tracking at least one of a frequency error signal and a phase error signal, the tracking including at least one of: applying a weight to at least one of the frequency error signal and the phase error signal; and using a previous correction value.