Patent ID: 7071787
Filing Date: 2006-07-04
Classification: H03L,H03M

Abstract:
1. A phase-locked loop-type frequency synthesizer comprising: a reference signal source for providing a reference signal having a first frequency; a programmable oscillator for providing an oscillating signal having a second frequency; a programmable pre-scaler for dividing the oscillating signal from said programmable oscillator according to a sequence of divide ratios to produce a divided signal having a frequency approximating the first frequency; a phase comparator for a) comparing said divided signal and said reference signal, b) determining, if any, a phase difference between said divided signal and said reference signal and c) generating a control signal for adapting said programmable oscillator to reduce a phase difference between said divided signal and said reference signal; and a modulator for providing said sequence of divide ratios wherein a next value in said sequence of divide ratios is provided by (a) accumulating an error between a present value in said sequence of divide ratios and an average value of said sequence of divide ratios, (b) accumulating the accumulated errors, and (c) selecting the next value in said sequence of divide ratios such that the multiply-accumulated error values are maintained within finite bounds, wherein said modulator comprises: