Patent ID: 6620684
Filing Date: 2003-09-16
Classification: H01L

Abstract:
A method of manufacturing a nonvolatile memory cell, the method comprising the steps of:sequentially forming a tunnel oxide film, a first polysilicon layer, a dielectric film, a second polysilicon layer, a tungsten layer and a hard mask layer on a semiconductor substrate; etching said hard mask layer, said tungsten layer, said second polysilicon layer and said dielectric film in one direction to form a control gate electrode; performing a first selective oxidization process to form a first oxide layer on both sides of said second polysilicon layer and said dielectric film; forming a first spacer on both sides of said control gate electrode; etching said first polysilicon layer and said tunnel oxide film to form a floating gate electrode; performing a source/drain ion implantation process to form a source region and a drain region; performing a second selective oxidization process to form a second oxide layer on said source and said drain regions; and forming a second spacer on both sides of said floating gate electrode and said control gate electrode.