Patent ID: 6812105
Filing Date: 2004-11-02
Classification: H01L

Abstract:
A method of fabricating a thin channel silicon-on-insulator device comprising:providing a structure including at least a substrate having a layer of semiconducting material atop an insulating layer and a gate region formed atop said layer of semiconducting material; forming a conformal oxide film atop said structure; implanting said conformal oxide film with a first dopant impurity to form a first dopant impurity region; forming a set of spacers atop said conformal oxide film, said set of spacers are adjacent to said gate region; removing portions of said conformal oxide film, not protected by said set of spacers to provide an exposed region of semiconducting material; forming raised source/drain regions on said exposed region of said semiconducting material; implanting said raised source/drain regions with a second dopant impurity to form a second dopant impurity region; and activating said first dopant impurity region and said second dopant impurity region, whereby source/drain and source/drain extension regions are formed in said layer of semiconducting material.