Patent ID: 7633311
Filing Date: 2009-12-15
Classification: H03K

Abstract:
1. An input buffer comprising: a differential voltage comparator having a first input to receive an input signal, a second input to receive a reference voltage, and a third input, the differential voltage comparator varying a comparator output voltage on a first output and an inverse comparator output voltage on a second output in response to a difference between the input signal and the reference voltage; a feedback circuit connected to source current into the first output when the comparator output voltage on the first output rises to a logic high, and into the second output when the inverse comparator output voltage on the second output rises to a logic high; a reference circuit connected to supply the reference voltage to the second input of the differential voltage comparator, the reference circuit having an input to receive a bias voltage; and a bias circuit connected to supply the bias voltage to the input of the reference circuit, the bias circuit supplying the bias voltage to the third input of the differential voltage comparator, the bias voltage to define a magnitude of a tail current in the differential voltage comparator.