Patent ID: 9076770
Filing Date: 2015-07-07
Classification: H01L

Abstract:
1. An integrated circuit die stack comprising: a first die mounted upon a substrate; and a second die mounted on the first die; both dies having a plurality of through silicon vias (‘TSVs’), the TSVs connected through fuses to electronic circuitry on each die, wherein a portion of the TSVs of each die are connected to blown fuses and converted to pass-through vias (‘PTVs’), wherein the second die is mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die; and an interface die mounted upon the substrate between the substrate and the first die splitting and connecting a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die.