Patent ID: 7369580
Filing Date: 2008-05-06
Classification: H04B

Abstract:
1. An amplitude limiting circuit for limiting an amplitude of a signal input to a power amplifier, comprising: an amplitude converter which calculates an amplitude value of an input signal; a determination unit which detects, as a detection interval, an interval in which the amplitude value exceeds a threshold, on a basis of a preset threshold and the amplitude value of the input signal; a peak detector which detects, in the detection interval, a peak time when a maximum amplitude value appears and said maximum amplitude value at the peak time as a peak value; a window filter which generates a window function for limiting the amplitude value to a value not more than the threshold by using the peak value output from said peak detector; a delay circuit which delays the input signal such that the peak dine output from said peak detector coincides with a time when the window function output from said window filter exhibits a minimum value; and a multiplier which multiplies an output signal from said delay circuit by the window function, wherein said input signal comprises an in phase component I and a quadrature component O, and said amplitude value of said input signal comprises (I