Patent ID: 6624773
Filing Date: 2003-09-23
Classification: H04K

Abstract:
A converter comprising:an array of transistors; an analog read circuit coupled to the array during a first operation, the analog read circuit having an output terminal for an analog output signal representing a threshold voltage of a transistor identified by a selected digital signal during the first operation; an input terminal for an analog input signal; a first select circuit coupled to the array, the output terminal, and the input terminal, wherein the select circuit selects an analog signal, selects a set of transistors in the array, and applies the selected analog signal to gates of transistors in the selected set, and during a second operation, the first select circuit selects one of the analog output signal and the analog input signal as the selected analog signal; an encoder coupled to the array, wherein the encoder generates a multibit digital output signal that represents a digital output value, the digital output value depending on which of the transistors conduct during the second operation; an input port for a digital input signal; and a second select circuit that generates the selected digital signal, the selected signal being dependent on one of the digital output signal and the digital input signal during the first operation.