Patent ID: 8112621
Filing Date: 2012-02-07
Classification: G06F

Abstract:
1. A storage apparatus, comprising: a host interface unit for sending and receiving information to and from a host apparatus via a communication network; a storage unit for storing data; a disk interface unit for controlling access to the storage unit; and a control unit for analyzing information received by the host interface unit and controlling the storage unit according to the analytical result; wherein the control unit includes: a plurality of processor cores for executing arithmetic processing according to a software resource; and a plurality of processing-target programs corresponding to each of the processor cores and a plurality of address mapping tables corresponding to each of the processor cores as the software resource; wherein each of the address mapping tables has a logical address to be used by each of the processor cores for selecting each of the processing-target programs, and a physical address showing an actual storage destination of each of the processing-target programs; wherein the logical address of each of the address mapping tables is set to a same logical address that is common to each of the processor cores, and the physical address of each of the address mapping tables is set to a different physical address in correspondence with the actual storage destination of each of the processing-target programs; and wherein each of the processor cores, on start-up, selects a self address mapping table among the plurality of address mapping tables and uses the selected address mapping table, uses the same logical address that is common to each of the processor cores to execute address mapping processing, selects a processing-target program corresponding to a physical address obtained in the address mapping processing among the plurality of processing-target programs, and executes processing according to the selected processing-target program.