Patent ID: 6489689
Filing Date: 2002-12-03
Classification: H01L

Abstract:
A semiconductor device, comprising:a plurality of wiring layers; an output transistor provided on a substrate; a power supply line provided in a predetermined one of the wiring layers for supplying power to the output transistor; a pad for connecting an output of the output transistor to an external unit; and a metal line for connecting the output transistor to the pad, said metal line extending over said output transistor, wherein: the metal line is provided in a first one of said plurality of wiring layers that is higher in position than said predetermined one of the wiring layers in which the power supply line is provided; and a wiring area ratio of a second one of said plurality of wiring layers, which is provided under said predetermined one of the wiring layers in which the power supply line is provided, is less that a wiring area ratio of said predetermined one of the wiring layers in which the supplied supply line is provided.