Patent ID: 7239545
Filing Date: 2007-07-03
Classification: G11C

Abstract:
1. A magnetic random access memory comprising: a first write wiring which runs in a first direction; a second write wiring which runs in a second direction different from the first direction and has a first crossing angle and second crossing angle formed by crossing the first write wiring, the first crossing angle and second crossing angle being located on both sides of the first write wiring serving as a boundary; a first magnetoresistive element which is arranged at an intersection of the first write wiring and the second write wiring between the first write wiring and the second write wiring, has a first axis of easy magnetization directed to a side of the first crossing angle, and has a first fixed layer, a first recording layer, and a first tunnel barrier layer sandwiched between the first fixed layer and the first recording layer, the first recording layer including a first ferromagnetic layer located on a side of the first fixed layer, a second ferromagnetic layer, and a first nonmagnetic layer sandwiched between the first ferromagnetic layer and the second ferromagnetic layer; and a second magnetoresistive element which is arranged at the intersection of the first write wiring and the second write wiring between the first write wiring and the second write wiring and electrically connected to the first magnetoresistive element, has a second axis of easy magnetization directed to a side of the second crossing angle, and has a second fixed layer, a second recording layer, and a second tunnel barrier layer sandwiched between the second fixed layer and the second recording layer, the second recording layer including a third ferromagnetic layer located on a side of the second fixed layer, a fourth ferromagnetic layer, and a second nonmagnetic layer sandwiched between the third ferromagnetic layer and the fourth ferromagnetic layer, wherein in a write operation, magnetizations in the first recording layer and second recording layer execute a toggle operation by using the first write wiring and second write wiring.