Patent ID: 6735643
Filing Date: 2004-05-11
Classification: G06F

Abstract:
An electronic card with dynamic memory allocation management, comprising:a memory having data input lines; a dynamic memory controller, which is coupled to the memory and has a selector, and at least a first base register, a second base register and a third base register; a first DMA controller, which is coupled to the dynamic memory controller, and provides an output address to be added to a base value of the first base register for retrieving data to or from the memory; a micro-controller, which is coupled to the dynamic memory controller and provides an output address to be added to a base value of the second base register for retrieving data to or from the memory; a second DMA controller, which is coupled to the dynamic memory controller and provides an output address to be added to a base value of the third base register for retrieving data to or from the memory; wherein, when the micro-controller, the first DMA controller or the second DMA controller issues an access request to the memory, the dynamic memory controller controls the selector to select one of the micro-controller, the first DMA controller or the second DMA controller, for accessing the memory respectively, such that output data from the first DMA controller, the second DMA controller or the micro-controller is received by the data lines of the memory via the selector, which further includes: a first multiplexer having a plurality of input pins for receiving address output from adding output addresses of the first DMA controller, the second DMA controller and the micro-controller to base values of the corresponding base registers, respectively, and an output pin connected to address lines of the memory; and a second multiplexer having a plurality of input pins for receiving data output of the first DMA controller, the second DMA controller and the micro-controller, respectively, and an output pin connected to the data input lines of the memory.