Patent ID: 6221719
Filing Date: 2001-04-24
Classification: H01L

Abstract:
Process for manufacturing of a DMOS-technology transistor, providing for forming, over a semiconductor material layer of a first conductivity type, an insulated gate electrode, introducing in said semiconductor material layer a first dopant of a second conductivity type for forming at least one body region of a second conductivity type extending under the insulated gate electrode, and introducing in said at least one body region a second dopant of the first conductivity type for forming, inside said body region, at least one source region of the first conductivity type, said body region and said source region defining, under the insulated gate electrode, a channel region for the DMOS transistor, wherein said first dopant is aluminum, and in that the process provides, after the introduction of said first dopant and said second dopant, a single thermal diffusion process for simultaneously diffusing the first dopant and the second dopant.