Patent ID: 9208865
Filing Date: 2015-12-08
Classification: G11C

Abstract:
1. A resistance-change memory comprising: a memory cell comprising a first electrode, a second electrode, and a variable resistance layer which is disposed between the first electrode and the second electrode and which is shifted between a high-resistance state and a low-resistance state lower in resistance than the high-resistance state; and a control circuit which applies a voltage across the first electrode and the second electrode to change a resistance state of the memory cell, wherein the control circuit includes a current limiting circuit, wherein the current limiting circuit in the control circuit performs a first operation to set a current flowing through the memory cell to a first upper limit having a first constant level to change the memory cell toward the low-resistance state, wherein after the first operation, the current limiting circuit in the control circuit performs a second operation to check the resistance of the memory cell, wherein after the second operation, if the resistance of the memory cell is higher than a predetermined value, the current limiting circuit in the control circuit performs a third operation to set the current flowing through the memory cell to a second upper limit which has a second constant level and which is higher than the first upper limit to change the memory cell toward the low-resistance state, wherein the control circuit sets the current flowing through the memory cell to the first upper limit and then sets the current to a third upper limit in the first operation, and wherein the control circuit applies a first voltage to the memory cell when set to the first upper limit, the control circuit applies a second voltage higher than the first voltage to the memory cell when set to the second upper limit, and the control circuit applies a third voltage higher than the first voltage and lower than the second voltage to the memory cell when set to the third upper limit.