Patent ID: 6233672
Filing Date: 2001-05-15
Classification: G06F

Abstract:
A floating point unit for a microprocessor comprising:an execution pipeline;a rounding mode storage circuit coupled to said execution pipelinea control word storage circuit coupled to the rounding mode storage circuit;wherein said rounding mode storage circuit and said control word storage circuit are configured to store a rounding mode indicative of a type of rounding to be applied to results of floating point instructions;a control unit circuit coupled to said rounding mode storage circuit, wherein said control unit circuit is configured to detect a dispatched control word update instruction, and wherein said control unit circuit is configured to update said rounding mode storage circuit with an updated rounding mode in response to said control unit circuit detecting the dispatched control word update instruction, wherein said control unit circuit updates said rounding mode storage circuit prior to execution of the dispatched control word update instruction;wherein said execution pipeline is configured to receive said updated rounding mode along with a particular instruction as said particular instruction is dispatched into said execution pipeline, and wherein the execution pipeline is further configured to round a particular result corresponding to said particular instruction according to said updated rounding mode;wherein the control word storage circuit is configured to be updated with the updated rounding mode after execution of the dispatched control word update instruction.