Patent ID: 6556938
Filing Date: 2003-04-29
Classification: G01R

Abstract:
A method for testing an integrated circuit (IC), the IC having a first pad and a first parametric test circuit, the first pad being configured as a signal interface for components external to the IC, the first parametric test circuit being internal to the IC and being adapted to test at least one parameter of the IC, said method comprising the steps of:electrically interconnecting automated test equipment (ATE) with the IC; providing at least one stimulus from the ATE to the IC such that the first parametric test circuit measures at least one parameter of the first pad; and receiving information corresponding to the at least one parameter measured by the first parametric test circuit, wherein the ATE has a first operating frequency and the IC has a plurality of pads and a plurality of parametric test circuits, and wherein the step of providing at least one stimulus comprises the step of measuring, by the plurality of parametric test circuits, parameters of the plurality of pads at a frequency higher than the first operating frequency of the ATE.