Patent ID: 6362651
Filing Date: 2002-03-26
Classification: H01L,H03K

Abstract:
A method for producing a programmable logic device, the method comprising:forming first and second discrete programmable logic device circuits on a wafer with a scribe line space provided therebetween, each of the first and second programmable logic device circuits including logic circuits and interconnect resources for selectively providing signal paths between the logic circuits, wherein a device-linking conductor extends from the first programmable logic device circuit to the second programmable logic device circuit across the scribe line space; and dicing the wafer into a plurality of chips, each chip including at least one of the first and second discrete programmable logic device circuits, wherein forming the first and second discrete programmable logic device circuits comprises forming a plurality of programmable switches for selectively connecting adjacent pairs of interconnect segments, and forming the device-linking conductor between a first programmable switch of the first discrete programmable logic device circuit and a second programmable switch of the second discrete programmable logic device circuit.