Patent ID: 6057175
Filing Date: 2000-05-02
Classification: A61N,H01L,H05K

Abstract:
A method of packaging one or more high voltage components, the method comprising the steps of:providing a substrate having a first substrate side and a second substrate side and including one or more device formation regions, each device formation region of the substrate formed by:extending at least two conductive vias through said substrate from said first substrate side to said second substrate side;forming a conductive bond pad formed on the first substrate side in electrical contact with each conductive via; andforming a conductive package connection pad on the second substrate side in electrical contact with each conductive via;providing at least one high voltage component adapted to fit to each such device formation region having at least two electrical terminals and operable with a potential greater than about 50 volts applied across said two electrical terminals;electrically connecting said at least two electrical terminals of said high voltage component to two conductive bond pads in each of the device formation regions on the first substrate side, the high voltage component being operable with a potential greater than about 50 volts applied through conductive package connection pads and said two electrical terminals;forming an encapsulating material over the one or more device formations regions of the substrate including the at least one high voltage component and the conductive bond pads in each device formation region, the encapsulating material after curing, having a dielectric constant greater than about 100 volts per mil; andsingulating the encapsulated device formation regions resulting in one or more encapsulated packages enclosing at least one high voltage component within said encapsulating material, wherein the encapsulated package has a package to component size ratio in the range of about 1.2 to about 3.0.