Patent ID: 7667333
Filing Date: 2010-02-23
Classification: H01L

Abstract:
1. A stack of semiconductor chips comprising: a substrate or an interposer board comprising conductor structures for electrical connection of the stack, a first chip including an active side with peripherally arranged bonding pads mounted face-up on the substrate or the interposer board; a further chip including a further active side with peripherally arranged bonding pads; and a mold cap embedding a back side and at least two chip edges of the further chip and including a protuberance at the back side of the further chip, the protuberance forming a substantially planar first surface extending substantially parallel to and a distance from the back side of the further chip, wherein the further chip is attached face-up to the active side of the first by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between the first chip and the further chip thereby providing a gap therebetween, the protuberance having at least one linear dimension that is smaller than a linear dimension of the first chip.