Patent ID: 6638807
Filing Date: 2003-10-28
Classification: H01L

Abstract:
A method of fabricating a gated lateral bipolar transistor, the method comprising:forming a single crystalline semiconductor structure on a substrate, wherein the structure includes a body/base region, an upper surface, and opposing sidewall surfaces; forming an insulator layer between the substrate and the single crystalline semiconductor structure; forming a source/emitter region and a collector/drain region on a first one of the opposing sidewall surfaces; forming a dielectric layer between the source/emitter region and the collector/drain region on the first one of the opposing sidewall surfaces; forming a gate on the dielectric layer on the first one of the opposing sidewall surfaces; and forming a body contact coupled to the body/base region on a second one of the opposing sidewall surfaces, such that the transistor exhibits both bipolar junction transistors (BJT) and metal-oxide semiconductor (MOS) action.