Patent ID: 8799583
Filing Date: 2014-08-05
Classification: G06F

Abstract:
1. A method for performing a sequence of memory access operations on a processor accessing shared data within a multiple processor system, the method comprising: performing the following with a processor: setting a flag into a first state; executing, by a first processor subsequent to the setting the flag, a sequence of program instructions comprising at least one instruction accessing selected data elements within a local cache of the first processor, the local cache storing a subset of shared data accessed by multiple processors; determining a modification by a second processor of the subset of shared data, the determining the modification comprising: based on determining that the single line of local cache stores at least some of the selected data elements, setting, during the executing, the flag into a second state; and subsequent to the executing the sequence of program instructions and based on the flag being in the first state, outputting a control to select execution of a first program.