Patent ID: 6518840
Filing Date: 2003-02-11
Classification: H03F,H03G

Abstract:
A BiCMOS circuit for amplifying an input signal comprising:a) a first transistor having a base, a collector and an emitter, the base for receiving the input signal, the first transistor for pre-amplifying the input signal to provide a pre-amplified signal; b) a second transistor having a base, emitter and collector, the base being coupled with the first pre-amplifying transistor for receiving and amplifying the pre-amplified signal; c) a first bias block generator for receiving a variable voltage independent of the pre-amplified signal and of the amplified pre-amplified signal and for biasing the base of one of the first and second transistors to a plurality of operating states; and, d) a circuit coupled to the base of at least one of the first and second transistors for providing variable shunting of AC signals present at the base of one of the first and second transistors to a distal location from the base, in dependence upon the variable voltage.