Patent ID: 8175207
Filing Date: 2012-05-08
Classification: H04L

Abstract:
1. A method for tracking jitter in a recovered clock signal using an inter-symbol interference (ISI) pattern-weighted early-late phase detector, the method comprising: receiving an electromagnetic waveform representing an analog serial data stream; generating an I clock and Q clock having a fixed phase delay with respect to the I clock; dividing the I clock frequency by n, creating a reference clock; sequentially sampling the serial data stream with the I clock, creating digital I-bit values; sequentially sampling the serial data stream with the fixed phase delay Q clock and a varied phase delay Q clock having a varying phase delay with respect to the I clock, creating digital Q-bit values; segmenting the I-bit values into n-bit digital words; segmenting the Q-bit values into n-bit digital words; in response to analyzing the I-bit, and Q-bit values associated with the fixed phase delay Q clock, identifying an I clock phase correction; in response to comparing Q-bit values sampled by the varied delay Q clock, determining a modulation factor; identifying bit sequence patterns associated with each I-bit value; weighting each I-bit value in response to the identified bit sequence pattern and the identified I clock phase correction; averaging the weighted I-bit values for each n-bit digital word; applying the modulation factor to the weighted I-bit value averages, generating digital I and Q phase error signals; and, in response to the I and Q phase error signals, creating electromagnetic signals representing the I and Q clocks, modified in phase.