Patent ID: 6146951
Filing Date: 2000-11-14
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device adapted to be inserted between an input pad and an inside circuit for protection against an electrostatic discharge generating from the input pad, said method comprising the steps of:implanting first impurity ions of a first conductivity type into a substrate so as to form a first impurity ion layer below a location at which a junction region connected to the input pad is to be formed;implanting second impurity ions of the first conductivity type into said substrate so as to form a second impurity ion layer interposed between said first impurity ion layer and said location, said first impurity ion layer being overlapped laterally with said second impurity ion layer;implanting third impurity ions of a second conductivity type into said substrate so as to form third impurity ion layers, each of which is located on a lateral side of said first and second impurity ion layers; andforming a first well and second wells from said first and second impurity ion layers and said third impurity ion layers, respectively, through an annealing process such that said first well is formed with upper edges, each of which projects laterally outwardly into a corresponding one of said second wells.