Patent ID: 9166612
Filing Date: 2015-10-20
Classification: H03K,H03M

Abstract:
1. A semiconductor device comprising: an asynchronous successive approximation type A/D converter that samples an external analog signal in a sampling period, generates an internal clock signal in a comparison period, performs first to n-th comparisons in synchronization with first to n-th leading edges (where n is an integer equal to or greater than 2) of the internal clock signal, and converts the external analog signal to a multi-bit digital signal on the basis of a comparison result, wherein the asynchronous successive approximation type A/D converter includes a sequence register that outputs first to n-th signals indicating that the first to n-th comparisons have been performed, respectively, the semiconductor device further comprising a control circuit that detects whether or not the n-th signal is output when a period transitions from the comparison period to the sampling period, and that controls a cycle of the internal clock signal on the basis of a detection result.