Patent ID: 7233612
Filing Date: 2007-06-19
Classification: H03M,H04L

Abstract:
1. A method in a deinterleaver module for deinterleaving interleaved data into deinterleaved data, the method including: generating a write enable signal for writing a code word fragment into one of a group of partitioned memory banks, the write enable signal having a period based on a prescribed maximum number of code word bits for the code word fragment relative to a prescribed clock, and an enable duration having a number of clock cycles corresponding to a prescribed number of the code word bits in the code word fragment based on a prescribed modulation of the interleaved data; generating an address signal based on the prescribed modulation and a selected offset, including selectively incrementing, based on the prescribed modulation, the address signal by the selected offset each clock signal concurrent with the enable duration; generating successively delayed copies of the write enable signal and the address signal for others of the group of partitioned memory banks; and storing a first group of the code word fragments into the respective group of partitioned memory banks, by supplying to the respective partitioned memory banks the address and write enable signals and the successively delayed copies thereof, wherein: (1) each code word fragment is associated with a corresponding prescribed subcarrier frequency and has the prescribed number of code word bits, and (2) the storing includes writing the code word bits for each code word fragment into respective selected locations of the corresponding memory bank based on the corresponding address signal and the corresponding write enable signal.