Patent ID: 6352906
Filing Date: 2002-03-05
Classification: H01L

Abstract:
A method of forming an integrated circuit comprising the steps of preparing a silicon on insulator substrate;etching a set of isolation trenches in a top surface of said substrate, said set of isolation trenches defining a set of transistor active areas and having vertical trench sidewalls; growing a layer of nitridized oxide on said vertical trench sidewalls at a temperature greater than about 1,000Â° C. in an ambient containing one of NO and N2O; filling said set of isolation trenches with a dielectric and forming a set of transistors in said set of transistor active areas, and connecting said set of transistors to from said integrated circuit; in which said step of growing said layer of nitridized oxide comprises growing said layer to a thickness greater than about 20 nm, whereby nitrogen diffuses under said set of active areas to form a layer of nitridized oxide under said set of active areas.