Patent ID: 6191637
Filing Date: 2001-02-20
Classification: G05F

Abstract:
An apparatus including an integrated switched capacitor bias circuit for generating a reference signal which is proportional to absolute temperature, a capacitance and a clock signal frequency, said integrated switched capacitor bias circuit comprising:a current mirror circuit that includes primary, first and second circuit branches and, in response to a bias voltage received via said primary and first circuit branches, provides a node voltage via said first circuit branch and provides a primary current, a first mirrored current and a second mirrored current via said primary, first and second circuit branches, respectively, wherein said node voltage is responsive to said first mirrored current;a bias circuit, coupled to said current mirror circuit, that provides said bias voltage in response to said node voltage; anda switched capacitor circuit, coupled to said first current mirror circuit branch, that includes a capacitance and, in response to first and second clock signals which are equal in frequency and mutually inverse in phase, receives and conducts said first mirrored current in proportion to an absolute temperature of said switched capacitor circuit, said capacitance and said clock signal frequency;wherein said second mirrored current is proportional to a product of said absolute temperature, said capacitance and said clock signal frequency.