Patent ID: 8698304
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A multi-chip package comprising: a semiconductor chip stack including a first semiconductor chip having a first power rating and a second semiconductor chip having a second power rating, the first and second semiconductor chips being stacked one on top of another; and a heat transfer blocking spacer interposed between the first semiconductor chip and the second semiconductor chip, the material of the heat transfer blocking spacer comprising at least one of magnesium carbonate, calcium silicate, magnesia, perlite, cork, cotton felt, cork carbide, asbestos, glass wool, quartz wool, and kieselguhr and having a lower thermal conductivity than the materials of the first semiconductor chip and the second semiconductor chip, whereby the heat transfer blocking spacer reduces thermal interference between the chips, wherein a thickness of the heat transfer blocking spacer is between 50 μm and 400 μm, both inclusive.