Patent ID: 7755530
Filing Date: 2010-07-13
Classification: H03M

Abstract:
1. An analog-to-digital converter, comprising: a pulse delay circuit, having M (M is an integer equal to or higher than two) delay units, that transmits a pulse signal through the delay units serially arranged and delays the pulse signal in each delay unit by a delay time corresponding to a level of an analog signal; a data holding unit that latches the pulse signal delayed in each delay unit at N (N is an integer equal to or higher than two) sampling times to hold each of M×N values at M×N sampling points of the pulse signal as a piece of latched data; and a converted data producing unit that receives the M×N pieces of latched data from the data holding unit as a single piece of combined data which is composed of the M×N latched data arranged in an order corresponding to an arranging order of the M×N sampling points in the pulse signal, and converts the combined data into numeral data, corresponding to a position of the pulse signal in the pulse delay circuit, at one time as converted digital data corresponding to the level of the analog signal.