Patent ID: 6958248
Filing Date: 2005-10-25
Classification: G01N,G01R,H01J,H01L

Abstract:
1. A method of establishing a non-transient voltage contrast between a first: doped region and a second doped region in a semiconductor wafer portion, said semiconductor wafer portion having a first surface and a second surface opposite said first surface; said wafer portion having a first semiconductor surface region of said second surface directly atop said first doped region, and having a second semiconductor surface region of said second surface directly atop said second doped region, said voltage contrast being observable on a charged particle beam image of said wafer portion, the method comprising the steps of: installing said wafer portion in a vacuum chamber in a charged particle beam apparatus; etching said first semiconductor surface region and said second semiconductor surface region with an etch chemistry for a first time period, for removing an implanted material-containing portion of said first semiconductor surface region and said second semiconductor surface region; following said first time period, depositing an insulator layer atop said etched first semiconductor surface region and said etched second semiconductor surface region; and forming an image of said first doped region and said second doped region from secondary electrons emitted from said first and said second doped region, said first doped region being unbiased electrically from said second doped region.