Patent ID: 6972471
Filing Date: 2005-12-06
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor silicon substrate with a first type conductivity; an epitaxial layer with a second type conductivity different from the first type conductivity which is formed on the semiconductor silicon substrate, wherein the epitaxial layer comprises at least a deep trench and the epitaxial layer surrounding both sidewalls of the deep trench has the same type conductivity; an ion diffusion region with the first type conductivity which is formed in the epitaxial layer and surrounds the sidewall and bottom of the deep trench; and an undoped polysilicon layer filling the deep trench; wherein, the combination of the ion diffusion region and the undoped polysilicon layer serves as a deep trench isolation structure; wherein the semiconductor device comprises two deep trench isolation structures to define a high-voltage area; wherein the high-voltage area comprises: a buried layer with the second type conductivity formed between the epitaxial layer and the semiconductor silicon substrate; a plurality of field oxidation regions formed in the epitaxial layer, wherein a first field oxidation region, a second field oxidation region and a third field oxidation region are successively arranged between the two deep trench isolation structures; a sinker with the second type conductivity formed in the epitaxial layer between the first field oxidation region and the second field oxidation region; a body with the first type conductivity formed in the epitaxial layer between the second field oxidation region and the third field oxidation region; a gate structure formed overlying the body; a pair of first diffusion regions with the second type conductivity formed in the body and laterally adjacent to the gate structure; and a pair of second diffusion regions with the first type conductivity formed in the body and laterally adjacent to the first diffusion regions, respectively.