Patent ID: 7701271
Filing Date: 2010-04-20
Classification: H03L

Abstract:
1. A charge pump configured for use in a phase-locked loop (PLL), the charge pump comprising: a positive current source; a negative current source; a plurality of transistor switches; a set of three voltage nodes; and a plurality of operational amplifiers, wherein: a) the positive and negative current sources each includes an output node; b) the output nodes are respectively connected sequentially to the three voltage nodes having substantially the same voltage; c) the transistor switches are configured to sequentially switch such that at all times there is one transistor switch connection; and d) positive and negative currents from the positive and negative current sources, respectively, flow through the transistor switches into one of the three nodes; wherein the PLL includes: a) a phase detector configured to generate phase error pulses; and b) a phase-locked loop (PLL) filter; and wherein: a) one of the three voltage nodes is connected to the PLL filter and the transistor switches are connected to the PLL filter and are controlled by the phase error pulses, b) the second node is configured to generate a feedback voltage, which in combination with at least one of the operational amplifiers is configured to control matching of the positive and negative currents, and c) the positive and negative currents are supplied to the second node substantially simultaneously for the same amount of time.