Patent ID: 6724038
Filing Date: 2004-04-20
Classification: G11C,H01L

Abstract:
A memory element for a semiconductor memory device, comprising:a semiconductor substrate of a first conductance type having: a surface area; an intermediate area; and a number of line devices formed one of in said semiconductor substrate and in said surface area, said line devices substantially electrically insulated from one another in pairs and at least partially formed and disposed physically separated from one another in pairs by said intermediate area; an isolation area of an substantially electrically insulating material, said isolation area mechanically and electrically contacted with: said intermediate area; and each of said line devices at a respective overlap area of each of said line devices; said isolation area having a number of material areas isolated from one another to form at least one area with at least one of changed electrical characteristics and changed magnetic characteristics in said isolation area, at least one of: each of said material areas having free charge carriers; and each of said material areas being able to have free charge carriers formed therein; and said line devices and said isolation area at least temporarily forming said at least one area when an electrical potential distribution is applied to said line devices and to said isolation area in said isolation area in accordance with an information unit that is to be stored.