Patent ID: 6630387
Filing Date: 2003-10-07
Classification: H01L

Abstract:
A method for forming a capacitor of a semiconductor memory device, comprising:depositing an insulating layer over a semiconductor substrate; patterning the insulating layer into an insulating pattern with a hole that exposes the semiconductor substrate; forming a seed layer over a surface of the exposed semiconductor substrate, side walls of the hole, and the insulating pattern; selectively forming a plating mask layer on the seed layer where it overlies the insulating pattern, and on a top portion of the seed layer formed on the sidewalls of the hole, such that the seed layer formed on the sidewalls of the hole is substantially exposed; forming a conductive layer on the exposed seed layer by electroplating; etching the surfaces of the plating mask layer, the seed layer and the conductive layer in an upper generally planar surface thereto, thereby forming a conductive pattern and a seed pattern separated by a unit cell; removing the insulating pattern formed on the outer walls of the hole, to complete a lower electrode of the capacitor formed of the conductive pattern; and forming a dielectric layer and an upper electrode in succession on the lower electrode.