Patent ID: 8667315
Filing Date: 2014-03-04
Classification: G06F

Abstract:
1. A synchronization control apparatus connected to a first processor and a second processor, comprising: a counter that carries out a counting and outputs resulting count information; a timeout time holder that holds a predetermined timeout time and outputs the timeout time; a comparator that compares the count information output from the counter and the timeout time output from the timeout time holder; a synchronization controller that monitors a synchronization between the first processor and the second processor by comparing an output from the first processor and an output from the second processor and starts the counting when a mis-match of the outputs from the first processor and the second processor is detected; wherein the comparator detects that the count information and the timeout time match, the comparator stops either the first processor or second processor in which a synchronization delay has occurred, and wherein the comparator detects that the count information and the timeout time match after the counter starts the counting, the synchronization control apparatus initializes one of the first processor and the second processor in which the synchronization delay has not occurred and stops the comparison between the output from the first processor and the output from the second processor.