Patent ID: 8034715
Filing Date: 2011-10-11
Classification: C23C,H01L

Abstract:
1. A method of fabricating a semiconductor integrated circuit device, comprising: (a) forming a gate electrode over a silicon surface of a wafer, the gate electrode having a silicon film to be a poly-silicon conductive film; (b) forming a source region and a drain region over the silicon surface of the wafer; (c) depositing a Co film on the source region, the drain region and the gate electrode, by sputtering, from a Co sputtering target which, apart from carbon and oxygen impurities, is at least 99.99 wt. % pure, and wherein a sum of Fe and Ni in the Co sputtering target is not greater than 50 ppm by weight; (d) performing a first rapid thermal annealing at a first temperature to a surface covered with the Co film so as to form Co monosilicide film; (e) removing a remaining Co film not formed into Co monosilicide in the step (d); and (f) after step (e), performing a second rapid thermal annealing at a second temperature higher than the first temperature to a surface covered with the Co monosilicide film so as to form Co disilicide film.