Patent ID: 9069662
Filing Date: 2015-06-30
Classification: G06F,G11C

Abstract:
1. A semiconductor device comprising: a non-volatile memory device; and a control circuit device configured to access the non-volatile memory device, wherein the control circuit device carries out, with respect to a first write request from outside including a first address serving as a first-type address and first data, control of allocating a second-type address of the non-volatile memory device to the first-type address independently from the first-type address, wherein the control circuit device allocates a second address serving as the second-type address to the first address of the first write request, and wherein, during a writing operation of the first data to the second address of the non-volatile memory device, the control circuit device allocates a fourth address serving as the second-type address to a third address of a second write request from outside, the third address serving as the first-type address.