Patent ID: 6506663
Filing Date: 2003-01-14
Classification: H01L

Abstract:
A method for producing a silicon-on-insulator (SOI) wafer, comprising:forming a first silicon oxide layer on a monocrystalline silicon region; forming a first silicon nitride layer on the first silicon oxide layer; etching selected portions of the first silicon oxide layer and first silicon nitride layer to form protective regions covering first portions of the monocrystalline silicon region and leaving uncovered second regions thereon; etching the uncovered second regions to form trenches, each trench having parallel lateral walls and a base wall; forming a sacrificial oxide layer on the lateral walls and the base wall of the trenches that partially consumes portions of the lateral walls and the base shall of the trenches; and removing the sacrificial oxide layer and the consumed portions of the lateral walls, including end portions of the first silicon oxide layer below the first silicon nitride layer to form second trenches having dimensions larger than the first trenches and to form a projection of the first silicon nitride layer that projects over the lateral walls of the second trenches and over a subsequent layer of silicone oxide and a subsequent layer of silicone nitride on the lateral walls of the second trenches.