Patent ID: 8294194
Filing Date: 2012-10-23
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: first memory cell transistors formed on a semiconductor substrate at predetermined intervals, each of the first memory cell transistors comprising a first stack gate which includes a first floating gate electrode, a second gate insulating film, and a first control gate electrode that are stacked in order on a first gate insulating film disposed on the semiconductor substrate; an interlayer insulating film formed between the first stack gates, the interlayer insulating film comprising a first air gap; a first peripheral transistor formed on the semiconductor substrate, the first peripheral transistor comprising a second stack gate which includes a first gate electrode, a fourth gate insulating film, and a second gate electrode that are stacked in order on a third gate insulating film disposed on the semiconductor substrate; and a first sidewall insulating film formed on a side surface of the second stack gate of the first peripheral transistor, the first sidewall insulating film comprising a second air gap, wherein an upper end of the second air gap of the first sidewall insulating film is located at a position lower than the fourth gate insulating film.