Patent ID: 6335257
Filing Date: 2002-01-01
Classification: H01L

Abstract:
A method of making a pillar-type structure on a semiconductor substrate, comprising the steps of:a. providing a semiconductor substrate to form a conductive region therein, b. forming a dielectric layer on said semiconductor substrate; c. a photolithography process and an etching process are conducted to remove part of the dielectric layer, so as to expose the conductive region; d. depositing a first conductor layer to cover the dielectric layer and have an electrical contacting with the conductive region; e. forming a first insulator layer on the first conductor layer; f. depositing a first silicon layer on the first insulator layer; g. employing photolithography process and etching process to etch the first silicon layer to expose the first insulator layer intermittently such that the first silicon layer is divided into a plurality of regions to be spaced apart by a predetermined distance, and each of said regions has a width of about &frac35; of said predetermined distance; h. depositing a second insulator layer with a thickness of about &frac15; of said predetermined distance and etchingback to form second insulator spacers abutting the first silicon layer; i. removing the remained first silicon layer; j. depositing a second silicon layer with a thickness of about &frac15; of said predetermined distance and etchingback to form second silicon spacers abutting the second insulator spacers; k. depositing a third insulator layer to cover everything above the first insulator layer and fill up the spacers between second silicon spacers abutting the second insulator spacers; l. etchingback the third insulator layer to form third insulator spacers with a thickness of about &frac15; of said predetermined distance abutting the second silicon spacers and form third insulator studs between the second silicon spacers; m. removing the second silicon spacers; n. etching the first insulator layer and the first conductor layer below the second silicon spacers to a depth without exposing the dielectric layer on said semiconductor substrate; o. removing the remained first insulator layer, the second insulator spacers, the third insulator spacers and the third insulator studs.