Patent ID: 7605041
Filing Date: 2009-10-20
Classification: H01L

Abstract:
1. A manufacture method for a semiconductor device, comprising steps of: (a) forming an isolation region in a semiconductor substrate, said isolation region extending from a surface of said semiconductor substrate to a first depth position; (b) forming first and second wells of a first conductivity type in said semiconductor substrate; (c) forming a gate insulating film having a first thickness on a surface of said first well and forming a gate insulating film having a second thickness thinner than the first thickness on a surface of said second well; (d) forming gate electrodes on said gate insulating films; and (e) forming source/drain regions in said semiconductor substrate on both sides of said gate electrodes, wherein said step (b) comprises steps of: (b1) performing ion implantation commonly to said first and second wells to form a first impurity concentration distribution having a maximum value only at a depth position equal to or deeper than said first depth position; (b2) selectively performing ion implantation to said first and/or second wells to form a second impurity concentration distribution having a maximum value at a depth position approximately equal to said first depth position; and (b3) performing ion implantation only to said second well to form a third impurity concentration distribution having a maximum value at a depth position shallower than said first depth position, and wherein said first well has only the first impurity concentration distribution having a maximum value at a depth equal to or deeper than said first depth position.