Patent ID: 7315055
Filing Date: 2008-01-01
Classification: H01L

Abstract:
1. A unit cell of a silicon-oxide-nitride-oxide-silicon (SONOS) memory device comprising: an integrated circuit substrate; a SONOS memory cell on the integrated circuit substrate, the SONOS memory cell including a source region, a drain region and a gate contact, wherein the integrated circuit substrate defines a trench between the source and drain regions, wherein the gate contact is provided in the trench and wherein a floor of the trench extends further into the integrated circuit substrate than lower surfaces of the source and drain regions; a first charge trapping pattern on the integrated circuit substrate between a first sidewall of the trench and the source region, the first charge trapping pattern extending on the integrated circuit substrate without extending on the source region or the sidewall of the trench; and a second charge trapping pattern on the integrated circuit substrate between a second sidewall of the trench and the drain region, the second charge trapping pattern extending on the integrated circuit substrate without extending on the drain region or the sidewall of the trench.