Patent ID: 6448665
Filing Date: 2002-09-10
Classification: B29C,H01L

Abstract:
A semiconductor device, comprising:a wiring substrate having a first face and a second face, the first face having a first area and a second area surrounds the first area, and at least a first connecting pad arranged in the first area; a semiconductor chip having a first face and a second face, the semiconductor chip having at least a connecting terminal formed on the first face, and the semiconductor chip being mounted on the first area of the wiring substrate in a face-down type; at least a conductive bump connecting the first connecting pad of the wiring substrate and the connecting terminal of the semiconductor chip; and a sealing resin layer having a first face substantially in parallel with the first face of the wiring substrate and disposed on the first face of the wiring substrate so that the second face of the semiconductor chip being exposed, side faces of the semiconductor chip being sealed, and a gap between the first face of the wiring substrate and the first face of the semiconductor chip being filled; wherein the first face of the wiring substrate is completely covered with the resin layer and a size of the first face of the resin layer is different from that of the first face of the wiring substrate, the thickness of the resin layer is in the range of 50 to 100% of that of the wiring substrate, the resin layer has a first portion filled in between the wiring substrate and the semiconductor element, and a second portion covering the semiconductor chip from above the second face of the semiconductor chip, and wherein a Young's modulus of the resin of the first portion is smaller than that of the resin of the second portion.