Patent ID: 8304905
Filing Date: 2012-11-06
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate; a wiring formed on the substrate; a first insulating film formed on the wiring, provided with a first opening for exposing a portion of the wiring; a pad electrode film formed on the first insulating film, the pad electrode film being formed so as to be in contact with the entire surface of a portion of the wiring, exposed from the first opening of the first insulating film; a second insulating film formed on the first insulating film and the pad electrode film, a second opening for exposing a portion of the pad electrode film being formed in the second insulating film; and a flip chip bump formed on the second insulating film, the flip chip bump being formed in such a manner as to be in contact with the entire surface of a portion of the pad electrode film, exposed from the second opening of the second insulating film, wherein the second insulating film exists between the flip chip bump and the pad electrode film, in a region directly underneath an outer edge of the flip chip bump, as seen in a plan view, and the outer edge of the flip chip bump is formed in a region inside the outer edge of the pad electrode film, as seen in a plan view.