Patent ID: 6689642
Filing Date: 2004-02-10
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising:preparing a lower frame having a header for fixing a semiconductor chip thereon and having external leads combined with said header as one unit, the header and the corresponding external leads being located in a first cell area that is completely encircled by the lower frame; fixing a semiconductor chip on said header; preparing an upper frame having a connection electrode for being fixed on a current passage electrode formed on the top face of said semiconductor chip and having external leads combined with said connection electrode as one unit, the connection electrode and the corresponding external electrodes being located in a second cell area that is completely encircled by the upper frame a portion of the upper frame being disposed lower than the connection electrode; positioning said lower frame and said upper frame so that the portion of the upper frame disposed lower than the connection electrode contacts a portion of the lower frame; fixing said connection electrode of said upper frame on said current passage electrode of said semiconductor chip; and creating a mold with an insulating resin covering said header and a portion of said external leads of said lower frame, covering said connection electrode and a portion of said external leads of said upper frame, and covering said semiconductor chip.