Patent ID: 6636950
Filing Date: 2003-10-21
Classification: G06F

Abstract:
A computer system comprising:a hierarchical memory system, including a first local storage, and a main storage; and a first memory access unit coupled to the hierarchical memory system capable of processing a plurality of memory access instructions that includes (a) a first instruction that specifies a first address and a first value, wherein processing the first instruction by the first memory access unit causes the first value to be stored at a location in the first local storage that is associated with the first address such that after the processing of the first instruction the first value has not necessarily been stored in the main storage, and (b) a second instruction that specifies the first address, wherein processing of the second instruction by the first memory access unit after processing the first instruction and prior to the first value having been stored in the main storage is such that the first memory access unit complete processing of the second instruction only after the first value has been stored at a location in the main storage that is associated with the first address.