Patent ID: 9147026
Filing Date: 2015-09-29
Classification: G06F

Abstract:
1. A computer implemented method of change evaluation of an electronic design file for design verification confirmation prior to fabrication of an electronic circuit defined by the electronic design file, comprising the steps of: receiving, at a processor, said electronic design file defining the electronic circuit comprised at least in part of a hierarchy of the electronic circuit having at least one subcomponent of the electronic circuit, wherein the electronic design file defines a functional level electronic design of the electronic circuit; employing, at the processor, a banked signature of data representative of said at least one subcomponent of the electronic circuit defined by the electronic design file; receiving, at the processor, at least one review request of said at least one subcomponent of the electronic circuit defined by the electronic design file; generating, at the processor, a current signature of data representative of said at least one subcomponent of the electronic circuit defined by the electronic design file in response to said at least one review request; determining, at the processor, a difference based at least in part upon said current signature associated with the electronic design file and said banked signature associated with the electronic design file; and evaluating, at the processor, an equivalence of said at least one subcomponent of the electronic circuit defined by the electronic design file and said at least one reviewed subcomponent of the electronic circuit defined by the electronic design file.