Patent ID: 6577676
Filing Date: 2003-06-10
Classification: H04B

Abstract:
A digital matched filter comprising:a plurality of spread signal memories each capable of storing a received spread spectrum signal; a spread signal storage controller including a plurality of flag registers which store flag data, and configured to shift the flat data while selectively skipping at least one of the flag registers in accordance with a code length of the spread spectrum signal and store the received spread spectrum signal into one of said plurality of spread signal memories; a spread code shift register including a plurality of code registers which store spread codes, and configured to shift the flag data while selectively skipping at least one of the code registers in accordance with a code length of the spread spectrum signal; a plurality of multipliers corresponding to said plurality of spread signal memories and said plurality of code registers of said spread code shift register, said plurality of multipliers multiplying the spread spectrum signals stored in said spread signal memories by the spread codes stored in said code registers, and an adder unit which adds together the results of multiplication by said plurality of multipliers and deriving the correlation between the received spread spectrum signal and the spread code stored in said shift register.