Patent ID: 7541229
Filing Date: 2009-06-02
Classification: H01L

Abstract:
1. A method of forming a thin film transistor on a substrate, the surface of the substrate including a gate electrode with a gate insulation layer disposed thereon, comprising: (a) depositing a first silicon-contained thin film on the gate insulation layer; (b) plasma etching the first silicon-contained thin film; (c) depositing a second silicon-contained thin film on the first silicon-contained thin film after plasma etching the first silicon-contained thin film; (d) plasma etching the second and the first silicon-contained thin films for forming the first silicon-contained thin film and the second silicon-contained thin film into an interface layer with a microcrystalline structure; and (e) forming an amorphous silicon layer and an ohmic contact layer on the amorphous silicon layer, performing a photo-etching process to remove a portion of the interface layer, the amorphous silicon layer, and the ohmic contact layer, and depositing a source/drain metal layer on the interface layer after performing the photo-etching process to form a channel, a source electrode, and a drain electrode, wherein the ohmic contact layer disposes between the source/drain metal layer and the amorphous silicon layer.