Patent ID: 8309424
Filing Date: 2012-11-13
Classification: H01L

Abstract:
1. A method of forming a semiconductor construction, comprising: forming a plurality of conductive structures supported by a silicon-containing substrate; forming a first material over the conductive structures; forming photoresist over the first material; photolithographically patterning the photoresist to form a first pattern of the photoresist, the first pattern comprising a plurality of features; forming spacers along the features; removing the photoresist to leave a patterned mask consisting of the spacers; transferring a pattern from the patterned mask into the first material to form a plurality of openings extending through the first material to the conductive structures; forming electrically conductive material over the first material and within the openings; the electrically conductive material within the openings being in direct contact with the conductive structures; removing the electrically conductive material from over the first material while leaving the electrically conductive material within the openings as a plurality of spaced apart electrically conductive pedestals; the electrically conductive pedestals being separated from one another by the first material; removing the first material from between the electrically conductive pedestals; after removing the first material, forming one or more low k dielectric materials between the electrically conductive pedestals.