Patent ID: 7784020
Filing Date: 2010-08-24
Classification: G06F

Abstract:
1. A computer-implemented pattern design method of designing a pattern of a semiconductor circuit to be formed on a substrate, comprising: creating, by the computer, a design pattern by placing a plurality of cells in each functional block as a unit of the semiconductor circuit and executing routing among the plurality of placed cells; analyzing, by the computer, an electrical characteristic of the semiconductor circuit corresponding to the design pattern; determining, by the computer, whether an analysis result of the electrical characteristic satisfies a predetermined allowance of the electrical characteristic; when the analysis result of the electrical characteristic satisfies the allowance, creating, by the computer, mask pattern data based on the design pattern; when the analysis result of the electrical characteristic does not satisfy the allowance, creating the design pattern again; predicting, by the computer, a predictive pattern to be formed on the substrate by the mask pattern data; checking, by the computer, a difference amount between the predictive pattern and a target pattern to be formed on the substrate; comparing, by the computer, the difference amount with a predetermined allowable variation amount; and correcting, by the computer, at least one of the placement of the cells and the routing among the cells in the design pattern corresponding to the mask pattern data used to predict the predictive pattern if the difference amount is larger than the allowable variation amount in the comparing.