Patent ID: 8604582
Filing Date: 2013-12-10
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a p-type region in a substrate and extending below a surface of the substrate, the p-type region having a first p-type impurity concentration; a first n-type well in the p-type region and extending from the surface of the substrate to below the surface of the substrate; a first p-type well in the p-type region and extending below the surface of the substrate, the first p-type well having a second p-type impurity concentration, the second p-type impurity concentration being greater than the first p-type impurity concentration, a portion of the p-type region with the first p-type impurity concentration being disposed directly below the first p-type well; a second p-type well in the first p-type well and extending from the surface of the substrate to below the surface of the substrate, the second p-type well having a third p-type impurity concentration, the second p-type impurity concentration being less than the third p-type impurity concentration; and a cathode contact over the surface of the substrate and electrically and directly coupled to the first n-type well.