Patent ID: 8658491
Filing Date: 2014-02-25
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising the steps of: forming a device isolation structure in a semiconductor substrate to delimit an active region; forming an LDD region in a surface of the active region; defining grooves in the channel forming areas of the active region such that a bottom of each groove is positioned lower than a bottom of the LDD region; forming gates in and over the grooves; recessing a partial thickness of the LDD region so as to expose portions of both sidewalls of the gates which correspond to upper end portions of the grooves; forming gate spacers on both sidewalls of the gates over recessed portions of the LDD region which are posited on both sides of the gates; forming junction areas in the active region including the recessed LDD region on both sides of the gates including the gate spacers; and forming landing plugs on the junction areas.