Patent ID: 8421732
Filing Date: 2013-04-16
Classification: G09G

Abstract:
1. An image display system having a display device, wherein the display device comprises: a timing control circuit for generating a plurality of timing signals; a display matrix comprising a plurality of display elements arranged in a matrix and vertically divided into N banks to be sequentially updated; a timing signal adjusting circuit coupled to the timing control circuit for adjusting the duty cycle of the timing signals; and a horizontal driving circuit coupled to the timing signal adjusting circuit for generating a plurality of switch signals according to the adjusted timing signals and sequentially turning on the banks, wherein, the switch signals are non-overlapping signals, wherein the timing signals comprise a horizontal start signal, a horizontal timing signal and a complementary horizontal timing signal, wherein the timing signal adjusting circuit comprises a first NAND gate circuit for adjusting the duty cycle of the horizontal timing signal, and the first NAND gate circuit of which comprises: wherein the timing signal adjusting circuit comprises a second NAND gate circuit for adjusting the duty cycle of the complementary horizontal timing signal, and the second NAND gate circuit of which comprises: