Patent ID: 7102408
Filing Date: 2006-09-05
Classification: G06F,H03K,H03L

Abstract:
1. An information processing apparatus, comprising: a system clock generator which oscillates a system clock; a first unit having one or a plurality of second units each having a system board on which said system clock generator, said first unit, and said second unit are mounted and which has board lines for individually supplying each of the system clock and the clock gate signal which are outputted from said first unit to the first unit itself and the second unit; a first delay setting unit which is provided for a signal supply line of the system clock in the first unit to the second unit and in which a variation and delay elements which are equivalent to those of said clock distributing unit of said first unit have been set; and a second delay setting unit which is provided for a signal supply line of the clock gate signal in the first unit to said second unit and in which the variation and the delay elements which are equivalent to those of the clock distributing unit of said first unit have been set.