Patent ID: 7176523
Filing Date: 2007-02-13
Classification: H01L

Abstract:
1. A semiconductor device having a power MISFET comprised of a plurality of MISFETs disposed on a main surface of a semiconductor body, each MISFET comprising: a drain region and a source region formed in the semiconductor body; a channel-forming region between the source and drain regions; a gate insulation film formed over the channel-forming region; a gate electrode formed over the gate insulation film; a drain offset region formed between the gate electrode and drain region; a well region formed under the channel-forming region and source region; a first insulation film formed over the plurality of MISFETs; and a source wiring and a drain wiring, each being part of a first conductive layer, and being formed over the first insulation film, wherein the drain offset region has an impurity concentration lower than that of the drain region; a source opening and a drain opening are formed through the first insulation film, a source conductor plug and a drain conductor plug formed in the source and drain openings respectively, the source wiring and the source region are electrically connected via the source conductor plug, and the drain wiring and the drain region are electrically connected via the drain conductor plug, wherein the power MISFET of the semiconductor device constitutes a RF-power module employed in a mobile communication apparatus, the power MISFET constituting an amplifying element of a multi-stage-amplifier formed in the RF-power module.