Patent ID: 7215339
Filing Date: 2007-05-08
Classification: G09G

Abstract:
1. A video controller raster engine for receiving video data from a frame buffer and rendering formatted data to a display in a computer system, the raster engine comprising: a first in first out (FIFO) memory that interfaces a host bus in the computer system with the raster engine, obtains interleaved first and second video data from the frame buffer via the host bus and provides the interleaved video data to a video pipeline; a control logic system associated with the FIFO memory and which evaluates first input and output counter values, and second input and output counter values, respectively associated with the first and second video data, and provides at least one of an existing video data underflow indication and an imminent underflow indication based at least in part on one of the first input and output counter values and the second input and output counter values.