Patent ID: 7439763
Filing Date: 2008-10-21
Classification: H03K

Abstract:
1. A network switch comprising: input ports for receiving data from network nodes; a block memory buffer partitioned into sections; a write controller having inputs receiving data bursts from the input ports, the write controller for dividing the data bursts from the input ports into segments, and storing the data segments in a sequence in the sections of the memory buffer; a lookup and classification module for receiving the data from the input ports, decoding headers from the data bursts, providing error checking, and determining a class for the data from the headers; a class queue for storing pointers provided from the lookup and classification module according to class as indicated by the lookup and classification module, the pointers being stored in a manner to indicate a time the data packet segment was stored in the memory; a scheduler for determining an order of class queues where data will be read out, obtaining the pointers from the class queue, and providing an indication of next data to be read; a read controller for reading data from the block memory buffer according to the indication of next data to be read provided from the scheduler; and output ports for receiving data from the read controller and providing the data to the network nodes.