Patent ID: 6534375
Filing Date: 2003-03-18
Classification: H01L

Abstract:
A method of manufacturing a semiconductor integrated circuit device comprising the following steps of:(a) forming a first insulating film on a main surface of a semiconductor substrate formed with a first semiconductor region and then forming a first contact hole to the first insulating film over the first semiconductor region, (b) forming a silicon plug inside the first contact hole, (c) forming a third insulating film over the first insulating film, and then etching the third insulating film over the first contact hole, thereby forming a groove in which the surface of the silicon plug is exposed at the bottom thereof, (d) forming a metal silicide layer on the surface of the silicon plug and then forming a metal silicon nitride layer on the surface of the metal silicide layer, (e) forming a first electrode of a capacitance device comprising a first metal inside the groove, and electrically connecting the first electrode and the first semiconductor region through the first contact hole, (f) forming a dielectric film for the capacitance device over the first electrode and then applying a heat treatment to the dielectric film in an oxygen-containing atmosphere, and (g) forming a second electrode comprising a second metal for the capacitance device over the dielectric film.