Patent ID: 7348275
Filing Date: 2008-03-25
Classification: H01L

Abstract:
1. A processing method for a semiconductor wafer which is generally circular, and which has on a face thereof an annular surplus region present in an outer peripheral edge portion of the face, and a circular device region surrounded by the surplus region, the device region having many rectangular regions defined by streets arranged in a lattice pattern, each of the rectangular regions having a semiconductor device disposed therein, the processing method comprising: a back grinding step of grinding a region in a back of the wafer corresponding to the device region to form a circular concavity in the back of the wafer corresponding to the device region; an additional treatment step of applying a required additional treatment to the wafer after the back grinding step; and a back flattening step of grinding a region in the back of the wafer surrounding the circular concavity after the additional treatment step, thereby converting the back of the wafer into a substantially flat surface.