Patent ID: 8258619
Filing Date: 2012-09-04
Classification: H01L

Abstract:
1. An integrated circuit die stack comprising: a first die mounted upon a substrate, the first die comprising pass-through vias (‘PTVs’), each PTV comprising a conductive pathway through the first die with no connection to any circuitry on the first die; and a second die, identical to the first die, shifted in position with respect to the first die and mounted upon the first die so that the PTVs in the first die connect conductors from the substrate through the first die to the TSVs in the second die, each TSV on the second die comprising a conductive pathway through the second die that is also connected to electronic circuitry on the second die, the TSVs and PTVs disposed upon each identical die with the positions of the TSVs and PTVs on each identical die translationally compatible with respect to the TSVs and PTVs on the other identical die so that the second die's shift in position aligns PTVs in the first die with TSVs in the second die, wherein the die stack further comprises an interface die mounted upon the substrate between the substrate and the first die splitting and connecting a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the interface die multiplexing and demultiplexing the same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the signal lines on the substrate, to the PTVs, and to the TSVs all operating at a same clock speed.