Patent ID: 6151412
Filing Date: 2000-11-21
Classification: G06T

Abstract:
An image processing apparatus comprising:plural memories each having a capacity for storing image data of a picture frame;process means for combining images corresponding to the image data stored in said plural memories to obtain combined image data;a first bi-directional data bus connected to each of said plural memories and to an input of said process means;a second bi-directional data bus connected to an output of said process means and each of said plural memories;output means, connected to said second bi-directional data bus, for outputting image data to display means for displaying an image; andcontrol means for changing a first connection operation between said plural memories and the input of said process means for selectively transferring image data from each of said plural memories to the input said process means via said first bi-directional data bus, and for changing a second connection operation between the output of said process means and said plural memories to store the output of said process means in a selected one of said plural memories via said second bi-directional data bus, and for changing a third connection operation between said plural memories for selectively transferring image data between said plural memories via said first bi-directional data bus.