Patent ID: 6385688
Filing Date: 2002-05-07
Classification: G06F,G11C,Y02D

Abstract:
A method, comprising:a) demultiplexing a plurality of multiplexed address signals to generate a demultiplexed address if a multiplexed address mode is indicated by a value stored in a mode register, said value indicating one of at least two synchronous and at least two asynchronous modes of operation; b) receiving a plurality of multiplexed addresses and control signals including a first strobe signal and a second strobe signal; c) latching a first portion of a selected multiplexed address; d) latching a second portion of the selected multiplexed address, wherein the first and second portions form the demultiplexed address; e) reading data from a nonvolatile memory in accordance with the demultiplexed address; f) latching the data; and g) providing a tristated output memory if the control signals indicate a precharge cycle.