Patent ID: 6384752
Filing Date: 2002-05-07
Classification: G01D

Abstract:
An absolute encoder comprising a scale having a plurality of tracks different in the number of pitches where position information repeated at the same pitches is formed, a plurality of sensors for making a relative move to said scale for detecting the position information, a phase modulation section for converting signals from said sensors into phase signals, a digital conversion section for converting the phase signals and each phase difference signal between two arbitrary phase signals into digital signals, and an absolute value signal generation section for generating a signal concerning an absolute position based on the digitized phase signals and the digitized phase difference signals, characterized in thatwhen the phase signals &phgr;0, &phgr;1, &phgr;2, &phgr;3 . . . are j-bit digital signals represented as &phgr;0=2&pgr;a0x+b0&phgr;1=2&pgr;a1x+b1&phgr;2=2&pgr;a2x+b2&phgr;3=2&pgr;a3x+b3. . . where a0, a1, a2, a3, . . . are each the number of pitches, x is relative displacement between scale and sensor, b0, b1, b2, b3, . . . are each an initial phase, said absolute value signal generation section sets the numbers of pitches a0, a1, a2, a3 . . . so that the number of pitches of phase difference signal &phgr;01 between &phgr;0 and &phgr;1 (a0âˆ’a1), the number of pitches of phase difference signal &phgr;02 between &phgr;0 and &phgr;2 (a0âˆ’a2), the number of pitches of phase difference signal &phgr;03 between &phgr;0 and &phgr;3 (a0âˆ’a3) . . . becomea0/(a0âˆ’a1)=2K1 (a0âˆ’a1)/(a0âˆ’a2)=2K2 (a0âˆ’a2)/(a0âˆ’a3)=2K3 . . . where k1, k2, k3 . . . are each an integer, divides &phgr;0 by 2K1, generates an absolute value signal A01 of the number of pitches (a0âˆ’a1) with the high-order k1 bits of the signal provided by subtracting the signal that is provided by dividing &phgr;0 by 2K1 from &phgr;01 as high-order bits and &phgr;0 as low-order bits, divides A01 by 2K2, generates an absolute value signal A02 of the number of pitches (a0âˆ’a2) with the high-order k2 bits of the signal provided by subtracting the signal that is provided by dividing A01 by 2K2 from &phgr;02 as high-order bits and A01 as low-order bits, and executes the process in order, thereby generating a longer-pitch absolute value signal.