Patent ID: 6125404
Filing Date: 2000-09-26
Classification: G06F,Y02D

Abstract:
A data processing system comprising:a first data processor for communicating and processing information, the first data processor having an interrupt input for receiving a first interrupt signal, which causes the first data processor to be interrupted from executing a current address to a selectable target address;a second data processor for communicating and processing other information, the second data processor also having an interrupt input for receiving a second interrupt signal, which causes the second data processor to be interrupted; anda timer having a first output coupled to the first data processor and a second output coupled to the second data processor, the timer autonomously generating the first interrupt signal at the first output thereof and the second interrupt signal at the second output thereof in response to stored values which determine timing of the first and second interrupt signals, wherein the timer comprises a timebase generator and uses an output of the time base generator to generate both the first interrupt signal and the second interrupt signal, wherein the timebase generator is programmable by at least one of the first and second data processors.