Patent ID: 9223503
Filing Date: 2015-12-29
Classification: G06F

Abstract:
1. An apparatus comprising: logic to write a data pattern to a portion of a non-volatile memory device; logic to read one or more bits from the portion of the non-volatile memory device a first number of times and a second number of times, wherein at least one bit of the one or more bits are to be marked for random number generation based at least partially on comparison of a number of flips by the at least one bit and a threshold value, wherein the number of flips by the at least one bit is to be determined based at least in part on read operations to be performed during the first number of times and the second number of times; and logic to update a moving read reference (MRR) offset value based at least partially on comparison of a threshold number of flips and the determined number of flips by the at least one bit, wherein the MRR offset value is to be updated after the read operations to be performed during the first number of times and before the read operations to be performed during the second number of times.