Patent ID: 9048900
Filing Date: 2015-06-02
Classification: H04B,H04L

Abstract:
1. A circuit comprising: an estimator circuit modeling nonlinear signal distortion from a transmitter at a receiver based on an analysis of an outgoing digital signal converted to an analog signal and transmitted at the transmitter; a mixer mixing an output of the estimator circuit with a frequency offset signal and shifting the estimator circuit output to an intermediate frequency offset representing a difference between frequencies of the transmitter and the receiver; and a subtractor coupled to the mixer and subtracting the frequency shifted estimator circuit output from a digitized incoming signal received at the receiver; a delay unit delaying the estimator circuit output until the estimator circuit output is synchronized with a corresponding portion of the incoming signal at the subtractor; and a decimator downsampling the mixed estimator circuit output to a frequency of the incoming signal before the subtractor subtracts the downsampled estimator output from the incoming signal.