Patent ID: 7485568
Filing Date: 2009-02-03
Classification: H01L

Abstract:
1. A method for forming wiring of a semiconductor device using a dual damascene method, comprising the steps of: forming a connection hole above a substrate by an etching treatment using a first resist film as a mask; then removing the first resist film; then forming a second resist film above the substrate; and then forming a wiring groove by an etching treatment using the second resist film as a mask, said method further comprising, between said step of removing the first resist film and said step of forming the second resist film above the substrate, a step selected from a group of (1) exposing the substrate to a water vapor atmosphere generated from a magnetized water invaded by magnetism, (2) supplying a silane-based gas to the substrate, (3) supplying a developing solution to the substrate, and (4) supplying a carbon-based treatment solution to the substrate.