Patent ID: 8610482
Filing Date: 2013-12-17
Classification: H01L

Abstract:
1. A trimming circuit comprising: a capacitor; a first transistor; a second transistor; and a third transistor, wherein one electrode of the capacitor is electrically connected to a storage node, and the other electrode of the capacitor is electrically connected to a ground potential line, wherein a gate electrode of the first transistor is electrically connected to a write terminal, one of a source electrode and a drain electrode of the first transistor is electrically connected to the storage node, and the other of the source electrode and the drain electrode of the first transistor is electrically connected to a power supply potential line, wherein a gate electrode of the second transistor is electrically connected to an erase terminal, one of a source electrode and a drain electrode of the second transistor is electrically connected to the storage node, and the other of the source electrode and the drain electrode of the second transistor is electrically connected to a ground potential line, wherein a gate electrode of the third transistor is electrically connected to the storage node, wherein the first transistor and the second transistor each include a semiconductor material whose bandgap is 2.5 eV or more, and wherein a source electrode and a drain electrode of the third transistor are electrically connected in parallel to a resistor.