Patent ID: 9076404
Filing Date: 2015-07-07
Classification: G09G,H04N

Abstract:
1. An array substrate, which comprises data lines extended along a column direction and scan lines and common electrode lines extended along a row direction, the data lines and the scan lines are perpendicular to each other and are arranged as a matrix so as to form a plurality of pixel units, each pixel unit has a pixel electrode, a first thin-film transistor, and a second thin-film transistor disposed therein; each row of pixel units corresponds to one set of scan lines, each set of scan lines comprises a first scan line and a second scan line, the first scan line is connected to the pixel electrode via the first thin-film transistor, the second scan line is connected to the pixel electrode via the second thin-film transistor; wherein a start end of the second scan line of a first set of scan lines is connected to a tail end of the first scan line of a (N+1)th set of scan lines such that a vertical start pulse output signal of the first scan line of the (N+1)th set of scan lines serves as a vertical start pulse input signal of the second scan line of the first set of scan lines to turn on the second scan line of the first set of scan lines, in which N is a natural number greater than or equal to 1; the first scan line has a first scan period T