Patent ID: 8823999
Filing Date: 2014-09-02
Classification: H04N

Abstract:
1. An image processor that obtains pieces of pixel data from a piece of image data divided in packing units, the packing units each being a predetermined matrix including a plurality of pixels at least in a sub scan direction, and that performs a predetermined image conversion processing using the respective pieces of pixel data and an intermediate value calculated for each piece of pixel data based on the other pieces of pixel data in the packing unit, the image processor comprising: a parallel processing unit that performs the image conversion processing in parallel on a piece of pixel data arranged in the sub scan direction in the packing unit, based on the obtained piece of pixel data and the intermediate value for the piece of pixel data, to calculate an output value after the piece of pixel data is converted and an index value indicating an evaluation of the output value, respectively; an intermediate value calculating unit that calculates, for the obtained piece of pixel data, the intermediate value based on the index value calculated by the parallel processing units for each of the pieces of pixel data within a predetermined relative position range; and a first retention unit that delays starting of the image conversion processing for one piece of pixel data by the parallel calculating unit for a delay period set to be equal to or longer than a period required from obtaining the one piece of pixel data until the intermediate value for the one pixel data is calculated by the intermediate value calculating unit; wherein the obtaining of the pieces of the pixel data in the packing unit, and respective operations of the first retention unit, the parallel processing unit, and the intermediate value calculating unit are performed in synchronization with one clock signal.