Patent ID: 6096594
Filing Date: 2000-08-01
Classification: H01L

Abstract:
A method of fabricating a dynamic random access memory (DRAM), wherein the method comprises the steps of:providing a substrate;forming a first dielectric layer having a contact hole therein on the substrate, wherein the contact hole exposes the substrate;forming a bit line and a second dielectric layer over the first dielectric layer;performing a photolithography step to form a patterned photoresist layer on the second dielectric layer;performing a first etching step and using the patterned photoresist layer as a mask to etch the second dielectric layer and the bit line, wherein the first dielectric layer is used as an etching stop layer, a node contact opening is formed in the second dielectric layer to expose the bit line, and a concave surface is formed in a sidewall of the bit line;removing the patterned photoresist layer;forming an isolation layer on the sidewall of the node contact opening and the concave surface, wherein the isolation layer fills the concave surface and the isolation layer does not completely fill the node contact opening;performing a second etching step to etch the isolation layer and form a spacer layer on a sidewall of the node contact opening, wherein the spacer layer completely covers the concave surface; andperforming a third etching step, wherein the first dielectric layer is etched to form a storage node opening, the spacer layers are used as masks.