Patent ID: 7460628
Filing Date: 2008-12-02
Classification: G06F,H04N

Abstract:
1. A synchronous clock generation apparatus comprising: an A/D converter for converting an analog input signal, to which a synchronizing signal is added, into a digital signal using a synchronous clock, synchronized with the synchronizing signal, as a reference of sampling; a synchronizing signal separator circuit for separating the synchronizing signal from the digital signal; a pulse generation circuit for counting synchronous clocks up to a number which is previously set for the analog input signal to generate a synchronizing pulse signal; a multiplier for multiplying the synchronizing signal separated by the synchronizing signal separator circuit by the synchronizing pulse signal and outputting multiplication data; a low-pass filter for extracting a direct current component from the multiplication data and outputting the direct current component as correction data; a controller for setting a gain adjustment value, for gain adjustment which is performed on the correction data, based on the correction data, and outputting gain adjustment data indicating the gain adjustment value; a gain adjustment circuit for performing gain adjustment on the correction data based on the gain adjustment data and for outputting gain-adjusted correction data; and a voltage-controlled oscillator for generating a clock of a frequency according to the gain-adjusted correction data which is output from the gain adjustment circuit and outputting the clock as the synchronous clock, wherein the controller: