Patent ID: 6642750
Filing Date: 2003-11-04
Classification: H02J

Abstract:
A sequencing circuit for applying a highest voltage of first and second system power supplies to a chip; said sequencing circuit comprising:a first transistor coupled between the first system power supply and a power supply input to the chip; a second transistor coupled between the second system power supply and the power supply input to the chip; a comparator for sensing a highest voltage of the first and second system power supplies; a third transistor connected between a bias reference voltage and the second system power supply; said first transistor, said second transistor, and said third transistor being coupled to an output of said comparator; responsive to said comparator sensing the highest voltage of the first system power supply, said first transistor being turned on and coupling the first power supply voltage to the power supply input to the chip; and responsive to said comparator sensing the highest voltage of the second system power supply, said second transistor being turned on and coupling the second power supply voltage to the power supply input to the chip; a bias voltage source coupled to said comparator; said bias voltage source and said bias reference voltage being powered up before the first system power supply and the second system power supply are powered up and said bias voltage source and said bias reference voltage being powered down after the first system power supply and the second system power supply are powered down.