Patent ID: 8421513
Filing Date: 2013-04-16
Classification: H03K

Abstract:
1. A master-slave flip-flop circuit for receiving an input signal and for generating an output signal, said master-slave flip-flop circuit being controlled by a clock signal having a first phase and a second phase, said master-slave flip-flop circuit having a normal mode of operation and a retention mode of operation, said master-slave flip flop circuit comprising: a master stage configured, during said normal mode, to (i) capture a master signal at a master node during said first phase of said clock signal, said master signal having a value dependent on said input signal, and (ii) retain said master signal at said master node during said second phase of said clock signal; a slave stage configured, during said normal mode, to (i) capture a slave signal at a slave node during said second phase of said clock signal, said slave signal having a value dependent on said master signal, and (ii) retain said slave signal at said slave node during said first phase of said clock signal, said output signal having a value dependent on said slave signal; an input isolation circuit configured to isolate said master stage from said changes in said input signal during said retention mode; and a retention stage coupled to said master stage and said slave stage and configured: (i) during said normal mode, to capture a retention signal at a retaining node, said retention signal having a value dependent on said slave signal; and (ii) during said retention mode, to isolate said retaining node from changes in said slave signal, to retain said retention signal at said retaining node, to provide a master restore signal to a master restore node of said master stage and to provide a slave restore signal to a slave restore node of said slave stage, said master restore signal and slave restore signal having values, dependent on said retention signal, for configuring said master stage and said slave stage such that said master signal and said slave signal have values corresponding to said retention signal.