Patent ID: 9097951
Filing Date: 2015-08-04
Classification: G02F,H01L

Abstract:
1. A thin film transistor array substrate, comprising: a transparent substrate; a plurality of data lines formed on the transparent substrate; a plurality of first transparent electrodes located in a same layer as the data lines; an insulating layer covering the data lines and the first transparent electrodes; and a second transparent electrode located on the insulating layer, wherein the second transparent electrode comprises a plurality of sub-electrodes, wherein the plurality of sub-electrodes comprises all conductors which are electrically connected to one another and are spaced apart from one another by a plurality of slits, wherein the plurality of sub-electrodes comprises a plurality of first transparent sub-electrodes and a plurality of second transparent sub-electrodes, wherein the plurality of first transparent sub-electrodes comprises all sub-electrodes which are respectively located directly above the first transparent electrodes, and the width of one first transparent sub-electrode is less than the width of the first transparent electrode located directly below the one first transparent sub-electrode, wherein the plurality of second transparent sub-electrodes comprises all sub-electrodes which are respectively located directly above the data lines, and the width of one second transparent sub-electrode is greater than the width of the data line located directly below the one second transparent sub-electrode, and wherein each of the slits partially but not entirely overlaps one of the first transparent electrodes.