Patent ID: 6915516
Filing Date: 2005-07-05
Classification: G06F

Abstract:
1. A method of allocating resources in a plurality of processors system, each processor of said plurality having a cache associated therewith, comprising: when at least one processor of said plurality of processors system is idle, detecting at least one other processor of said plurality of processors which is not idle; timing a predetermined period of time during which said at least one other processor which is not idle remains not idle; and if said at least one other processor which is not idle remains not idle when the predetermined period of time has elapsed, then poaching a process on a queue of said at least one non-idle processor to be run by said at least one processor which is idle, wherein if more than one processor is idle, poaching the process with the idle processor which is electrically closest to the at least one non-idle processor, wherein the time period during which a non-idle processor is allowed to remain non-idle is greater the farther away a non-idle processor is electrically located relative to an idle processor, and wherein if the processor electrically closest to the idle processor is idle, and if the processor electrically closest to it is idle, it will then try to poach from the next processor which is electrically closest to it until it encounters a non-idle processor on which poaching can occur.