Patent ID: 6339318
Filing Date: 2002-01-15
Classification: G11C,H03K

Abstract:
A semiconductor integrated circuit device comprising a voltage generating circuit for generating an internal potential and a circuit for receiving the internal potential, said voltage generating circuit including:a reference voltage circuit having a first output node for outputting a first potential; a first differential amplifier having a first input node, a second input node, and a second output node, the first potential being supplied to the first input node; a second differential amplified having a third input node, a fourth input node, and a third output node, the first potential being supplied to the third input node; a first output MOSFET with a first conductivity type having a gate connected to the second output node, and a source-drain path connected between a second potential, higher than the first potential, and a fourth output node, the fourth output node outputting the internal potential; and a second output MOSFET with a second conductivity type having a gate connected to the third output node, and a source-drain path connected between a third potential, lower than the first potential, and the fourth output node, wherein the second and fourth input nodes are connected to the fourth output node, wherein said first differential amplifier has an offset on a lower side than the internal potential, and wherein said second differential amplifier has an offset on a higher side than the internal potential.