Patent ID: 6396887
Filing Date: 2002-05-28
Classification: G06F

Abstract:
A clock generator for generating a dependent output clock from a reference clock, said clock generator comprising:a frequency synthesis loop circuit configured to receive said reference clock, said reference clock having a fixed frequency, said frequency synthesis loop configured to generate a synthesized output clock having a frequency related to said fixed frequency of said reference clock; and phase alignment circuitry configured to receive said synthesized output clock, a reference-phase clock, and a dependent-phase clock, said reference-phase clock having the same frequency as the frequency of said dependent-phase clock, said phase alignment circuitry configured to detect the phase difference between said reference-phase clock and said dependent-phase clock, said phase alignment circuitry further configured to phase-shift said synthesized output clock according to a detected phase difference to generate said dependent output clock, wherein said dependent output clock has the same frequency as said synthesized output clock and is phase-shifted as a function of said detected phase difference between said reference-phase clock and said dependent-phase clock.