Patent ID: 7323735
Filing Date: 2008-01-29
Classification: G11C,H01L,Y10S

Abstract:
1. A semiconductor integrated circuit device comprising: a memory cell including a first n-channel MISFET, a second n-channel MISFET, a first p-channel MISFET, a second p-channel MISFET and a capacitor element, each of said first n-channel MISFET and said second n-channel MISFET having a gate electrode formed over a semiconductor substrate and extending over a channel forming region thereof, each of said first p-channel MISFET and said second p-channel MISFET having a gate electrode formed over said substrate and extending over a channel forming region thereof, a drain region of said first n-channel MISFET, a drain region of said first p-channel MISFET, said gate electrode of said second n-channel MISFET, and said gate electrode of said second p-channel MISFET being electrically connected to each other so as to form a first storage node, and a drain region of said second n-channel MISFET, a drain region of said second p-channel MISFET, said gate electrode of said first n-channel MISFET, and said gate electrode of said first p-channel MISFET being electrically connected to each other so as to form to a second storage node; and a first insulating film formed over said drain regions of said first and second n-channel MISFETs, said drain regions of said first and second p-channel MISFETs, said gate electrodes of said first and second n-channel MISFETs, and said gate electrodes of said first and second p-channel MISFETs so as to cover said drain regions of said first and second n-channel MISFETs, said drain regions of said first and second p-channel MISFETs, said gate electrodes of said first and second n-channel MISFETs, and said gate electrodes of said first and second p-channel MISFETs, wherein a first capacitor electrode of said capacitor element is formed over said first insulating film, wherein a second capacitor electrode of said capacitor element is formed over said first capacitor electrode, wherein a capacitor insulating film of said capacitor element is formed between said first capacitor electrode and said second capacitor electrode, wherein said first capacitor electrode is electrically connected to said first storage node, and wherein said second capacitor electrode is electrically connected to said second storage node.