Patent ID: 9040369
Filing Date: 2015-05-26
Classification: H01L

Abstract:
1. A method of forming a semiconductor device comprising: forming a protective dielectric layer on sidewalls of a replacement gate structure that is present over a channel region of a substrate; forming a source region and a drain region on opposing sides of the replacement gate structure; forming a mandrel dielectric layer overlying the source region and the drain region of the substrate, wherein the mandrel dielectric layer has an upper surface that is coplanar with an upper surface of the replacement gate structure; removing the replacement gate structure to provide an opening exposing the channel region of the substrate; forming a gate dielectric layer over the channel region and sidewalls of the opening; forming a work function metal layer on the gate dielectric layer; forming a metal fill material on the work function metal layer; recessing the metal fill material, said recessing forming a surface dielectric layer on a recessed surface of a remaining portion of the metal fill material, wherein an upper surface of the surface dielectric layer is below the upper surface of the mandrel dielectric layer; recessing vertical portions of the work function metal layer to form a U-shaped work function metal layer, wherein upper surfaces of the U-shaped work function metal layer are coplanar with or below the upper surface of the surface dielectric layer; forming a protective dielectric cap structure over the upper surface of the surface dielectric layer and the upper surfaces of the U-shaped work function metal layer; etching at least one via through the mandrel dielectric layer selective to the protective dielectric cap structure and the protective dielectric layer to expose a portion of at least one of the source region and the drain region; and forming a conductive fill in at least one via to provide a contact to the at least one of the source region and the drain region.