Patent ID: 6215320
Filing Date: 2001-04-10
Classification: G01R,H05K,Y10T

Abstract:
A multi-level circuit board for efficiently routing electrical signals, said circuit board including:an engagement surface layer comprising a first substrate and a set of contact pads formed through said substrate and disposed peripherally around said substrate across a relatively large surface area, and a set of engagement contacts formed through said substrate and arrayed in a densely packed surface area, said engagement contacts forming a substantially one-to-one correspondence with said contact pads;a plurality of subsequent layers disposed in fixed stacked relationship to said engagement surface layer, each subsequent layer includinga subsequent substrate, anda conductive pattern formed on said subsequent substrate and defining a plurality of signal paths; andconductive vias coupled to said contact pads and said engagement contacts and formed through said engagement surface layer and one or more of said plurality of subsequent layers to communicate with said respective signal paths, said conductive vias including selected sets of staggered vias formed in staggered heights and diameters to optimize the routing of said signal paths along said respective subsequent layers.