Patent ID: 9159560
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A method of forming hole patterns, the method comprising: sequentially stacking an upper pattering mask layer, a middle patterning mask layer, a lower patterning mask layer, and an upper buffer mask layer on a target layer; forming an upper patterning mask pattern, a middle patterning mask pattern, and a lower patterning mask pattern which collectively define a preliminary hole selectively exposing an upper surface of the upper buffer mask layer by selectively removing the upper patterning mask layer, the middle patterning mask layer, and the lower patterning mask layer; forming an inner spacer exposing a portion of the upper surface of the upper buffer mask layer on an inner wall of the preliminary hole; forming an upper buffer mask pattern by removing the exposed portion of the upper surface of the upper buffer mask layer using the upper patterning mask pattern and the inner spacer as an etch mask; forming a core insulating pattern filling the preliminary hole; exposing a portion of an outer side of the inner spacer and the middle patterning mask pattern by removing the upper patterning mask pattern; forming an outer spacer on the exposed portion of the outer side of the inner spacer, wherein the outer spacer exposes a portion of the middle patterning mask pattern; selectively exposing a first portion of the lower patterning mask pattern by removing the exposed portion of the middle patterning mask pattern; forming an empty space selectively exposing a first portion of the upper buffer mask pattern by removing the exposed first portion of the lower patterning mask pattern; forming a patterning barrier pattern in the empty space; exposing a second portion of the lower patterning mask pattern by removing the outer spacer and the middle patterning mask pattern; exposing a second portion of the upper buffer mask pattern by removing the exposed second portion of the lower patterning mask pattern; removing the exposed second portion of the upper buffer mask pattern; and removing the core insulating pattern, the inner spacer, and the patterning barrier pattern.