Patent ID: 7557654
Filing Date: 2009-07-07
Classification: H03F

Abstract:
1. A linearizer, comprising: a signal path in which an RF signal input terminal, an input side bias blocking capacitor, a diode pair including diodes having opposite polarities to each other, an output side bias blocking capacitor, and an RF signal output terminal are connected in series in a stated order; a bias circuit in which a resistor is provided between a signal path formed between the input side bias blocking capacitor and the diode pair and a bias terminal; an RF short-circuit capacitor whose one end is connected with the bias circuit between the bias terminal and the resistor and whose other end is grounded; and a DC feed inductor whose one end is connected with a signal path formed between the diode pair and the output side bias blocking capacitor and whose other end is grounded, wherein said diodes cause a gain having a valley characteristic in which the gain reduces and then increases when a signal current detected by at least one of said diodes becomes larger than a predetermined power.