Patent ID: 6748513
Filing Date: 2004-06-08
Classification: G06F

Abstract:
A method comprising:generating an enable signal in response to a digital address strobe signal and a digital address select signal to activate the enable signal prior to receipt of an address packet; receiving an address packet on an address pin for data requested from a processor on a system bus, the address packet having a first component describing a transaction type of the address packet and a second component describing attributes of the address packet; providing a flow-through path from the address pin to a chipset for the first component of the address packet in response to the enable signal, such that the first component of the address packet is provided to the chipset once the address packet appears on the address pin to expedite initiation of decoding of the address packet by the chipset; and providing the second component of the digital address packet to the chipset in response to the digital address strobe signal, such that the chipset can complete decoding of the address packet.