Patent ID: 9082641
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate; a first barrier layer disposed on the substrate; a first dielectric layer disposed on and directly contacting the first barrier layer; a second barrier layer disposed on the first barrier layer, wherein a first portion of the second barrier layer and a second portion of the second barrier layer are disposed between a first portion of the first dielectric layer and a second portion of the first dielectric layer; a third barrier layer disposed between the first portion of the second barrier layer and the second portion of the second barrier layer; a first metal gate disposed between the first portion of the second barrier layer and the second portion of the second barrier layer and disposed between the third barrier layer and the substrate, wherein no portion of the second barrier layer is disposed between the first metal gate and the substrate in a direction perpendicular to the substrate; a second dielectric layer, wherein the third barrier layer is disposed between the first metal gate and the second dielectric layer; a second metal gate; and a contact hole positioned between the first metal gate and the second metal gate and positioned between the second portion of the first dielectric layer and a third portion of the first dielectric layer.