Patent ID: 6977544
Filing Date: 2005-12-20
Classification: G11C,H03M

Abstract:
1. A method for driving a boosted sampling circuit comprising an input node and an output node, a sampling switch connected to the input node for sampling an input voltage and for generating a corresponding sampled voltage on the output node, and a control circuit for generating a control voltage for the sampling switch as a function of the input voltage, the control circuit comprising a boost capacitor comprising first and second plates, the method comprising: alternately charging the first plate of the boost capacitor with the input voltage and with a reference voltage using second and third switches, the second and third switches being respectively controlled by first and second logic control phases that are not active at a same time; alternately charging the second plate of the boost capacitor with a supply voltage using fourth and fifth switches, the fourth switch charging the second plate during a conduction state when the second logic control phase is active, and the fifth switch charging the second plate when connected to a control terminal of the sampling switch during a conduction state when the first logic control phase is active; turning off the sampling switch using a sixth switch by connecting the control terminal of the sampling switch to a voltage node having a certain voltage applied thereto, the sixth switch turning off the sampling switch during a conduction state when the second logic control phase is active; applying the input voltage to control terminals of the fourth, fifth and sixth switches when the first logic control phase is active; and generating the certain voltage so that a voltage drop on the voltage node is less than the supply voltage when the first logic control phase is active.