Patent ID: 8832638
Filing Date: 2014-09-09
Classification: G01R,G06F,G11C

Abstract:
1. A package test device, comprising: a printed circuit board having operation characteristics based on operation characteristics of an actual memory device including package capacitance, package inductance and chip capacitance of the actual memory device; a press device configured to press the printed circuit board toward a memory test device to couple the printed circuit board to the memory test device; and a coupling device placed between the printed circuit board and the press device, the coupling device being configured to couple the printed circuit board to the memory test device, wherein a signal line capacitance and a signal line inductance per unit length of a signal line are calculated based on the operation characteristics of the printed circuit board, and wherein a length of the signal line for each pin is determined based on the package capacitance and the signal line capacitance.