Patent ID: 7656217
Filing Date: 2010-02-02
Classification: H03K

Abstract:
1. A voltage level clamping circuit implemented in an integrated circuit (IC), the IC comprising a parasitic diode coupled between a first voltage source and a second voltage source, a voltage level of the second voltage source being not fixed to a predetermined voltage value during a start-up operation period of the IC, the voltage level clamping circuit comprising: a switch module, coupled between the first voltage source and the second voltage source, and connected to the parasitic diode in parallel; and a comparator module, having an output terminal coupled to the switch module, a first input terminal coupled to the first voltage source, and a second input terminal coupled to the second voltage source, the comparator module being utilized for comparing a voltage level of the first voltage source with the voltage level of the second voltage source to generate an output signal, and transmitting the output signal to the switch module to control a conducting state of the switch module to selectively clamp the voltage level of the second voltage source, the comparator module comprising: