Patent ID: 7572711
Filing Date: 2009-08-11
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming a first opening and a second opening through a plurality of thin layers including a support layer on a substrate, the first opening exposing a top surface of a contact pad formed in a cell area of the substrate, and the second opening being formed in a boundary region of both the cell area and a peripheral area of the substrate; forming a storage electrode on a sidewall and a bottom of the first opening and forming a guide ring on a sidewall and a bottom of the second opening by removing portions of a conductive layer not formed along the sidewalls and bottoms of the first and second openings, wherein forming the storage electrode and the guide ring includes forming the conductive layer on the sidewalls and bottoms of the first and second openings and on the thin layers, forming a sacrificial layer on the conductive layer to a sufficient thickness to fill the first and second openings, wherein the sacrificial layer comprises an insulation material, and removing the sacrificial layer and the conductive layer until one of the thin layers is exposed, so that the sacrificial layer and the conductive layer remain only in the first and second openings; forming a mesh-shaped support pattern by etching the thin layers so that the support layer in the cell area is partially etched and the support layer in the peripheral area remains un-etched to thereby be exposed, so that the mesh-shaped support pattern supports and surrounds a plurality of storage electrodes adjacent to each other in the cell area and prevents a layer underlying the support layer from being etched in the peripheral area, wherein forming the mesh-shaped support pattern includes sequentially forming a dielectric layer and a plate electrode on the storage electrode and the guide ring.