Patent ID: 6309952
Filing Date: 2001-10-30
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:(a) forming a relatively thin and dense precursor oxide layer on a semiconductor substrate, thermally growing a relatively thick oxide layer that incorporates therein said precursor oxide layer by exposing the thin and dense precursor oxide layer to one of steam or wet O.sub.2 at a temperature elevated above the temperature range used for forming the relatively thin and dense precursor oxide layer, conducting a post-oxidation anneal in a non-oxidizing atmosphere at a temperature greater than the steam or wet O.sub.2 temperature, so as to substantially reduce total oxide charge and SiO.sub.2 --Si interfaced trap density (Dit), patterning said relatively thick oxide layer to form an impurity implant aperture therein, so as to expose a selected surface portion of said semiconductor substrate, and introducing conductivity type determining impurities into said selected surface portion of said semiconductor substrate, so as to form a region containing near-surface region crystalline damage;(b) annealing the structure resulting from step (a) in a non-oxidizing atmosphere to reduce said near-surface region crystalline damage;(c) performing partial drive-in of said conductivity type determining impurities away from said near-surface region to material of said semiconductor substrate adjoining said region;(d) forming an insulator layer upon said region by first forming a thin bulk precursor oxide layer in a dry oxygen (O.sub.2) to thermally form a bulk junction termination extension (JTE) oxide; and(e) annealing the structure resulting from step (d) in a non-oxidizing atmosphere and effecting a further drive-in of said conductivity type determining impurities to material of said semiconductor substrate adjoining said region.