Patent ID: 9013165
Filing Date: 2015-04-21
Classification: G05F,H02M,Y02B

Abstract:
1. A multi-mode pulse width modulation (PWM) controller for a buck switching regulator, the switching regulator receiving an input voltage and controlling a high-side switch and a low-side switch using a feedback control loop to generate a switching output voltage, the switch output voltage being applied to an LC filter circuit to generate a regulated output voltage having a substantially constant magnitude on an output node, the PWM controller comprising: a multi-mode PWM control circuit configured to receive a feedback voltage indicative of the regulated output voltage, a current sense signal indicative of an inductor current of the LC filter circuit, and a mode select signal, the PWM control circuit configured to incorporate two or more control schemes selectable by the mode select signal, the PWM control circuit being configured to operate in a selected control scheme to generate a duty cycle control signal; a control logic circuit configured to receive the duty cycle control signal and the mode select signal, the control logic circuit being configured to generate gate drive signals for controlling the high-side switch and the low-side switch; and a minimum OFF-time timer configured to provide a minimum off time signal to the control logic circuit, the minimum off time signal determining the minimum time the high-side switch is to be turned off before being turned back on, wherein the mode select signal is applied to configure the PWM control circuit and the control logic circuit to operate in one of the two or more control schemes.