Patent ID: 7981316
Filing Date: 2011-07-19
Classification: C09G,C09K,C23F,H01L

Abstract:
1. A method for removing barrier materials from a semiconductor substrate in the presence of interconnect metals comprising the step of planarizing the semiconductor substrate with the polishing solution of comprising 0.1 to 10 weight percent hydrogen peroxide, at least one pH adjusting agent selected from the group consisting of nitric acid, sulfuric acid, hydrochloric acid and phosphoric acid for adjusting a pH level of the polishing solution to less than 3, 0.25 to 1.7 weight percent benzotriazole inhibitor for reducing removal rate of the interconnect metals, 0 to 10 weight percent surfactant, 0.01 to 10 weight percent colloidal silica having an average particle size of less than 50 nm and balance water and incidental impurities; and a polishing pad at a pressure normal to the semiconductor substrate of less than 15 kPa to provide a tantalum nitride to copper selectivity of at least 3 to 1 and a tantalum nitride to TEOS selectivity of at least 3 to 1.