Patent ID: 6272141
Filing Date: 2001-08-07
Classification: G06F,H04L

Abstract:
An interconnect structure comprising:a plurality of nodes arranged in a topology of three dimensions;means for transmitting a message from a node N to a target destination including:means for determining whether a node en route to the target destination in the second and third dimensions and advancing one level toward the destination level of the first dimension is blocked by another message;means for advancing the message one level toward the destination level of the first dimension when the en route node is not blocked;means for moving the message in the second and third dimensions along a constant level in the first dimension otherwise;means for specifying the first dimension to describe a plurality of levels, the second dimension to describe a plurality of nodes spanning a cross-section of a level, and the third dimension to describe a plurality of nodes in the cross-section of a level;means for sending a control signal from a node on the level of the en route node to the node N in the first dimension, the control signal specifying whether the node en route is blocked;means for timing transmission of a message using a global clock specifying timing intervals to keep integral time modulus the number of nodes in a cross-section of a level;means for setting a first time interval .alpha. for moving the message in the second and third dimensions;means for setting a second time interval .alpha.-.beta. for advancing the message one level toward the destination level, the global clock specifying a global time interval equal to the second time interval, the first time interval being smaller than the global time interval; andmeans for setting a third time interval for sending the control signal from the node on the level of the en route node to the node N, the third time interval being equal to .beta..