Patent ID: 8953074
Filing Date: 2015-02-10
Classification: H04N

Abstract:
1. A semiconductor device, comprising: a pixel array portion in which unit pixels are disposed in a matrix of columns and rows, wherein vertical signal lines respectively correspond to columns of the unit pixels to provide readout signals from the unit pixels in the respective columns; an AD conversion portion including comparing units and counter units, the comparing units being respectively configured to compare a reference signal and the readout signals from the respective columns, the counter units being configured to perform a count operation in a count operation effective period based on comparison results of the comparing units from the respective columns, the AD conversion portion performing AD conversion processing for acquiring digital data of the readout signals on the basis of output data of the counter units; and an operating current supplying portion, including transistors corresponding to the respective columns, each transistor having a gate terminal, a first current terminal and a second current terminal, the first current terminal being connected to a respective vertical signal line at a node between the pixel array portion and the AD conversion portion, the second current terminal being connected to a reference current source, and the gate terminal being connected to a column stop control signal line, wherein power consumption is controlled to be lower in a pixel selection mode in which only information on a part of the unit pixels for one row in the pixel array portion is required than in a normal operation mode.