Patent ID: 7101783
Filing Date: 2006-09-05
Classification: H01L

Abstract:
1. A method for forming a bit-line of a semiconductor device, comprising the steps of: forming a gate electrode on a semiconductor substrate comprising a device isolation film; forming an interlayer insulating film on the semiconductor substrate including the gate electrode; selectively etching the interlayer insulating film to form bit-line contact holes exposing an upper surface of the gate electrode and a portion of the semiconductor substrate; forming a barrier metal layer on the interlayer insulating film including the bit-line contact holes; forming a CVD tungsten layer filling the bit-line contact hole on the barrier metal layer; polishing the CVD tungsten layer and the barrier metal layer until the interlayer insulating film is exposed to form a bit-line contact plug; subjecting the interlayer insulating film and the upper surface of the bit-line contact plug to a sputter etching process; forming a PVD tungsten layer on the interlayer insulating film and the upper surface of the bit-line contact plug; and selectively etching the PVD tungsten layer to form a tungsten bit-line.