Patent ID: 6762618
Filing Date: 2004-07-13
Classification: H03K

Abstract:
A multi-level routing structure embedded within a programmable device, comprising:a first-level routing structure configurable to, in a user mode, receive a first set of input signals and route the first set of input signals through a first switch matrix to form a first set of output signals and to, in a verify mode, route a test signal through the first switch matrix to form the first set of output signals; a second-level routing structure configurable to, in the user mode, receive the first set of output signals and route the first set of output signals through a second switch matrix to form a second set of output signals and to, in the verify mode, route the test signal through the second switch matrix to form the second set of output signals; and a sense gate operable in the verify mode to receive the first set of output signals or the second set of output signals and form there from a set of verification signals.