Patent ID: 7817477
Filing Date: 2010-10-19
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor memory device having a plurality of memory cells in an FET structure formed on a semiconductor substrate, each of the plurality of memory cells being to store a unit bit and hold information data, the method comprising: a preparing step that prepares the plurality of memory cells; a writing step that writes bits of the information data to the memory cells; a baking step that allows the memory cells to stand at a predetermined ambient temperature for a predetermined time after the writing step; and a rewriting step that writes bits of the information data to the memory cells after the baking step; wherein the semiconductor memory device, before written with the information data to the memory cells, is processed with a step of electrical erasing data being held by the memory cell and a step of neutralization baking of allowing the semiconductor memory device to stand at a first ambient temperature for a first time, the predetermined ambient temperature in the baking step being lower than the first ambient temperature in the neutralization baking step.