Patent ID: 6191033
Filing Date: 2001-02-20
Classification: H01L,Y10S

Abstract:
A method of fabricating an integrated circuit structure having a barrier layer at contact locations, comprising the steps of:forming a doped semiconductor region at a semiconducting surface of a body;forming a dielectric film over said doped region, said dielectric film having a contact opening therethrough;forming a first titanium layer over the contact opening;exposing the first titanium layer to an oxygen-bearing atmosphere to form a first oxygen-stuffed titanium layer;annealing the first oxygen-stuffed titanium layer in a nitrogen atmosphere, forming titanium silicide within the doped region of the contact opening and forming a first titanium oxynitride layer overlying the dielectric film and the contact opening;forming a titanium nitride layer over the first titanium oxynitride layer;forming a second titanium layer over the titanium nitride layer;exposing the second titanium layer to an oxygen-bearing atmosphere to form a second oxygen-stuffed titanium layer;annealing the second oxygen-stuffed titanium layer, forming a second titanium oxynitride layer over the first titanium oxynitride layer.