Patent ID: 7981722
Filing Date: 2011-07-19
Classification: H01L

Abstract:
1. A fabrication method of a semiconductor device, the method comprising the steps of: bonding a first semiconductor main body and a second semiconductor main body onto a substrate, a thickness of said first semiconductor main body differing from a thickness of said second semiconductor main body; forming first ones of projected electrodes on said first semiconductor main body, second ones of the projected electrodes being formed on said second semiconductor main body; polishing a first insulating layer to expose the projected electrodes, said first insulating layer being a non-photosensitive resin; forming a second insulating layer on said projected electrodes and said first insulating layer, said second insulating layer being a photosensitive resin, forming a first wiring between said second insulating layer and a third insulating layer, said first wiring electrically connecting one of the projected electrodes to another of the projected electrodes; polishing an insulating buffer layer to expose conductive posts, said insulating buffer layer being formed on said third insulating layer; forming bumps on said conductive posts, said bumps being electrically connecting through said conductive posts to said projected electrodes, wherein first pad electrodes are between said first semiconductor main body and said first ones of the projected electrodes, wherein a resin layer is formed on said first pad electrodes and a protective insulating film, said first pad electrodes and said protective insulating film being formed on said first semiconductor main body, wherein said resin layer is another photosensitive resin.