Patent ID: 9172394
Filing Date: 2015-10-27
Classification: H03K,H03M,H04L

Abstract:
1. A signal conversion system for converting an input signal to a pulse width modulated (PWM) output signal comprising: a clock source for generating and/or for accepting a clock signal; a carrier generator configured to generate a carrier signal with a carrier signal frequency; a cross-point section (CPS) block comprising a CPS comparator to compare the carrier signal to the input signal or a signal derived therefrom to produce a triggered signal based on the comparison and the input signal or the signal derived therefrom; a noise shaper configured to bit depth reduce the triggered signal to form a truncated signal; a PWM comparator configured to compare the truncated signal and/or a signal generated therefrom with the carrier signal to produce the PWM output signal; and a sample rate converter comprising a counter configured to generate a count-disparity signal from the clock signal and the input signal, a first sigma delta unit configure to calculate a temporal correction value from the count disparity signal, a resampled clock generator configured to generate one or more resampled clock signals from the temporal correction value, and a second sigma delta unit configured to generate the resampled signal from one or more of the resampled clock signals and the input signal.