Patent ID: 7932771
Filing Date: 2011-04-26
Classification: G05F,H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor element including a current mirror circuit which includes two transistors; a first parasitic resistance formed at a first drain of the two transistors and a second parasitic resistance formed at a second drain of the two transistors; and a connection terminal electrically connected to the first drain via an electric conductor including a plurality of bonding wires, the connection terminal being configured to perform input and output relative to an outside of the semiconductor device, wherein resistance values of the plurality of bonding wires are controlled so that a shift of an output electric current of the current mirror circuit caused by a difference between values of the first parasitic resistance and the second parasitic resistance is corrected by satisfying a relationship of Ra+Rc where Ra designates the value of the first parasitic resistance, Rb designates the value of the second parasitic resistance, RcN designate resistance values of the plurality of bonding wires (N Is a natural number of 2 or more, and n Is a natural number).