Patent ID: 8872228
Filing Date: 2014-10-28
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: receiving an IC device substrate having a first device region corresponding to a first IC device and a second device region corresponding to a second IC device; receiving an identification of the first IC device as a low-strain IC device based on one of a gate size of the first IC device, a critical dimension of the first IC device, and a device spacing of the first IC device; performing an implantation process on the first device region, thereby forming a first amorphous region having an amorphous crystalline structure, the first amorphous region disposed within the first device region; recessing the IC device substrate to define a first source/drain recess having a first profile in the first device region and a second source/drain recess having a second profile in the second device region, wherein the recessing is configured to define the first source/drain recess as having the first profile determined by the amorphous crystalline structure of the first amorphous region, and wherein the first profile of the first source/drain recess is different from the second profile of the second source/drain recess; and performing source/drain epitaxy after the recessing of the IC device substrate to form a first source/drain structure within the first source/drain recess and to form a second source/drain structure within the second source/drain recess, wherein the performing of the implantation process is performed based on the identification of the first IC device.