Patent ID: 7903560
Filing Date: 2011-03-08
Classification: H04J,H04L

Abstract:
1. A method, comprising: receiving, by test analyzer equipment, a timing exposure packet having timestamp information, said timestamp information identifying a cycle of a clock signal at which said packet was made available for transfer from a core to a physical layer within a component of a link-based computing system, said packet having been transmitted from said physical layer, said packet also having phase information, said phase information identifying a cycle of said clock signal at which said packet was transferred from said core to said physical layer, said core composed of first electronic circuitry, said physical layer composed of second electronic circuitry; and wherein said phase information is a number selected from a group of N numbers, where, N is the number of cycles of said clock signal that can be fit into a period of time that is coextensive with a plurality of clock cycles of a second clock signal, said second clock signal used to clock said physical layer; using said timestamp information and said phase information to establish a correlation between when packets are observed on a link and when said packets were submitted to said physical layer for transmission on said link.