Patent ID: 8900925
Filing Date: 2014-12-02
Classification: H01L

Abstract:
1. A method for manufacturing a diode, comprising: producing one of a p-n or n-p junction in a semiconductor crystal wafer, wherein the one of the p-n or n-p junction extends in planar fashion across a top side of the semiconductor crystal wafer; and subsequently separating the semiconductor crystal wafer into individual diode chips in a separation process in which separation edges are formed perpendicularly to the top side of the semiconductor crystal wafer and extend across the one of the p-n or n-p junction; wherein the separation process includes: introducing a surface disturbance into a top surface of the semiconductor crystal wafer, wherein the surface disturbance is located at a peripheral edge of the crystal wafer, subsequently providing a local heating of a first area of the top surface spatially removed from the surface disturbance, and subsequently providing a local cooling of a second area of the top surface spatially removed from the first area and the surface disturbance, wherein the local heating followed by the local cooling achieve a fissure propagation due to mechanical stresses starting from the surface disturbance.