Patent ID: 7833892
Filing Date: 2010-11-16
Classification: H01L

Abstract:
1. A method of forming a field effect transistor, comprising: forming a gate electrode of a field effect transistor over a silicon-comprising substrate, the gate electrode comprising a sidewall; forming a first electrically insulative anisotropically etched sidewall spacer over the sidewall of the gate electrode; forming a second anisotropically etched sidewall spacer over and in direct physical contact with the first sidewall spacer, the second anisotropically etched sidewall spacer being distinct from the first sidewall spacer and the second anisotropically etched sidewall spacer comprising a combination of an electrically conductive material, an electrically insulative material, and a semiconductive material; depositing metal over the first and second sidewall spacers and over silicon of a source/drain region of the transistor proximate the second sidewall spacer; and annealing the substrate effective to react the metal with silicon of the substrate to form an electrically conductive metal silicide on the source/drain region which is spaced from the first sidewall spacer.