Patent ID: 6022757
Filing Date: 2000-02-08
Classification: H01L

Abstract:
A semiconductor device manufacturing method comprising the steps of:preparing an integrated circuit chip having at each side a group of first connector electrodes which are exposed to a surface for the purpose of external connection;preparing a semiconductor wafer or a metal substrate which can provide a storage space for said integrated circuit chip by providing an excision area extending from a back face to a surface, and providing a slit in a form of grid around said storage space to enable arrangement of a group of external connector electrodes corresponding to said group of first connector electrodes which are located at said each side;forming said storage space after removing said semiconductor wafer or said metal substrate which is separated by said slit located on the inward side of said group of external connector electrodes; andstoring said integrated circuit chip into said storage space and electrically connecting said group of first connector electrodes with said group of external connector electrodes in order to form an integral semiconductor device.