Patent ID: 7122893
Filing Date: 2006-10-17
Classification: H01L

Abstract:
1. A semiconductor package structure, comprising: a semiconductor component, having a first surface and a first side surface, the first side surface having a first circumference; a substrate, having an upper surface, a second side surface and a lower surface, the substrate located under the semiconductor component, the second side surface having a second circumference wherein a jointing area is formed between the first surface of the semiconductor component and the upper surface of the substrate; a plurality of solder bumps, disposed in the jointing area, for electrically coupling the semiconductor component and the substrate; underfill, filled in the jointing area, for coating the solder bumps and jointing the semiconductor component and the substrate; and a buffer means, disposed in the jointing area, for buffering the underfill to be confined in the jointing area, the buffer means comprising: a cut indent, disposed at a turning part of the semiconductor component from the first surface to the first side surface, wherein the cut indent forms a sidewall on the semiconductor component, and the sidewall is located within the first circumference; and a groove, disposed on the upper surface of the substrate wherein the groove forms a blocking wall on the substrate, and the blocking wall is located within the first circumference and located outside of the sidewall.