Patent ID: 6211552
Filing Date: 2001-04-03
Classification: H01L

Abstract:
A transistor, comprising:a semiconductor layer of a first conductivty type;a RESURF region of a second conductivity type formed in the semiconductor layer, said RESURF region extending from the face of the semiconductor layer to a first distance below the face of the semiconductor layer;a LOCOS field oxide region formed at a face of the RESURF region, the RESURF region being self-aligned to the LOCOS field oxide region;a well of the first conductivity type formed in the semiconductor layer;a source region of the second conductivity type formed in the well, a channel region defined in the well between a first edge of the source region and a first edge of the RESURF region;a drain region of the second conductivity type formed in the semiconductor layer adjacent a second edge of the RESURF region, the drain region including a first region extending from the face of the semiconductor layer to a second distance below the face of the semiconductor layer and a second region surrounding the first region and extending a third distance below the face of the semiconductor layer, the first distance being greater than the third distance, the third distance being greater than the second distance, and the first region being more heavily doped than the second region; anda conductive gate formed over and insulated from the channel region.