Patent ID: 9105503
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. A package-on-package device, comprising: a first semiconductor package including a first package substrate and a logic chip on the first package substrate; and a second semiconductor package on the first semiconductor package, the second semiconductor package including a second package substrate and first and second memory chips mounted side-by-side on a top surface of the second package substrate, wherein the logic chip includes first and second data logic pads, the first and second data logic pads configured to communicate data signals and electrically connected to the first and second memory chips, respectively, and the first and second data logic pads are adjacent to one sidewall or opposite two facing sidewalls of the logic chip, wherein the first and second memory chips includes first and second memory pads which are electrically connected to first conductive patterns on the top surface of the second package substrate via first and second wires.