Patent ID: 6137161
Filing Date: 2000-10-24
Classification: H01L

Abstract:
A semiconductor package including a circuit module having a series of electrical contacts along a lower surface which are adapted to be connected to a substrate contact surface presenting a series of contacts positioned to be connected to said circuit module series of electrical contacts, said semiconductor package further comprisingan interposer array having upper surface contacts respectively electrically connected to said circuit module series of electrical contacts and lower surface electrical contacts positioned to enable alignment and electrical connection with said substrate series of electrical contacts, said upper surface contacts being respectively connected to said lower surface electrical contacts to form input/output lines including power input lines and signal lines;distributed capacitive means positioned within said interposer adjacent said interposer upper surface and connected to power input lines to provide distributed decoupling capacitance;signal line to ground capacitances within said interposer array and connected to respective signal lines to permit the fundamental signal frequency to pass through while unwanted frequencies are shunted to ground; andcontinuous electrically conductive shielding adjacent the top and four sides of the composite connected structure of said circuit module and said interposer array which is electrically connected to ground circuits within said interposer array.