Patent ID: 8193866
Filing Date: 2012-06-05
Classification: H03L

Abstract:
1. An all-digital phase-locked loop (ADPLL) comprising: a digital macro module for receiving signals carrying phase information and frequency information related to a feedback signal, the digital macro module comprises: a digital loop filter, comprising a proportional path module and a digital low-pass filter, for generating an integer signal and a fractional signal; and a modulator across the digital loop filter, comprising: a first accumulator having an input terminal for receiving a modulation signal; an accumulator (ACC) amplifier having an input terminal coupled to an output terminal of the first accumulator and an output terminal coupled to an input terminal of the digital loop filter; and a modulator (MOD) amplifier having an input terminal for receiving the modulation signal and an output terminal coupled to an output terminal of the digital loop filter; and a feedback path module, coupled between the output terminal of the digital loop filter and the input terminal of the digital loop filter, comprising: wherein the ADPLL is used for direct-frequency modulation (DFM).