Patent ID: 7655569
Filing Date: 2010-02-02
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: providing a device intermediate comprising a semiconductor substrate, an ultraviolet erasable memory cell formed on the substrate, a wiring layer connected to the memory cell and formed on the substrate, an interlayer insulation film covering the memory cell and the wiring layer, and an external connection electrode formed on the interlayer insulation film away from the memory cell; forming an etching stopper film that transmits ultraviolet light to cover the external connection electrode and the interlayer insulation film; etching the etching stopper film so as to expose the external connection electrode and to leave the memory cell covered by the etching stopper film; forming a protection film that does not transmit ultraviolet light to cover the remaining etching stopper film and the exposed external connection electrode; and etching the protection film so as to expose the external connection electrode and the etching stopper film covering the memory cell.