Patent ID: 8542602
Filing Date: 2013-09-24
Classification: H04L

Abstract:
1. An architecture for policing packets in a communications network comprising: a plurality policing elements, each policing element processing packet flows to indicate whether a packet is in conformance with given parameters of a flow; and at least two hierarchical levels of said policing elements, wherein packets that are output from a policing element at one hierarchical level are capable of being simultaneously policed by multiple policing elements in a single direction at a subsequent hierarchical level using at least two parallel non-overlapping paths such that hierarchies of said policing elements become enmeshed with one another and such that two policers at a same hierarchical level use different flow definitions as applied to a packet being processed, wherein a packet includes a data queue pointer and a number of control queue pointers wherein said number of control queue pointers is the total number of policing elements across all hierarchical levels and wherein the data queue pointer includes a pointer to the location of the entire packet in memory, l(p), the size of the packet, s(p), and the conformance status of the packet c(p).