Patent ID: 8935461
Filing Date: 2015-01-13
Classification: G06F,G11C

Abstract:
1. A memory unit having a memory array having a plurality of memory cells which each store one of at least two values including a first value and a second value, where the memory unit performs a rewrite operation by repeating application of a rewrite voltage pulse and verification, comprising: a storage element configured to store a number of times of the application of the rewrite voltage pulse into the memory array; and a required-time output unit configured to output data representing a required time for the rewrite operation based on the number of times of the application of the rewrite voltage pulse stored in the storage element, wherein the required-time output unit includes a storage unit configured to store a maximum value, a minimum value, and an average value of the numbers of times of the application of the rewrite voltage pulse stored in the storage element with respect to a plurality of rewrite operations, and computes the required time for the rewrite operation based on one of the maximum value, the minimum value, or the average value stored in the storage unit.