Patent ID: 6306694
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A process of fabricating a semiconductor device which includes a pixel portion and driving circuits over a substrate, comprising;forming a semiconductor film containing a crystalline structure over said substrate,subjecting said semiconductor film to a first optical annealing,introducing a p-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby p-type impurity regions (b) are formed,introducing a n-type impurity element to regions of said semiconductor film which are to constitute n-channel type TFTs forming said driving circuits, whereby n-type impurity regions (b) are formed,subjecting said semiconductor film to a second optical annealing,patterning said semiconductor film to form active layers of said n-channel type TFTs and p-channel type TFTs,forming a gate insulating film on said active layers,forming gate wirings on said gate insulating film,introducing an n-type impurity element to said active layers by using said gate wirings as a mask to form n-type impurity regions (c),etching said gate insulating film by using said gate wirings as a mask,introducing an n-type impurity element to said active layers of said n-channel type TFTs to form n-type impurity regions (a), andintroducing a p-type impurity element to said active layers of said p-channel type TFTs to form p-type impurity regions (a).