Patent ID: 6307237
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A semiconductor device comprising:active region formed on an insulating layer and surrounded by an isolation region, the active region having a top edge, a bottom edge, a first lateral edge, and a second lateral edge;a first L-shaped gate having a first leg and a second leg;the first leg of the first L-shaped gate spaced inward from the first lateral edge and spaced inward of the second lateral edge, and extending into the active region over the top edge;the second leg of the first L-shaped gate spaced inward of the top edge and extending into the active region over the first lateral edge, the second leg of the first L-shaped gate intersecting the first leg of the first L-shaped gate but not extending to the second lateral edge;a first drain region defined by the first lateral edge, the first leg of the first L-shaped gate, the top edge and the second leg of the first L-shaped gate;a source region defined by the second lateral edge and the first L-shaped gate;the source region and the drain region having a first conductivity type;the active region under the first leg and the second leg of the first L-shaped gate having a second conductivity type;a first implant region having the second conductivity type extending from a portion of the first L-shaped gate into at least a portion of the source region; anda first electrically conducting layer extending over at least a portion of the first implant region and the source region for electrically connecting the first implant region to the source region.