Patent ID: 7706413
Filing Date: 2010-04-27
Classification: H04J

Abstract:
1. A synchronization system for synchronous transport network equipment, the system comprising: a first synchronization module comprising i) a first submodule that delivers a first intermediate clock signal selectively defined on the basis of a signal selected from a first external reference clock signal and an internal reference clock signal, where applicable after a change of frequency, ii) a second submodule that delivers a first main reference clock signal selectively defined on the basis of a signal selected from said first intermediate clock signal and a second intermediate clock signal, and iii) a third submodule that delivers a first output reference clock signal selectively defined on the basis of a signal selected from said first main reference clock signal and a second main reference clock signal, where applicable after a change of frequency, and a second synchronization module comprising i) a first submodule that delivers said second intermediate clock signal selectively defined on the basis of a signal selected from another first external reference clock signal and another internal reference clock signal, where applicable after a change of frequency, ii) a second submodule that delivers said second main reference clock signal selectively defined on the basis of one of said first and second intermediate clock signals, and iii) a third submodule that delivers a second output reference clock signal selectively defined on the basis of one of said first and second main reference clock signals, where applicable after a change of frequency; wherein said first submodule of said first module delivers said first intermediate clock signal selectively defined on the basis of a signal selected from at least said first external reference clock signal and a second external reference clock signal, where applicable after a change of frequency, and said first submodule of said second module delivers said second intermediate clock signal selectively defined on the basis of a signal selected from at least said other first external reference clock signal and another second external reference clock signal, where applicable after a change of frequency; wherein: said second submodule of said first module i) has a primary input receives said first intermediate clock signal, a secondary input receives said second intermediate clock signal, and a tertiary input receives said second main reference clock signal, and ii) aligns the phase of said second main reference clock signal received at said tertiary input to the phase of said first main reference clock signal in such a manner as to make up at least partly any phase difference between said second and first main reference clock signals, and said second submodule of said second module i) has a primary input receives said first intermediate clock signal, a secondary input receives said first intermediate clock signal, and a tertiary input receives said first main reference clock signal, and ii) aligns the phase of said first main reference clock signal received at said tertiary input to the phase of said second main reference clock signal in such a manner as to make up at least partly any phase difference between said first and second main reference clock signals.