Patent ID: 6647079
Filing Date: 2003-11-11
Classification: H04L

Abstract:
A circuit configured to recover clock and data streams from an incoming signal, comprising:a multiplexer having first and second inputs, and an output, said first input being configured to receive said incoming signal, and said second input being configured to receive a reference clock signal, said output selectively supplying one of said incoming signal and said reference clock signal; a toggling circuit coupled to said multiplexer output, said one of said incoming signal and said reference clock signal being supplied to a first input of said toggling circuit; a frequency multiplier circuit coupled to said output of said multiplexer; and a filter circuit coupled to said frequency multiplier circuit, an output of said filter circuit being coupled to a second input of said toggling circuit, said output of said filtering circuit corresponding to said recovered clock stream, and an output of said toggling circuit corresponding to said recovered data stream.