Patent ID: 6445224
Filing Date: 2002-09-03
Classification: H03K

Abstract:
A reduced short-current circuit comprising:a pre-driver circuit; a first pre-driver input; a second pre-driver input; a first pre-driver output; a second pre-driver output; and a first delay pair, comprising: a first transistor having a gate directly coupled to the first pre-driver input, a source directly coupled to the first pre-driver output, and a drain directly coupled to the second pre-driver output; and a second transistor having a gate directly coupled to the first pre-driver input, a drain directly coupled to the first pre-driver output, and a source directly coupled to the second pre-driver output; and a second delay pair, comprising: a third transistor having a gate directly coupled to the second pre-driver input, a source directly coupled to the first pre-driver output, and a drain directly coupled to the second pre-driver output; and a fourth transistor, having a gate directly coupled to the second pre-driver input, a drain directly coupled to the first pre-driver output, and a source directly coupled to the second pre-driver output.