Patent ID: 6995448
Filing Date: 2006-02-07
Classification: H01L,Y10S

Abstract:
1. A semiconductor package, comprising: a substrate having a plurality of electrically conductive patterns formed on a surface thereof wherein the substrate defines an aperture therein; at least one passive element mounted within the aperture; a semiconductor die mounted within the aperture and above the at least one passive element, whereby the semiconductor die is mechanically secured above a top surface of the at least one passive element without electrical connection between any electrical terminal of the semiconductor die and an electrical terminal of the at least one passive element, and wherein said semiconductor die is mechanically secured by an adhesive layer contacting the top surface of the at least one passive element and a bottom surface of the semiconductor die; a plurality of conductive connectors for electrically connecting electrical connections of the semiconductor die to the electrically conductive patterns; and an encapsulation disposed on the top surface of the substrate, covering the semiconductor die and the conductive connectors and wherein the at least one passive element has a bottom surface conformal to a bottom surface of the encapsulant whereby electrical connections to the at least one passive of conductive connectors for electrically element are exposed.