Patent ID: 6413811
Filing Date: 2002-07-02
Classification: H01L

Abstract:
A process for manufacturing a shared contact in a semiconductor device with a flip-flop circuit or a semiconductor device where a gate electrode in a first MOSFET is electrically connected to a source or drain region in a second MOSFET, essentially consisting of the steps of:1) forming a gate electrode in a first MOSFET and a second MOSFET on a semiconductor substrate surface; 2) depositing an insulating material on the whole surface of the semiconductor substrate surface and etching a first part of said insulating material back to form a side wall made of the insulating material on the side of the gate electrode; 3) removing a first part of the gate electrode for exposing a corresponding part of the semiconductor substrate surface; 4) ion-implanting a dopant whose conduction type is different from that in the semiconductor substrate, to the exposed semiconductor substrate surface in the area where the first part of the gate electrode has been removed and ion-implanting said dopant to a source-drain region of said first MOSFET and said second MOSFET; 5) depositing an interlayer insulating film on the whole surface of the semiconductor substrate surface and removing the interlayer insulating film in the area where the first part of the gate electrode has been removed to form a contact hole; and 6) filling a conductive material in the contact hole.