Patent ID: 8453132
Filing Date: 2013-05-28
Classification: G06F

Abstract:
1. A method, executed by one or more processors, for reducing non-local access for dynamically generated code residing in a code buffer in a non-uniform memory access (“NUMA”) computer system including multiple nodes, comprising: partitioning the code buffer into multiple smaller code buffers; assigning each of the multiple smaller code buffers to one of the multiple nodes; performing escape analysis during compilation of methods; determining if there are any methods that do not escape the associated sets of threads based on the escape analysis, a thread defining a particular execution path in a computer system; if so, placing the generated code associated with the methods and the sets of threads in the associated partitioned multiple smaller code buffers that are assigned to the multiple nodes; if the methods escape, placing the generated code associated with the methods and the sets of threads in the multiple smaller code buffers based on off-line profile data selected from a group consisting of the number of invocations executed in interpreter mode of the methods, the number of invocations executed in compilation mode of the methods, total number of invocations of the methods, average time taken for one invocation in interpreter mode of the methods, average time taken for one invocation of compiled code of the methods, the invocation count at the time it is sent to the compile request list, the method size estimated from a cost analysis of the instructions in the methods and compilation time; determining if an object is accessed only by a single thread during the object's lifetime; and if so, removing synchronization operations on the object.