Patent ID: 7313028
Filing Date: 2007-12-25
Classification: G11C

Abstract:
1. A method for operating a page buffer of a nonvolatile memory device including a memory cell array composed of memory cells that are arranged on intersections of wordlines and bitlines, pluralities of the page buffers being connected to the memory cell array through a sensing line and each page buffer having first and second latch circuits and a copy-back programming switch, the method comprising: activating the first latch circuit and inactivating the second latch circuit in the page buffer and transferring a data stored in a first node of the first latch circuit into the sensing line through the copy-back programming switch connected between the first node of the first latch circuit and the sensing line during a copy-back programming operation; and activating the first and second latch circuits during programing, reading, and verifying operations, wherein verifying comprises precharging the sensing line, detecting a precharged or discharged state of the sensing line and storing a data bit, which has been programmed in the memory cell, into one of the first and second latch circuits, and determining a pass or failed state of the programming operation in response to a voltage level of the data bit stored in said one of the first and second latch circuits.