Patent ID: 8718123
Filing Date: 2014-05-06
Classification: G11C

Abstract:
1. A test apparatus that tests a device under test exchanging, with the test apparatus, a data signal and a clock signal indicating a timing at which the data signal is to be sampled, via a bidirectional bus, the test apparatus comprising: a test signal supplying section that supplies the device under test with a data signal and a clock signal, as a test signal, via the bidirectional bus; a data acquiring section that acquires the data signal output via the bidirectional bus by the device under test, at a timing corresponding to the clock signal output via the bidirectional bus by the device under test; a judging section that judges pass/fail of the device under test based on a comparison result of a comparison between the data signal acquired by the data acquiring section and an expected value; and an adjusting section that, when performing an adjustment, causes the test signal supplying section to output an adjustment data signal and an adjustment clock signal, causes the data acquiring section to acquire the adjustment data signal at a timing corresponding to the adjustment clock signal, and adjusts a delay amount of the clock signal used to generate the timing at which the data signal is acquired, based on an acquisition result of the adjustment data signal by the data acquiring section.