Patent ID: 7713887
Filing Date: 2010-05-11
Classification: H01L

Abstract:
1. A method for forming an isolation layer in a semiconductor device comprising: forming a trench in a semiconductor substrate; forming a first liner nitride layer on an exposed surface of the trench and a semiconductor substrate; forming a first high density plasma (HDP) oxide layer such that the first HDP oxide layer partially fills the trench to cover a bottom surface and sides of the trench; etching overhangs generated during the forming of the first HDP oxide layer; forming a second liner nitride layer over the first HDP oxide layer and sidewalls of the trench where the first liner nitride is formed; removing the second liner nitride layer formed on the first HDP oxide layer while preheating the semiconductor substrate by introducing helium (He) gas and oxygen (O forming a second HDP oxide layer to fill the trench where the second liner nitride formed on the first HDP oxide layer is removed; and subjecting the second HDP oxide layer to planarization, so as to form a trench isolation layer.