Patent ID: 8629017
Filing Date: 2014-01-14
Classification: H01L

Abstract:
1. A method for forming a memory device comprising: providing a semiconductor substrate; forming a trench capacitor in the semiconductor substrate, the trench capacitor including an inner electrode comprised of a conductive fill material within a trench; forming a buried dielectric layer on the semiconductor substrate and on the trench capacitor; forming a first stud in the buried dielectric layer in electrical communication with the conductive material that is present within the trench and a second stud in the buried dielectric layer in electrical communication with the semiconductor substrate; forming a semiconductor layer on the buried dielectric layer; and forming a semiconductor device atop the semiconductor layer over the trench, the semiconductor device comprising a gate structure, a source region and a drain region, wherein at least the gate structure, the source region and the drain region of the semiconductor device is formed after the trench capacitor, and the drain region is in electrical communication with the first stud, wherein the gate structure of the semiconductor device is substantially centrally positioned over the trench capacitor.