Patent ID: 8394702
Filing Date: 2013-03-12
Classification: H01L

Abstract:
1. A method for making a semiconductor device, comprising: a) providing a semiconductor substrate; b) applying a first mask on top of the semiconductor substrate; and forming trenches TR forming trench T c) forming a gate insulator on the bottoms and sidewalls of the trenches TR forming gate insulator on the bottoms and sidewalls of the trenches TR d) forming a conductive material in the trenches TR e) forming a body layer in a top portion of the semiconductor substrate; f) forming a source layer in a top portion of the body layer; g) applying an insulator layer on top of the semiconductor substrate; h) applying a second mask on top of the insulator layer; i) forming electrical contacts through contact openings in the insulator layer using the second mask, wherein the contact openings include source openings to the source layer proximate each gate electrode, gate runner contact openings to the gate runners, termination contact openings to the termination structure, and a short contact opening to the source layer or body layer proximate a die edge, and wherein the contact openings include termination contact openings to the termination structure; and j) forming first and second metal regions on the insulator layer that are electrically isolated from each other, wherein the first metal region is in electrical contact with the gate runners and wherein the second metal region is in electrical contact with the source contact, wherein the thickness T wherein the third metal region is in electrical contact with the termination contact and the short contact, whereby the termination structure is shorted to the body region at the die edge, wherein the thickness T