Patent ID: 6028466
Filing Date: 2000-02-22
Classification: H03K

Abstract:
An integrated circuit including a clamp circuit for limiting the voltage at a circuit node, said clamp circuit comprisinga current source coupled to said node, anda clamp transistor having a control terminal and a pair of input/output terminals, one of said input/output terminals being coupled to said node for limiting the voltage at said node when said clamp transistor conducts, said control terminal being responsive to a control signal and said node voltage being a function of said control signal, characterized in thata current amplifier is coupled across said input/output terminals of said clamp transistor, said amplifier comprising a current mirror that includes a diode-connected transistor coupled in series with said clamp transistor, a current gain transistor coupled in parallel with the series combination of said clamp transistor and said diode-connected transistor, the control terminals of said diode-connected transistor and said current gain transistor being coupled to one another.