Patent ID: 9007115
Filing Date: 2015-04-14
Classification: H03K

Abstract:
1. An integrated circuit comprising: a clock control unit configured to transfer a first reference voltage or a second reference voltage as a first selection reference voltage in response to a divided clock which is generated by dividing an external clock when a test mode is entered, and generate an input clock by comparing the first selection reference voltage and the external clock; wherein the clock control unit comprises: a control signal generating section configured to output a divided clock which is generated by dividing an external clock as a control signal when a test mode is entered; a first reference voltage transferring section configured to transfer a first reference voltage or a second reference voltage as a first selection reference voltage in response to the control signal; and a comparing section configured to compare the first selection reference voltage and the external clock and generate an input clock; and an internal circuit configured to operate in response to the input clock, wherein the control signal generating section outputs the ground voltage as the control signal when the test mode is not entered.