Patent ID: 6489875
Filing Date: 2002-12-03
Classification: H01F,Y10T

Abstract:
A multi-layer ferrite chip inductor array comprising:an integrated circuit comprising an element main body, said element main body comprising an interior and an element mounting surface; a plurality of terminal connectors arranged around a periphery of said element main body; a plurality of inductors located in said interior of said element main body; each of said inductors comprising a plurality of layers laminated together; laminated faces of each of said plurality of layers being perpendicular to said element mounting surface; said plurality of layers comprising a plurality of ferrite layers and a plurality of conductor layers; said plurality of ferrite layers having through-holes formed therein; each said conductor layer comprising at least one internal conductor; a plurality of said conductors being configured to form coils having a coiling direction; said coiling direction of said coils being parallel to said element mounting surface; each of said inductors comprising a first end provided with a first terminal electrode and a second end provided with a second terminal electrode; said first terminal electrode and said second terminal electrode each being electrically connected to one of said terminal connectors by filling said through-holes formed in said plurality of ferrite layers.