Patent ID: 8426903
Filing Date: 2013-04-23
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a plurality of first wirings each extending in a first direction; a plurality of second wirings each extending in a second direction perpendicular to the first direction; a plurality of first impurity diffusion layers; a plurality of silicon pillars; and a plurality of transistors arranged at intersections of the first wirings and the second wirings in a matrix configuration, wherein each of the transistors includes one of the silicon pillars projecting perpendicularly from a main surface of the semiconductor substrate; one of the first impurity diffusion layers formed in a lower part of the silicon pillar; and a second impurity diffusion layer formed in an upper part of the silicon pillar, a central part of the silicon pillar is divided into a first divided portion and a second divided portion, the lower part of the silicon pillar being connected with both of the first and second divided portions, the upper part of the silicon pillar being connected with both of the first and second divided portions, each of the first impurity diffusion layers diffuses into the semiconductor substrate so as to be continuous between the silicon pillars adjoining in the first direction, each of the first wirings being constituted by the first impurity diffusion layers continuous in the first direction, and each of the second wirings is arranged between the first and second divided portions of the corresponding transistors.