Patent ID: 9021188
Filing Date: 2015-04-28
Classification: G06F

Abstract:
1. A system comprising a non-transitory computer-readable medium storing instructions that are executable by a processor and upon such execution, configured with modules to cause the processor to perform operations, the modules comprising: a first configuring module that divides a first portion of an asymmetric memory into a set of buffers, wherein each buffer in the set is configured for temporary storage of application data units with sizes corresponding to a small memory block that is smaller than the size of a logical write unit associated with the asymmetric memory, wherein latency of read operations is different from latency of write operations in the asymmetric memory; an association modules that associates, with each buffer in the set, context information that is different from the context information corresponding to other buffers in the set; a second configuring module that configures a portion of the remaining asymmetric memory as a reconciled storage for application data units with varying sizes; a receiving module that receives a first application data unit for writing to the asymmetric memory, the first application data unit of a size corresponding to the small memory block; a tagging module that tags the first application data unit with context information; a selecting module that selects, from the set of buffers, a first buffer for temporary storage of the first application data unit, wherein selection of the first buffer is based on a match of the context information associated with the first buffer and the context information associated with the first application data unit; and a writing module that writes the first application data unit to the first buffer.