Patent ID: 6738297
Filing Date: 2004-05-18
Classification: G11C

Abstract:
A reference circuit comprising:a first subcircuit, comprising: a first current mirror having a first input node and a first output node, said first input node coupled to an input power source; a first field effect transistor, coupled a first leg of the first current mirror: and a second field effect transistor, coupled a second leg of the first current mirror and to a first resistive element; wherein said first subcircuit produces a first output voltage at the first output node, said first output voltage being a function of a first threshold voltage of the first field effect transistor, a second threshold voltage of the second field effect transistor, and a first resistance of the first resistive element which is a function of a first temperature of the first subcircuit; a second subcircuit, comprising: a second current mirror having a second input node and a second output node, said second input node coupled to the input power source; a first bipolar transistor, a first leg of the second current mirror; and a second bipolar transistor, coupled to a second leg of the second current mirror and to a second resistive element: wherein said second subcircuit produces a second output voltage at the second output node, said second output voltage being a function of a first base-to-emitter voltage of the first bipolar transistor, a second base-to-emitter voltage of the second bipolar transistor, and a second resistance of the second resistive element which is a function of a second temperature of the second subcircuit; a summing circuit including a first control terminal coupled to said first output node and a second control terminal coupled to said second output node, for producing a summed power signal; and an output circuit for outputting said summed power signal.