Patent ID: 6586989
Filing Date: 2003-07-01
Classification: H03F

Abstract:
A circuit for calibrating offset error in a differential amplifier, comprising:a memory circuit operable to store a set of programming values selected from a range of multiple possible sets of programming values; an output circuit coupled to the memory circuit and operable to place the differential amplifier in a selected calibrated state by applying to the differential amplifier an output calibration signal generated based upon the set of programming values stored in the memory circuit; and a control circuit coupled to the memory circuit and operable to program the memory circuit with a final set of programming values by progressively narrowing the range of possible programming value sets until the final set of programming values is obtained, the range of possible programming value sets being progressively narrowed in test stages in accordance with a nonlinear search, wherein at each test stage a set of programming values is selected based upon a sensed differential amplifier signal generated in response to a test signal applied to the differential amplifier in a selected calibrated state.