Patent ID: 8635405
Filing Date: 2014-01-21
Classification: G06F

Abstract:
1. A computational resource assignment device in a multi-core processor system including a plurality of processors, and a plurality of cache memories respectively utilized by said plurality of processors, said computational resource assignment device comprising: an assignment management unit configured to manage assignment of tasks to said plurality of processors; and a cache status calculation unit configured to calculate a cache usage status with respect to each of said tasks, wherein said cache usage status includes at least one of a memory access count and a cache hit ratio, wherein said plurality of processors includes: wherein if a computation amount of said first process exceeds a predetermined threshold value, then said assignment management unit refers to said cache usage status calculated with respect to each of said tasks to preferentially select, as a migration target task, a first task of said plurality of first tasks having a cache hit ratio that is greater than an other first task of the plurality of first tasks, and newly assigns said migration target task to said second processor.