Patent ID: 6430287
Filing Date: 2002-08-06
Classification: H03H,H04B,H04L

Abstract:
A combined, parallel adaptive equalizer/echo canceller, comprising:a plurality of transverse finite impulse response filters, each filter receiving an input signal and providing n tap signals to n multipliers, wherein each multiplier provides a tap output signal resulting from the corresponding tap signal and a corresponding tap coefficient; an iterative pipeline, coupled to the plurality of filters, the iterative pipeline comprising nâˆ’1 registers having an input and an output and n adders, wherein each of the nâˆ’1 registers is disposed between two of the n adders with the output of the registers being passed to an input of a next one of the adders in the iterative pipeline, each of the n adders having a first set of inputs for receiving tap output signals from each of the plurality of transverse finite impulse response filters and a second input for receiving the output of one of the nâˆ’1 registers, the n adders providing a sum signal representing a sum of the received tap output signals from each of the plurality of transverse finite impulse response filters and the output of one of the nâˆ’1 registers; and a coefficient processor, coupled to the filters, for calculating updated tap coefficients, the updated tap coefficients calculated using an error signal and delayed versions of the input signal, wherein an error register chain is provided to output the error signal.