Patent ID: 7323913
Filing Date: 2008-01-29
Classification: H03K

Abstract:
1. A multiphase divider, comprising: a plurality of resetable dividers configured for performing resetable divider stages to a plurality of multiphase signals forming a plurality of divided multiphase signals having a monotonic increasing phase with equal spacing and an ideal duty cycle of 50%, wherein the plurality of divided multiphase signals have no phase ambiguity; and a reset signal generator configured for producing a plurality of periodic reset signals to the plurality of resetable dividers to enable the plurality of resetable dividers to divide the plurality of multiphase signals in a timely correct sequence to form the divided multiphase signal, the plurality of periodic reset signals being produced by a combinational network of the reset signal generator, the combination network is configured for generating a number of pulses based on the plurality of multiphase signals and performing a plurality of decimation stages and wherein said periodic reset signals are generated solely in response to said plurality of multiphase signals.