Patent ID: 7741644
Filing Date: 2010-06-22
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first semiconductor layer; a first interlayer insulation layer covering the first semiconductor layer; a second semiconductor layer on the first interlayer insulation layer, the second semiconductor layer comprising a source region, a drain region and a channel region between the source and drain regions; a gate pattern on the channel region; and a conducting column extending through at least one of the source and drain regions, wherein at least one of the source and drain regions comprises a low-concentration impurity region and an elevated high-concentration impurity region, wherein a top surface of the elevated high-concentration impurity region is above a top surface of the channel region, and wherein at least a portion of a sidewall of each of the low-concentration impurity region and the elevated high-concentration impurity region contacts a side portion of the conducting column.