Patent ID: 9207992
Filing Date: 2015-12-08
Classification: G06F

Abstract:
1. An apparatus comprising: at least one processor; memory storing computer program code; wherein the memory storing the computer program code is configured to, with the at least one processor, cause the apparatus to at least: examine a plurality of subspaces comprising partitions of a problem space, wherein each partition of a subspace is a portion of the problem space to be assigned to a processing node, wherein the subspaces comprise outer and inner subspaces, wherein outer subspaces are subspaces in the vicinity of outer boundary regions of a problem space and inner subspaces are subspaces away from the vicinity of outer boundary regions of a problem space, and wherein each of the subspaces is assigned to a processing node; evaluate processing time during at least one computational iteration by each of the processing nodes; determine, based at least in part on the evaluating, relative load between the nodes associated with outer subspaces as compared to the nodes associated with inner subspaces; and independently adjust partitioning of at least one outer subspace based on relative load between nodes associated with outer subspaces and nodes associated with inner subspaces by expanding or contracting the boundary of the at least one outer subspace by a predetermined value.