Patent ID: 8120186
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. An integrated circuit comprising: a circuit chip having a top face and a bottom face; a substrate having a top face and an opposing bottom face, wherein the bottom face of the circuit chip is arranged on the top face of the substrate; a contact pad arranged on the top face of the circuit chip; a projecting top contact arranged on the top face of the circuit chip and extending vertically from the top face of the circuit chip as a pillar and extending to a top face of the integrated circuit such that the pillar is accessible at the top face of the integrated circuit; a signal line arranged on the top face of the circuit chip and mechanically coupling the contact pad directly to the projecting top contact; a lower contact pad arranged on the bottom face of the substrate and a bottom face of the integrated circuit; and a connection coupling the contact pad to the lower contact pad; wherein a continuous connection is provided from the top face of the integrated circuit to the bottom face of the integrated circuit by virtue of the projecting top contact contacting a top surface of the signal line, a top surface of the signal line contacting a bottom surface of the contact pad, and the contact pad coupled to the lower contact pad by the continuous connection.