Patent ID: 8897374
Filing Date: 2014-11-25
Classification: H04N

Abstract:
1. An audio visual system comprising: an input unit for receiving data containing video data and audio data and dividing the data into the audio data and the video data; a video decoder for decoding the video data divided by the input unit; an audio decoder for decoding the audio data divided by the input unit; and an output unit for superimposing and outputting the video data decoded by the video decoder and the audio data decoded by the audio decoder, wherein at least one of the video decoder and the audio decoder has N>1 data output paths; at least one of the video decoder and the audio decoder sets delay times for each of the output paths to synchronize the decoded video data with the decoded audio data the at least one of the video decoder and the audio decoder that has the N>1 output paths includes: a control unit for performing a decode process of decoding the video data or audio data divided by the input unit; N buffer memories for storing the video data or audio data that has been decoded by the control unit, each buffer memory corresponding to a different one of the output paths; and N output interfaces that each corresponds to a different one of the output paths, each output interfaces reads the decoded video data or audio data from the corresponding buffer memory and each output interface sends, according to control of the control unit, an interrupt signal to the control unit every time reading a predefined amount of data is read by the respective output interface from the corresponding buffer memory; and the control unit performs the decode process and a buffer management process to manage writing or reading of the decoded video data or audio data to or from the buffer memories at timings according to the timings of interrupt signals sent from the output interface having the shortest delay between successive interrupt signals generated by the respective output interface, and not according to interrupt signals generated by other output interfaces; wherein the control unit allows only the output interface having the shortest delay between successive interrupt signals generated by the respective output interface to output interrupt signals to the control unit and prohibits other output interfaces from outputting interrupt signals to the control unit.