Patent ID: 7376917
Filing Date: 2008-05-20
Classification: G06F

Abstract:
1. A client-server semiconductor verification system, said system comprising: a plurality of client computers, wherein each client computer of said plurality generates a test job for testing a different design of a programmable logic circuit and comprises test vectors and configuration data for said different design of a programmable logic circuit; a server coupled to said plurality of client computers through a network interface, said server receiving a predetermined test job from a client computer; and a plurality of systems under test coupled to said server and shared among said plurality of client computers through said network interface under the control of said server, wherein each system under test of said plurality of systems under test has a different programmable logic device architecture, and wherein each system under test of said plurality of systems under test has a programmable logic circuit which is configured with said design of a programmable logic circuit implemented according to configuration data of said predetermined test job from said client computer through said network interface of said server and receives corresponding test vectors of said predetermined test job of said client computer and outputs result vectors to said client computer through said network interface of said server.