Patent ID: 9034707
Filing Date: 2015-05-19
Classification: H01L

Abstract:
1. A method for fabricating a nonvolatile memory device, comprising: forming a first and a second trench by etching a semiconductor substrate; forming a plurality of first conductive layer patterns over the semiconductor substrate such that the first conductive layer patterns are isolated from each other by the first trench and the second trench that are alternately provided between the plurality of first conductive layer patterns, wherein the second trench having a smaller width than the first trench; forming a first isolation layer that is recessed to partially gap-fill the first trench, and a second isolation layer which gap-fills the second trench; forming a plurality of floating gate by etching the first conductive patterns; forming a dielectric layer over the entire surface of the resultant structure including the first and second isolation layers and the floating gates; forming a second conductive layer over the dielectric layer; and forming a control gate by etching the second conductive layer, wherein the plurality of floating gates have a same critical dimension, and spaces, which are alternately provided between the plurality of floating gates, have a different critical dimension.