Patent ID: 6163179
Filing Date: 2000-12-19
Classification: H03K

Abstract:
A single-end-input voltage level transfer, which is controlled by a gate voltage for converting a first signal to a second signal, the voltage level transfer comprising:a first transistor with a first drain region, a first source region, and a first gate, in which the first source region is coupled to the first signal;a first inverter, wherein an input end of the first inverter is coupled to the first drain region of the first transistor and the first inverter exports a complementary second signal, which is complementary to the second signal;a second inverter, wherein an input end of the second inverter is coupled to an output end of the first inverter, and the second inverter exports the second signal;a second transistor with a second drain region, a second source region, and a second gate, wherein the second source region is coupled to a first power source, the second drain region is coupled to the first gate, and the second gate is controlled by the complementary second signal;a third transistor with a third drain region, a third source region, and a third gate, wherein the third source region is coupled to a second power source, the third drain region is coupled to the first gate, and the third gate is controlled by the second signal; anda fourth transistor with a fourth drain region, a fourth source region, and a fourth gate, wherein the fourth drain region is coupled to the first inverter at its input end, the fourth source region is coupled to the second power source, and the fourth gate is coupled to the first inverter at its output end.