Patent ID: 6396674
Filing Date: 2002-05-28
Classification: H02H

Abstract:
A circuit for monitoring the voltage spikes occurring in a power converter system containing a bus having a resistive parameter (R) and an inductive parameter (L) comprising:a first comparator circuit having first and second inputs; a first reference level voltage source connected to the first input of the first comparator circuit for providing a first voltage level input signal; a second comparator circuit having first and second inputs; a second reference level voltage source connected to the second input of the second comparator circuit to provide a second voltage level input signal; a dc voltage blocking circuit; the second input of the first comparator circuit and the first input of the second comparator circuit being connected in common through the dc voltage blocking circuit to the bus of the power converter system and responsive to a voltage spike (Vspike) thereon; wherein the first comparator circuit produces an output signal when a voltage spike on the bus exceeds the voltage level of the first voltage level input signal, and wherein the second comparator circuit produces an output signal when a voltage spike on the bus is lower than the voltage level of the second voltage level input signal.