Patent ID: 7964497
Filing Date: 2011-06-21
Classification: H01L

Abstract:
1. A method of fabricating a copper plated high aspect ratio via, comprising: depositing a dielectric layer on a substrate, wherein the substrate comprises a contact layer of a multilayer wiring array; etching a high aspect ratio via in the dielectric layer with a depth to width aspect ratio of greater than 5:1; depositing a diffusion barrier layer comprised of boride into the high aspect ratio via and over one or more surfaces of the dielectric layer; depositing a copper layer over the diffusion barrier layer as a current carrying layer during electroplating; depositing a ruthenium layer over the copper layer, the ruthenium layer having a thickness configured to ensure a continuous coverage on the via sidewalls, wherein the ratio of the copper layer to the ruthenium layer is a three to one ratio; and filling the high aspect ratio via with copper plated onto the ruthenium layer.