Patent ID: 7176572
Filing Date: 2007-02-13
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming a redistribution layer over a semiconductor wafer which includes an integrated circuit and an interconnect electrically connected with the integrated circuit, the redistribution layer electrically connecting with a pad which is a part of the interconnect and including a first portion located over the pad and a second section other than the first portion; forming an external terminal on the second section of the redistribution layer; forming a first resin layer having a side surface so that at least a part of the first resin layer is placed on the redistribution layer; forming a second resin layer over the first resin layer and in direct contact with the semiconductor wafer so as to cover the side surface of the first resin layer, the first and second resin layers having no wiring therebetween; and cutting the semiconductor wafer.