Patent ID: 7186619
Filing Date: 2007-03-06
Classification: B82Y,G11C,H01L

Abstract:
1. A method of fabricating a semiconductor device comprising the steps of: (a) providing a semiconductor die; (b) forming insulated gate field effect transistors (IGFETS) in and/or on said semiconductor die during a first set of operations; (c) forming negative differential resistance field effect transistors (NDR-FETs) in and/or on said semiconductor die during a second set of processing operations, wherein said first set of processing operations and said second set of processing operations include one or more common operations so that portions of some of said IGFETs and portions of at least some of said NDR FETs are formed at the same time during said one or more common operations wherein an IGFET gate insulation layer is formed using a different set of processing operations than those used for forming an NDR FET gate insulation layer.