Patent ID: 6254457
Filing Date: 2001-07-03
Classification: B24B,H01L

Abstract:
A process for polishing, on a polishing machine and under defined polishing conditions, of an external surface of at least one wafer of integrated circuits using a reference wafer, the wafer of integrated circuits being of the type that includes at least one projecting feature that is covered over the entire surface of the wafer with an external layer of a material, and the reference wafer being of the type that includes an external layer of material having a uniform thickness and covering the surface of the reference wafer, the projecting feature having a main surface density (Dsp), and a thickness (Hi) the process comprising the steps of:calculating a main equivalent thickness (Hea) for the wafer of integrated circuits by multiplying the main surface density (Dsp) of the projecting feature by the thickness (Hi) of the projecting feature;polishing, under the defined polishing conditions, the reference wafer so as to determine a rate of removal (V) by the polishing machine corresponding to a ratio of a thickness removed (Hr) to a polishing time elapsed (Tr);calculating a polishing time (Tp) which is equal to the ratio of the main equivalent thickness (Hea) for the wafer of integrated circuits to the rate of removal (V) by the polishing machine; andcarrying out, under the defined polishing conditions, a polishing operation on the wafer of integrated circuits for a duration that depends on the polishing time (Tp).