Patent ID: 8049309
Filing Date: 2011-11-01
Classification: H01L

Abstract:
1. An edge seal region of a semiconductor die comprising: a substrate of a first conductivity type having a surface; a semiconductor die formed on the substrate, the semiconductor die having an interior section wherein active devices are formed and also having an exterior edge that is distal from the interior section; a field oxide layer on the surface of the substrate and extending toward the exterior edge of the semiconductor die, the field oxide layer having an exterior edge; an inter-layer dielectric on the field oxide layer and having an exterior edge that is substantially co-terminus with the exterior edge of the field oxide layer; a doped region of the first conductivity type on the surface of the semiconductor substrate and substantially self-aligned with the exterior edge of the inter-layer dielectric; and a metal layer mechanically contacting the doped region and the exterior edge of the field oxide layer.