Patent ID: 7196542
Filing Date: 2007-03-27
Classification: H03K

Abstract:
1. A programmable logic integrated circuit having a plurality of input/output (I/O) banks, wherein a first one of the I/O banks comprises: a first set of configuration output pins; first buffers coupled to drive the first set of configuration output pins, wherein each of the first buffers are coupled to receive a first supply voltage; a second set of pins; and second buffers coupled to the second set of pins, wherein each of the second buffers is coupled to receive a second supply voltage that is independent of the first supply voltage, wherein the first I/O bank further comprises a dual mode input buffer that has a first driver coupled to receive the first supply voltage, and a second driver coupled to receive the second supply voltage, outputs of the first driver and second driver being coupled to a pin, and wherein a select signal enables the first driver or the second driver.