Patent ID: 6274460
Filing Date: 2001-08-14
Classification: H01L

Abstract:
A method of forming an integrated circuit structure comprising the steps of:providing a monocrystalline semiconductor device substrate having an upper portion suitable for device formation;dividing the upper portion of said semiconductor substrate into at least one inactive region and at least one active region;forming at least one active device in the active region;etching a gettering trench in the front surface of the substrate in the inactive region and spaced from the active region;depositing an oxide layer on the sidewalls and floor of the gettering trench;depositing a layer of polysilicon on the oxide layer to underfill the trench, leaving a void near the middle of said trench; andoxidizing at least a portion of the deposited polysilicon thereby closing the void and stressing the device substrate and inducing a region of crystal lattice defects in the device substrate in a region surrounding the gettering trench for attracting impurities toward said trench and away from the active region.