Patent ID: 7302651
Filing Date: 2007-11-27
Classification: G06F

Abstract:
1. A method for migrating an integrated circuit (IC) design layout from a source technology without radical design restrictions (RDR) to a target technology with RDR, the method comprising the steps of: legalizing the design layout to meet an RDR grid constraint and fix any ground rule violation in a first direction, wherein the legalizing includes computing a target on-pitch position for each of the plurality of critical shapes with minimum layout perturbation while satisfying the RDR grid constraint, wherein the computing includes generating an edge-weighted graph that models a plurality of critical shapes and a neighborhood relationship thereof and determining target grid positions of the plurality of critical shapes in a first direction using the edge-weighted graph by placing critical shapes with less slack first; and legalizing the design layout as a linear programming problem by treating the target on-pitch positions of the critical shapes as a set of ground rule space constraints between the plurality of critical shapes and a design layout boundary; inserting required dummy shapes; and running a minimum perturbation analysis in order to address an edge coverage requirement of at least one critical shape and fix any ground rule violation in a second direction.