Patent ID: 6638801
Filing Date: 2003-10-28
Classification: H01L

Abstract:
A manufacturing method of a semiconductor device, the semiconductor device including a first source/drain area of a second conductivity type formed in a semiconductor area of a first conductivity type, a second source/drain area of the second conductivity type formed in the semiconductor area, a gate electrode formed on a gate insulating film on a channel area between the first source/drain area and the second source/drain area, the manufacturing method comprising the steps of:forming a first insulating film on the semiconductor area; forming a first mask layer at a predetermined position on the first insulating film; forming the first source/drain area in the semiconductor area with the first mask layer; forming a second mask layer on the first source/drain area; forming a first channel area of the first conductivity type adjacent to the first source/drain area with the second mask layer; forming a first gate electrode on side walls of the second mask layer; forming a second channel area of the first conductivity type at an essentially central portion of the first channel area with the first gate electrode providing a mask; forming a second insulating film on the second channel area, the second insulating film having a different thickness than the first insulating film; forming a second gate electrode over the second insulating film and separated from the first gate electrode by a mediating insulating film; forming the second source/drain area at a substantially central portion of the second channel area with the second gate electrode providing a mask; and forming a third gate electrode providing an electrical connection for the first gate electrode and the second gate electrode.