Patent ID: 6359501
Filing Date: 2002-03-19
Classification: H02M

Abstract:
A charge-pumping circuit for low-supply voltage comprising:a plurality of first transistors, wherein the source of each said first transistor is coupled to the drain of successive said first transistor so that all of said first translators are connected in series; wherein the drain of the first of said first transistors is coupled to a supply voltage, the source of the last of said first transistors is coupled to the output of said pumping circuit, and the gate and drain of the last of said first transistors are coupled; a plurality of second transistors, wherein each second transistor is coupled to a corresponding said first transistor, the drain and gate of each said second transistor is coupled and connected with the gate of the corresponding said first transistor, and the source and the well of each said second transistor is coupled and connected to the drain of said corresponding first transistor; a plurality of said third transistors, wherein each said third is coupled to one of said first transistors, the well and the source of each said third transistor is coupled and connected to the well of the corresponding said first transistor, the drain of each said third transistor is coupled to the source of the corresponding said first transistor, the gate of said third transistors corresponding to the first of said first transistors is coupled to a clock; each gate of the transistors of said third transistor group, except for the first transistor of said third transistor group, is coupled to the drain of the corresponding transistor of said first transistor group; a plurality of capacitors, each said capacitor has a corresponding transistor of said first transistor group exclusively, except the first transistor of said first transistor group, one ends of said capacitors are coupled to the drains of the corresponding transistors of said first transistor group, while the other ends of said capacitors are interlacedly coupled to said clock and the inverted signal of said clock; and a secondary charge-pumping circuit, which supplies bias-voltage to the gate of each transistor of said first transistor group.