Patent ID: 8354733
Filing Date: 2013-01-15
Classification: H01L,H01R

Abstract:
1. A power semiconductor package comprising: an insulated-gate bipolar transistor (IGBT) residing on a package substrate, said IGBT including a plurality of solderable front metal (SFM) coated emitter segments situated atop said IGBT and connected to an emitter of said IGBT; a conductive clip coupling said plurality of SFM coated emitter segments to an emitter pad on said package substrate; a gate pad on said package substrate coupled to a gate of said IGBT; a collector pad on said package substrate situated under said IGBT and coupled to a collector of said IGBT; an emitter terminal, a collector terminal, and a gate terminal of said package substrate being routed to said emitter pad, said collector pad, and said gate pad, respectively.