Patent ID: 8223886
Filing Date: 2012-07-17
Classification: H03F,H03G,H04L

Abstract:
1. A transmission circuit that outputs a transmission signal, the transmission circuit comprising: a signal generator that generates an amplitude signal and a phase signal; a first variable gain amplifier that amplifies the amplitude signal by a first gain; a regulator that outputs a voltage depending on the amplitude signal that is inputted via the first variable gain amplifier; a phase modulator that conducts phase modulation on the phase signal and outputs a phase modulation signal; a second variable gain amplifier that amplifies the phase modulation signal by a second gain; a power amplifier that outputs a transmission signal by amplifying the phase modulation signal inputted via the second variable gain amplifier depending on the voltage outputted from the regulator; a first bias circuit that supplies the power amplifier with a first bias signal; a second bias circuit that supplies the power amplifier with a second bias signal; a bias controller that controls operations of the first bias circuit and the second bias circuit; a mode-switching decision section that decides whether or not to switch an operation mode of the power amplifier based on power information; a mode-switching controller that instructs the bias controller to switch the operations of the first bias circuit and the second bias circuit depending on a decision of the mode-switching decision section; a first delay circuit that delays switching of an operation of the first bias circuit for a first delay time t a second delay circuit that delays switching of an operation of the second bias circuit for a second delay time t the power amplifier comprises a transistor for amplification, which amplifies the phase modulation signal, and the first delay time and the second delay time are configured such that both the first bias circuit and the second bias circuit operate simultaneously for a predefined time period when switching the operation mode of the power amplifier, wherein when the minimum value of a delay time d the first delay time t