Patent ID: 6395599
Filing Date: 2002-05-28
Classification: H01L

Abstract:
A method for fabricating a semiconductor storage device comprising:a gate electrode forming step of depositing a first conducting film and a first insulation film the latter on the former on a semiconductor substrate and then patterning the first conducting film and the first insulation film to form a first gate electrode formed of the first conducting film and having an upper surface covered with the first insulation film in a first region where a memory cell transistor is to be formed; a diffused layer forming step of doping the semiconductor substrate with an impurity with the first gate electrode as a mask to form a first diffused layer and a second diffused layer; a first sidewall insulation film forming step of forming a first sidewall insulation film on a sidewall of the first gate electrode; a first insulation film forming step of forming a second insulation film having a first though-hole and a second through-hole formed in, the first through-hole being opened on the first diffused layer, the second through-hole being opened on the second diffused layer, the first through-hole and the second through-hole being simultaneously formed; a second conducting film depositing step of depositing a second conducting film on the semiconductor substrate having the second insulation film formed on; a conducting film removing step of removing the second conducting film on the second insulation film, leaving the second conducting film in the first through-hole and the second though-hole to form a capacitor storage electrode of the second conducting film in the first through-hole and a first contact conducting film of the second conducting film formed in the second through-hole; a capacitor opposed electrode forming step of depositing a third insulation film to be a capacitor dielectric film and a third conducting film to be a capacitor opposed electrode on the semiconductor substrate with the capacitor storage electrode and the first contact conducting film and then patterning the third conducting film to form the capacitor opposed electrodes; and a bit line forming step of forming a bit line electrically connected to the first contact conducting film.