Patent ID: 6582976
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A semiconductor device comprising:a substrate defining a first surface, the substrate having a surface layer portion made of insulating material and formed with a wiring groove filled with a wiring line of conductive material, an upper surface of the wiring line being exposed on the first surface, the wiring line being electrically connected to a first conductive member, and the first conductive member occupying an area larger than an area of the wiring line as viewed along a line parallel to a normal to the first surface; a first film made of insulating material and formed on the first surface of the substrate; a via hole formed in the first film, the via hole being disposed so that a boundary line between the wiring line and the surface layer portion of insulating material passes through the inside of the via hole as viewed along a line parallel to the normal to the first surface; and a second conductive member filled in the via hole and connected to the wiring line at a bottom of the via hole, wherein a bottom of said second conductive member has no step at a position corresponding to an edge of the wiring line.