Patent ID: 6701412
Filing Date: 2004-03-02
Classification: G06F

Abstract:
A method for sampling a cache in a computer system, wherein the computer system has multiple central processing units (CPUs), including a measured CPU containing the cache to be sampled, and a sampling CPU that gathers the sample, the method comprising:receiving an interrupt generated by the sampling CPU at the measured CPU, wherein the interrupt identifies a portion of the cache to be sampled; and in response to receiving the interrupt, copying data from the identified portion of the cache into a shared memory buffer that is accessible by both the measured CPU and the sampling CPU, wherein copying the data from the identified portion of the cache into the shared memory buffer involves: saving the data from the identified portion of the cache into one or more registers within the measured CPU, storing the data from the one or more registers into the shared memory buffer, and notifying the sampling CPU that the shared memory buffer contains the data, thereby allowing the sampling CPU to gather and process the data, wherein prior to saving the data from the identified portion of the cache into the one or more registers the method further comprises saving existing contents of the one or more registers, and wherein after the data is stored from the one or more registers into the shared memory buffers, the method further comprises restoring the existing contents of the one or more registers.