Patent ID: 6583506
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A semiconductor device comprising a polysilicon layer used for an interconnection and a gate of a transistor, an insulation layer covering the polysilicon layer, an interconnection conductor layer formed on the insulation layer, and a bump for inputting and outputting a power supply or a signal to an integrated circuit, on a surface of a semiconductor chip in which the integrated circuit is formed,wherein a polysilicon film and an insulation film made of the same materials as those of said polysilicon layer and said insulation layer, respectively, are provided at a region at which said bump is to be formed, on the surface of said semiconductor chip; a first conductor which covers the insulation film and is electrically connected to said interconnection conductor layer is made of the same material as that of said interconnection conductor layer by sputtering; a protection insulation film which covers surfaces of the first conductor, said interconnection conductor layer, and said semiconductor chip and in which an opening portion is provided on the first conductor is formed; and a second conductor which conducts to the first conductor through the opening portion is formed on the protection insulation film by sputtering, and wherein said bump is composed of the polysilicon film, the insulation film, the first conductor, and the second conductor, and is formed so that a height of a most projecting end face thereof from the surface of said semiconductor chip is higher than those of projecting faces of any other parts.