Patent ID: 6764944
Filing Date: 2004-07-20
Classification: H01L

Abstract:
A method for forming a metal wire using a Damascene process, the method comprising:forming an insulation layer on a semiconductor substrate comprising elements for operating a semiconductor device; forming first photoresist patterns on the insulation layer; etching the insulation layer in order to form a first via hole using the first photoresist patterns and then forming a resulting structure; coating a first anti-reflecting coating layer on the resulting structure and in the first via hole, wherein the first anti-reflecting coating layer has a viscosity such that the first anti-reflecting coating layer has a thickness of about 450 Ã¥ when deposited with a spin rate of about 3000 rpm; coating a second anti-reflecting coating layer on the resulting structure and directly on the first anti-reflecting coating layer without previously etching the first anti-reflective layer to provide desired cumulative anti-reflective coating thickness, wherein the second anti-reflecting coating layer has a viscosity such that the second anti-reflecting coating layer has a thickness of about 450 Ã¥ when deposited with a spin rate of about 3000 rpm.; forming second photoresist patterns on the second anti-reflecting coating layer; and forming a second via hole using the second photoresist patterns.