Patent ID: 7429882
Filing Date: 2008-09-30
Classification: H03K

Abstract:
1. A circuit, comprising: a capacitance element having an input and an output; a direct current input buffer having an input and an output, wherein the input of the direct current input buffer is coupled to the input of the capacitance element and the output of the direct current input buffer is coupled to the output of the capacitance element; a feedback circuit coupled to the direct current input buffer, the feedback circuit is operable to change the output of the direct current output buffer to match the input of the direct current input buffer responsive to determining the output of the direct current input buffer does not match the input of the direct current input buffer; a delay circuit coupled to the feedback circuit, the delay circuit is configured to turn off the feedback circuit a predetermined amount of time after the output of the direct current input buffer is changed to match the input of the direct current input buffer; and an output buffer coupled to the output of the direct current input buffer and the output of the capacitance element.