Patent ID: 6035434
Filing Date: 2000-03-07
Classification: H03M,H04L

Abstract:
A GSM transmitter module for converting forward error correction coded half-rate speech frames into TDMA data blocks, wherein said transmitter module comprises:a memory configured to store said frames in a current frame buffer and a previous frame buffer, wherein said memory is further configured to provide data words from said buffers in response to word addresses;an address generator coupled to receive a TDMA bit clock, wherein said address generator is configured to responsively select a base address for the current frame buffer for even cycles of the bit clock, wherein said address generator is configured to responsively select a base address for the previous frame buffer for odd cycles of the bit clock, wherein the address generator adds the selected base addresses to word offsets to produce said word addresses;a bit position generator configured to generate said word offsets, wherein the bit position generator is further configured to generate bit offsets; anda multiplexer coupled to receive said data words and said bit offsets, wherein said multiplexer is configured to responsively provide a sequence of data bits selected solely from said data words;wherein said bit position generator includes:a latch configured to sense a next even-cycle bit position and to responsively provide and hold a current even-cycle bit position for two periods of the bit clock;a counter configured to count periods of the bit clock and provide an initialization signal; anda table coupled to receive said initialization signal and configured to provide said next even-cycle bit position when said initialization signal is asserted.