Patent ID: 6841472
Filing Date: 2005-01-11
Classification: H01L,Y10S

Abstract:
1. A method of fabricating a semiconductor device comprising the steps of: forming first, second and third insulation films on a semiconductor substrate in succession; forming an opening in said third insulation film; forming an opening of tapered shape, narrowing with depth, in said second insulation film under a bottom of said opening in said third insulation film; forming an opening in said first insulation film consistent with a bottom shape of said opening in said second insulation film, and depositing a gate oxide film entirely therein; burying a conductive film into said openings formed in said first, second and third insulation films to form a gate electrode; planarizing a surface of said conductive film and said third insulation film; and etching said first, second and third insulation films with said conductive film used as a mask to form a side wall on a side surface of said gate electrode so as to be covered behind a top part of said gate electrode as seen in plain view.