Patent ID: 7663178
Filing Date: 2010-02-16
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory comprising: a semiconductor substrate including a surface having a memory cell region and a resistor region; an active area extending along a first direction in the memory cell region; a gate insulating film formed on the active area; a floating gate electrode formed on the gate insulating film, the floating gate electrode including a first upper portion and a first bottom portion contacting to the gate insulating film; a trench located adjacent to the active area and extending along the first direction in the memory cell region, the trench including an inner bottom portion which is lower than the surface of the semiconductor substrate; a first insulating film embedded in the trench, the first insulating film including a second upper portion which is higher than the first bottom portion and lower than the first upper portion of the floating gate electrode relative to the surface of the semiconductor substrate; a second insulating film formed in the resistor region, the second insulating film including a third upper portion which is higher than the first upper portion of the floating gate electrode relative to the surface of the semiconductor substrate and a recess formed at the third upper portion; a resistor portion formed in the recess of the second insulating film, the resistor portion including a fourth upper portion which is flush with the third upper portion; an inter-gate insulating film formed on the first upper portion of the floating gate electrode; and a control gate electrode formed on the inter-gate insulating film, wherein the floating gate electrode includes a first conductive material having a first impurity concentration and the resistor portion includes a second conductive material having a second impurity concentration which is lower than the first impurity concentration of the first conductive material.