Patent ID: 7895577
Filing Date: 2011-02-22
Classification: G06F

Abstract:
1. A device for testing a structural coverage of a software program stored in an equipment, the equipment having a first memory configured to store the software program, the software program having instructions locatable via addresses corresponding to the instructions, a processor coupled to the first memory and configured to call up and execute at least a portion of the instructions, and an address bus coupled to the processor and the first memory, the device comprising: a second memory connected to the address bus and configured to store an address for each corresponding instruction and a setting associated with the stored address, the setting having at least a first value, a second value, a third value, or a fourth value, wherein the first value indicating that an instruction located at the associated address has been called up by the processor, the second value indicating that the instruction located at the associated address has not been called up by the processor, the third value indicating that the instruction located at the associated address is followed immediately, in the execution of the software, by another instruction located at the address immediately following the associated address, and the fourth value indicating that the instruction located at the associated address is not followed immediately, in the execution of the software program, by the another instruction located at the address immediately following the associated address.