Patent ID: 8354322
Filing Date: 2013-01-15
Classification: G11C

Abstract:
1. A method of forming a memory array of non-volatile storage elements, the method comprising: forming a first region including a first plurality of floating gate stacks above a substrate, the first region is for multi-level non-volatile storage elements; forming a second region including a second plurality of floating gate stacks above the substrate, the second region is for single-level non-volatile storage elements; implanting ions having a first concentration in the substrate for source/drain regions in the first region; implanting ions having a second concentration in the substrate near the source/drain regions in the first region, the conductivity type of the first concentration of ions is opposite the conductivity type of the second concentration of ions; implanting a third concentration of ions in the substrate for source/drain regions in the second region; and implanting a fourth concentration of zero or more ions in the substrate near the source/drain regions in the second region, either the first concentration is less than the third concentration or the second concentration is greater than the fourth concentration.