Patent ID: 7498217
Filing Date: 2009-03-03
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: forming a trench in a substrate; forming an isolation layer in the trench such that the isolation layer protrudes from the substrate; forming a first layer on the substrate exposed by the isolation layer; forming a preliminary second layer pattern on the first layer, wherein an upper face of the preliminary second layer pattern is at a level above the substrate that is substantially lower than, or substantially equal to, a level above the substrate of an upper face of the isolation layer; forming a third layer on the preliminary second layer and the isolation layer; forming a fourth layer on the third layer; partially etching the fourth layer, the third layer, the preliminary second layer pattern and the first layer to form a gate structure on the substrate, wherein the gate structure comprises a first layer pattern, a second layer pattern, a third layer pattern and a fourth layer pattern; and forming source/drain regions at portions of the substrate adjacent to the gate structure.