Patent ID: 9079382
Filing Date: 2015-07-14
Classification: B32B,G08B,H05K,Y10T

Abstract:
1. A method for manufacturing a circuit board featuring conductive patterns, the method comprising the following steps: i) selectively affixing a single conductive layer to a substrate material such that a part of the single conductive layer includes: (a) final product's conductor areas, (b) narrow areas of the single conductive layer between the final product's conductor areas, affixed to the substrate material by a bond, and (c) areas to be removed in solid state left substantially unattached to the substrate material in such a way that each area to be removed in solid state is in attachment with the substrate material at most at portions to be patterned in a subsequent step ii); ii) patterning the single conductive layer to establish the final product's conductor areas by removal of the narrow areas of the single conductive layer between the final product's conductor areas and by removal of the single conductive layer from peripheries of the areas to be removed in solid state; and iii) removing, in solid state, the areas to be removed in solid state after edges of the areas to be removed in solid state are released from the final product's conductor areas by the removal of the material of the single conductive layer from the peripheries of the areas to be removed in solid state during the course of step ii).