Patent ID: 7725621
Filing Date: 2010-05-25
Classification: G06F

Abstract:
1. A semiconductor device comprising: a system bus; an input/output (I/O) device; an I/O controller which controls data transfer with the I/O device; a temporary storage section which temporarily stores data during transfer, the temporary storage section comprising a first I/O port used to provide direct memory access (DMA) transfer with the system bus and a second I/O port used to provide data transfer with the I/O controller; a switching section which switches between a first mode and a second mode, wherein in the first mode, the switching section connects the system bus with the I/O controller, and in the second mode, the switching section connects the system bus with the first I/O port of the temporary storage section and also connects the second I/O port of the temporary storage section with the I/O controller; and a storage controller which separately starts data transfer through the first I/O port and the second I/O port and which, when detecting completion of the data transfer of a transfer unit between the temporary storage section and the I/O controller, transmits to the switching section a control signal to switch from the second mode to the first mode so as to cut off data transfer between the temporary storage section and the I/O controller and to connect the system bus with the I/O controller.