Patent ID: 7523432
Filing Date: 2009-04-21
Classification: H01L

Abstract:
1. A semiconductor substrate, comprising at least a plurality of photosensitive units arranged in a matrix on a surface of the semiconductor substrate, each of the photosensitive units having a first blocking region, a second blocking region, a plurality of transistors and a photosensitive region all disposed on the surface of the semiconductor substrate, wherein the semiconductor substrate is characterized in that each of the first blocking regions of the photosensitive units is located between two photosensitive regions of two neighboring photosensitive units, aligned in a row in a first direction, of the photosensitive units, for blocking the interference of free electrons between said two neighboring photosensitive units aligned in the row in the first direction, and each of the second blocking regions of the photosensitive units is located between two photosensitive regions of two neighboring photosensitive units, aligned in a column in a second direction, of the photosensitive units, for blocking the interference of free electrons between said two neighboring photosensitive units aligned in the column in the second direction, wherein the first direction is positioned at an angle relative to the second direction, and the first and the second blocking regions of each of the photosensitive units are formed drains and sources of the corresponding transistors therein.