Patent ID: 8133775
Filing Date: 2012-03-13
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: (a) preparing a semiconductor substrate having current input/output regions; (b) forming a first resist layer on the semiconductor substrate and baking the first resist layer at a first temperature; (c) forming a second resist layer on the first resist layer and baking the second resist layer at a second temperature lower than the first temperature; (d) forming an upper resist structure on the second resist layer for accommodating a head of a gate electrode, the upper resist structure having an upper opening having a laterally broadened middle space; (e) forming a lower opening through the first and second resist layers, the lower opening communicating the upper opening and defining a space of a stem of the gate electrode, having a limited size along a current direction, and exposing side walls of the first and second resist layers which are generally vertical; (f) performing a heat treatment on the semiconductor substrate at a third temperature to give a first forward taper angle to the side walls of the first resist layer exposed in the lower opening and a second forward taper angle to the side walls of the second resist layer exposed in the lower opening, the second forward taper angle being larger than the first forward taper angle; (g) filling a gate electrode stem in the lower opening and forming a gate electrode head in the upper opening to form a mushroom gate electrode, the head having an expanded size along the current direction.