Patent ID: 6657252
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A semiconductor device comprising:a continuous buried insulator layer; a fin body on the buried insulator layer, the fin body having a sidewall, wherein the fin body is in direct mechanical contact with a planar surface of the buried insulator layer; a gate insulator on the sidewall, the gate insulator being in direct mechanical contact with the sidewall; at least one floating gate on the gate insulator, the at least one floating gate having an exterior side, the at least one floating gate being in direct mechanical contact with the gate insulator; a floating gate insulator on the floating gate exterior side, the floating gate being in direct mechanical contact with the floating gate exterior side; and a control gate on the floating gate insulator, the floating gate isolated from the control gate by the floating gate insulator, the control gate being in direct mechanical contact with the floating gate insulator, wherein the gate insulator, the at least one floating gate, the floating gate insulator, and the control gate are each in direct mechanical contact with the planar surface of the buried insulator layer.