Patent ID: 6753224
Filing Date: 2004-06-22
Classification: H01L,Y10S

Abstract:
A method of creating a layer of Inter-Poly Dielectric for use in flash memory devices, comprising the steps of:providing a silicon substrate, an active surface area having been defined in the surface of said substrate, said active surface area being designated as being the surface area of the substrate over which at least one gate structure is to be created, said gate structure forming a gate structure for a flash memory device; depositing a layer of gate dielectric over the surface of the substrate; depositing a layer of floating gate material over the surface of the layer of gate dielectric; depositing a composite layer of Inter-Poly Dielectric over the surface of the layer of floating gate material; depositing a layer of control gate material over the surface of the layer of gate dielectric; patterning said layer of control gate material, said composite layer of Inter-Poly Dielectric, said layer of floating gate material and said layer of gate dielectric; and forming source and drain regions in the surface of said substrate, self-aligned with said patterned layers of control gate material, of Inter-Poly Dielectric, of floating gate material and of gate dielectric.