Patent ID: 6500718
Filing Date: 2002-12-31
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, comprising the steps of:forming a trench mask layer on a semiconductor substrate; forming a trench by partially etching the trench mask layer and the semiconductor substrate by employing a device isolation mask having a predetermined pattern, forming a device isolation insulation material; to fill up the trench; etching back the device isolation insulation material to expose the upper portion of the trench mask layer; forming a device isolation insulation film having a step by partially removing the device isolation insulation material on a field region whereon the gate electrode line is to be formed; removing the trench mask layer to expose the semiconductor substrate; forming a gate insulation film on the exposed semiconductor substrate; forming a conductive material for a electrode on the device isolation insulation film having the step and the gate insulation film; etching back the conductive material for gate electrode to expose the upper portion of the device isolation insulation film; and forming a gate electrode self aligned on the device isolation insulation film by removing the conductive material for the gate electrode.