Patent ID: 6813200
Filing Date: 2004-11-02
Classification: G11C

Abstract:
A circuit configuration for reading out a programmable link, comprising:a volatile memory cell having an input coupled to the programmable link for reading out and buffer storing a programmed value, said volatile memory cell having an output; an address input for feeding an address value; a combination unit having a first input connected to said address input, a second input connected to said output of said volatile memory cell, and an output for providing a hit signal if the programmed value and the address value correspond; a switch for coupling said address input to said input of said volatile memory cell for storing the address value in said volatile memory cell, said switch having a control input; a device for programming the programmable link; and a control circuit having an input coupled to said output of said combination unit; said control circuit having an output coupled to said control input of said switch and to said device for programming; and said control circuit providing an activation signal.