Patent ID: 7917907
Filing Date: 2011-03-29
Classification: G06F

Abstract:
1. A method for processing instructions on a multithreaded processor, the method comprising: determining, by logic of the multithreaded processor, a number of active threads associated with the multithreaded processor; allocating, by the logic of the multithreaded processor, a number of cycles for each of the active threads over a plurality of cycles, wherein each of the active threads is associated with an application, wherein the number of cycles allocated to each active thread is based at least in part on requirements of the application associated with each active thread; determining, by the logic of the multithreaded processor, a thread switching pattern for the plurality of cycles, wherein the thread switching pattern is based at least in part on the number of cycles allocated for each of the active threads, wherein determining the thread switching pattern comprises determining an order in which each of the active threads will be allocated to each cycle of the plurality of cycles; and switching, by the logic of the multithreaded processor, the processing from a first one of the active threads to a next one of the active threads in accordance with the thread switching pattern; wherein determining the order in which each of the active threads is to be allocated to each cycle comprises: