Patent ID: 8097510
Filing Date: 2012-01-17
Classification: H01L

Abstract:
1. A method of forming a field effect transistor (FET) comprising: forming a drift region comprising a stack of alternating conductivity type silicon layers; forming a drain region of a first conductivity type extending into the stack of alternating conductivity type silicon layers; forming a trench gate extending into the stack of alternating conductivity type silicon layers, the trench gate having a vertically extending non-active sidewall and a vertically extending active sidewall being perpendicular to one another; and forming a body region of a second conductivity type adjacent to the active sidewall of the trench gate, wherein the trench gate and the drain region are formed such that the non-active sidewall of the trench gate faces the drain region and the body region extends along the active sidewall but not the non-active sidewall.