Patent ID: 6438021
Filing Date: 2002-08-20
Classification: G11C

Abstract:
A method of reading out data from a semiconductor memory device, wherein the device comprises: a capacitor having two electrodes and a ferroelectric interposed between the electrodes; and a field effect transistor having source, drain and gate electrodes, andin which one of the two electrodes of the capacitor is connected to, or used in common as, the gate electrode of the transistor, while the other electrode of the capacitor is used as a control electrode, and in which a voltage is applied to the control electrode, thereby changing a polarization of the ferroelectric and eventually a channel resistance of the transistor so that the channel resistance can represent binary data depending on whether the resistance is high or low, wherein the method comprises: applying a positive voltage to the control electrode if a threshold voltage of the transistor is positive, and applying a negative voltage to the control electrode if the threshold voltage of the transistor is negative.