Patent ID: 6949387
Filing Date: 2005-09-27
Classification: H01L

Abstract:
1. A method of designing a semiconductor device, comprising: a step of measuring a thickness of a pad oxide film formed on a surface of a semiconductor substrate and a thickness of a nitride film formed on said pad oxide film; a step of measuring an internal stress of said nitride film; a step of measuring a width of a device formation region formed on said semiconductor substrate and a width of a device isolation region adjacent to said device formation region; a step of measuring a depth of a groove formed inside said semiconductor substrate by etching a portion existing on said device isolation region among said nitride film formed on said oxide film; a step of conducting stress analysis using said thickness of a pad oxide film, said thickness of a nitride film, said width of a device formation region, said width of a device isolation region, said depth and said internal stress and obtaining an internal stress estimated to occur due to thermal oxidation in the proximity of said groove; a step of preparing a design chart representing a region in which a quotient obtained by dividing said internal stress and said internal estimated stress by a dislocation occurrence limit stress, at which dislocation occurs due to thermal oxidation, exceeds 1, by using the width of said device formation region and the width of said device isolation region as parameters; and a step of setting a value of the width of said device formation region and a value of the width of said device isolation region, at which dislocation does not occur, in design of said semiconductor substrate.