Patent ID: 6885251
Filing Date: 2005-04-26
Classification: H03L

Abstract:
1. Phase locked loop charge pump comprising: a drain node; and at least a cascode transistor for limiting the variation of the voltage of said drain node, wherein an intermediate switch transistor is between the drain node and the cascode transistor; wherein said drain node is a first node and said cascode transistor is a first cascode transistor; wherein said charge pump further comprises: a second node, and a branch connecting the first node with the second node, said branch comprising the first cascode transistor and a second cascode transistor; wherein a first switch transistor is coupled across from the first cascode transistor, and a second switch transistor is coupled across from the second cascode transistor; and wherein the intermediate switch transistor is between one of the first node and the second node, and one of the first cascode transistor and the second cascode transistor, and is coupled across from one of the first switch transistor and the second switch transistor.