Patent ID: 6885668
Filing Date: 2005-04-26
Classification: H04L,H04W

Abstract:
1. An apparatus for processing high-speed data comprising: a BIN adopting an ATM switching system for providing a high-speed communication path among each block in each BTS; an LCIN adopting an ATM switching system connected to said BIN so as to provide a high-speed communication path among each block in each BSC; a first TSB connected to said LCIN so as to process voice data and low-speed data lower than 64 kbps; a second TSB connected to said LCIN so as to process high-speed data higher than 64 kbps; a GCIN adopting an ATM switching system connected to said LCIN so as to provide a high-speed communication path among each BSC; a BSM connected to said GCIN so as to perform an overall operation of said BSC and BTS, source management, state management, user interface and maintenance; an MSC connected to said first TSB so as to function as a switch for voice data and other data of an overall system; an ATM switch connected to said MSC so as to provide a high-speed multimedia service with respect to other network; and an IWF connected to said ATM switch so as to process packet data.