Patent ID: 6275255
Filing Date: 2001-08-14
Classification: A61B,H01L,H04N

Abstract:
A reduced area imaging device comprising:an image sensor lying in a first plane and including an array of CMOS pixels for receiving images thereon, said image sensor further including circuitry means on said first plane and coupled to said array of CMOS pixels for timing and control of said array of CMOS pixels, said image sensor producing a pre-video signal, said pre-video signal comprising serial formatted data reflective of image data from the pixel array which is arranged in a plurality of rows and columns;a pre-video conductor for transmitting said pre-video signal, said pre-video signal capable of being carried for transmission by a single wire conductor of said pre-video conductor, said pre-video conductor having first and second ends, said first end communicating with said image sensor;a first circuit board lying in a second plane and longitudinally aligned with said image sensor, said first circuit board being connected to said pre-video conductor at said second end thereof, said first circuit board including circuitry means for converting said pre-video signal to a post-video signal for reception by a standard video device; anda power supply electrically coupled with said image sensor for driving said array of pixels and said timing and control means, and electrically coupled to said first circuit board for driving said circuit board.