Patent ID: 6998301
Filing Date: 2006-02-14
Classification: H01L

Abstract:
1. A method for forming a tri-gate semiconductor device that includes a substrate and a dielectric layer formed on the substrate, comprising: depositing a first dielectric layer on the dielectric layer; etching the first dielectric layer to form a structure; depositing a second dielectric layer over the structure; depositing an amorphous silicon layer over the second dielectric layer; etching the amorphous silicon layer to form amorphous silicon spacers, the amorphous silicon spacers being disposed on opposite sides of the structure; depositing a metal layer on at least an upper surface of each of the amorphous silicon spacers; annealing the metal layer to convert the amorphous silicon spacers to crystalline silicon fin structures; removing a portion of the second dielectric layer; depositing a gate material; and etching the gate material to form tri-gate semiconductor.