Patent ID: 8810065
Filing Date: 2014-08-19
Classification: G06F,H02J,Y02D

Abstract:
1. An electronic device comprising: a circuit to provide a power mode signal when the electronic device is to enter a reduced power state; and a first voltage regulator to provide a first voltage and a second voltage less than the first voltage, the first voltage regulator to provide the second voltage in response to the power mode signal, and a second voltage regulator to provide a third voltage and a fourth voltage less than the third voltage, the second voltage regulator to provide the fourth voltage in response to the power mode signal, the first voltage regulator is to output the second voltage independently from the second voltage regulator outputting the fourth voltage in response to a same signal that corresponds to the power mode signal, the first voltage regulator to receive the power mode signal, the second voltage regulator to receive the power mode signal, and the first and second voltage regulators to supply output voltages to power circuits or functions different from a central processor of the electronic device, and the first and second voltage regulators to reduce output voltages to power the circuits or functions different from the central processor in response to the power mode signal and independent from changing power to the central processor.