Patent ID: 6509597
Filing Date: 2003-01-21
Classification: H01L

Abstract:
A semiconductor integrated circuit device having an information transfer MISFET formed on a main surface of a semiconductor substrate, and a capacitor connected in series to said information transfer MISFET, said device comprising:(a) said information transfer MISFET constituted by a gate insulating film formed on said semiconductor substrate, and a gate electrode formed on an upper portion thereof, and source and drain regions formed in the semiconductor substrate located at both sides of said gate electrode; (b) said capacitor constituted by a lower electrode composed of a first conductive layer, and a capacitive insulating film formed on said lower electrode and made of one of a high-dielectric-constant material and a ferroelectric material, and an upper electrode composed of a second conductive film and electrically connected to one of said source and drain regions; (c) a first shielding film formed under said lower electrode, and a second shielding film formed on said upper electrode; and (d) said capacitive insulating film and said first and second shielding films being ferroelectric materials containing lead, and a lead composition ratio of each of said first and second shielding films being higher than that of said capacitive insulating film.