Patent ID: 8415248
Filing Date: 2013-04-09
Classification: H01L

Abstract:
1. A method of forming a self-aligned dual-damascene interconnect structure comprising: providing a first patternable low-k material on top of a substrate; forming at least one first interconnect pattern within the first patternable low-k material without utilizing a separate photoresist material, wherein the at least one first interconnect pattern has a first dimension that is larger than a second dimension of a final first interconnect pattern; providing a second patternable low-k material on top of the first patternable low-k material and completely within the at least one first interconnect pattern; forming at least one second interconnect pattern that is different from the at least one first interconnect pattern within the second patternable low-k material without utilizing a separate photoresist material, wherein during said forming the at least one second interconnect pattern a portion of the second patternable low-k material remains in the at least one first interconnect pattern of said first dimension to provide the final first interconnect pattern having the second dimension; curing at least said second patternable low-k material into a dielectric material having a dielectric constant of not more than 4.3; and filling the final first interconnect pattern and the second interconnect pattern with a conductive material.