Patent ID: 6649482
Filing Date: 2003-11-18
Classification: H01L

Abstract:
A method for forming a bipolar transistor on a wafer, the wafer having a buried layer, an epitaxial layer of a first conductivity type formed over the buried layer and having a smaller dopant concentration than the buried layer, the method comprising the steps of:forming a layer of first isolation material on the epitaxial layer; forming a layer of second isolation material on the layer of first isolation material; etching a portion of the layer of second isolation material and an underlying portion of the layer of first isolation material to form an exposed region of the epitaxial layer; forming a layer of first conductive material on the layers of first and second isolation materials and the exposed region of the epitaxial layer; planarizing the layer of first conductive material to form an intrinsic base region surrounded by the layer of first isolation material.