Patent ID: 8669617
Filing Date: 2014-03-11
Classification: H01L

Abstract:
1. A device comprising, at least four different types of transistors on a substrate, wherein the transistors each comprise a gate structure, wherein the gate structure of a first transistor comprises a first gate dielectric layer comprising a first high-k dielectric layer having a first thickness, the gate structure of a second transistor comprises a second gate dielectric layer comprising a second high-k dielectric layer having a second thickness, wherein the first and the second high-k dielectric layer thicknesses are not the same, wherein the gate structure of a third transistor comprises a third gate dielectric layer comprising a first silicon dioxide layer having a third thickness, the gate structure of a fourth transistor comprises a fourth gate dielectric layer comprising a second silicon dioxide layer having a fourth thickness, wherein the third and the fourth silicon dioxide layer thicknesses are not the same, and wherein the gate structure of each of the transistors additionally comprises an electrode disposed so that at least a portion of each of the gate dielectric layers is between a channel region of each of the transistors and the electrode, wherein the first gate dielectric layer is direct contact to an electrode of the first gate structure, and wherein the thickness of each of the gate dielectric layers is measured as a thickness of the gate dielectric layer between the electrode and the channel region of each of the transistors.