Patent ID: 6084793
Filing Date: 2000-07-04
Classification: G11C

Abstract:
A read-only memory (ROM) system including a plurality of data lines, a word line, and a voltage source, comprising:a first ROM cell having a gate connected to said word line and a source-drain path connected between a first data line and a second data line of said plurality of data lines;a second ROM cell having a gate connected to said word line and a source-drain path connected between said second data line and a third data line of said plurality of data lines;a third ROM cell having a gate connected to said word line and a source-drain path connected between said third data line and a fourth data line of said plurality of data lines; anda sense amplifier for amplifying data from one of said first, second, and third ROM cells,wherein said first data line is connected to said voltage source and said second data line is connected to said sense amplifier when data from said first ROM cell is read, and said third and fourth data lines are charged to a predetermined voltage.