Patent ID: 6166416
Filing Date: 2000-12-26
Classification: H01L

Abstract:
A semiconductor device, comprising:a first capacitor electrode over a semiconductor substrate;a dielectric layer formed over a portion of the first capacitor electrode;an insulating layer adjacent the dielectric having a prescribed height relative to the dielectric, wherein the insulating layer defines a first capacitor electrode contact region and a second capacitor electrode region;a second capacitor electrode formed in the second capacitor electrode region;a first electrode connection layer formed in the first capacitor electrode contact region, wherein interfaces between the first electrode connection layer and the insulating layer are continuous in an intersection region around the first electrode, the first electrode connection layer and the insulating layer; anda metallic layer contacting the second capacitor electrode in the second capacitor electrode region and the first electrode connection layer, wherein a combined height of the metallic layer and the first electrode connection layer is at least equal to the prescribed height of the insulating layer, and wherein the intersection region effectively prevents step-coverage gaps in the first electrode connection layer to reduce defects in the electrical connection between the metallic layer and the first electrode to increase device reliability.