Patent ID: 6578059
Filing Date: 2003-06-10
Classification: G06F

Abstract:
A method for performing a floating-point calculation in a computer comprising a floating-point computation unit, a memory and floating-point registers, said method comprising the steps of:performing a non-final operation of the floating-point calculation in the floating-point computation unit and generating a non-final result; selecting a first exponent range in response to a first state of a widest range exponent bit and controlling the non-final operation of the floating-point calculation according to the first exponent range so that an exception is not generated if the exponent of the non-final result is compatible with the first exponent range and is incompatible with a second exponent range, wherein said first exponent range is wider than said second exponent range; performing a final operation of the floating-point calculation in the floating-point computation unit and generating a final result; and selecting the second exponent range in response to a second state of the widest range exponent bit and controlling the final operation of the floating-point calculation according to the second exponent range so that an exception is generated if the exponent of the final result is incompatible with said second exponent range.