Patent ID: 6097227
Filing Date: 2000-08-01
Classification: H03L

Abstract:
A synchronizing signal generating circuit comprising:a phase detector receiving as input a reference signal and an internal synchronizing signal and outputting a control signal, up or down signal, corresponding to a phase difference between the reference signal and the internal signal;a locked state detector receiving as input the reference signal and the internal synchronizing signal and outputting a lock signal showing a locked state when the phase difference is within a predetermined range and outputting an unlock signal showing an unlocked state when the phase difference is output the predetermined range;a current generator for generating a corresponding control current in accordance with the lock signal and unlock signal;a charge pump for outputting a control voltage corresponding to the control current;a loop filter for filtering the control voltage by switching a loop constant whereby capacity is cumulatively raised when the lock signal is inputted and the capacity is reduced when the unlock signal is inputted; anda voltage controlled oscillator for outputting the internal synchronizing signal in a frequency corresponding to the inputted filtered control voltage;wherein said loop filter further includes voltage drop preventing means for preventing a generation of noise and a level drop of the control voltage caused by a change between the locked state and the unlocked state.