Patent ID: 6469338
Filing Date: 2002-10-22
Classification: H01L

Abstract:
A non-volatile semiconductor memory device, comprising:a semiconductor substrate having a main surface; a plurality of strip shaped isolating insulation films formed on the main surface of said semiconductor substrate to continuously extend approximately along <100> direction; a plurality of strip shaped impurity regions provided between said plurality of isolating insulation films, formed on the main surface of said semiconductor substrate to continuously extend approximately along the <100> direction, wherein said impurity regions contain boron or arsenic; a floating gate electrode formed between the plurality of said impurity regions, formed on the main surface of said semiconductor substrate with a first dielectric film interposed, wherein said floating gate electrode includes a plurality of floating gate electrodes formed spaced from each other approximately along the <100> direction; and a control gate electrode formed on said floating gate electrode with a second dielectric film interposed, wherein a plurality of trenches are formed continuously extending approximately along the <100> direction in the main surface of said semiconductor substrate, each of said trenches being filled with each of said isolating insulation films.