Patent ID: 8482116
Filing Date: 2013-07-09
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first integrated-circuit chip having a rear face and side faces and a front face provided with electrical connection pads; a single support layer within which the first integrated-circuit chip is encapsulated in a position such that the front face of the first integrated-circuit chip is not covered by the single support layer and lies parallel to a first face of the single support layer and such that the rear face and side surfaces of the first integrated-circuit chip are covered by the single support layer; an intermediate layer placed on the front face of the first integrated-circuit chip and on the first face of the single support layer, the intermediate layer comprising an electrical connection network selectively connected to the electrical connection pads of the first integrated-circuit chip; a second integrated-circuit chip having one face placed above the intermediate layer and provided with electrical connection pads selectively connected to the electrical connection network; and electrical connection vias passing through the single support layer and selectively connecting the electrical connection network to external electrical connection means formed on a second face of the single support layer.