Patent ID: 6697939
Filing Date: 2004-02-24
Classification: G06F

Abstract:
A method of executing microprocessor instructions comprising:organizing a set of received instructions into an instruction group, wherein the instruction group includes at most one branch instruction and wherein the branch instruction comprises the last instruction in the group, and storing the instructions in the instruction group in an entry of a basic block cache; dispatching the instruction group for execution and allocating an entry in a completion table corresponding to the dispatched instruction group, wherein each entry in the completion table corresponds to an entry in the basic block cache; upon executing the instruction group, recording instruction history information indicative of whether execution of the instruction group resulted in a store forwarding exception in which a load instruction that follows, in program order, a store instruction sharing a common memory reference executes before the store instruction; and modifying the execution of the instruction group responsive to the instruction history information by entering an in-order execution mode prior to a subsequent execution of the instruction group.