Patent ID: 8017875
Filing Date: 2011-09-13
Classification: B23K,H01L,H05K

Abstract:
1. A printed wiring board comprising: a wiring substrate; a build-up wiring layer formed by laminating conductor circuits and at least one interlaminar resin insulating layer alternately on the wiring substrate, the conductor circuits situated in mutually different layers being connected electrically through at least one via hole; a solder resist layer provided on the outermost interlaminar resin insulating layer and the outermost conductor circuit and having a plurality of openings, the plurality of openings exposing a plurality of parts of the conductor circuit forming a plurality of conductor pads for mounting electronic parts, respectively; and a plurality of solder bumps formed on the plurality of conductor pads, respectively, wherein: the conductor pads are aligned at a pitch of about 200 μm or less, and a ratio W/D of a diameter W of the solder bumps to an opening diameter D of the openings formed in the solder resist layer is about 1.05 to about 1.26, and the openings of the solder resist layer are formed in a tapered fashion such that an opening diameter D wherein the surface of the solder resist layer is subjected to a flattening treatment in at least an electronic parts mounting region, and the flattened surface of the solder resist layer is further subjected to a roughening treatment, wherein the flattened surface of the solder resist layer is about 0.8 μm to about 3.0 μm in maximum surface roughness, and roughness of the roughened surface of the solder resist layer is smaller than the maximum surface roughness of the flattened surface, and about 0.2 μm to about 0.5 μm at an arithmetic mean roughness.