Patent ID: 6487649
Filing Date: 2002-11-26
Classification: G06F

Abstract:
A microcomputer, comprising:an address bus; a memory management unit connected to said address bus; a central processing unit connected to said address bus and to said memory management unit by said address bus; at least one program memory having at least one memory area for storing user programs and connected to said address bus and to said memory management unit via said address bus, each of the user programs being assigned in said memory management unit a segment descriptor storing at least a start address, a length and access rights of a respective user program, said at least one program memory further having a library program memory area for storing library programs and a vector memory area, said memory management unit having a further segment descriptor with a segment descriptor label describing an assignment of said vector memory area and said library program memory area, at least a vector number and a vector assigned to said vector number being stored in said vector memory area, and a call to a library program from the respective user program having to contain at least the segment descriptor label and said vector number to which said memory management unit assigns said vector, a jump to the library program called being effected by said vector.