Patent ID: 7574635
Filing Date: 2009-08-11
Classification: G11C

Abstract:
1. A circuit for testing an asynchronous data transfer, said circuit comprising: a first circuit receiving a stream of data in response to a clock signal in a first clock domain, said first circuit generating an empty signal indicating that said first circuit has no data to send, wherein a rising edge of said empty signal is generated in a second clock domain and a falling edge of said empty signal is generated in said first clock domain and converted to said second clock domain; a second circuit coupled to said first circuit, said second circuit receiving said stream of data from said first circuit in said second clock domain in response to said falling edge of said empty signal from said first circuit; and a comparator circuit coupled to receive said stream of data and an output of said second circuit, wherein an output of said comparator circuit indicates whether said empty signal enables an asynchronous data transfer of said stream of data.