Patent ID: 6623986
Filing Date: 2003-09-23
Classification: H01L

Abstract:
A method of manufacturing a ferroelectric memory device having at least a wiring layer and an insulating layer on a thin ferroelectric film capacitor having a laminate structure, comprising at least a lower electrode, a thin ferroelectric film and an upper electrode, and an upper protection electrode comprising an alloy electrode, wherein the method comprises:forming a thin amorphous film and crystallizing the thin amorphous film by a heat treatment in an oxygen containing atmosphere as a step of manufacturing a thin ferroelectric film of the thin ferroelectric film capacitor; removing the surface layer of the thin ferroelectric film at least by 5 nm after the crystallizing step; and forming the film of the upper electrode on a surface of the thin ferroelectric film after the surface layer has been removed, wherein the steps of removing the surface layer of the thin ferroelectric film and forming the film of the upper electrode are performed in a vacuum without exposing the ferroelectric film to atmospheric air, thereby decreasing formation of a modified layer at a boundary between the ferroelectric film and the upper electrode.