Patent ID: 6876041
Filing Date: 2005-04-05
Classification: H01L

Abstract:
1. An ESD protection component, comprising: at least two MOS field effect transistors (FETs) of a first conductivity type, having two gates and formed in parallel on a first semiconductive layer having a second conductivity type; and a first well having a first conductivity type, formed on the first semiconductive layer, comprising; a connecting area, formed between the MOS FETs; two parallel extension areas, formed perpendicular in plan view to the gates of the FETs, said gates being between said extension areas; and a first doping area of the second conductivity type, formed in the connecting area; wherein each of the MOS FETs has a drain region of the first conductivity type, and the drain regions of the MOS FETs are commonly and directly connected to a single pad.