Patent ID: 6566755
Filing Date: 2003-05-20
Classification: H01L,H04J,H04L,H04Q

Abstract:
An interconnection structure for use in a multilevel integrated circuit comprising:a first interconnection formed on a first insulating layer wherein said first interconnection comprises: a first main current carrying conductive layer; a first refractory metal layer formed on said first main current carrying conductive layer; and a second main current carrying conductive layer formed on said first refractory metal layer; a second insulating layer formed on said first interconnection; a via connection formed through said second insulating layer and recessed into said second main current carrying conductive layer and to said first refractory metal layer so as to form a high surface area contact with said first interconnection wherein:the width of said via connection through said second insulating layer is the same as the width of said via connection in said second main current carrying conductive layer; and a second interconnection formed on said second insulating layer in contact with said via connection.