Patent ID: 6190968
Filing Date: 2001-02-20
Classification: H01L

Abstract:
A method for forming a memory device in a semiconductor material of a first conductivity type, the semiconductor material having a top surface, the method comprising the steps of:forming a plurality of trenches in the semiconductor material that extend continuously across the semiconductor material, the plurality of trenches defining a plurality of top surface strips that extend continuously across the top surface of the semiconductor material between adjacent pairs of trenches, the plurality of trenches having a plurality of bottom surfaces and sidewall surfaces such that each trench has a bottom surface that extends continuously across the semiconductor material and a pair of sidewall surfaces which connect the bottom surface to adjacent pairs of top surface strips;forming a layer of gate oxide over the top surface strips, the bottom surfaces, and the sidewall surfaces;forming a layer of first polysilicon (poly-1) on the gate oxide layer;forming a layer of interpoly dielectric on the poly-1 layer;forming a second layer of polysilicon (poly-2) on the interpoly dielectric layer;etching the poly-2 layer, the layer of interpoly dielectric, and the layer of poly-1 to form a plurality of stacked gate structures on each sidewall surface of each trench, each stacked gate structure having a floating gate and a control gate; andimplanting the semiconductor material so that a plurality of drain and source lines that extend continuously across the semiconductor material are formed in the top and the bottom surfaces.