Patent ID: 8941092
Filing Date: 2015-01-27
Classification: H01L

Abstract:
1. A method for forming a semiconductor device structure, comprising a heterojunction forming step wherein: ion implantation is performed from an upper surface of a substrate in which a strained semiconductor layer partially having a covering layer is provided, said strained semiconductor layer being positioned on an insulating oxide layer such that said covering layer and insulating oxide layer are on opposite sides of said strained semiconductor layer, to maintain a strained state of a first part of the strained semiconductor layer shielded by the covering layer and to relax the strained state of a second part of the strained semiconductor layer not shielded by the covering layer and the second part is changed into a relaxed semiconductor layer, thereby forming a heterojunction between the strained semiconductor layer maintaining the strained state and the relaxed semiconductor layer, wherein energy of ion implantation is adjusted such that a peak of recoil energy distribution of ions is theoretically positioned in an interface between the strained semiconductor layer and the insulating oxide layer.