Patent ID: 6825730
Filing Date: 2004-11-30
Classification: H03L

Abstract:
A phase-locked loop (PLL) charge-pump comprising:a first differential section including two cascaded transistor pairs, with a first unity-gain operational amplifier (op amp) interposed between the cascaded pairs, an output (Vout+) connected to a loop filter first port, and where each transistor is connected to a corresponding one of a pair of differential phase detector outputs (up/upb and dn/dnb); a second differential section including two cascaded transistor pairs, with a second unity-gain op amp interposed between the cascaded pairs, an output (Voutâˆ’) connected to a loop filter second port, differential to the first differential section first output, and where each transistor is connected to a corresponding one of the pair of differential phase detector outputs (up/upb and dn/dnb); a first impedance enhancement circuit sourcing current for the first and second differential sections; a common-mode feedback circuit having differential inputs connected to the first and second differential section outputs (Vout+/Voutâˆ’), and an output (Vcmfb); and, a common-mode feedback stabilizing filter interposed between common-mode feedback circuit output (Vcmfb) and the first and second differential section outputs (Vout+/Voutâˆ’).