Patent ID: 9177652
Filing Date: 2015-11-03
Classification: G11C

Abstract:
1. A method for a memory control module, the method comprising: identifying an address associated with one or more bad memory cells in a memory page of a solid state storage device; determining a first address value of a first memory cell in the memory page based at least in part on the address of the one or more bad memory cells of the solid state storage device and a number of correctable bad memory cells in the memory page; determining a usable size of the memory page based at least in part on the first address value; and storing the first address value and the determined usable size, wherein the first address value and the determined usable size facilitates utilization of the memory page of the solid state storage device, wherein identifying the address associated with one or more bad memory cells includes identifying addresses associated with uncorrectable bad memory cells in the memory page of the solid state storage device.