Patent ID: 6216222
Filing Date: 2001-04-10
Classification: G06F

Abstract:
A data processing apparatus, comprising:an execution unit comprising a plurality of pipelined stages for executing instructions, such that a maximum of `n` instructions can executed simultaneously within the execution unit, where `n` is a positive integer;a set of at least `n` logical exception registers, each exception register being capable of storing a number of exception attributes associated with an instruction for which an exception has been detected during execution by the execution unit, wherein the attributes are used to identify exception type and provide sufficient information to enable an exception processing tool to subsequently complete the instruction;in the event of an exception being detected during execution of a first instruction, the execution unit being arranged: (i) to store in a first of said exception registers said exception attributes associated with said first instruction; (ii) to continue executing any remaining instructions already in the pipelined stages at the time the exception was detected, and (iii) to store in said exception registers the exception attributes associated with any of said remaining instructions for which an exception is detected during execution;a detector for detecting when a further instruction passed to said execution unit following detection of said exception in said first instruction and for providing an exception signal causing an exception processing tool to be invoked;whereby the exception attributes stored in the exception registers are provided to said exception processing tool for use in recovering from any exceptions occurring during processing of said first instruction and said remaining instructions.