Patent ID: 6493263
Filing Date: 2002-12-10
Classification: G06G

Abstract:
A semiconductor computing circuit for computing an absolute-value voltage representing the difference between a first signal voltage and a second signal voltage, comprising:a first MOS transistor having a floating gate and a control gate capacitively coupled to said floating gate; a second MOS transistor having a floating gate and a control gate capacitively coupled to said floating gate, and whose source electrode is connected to the source electrode of said first MOS transistor; a write circuit which, with a prescribed voltage applied to said control gates of said first and second MOS transistors, sets the potential at said floating gate of said first MOS transistor to a value equal to said first signal voltage and also sets the potential at said floating gate of said second MOS transistor equal to a value obtained by subtracting said first signal voltage from said prescribed voltage; and a difference voltage computing circuit for computing a voltage representing a value obtained by subtracting said second signal voltage from said prescribed voltage, and wherein: after setting said first and second MOS transistors by said write circuit, when the output voltage of said difference voltage computing circuit is applied to said control gate of said first MOS transistor while at the same time applying said second signal voltage to said control gate of said second MOS transistor, said absolute-value voltage representing the difference between said first signal voltage and said second signal voltage is output.