Patent ID: 6751119
Filing Date: 2004-06-15
Classification: G11C

Abstract:
A nonvolatile memory apparatus comprising:a plurality of terminals including a clock terminal, a command terminal and other terminal; a control circuit; and a plurality of nonvolatile memory cells, wherein said clock terminal receives a clock signal; wherein said command terminal receives commands which comprise a read command and a program command, wherein said control circuit reads out operation steps from a program memory for controlling an operation of said received command by executing said operation steps, wherein in an operation in response to said read command received from said command terminal, said control circuit controls, based on operation steps corresponding to said read command, reading data from ones of said nonvolatile memory cells, and outputting data via said other terminal not said command terminal in response to said clock signal, and wherein in an operation in response to said program command received from said command terminal, said control circuit controls, based on operation steps corresponding to said program command, receiving data via said other terminal not said command terminal in response to said clock signal, and writing data to ones of said nonvolatile memory cells.