Patent ID: 6128324
Filing Date: 2000-10-03
Classification: H01S

Abstract:
A semiconductor device for spatially switching light in an optical switching network, comprising:an anode electrode deposited on an outer P-anode layer having an ohmic contact surface, said outer P-anode layer being stacked on an upper portion of an inner n-base layer;said inner n-base layer being stacked on an inner p-base layer, said inner p-base layer having a horizontal width and being stacked on an outer N-cathode bottom layer having a bottom surface and said horizontal width;said inner n-base layer having said upper portion and a lower portion, said lower portion extending outward on one side of said inner n-base layer along a horizontal axis, said lower portion having said horizontal width, said upper and lower portions defining a ledge;said outer P-anode layer, said inner n-base layer, said inner p-base layer and said outer N-cathode bottom layer being composed of a direct band gap semiconductor material;said outer P-anode layer having an anode width, W;a gate electrode disposed on said ledge, said gate electrode forming an ohmic junction where said ledge is contacted, said gate electrode having a gate contact and defining a gate electrode side, said gate electrode being connected to a means for biasing;said anode electrode being forward biased with respect to a cathode electrode deposited on said gate electrode side of the bottom surface;said outer P-anode layer and said outer N-cathode bottom layer being more highly doped than said inner n-base layer and said inner p-base layer;said cathode electrode having an ohmic contact surface and a cathode electrode width, W', less than said anode width, W, thereby exposing that portion of said bottom surface of the outer N-cathode bottom layer lying directly below said anode;a current path flows vertically from said anode electrode to said outer N-cathode bottom layer;said cathode electrode inducing a lateral current flow horizontally through said outer N-cathode bottom layer, forming a transversely flowing narrow PnpN channel;said biasing means providing a low reverse bias from said gate electrode causing said PnpN channel to spatially shift toward said gate electrode side and emit light to said optical switching network from a first light emission region on said gate electrode side; andsaid biasing means providing a high reverse bias from said gate electrode causing said PnpN channel to spatially shift away from said gate electrode side and emit light to said optical switching network from a second light emission region opposite from said gate electrode side.