Patent ID: 7521347
Filing Date: 2009-04-21
Classification: H01L

Abstract:
1. A method for forming a contact hole in a semiconductor device, the method comprising: forming gate lines on a substrate including a cell region and a peripheral region; forming a bit line pattern by forming a bit line and a bit line hard mask in a sequential order over the substrate; forming an inter-layer insulation layer having a multiple-layer structure including an etch stop layer over the substrate; forming a contact mask over the inter-layer insulation layer; performing a first etching process to etch a first portion of the inter-layer insulation layer in the peripheral region up to the etch stop layer exposed, using the contact mask as an etch mask; and performing a second etching process to etch the exposed etch stop layer, a second portion of the inter-layer insulation layer below the exposed etch stop layer, and the bit line hard mask to form a contact hole exposing a portion of the bit line.