Patent ID: 8940606
Filing Date: 2015-01-27
Classification: H01L

Abstract:
1. A method for fabricating a trench type power transistor device, comprising: providing a substrate having a first conductivity type, wherein the substrate has an active region and a termination region; forming an epitaxial layer on the substrate, wherein the substrate has a second conductivity type different from the first conductivity type; forming at least a first through hole and at least a second through hole in the epitaxial layer to penetrate the epitaxial layer respectively, wherein the first through hole is located in the active region and the second through hole is located in the termination region; filling a dopant source layer into the first through hole and the second through hole respectively, wherein each of the dopant source layers comprises a plurality of dopants having the first conductivity type; diffusing the plurality of dopants into the epitaxial layer to form a first doped diffusion region in the epitaxial layer at one side of the first through hole, a second doped diffusion region in the epitaxial layer at one side of the second through hole, a first isolation layer in the first through hole and a second isolation layer in the second through hole, wherein the first doped diffusion region and the second doped diffusion region have the first conductivity type; forming a gate structure in the first through hole; and forming a doped source region in the epitaxial layer at one side of the first through hole, and the doped source region located right above the first doped diffusion region, wherein the doped source region has the first conductivity type and the gate structure is disposed between the first doped diffusion region and the doped source region.