Patent ID: 7051239
Filing Date: 2006-05-23
Classification: G01R,G06F

Abstract:
1. An integrated circuit fabricated on a chip, comprising: an on-chip logic analyzer a cache memory that includes a plurality of cache sets; at least one on-chip logic device that stores data to said plurality of cache sets during normal operation; and a logic gate that receives an enable signal when the on-chip logic analyzer is enabled, and which disables at least one of said plurality of said cache set for storing data from said on-chip logic analyzer; wherein the integrated circuit comprises a processor, and the on-chip logic device includes a CPU core; wherein the enable signal is generated by the on-chip logic analyzer; wherein the logic comprises a multiplexer that connects the on-chip logic analyzer to the disabled cache set when the on-chip logic analyzer asserts the enable signal; wherein the multiplexer forms part of a cache controller.