Patent ID: 6757786
Filing Date: 2004-06-29
Classification: G06F

Abstract:
System for memory management of data consistency relating to a main memory accessible by at least two processors, at least one of the said processors being furnished with at least one cache memory associated with at least one area of the main memory, referred to as the assignment area of said processor, the said management system comprising:an assembly for management of shared access of said processors to at least one common area of the main memory, referred to as the exchanges area, at least one copy module respectively associated with at least a first of said processors furnished with at least one cache memory, capable of performing a data copy between a memory workspace consisting of one of said cache memories and/or the assignment area of said first processor, on the one hand, and the exchanges area, on the other hand, and at least one data transfer module, associated respectively with at least one second processor capable of exchanging data with said first processor, intended for transferring data between said exchanges area and said associated second processor, characterized in that said consistency management system also comprises triggering means controlled by said second processor, capable of triggering the copy modules of the first processor and the transfer modules of said second processors when said first processor submits requests involving transfers of data between said memory workspaces of the first processor and said second processor.