Patent ID: 9007856
Filing Date: 2015-04-14
Classification: G11C

Abstract:
1. A repair control circuit controlling a repair operation of a semiconductor memory device, the repair control circuit comprising: a row matching block to store fail group information indicating one or more fail row groups among a plurality of row groups, the row groups being determined by grouping a plurality of row addresses corresponding to a plurality of wordlines according to a grouping method, each of the fail row groups including one or more fail row addresses of fail memory cells, the row matching block to generate a group match signal based on an input group address obtained by converting an input row address according to the grouping method and the fail group information, wherein the group match signal indicates the fail row group including the input row address; and a column matching block to store fail column addresses of the fail memory cells, and to generate a repair control signal based on input column address, the group match signal, and the fail column addresses, wherein the repair control signal indicates whether the repair operation is to be executed or not.