Patent ID: 6300782
Filing Date: 2001-10-09
Classification: G01R,H01L,H01R,Y10T

Abstract:
A system for testing a semiconductor component comprising:a testing apparatus comprising a base and a force applying mechanism attached to the base for applying a biasing force to the component;an interconnect on the base comprising a thinned substrate having a thickness substantially less than that of the component, and a plurality of first contacts on the thinned substrate configured to electrically engage a plurality of second contacts on the component; anda compliant polymer layer attaching the thinned substrate to the base such that the thinned substrate can flex and the first contacts can move with the thinned substrate in a z-direction upon application of the biasing force to accommodate variations in a planarity of the second contacts, the compliant polymer layer comprising a conductive polymer configured to provide electrical paths to the first contacts.