Patent ID: 9123767
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A MOS semiconductor device including a MOS gate structure, the MOS semiconductor device comprising: a first conductivity type drain region; a drift region of the first conductivity type that is formed on the drain region; a second conductivity type well region selectively disposed on a surface of the first conductivity type drift region; a source region of the first conductivity type selectively disposed on a surface of the second conductivity type well region; an insulating film extending along partially on an upper surface of the source region, a portion of the surface of the well region and a principal surface of the drift region; a conformal gate electrode disposed on an upper surface of the insulating film; a channel formation region sandwiched between the source region and the portion of the surface of the well region; and wherein a surface of the channel formation region has a level difference formed in a direction of a peripheral length, and across a length, of the channel formation region, the level difference including a low portion that is parallel to the principal surface of the first conductivity type drift region and is low in a direction orthogonal to the principal surface of the first conductivity type drift region, a high portion that is parallel to the principal surface of the first conductivity type drift region and is higher than the low portion in the direction orthogonal to the principal surface of the first conductivity type drift region, and an intermediate portion connecting the low portion and the high portion, wherein a height of the level difference is set between 0.1 μm and 10 μm.