Patent ID: 9105698
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. A method for fabricating a multilevel interconnect structure with a first conducting level and a second conducting level, comprising: depositing a first dielectric layer over the first conducting level; depositing an intermediate dielectric layer on the first dielectric layer; performing chemical mechanical polishing after depositing the intermediate dielectric layer, wherein the chemical mechanical polishing ends below an upper level of the first dielectric layer; depositing a second dielectric layer touching the intermediate dielectric layer and the first dielectric layer, wherein the second dielectric layer includes a lower planar surface that is directly in contact with the first dielectric layer and the intermediate dielectric layer along a single plane of contact; and opening a funnel-shaped connecting via through the first dielectric layer and the second dielectric layer, wherein the funnel-shaped connecting via comprises an upper wide portion opened only in the second dielectric layer and a narrower lower portion with two vertical or almost vertical sidewalls extending in both the first dielectric layer and the second dielectric layer, wherein the upper wide portion is formed using isotropic etching and the narrower lower portion is formed using anisotropic etching.