Patent ID: 6768159
Filing Date: 2004-07-27
Classification: H01L

Abstract:
A semiconductor device, comprising:a semiconductor substrate having a top surface and a trench; an impurity doped polysilicon layer disposed in the trench; a source region formed in the substrate adjacent a first sidewall of the trench; a drain region formed in the substrate adjacent a second sidewall of the trench; a first insulating layer formed over the impurity doped polysilicon layer and the top surface of the substrate, wherein the first insulating layer is thicker over the trench than over the top surface of the substrate, and wherein a bottom surface of the first insulating layer protrudes into the trench; a second insulating layer formed at a bottom of the trench and beneath the impurity doped polysilicon layer; and a gate formed over a portion of the first insulating layer where the first insulating layer is thicker.