Patent ID: 6166406
Filing Date: 2000-12-26
Classification: G11C,H01L,Y10S

Abstract:
A semiconductor device, comprising:a power supply line which is provided with a pre-charging voltage;a first signal line which is provided with a first data during an operation period;a second signal line which is provided with a second data during the operation period; anda pre-charging circuit which sets voltages of the first signal line and the second signal line to the pre-charging voltage in response to a control signal during a precharging period before the operation period;wherein the pre-charging circuit includes,(a) a first MOS transistor which connects the first signal line with the power supply line in response to the control signal during the pre-charging period,(b) a second MOS transistor which connects the second signal line with the power supply line in response to the control signal during the pre-charging period,(c) a third MOS transistor which connects the first signal line with the second signal line during the pre-charging period, wherein the third MOS transistor includes an elongate gate electrode that extends lengthwise between and parallel to the first signal line and the second signal line.