Patent ID: 9054041
Filing Date: 2015-06-09
Classification: H01L

Abstract:
1. A method for fabricating an integrated circuit comprising: forming a layer of a first dielectric material comprising silicon oxide over a gate electrode structure formed on a semiconductor substrate, the gate electrode structure comprising a horizontal top surface and sidewall vertical surfaces adjacent to the horizontal top surface; forming a layer of a second dielectric material comprising silicon nitride over the layer of the first dielectric material, wherein the first dielectric material is different in composition than the second dielectric material; implanting As after the implanting, applying an etchant to the layer of the second material that fully removes the layer of the second material from the sidewall vertical surfaces of the gate electrode while only partially removing the layer of the second material from the horizontal top surface of the gate electrode structure and while leaving the layer of the first dielectric material substantially intact, wherein applying the etchant comprises applying a solution of dilute hydrogen fluoride, and wherein applying the solution of dilute hydrogen fluoride comprises applying a solution of hydrogen fluoride at a molar concentration from about 0.005 to about 0.01 and a temperature from 40° C. to about 100° C.