Patent ID: 6960515
Filing Date: 2005-11-01
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising a semiconductor substrate having sequentially provided thereon at least the following stacked layers: a silicon layer, a conductive barrier layer, and a metal layer, the method comprising the sequential, ordered steps of: (a) etching the stacked layers to form a gate pattern; (b) subjecting the gate pattern and exposed sidewalls of the metal layer to selective oxidation conditions effective to selectively oxidize silicon to cure an etch damage while limiting the formation of a metal oxide coating along exposed sidewalls of the metal layer; and, (c) following completion of the selective oxidation in step (b), subjecting the metal gate pattern to annealing process (conditions without oxidation) carried out in an ambient of gas consisting essentially of a gas selected from the group consisting of hydrogen, a hydrogen-containing compound, and mixtures thereof, effective to at least partially remove by a reduction reaction the metal oxide coating along the sidewalls of the metal layer and/or to serve as a mechanical barrier that suppresses layer surface movement thereby preventing whisker nucleation.