Patent ID: 8530977
Filing Date: 2013-09-10
Classification: H01L

Abstract:
1. A metal oxide semiconductor field effect transistor (MOSFET) comprising: a semiconductor substrate comprising a first p-type doping concentration; a gate stack disposed above said semiconductor substrate, wherein said gate stack is configured such that said MOSFET is a small scale device having a reduced channel length for a channel region defined under said gate stack; a source region formed to a first side of said gate stack in said semiconductor substrate, said source region comprising a first n-type doping concentration; a first lightly doped region formed in said semiconductor substrate extending from said source region towards said channel region, said first lightly doped region comprising a second n-type doping concentration; a drain region formed to a second side of said gate stack in said semiconductor substrate, said second side opposite said first side, said drain region comprising said first n-type doping concentration; a second lightly doped region formed in said semiconductor substrate extending from said drain region towards said channel region, said second lightly doped region comprising said second n-type doping concentration; and a first protection implant comprising a second p-type doping concentration, said first protection implant formed in said semiconductor substrate under said source region and surrounding said source region and said first lightly doped region, and wherein said first protection implant extends under said gate stack; wherein said first side of said gate stack includes: wherein in cross-section said fourth region is adjacent to each of said first, second and third regions and separates each of said first, second and third regions from said fifth region, and wherein said fourth region is on said first side comprising said source region but not on said second side comprising said drain region.