Patent ID: 6521499
Filing Date: 2003-02-18
Classification: H01L

Abstract:
A method for forming a non-volatile memory, said method comprising:providing a substrate having a first dielectric layer thereon, a first conductive layer on said first dielectric layer and a second dielectric layer on said first conductive layer; transferring a pattern of buried diffusion regions into said second dielectric layer and said first conductive layer to expose said first dielectric layer and form a plurality of conductive lines; forming a third dielectric layer over said substrate; etching back said third dielectric layer to expose said substrate and said second dielectric layer and form spacers adjacent the side walls of said conductive lines; performing an ion implantation process on said substrate to form the buried diffusion regions in said substrate; forming a second conductive layer over said substrate; etching back said second conductive layer to a level lower than the top of said spacers; oxidizing the top surface of said second conductive layer to form an oxide layer; removing said second dielectric layer; forming a third conductive layer over said substrate; forming a fourth conductive layer over said third conductive layer; forming a fourth dielectric layer over said fourth conductive layer; transferring a word line pattern comprising a plurality of word lines substantially perpendicular to said conductive lines into said fourth dielectric layer, said fourth conductive layer and said third conductive layer to expose said oxide layer; forming a fifth dielectric layer over said substrate; forming a sixth dielectric layer over said fifth dielectric layer; etching back said sixth dielectric layer to expose said fifth dielectric layer; forming a seventh dielectric layer over said substrate; and forming contact holes into said seventh dielectric layer and said oxide layer to expose said conductive lines.