Patent ID: 7849362
Filing Date: 2010-12-07
Classification: G06F

Abstract:
1. A method comprising: creating a test case that is dependent upon known sequences; executing the test case on an originating processor until it reaches a known point; executing the test case on a different processor to perform an action; informing the originating processor that the action was taken; verifying with the originating processor that the action occurred, providing a shared message memory (SMM) for the exchange of information obtained during the execution of the test case between the originating processor and the different processor; providing a coherent structure for the SMM to support inter-TOS (test operating system) protocols running on the originating processor and the different processor; and providing a semaphore mechanism communicating TOS executables during atomic operations on the test case which is shared between the originating processor and the different processor, wherein the originating processor and the different processor are physical processors.