Patent ID: 6326282
Filing Date: 2001-12-04
Classification: H01L

Abstract:
A method of forming trench isolation in a semiconductor device comprising:forming a trench mask on a semiconductor substrate to define a trench forming region;etching said semiconductor substrate using said trench mask to form a trench therein;forming a thermal oxide layer on a bottom and sidewalls of said trench, said thermal oxide layer removing substrate damage caused by said etching of said semiconductor substrate;forming an oxidation barrier layer on said thermal oxide layer, said oxidation barrier layer preventing said bottom and sidewalls of said trench from being oxidized;forming a protection layer that is resistant to plasma on said oxidation barrier layer;plasma processing said bottom and sidewalls of said trench; andfilling up said trench with a trench fill material uniformly with respect to said bottom and sidewalls of said trench,said protection layer comprising an oxide layer selected from a group consisting of an HTO oxide layer and an LP-TEOS oxide layer, formed by deposition techniques at high temperature.