Patent ID: 7399692
Filing Date: 2008-07-15
Classification: H01L

Abstract:
1. A process for fabricating a semiconductor device, comprising: growing a first N-polar III-nitride semiconductor body over a support body; growing a second N-polar III-nitride semiconductor body over said first N-polar III-nitride semiconductor body; growing a third N-polar III-nitride semiconductor body over said second N-polar III-nitride semiconductor body; growing a protective spacer body over said third III-nitride semiconductor body; removing a portion of said protective spacer body to define an opening therein exposing a portion of said third III-nitride semiconductor body; growing a fourth N-polar III-nitride semiconductor body at least over said exposed portion; forming a gate structure over said fourth III-nitride semiconductor body; and forming power electrodes each electrically coupled to said third III-nitride semiconductor body.