Patent ID: 8377810
Filing Date: 2013-02-19
Classification: H01L

Abstract:
1. A method of forming a Schottky barrier diode comprising: providing a wafer comprising a substrate, an isolation layer on said substrate and a silicon layer on said isolation layer; forming a trench isolation region in a silicon layer so as to form a silicon island, said silicon island being undoped; forming a gate on a top surface of said silicon island; forming spacers on said top surface adjacent to said gate, said spacers comprising a first spacer on a first side of said gate and a second spacer on a second side of said gate opposite said first side and said forming of said spacers being performed such that a first area of said silicon island adjacent to said first spacer on said first side of said gate remains exposed and a second area of said silicon island adjacent to said second spacer on said second side of said gate remains exposed; doping said first area of said silicon island on said first side of said gate from said top surface to a bottom surface of said silicon island with one of a p-type dopant and an n-type dopant such that and, during said doping of said first area, masking said second area of said silicon island such that said second area remains undoped; and performing a metal silicide formation process to form a first metal silicide region on said first area and positioned laterally adjacent to said first spacer and a second metal silicide region on said second area and positioned laterally adjacent to said second spacer such that said first spacer, said gate, and said second spacer physically separate said first metal silicide region from said second metal silicide region and such that said second metal silicide region forms a Schottky barrier contact to said second area.