Patent ID: 8418021
Filing Date: 2013-04-09
Classification: G06F,H03M

Abstract:
1. A storage controller of controlling data access of a storage device, comprising: a decoding circuit, programmable to support a plurality of different error correction capabilities, for generating decoded data according to an adjustable error correction capability setting; a control circuit, coupled to the decoding circuit, for reading data from the storage device to obtain readout data and adjusting the adjustable error correction capability setting supported by the decoding circuit; and an encoding circuit, for generating encoded data according to a first error correction capability; wherein the control circuit further records the encoded data into the storage device, and sets the adjustable error correction capability setting by a second error correction capability; and when a decode error of decoding the readout data according to the second error correction capability occurs, the control circuit sets the adjustable error correction capability setting by a third error correction capability, and the decoding circuit re-decodes the readout data according to the third error correction capability, where the first error correction capability is equal to or greater than the third error correction capability, and the third error correction capability is greater than the second error correction capability.