Patent ID: 7398595
Filing Date: 2008-07-15
Classification: H01L,Y10T

Abstract:
1. A method for fabricating an integrated circuit structure on a substrate, comprising: forming an insulative layer on the substrate; forming a first opening in the insulative layer; forming digit lines in the first opening; forming a second opening in the insulative layer; and forming an electrode, wherein forming the electrode includes: forming a first portion of the electrode in a lower region of the second opening; forming a second portion of the electrode in the second opening and overlying the first portion, said insulative layer encompassing a sidewall of said second portion; forming a third portion of the electrode overlying the second portion and overlying at least a portion of the insulative layer, wherein said first portion and said second portion are different materials; forming a dielectric layer on the third portion, with the dielectric layer including a material from a group of materials consisting of Bax Sr(1-x) TiO 3 , BaTiO 3 , SrTiO 3 , PbTiO 3 , Pb(Zr,Ti)O 3 , (Pb,La)(Zr,Ti)O 3 , (Pb,La)TiO 3 , KNO 3 , and LiNbO 3 ; and wherein forming digit lines in the first opening includes: masking the substrate with a first digit line photoresist to define a region of the substrate reserved for digit line formation; reactive ion etching the substrate to form a self-aligned opening in the first opening and to expose at least a portion of the substrate; removing the first digit line photoresist: blanket depositing a digit line conductive layer to overlie at least the exposed substrate; blanket depositing a strapping layer to overlie the digit line conductive layer, the strapping layer having a lower resistance than the digit line conductive layer; patterning the digit lines with a second digit line photoresist overlying digit line areas; etching the digit line conductive layer and the strapping layer and retaining the digit line conductive layer and said strapping layer in digit line areas, the retained layers forming the digit lines, the strapping layer reducing an overall resistance of the digit lines; and removing the second digit line photoresist.