Patent ID: 6184111
Filing Date: 2001-02-06
Classification: H01L

Abstract:
A process for forming electronic devices, the process comprising steps:providing a substrate, the substrate comprising a stressed layer at a selected depth underneath a surface of the substrate, the stressed layer being at the selected depth to define a substrate material to be removed above the selected depth, the stressed layer comprising a deposited layer and an implanted region, the substrate material comprising a device layer;forming a plurality of integrated circuit devices on the substrate material, the forming comprising a thermal treatment process at a temperature greater than about 400 degrees Celsius, while maintaining a substantially microbubble free implanted region in the stressed layer;providing energy to a selected region of the substrate to initiate a controlled cleaving action at the selected depth in the substrate, whereupon the cleaving action is made using a propagating cleave front to free a portion of the material to be removed from the substrate.