Patent ID: 6291263
Filing Date: 2001-09-18
Classification: H01L

Abstract:
A method for fabricating a core-hollowed integrated circuit package, comprising the steps of:preparing a leadframe including a die-bonding area and a wire-bonding area and having a front side and a back side;attaching a tape of a specific size onto the front side of the leadframe to cover the entire die-bonding area and the wire-bonding area;performing a molding process by fixing the leadframe in an encapsulation mold and filling an encapsulation material into all the void portions in the encapsulation mold to thereby form an encapsulation body having a core-hollowed portion;removing the tape to expose the die-bonding area and the wire-bonding area;attaching a semiconductor chip onto the die-bonding area;connecting a set of bonding wires for electrically coupling the semiconductor die to the wire-bonding area of the leadframe; andcovering a lid on the opening of the core-hollowed portion of the encapsulation body.