Patent ID: 9105745
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: providing a semiconductor substrate comprising a semiconductor material; forming a p-type field effect transistor (pFET) disposed upon said semiconductor substrate and comprising a semiconductor channel region comprised of SiGe formed upon or within a surface of said semiconductor substrate; forming a gate dielectric comprising an oxide layer overlying said semiconductor channel region comprised of SiGe and a high dielectric constant (high-k) dielectric layer overlying said oxide layer; and forming a gate electrode overlying said high-k dielectric layer and comprising a lower metal layer abutting said high-k dielectric layer, a scavenging metal layer abutting said lower metal layer, and an upper metal layer abutting said scavenging metal layer, wherein said scavenging metal layer includes a metal (M) for which the Gibbs free energy change of the chemical reaction, in which a silicon atom combines with a metal oxide material including said scavenging metal and oxygen to form said scavenging metal in elemental form and silicon dioxide, is positive; forming an n-type field effect transistor (nFET) to be disposed upon said semiconductor substrate and comprising a semiconductor channel region comprised of Si, where a gate electrode of said nFET also comprises said scavenging metal layer; and performing a high temperature anneal of the semiconductor structure in an oxygen ambient forming a metal oxide of the scavenging metal layer, wherein the scavenging metal layer is more prone to forming a metal oxide than the upper metal layer and the lower metal layer and forms the metal oxide within the scavenging layer by scavenging impurity oxygen atoms that diffuse through the upper metal layer toward the high-k dielectric layer and scavenges oxygen from the oxide layer as oxygen atoms migrate towards the oxide layer from below or from the side of the oxide layer to limit growth of the oxide layer during the high temperature anneal in oxygen ambient.