Patent ID: 8263446
Filing Date: 2012-09-11
Classification: H01L

Abstract:
1. A method for fabricating FET devices, said method comprising: receiving a fin of a semiconductor material, wherein said fin has a first side surface opposite a second side surface; disposing over said fin a high-k dielectric layer followed by a threshold-modifying layer; performing an ion bombardment at a tilted angle, wherein said threshold-modifying layer over said first side surface is receiving said ion bombardment and over said second side surface is not receiving said ion bombardment due to being shadowed by said fin, wherein said ion bombardment removes said threshold-modifying layer over said first side surface; and following said ion bombardment, disposing a gate conductor layer over said fin, whereby said first side surface becomes adapted to host a first FET device and said second side surface becomes adapted to host a second FET device, wherein said first and said second FET device are asymmetric due to said threshold-modifying layer being present only in said second FET device.