Patent ID: 6475898
Filing Date: 2002-11-05
Classification: H01L

Abstract:
A method for forming at least one conductive interconnection in an electronic semiconductor device comprising:forming a layer of insulating material on a substrate of semiconductor material having at least one contact region therein; forming at least one first opening through the layer of insulating material to expose the at least one contact region; filling the at least one first opening with a material to form at least one first connection element; forming a barrier layer comprising a first removable conductive material on the layer of insulating material and on the at least one first connection element; forming a first layer comprising a second removable conductive material on the barrier layer; forming at least one second opening in the first layer to expose the barrier layer above the at least one first connection element, filling the at least one second opening with the material to form at least one second connection element; forming a second layer comprising a third removable conductive material on the first layer; forming at least one third opening in the second layer to expose the at least one second connection element; filling the at least one third opening with the material to form at least one third connection element; removing the second and third removable conductive materials, and removing the first removable conductive material except for a portion underlying the at least one second connection element to expose the layer of insulating material; and filling with dielectric material areas left free after removing the first, second and third removable conductive materials.