Patent ID: 7989911
Filing Date: 2011-08-02
Classification: H01L

Abstract:
1. An integrated circuit comprising: a substrate having first and second high voltage transistor regions and first and second low voltage transistor regions, the substrate including a first trench between and adjacent to the first and second high voltage transistor regions, a second trench between and adjacent to the first and second low voltage transistor regions, and a third trench between the first and second trenches and between and adjacent to the second high voltage transistor region and the second low voltage transistor region, wherein the trenches have openings at the top surface of the substrate; a thicker silicon dioxide layer lining the first trench and a first portion of the third trench adjacent to the second high voltage transistor region, the thicker silicon dioxide layer having rounded corners at the openings of the first trench and the first portion of the third trench; a thinner silicon dioxide layer lining the second trench and a second portion of the third trench adjacent to the second low voltage transistor region; a silicon nitride layer present on the thinner silicon dioxide layer and lining the second trench and the second portion of the third trench but not present on the thicker silicon dioxide layer and not lining the first trench and the first portion of the third trench; and dielectric material filling the first, second, and third trenches.