Patent ID: 6343071
Filing Date: 2002-01-29
Classification: H04L,H04W

Abstract:
A method of transmitting and receiving serial bus data packets between computers, between computers and peripherals, and between peripherals in a broadband, wireless DAN network having multiple nodes, which comprises the steps of:formatting said data packets by a transmitting node to conform with a CSMA/CA multiple access control protocol; inserting data timing information in preambles of said data packets by said transmitting node for synchronizing the transfer of said data packets to a receiving node of said multiple nodes; adding error check information at the end of said data packets by said transmitting node to allow data validation by said receiving node; modulating said data packets by said transmitting node for transmission to said receiving node; transmitting said data packets to said receiving node if said transmitting node detects no transmission signals in a transmission channel of said wireless DAN network, and delaying transmission of said data packets until said transmission channel is idle if said transmitting node detects transmission signals in said transmission channel; upon receipt of said data packets by said receiving node, demodulating said data packets and sampling said data timing information by said receiving node to synchronize a reading of data; detecting said error check information at said receiving node to determine whether an error free transmission of said data packets has occurred, and issuing an acknowledgment signal by said receiving node to said transmitting node in the event of said error free transmission; and retransmitting said data packets by said transmitting node after a delay in time proportional to a network address of said transmitting node if said acknowledgment signal is not received by said transmitting node within a wait time period.