Patent ID: 6063702
Filing Date: 2000-05-16
Classification: H01L

Abstract:
A method of forming a planar dielectric layer over a substrate having an irregular surface having valleys and raised portions, comprising the steps of:a) providing a semiconductor substrate having at least spaced raised portions and a valley therebetween;b) forming an etch stop layer over said raised portions and said semiconductor substrate;c) forming a first dielectric layer over said etch stop layer; the combined thicknesses of said etch stop layer, and said dielectric layer, being sufficient to fill the center of said valley coplanar within plus/minus 5% with the top surface of said etch stop layer over said raised portions; etch forming a reduced size, reverse raised portion mask over said first dielectric layer; said reduced size, reverse raised portion mask covering portions of said valleys between said raised portions; said reduced size, reverse raised portion mask is reduced in area compared to a full sized reversed raised portion mask between about 1 and 4%;d) etching said first dielectric layer using said reduced size reverse raised portion mask as an etch mask forming dielectric stop blocks in said valleys; said etch stop layer must having between about 2 to 20 times slower etch rate than said first dielectric layer;e) removing said reduced size, reverse raised portion mask; andf) forming a second dielectric layer over said etch stop layer and said dielectric stop blocks thereby forming a level planar surface of said second dielectric layer.