Patent ID: 6159792
Filing Date: 2000-12-12
Classification: H01L

Abstract:
A method for forming a capacitor of semiconductor devices, said method comprising the steps of:a) preparing a semiconductor substrate having a gate electrode to which electrical connection to a capacitor is to be made and a protecting oxide layer;b) sequentially forming an etch stop layer and an interlayer insulating layer on an entire surface of said semiconductor substrate;c) patterning the interlayer insulating layer using a sequential two-step etching to form a contact hole, wherein the two-step etching comprises the steps of:(c-1) selectively etching to form the contact hole for exposing the etch stop layer between said gate electrodes, and(c-2) isotopically dry etching to maximize capacitor surface area without cleaning process after said selectively etching, the interlayer insulating layer being patterned in a manner which produces inner interlayer contact sidewalls having standing wave ripples and removes the exposed etch stop layer;d) forming a conductive layer over said interlayer contact sidewalls and the exposed protecting oxide layer and substrate; ande) removing the remained etch stop layer and interlayer insulating layer.