Patent ID: 9153574
Filing Date: 2015-10-06
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a deep doped region of a first conductivity type, comprising a first buried layer and two high-voltage doped regions and disposed in a substrate; a first well region of a second conductivity type, disposed in the deep doped region; a base region of the first conductivity type, disposed in the first well region and not connected to the deep doped region; an insulated gate bipolar transistor (IGBT), disposed on the first well region at a first side of the base region, and comprising a first doped region of the second conductivity type disposed in the base region; and a metal oxide semiconductor (MOS), disposed on the first well region and the deep well region at a second side of the base region, and comprising a second doped region of the second conductivity type disposed in the base region.