Patent ID: 6426242
Filing Date: 2002-07-30
Classification: H01L,Y10S

Abstract:
A method for packaging a chip formed in a semiconductor wafer and having electric contacts on both its surfaces, including the steps of:providing, on a first surface of the wafer, at least one conductive area extending beyond the periphery of the chip to be formed; gluing a first thick plate including an electrically isolating material on the first surface; etching the wafer from its second surface to define chips; depositing at least one conductive track extending from a contact of the second chip surface to the conductive area; covering the second surface with a second thick plate forming a rigid cap with an interposed isolating filling material between the first and second plates; and etching the first plate at least above the at least one conductive area to deposit thereon a conductive material extending, in the form of a track, to the exposed surface of the first plate.