Patent ID: 7685502
Filing Date: 2010-03-23
Classification: H03M

Abstract:
1. A message passing machine intended for use in an LDPC decoder comprising: a first number of processing units of a processor, the processing units operating in parallel to decode a received signal, each processing unit successively receiving messages of a first type and successively providing messages of a second type based on a first processing of the messages of the first type, and receiving messages of the second type, and providing processed messages of the first type based on a second processing of the messages of the second type, the second processing being different from the first processing; a storage unit in a random access memory (RAM) coupled to the processing units, the storage unit stores first words and second words when the first and second words are received by the storage unit from the processing units, wherein each first word comprises messages of the first type in a number equal to said first number, and each second word comprises messages of the second type in a number equal to said first number; wherein a shift control unit coupled to a rearrangement unit in a read-only memory (ROM), the shift control unit being configured to generate first shift control information for the first words and second shift control information for the second words, wherein the shift control unit is configured to provide the first shift control information and the second shift control information to the rearrangement unit; the rearrangement unit configured to, when the rearrangement unit reads at least one of the first words and the second words from the storage unit and receives the first and second shift control information from the shift control unit: wherein the rearrangement unit provides said message of the first type at the position in the first rearranged word which depends on the first shift control information and said message of the second type at a position in the second rearranged word which depends on the second shift control information, or wherein the rearrangement unit writes each message of the first type at a position in the first rearranged word which depends on the first shift control information and each message of the second type at a position in the second rearranged word which depends on the second shift control information.