Patent ID: 9190391
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate comprising a first die, the semiconductor substrate comprising electrical circuitry; a second die attached to the semiconductor substrate, the second die attached to the semiconductor substrate in a face-down orientation, the second die comprising a die attach pad; a third die attached to the second die in a face-up orientation, the third die attached to the die attach pad of the second die, the second die and the third die stacked in direct contact; an overmold molded onto the semiconductor substrate over the second die and the third die; a conductive pillar connected directly to at least one of the electrical circuitry of the semiconductor substrate, or the second die, or the third die, the conductive pillar extending through the overmold, wherein the footprint of the semiconductor device is the same as the footprint of the first die; a redistribution layer formed on the overmold; and a plurality of solder bumps formed on the redistribution layer, at least one of the plurality of solder bumps connected to the conductive pillar via the redistribution layer.