Patent ID: 8612908
Filing Date: 2013-12-17
Classification: G06F

Abstract:
1. A non-transitory, tangible computer-readable medium having recorded thereon instructions to be carried out by a processor to perform, in relation to an electrical circuit design (ECD), the ECD having a defined topology and design variables with fixed design variable values, the ECD also having associated thereto at least one of process, voltage, temperature, parasitics and power settings (PVTPP) variables, the PVTPP variables having associated thereto a total number of PVTPP corners, the ECD also having associated thereto a performance metric, a method of finding the PVTPP corner with the worst-case optimum simulated value of the performance metric, the method comprising: a) selecting a set of PVTPP corners from the total number of PVTPP corners; b) simulating the ECD at the set of PVTPP corners to obtain a set of simulated output values of the performance metric; c) in accordance with the set of PVTPP corners and in accordance with the set of simulated output values of the performance metric, determining if at least one pre-determined stop criterion is met; d) when at least one pre-determined stop criterion is met: e) when a pre-determined stop criterion is not met: f) when a pre-determined stop criterion is met, proceeding to action d; and g) when a pre-determined stop criterion is not met, repeating action e.