Patent ID: 8108732
Filing Date: 2012-01-31
Classification: G06F,H04L

Abstract:
1. A method to minimize performance degradation during communication path failure in a data processing system, comprising: supplying a plurality of host computers, a storage controller comprising a path management function, and a plurality of physical communication paths interconnecting each of said host computers and said storage controller, wherein each host computer comprises a communication path manager, a plurality of channel path identifiers, and a visual display device, wherein for each host computer a communication path manager is in communication with each of said channel path identifiers; establishing a different threshold communication path error rate for each of the host computers; configuring by a communication path manager each physical communication path to comprise up to 256 logical communication pathways; determining by said path management function an actual communication path error rate for each logical communication pathway; operative if an actual communication pathway error rate is greater than an associated threshold communication path error rate: discontinuing by said path management function use of an (i)th physical communication path configured to comprise a logical pathway having an error rate greater than said associated threshold communication path error rate; and displaying by said communication path manager an error message on said visual display device.