Patent ID: 8847399
Filing Date: 2014-09-30
Classification: H01L

Abstract:
1. A semiconductor device, comprising: at least one circuit pattern on a substrate; an insulating interlayer on the substrate, the insulating interlayer covering the circuit pattern and having a via hole therethrough, the via hole being also formed through at least a portion of the substrate; an insulation layer structure on an inner wall of the via hole and on a top surface of the insulating interlayer, wherein the insulation layer structure includes a first insulation layer and a second insulation layer, the first insulation layer being on the inner wall of the via hole, the second insulation layer being on the first insulation layer and the top surface of the insulating interlayer and having a thickness different from that of the first insulation layer, and the first and second insulation layers forming a single continuous layer; a through silicon via (TSV) structure filling a remaining portion of the via hole, the TSV structure having a top surface coplanar with a top surface of the second insulation layer; a buffer layer on the top surfaces of the TSV structure and the insulation layer structure; a conductive structure through the second insulation layer and at least a portion of the insulating interlayer, the conductive structure being electrically connected to the circuit pattern and having a to surface coplanar with the to surface of the TSV structure; and at least one first wiring on the second insulation layer and the TSV structure through the buffer layer, the first wiring being electrically connected to the TSV structure and spaced apart from the insulating interlayer by the second insulation layer.