Patent ID: 6335227
Filing Date: 2002-01-01
Classification: H01L

Abstract:
A semiconductor device fabricating method comprising the steps of:(a) forming a lead frame having a power lead extended along a direction in which bonding pads of a semiconductor chip to be supported on one surface thereof are arranged and having depressed portion depressed toward a major surface of the semiconductor chip, and signal lead having an end part to be spaced apart from the major surface of the semiconductor chip; (b) putting the semiconductor chip on the lead frame with an adhesive layer interposed between the depressed portion of the power lead and the major surface of the semiconductor chip to support the semiconductor chip fixedly on a surface of the lead frame; (c) electrically connecting the power lead and the signal lead of the lead frame to the bonding pads formed on the major surface of the semiconductor chip by a bonding wire; and (d) sealing the semiconductor chip in a package body.