Patent ID: 7816738
Filing Date: 2010-10-19
Classification: H01L

Abstract:
1. An integrated circuit including at least two field effect transistors operating at sub-V th voltages, said at least two field effect transistors comprising: a layer of semiconductor material, a gate structure, a region containing an impurity within said layer of semiconductor material and between but recessed from said gate structure of respective ones of said at least two transistors such that said region forms a source or drain structure for said at least two transistors such that said source or drain structure does not extend under said gate structures and a junction is formed which does not extend under said gate structure, wherein said gate structure and said source or drain structure consist essentially of unalloyed semiconductor material such that extrinsic series resistance of said at least two transistors will be comparable to and not significantly greater than channel resistance of a transistor of said at least two transistors in said layer of semiconductor material when said transistor is operated in a sub-V