Patent ID: 6821832
Filing Date: 2004-11-23
Classification: H01L

Abstract:
A method of fabricating an X-ray detector array, comprising:providing a substrate having a capacitor area and a transistor area; forming a gate line extending transversely on the substrate, wherein the gate line includes a gate electrode in the transistor area; forming a gate insulation layer on the gate line, the gate electrode, and the substrate; forming a semiconducting island on the gate insulation layer in the transistor area; forming a common line and a data line extending longitudinally on the gate insulation layer, and forming a source electrode and a drain electrode on the semiconducting island to form a thin film transistor (TFT) structure, wherein the drain electrode electrically connects the data line; forming a planarization layer on the gate insulation layer, the common line, the TFT structure, the data line, and the gate line; forming a first conductive layer on the planarization layer in the capacitor area; forming a dielectric layer on the first conductive layer and the planarization layer; forming a first via hole and a second via hole penetrating the dielectric layer and the planarization layer, wherein the first via hole exposes a surface of the source electrode, and the second via hole exposes part of a surface of the first conductive layer and part of a surface of the common line; and forming a conformal second conductive layer on the dielectric layer, an interior surrounding surface of the first via hole and an interior surrounding surface of a second via hole.