Patent ID: 6415407
Filing Date: 2002-07-02
Classification: G06F

Abstract:
A debugging device for use in a system controller chip to facilitate a debugging procedure on the system controller chip so as to correctly connect chip signals to integrated circuit (IC) chip leads whenever a malfunction occurs to the system controller chip, the system controller chip having a control unit, a plurality of function blocks, and a connecting-pad area, the connecting-pad area being normally coupled to the control unit and the function blocks being intended to undergo the debugging procedure whenever the malfunction occurs to the system controller chip; the debugging device comprising:a switching unit having a first end connected to the control unit and a second end connected to the connecting-pad area, the switching unit being normally set to ON state so as to connect the connecting-pad area to the control unit under normal operating conditions of the system controller chip; a plurality of test switches each having a first end connected to the connecting-pad area and a second end connected to one of the function blocks, the test switches being normally set to OFF state so as to disconnect the connecting-pad area to the function blocks under normal operating conditions of the system controller chip; and a BIOS unit for generating a switch control signal in response to a malfunction to the system controller chip for controlling the switching unit and the test switches in such a manner as to switch off the switching unit to disconnect the connecting-pad area from the control unit and meanwhile switch on the test switches successively in a predetermined sequence so as to connect the connecting-pad area successively to the function blocks, allowing the function blocks to undergo an on-site debugging procedure one by one.