Patent ID: 6856025
Filing Date: 2005-02-15
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a substrate having a top surface and a bottom surface and a via extending through the substrate; a first electrical conductor formed in the via; a first layer overlying the top surface of the substrate, the first layer including a first conducting pad on a top surface of the layer and a second electrical conductor connecting the first conducting pad and the first electrical conductor; a second conducting pad on the bottom surface of the substrate electrically connected to the first electrical conductor, so that the first conducting pad and the second conducting pad are electrically connected; a second layer overlying the first layer and having a via formed therein exposing the first conducting pad; and a plate having a stud formed thereon, the plate overlying the second layer so that the stud is aligned to the via and makes electrical contact with the first conducting pad.