Patent ID: 7492043
Filing Date: 2009-02-17
Classification: H01L

Abstract:
1. A power module flip chip package comprising: a package carrier having a front surface on one side and a back surface on an opposite side; one or more power vertical metal oxide semiconductor field effect transistors electrically connected to the front surface of the package via a first set of conductive bumps located between the power semiconductor and the front surface of the package carrier, wherein the conductive bumps are electrically connected to a gate terminal, a source terminal, and a drain terminal of the power vertical metal oxide semiconductor field effect transistors; a second set of conductive bumps located on the back side of the carrier and connected to the first set of conductive bumps; a protective material covering the power vertical metal oxide semiconductor field effect transistor(s) and enclosing the power vertical metal oxide semiconductor transistor(s) and the first set of conductive bumps; wherein the power vertical metal oxide semiconductor field effect transistor(s) comprises a conductive housing in electrical contact with the drain and having portions extending away from the drain and terminating in one or more conductive bumps in substantially the same plane as the first set of conductive bumps.