Patent ID: 8569111
Filing Date: 2013-10-29
Classification: H01L

Abstract:
1. A manufacturing method for semiconductor devices comprising the steps of: (a) preparing a first frame having a chip mounting portion, a second frame having a first lead terminal portion, and a first semiconductor chip having a power MOSFET, a first obverse surface, and a first reverse surface opposite to the first obverse surface, first source and gate electrodes of the power MOSFET being formed on the first obverse surface, a drain electrode of the power MOSFET being formed on the first reverse surface; (b) setting the first frame over an assembly jig; (c) setting the first semiconductor chip over the chip mounting portion of the first frame so that a first solder is disposed between the first drain electrode of the first semiconductor chip and the chip mounting portion of the first frame; (d) setting the second frame over the assembly jig so that a second solder is disposed between the first source and gate electrodes of the first semiconductor chip and the first lead terminal portion of the second frame respectively; (e) after the steps (a), (b), (c), and (d), carrying out solder reflow heat treatment with the first and second frames set over the assembly jig to connect the drain electrode of the first semiconductor chip and the chip mounting portion of the first frame through the first solder and to connect the first source and gate electrodes of the first semiconductor chip and the first lead terminal portion of the second frame through the second solder; and (f) after the step (e), using a lower die and an upper die to form an encapsulation resin portion sealing the first semiconductor chip, the chip mounting portion of the first frame, and the first lead terminal portion of the second frame, wherein the lower die includes a first face for setting the chip mounting portion of the first frame and a second face for setting part of the second frame, located in a position adjacent to a cavity formed by the lower die and the upper die and protruded beyond the first face, wherein at the step (f), the chip mounting portion of the first frame is set over the first face of the lower die, part of the second frame is sandwiched between the second face of the lower die and the upper die, and in this state, resin material for the formation of the encapsulation resin portion is injected into the cavity formed by the lower die and the upper die, the encapsulation resin portion being thereby formed, wherein the assembly jig includes a first supporting face over which the chip mounting portion of the first frame is set and a second supporting face for supporting the second frame set over the assembly jig, protruded beyond the first supporting face, wherein a height of the second face relative to the first face in the lower die and a height of the second supporting face relative to the first supporting face in the assembly jig are identical with each other; and wherein a portion of the second frame sandwiched between the second face of the lower die and the upper die at the step (f) is set over the second supporting face of the assembly jig at the step (d).