Patent ID: 6320735
Filing Date: 2001-11-20
Classification: H02H

Abstract:
An electrostatic discharge protection circuit for a protected, high-voltage pad of a semiconductor device to protect its internal circuits from electrostatic discharge, the protected high-voltage pad being designed to receive voltages during the operation of the internal circuits that are greater than a rated voltage of the semiconductor device, the protection circuit comprising:a clamp stage, comprising at least two transistor clamps in a darlington-connected chain between the protected high-voltage pad and a reference conductor, that sinks electrostatic charge from the protected high-voltage pad to the reference conductor and away from the internal circuits;a control stage that activates the clamp stage to couple electrostatic charge from the protected high-voltage pad and deactivates the clamp stage when the internal circuits are operational by reference to a control signal, which is derived from a reference pad.