Patent ID: 9130039
Filing Date: 2015-09-08
Classification: H01L

Abstract:
1. A semiconductor device provided with a MISFET, comprising: a substrate having a support substrate, an insulating layer on the support substrate and a first semiconductor layer on the insulating layer; a gate electrode of the MISFET, formed on the first semiconductor layer via a gate insulating film; a first sidewall insulating film formed on a sidewall of the gate electrode; an epitaxial semiconductor layer for source/drain of the MISFET, formed on the first semiconductor layer; a second sidewall insulating film formed on a sidewall of the epitaxial semiconductor layer; and an element isolation region which is formed in the substrate and penetrates through the first semiconductor layer and the insulating layer and whose bottom portion reaches the support substrate, wherein a compound layer between metal and an element constituting the epitaxial semiconductor layer is formed on an upper portion of the epitaxial semiconductor layer, and wherein the second sidewall insulating film is formed on the sidewall of the epitaxial semiconductor layer, is positioned on the element isolation region, and covers a side surface of the first semiconductor layer.