Patent ID: 6120641
Filing Date: 2000-09-19
Classification: H01L

Abstract:
A manufacturing tool configuration for applying one or more levels of interconnect metallization to a generally planar dielectric surface of a workpiece, the tool configuration comprising:a film deposition tool set for depositing a barrier layer exterior to the planar dielectric surface and for depositing a seed layer exterior to the barrier layer;a hard mask formation tool set for forming a hard mask dielectric layer exterior to the seed layer;a pattern processing tool set for providing an interconnect line pattern over the hard mask dielectric layer and for providing a post pattern over interconnect line metallization formed using the interconnect line pattern;a hard mask etching tool set for etching exposed regions of the hard mask dielectric layer after formation of the interconnect line pattern thereover;a wet processing tool set for performing at least the following wet processing operations,applying copper metallization, using an electrochemical deposition process, into the interconnect line pattern defined in the hard mask and the post pattern defined by the pattern material used by the pattern processing tool set,removing material applied by the pattern processing tool set to form the interconnect line pattern and the post pattern,removing the hard mask dielectric layer,removing portions of the seed layer and the barrier layer that are not overlied by interconnect line metallization; anda dielectric processing tool set for depositing a dielectric layer over the interconnect line metallization and post metallization and for etching the deposited dielectric layer to expose upper connection regions of the post metallization;a single metallization level comprising the interconnect line metallization, the post metallization, and the dielectric layer being formed using no more than twelve workpiece movements between the tool sets.