Patent ID: 7365569
Filing Date: 2008-04-29
Classification: H03K

Abstract:
1. An apparatus comprising: a first transistor having a drain, a source, and a gate; a second transistor having a drain, a source, and a gate, the first and second transistors to receive a pair of differential signals; a third transistor having a drain, a source, and a gate, the drain of the third transistor directly coupled to the source of the first transistor, the source of the third transistor directly coupled to the source of the second transistor, wherein the gate of the third transistor is driven by a level-shifted version of an output voltage generated from the pair of differential signals; a first inverter having an input and an output, the input coupled to the drain of the second transistor and the output coupled to the gate of the third transistor to shift down the output voltage to drive the third transistor; a first bias transistor having a drain, a source, and a gate, the source of the first bias transistor coupled to the drain of the first transistor; and a second bias transistor having a drain, a source, and a gate, the source of the second bias transistor coupled to the drain of the second transistor.