Patent ID: 8195975
Filing Date: 2012-06-05
Classification: G06F,Y02D

Abstract:
1. A semiconductor integrated circuit device comprising: a plurality of operation units connected in a pipeline structure, each performing an operation processing on data; a process control unit that operates in synchronization with a system clock signal and generates a process control signal for controlling the operation units upon receiving a data notification signal that notifies an arrival of data from outside; and a clock-control signal generating unit that operates in synchronization with the system clock signal and generates a clock control signal for controlling a clock supply to each of the operation units upon receiving the process control signal, wherein each of the operation units includes wherein the clock control signal includes a first clock control signal and a second clock control signal, the first clock control signal indicates to perform the clock supply when the process control signal indicates an execution of a processing, and otherwise, not to perform the clock supply, the second clock control signal indicates to perform the clock supply when the process control signal indicates an execution of a processing and a content of the processing is different from a content of a previously executed processing, and indicates not to perform the clock supply when the process control signal indicates an execution of a processing, a content of the processing is same as a content of a previously executed processing, and the process control signal does not indicate an execution of a processing.