Patent ID: 7015084
Filing Date: 2006-03-21
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure in a field effect transistor, comprising the steps of: selectively forming a resist pattern over a first selected region of a semiconductor layer; carrying out a selective impurity-implantation by use of said resist pattern as a mask for selectively implanting an impurity into said semiconductor layer except under said resist pattern at a first implanted-impurity concentration, to define at least an impurity-implanted region in said semiconductor layer; removing said resist pattern from said semiconductor layer; selectively forming a gate electrode over a second selected region of said semiconductor layer, and said second selected region completely encompassing said first selected region and also encompassing an outside region adjacent to a periphery of said first selected region, and at least a gate-overlapped part of said at least an impurity-implanted region being covered by said gate electrode, while a remaining non-overlapped part of said at least an impurity-implanted region being not covered by said gate electrode; and carrying out a selective laser beam irradiation to said remaining non-overlapped part by use of said gate electrode as a mask, whereby said remaining non-overlapped part is sufficiently activated upon said selective laser beam irradiation and said remaining non-overlapped part becomes at least a sufficiently activated high impurity concentration layer, while said at least a gate-overlapped part is insufficiently activated by a thermal diffusion from said remaining non-overlapped part, and said at least a gate-overlapped part becomes at least a lightly activated high impurity concentration layer.