Patent ID: 6119219
Filing Date: 2000-09-12
Classification: G06F

Abstract:
A method for system serialization of a multiprocessor system which executes a simple instruction set in a hardware controlled execution units and executes a complex instruction set in a Licensed Internal Code (LIC) architected state with a LIC sequence in the hardware controlled execution units, said system having a plurality of processors each of which executes instructions from said simple instruction set from said complex instruction set in a Licensed Internal Code (LIC) architected state with a LIC sequence in a hardware controlled execution unit, and wherein said method for system serialization includes the steps of: each of said processors generating and responding to system quiesce requests and requests to perform updates of global resources, and wherein during processing said system quiesce requests and said requests to perform updates are buffered in one or more of said plurality of processors, and a system operation control, using a storage controller and a system serialization controller, directs said updates of global resources, and said system operation control includes storage for Licensed Internal Code (LIC) sequences which allow global resource update operations to co-exist with other operations which require system quiescing for all processors to pause together, and to allow for CPU retry actions on any of the CPUs in the system at any point in the operation.