Patent ID: 6590459
Filing Date: 2003-07-08
Classification: H03L

Abstract:
A phase lock circuit comprising a phase frequency comparator having a first input for a reference signal and a second input for a feedback signal, as well as outputs for furnishing an up-signal or a down-signal to a control charge pump circuit, which control charge pump circuit is connected with the outputs of the phase frequency comparator and has an output which is connected via a loop filter with a voltage-controlled oscillator provided with tuning means, the output of the oscillator being connected via a frequency divider with said second input of the phase frequency comparator, characterized in that for furnishing a tuning voltage for the tuning means a voltage charge pump circuit is provided, which is combined with the control charge pump circuit to form a combined charge pump circuit connected with the output of the phase frequency comparator, and further characterized in that the combined charge pump circuit comprises two transistor elements each operatively controlled by a clock signal in combination with the up-signal, which transistor elements are alternately connected with successive capacitors of the charge pump circuit, and a third transistor element is provided which is connected between the output of the charge pump circuit and earth and which is operatively controlled by the down-signal.