Patent ID: 6519303
Filing Date: 2003-02-11
Classification: H04L

Abstract:
A clock recovery circuit, CHARACTERIZED BYphase rotation means for phase-rotating a PSK modulated signal by a predetermined angle depending on the transition angles of two adjoining reception points so that an in-phase component signal or a quadrature component signal of said phase-rotated PSK modulated signal intersects a zero level during a transition process of said two adjoining reception points; phase error detection means for detecting a phase error due to a time difference between a zero cross point where an in-phase component signal or a quadrature component signal of said phase-rotated PSK modulated signal intersects the zero level and the midpoint in time for said adjoining reception points; and correction means for correcting a sampling location for the adjoining reception points of said PSK modulated signal on the basis of said detected phase error to allow sampling to be executed at an eye aperture point.