Patent ID: 7700479
Filing Date: 2010-04-20
Classification: H01L

Abstract:
1. A method for fabricating an integrated circuit, the method comprising: providing a substrate; forming a low-k dielectric layer over the substrate; etching the low-k dielectric layer to form an opening in the low-k dielectric layer, wherein an underlying metal is exposed through the opening; performing an in-situ plasma treatment in a same chamber as the step of etching the low-k dielectric layer to remove polymers formed within the opening in the low-k dielectric layer, wherein the in-situ plasma treatment is performed after the etching; performing a remote plasma treatment to the low-k dielectric layer, wherein a plasma used for the remote plasma treatment is generated from a plasma generator separated from a chamber in which the substrate is located during the remote plasma treatment, the performing the remote plasma treatment being performed after the performing the in-situ plasma treatment; forming a diffusion barrier layer in the opening; and filling the opening with a conductive material.