Patent ID: 9214403
Filing Date: 2015-12-15
Classification: H01L,H05K

Abstract:
1. A stacked semiconductor package comprising: a first printed circuit board including a first surface upon which a first semiconductor chip is mounted and a second surface upon which at least one connecting structure is attached, the first printed circuit board further including a heat sink, the heat sink being disposed under the first semiconductor chip, wherein the first semiconductor chip and the first printed circuit board are electrically connected; a second printed circuit board including a third surface upon which a second semiconductor chip is mounted, the second printed circuit board being disposed under the first printed circuit board, the at least one connecting structure connecting the first printed circuit board to the second printed circuit board; and a heat diffusion material between the heat sink of the first printed circuit board and the second semiconductor chip of the second printed circuit board, wherein the second surface of the first printed circuit board has a recess.