Patent ID: 8071427
Filing Date: 2011-12-06
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor component, comprising: providing one or more electrical interconnect structures partially embedded in a mold compound, the one or more electrical interconnect structures having first and second major surfaces and a plurality of edges coupling the first major surface to the second major surface; exposing a portion of a first edge of the plurality of edges of at least one of the one or more electrical interconnect structures; forming a first material over a sub-portion of the exposed portion of the first edge; providing a leadframe having a tie bar with first and second leadframe leads extending from opposing sides of the tie bar; forming a wirebond from the first leadframe lead to the second leadframe lead, and separating the mold compound into at least two portions, wherein the separating includes cutting and separating the wirebond.