Patent ID: 7492643
Filing Date: 2009-02-17
Classification: G11C,H01L

Abstract:
1. A nonvolatile semiconductor memory comprising: a NAND string which has memory cells connected in series; a first select gate transistor which is connected to one end of the NAND string; and an internal circuit which writes data to produce a first threshold distribution in a memory cell in said NAND string next to the first select gate transistor by use of a first mode, and to produce a second threshold distribution in a memory cell located at the middle of the NAND string by use of a second mode different from the first mode, said NAND string, after writing said data, having said memory cell with said first threshold distribution and said memory cell located at the middle of the NAND string with said second threshold distribution, the first threshold distribution having a width narrower than a width of the second threshold distribution.