Patent ID: 6455374
Filing Date: 2002-09-24
Classification: H01L

Abstract:
A method of manufacturing a flash memory device method, comprising the steps of:forming a device isolation film in a semiconductor substrate in which a cell region and a peripheral circuit region are defined; sequentially forming a tunnel oxide film and a first polysilicon layer on the entire surface of said semiconductor substrate; removing said first polysilicon layer and said tunnel oxide film to expose said device isolation film in the cell region; forming a dielectric film on the entire surface including said first polysilicon layer; forming an amorphous silicon layer on the entire surface including said dielectric film; etching said amorphous silicon layer to an extent that said dielectric film is not exposed; removing said amorphous silicon layer, said dielectric film and said first polysilicon layer in the peripheral circuit region; forming a gate oxide film in the peripheral circuit region; forming a second polysilicon layer on the entire structure including said gate oxide film; removing said second polysilicon layer in the cell region to expose said amorphous silicon layer in the cell region and said second polysilicon layer in the peripheral circuit region; forming a top polysilicon layer on the entire structure including the exposed amorphous silicon layer and said second exposed polysilicon layer; and forming a metal-silicide layer on said top polysilicon layer.