Patent ID: 6604216
Filing Date: 2003-08-05
Classification: H03M,H04L

Abstract:
A transmitter for transmitting a digital data block to a receiver, said transmitter comprising:a coding circuit for coding the digital data block and generating a mother code word; a reordering circuit for reordering the mother code word and generating a reordered mother code word, wherein the reordered mother code word is generated based on an ordering vector, the ordering vector defining an order in which bits forming the reordered mother code word are to be modulated and forwarded to a receiver; and a modulating circuit for modulating at least one subsequence and for forwarding, to the receiver, the at least one modulated subsequence, each of the at least one modulated subsequence having a desired number of bits taken from the reordered mother code word to fill the available bandwidth of at least one available gross rate channel.