Patent ID: 8207972
Filing Date: 2012-06-26
Classification: G06T

Abstract:
1. A three-dimensional (3D) graphics pipeline comprising: an interleaved multi-threading processor with a plurality of individual processing threads, the processor including: a vertex processing stage comprising a first individual processing thread of the interleaved multi-threading processor and operable to output vertex information for a 3D graphics image; a display sub-dividing stage operable to divide pixels in a display area, having the output vertex information superimposed, into sub-screens, the sub-screens forming a sub-screen task list; and a pixel rendering stage comprising at least a second individual processing thread of the interleaved multi-threading processor different than the first individual processing thread and at least a third individual processing thread of the interleaved multi-threading processor different than the first individual processing thread and the second individual processing thread, wherein the pixel rendering stage is configured to execute, in parallel and independently, a first instruction set of a sub-screen task of the sub-screen task list using the second individual processing thread and a second instruction set of the sub-screen task of the sub-screen task list using the third individual processing thread.