Patent ID: 6339622
Filing Date: 2002-01-15
Classification: G09G,H04L

Abstract:
A data transmission device, comprising:a decoder converting a first binary data to a ternary data; a ternary data generator coupled to the decoder and generating one pair of logic levels corresponding to the ternary data, a power source voltage, an intermediate voltage, and a ground voltage, the intermediate voltage having a voltage level between the power source voltage and the ground voltage; a ternary data detector coupled to the ternary data generator and converting the one pair of logic levels from the ternary data generator to pairs of second binary data, wherein the ternary data detector comprises first and second inverters, each inverter comprising a PMOS and a NMOS, wherein a channel width/length ratio of the PMOS is different than a channel width/length ratio of the NMOS; and an encoder coupled to the ternary data detector and restoring the pairs of second binary data to the first binary data.