Patent ID: 8563973
Filing Date: 2013-10-22
Classification: G11C,H01L

Abstract:
1. A semiconductor device including a memory cell, the memory cell comprising: a first transistor; a second transistor electrically connected to the first transistor; and a capacitor, wherein the first transistor is a p-channel type transistor and comprises a first gate electrode, a first source electrode, a first drain electrode, and a first channel formation region, wherein the second transistor comprises a second gate electrode, a second source electrode, a second drain electrode, and a second channel formation region comprising an oxide semiconductor, wherein the first gate electrode, one electrode of the capacitor and one of the second source electrode and the second drain electrode are electrically connected to one another and form a node where an electric charge is held, and wherein the one electrode of the capacitor is the one of the second source electrode and the second drain electrode.