Patent ID: 6255715
Filing Date: 2001-07-03
Classification: H01L,Y10S

Abstract:
A moisture barrier guard ring structure for an integrated circuit on a substrate; said substrate having a fuse window area and device areas; comprising:a) an isolation region over a substrate having fuse window area; said isolation region covering at least said fuse window area;b) a fuse structure over said isolation regions and across said fuse window area;c) an interlevel dielectric layer over said fuse, isolation region; and said substrate;d) a first annular ring over said isolation region surrounding said fuse window area and over said fuse structure;e) a first conductive wiring line over said first annular ring;f) an inter metal dielectric layer over said interlevel dielectric layer and said first conductive wiring line;g) a second annular ring through said inter metal dielectric layer on said first conductive wiring line;h) a second conductive wiring line over said second annular ring;i) a passivation layer over said second conductive wiring line and said inter metal dielectric layer;j) a fuse window through said passivation layer and partially through said inter metal dielectric layer over said fuse window area whereby a moisture proof guard ring structure is comprised of said first annular ring, said first conductive wiring line, said second annular ring, said second conductive wiring line; said moisture proof guard ring structure surrounding said fuse window area.