Patent ID: 8878205
Filing Date: 2014-11-04
Classification: H01L

Abstract:
1. A wafer-level packaging assembly for light emitting diodes (LEDs), comprising: a patterned substrate comprising a plurality of individual mounting units, wherein individual mounting units comprise a wirebond region, a first via at the wirebond region, an LED attachment site, and a second via at the LED attachment site; an alignment substrate attached to the patterned substrate, the alignment substrate comprising a plurality of individual alignment units aligned with corresponding mounting units of the patterned substrate, and wherein the individual alignment units have a cavity exposing at least a portion of individual LED attachment sites and individual wirebond regions; a plurality of LEDs, wherein at least one LED is positioned in each cavity, and wherein each LED has a first electric lead wirebonded to a corresponding first via in a wirebond region and a second electric lead surface mounted to a corresponding second via at an LED attachment site.