Patent ID: 9009561
Filing Date: 2015-04-14
Classification: G06F,H03M

Abstract:
1. A computer-implemented method for embedding error code values into data samples streamed from a first hardware unit to a second hardware unit, the method comprising: receiving an M bit data sample from a software application executing on the first hardware unit, M being an integer; generating an N bit error code value by performing an error analysis on the M bit data sample, N being an integer; generating an M+N bit augmented data sample by combining the M bit data sample with the N bit error code value; and generating an M+N bit data stream for the second hardware unit, wherein the second hardware unit is configured to receive the M+N bit augmented data sample via the M+N bit data stream, reproduce the M bit data sample and the N bit error code value based on the M+N bit augmented data sample, identify errors in the M bit data sample based on the N bit error code value, and terminate output of the M bit data sample when one or more errors in the M bit data sample are identified.