Patent ID: 6111429
Filing Date: 2000-08-29
Classification: H03K

Abstract:
A circuit for shifting the voltage level of a digital signal, comprising:first pair of transistors of a first polarity connected to a high-voltage line;a second pair of transistors of a second polarity connected to a ground line, said first and said second pairs of transistors being connected to each other by the drain terminals of the respective transistors, an input voltage being applied to the gate terminal of a first one of said second pair of transistors;a secondary circuit for leveling the gate voltages of the transistors of said first and said second pairs of transistors, said secondary circuit is connected between the drain terminals of said first and said second pairs of transistors and limits the gate-source voltage value of said first pair of transistors to a value which is independent of the voltage value of said high-voltage line so as to prevent damage to said first pair of transistors, two reference voltages are applied to said secondary circuit; andan output stage, whose output is a voltage which is shifted in level with respect to said input voltage, wherein said output stage is a complementary output stage comprising a third pair of transistors and a fourth pair of transistors that are of said first and second polarities, respectively, and connected to said high-voltage line and to said around line, respectively, said output stage not being directly connected to either of said two reference voltages.