Patent ID: 8331801
Filing Date: 2012-12-11
Classification: H04B

Abstract:
1. A dual rate receiving device, applicable to an optical transceiver module, comprising a dual rate optical receiving component, a channel switching circuit, a low-speed limiting amplifier data path, and a high-speed limiting amplifier data path, wherein the dual rate optical receiving component further comprises a photodetector and a dual rate trans-impedance amplifier, the channel switching circuit further comprises a first controllable switch, a second controllable switch, a third controllable switch, and a fourth controllable switch, the low-speed limiting amplifier data path further comprises a low-speed limiting amplifier, and the high-speed limiting amplifier data path further comprises a high-speed limiting amplifier, wherein an output end of the photodetector is connected with an input end of the dual rate trans-impedance amplifier for converting a received optical signal into a photocurrent and sending the photocurrent to the dual rate trans-impedance amplifier; an output end of the dual rate trans-impedance amplifier is connected with an input end of the first controllable switch, an input end of the second controllable switch, an input end of the third controllable switch, and an input end of the fourth controllable switch respectively for generating a differential data signal, a data positive end of the differential data signal is connected with the input end of the first controllable switch and the input end of the second controllable switch respectively, and a data negative end of the differential data signal is connected with the input end of the third controllable switch and the input end of the fourth controllable switch respectively; an output end of the first controllable switch is connected with a data positive input end of the low-speed limiting amplifier; an output end of the second controllable switch is connected with a data positive input end of the high-speed limiting amplifier; an output end of the third controllable switch is connected with a data negative input end of the low-speed limiting amplifier; an output end of the fourth controllable switch is connected with a data negative input end of the high-speed limiting amplifier; an output end of the low-speed limiting amplifier and an output end of the high-speed limiting amplifier are respectively connected with a system host for amplifying respectively received differential data signals and then respectively sending the signals to the system host; and a control end of the first controllable switch, a control end of the second controllable switch, a control end of the third controllable switch, and a control end of the fourth controllable switch are respectively connected with the system host for acquiring a rate selection control signal from the system host, so as to control switch-on or switch-off of the first controllable switch, the second controllable switch, the third controllable switch, and the fourth controllable switch.