Patent ID: 6255673
Filing Date: 2001-07-03
Classification: H01L

Abstract:
A hetero-junction field effect transistor comprising:(a) a buffer layer formed on a substrate;(b) a channel layer formed on said buffer layer and composed of a first semiconductor containing n-type impurity therein at least partially in a thickness-wise direction thereof;(c) a schottky layer formed on said channel layer and composed of a second semiconductor including a forbidden band having a greater width than a width of a forbidden band of said first semiconductor;(d) an electron donating layer formed on a surface of said schottky layer and having a smaller electron affinity than that of said channel layer;(e) a contact layer formed on said electron donating layer and composed of one of said first semiconductor and a third semiconductor including a forbidden band having smaller width than a width of a forbidden band of said first semiconductor, said contact layer containing n-type impurity therein,both said electron donating layer and said contact layer having a recess formed therein;(f) a gate electrode formed on said surface of said schottky layer in said recess formed in said electron donating layer and said contact layer; and(g) source and drain electrodes formed on said contact layer so that said gate electrode is located between said source and drain electrodes.