Patent ID: 7795100
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A manufacture method for a semiconductor device comprising the steps of: (a) forming an isolation trench in a semiconductor substrate, said isolation trench defining an active region and having a portion with an aspect ratio of 1 or larger; (b) embedding an insulator in said isolation trench to form an isolation region; (c) forming a gate electrode above said active region, with a gate insulating film being interposed therebetween; (d) forming side wall spacers on side walls of said gate electrode; (e) implanting phosphorus ions into said active region at a high impurity concentration by using said isolation region, said gate electrode and said side wall spacers as a mask, to form high concentration source/drain regions; (f) after said step (e), forming a salicide block layer on a whole surface of said semiconductor substrate at a temperature of 500° C. or lower; (g) patterning said salicide block layer to cover a portion of said high concentration source/drain regions with said salicide block layer; and (h) depositing a metal layer on said patterned salicide block layer and selectively forming a metal silicide layer by using said salicide block layer as a mask.