Patent ID: 8509372
Filing Date: 2013-08-13
Classification: H03L

Abstract:
1. A multi-band clock generator, comprising: a phase-locked loop (PLL) integrated circuit responsive to first and second clock signals, said PLL integrated circuit having a multi-band voltage-controlled oscillator (VCO) therein responsive to a multi-bit control word that selects a frequency sub-band of the VCO; and an adaptive frequency calibration (AFC) circuit responsive to the first and second clock signals, said AFC circuit configured to look-up an estimate of a target multi-bit control word, which is derived from a previously-determined control word having a value associated with a frequency lock of the multi-band clock generator and stored in a programmable device, during an operation to lock an output clock signal generated by the VCO to a frequency sub-band associated with the target multi-bit control word.