Patent ID: 8356134
Filing Date: 2013-01-15
Classification: G06F

Abstract:
1. A memory device, comprising: a nonvolatile memory including a storage area and a buffer, wherein the storage area includes a plurality of memory blocks each comprising a plurality of nonvolatile memory cells, the buffer includes a plurality of nonvolatile memory cells, the buffer is configured to temporarily store data, and data in the nonvolatile memory is erased by each block; and a controller configured to receive first and second commands from an outside of the memory device, wherein the first command designates that a data block is to be written to the buffer, the second command designates that a plurality of data blocks is to be written to the storage area, the controller is configured to write the data block to the buffer in response to the first command, the controller is configured to receive the data block from the outside of the memory device after receiving the first command; the controller is configured to write the plurality of data blocks to the storage area in response to the second command, the controller is configured to receive a first data block of the plurality of data blocks from the outside of the memory device after receiving the second command; the controller is configured to output a busy signal to the outside of the memory device after receiving the first data block; and the controller is configured to receive a second data block of the plurality of data blocks from the outside of the memory device after outputting the busy signal.