Patent ID: 8397024
Filing Date: 2013-03-12
Classification: G06F,G11C

Abstract:
1. A method for operating a memory device, comprising: receiving at least one page of data and a first address at the memory device, from an external host which is external to the memory device, the memory device comprises a memory array of storage elements on a die, and the storage elements are arranged in strings which are in communication with bit lines; storing the at least one page of data in a data cache on the die; storing the at least one page of data in a page buffer on the die by transferring the at least one page of data from the data cache to the page buffer, the page buffer is connected to the bit lines, and the page buffer and the data cache are part of column control circuitry on the die; attempting to write the at least one page of data from the page buffer to the memory array at a location specified by the first address; determining that the attempt to write the at least one page of data was unsuccessful; informing the external host that the attempt to write the at least one page of data was unsuccessful; receiving a second address at the memory device, from the external host; and attempting to write the at least one page of data from the page buffer to the memory array at a location specified by the second address, without the external host re-sending the at least one page of data to the memory device.