Patent ID: 7368753
Filing Date: 2008-05-06
Classification: G02F,H01L

Abstract:
1. A method of fabricating a thin film transistor array substrate, comprising the steps of: forming a first conductive pattern group on a substrate including at least one gate electrode of a thin film transistor, at least one gate line connected to the gate electrode, a common line and a plurality of common electrodes extending in opposing directions from the common line, the common line formed across a pixel area in a direction parallel to the gate line; forming a second conductive pattern group on the substrate including source and drain electrodes of the thin film transistor, and at least one data line crossing the gate line adjacent to the pixel area; and forming at least one pixel electrode connected to the drain electrode in the pixel area, the pixel electrode including a horizontal pixel electrode portion overlapping the common line and a plurality of vertical pixel electrode potions extending in opposing directions from the horizontal pixel electrode portion, wherein the pixel electrode is connected to the drain electrode through a contact hole formed at the horizontal pixel electrode portion.