Patent ID: 9024388
Filing Date: 2015-05-05
Classification: H01L

Abstract:
1. A method of forming replacement gate structures for an NMOS transistor and a PMOS transistor, comprising: performing at least one etching process to remove a sacrificial gate structure for said NMOS transistor and a sacrificial gate structure for said PMOS transistor to thereby define an NMOS gate cavity and a PMOS gate cavity; depositing a gate insulation layer in said NMOS gate cavity and in said PMOS gate cavity; depositing a first metal layer on said gate insulation layer in said NMOS gate cavity and in said PMOS gate cavity; performing at least one process operation to selectively form a metal-silicide material layer only on said first metal layer within said NMOS gate cavity but not on said first metal layer within said PMOS gate cavity; and forming gate cap layers within said NMOS and PMOS gate cavities.