Patent ID: 6136517
Filing Date: 2000-10-24
Classification: G03F

Abstract:
A method of photo creation of an integrated circuit pattern on a semiconductor substrate employing a reticle pattern having a plurality of discrete image fields, each image field corresponding to a portion of the integrated circuit pattern to be formed on the substrate, wherein at least one of the discrete image fields includes plural subfields separated by dicing lanes corresponding to a division between corner portions of four adjacent separate integrated circuit chips having the same integrated circuit pattern to be formed on the semiconductor substrate, the method comprising:exposing a first portion of the semiconductor substrate with one of said discrete image fields to create a first integrated circuit section;repeating said exposing a plurality of times for additional portions of the substrate including exposing portions of the substrate with each of said plurality of image fields, wherein any subfields of an image field are simultaneously exposed, wherein at least one of said image fields is exposed on said substrate a plurality of times, and wherein the complete integrated circuit pattern along with the dicing lanes defining the boundary of the integrated circuit is exposed on the substrate.