Patent ID: 6446228
Filing Date: 2002-09-03
Classification: G01R

Abstract:
A semiconductor integrated circuit testing apparatus for testing a plurality of semiconductor integrated circuits each of which includes a memory portion and a logic portion, comprising:a semiconductor integrated circuit tester having a predetermined number of channels for supplying test signals; IC sockets the number of which is determined depending on the number of semiconductor integrated circuits that can be simultaneously tested in a memory test of the memory portion; and a switching circuit connected between said IC sockets and said semiconductor integrated circuit tester, said switching circuit switching between a first state in which memory test signals for testing the memory portions of the semiconductor integrated circuits under test are simultaneously supplied to all of said IC sockets and a second state in which logic test signals for a logic test of the memory and logic portions of the semiconductor integrated circuits under test are supplied to a part of said IC sockets and thereafter supplied to another part of said IC sockets one after another in sequence.