Patent ID: 8338718
Filing Date: 2012-12-25
Classification: H01L,H05K,Y10T

Abstract:
1. A wiring board having a structure in which a plurality of wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the plurality of the wiring layers are connected to each other through vias formed in the insulating layers, the wiring board comprising: a first pad which is arranged in a peripheral region around an electronic component mounting area of an outermost insulating layer on one of both surfaces of the wiring board, which is connected to a corresponding one of the vias that are formed on inner wall surfaces of corresponding via holes, and which is formed in a bump shape to cover a surface of a portion of the outermost insulating layer, the portion being formed to protrude; a second pad which is arranged in the electronic component mounting area, which is connected to a corresponding one of the vias which are made of metal and filled in corresponding via holes, and a surface of which is exposed from the outermost insulating layer; and an insulating layer underlying the outermost insulating layer, which is filled in the via holes with the vias connecting to the first pad; wherein the second pad is formed in a bump shape to cover a surface of a portion of the outermost insulating layer, the portion being formed to protrude, the second pad is formed in such a manner that the apex of the surface thereof is positioned lower than a position of the apex of the surface of the first pad; and the first pad and the second pad are on a same outer surface of the outermost insulating layer, which lies at a single level.