Patent ID: 6127898
Filing Date: 2000-10-03
Classification: H03K

Abstract:
A ring oscillator having CMOS technology, comprising:a first inverter logic gate;a delay circuit having a resistor series-connected to an output of the first inverter logic gate and a capacitor parallel-connected to the output of the first inverter logic gate;a threshold amplifier coupled to a node formed by the resistor and capacitor of the delay circuit, the threshold amplifier comprising,an inverter stage comprising an upper arm having P MOS transistors and a lower arm having N MOS transistors, an output of the inverter stage, is defined by a midpoint between the two arms,a threshold fixing stage fixing a voltage rise threshold and a voltage drop threshold of an input voltage to the threshold amplifier comprising,a first P type MOS transistor connected between a ground and a midpoint of the upper arm, setting the voltage drop threshold, anda second N type MOS transistor connected between a supply voltage and a midpoint of the lower arm, setting the voltage rise threshold, andmeans for controlling a bias of each gate of said first P type and second N type MOS transistors, resulting in an increased ratio of the voltage drop threshold to a level of the supply voltage and a decreased ratio of the voltage rise threshold to the level of the supply voltage when the level of the supply voltage falls; anda second inverter logic gate having an input connected to the output of the inverter stage, and having an output connected to an input of the first inverter logic gate.