Patent ID: 6469534
Filing Date: 2002-10-22
Classification: G01R

Abstract:
A semiconductor integrated circuit device comprising:a first semiconductor integrated circuit; a second semiconductor integrated circuit; and an I/O circuit connected to an external terminal, wherein the I/O circuit receives an internal signal, which is sent from the first semiconductor integrated circuit to the second semiconductor integrated circuit, and outputs the internal signal to outside through the external terminal and also as an input to the second semiconductor integrated circuit, wherein the I/O circuit comprises: a first buffer to which the internal signal is input; and a second buffer connected to a signal line which connects an output of the first buffer to the external terminal, wherein the first buffer includes an enable terminal, and a conductive state and a nonconductive stat of the first buffer are controlled according to an enable signal received by the enable terminal, wherein the second buffer receives at least one of the internal signal and an input signal from the external terminal and outputs the internal signal or the input signal as an input to the second semiconductor integrated circuit, and a current characteristic test circuit testing a current characteristic of the first buffer, wherein the current characteristic test circuit comprises: an current-characteristic-test-mode setting terminal TS; a current characteristic-test-mode input terminal TA; a current-characteristic-test-mode enable terminal TE; a normal mode input terminal A; a normal mode enable terminal E; an input signal selection circuit which selects an input from the terminal TA and an input from the terminal A according to an input from the terminal TS; and an enable signal selection circuit which selects an input from the terminal TE and an input from the terminal E according to an input from the terminal TS, wherein a signal line of the internal signal output from the first semiconductor integrated circuit is connected to the terminal A, and an output of the input signal selection circuit is connected to an input of the first buffer, and wherein an output of the enable signal selection circuit is connected to the enable terminal of the first buffer, so that the internal signal is output to outside through the external terminal and is output as an input to the second semiconductor integrated circuit.