Patent ID: 6133596
Filing Date: 2000-10-17
Classification: H01L

Abstract:
A charge transfer structure, comprising:a substrate comprised of semiconductor material and, coupled to a surface of said substrate;a plurality of serially coupled devices each having a gate terminal and comprising a first single port device (D1) defining a first primary charge storage well, a second single port device (D3) defining a second primary charge storage well, a first two port device (D2) defining a first transfer device, a second two port device (D4) defining a second transfer device, and two instances of a third two port device each defining a cascode device (CD), said ports of said devices being serially coupled together in an order given by D1, D2, CD, D3, D4, CD for transferring charge between said first and second primary charge storage wells; whereincharge is inserted into and withdrawn from each of said first and second primary charge storage wells through a single diffusion that functions as both an input port and an output port.