Patent ID: 7196726
Filing Date: 2007-03-27
Classification: H04N

Abstract:
1. A CMOS sensor circuit comprising: a photodiode; a reset transistor resetting said photodiode to an initial voltage; a voltage control circuit generating a reset signal in response to a reset control signal, the reset signal controlling a gate potential of said reset transistor to a potential other than power source potentials, wherein said voltage control circuit comprises an inverter circuit driving a gate of said reset transistor, the inverter circuit including a first P-channel MOS transistor having a gate supplied with a first reset control signal, an N-channel MOS transistor having a gate supplied with a second reset control signal, and a transistor provided between a drain of said first P-channel MOS transistor and a drain of said N-channel MOS transistor to control a blooming of the CMOS sensor circuit; and a delay circuit producing said first reset control signal which is supplied to the gate of the first P-channel MOS transistor, by delaying said second reset control signal supplied to the gate of the N-channel MOS transistor.