Patent ID: 8070932
Filing Date: 2011-12-06
Classification: H05K

Abstract:
1. A method for fabricating a circuit board with identifiable information, comprising the steps of: preparing a core board having a patterned circuit layer formed a surface thereof; providing an insulating layer on the surface of the core board; forming a plurality of first openings and second openings in the insulating layer, wherein the first openings are disposed on a part of the circuit layer, and the second openings are located at a non-circuit area of the insulating layer free of a circuit layout without penetrating the insulating layer; performing a build up process to form a conductive circuit layer on the insulating layer, a plurality of conductive vias in the first openings, and metal identifiable information in the second openings, wherein the metal identifiable information is formed by electroplating and not electrically conductive to the conductive circuit layer; and forming a patterned insulating protection layer on an outer circuit layer of the circuit board.