Patent ID: 6144374
Filing Date: 2000-11-07
Classification: G09G,G11C

Abstract:
An apparatus for driving a flat panel display, comprising:a shift register for sequentially shifting a video signal input from the exterior in synchronism with a clock signal, said shift register comprising n multiplexers for multiplexing a plurality of input signals in accordance with an up/down count instruction signal, and n D flip-flops for performing an arithmetic operation on an output signal from said multiplexers to output as an internal signal and for feeding back the internal signal to an input stage of a subsequent multiplexer, said shift register performing a bi-directional shifting;a latch for temporarily storing and outputting said video signal which has been sequentially input from said shift register, said latch comprising a plurality of D-type latches responsive to each output signal from said shift register and a first enable signal for performing a latching operation;an AND gate for adjusting a time of outputting said video signal output from said latch, said AND gate comprising a plurality of AND gates responsive to each output signal from said latch and a second enable signal for performing an AND operation; andan output driving circuit for inputting said video signal from said AND gate and performing a display gradation control, said output driving circuit comprising a plurality of NPN transistors connected between the lower end of a cathode and ground, a plurality of operational amplifiers each connected to a respective one of said plurality of NPN transistors for switching a corresponding transistor. and a plurality of resistors each connected to a respective one of said plurality of NPN transistors and the ground, each resistor having a resistance value different from other resistors.