Patent ID: 7649903
Filing Date: 2010-01-19
Classification: H04L

Abstract:
1. A time out checker circuit for determining whether a frame timeout has occurred, the circuit comprising: first logic for receiving at inputs a timeout value and a frame time stamp value, summing the inputs, and generating as an output a frame timeout value, which is equal to the sum of the input; second logic for receiving as inputs the frame time stamp value and a global real-time counter value, comparing, the inputs, and, if the frame time stamp value is greater than the global real-time counter value, generating as an output a rollover value, which indicates that the global real-time counter value has rolled over from its maximum value to zero; and third logic for receiving as inputs the global real-time counter value and the frame timeout value, comparing the inputs, and, if the global real-time counter value is greater than or equal to the frame timeout value, generating as an output a frame timeout signal indicating that a frame has timed out.