Patent ID: 6226509
Filing Date: 2001-05-01
Classification: H03D,H04B

Abstract:
An integrated image reject mixer circuit responsive to an information-bearing signal and arranged to be coupled to a local oscillator that provides phase-referenced signals thereto and wherein the information-bearing signal has in-phase and quadrature components, the integrated image reject mixer circuit comprising:circuit arrangements of first, second, third, and fourth mixer paths; each circuit arrangement containing:a signal input for receiving the information-bearing signal;a mirrored pair of mixer transistors for receiving selected phase-referenced signals, each mirrored pair of mixer transistors further configured to receive a dedicated phase aligned information-bearing signal for frequency down conversion to a respective intermediate frequency component through mixing with one of the selected phase-referenced signals;a polyphase filter comprising a wrapped chain of individual resistor-capacitor combinations in which a resistor of each phase is coupled between the respective signal input of each phase and a particular mirrored pair of mixer transistors and a capacitor of each phase is coupled from a first circuit node, located between said resistor and said particular mirrored pair of mixer transistors, and a second circuit node located between a different signal input and a different resistor in a phase adjacent mixer path, the polyphase filter being integrally formed directly between the signal inputs and the mirrored pairs of mixer transistors of each of the first, second, third, and fourth mixer paths; such that the phase aligned information-bearing signals in each of the respective first, second, third, and fourth mixer paths; are generated within each mixer path and have a substantially quadrature phase shift therebetween, the integrated image reject mixer circuit further including:a mirrored pair of circuit arrangements;a plurality of cross-connections that provide a circuit balancing communication between the mirrored pair of circuit arrangements; andfirst and second cross-connections that cross-feed corresponding phases of respective polyphase filters of each of the mirrored pair of circuit arrangements, and wherein said corresponding phases support an in-phase and a quadrature phase having phase angle adjacency.