Patent ID: 6124747
Filing Date: 2000-09-26
Classification: H03K

Abstract:
An output buffer circuit capable of controlling a through rate of an output wave form of an output voltage potential provided from an output terminal at a constant rate, comprising:a plurality of voltage potential decision means, each voltage potential decision means for receiving information about the output voltage potential at said output terminal, for comparing said output voltage potential with a respective predetermined standard value, and for outputting a respective decision result;a plurality of delay means, each delay means for outputting a respective trigger signal after a respective predetermined time period is elapsed from when an input terminal receives a control signal;a plurality of output means for providing an output voltage potential to said output terminal; anda plurality of control means for inputting said respective decision results from said plurality of voltage potential decision means and for operating said plurality of output means according to said respective decision results when said plurality of control means receive said respective trigger signal transferred from said plurality of delay means.