Patent ID: 6173426
Filing Date: 2001-01-09
Classification: G01R

Abstract:
A method of detecting a fault occurring in an LSI circuit, comprising the steps of:detecting, among blocks which are basic logic circuit units constituting the LSI circuit, a fault block by executing a logical operation with each of the blocks by using block-by-block logical operation information and test vector numbers causing an Iddq value, which is a leak current at a quiescent state of a logical operation of the LSI, to exceed a preselected value; andnarrowing down locations of multiple faults by comparing occurrences of logic information particular to the fault block and corresponding to the test vector numbers which cause an Iddq error to occur with respect to occurrences of logic information particular to the fault block and corresponding to the test vector numbers which do not cause an Iddq error to occur.