Patent ID: 8114720
Filing Date: 2012-02-14
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: forming a first conductive layer over a substrate; selectively forming a resist mask with plural thicknesses over the first conductive layer; etching the first conductive layer by using the resist mask to form a gate electrode and a first wiring; removing the resist mask over the gate electrode and leaving part of the resist mask over the first wiring; forming a gate insulating layer so as to cover the gate electrode, the first wiring, and the resist mask; forming a second conductive layer over the gate insulating layer; selectively etching the second conductive layer to form a source and drain electrodes, and to form a second wiring overlapping the first wiring; and forming a semiconductor layer in contact with the source and drain electrodes in a region overlapped with the gate electrode.