Patent ID: 7994821
Filing Date: 2011-08-09
Classification: H03K

Abstract:
1. A level shifter circuit comprising: first and second transistors, wherein the first transistor is directly coupled to the second transistor at a first node; third and fourth transistors coupled in series, wherein the fourth transistor is coupled to the first node; fifth and sixth transistors, wherein the fifth transistor is directly coupled to the sixth transistor at a second node; and seventh and eighth transistors coupled in series, wherein the eighth transistor is coupled to the second node, wherein the second transistor receives a first input signal at a first control input, wherein the eighth transistor receives the first input signal at a second control input, wherein the fourth transistor receives a second input signal at a third control input, wherein the sixth transistor receives the second input signal at a fourth control input, and wherein the second input signal is inverted relative to the first input signal.