Patent ID: 6649976
Filing Date: 2003-11-18
Classification: H01L

Abstract:
A semiconductor device, comprising:an element isolating insulating film formed in a semiconductor layer for surrounding an element forming region; a pair of source/drain regions formed in said element forming region, sandwiching a channel region; a gate electrode formed on a surface of said channel region with a gate insulating film interposed therebetween; a sidewall insulating film formed on and being in contact with a side surface of an outermost edge of said gate electrode in a length direction of said channel region; and a silicide film formed on surfaces of said source/drain regions; wherein said gate electrode and said sidewall insulating film extend from an upper region of said element forming region to an upper region of said element isolating insulating film, and said silicide film is not formed at least in a region adjacent said sidewall insulating film and said element isolating insulating film, and located outside of said sidewall insulating film.