Patent ID: 6160303
Filing Date: 2000-12-12
Classification: H01F,H01L

Abstract:
A circuit including an inductor monolithically integrated in a semiconductor die, comprising:a semiconductor substrate;a first layer of conductive material formed on the substrate and patterned to form a series of concentric patterns;a layer of insulating material formed on the substrate over the first layer of conductive material;a second layer of conductive material formed on the substrate over the layer of insulating material and patterned to form a conductor having successive patterns generally superposed and overlying corresponding patterns of the first conductive layer, so that at least one second layer pattern overlies at least one first conductive layer pattern; anda unity gain voltage buffer associated with at least one pattern of said first layer of conductive material, said buffer having an output connected to the associated pattern of said first layer of conductive material and an input connected to an overlying pattern.