Patent ID: 6218237
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A method of forming a capacitor comprising the following steps:providing a node to which electrical connection to a first capacitor plate is to be made;providing a first layer of material over the node, the first layer of material being selectively etchable relative to the node;providing a second layer of material over the first layer, the second layer of material being selectively etchable relative to the first layer of material and being electrically conductive;providing a first masking layer over the second layer of material;etching a first opening into the first masking layer over the node;providing a second masking layer over the first masking layer to a thickness which less than completely fills the first opening;anisotropically etching the second masking layer to define a spacer received laterally within the first opening and thereby defining a second opening relative to the first masking layer which is smaller than the first opening;after anisotropically etching the second masking layer, etching unmasked first masking layer material away;after anisotropically etching the second masking layer, selectively anisotropically etching the second layer of material relative to the first layer of material;after etching the second layer material, selectively etching the first layer of material relative to the node to effectively extend the second opening to the node and define an outline of the first capacitor plate using the spacer as an etching mask;plugging the extended second opening with an electrically conductive plugging material, the plugging material electrically interconnecting the node and second layer;after extending the second opening to the node, selectively isotropically etching the first layer material relative to the second layer material; andproviding a capacitor dielectric layer and a conductive second capacitor plate layer over the conductive second layer.