Patent ID: 6826081
Filing Date: 2004-11-30
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device comprising:a memory cell array with memory cell strings constituted of a plurality of memory cells connected in series being arranged in an array form, said nonvolatile semiconductor memory device setting a collective unit of arrangements of the memory cell strings in said memory cell array as a block, and storing flag data indicating a defective block in part of the memory cells of the defective block when the defective block including a defective memory cell exists in the block; a block determining circuit for determining said block to be a target of detection of the flag data; a logical product outputting circuit for outputting logical product of the data stored in said memory cells of each of said memory cell strings in the block designated by said block determining circuit; and a defective block detecting circuit for detecting the flag data for each of the blocks based on the output of said logical product outputting circuit.