Patent ID: 8963199
Filing Date: 2015-02-24
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate of a first conductivity type having a main surface; a first impurity region of the first conductivity type formed over a prescribed depth from said main surface of said semiconductor substrate, and having a first impurity concentration; a second impurity region of a second conductivity type formed over a prescribed depth from a surface of said first impurity region to be surrounded by said first impurity region on side and lower portions, and having a second impurity concentration; a third impurity region of the second conductivity type formed over a prescribed depth from a surface of said second impurity region to be surrounded by said second impurity region on side and lower portions, and having a third impurity concentration higher than said second impurity concentration; a fourth impurity region of the first conductivity type formed over a prescribed depth from the surface of said first impurity region to be surrounded by said first impurity region on side and lower portions and in direct contact with said first impurity region, and having a fourth impurity concentration higher than said first impurity concentration; a fifth impurity region of the second conductivity type formed over a prescribed depth from said main surface of said semiconductor substrate at a distance from said first impurity region; and an electrode portion formed on a region lying between said second impurity region and said fifth impurity region, wherein a plurality of said fourth impurity regions are formed, and said plurality of said fourth impurity regions are arranged at a distance from one other in a direction intersecting with a direction of current that is allowed to flow between said second impurity region and said fifth impurity region by application of a prescribed voltage to said electrode portion.