Patent ID: 6251739
Filing Date: 2001-06-26
Classification: H01L

Abstract:
A method for manufacturing a collector pin in a bipolar process in the manufacturing of an integrated circuit, especially an integrated circuit intended for radio applications or other high speed communication, the method comprising the steps of:providing an area in a semiconductor structure including a silicon, or silicon oxide, layer having an upper surface, wherein said area is surrounded by a field oxide region having a first depth,forming a substantially dislocation-free isolating trench in said semiconductor structure, wherein said trench surrounds said area,producing a collector opening by uncovering, by means of etching, said area,implanting heavy ions of a first dose and energy through said upper surface to create a heavy ion damaged area within said collector opening from said upper surface down to a second depth less than said first depth,implanting light ions of a second dose and energy through said created area, said second dose and energy of light ions being chosen so that implantation damage due to said step of implanting light ions is kept within said second depth, said step of implanting light ions occurring after said step of implanting heavy ions, andsubsequently heat treating of the semiconductor structure.