Patent ID: 6309909
Filing Date: 2001-10-30
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device which comprises a semiconductor chip mounted on a die pad, said die pad having first and second surfaces opposite to each other, and said semiconductor chip being mounted on the first surface; one or a plurality of electrode terminals spaced a distance from the die pad and electrically connected with the semiconductor chip through a corresponding wire, said electrode terminal having third and fourth surfaces opposite to each other, with said wire being connected to the third surface; and a sealing resin enclosing the die pad and the electrode terminal, with a surface of the die pad opposite to the surface on which the second and fourth surfaces of the die pad and the electrode terminal, respectively, being exposed to an outside of the sealing resin, said method comprising:a pattern forming step of forming metallic paste layers on a planar jig in respective patterns corresponding to the plural die pads and the plural electrode terminals;a sintering step of sintering the metallic paste layers on the planar jig to form a plurality of die pads and a plurality of electrode terminals;a connecting step of placing semiconductor chips on the die pads and connecting the semiconductor chips with the electrode terminals through wires to thereby form a plurality of unitary members each comprised of the semiconductor chip and the electrode terminals connected therewith through the wires; anda jig removal step of sealing the unitary members on the planar jig with a sealing resin to form a semiconductor device member which is subsequently separated from the planar jig.