Patent ID: 6774659
Filing Date: 2004-08-10
Classification: H01L,Y10S

Abstract:
A method of testing a semiconductor package device, comprising the following steps in the sequence set forth:providing a semiconductor package device that includes an insulative housing, a semiconductor chip, a terminal and a lead, wherein the insulative housing includes a top surface, a bottom surface, and a peripheral side surface between the top and bottom surfaces, the chip includes a conductive pad, the terminal protrudes downwardly from and extends through the bottom surface and is electrically connected to the pad, the lead protrudes laterally from and extends through the side surface, includes an exposed distal end outside the insulative housing and is electrically connected to the pad, the terminal and the lead are spaced and separated from one another outside the insulative housing, and the terminal and the lead are electrically connected to one another inside the insulative housing and outside the chip; attaching the device to a test socket that electrically contacts the lead without electrically contacting the terminal; testing the device using the test socket; removing the device from the test socket; and trimming the lead.