Patent ID: 8751851
Filing Date: 2014-06-10
Classification: G06F

Abstract:
1. An apparatus that compensates for misalignment on a synchronous data bus, the apparatus comprising: a Joint Test Action Group (JTAG) interface, configured to receive control information over a standard JTAG bus, wherein said control information indicates an amount to advance a synchronous data strobe associated with a data group; a synchronous bus optimizer, configured to receive said control information, and configured to develop a value on a ratio bus that indicates said amount; a core clocks generator, coupled to said ratio bus, configured to advance a data strobe clock by said amount, said core clocks generator comprising; a synchronous strobe driver, configured to receive said data strobe clock, and configured to employ said data strobe clock to generate said synchronous data strobe, wherein said synchronous data strobe, when enabled, is advanced also by said amount.