Patent ID: 6433433
Filing Date: 2002-08-13
Classification: H01L

Abstract:
A semiconductor device, comprising:a semiconductor substrate; a metal stack disposed over said semiconductor substrate, said metal stack having a top, a bottom, and first and second opposing sidewalls, and said metal stack including a conductive layer comprised of aluminum and a layer containing free titanium disposed over said conductive layer; a dielectric layer disposed over said metal stack, said dielectric layer having a via hole formed therein, said via hole being misaligned with said metal stack such that a portion of said via hole extends beyond said top of said metal stack and exposes at least a portion of said first sidewall of said metal stack; a sidewall cap layer formed on said exposed portion of said first sidewall of said metal stack, said sidewall cap layer including a layer of titanium nitride and a layer of aluminum nitride, and said sidewall cap layer being configured to resist substantial penetration of WF6 during chemical vapor deposition of tungsten; and a conductive material disposed in and substantially filling said via hole, said conductive material being comprised of tungsten.