Patent ID: 7361536
Filing Date: 2008-04-22
Classification: H01L

Abstract:
1. A method for forming a III-V a substrate structure having an enhancement mode transistor device disposed in a first region of the structure and depletion mode transistor device disposed in a laterally displaced second region of the structure, such structure having a channel layer for the depletion mode and enhancement mode transistor devices, comprising: providing a structure having: an enhancement mode transistor device InGaP etch stop layer over the channel layer; a first layer on the InGaP layer; an depletion mode transistor device etch stop layer on the first layer; and a second layer on the depletion mode transistor device etch stop layer, the material used for the first layer being different from InGaP; providing a first mask having a window disposed over the first region of the structure, such first mask masking the second region of the structure; bringing an etch into contact with portions of the first region of the structure exposed by the window forming a first recess passing through the second layer, through the depletion mode transistor device etch stop layer, and terminating in the first layer; removing the first mask; providing a second mask over the etched structure, such second mask having a window disposed over the second region of the structure, such second mask masking the first region of the structure; bringing an etch into contact with portions the second region of the structure exposed by the window to form a second recess in the second region, such second recess passing through the second layer, through the depletion mode transistor device etch stop layer, through the first layer, and terminating in the InGaP layer.