Patent ID: 6114763
Filing Date: 2000-09-05
Classification: H01L,H05K

Abstract:
An electronic assembly, comprising:A. a semiconductor chip package having a face surface, a plurality of package terminals disposed on the face surface, and a semiconductor chip, wherein said package terminals are arranged in an array having a first pitch; andB. a translator, comprising;a. a flexible, sheet-like support element having a first surface, a second surface opposite the first surface, a peripheral region, and a central region defined by the peripheral region, said peripheral region being more rigid than the central region;b. a plurality of first translator terminals wherein first translator terminals are disposed on the central region of the support element, exposed at the first surface of the support element, and arranged in an array having said first pitch;c. a plurality of second translator terminals wherein second translator terminals are exposed at the second surface of the support element and arranged in an array having a pitch which is different than the first pitch and wherein at least some of the second translator terminals are disposed on the peripheral region of the support element; andd. a plurality of traces electrically interconnecting the package terminals and the first translator terminals.