Patent ID: 6976178
Filing Date: 2005-12-13
Classification: G06F

Abstract:
1. An apparatus within a processing system having multiple subsystems, for disassociating power consumed by the processing system with instructions it is executing, the apparatus comprising: a power prediction system, for providing a predictor of estimated power that will be consumed during execution of the instructions; a subsystem inhibition control, coupled to said power prediction system, for receiving said predictor, and for turning on/off selected ones of the subsystems based on a value of said predictor; and a power counterweight, coupled to said power prediction system, to produce a counterweight current causing, in combination with said inhibition control, a total power consumption of the processing system to remain the same, regardless of which instructions are executing on the processing system; wherein by turning on/off ones of the selected subsystems, said subsystem inhibition control causes the total power consumption of the processing system to be disassociated with the instructions it is executing.