Patent ID: 6780685
Filing Date: 2004-08-24
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device comprising:an element isolation step for forming element isolation regions at predetermined intervals so as to form an anode electrode formation region and a cathode electrode formation region apart from each other on a surface of a semiconductor substrate of a P-type conductivity; a first implantation step for implanting N-type impurities into the cathode electrode formation region; a second implantation step for implanting P-type impurities into the anode electrode formation region; a third implantation step for implanting the P-type impurities throughout the anode electrode formation region and into a part of the cathode electrode formation region; a thermal diffusion step for diffusing the implanted P-type and N-type impurities by an annealing treatment, and an electrode formation step for forming an anode electrode and a cathode electrode by accumulating metal material on the semiconductor substrate in the anode electrode formation region and the cathode electrode formation region by means of sputtering.