Patent ID: 7176127
Filing Date: 2007-02-13
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming a lower wiring on a substrate; covering the lower wiring and the substrate with an insulating film; forming a through hole in the insulating film that exposes the lower wiring; forming an adhesion layer on the insulating film within the through hole; forming a conductive plug within the through hole on the adhesion layer, the conductive plug electrically connected to the lower wiring; and forming an upper wiring on the insulating film, the upper wiring electrically connected to the conductive plug, said forming an adhesion layer including sputtering based on a predetermined aspect ratio indicated by a ratio of a depth dimension of the through hole to a diameter dimension of the through hole, wherein the adhesion layer is formed such that a relationship between a thickness dimension of a material deposited on the interlayer insulating film as the adhesion layer by said sputtering and the aspect ratio is provided so that