Patent ID: 7109799
Filing Date: 2006-09-19
Classification: H03F

Abstract:
1. An amplifier stage, comprising: a current source; a first differential transistor having a source, gate, and drain, wherein the source of the first differential transistor is coupled to the current source; a second differential transistor having a source, gate, and drain, wherein the source of the second differential transistor is coupled to the current source; a first output impedance having positive and negative ends, wherein the negative end of the first output impedance is coupled to the drain of the first differential transistor and wherein the first output impedance includes a first shunt peaking inductor; a second output impedance having positive and negative ends, wherein the negative end of the second output impedance is coupled to the drain of the second differential transistor and wherein the second output impedance includes a second shunt peaking inductor; a first miller capacitance cancellation capacitor having a positive and negative ends, wherein the positive end of the first miller capacitance cancellation capacitor is coupled to the drain of the second differential transistor, and wherein the negative end of the first miller capacitance cancellation capacitor is coupled to the gate of the first differential transistor; and a second miller capacitance cancellation capacitor having a positive and negative ends, wherein the positive end of the second miller capacitance cancellation capacitor is coupled to the drain of the first differential transistor, and wherein the negative end of the second miller capacitance cancellation capacitor is coupled to the gate of the second differential transistor.