Patent ID: 8180991
Filing Date: 2012-05-15
Classification: G06F

Abstract:
1. An apparatus comprising: a memory; and a processor in communication with the memory, the memory including computer code executable with the processor, wherein the computer code is configured to: calculate a static factor for each respective one of a plurality of allocators based on a length of time each respective one of the allocators held onto a respective plurality of requested memory blocks; identify each respective one of the allocators as either transient or static based on the length of time each respective one of the allocators is determined to hold onto the respective requested memory blocks, wherein the computer code configured to identify each respective one of the allocators as either transient or static is further configured to identify each respective one of the allocators as either transient or static based on the static factor of each respective one of the allocators; and allocate at least one first memory block requested by the allocators identified as transient from a first memory pool and allocate at least one second memory block requested by the allocators identified as static from a second memory pool, the second memory pool different from the first memory pool.