Patent ID: 6646840
Filing Date: 2003-11-11
Classification: H01L

Abstract:
An ESD circuit for protecting a second circuit having a specified stand-off voltage, wherein both circuits are coupled between a first supply pad and a second supply pad, the ESD protection circuit comprising:an ESD protection transistor coupled between the first supply pad and the second supply pad, wherein said ESD protection transistor includes art input and is designed with a breakdown potential and a threshold turn-on potential; and a trigger transistor with a first coupled to the first supply pad a gate, a source, and bulk regions connected together defining an output, the output connected to the ESD protection transistor's input, a resistance connecting the output to the second supply pad, wherein said trigger transistor is designed with an effective channel length smaller than an effective channel length of said protection transistor, and said trigger transistor is designed with a breakdown potential closer to the stand-off potential than is said breakdown potential of said ESD protection transistor, and wherein said trigger MOS transistor activates said ESD protection transistor when said output reaches said threshold turn-on potential.