Patent ID: 8580612
Filing Date: 2013-11-12
Classification: H01L

Abstract:
1. A method of manufacturing an array of semiconductor devices, comprising: providing a first carrier with a surface having multiple chip alignment regions, wherein the chip alignment regions comprise surface areas of the first carrier which are more hydrophilic than a remaining surface area of the first carrier surrounding the chip alignment regions; disposing a fluid on the multiple chip alignment regions of the first carrier; simultaneously placing multiple chips onto the fluid over the multiple chip alignment regions of the first carrier, one chip for each chip alignment region; aligning each chip to the corresponding chip alignment region by applying an external energy to laterally move and align each chip via the fluid, wherein the lateral movement is relative to the surface of the first carrier; placing the aligned multiple chips on a second carrier; detaching the first carrier from the aligned multiple chips after placing the aligned multiple chips on the second carrier; applying an encapsulation material to the aligned multiple chips after detaching the first carrier to form an encapsulated array of semiconductor devices; and detaching the second carrier from the encapsulated array of semiconductor devices.