Patent ID: 9029910
Filing Date: 2015-05-12
Classification: H01L

Abstract:
1. A circuit formed on a substrate, comprising: a first terminal; a second terminal; a first lightly doped region having a first conductivity type formed adjacent a second lightly doped region having a second conductivity type; a first heavily doped region having the second conductivity type formed within the first lightly doped region at a face of the substrate and coupled to the first terminal; a second heavily doped region having the first conductivity type formed within the second lightly doped region at the face of the substrate and coupled to the second terminal; a third heavily doped region having the second conductivity type formed between the first and second heavily doped regions and electrically connected to the second lightly doped region; a fourth heavily doped region having the first conductivity type formed between the first and third heavily doped regions; a first transistor having a current path coupled between the third heavily doped region and the second terminal; a second transistor having a current path coupled between the first terminal and the second lightly doped region and having a control terminal coupled to the first terminal; and a third transistor having a current path coupled between the first lightly doped region and the second terminal.