Patent ID: 6127897
Filing Date: 2000-10-03
Classification: H04L

Abstract:
A clock recovery circuit in a demodulator of a multi-level quadrature amplitude modulation (QAM) system, comprising:an analog/digital (A/D) converter for performing an A/D conversion upon an analog baseband signal in synchronization with a sampling clock signal having a time period that is a symbol time period;a phase detector, connected to said A/D converter, for receiving successive first and third data sampled from said A/D converter, calculating second data by addition of said first and third data, determining whether or not a signal transition formed by said first and third data crosses a zero value within a predetermined deviation, and comparing a polarity of said second data with a polarity of one of said first and third data, and generating a comparison result as a phase detection signal when said signal transition crosses said zero value;a loop filter, connected to an output of said phase detector, for passing a low-frequency component of said phase detection signal therethrough; anda voltage controlled oscillator, connected between said loop filter and said A/D converter, for supplying said sampling clock signal to said A/D converter in accordance with an output signal of said loop filter.