Patent ID: 8017474
Filing Date: 2011-09-13
Classification: H01L

Abstract:
1. A process of forming an electronic device comprising: forming a capacitor dielectric layer over a base region, wherein the base region includes a base semiconductor material; forming a gate dielectric layer over a substrate, forming a capacitor electrode over the capacitor dielectric layer; forming a gate electrode over the gate dielectric layer; forming a field isolation region to define a first active area and a second active area, wherein from a top view the capacitor electrode covers at least three sides of the first active area and the gate electrode covers no more than two sides of the second active area; and forming an input terminal and an output terminal to the capacitor electrode or to the base region, wherein: the input terminal and the output terminal are spaced apart from each other and are connected to different components within the electronic device; a resistor-capacitor low-pass filter includes the base region, the capacitor dielectric layer, and the capacitor electrode; and a transistor structure includes the gate dielectric layer and the gate electrode.