Patent ID: 6496033
Filing Date: 2002-12-17
Classification: H03K

Abstract:
A method for selecting or determining a function or attribute of an integrated circuit or chip having a plurality of selectable functions and/or attributes comprising the steps of:adding a plurality of extra pins and/or bond pads at one or more ends of a package and/or chip; and based on a high or low voltage to each of the extra pins/pads, modifying three or more characteristics selected from the group consisting of: (A) a drive strength of an output buffer, (B) a threshold level of an input buffer, (C) an operating voltage of the chip, (D) enable/disable of a synchronous data transfer, (E) enable/disable of a register, (F) the speed of an output buffer, (G) the noise sensitivity, (H) whether or not the pins of the device have bus hold features, (I) the operating speed, (J) the ground bounce/sensitivity of the output buffers, (K) the number of I/Os, (L) the number of data input and/or output pads, (M) the directionality of data and/or address I/Os (e.g., one-directional or bi-directional), (N) whether or not the data is inverted, (O) the number of control pins, (P) whether some data pads are used or unused, and (Q) other functions or attributes of the device.