Patent ID: 7840732
Filing Date: 2010-11-23
Classification: G06F

Abstract:
1. A system for automated hardware resource allocation in a hardware device comprising: a baseboard having electronic communication with a plurality of daughterboards wherein said electronic communication is channeled through a route running across said daughterboards, the plurality of daughterboards including a reference card having a predetermined address; means for identifying relative logical address of each of said daughterboards, the relative logical address determined based on the predetermined address; and means for associating resources to each of said daughterboards as a function of the logical address; and wherein each of said daughter boards includes logic and includes termination circuitry, the logic on a particular daughterboard configured to activate the termination circuitry of the particular daughterboard upon determining that the particular daughterboard is the reference card and configured to deactivate the termination circuitry upon determining that the particular daughterboard is not the reference card.