Patent ID: 6468834
Filing Date: 2002-10-22
Classification: H01L,H05K,Y02P

Abstract:
A method of packaging an integrated circuit die in a die-up BGA package, comprising the steps of:forming a plurality of electrical conductors through a rigid circuit board between the top surface and the bottom surface of the rigid circuit board, where each of the electrical conductors have a contact area at the top surface of the rigid circuit board; fixing a lower surface of a flexible insulated tape layer to the top surface of the circuit board, wherein the upper surface of the flexible insulated tape layer has a number of wire-bonding sites formed thereon, and wherein the lower surface of the flexible insulated tape layer has a number of tape-contact areas formed thereon; mounting a die-mounting surface of the integrated-circuit die to an upper surface of the flexible insulated tape layer; electrically connecting the wire-bonding sites on the upper surface of the flexible insulated tape layer to the tape-contact areas formed on the lower surface of the flexible insulated tape layer, using conductive vias , which are formed through the flexible insulated layer, which are filled with conductive material, and which are also connected to conductive traces formed on the upper surface of the flexible insulated tape layer, where the conductive traces provide connections to the wire bonding sites. bonding each of a plurality of bonding-wire loops between one of the wire-bonding pads formed on the integrated-circuit die and a respective one of the wire-bonding sites on the upper surface of the flexible insulated tape layer; connecting each of the tape-contact areas on the lower surface of the flexible insulated tape layer to respective contact areas at the top surface of the rigid circuit board; connecting a plurality of solder balls to the lower surface of rigid circuit board and to the electrical conductors formed through the rigid circuit board; and covering and sealing the integrated-circuit die and the bonding wires with an encapsulation layer.