Patent ID: 6247160
Filing Date: 2001-06-12
Classification: G06F

Abstract:
A multi-fault tolerant majority voting circuit responsive to at least three logical input signals for producing a majority voted output signal, said circuit comprising:at least three input signal monitors, each of which is operable for monitoring a respective one of the logical input signals for generating a corresponding control signal representing the status of the logical input signal;a signal generator for generating a first constant level signal of a first predetermined logical level, and a second constant level signal of a second predetermined logical level different from the first predetermined logical level;a first signal selector having two input terminals for receiving a first one of the logical input signals at one of the input terminals and said first constant level signal at the other input terminal, and a control terminal for receiving the control signal that corresponds to said first logical input signal, for selecting one of said first logical input signal and said first constant level signal as selector output signal in response to the corresponding control signal;a second selector having two input terminals for receiving a second one of the logical input signals at one of the input terminals and said second constant level signal at the other input terminal, and a control terminal for receiving the control signal that corresponds to said second logical input signal, for selecting one of said second logical input signal and said second constant level signal as selector output signal in response to the corresponding control signal; anda third selector having two input terminals for receiving a third one of the logical input signals at one of the input terminals and a predetermined one of said control signals at the other input terminal, and a control terminal for receiving the control signal that corresponds to said third logical input signal, for selecting one of said third logical input signal and said predetermined control signal as selector output signal in response to the corresponding control signal; anda majority voter responsive to said selector output signals, whereby the multi-fault tolerant majority voter circuit is capable of producing a validly majority voted output signal when up to two of the logical input signals are faulty.