Patent ID: 6597349
Filing Date: 2003-07-22
Classification: G09G

Abstract:
A display device, comprising:a memory circuit for storing m x-bit digital gradation signals (m and x are natural numbers); and a D/A conversion circuit portion for converting said m x-bit digital gradation signals supplied from said memory circuit into analog signals and for supplying said analog signals to m source signal lines, said D/A conversion circuit portion comprising n D/A conversion circuits where n is a natural number, wherein input of each of said n D/A conversion circuits is connected with outputs of m/n x-input NANDs, wherein each of inputs of said x-input NANDs is connected with an output of y-input NAND where y is two or more, and wherein each of said n D/A conversion circuits sequentially converts the m/n x-bit digital gradation signals into m/n analog signals to supply said m/n analog signals to corresponding m/n source signal lines.