Patent ID: 6101563
Filing Date: 2000-08-08
Classification: G06F

Abstract:
A method for processing a CPU request for configuration data in a multi-bus system, said CPU request being issued by a CPU in a first level bus system, said method comprising:converting said CPU request to an equivalent request in a second level bus system by a bus converter circuit connected between said first level bus system and said second level bus system;determining which of a plurality of bus bridge circuits contains data identified in said equivalent request, said bus bridge circuits being connected between said second level bus system and a corresponding plurality, respectively, of bus arrangements in a third level bus system;acknowledging said equivalent request by one of said bus bridge circuits if an address containing said configuration data is within a range of addresses monitored by said one of said bus bridge circuits;sending said requested configuration data from said one of said bus bridge circuits to said bus converter circuit; andreturning said requested data from said converter circuit to said CPU in response to said CPU request.