Patent ID: 9147614
Filing Date: 2015-09-29
Classification: H01L

Abstract:
1. A method for forming a transistor comprising: providing a semiconductor substrate; forming a dummy gate and an interlayer dielectric layer having a flushed top surface over the semiconductor substrate; removing the dummy gate to form a trench over the semiconductor substrate; forming a high-k dielectric layer over each surface of the trench and the interlayer dielectric layer; fluorinating the high-k dielectric layer to form a fluorinated high-k dielectric layer by a fluorination process, wherein a channel region in the semiconductor substrate under the dummy gate is simultaneously fluorinated in the fluorination process; forming a functional layer on the fluorinated high-k dielectric layer; forming a metal layer on the functional layer to fill the trench with the metal layer; and exposing the interlayer dielectric layer by polishing the metal layer, the functional layer, and the fluorinated high-k dielectric layer on the interlayer dielectric layer.