Patent ID: 9064567
Filing Date: 2015-06-23
Classification: G11C,H01L

Abstract:
1. An electronic device comprising a semiconductor memory unit, wherein the semiconductor memory unit comprises: first lines extending along a first direction; second lines extending along a second direction that intersects with the first direction; a silicon-added metal oxide layer disposed in each intersection region of the first lines and the second lines; a metal oxide layer that is disposed alternately with the silicon-added metal oxide layer in the first direction and that is disposed in a region between two adjacent second lines and over a corresponding one of the first lines over which the silicon-added metal oxide layer is disposed; and a silicon oxide layer that is disposed alternately with the silicon-added metal oxide layer in the second direction and that is disposed in a region between two first lines and under a corresponding one of the second lines under which the silicon-added metal oxide layer is disposed.