Patent ID: 6468872
Filing Date: 2002-10-22
Classification: H01L

Abstract:
A method of fabricating a thin film transistor, comprising the steps of:preparing a first conductive type TFT on a substrate, the first conductive type TFT including a first semiconductor layer and a first gate electrode, and a second conductive type TFT on the substrate, the second conductive type TFT including a second semiconductor layer and a second gate electrode; doping the first and second semiconductor layers with a first conductive type impurity using the first and second gate electrodes as a mask; forming a doping mask covering the first conductive type TFT; counter-doping the second semiconductor layer with a second conductive type impurity using the doping mask and the second gate electrode as masks; and forming a CMOS TFT by electrically connecting the first conductive type TFT to the second conductive type TFT; wherein an accelerating voltage of the counter-doping step is 30-50 kV higher than an accelerating voltage of the doping step.