Patent ID: 7879665
Filing Date: 2011-02-01
Classification: H01L

Abstract:
1. A method of fabricating a transistor comprising: patterning a substrate with a first mask; forming a first isolation trench in the substrate; depositing a nonconductive material in the first isolation trench; patterning the substrate with a second mask; forming a first gate trench; forming a separation trench such that a ridge of substrate material extends around at least portions of a source region, a drain region and a gate region and wherein the separation trench is interposed between the ridge of substrate material and the source, drain, and gate regions along at least portions of the source, drain, and gate regions; filling the first gate trench and the separation trench with the nonconductive material; patterning the nonconductive material with a third mask; and removing the nonconductive material from at least a region of the first gate trench, thereby forming a second gate trench with sidewalls comprising the nonconductive material.