Patent ID: 7002213
Filing Date: 2006-02-21
Classification: H01L

Abstract:
1. A NOR logic circuit having a first input and a second input comprising: a semiconductor substrate; an insulator formed on said semiconductor substrate; a semiconductor layer formed on said insulator; a p-well formed in said semiconductor layer; a first gate structure formed atop said p-well, said first gate structure being the first input and being formed from a thin gate oxide layer underneath a conductive layer; a second gate structure formed atop said p-well, said second gate structure being the second input and being formed from a thin gate oxide layer underneath a conductive layer; a n− base formed adjacent to a first edge of said first gate structure and said second gate structure; a p+ structure formed within said n− base; a second p+ structure adjacent to a second edge of said first gate structure and said second gate structure, said second p+ structure being the output of said NOR logic circuit; a first switch formed in said semiconductor layer, said first switch electrically connected to said first input; and a second switch formed in said semiconductor layer in series to said first switch and electrically connected to said second input, said second switch also electrically connected to said second p+ structure.