Patent ID: 6564315
Filing Date: 2003-05-13
Classification: G06F

Abstract:
A scheduler comprising:an instruction buffer configured to store a first instruction operation; an issue pick circuit coupled to said instruction buffer, wherein said issue pick circuit is configured to select said first instruction operation for issue from said instruction buffer, and wherein said first instruction operation is speculative; and a control circuit coupled to said issue pick circuit and coupled to receive a first signal, during execution of said first instruction operation, indicating that said first instruction operation is to execute non-speculatively, wherein said control circuit is configured to maintain a first execution state of said first instruction operation, and wherein said control circuit is configured to change said first execution state to an executing state responsive to said issue pick circuit selecting said first instruction operation for issue, and wherein said control circuit is configured to change said first execution state to a not executed state responsive to said first signal, and wherein said control circuit is configured to record a first indication that said first instruction operation is to be executed non-speculatively in response to said first signal.