Patent ID: 6473439
Filing Date: 2002-10-29
Classification: G06F,H03L,H04L

Abstract:
A synchronization circuit for synchronizing data between receive and transmit mesochronous clocks, comprising:a receive clock domain circuit for providing the data clocked by the receive clock; a first latching circuit, coupled to an output of the receive clock domain circuit, for latching the data on a first edge of the transmit clock; wherein the receive clock and transmit clock are mesochronous; a second latching circuit, coupled to the receive clock domain circuit in parallel with the first latching circuit, for latching the data on a second edge of the-transmit clock; a multiplexing circuit, having inputs coupled to outputs of the first and second latching circuits; and a phase measurement circuit, configured to measure a phase difference between the receive and transmit clocks and to provide a select signal to the multiplexer in accordance with the phase difference.