Patent ID: 8946832
Filing Date: 2015-02-03
Classification: H01P

Abstract:
1. An integrated circuit comprising: a silicon-on-insulator substrate having a top surface; a metal shielding positioned vertically above the top surface of the silicon-on-insulator substrate; a band-pass filter device positioned vertically above the metal shielding, wherein the band-pass filter device includes a first port, a second port, and a coupling metal positioned on a common horizontal plane, the coupling metal being positioned between the first and second ports; and a metal-oxide-semiconductor (MOS) varactor including a first port formed in the silicon-on-insulator substrate and a second port formed on the silicon-on-insulator substrate, and a direct current (DC) pad disposed above the metal shielding such that the DC pad is coplanar with the coupling metal and is electrically coupled to the first port of the MOS varactor by way of the metal shielding, wherein the MOS varactor is electrically coupled to the band-pass filter by way of the metal shielding, and wherein the metal shielding is configured to reduce direct coupling between the band-pass filter device and the silicon-on-insulator substrate vertically over which the band-pass filter device is disposed.