Patent ID: 7451068
Filing Date: 2008-11-11
Classification: G03F

Abstract:
1. A method for dissecting a layout of an integrated circuit based on modeled intensity gradients to produce a segmentation for an optical proximity correction (OPC) process, comprising: calibrating the association between gradients and segment lengths by: receiving the layout for the integrated circuit; performing a model-based simulation on the layout to generate 2-D intensity gradients along edges of features in the layout, wherein the 2-D intensity gradients include both magnitude and angle of the intensity change, and wherein an intensity gradient angle can be in any direction with respect to an edge; and generating a segmentation for edges in the layout based upon the 2-D intensity gradients, wherein the segmentation is used by a subsequent OPC process in generating corrections for the layout; wherein the OPC corrected layout is used to generate a mask for fabricating an integrated circuit.