Patent ID: 6433609
Filing Date: 2002-08-13
Classification: H01L,H03K

Abstract:
A double-gated clamping circuit comprising:an input terminal for receiving an input voltage; a first power supply terminal for connection to at least one first supply voltage; a second power supply terminal for connection to a second supply voltage, the second supply voltage being less than the first supply voltage; a first transistor having a first and a second control lead, the first transistor being serially connected between the first power supply terminal and the input terminal, a second transistor having a first and a second control lead, the second transistor being serially connected between the second power supply terminal and the input terminal; and a reference circuit coupled to the first and second control leads of the first and second transistors for maintaining at least first and second preselected reference voltages at the first and second control leads of the first and second transistors, respectively, the first reference voltage being less than the second reference voltage, and at least one staging circuit coupled to the first and second control leads of at least one of the first and second transistors to determine a selected reference voltage at the control lead to which the at least one staging circuit is coupled.