Patent ID: 7761686
Filing Date: 2010-07-20
Classification: G06F

Abstract:
1. An address translator for translating virtual addresses to real addresses, comprising: a first fully associative address translation buffer that stores the virtual addresses and the real addresses of first static entries for a real-time operating system, second static entries for a non-real-time operating system, and dynamic entries for applications which run on the non-real-time operating system, the real-time operating system required to perform real-time processing, the non-real-time operating system required to perform non-real-time processing; a second set associative address translation buffer that stores the virtual addresses and the real addresses of the dynamic entries; and an address translation controller that accesses the first fully associative address translation buffer to perform address translation by using the virtual addresses and the real addresses of the first static entries stored in the first fully associative address translation buffer when a central processing unit operates the real-time operating system, and accesses the first fully associative address translation buffer and the second set associative address translation buffer to perform the address translation by using the virtual addresses and the real addresses of the second static entries and the dynamic entries stored in the first fully associative address translation buffer and the virtual addresses and the real addresses of the dynamic entries stored in the second set associative address translation buffer when the central processing unit operates the non-real-time operating system.