Patent ID: 7483314
Filing Date: 2009-01-27
Classification: G06F,Y02D

Abstract:
1. An integrated circuit comprising: a plurality of modules (M) for processing applications, each having a local memory (LM); a global memory (GM), which can be shared by said plurality of modules (M); interconnected data communications paths for interconnecting said modules (M) and said global memory (GM); and a memory managing unit (MMU) being associated with each of said modules (M), for determining whether said local memory (LM) provides sufficient memory space for processing a currently processed application on one of the plurality of modules (M) and for in response to the determining that there is not sufficient memory space, issuing a reservation request for memory space within a global buffer (FB) in said global memory (GM) to be exclusively reserved for processing data of the one of the plurality of modules and for in response to the determining that there is not sufficient memory space, issuing a path request for a dedicated communication path between the one of the plurality of modules and the global buffer.