Patent ID: 8040150
Filing Date: 2011-10-18
Classification: H03K

Abstract:
1. An impedance adjustment circuit that controls impedance of a transmission path in which an input signal to input buffers provided in a semiconductor device is transmitted, the impedance adjustment circuit comprising: a termination resistor which is provided at a termination of the transmission path; a first comparator which detects that the input signal exceeds a certain first voltage; a second comparator which detects that the input signal exceeds a certain second voltage, the second voltage being higher than the first voltage; a first counter which performs count based on an output from the first comparator; a second counter which performs count based on an output from the second comparator, wherein the impedance adjustment circuit is configured to determine the presence or absence of overshoot of the input signal with respect to the second voltage based on the count in the first counter and the count in the second counter; and a termination resistor control circuit which controls impedance of the termination resistor based on the determined presence or absence of overshoot.