Patent ID: 8219733
Filing Date: 2012-07-10
Classification: G06F,H05K

Abstract:
1. A system for operating a non-volatile programmable memory, the system comprising: a connector including data pins, a command pin, and a power signal pin, the power signal pin configured to receive an initial power voltage; means for receiving a first command for reading operation mode information of the system appearing via the command pin, the operation mode information including bus width information which indicates one of first and second operation modes of the system; means for transmitting the operation mode information via the connector in response to the first command; means for receiving data via one of the data pins in the first operation mode; means for receiving data via four of the data pins in the second operation mode; means for receiving via the command pin a second command for reading operation voltage information; means for transmitting via the command pin the operation voltage information in response to the second command; and means for receiving via the command pin a third command for setting an operation mode of the system into one of the first and second operation modes.