Patent ID: 8144512
Filing Date: 2012-03-27
Classification: G06F,G11C

Abstract:
1. A method of operating a memory system including a volatile buffer memory and a non-volatile memory circuit, the non-volatile memory circuit having a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format, the method comprising: receiving data from a host; storing the received data in the buffer memory; transferring the data from the buffer memory to read/write registers of the non-volatile memory circuit; performing a binary write operation of the data from the read/write registers to the first section of the non-volatile memory circuit; and subsequently folding portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes: wherein the multi-state programming operations include a first phase and a second phase and one or more binary write operations are performed between the phases of the multi-state programming operations.