Patent ID: 6534363
Filing Date: 2003-03-18
Classification: H01L

Abstract:
A method for forming a high voltage gate oxide having a high quality and reliability for use with non-volatile memory devices, said method comprising the steps of:providing a semiconductor substrate having a top surface; forming field oxide isolation regions in the top surface of the semiconductor substrates so as to define a first active region, a second active region, and a third active region; forming a sacrificial oxide layer on the top surface of the semiconductor substrate and overlying the first active region, the second active region, and the third active region; removing the sacrificial oxide layer from only the first active region; forming a tunnel oxide layer over the first active region and over the sacrificial oxide layer overlying the second active region and the third active region; forming a floating gate structure in the first active region; exposing the tunnel oxide layer to a nitrogen-containing environment so as to form nitrogen atoms into only the tunnel oxide-to-substrate interface over the first active region subsequent to the formation of the tunnel oxide layer; removing the tunnel oxide layer and the sacrificial oxide layer over the respective second active region and the third active region subsequent to forming the floating gate structure; forming a high voltage gate oxide layer over the second active region and the third active region; removing the high voltage gate oxide layer from only the third active region; and forming a low voltage gate oxide layer over the third active region.