Patent ID: 9105635
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. An integrated circuit (IC) package substrate, comprising: a first conductive vertical transition passing through a thickness of the substrate beginning at a first top-side metal feature on a first substrate side and ending at a first bottom-side metal feature on a second substrate side, opposite the first side, wherein the first bottom-side metal feature is a first signal I/O channel pad; and a second conductive vertical transition passing through the substrate thickness beginning at a second top-side metal feature on the first substrate side and ending at a second bottom-side metal feature on the second substrate side, wherein the second bottom-side metal feature is a second signal I/O channel pad, wherein the perimeters of first and second bottom-side metal features include complementary capacitive coupling stubs, wherein the first and second top-side metal features are associated with a first pitch and the first and second bottom-side metal features are associated with a second pitch, and wherein the first pitch is at least an order of magnitude smaller than the second pitch.