Patent ID: 6829304
Filing Date: 2004-12-07
Classification: H04N

Abstract:
A method for calculating adjusted values for a decoder system time clock (STC) of a decoder for decoding an MPEG stream having a series of embedded clock references CR(0), CR(1), CR(2) . . . CR(n), said method comprising:(a) determining an arrival time for each clock reference at a decoder as measured by a decoder system time clock (STC); (b) generating a sequence of decoder STC time values STC(0), STC(1), STC(2) . . . STC(n) representing the arrival times of a corresponding sequence of clock references CR(0), CR (1), CR(2), . . . , CR(n); and (c) performing a series of trials N to calculate an estimate X of the ratio P/S where P is a function of the frequency of the encoder STC, S is a function of the frequency of the decoder STC and N is a non-negative integer, each trial N comprising: i) calculating the time differential dP(n) between a pair of clock references (CR(n), CR(n+L)) where L is a constant positive integer, each calculation comprising CR(n+L)âˆ’CR(n); ii) calculating the time, differential dS(n) between a pair of corresponding clock reference arrival times (STC(n), STC(n+L)), each calculation comprising STC(n+L)âˆ’STC(n); iii) repeating steps i and ii K times to produce time differentials dP(n) and dS(n) for n=KN, . . . , KN+(Kâˆ’1), where K is a positive integer; and iv) calculating the estimate X(N) according to the formula X(N)=(&Sgr;dP(n))/(&Sgr;dS(n)), where the summations range over K consecutive values of n.