Patent ID: 8508256
Filing Date: 2013-08-13
Classification: G11C,H01L,H03K

Abstract:
1. A logic circuit including: a first transistor whose gate is electrically connected to one of a source or a drain of a second transistor; a third transistor whose gate is electrically connected to one of a source or a drain of a fourth transistor; a fifth transistor whose gate is electrically connected to one of a source or a drain of a sixth transistor; a seventh transistor whose gate is electrically connected to one of a source or a drain of an eighth transistor; a ninth transistor whose gate is electrically connected to one of a source or a drain of a tenth transistor; an eleventh transistor whose gate is electrically connected to one of a source or a drain of a twelfth transistor; a thirteenth transistor whose gate is electrically connected to one of a source or a drain of a fourteenth transistor; and a fifteenth transistor whose gate is electrically connected to one of a source or a drain of a sixteenth transistor including an oxide semiconductor; and wherein each of the first transistor, the third transistor, the fifth transistor, the seventh transistor, the ninth transistor, the eleventh transistor, the thirteenth transistor and the fifteenth transistor includes silicon, wherein each of the second transistor, the fourth transistor, the sixth transistor, the eighth transistor, the tenth transistor, the twelfth transistor, the fourteenth transistor and the sixteenth transistor includes an oxide semiconductor, wherein one of a source and a drain of the eighteenth transistor, one of a source and a drain of the nineteenth transistor, one of a source and a drain of the twentieth transistor and one of a source and a drain of the twenty-first transistor are electrically connected to each other, wherein the other of the source and the drain of the eighteenth transistor, a gate of the twentieth transistor, one of a source and a drain of the first transistor, and one of a source and a drain of the fifth transistor are electrically connected to each other at a first node, wherein the other of the source and the drain of the twenty-first transistor, a gate of the nineteenth transistor, one of a source and a drain of the ninth transistor, and one of a source and a drain of the thirteenth transistor are electrically connected to each other at a second node, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, wherein the other of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the seventh transistor, wherein the other of the source and the drain of the ninth transistor is electrically connected to one of a source and a drain of the eleventh transistor, wherein the other of the source and the drain of the thirteenth transistor is electrically connected to one of a source and a drain of the fifteenth transistor, and wherein the other of the source and the drain of the third transistor, the other of the source and the drain of the seventh transistor, the other of the source and the drain of the eleventh transistor, the other of the source and the drain of the fifteenth transistor and one of a source and a drain of the seventeenth transistor are electrically connected to each other.