Patent ID: 8227860
Filing Date: 2012-07-24
Classification: H01L

Abstract:
1. A vertical DMOS device comprising: a semiconductor substrate, the semiconductor substrate including a source/body structure thereon; and a plurality of interconnects through the source/body structure, each of the plurality of interconnects comprising one slot provided in the semiconductor substrate and at least one metal within the slot to form a plurality of structures, wherein a broad use, high voltage, and high current device is provided, wherein the source/body structure is not grounded and wherein a plurality of ground straps are provided at each end of source stripes laid out in a serpentine fashion to ensure that the device is at a common ground, the plurality of ground straps also forming a matrix of macro arrays, each macro array including a source stripe laid out in a serpentine fashion, wherein the slot includes a layer of gate oxide and the at least one metal along with a layer of polysilicon between the gate oxide and the at least one metal.