Patent ID: 6391756
Filing Date: 2002-05-21
Classification: H01L

Abstract:
A semiconductor processing method of forming a contact opening comprising:forming an array of word lines and bit lines over a substrate surface and having a intervening insulative layer therebetween; partially forming a first contact opening over a first insulative material over a node location with which electrical communication is desired, the first contact opening also outwardly exposing conductive portions of the bit lines; at least partially tilling the first contact opening with a second insulative material formed over the substrate and exposed conductive portions of the bit lines; and etching a second contact opening through the second insulative material, the first insulative material and the intervening layer by removing selected portions of the second insulative material, the first insulative material and the intervening layer sufficient to (a) expose selected areas of the substrate surface at least some of which define bit line contact areas with which electrical communication is desired, and (b) re-expose said conductive portions of the bit lines.