Patent ID: 7272692
Filing Date: 2007-09-18
Classification: G06F

Abstract:
1. An arbitration structure for handling differing types of memory commands in an operating system, comprising: a module for preparing at least one of a plurality of read commands to be executed; a module for preparing at least one of a plurality of write commands to be executed; a module for preparing at least one of a plurality of periodic commands to be executed; a module for pairing an oldest read command of the plurality of read commands or an oldest write command of the plurality of write commands with an available bank of a plurality of banks; a read/write priority module for determining a priority order for the plurality of read commands and the plurality of write commands; a command selection module for selecting the next command to be executed out of a plurality of commands (read, write, and periodic) as a function of the priority order; and a memory controller for executing the memory commands as a function of the command selection module.