Patent ID: 6445210
Filing Date: 2002-09-03
Classification: H03K

Abstract:
A level shifter comprising:first and second n-channel transistors, each including first, second and control terminals, the first and second n-channel transistors receiving an input signal and its complementary signal at their respective control terminals and being powered by a first voltage supply, the first terminals of the first and second n-channel transistors being grounded, the second terminals of the first and second n-channel transistors being connected to first and second nodes, respectively; first and second cross-coupled p-channel transistors, each including first, second and control terminals, the first terminals of the first and second p-channel transistors being connected to a second voltage supply, the second terminals of the first and second p-channel transistors being connected to the first and second nodes, respectively; a current interrupting section for interrupting a short-circuit current by disconnecting the first or second p-channel transistor from the second voltage supply when the input signal changes its level; and at least one resistor for connecting the second voltage supply to the first or second node while the input signal is in a steady state, wherein the current interrupting section comprises: a third p-channel transistor disposed between the second voltage supply and the first p-channel transistor; and a fourth p-channel transistor disposed between the second voltage supply and the second p-channel transistor, and wherein the resistor is a transistor connected to third and fourth nodes, the first and third p-channel transistors being connected together at the third node, the second and fourth p-channel transistors being connected together at the fourth node.