Patent ID: 6130555
Filing Date: 2000-10-10
Classification: H03K

Abstract:
Driver circuitry for use in applying signals to interconnection conductors on a programmable logic device comprising:a plurality of first interconnection conductors;a plurality of second interconnection conductors;a plurality of buffer circuits, each having a buffer input lead and a buffer output lead, wherein each buffer circuit is configured to receive and buffer an applied signal on the buffer input lead in order to produce a buffered output signal on the buffer output lead;a static programmable connection associated with each of the buffer circuits, the static programmable connection having a static programmable connection input lead connected to the buffer output lead, wherein the static programmable connection is configured to apply the buffered output signal of the associated buffer circuit to a respective one of the first interconnection conductors associated with that buffer circuit if the static programmable connection is so programmed;a pass gate associated with each of the buffer circuits, the pass gate having a pass gate input lead connected to the buffer output lead, wherein the pass gate is configured to apply the buffered output signal of the associated buffer circuit to a respective one of the second interconnection conductors associated with that buffer circuit if the pass gate is enabled; andenable signal generating circuitry configured to produce a signal which selectively enables a plurality of the pass gates in parallel.