Patent ID: 9059106
Filing Date: 2015-06-16
Classification: H01L

Abstract:
1. A flip chip package, comprising: a flipped integrated circuit (IC) chip including a passivation layer containing a plurality of openings to an inner final wiring level; a plurality of polyimide (PI) pads disposed on said passivation layer, each PI pad corresponding to a single opening in said passivation layer and having a variable pad height that increases with a radial distance from a central neutral point (DNP) on said flipped IC chip; a redistribution layer (RDL) disposed on said passivation layer and said plurality of PI pads, said RDL including a plurality of conductive traces, each conductive trace extending from a lower surface contact proximate to said final wiring level through said single opening to an upper surface contact disposed above a PI pad of said plurality of PI pads; a plurality of electrical connectors, each electrical connector having a same height and being disposed over said upper surface contact of said each conductive trace; and a chip carrier opposing said flipped IC chip, said chip carrier including a plurality of flip chip attaches, each flip chip attach having a solder join to a corresponding one of said plurality of electrical connectors on said flipped IC chip.