Patent ID: 7028247
Filing Date: 2006-04-11
Classification: G06F,H03M

Abstract:
1. A processing circuit of a microprocessor for processing an input data to generate an output data, the microprocessor comprising a Galois field multiplier electrically connected to the processing circuit for, performing a Galois field multiplication upon a plurality of processing data being processed by the processing circuit, the processing circuit comprising: a first register for storing the input data; a plurality of processing units each being cascaded in series, a starting processing unit of the processing units electrically connected to the first register, each processing unit comprising an input port, an output port, a Galois field adder electrically connected between the input port and the output port, and a second register electrically connected to the Galois field adder; and a controller for controlling operation of the processing circuit; wherein the controller controls each processing unit to transmit processing data requiring Galois field multiplication to the Galois field multiplier, and the processing data outputted from the Galois field multiplier are transmitted back to each corresponding processing unit.