Patent ID: 7269437
Filing Date: 2007-09-11
Classification: H04B,H04W

Abstract:
1. A transmission power control circuit using the W-CDMA scheme, comprising: an SIR estimation circuit for estimating S/N ratio of each of 1 to N signals (N is an integer which is 1 or more) from a despread circuit and outputting estimation results (hereinafter referred to as SIR values); and SIR addition means for adding the 1 to N SIR values output from the SIR estimation circuit, wherein, when difference between delay values to an FR signal indicating a frame timing of paths among input 1 to N path is equal to or smaller than a predetermined value, the SIR addition means regards those paths as the same, multiplies the 1 to N SIR values by corresponding weighting coefficients, and then adds the SIR values.