Patent ID: 8707117
Filing Date: 2014-04-22
Classification: G01R

Abstract:
1. A method to test a data path that traverses each of a plurality of distinct clock domains, the method comprising: generating test data and a common capture clock signal that is shared between each of the plurality of clock domains; launching the test data to a first one of the plurality of clock domains; for each clock domain of the plurality of clock domains, providing a selection signal to an encoder to thereby select the clock domain to receive the common capture clock signal while the test data propagates through the selected clock domain, wherein the encoder provides a plurality of encoder outputs configured to provide a unique domain select signal to each of the plurality of clock domains, and wherein the encoder is configured to activate only a single one of the encoder outputs in response to the selection signal; and capturing the test data at a second one of the plurality of clock domains after the test data has propagated through each of the plurality of clock domains.