Patent ID: 6635551
Filing Date: 2003-10-21
Classification: H01L

Abstract:
An improved method of soft error protection in an integrated circuit comprising the steps of:providing a substrate; providing a first region of said substrate having a first conductivity type; providing a pair of transistors having one of a common source or drain, each transistor of said pair of transistors also having the other of a source or a drain, said pair of transistor disposed in a first portion of said first region; providing a capacitor coupled to said common source or drain; providing a second region below said first region having a second conductivity type different from said first conductivity type; forming a trench surrounding said pair of transistors, said trench having a depth at least substantially as deep as said first region; and filling said trench with a nonconductive material sufficient to substantially eliminate soft errors due to electron hole pairs caused by ionizing radiation emanating external to said trench disposed in and extending entirely through said first region and at least to said second region and entirely surrounding said pair of transistors within said first region to isolate said pair of transistors from other portions of said first region external to said first portion.