Patent ID: 6130117
Filing Date: 2000-10-10
Classification: H01L

Abstract:
A method of providing semiconductor circuit protection comprising:doping a first region located within a well region within a substrate with a first conductivity type of dopant, wherein the first region forms first doped region;forming a first vertical bipolar transistor by:doping the substrate with a second conductivity type of dopant to form a first collector;doping the well region within the substrate with the first conductivity type of dopant to form a first base; anddoping a second doped region located within the well region with the second conductivity type of dopant to form a first emitter;forming a second vertical bipolar transistor by:doping a base region within the well region and with the second conductivity type of dopant to form a second base; anddoping a third doped region located within the base region with the first conductivity type of dopant to form a second emitter, wherein the well region comprises a second collector of the second vertical bipolar transistor;doping a fourth doped region located within the base region with the second conductivity type of dopant to form a contact region to the base of the second vertical bipolar transistor;doping a fifth doped region located within the substrate with the second conductivity type of dopant to form a contact region to the substrate; andconnecting the fifth doped region to the fourth doped region.