Patent ID: 7161436
Filing Date: 2007-01-09
Classification: H03L

Abstract:
1. A charge pump and loop filter circuit of a phase locked loop, comprising: a first input current source electrically connected to a first node of the circuit for supplying a first current to the circuit, the first current being equal to a predetermined amount of current multiplied by a first factor; a second input current source electrically connected to a second node of the circuit for supplying a second current to the circuit, the second current being equal to the predetermined amount of current multiplied by a second factor; a first output current source electrically connected to a third node of the circuit for outputting the first current from the circuit; a second output current source electrically connected to a fourth node of the circuit for outputting the second current from the circuit; a first capacitor electrically connected between an output node and an intermediate node of the circuit; a resistor electrically connected between the intermediate node and a reference node of the circuit; a plurality of up pulse switches controlled by an up pulse control signal for controlling current flow such that in a charging mode of the circuit, the second current flows from the second node to the intermediate node, the first current flows from the first node through the output node and through the first capacitor to the intermediate node for charging the first capacitor, and a sum of the first current and the second current flows from the intermediate node through the resistor and out through the reference node; and a plurality of down pulse switches controlled by a down pulse control signal for controlling current flow such that in a discharging mode of the circuit, the sum of the first current and the second current flows from the reference node through the resistor to the intermediate node, the second current flows from the intermediate node and out through the second output current source, and the first current flows from the intermediate node through the first capacitor and out through the first output current source for discharging the first capacitor.