Patent ID: 6147900
Filing Date: 2000-11-14
Classification: B82Y,G11C,H01F,H01L

Abstract:
A ferromagnetic thin-film based digital memory circuit, said circuit comprising:a pair of switching devices, each having first and second terminating regions and a control region by which that said switching device is capable of being directed to provide a conductive path between that said switching device first and second terminating regions of a selected conductivity;a pair of load devices each capable of conducting current therethrough to result in a voltage drop thereacross and each electrically connected in series with said second terminating region of a corresponding one of said plurality of switching devices and interconnection means suited for electrical connection to a source of electrical energization, said pair of load devices each also being coupled to a control region of that one of said pair of switching devices opposite that with which it is electrically connected in series;a first pair of bit structures each electrically connected in series with said second terminating region of a corresponding one of said plurality of switching devices so as to result in different value voltages at said control regions of said pair of switching devices for selected increases in voltage magnitude on said interconnection means, said bit structures comprising:a nonmagnetic intermediate layer, said intermediate layer having two major surfaces on opposite sides thereof; anda memory film of an anisotropic ferromagnetic material on each of said intermediate layer major surfaces having switching thresholds for magnetizations of said film adjacent each of said intermediate layer major surfaces that differ in value for a switching of these magnetizations from both being directed initially at least in part in substantially a common direction to being directed at least in part in substantially opposite directions versus a switching from being directed initially at least in part in substantially opposite directions to both being directed at least in part in substantially a common direction;a first pair of cell selection devices, each having first and second terminating regions and a control region by which that said cell selection device is capable of being directed to provide a conductive path between that said selection device first and second terminating regions of a selected conductivity, said first pair of cell selection devices each electrically connected at said first terminating region thereof in series with a corresponding one of said first pair of bit structures; anda pair of word line structures each having a pair of word line end terminal regions adapted to conduct electrical current in at least one direction therethrough, each of said pairs of word line end terminal regions having an electrical conductor electrically connected therebetween which is located across an electrical insulating layer from said memory film on one of said major surfaces of said intermediate layer of a corresponding one of said bit structures.