Patent ID: 7106097
Filing Date: 2006-09-12
Classification: G01R,H03K

Abstract:
1. An integrated circuit comprising; A. functional core logic within the integrated circuit; B. an output terminal for outputting data from the integrated circuit; C. a memory having first and second data inputs, first and second control inputs, and a memory data output; D. a first connection formed between the memory data output and the output terminal; E. a second connection formed between a data output from a first circuit of the functional core logic within the integrated circuit and the first data input; F. a third connection formed between a data output from a second circuit of the functional core logic within the integrated circuit and the second data input; G. a fourth connection formed between a control output from a third circuit of the functional core logic within the integrated circuit and the first control input; and H. a fifth connection formed between a control output from a fourth circuit of the functional core logic within the integrated circuit and the second control input.