Patent ID: 8516202
Filing Date: 2013-08-20
Classification: G06F

Abstract:
1. A computer implemented method for execution of a current transaction on a hybrid transactional memory system having a hardware transactional memory (HTM) system provided for a plurality of CPUs (computer processing units) of the system, comprising: initiating the current transaction for a CPU having a mode register which enables a CPU for treating transactional memory operations in two different modes, the two different modes including a first mode causing the CPU to use a HTM mode, and a second mode causing the CPU configured to operate in an assisted transaction mode; continuing execution of the current transaction based on the CPU being in the first mode, in the first mode the CPU remaining based on the HTM system handling the current transaction; coordinating execution of the current transaction and other transactions over shared transactional memory space with an assist thread facility that the CPU should operate in an assisted transaction mode, and based on the CPU operating in the assisted transaction mode determining the current transaction's continued execution by the assist thread facility and software lock table settings; starting the execution of a first transaction for the first time in HTM mode, based on each of the plurality of CPUs having coupled to said transactional facility control logic a transaction failure counter for holding a failure count, and a transaction failure limit register for holding a limit value; making a decision based on the outcome of the first transaction execution based on the HTM not detecting a conflict for the storage locations accessed by the first transaction and the first transaction not exceeding the hardware limits of the transaction failure limit register and the first transaction does not attempt to use system operations that are prohibited inside of a plurality of transactions; declaring the plurality of transactions successful and the results of the instructions executing in the first transaction being committed to the architectural state of the system; and failing the first transaction and incrementing the transaction failure count register based on a conflict being detected or an abort being indicated, and the temporary results of a partially executed first transaction are discarded, and a failure count is compared against a recorded failure count limit and a decision is made based upon the comparison, and based on the failure count not exceeding the limit, the first transaction is tried again in the HTM mode.