Patent ID: 6285231
Filing Date: 2001-09-04
Classification: H03F

Abstract:
An apparatus including a reference buffer, comprising:a first amplifier having first and second input terminals and an output terminal, said first amplifier first input terminal configured to receive a first reference signal, said first amplifier including a voltage gain amplifier coupled to an adaptive biasing transconductance stage in series thereto;a second amplifier having a second amplifier first input terminal, a second amplifier second input terminal and a second amplifier output terminal;a common node;an output terminal;a first inductance coupled between said first amplifier output terminal and said common node;a second inductance coupled between said first amplifier second input and said common node; anda third inductance coupled to said common node and said output terminal;wherein said first inductance and said second inductance separate said first amplifier output terminal, and said first amplifier second input terminal, respectively, from said common node;wherein said second amplifier output terminal and said second amplifier second input terminal are coupled to said third inductance such that said second amplifier output terminal and second amplifier second input terminal are separated from said common node; and furtherwherein said second amplifier first input terminal is configured to receive a second reference signal.