Patent ID: 7514318
Filing Date: 2009-04-07
Classification: H01L

Abstract:
1. A method for fabricating a non-volatile memory cell, the method comprising: providing a substrate of a first conductivity type; forming a first dopant region of a second conductivity type in the substrate; forming a second dopant region of the first conductivity type in the first dopant region; growing a first isolation region over a first portion of the substrate, the first dopant region, and the second dopant region, the first isolation region being in contact with the substrate, the first dopant region, and the second dopant region; growing a second isolation region over a second portion of the substrate, the first dopant region, and the second dopant region, the second isolation region being in contact with the substrate, the first dopant region, and the second dopant region; defining a contact region of the first conductivity type in the second dopant region, the contact region extending between the first isolation region and the second isolation region such that the first isolation region and the second isolation region are both in contact with the contact region, the contact region being more heavily doped than the second dopant region; depositing a gate oxide layer to form a first gate dielectric atop the first isolation region and a portion of the contact region; and overlaying a gate conductive layer on top of the gate oxide layer to form a first gate conductor atop the first gate dielectric.