Patent ID: 6653189
Filing Date: 2003-11-25
Classification: H01L

Abstract:
A method of making a flash memory cell, comprising:providing a substrate having a flash memory cell thereon, the flash memory cell has a gate length of about 0.18 &mgr;or less; forming a self-aligned source mask over the substrate, the self aligned source mask having openings corresponding to source lines; implanting a source dopant of a p type boron in the substrate through the openings in the self-aligned source mask corresponding to source lines, wherein the source dopant is implanted at an energy from about 15 keV to about 30 keV to a dosage from about 1Ã—1013 atoms/cm2 to about 5Ã—1014 atoms/cm2, with the proviso that the substrate is not heated after implanting the source dopant and before implanting a MDD implant; removing the self-aligned source mask from the substrate; forming a MDD mask over the substrate, the MDD mask covering the source lines and having openings corresponding to drain lines; and implanting a medium dosage drain implant of an n type to form a drain region in the substrate adjacent the flash memory cell, wherein the p type boron is different from the n type, and the medium dosage drain implant is implanted at an energy from about 35 keV to about 60 keV to a dosage from about 5Ã—1013 atoms/cm2 to about 5Ã—1015 atoms/cm2.