Patent ID: 6111322
Filing Date: 2000-08-29
Classification: H01L,H05K,Y02P

Abstract:
A packaging structure, comprising:a semiconductor device including a semiconductor chip mounted on one surface of a wiring board via first bump electrodes, and a plate member having a larger plane size than that of said semiconductor chip, a fixing area on one surface of said plate member being fixed on the rear surface opposite to the principal surface of said semiconductor chip via solder, and said wiring board being mounted on one surface of a mounting board via second bump electrodes;a radiating fin member fixed on the rear surface opposite to said one surface of said plate member via an elastic layer; andsupporting bumps, formed by a metallic material with a lower melting point than that of said solder and a higher melting point than that of said second bump electrodes, on the rear surface of said wiring board and set to the same or a lower height compared with that of said second bump electrodes.