Patent ID: 9224490
Filing Date: 2015-12-29
Classification: G11C,H02M,H03K

Abstract:
1. A voltage switch circuit connected to a memory cell of a non-volatile memory, the voltage switch circuit comprising: a first transistor, wherein a source terminal of the first transistor is connected to a first voltage source, and a gate terminal of the first transistor is connected to a node a a second transistor, wherein a source terminal of the second transistor is connected to the first voltage source, and a gate terminal of the second transistor is connected to a node b a third transistor, wherein a source terminal of the third transistor is connected to a drain terminal of the first transistor, a gate terminal of the third transistor receives an enabling signal, and a drain terminal of the third transistor is connected to a node a a fourth transistor, wherein a source terminal of the fourth transistor is connected to a drain terminal of the second transistor, a gate terminal of the fourth transistor receives the enabling signal, and a drain terminal of the fourth transistor is connected to a node b a fifth transistor, wherein a source terminal of the fifth transistor is connected to the node a a sixth transistor, wherein a source terminal of the sixth transistor is connected to the node b a first control circuit connected to the node a a second control circuit connected to the first output terminal and the second output terminal, wherein in a program mode and an erase mode of the non-volatile memory, the first voltage source provides a high voltage and the second voltage source provides an on voltage, wherein in a read mode of the non-volatile memory, both of the first voltage source and the second voltage source provide a high logic level voltage, wherein the high voltage is higher than the on voltage, and the on voltage is higher than the high logic level voltage.