Patent ID: 6391752
Filing Date: 2002-05-21
Classification: H01L

Abstract:
A method of fabricating a SOI semiconductor device, comprising the steps of:(a) forming a semiconductor layer on a semiconductor substrate via a first insulation layer; (b) forming a sacrificial layer on the semiconductor layer; (c) forming a window in the sacrificial layer corresponding to the location of a gate electrode to be formed; (d) forming a high-concentration impurity region in said semiconductor substrate, by implanting ions of the same conductivity type as the semiconductor substrate through the window in the sacrificial layer, an impurity concentration of said impurity region being higher than that of said semiconductor substrate; (e) forming a gate electrode within said window; (f) removing said sacrificial layer; and (g) forming source and drain regions in said semiconductor layer by implanting doping ions whose conductivity type is opposite to that of the semiconductor substrate, using said gate electrode as a mask.