Patent ID: 7961542
Filing Date: 2011-06-14
Classification: G06F,G11C,Y02D

Abstract:
1. A memory module comprising: a plurality of memory devices; and a memory hub configured to receive memory requests corresponding to a first region of one or more of the plurality of memory devices, the memory hub operable to communicate the memory requests to the one or more of the plurality of memory devices and transmit memory data from the one or more of the plurality of memory devices in response to at least one of the memory requests; and a selection block configured to receive the memory requests corresponding to the first region of one or more of the plurality of memory devices and to receive an input signal indicating a number of defective cells that are replaced by redundant cells in at least one region of one or more of the plurality of memory devices selectable by the selection block relative to that of at least another region of the one or more of the plurality of memory devices selectable by the selection block, the selection block operable to map the memory requests to a second region of the one or more of the plurality of memory devices based on the input signal.