Patent ID: 6518107
Filing Date: 2003-02-11
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, which method comprises the steps of:(a) providing a silicon (Si)-based semiconductor substrate having a surface; (b) introducing a non-arsenic (As)-containing n-type dopant into at least one selected portion of said substrate to form a junction within said substrate at a first depth below said substrate surface, such that the concentration vs. depth profile of said non-As-containing dopant has a first peak at a second depth below said substrate surface; (c) forming a layer of nickel (Ni) on said substrate surface overlying said at least one selected portion of said substrate; and (d) reacting said Ni layer with said at least one selected portion of said Si-based substrate to form a layer of an electrically conductive nickel silicide (NiSi) extending below said substrate surface to a third depth which is substantially equal to said second depth and less than said first depth, whereby the interface between said NiSi layer and said at least one selected portion of said Si-based substrate at said third depth is substantially smooth and penetration of said junction at said first depth due to roughness of said NiSi layer is substantially eliminated.