Patent ID: 6181213
Filing Date: 2001-01-30
Classification: H03L

Abstract:
A phase-locked loop having a multi-phase voltage controlled oscillator, comprising:a divided-by-N counter which outputs a clock signal with frequency 1/N that of its input clock signal;a divided-by-M counter which outputs a clock signal with frequency 1/M that of its input clock signal;a phase frequency detector for receiving the output signal from said divided-by-M and the output signal from said divided-by-N counter, outputting a control signal that is determined by the phase difference and frequency difference between the two output signals;a charge pump that receives the control signal outputted from said phase frequency detector;a loop filter that is coupled to and cooperates with said charge pump to output a voltage signal, the variation of the voltage signal depending on the control signal;a multi-phase voltage controlled oscillator that receives the voltage signal generated by said loop filter and outputs a plurality of clock signals of the same frequency and different phases, wherein one of the clock signals is used as the output clock signal of the phase-locked loop;a switching unit that is connected between said divided-by-M counter and said multiphase voltage controlled oscillator for selecting a clock signal among the output clock signals from the multi-phase voltage controlled oscillator as the input signal of the divided-by-M counter; anda clock counter that generates a control signal for controlling the switching time of said switching unit.