Patent ID: 8051311
Filing Date: 2011-11-01
Classification: G06F

Abstract:
1. A power supply circuit for a central processing unit (CPU), comprising: a first control circuit connected to the basic input output system (BIOS) of a computer to receive a CPU identification signal; a switch circuit connected to the first control circuit, and also connected between a CPU and a voltage regulator module (VRM), the VRM comprising a VRM power state indication (PSI) pin connected to a high level voltage source; an operational amplifying circuit connected to the VRM to receive a current monitor signal; and a second control circuit connected to the operational amplifying circuit, the first control circuit, and the VRM; wherein upon a condition that the CPU identification signal is at a high level and the current monitor signal output from the VRM is lower than a reference voltage of the operational amplifying circuit, the first control circuit is capable of outputting a first control signal to turn off the switch circuit, and the operational amplifying circuit is capable of outputting a second control signal to the second control circuit to ground the VRM PSI pin; upon a condition that the CPU identification signal is at a low level and the current of the CPU is lower than a determined value, the first control circuit is capable of outputting a third control signal to turn off the switch circuit, and the CPU is capable of outputting a low level voltage signal to the VRM PSI pin via the switch circuit.