Patent ID: 6351192
Filing Date: 2002-02-26
Classification: H01P

Abstract:
A balun circuit comprising:(a) a dielectric substrate having substantially planar opposing surfaces; (b) a groundplane conductor layer disposed on a first one of said opposing surfaces; (c) a first conductor layer disposed on a second one of said opposing surfaces and comprising first and second conducting strips electrically isolated from each other and having a balance point gap between first ends thereof, wherein balanced port terminals are provided on respective sides of said balance point gap, said first and second strips having second ends that are short-circuited to said groundplane conductor layer; (d) a second conductor layer disposed on said second one of said opposing surfaces and comprising a third conducting strip spaced apart from and substantially parallel to said first and second conducting strips, one end of said third conducting strip providing an unbalanced port terminal and another end of said third conducting strip being open-circuited; (e) a third conductor layer disposed on said second one of said opposing surfaces and comprising a fourth conducting strip comprising first and second sections having a gap therebetween and each being spaced apart from and substantially parallel to said first, second and third conducting strips, said first and second sections of said fourth conducting strip each being connected to said groundplane conductor layer; and (f) a plurality of bond wires interconnecting said first section of said third conductor layer with said first conducting strip and a plurality of bond wires interconnecting said second section of said third conductor layer with said second conducting strip, wherein: said third conducting strip comprises a first set of series-connected line sections having diverse impedances and a second set of series-connected line sections having diverse impedances which are a mirror opposite of said diverse impedances of said first set of line sections relative to a center plane of said balun circuit passing through said balance point gap and being orthogonal to said opposing surfaces of said dielectric substrate, and said first conducting strip has an impedance which is a mirror opposite of an impedance of said second conducting strip relative to said center plane, whereby phase and amplitude balance at said balance point gap is achieved by said mirror opposite relationship of said impedances of said first and second set of line sections and said mirror opposite relationship of said impedances of said first and second conducting strips.