Patent ID: 6097214
Filing Date: 2000-08-01
Classification: G09G

Abstract:
A power output stage for the control of plasma screen cells, comprising:an input for receiving a low voltage logic input signal, a control output for issuing a high voltage output control signal, and an output circuit including a charge transistor receiving a high voltage potential on a drain and having a source connected to the control output and a discharge transistor receiving a reference potential on a source and having a drain connected to the control output, and a control circuit issuing control signals to the charge and discharge transistors to control these transistors according to the logic input signal, wherein the charge and discharge transistors are of N-channel VDMOS type, the charge transistor being arranged to form a compound P-type transistor, and wherein the control circuit is arranged so that a potential of a control gate of the charge transistor drops more rapidly than the output potential when the logic input signal controls a discharge of the control output.