Patent ID: 8792294
Filing Date: 2014-07-29
Classification: G06F,G11C

Abstract:
1. An access method for a dynamic random access memory (DRAM), comprising: partitioning a row address into a first portion and a second portion; providing the first portion of the row address via an address bus and a first active command via a command bus to the DRAM; providing the second portion of the row address via the address bus and a second active command via the command bus to the DRAM after the first active command is provided; and providing a column address via the address bus and an access command via the command bus to the DRAM after the second active command is provided, wherein the address bus is formed by a plurality of address lines, and a quantity of the address lines is smaller than the number of bits of the row address, and the access command is a read command or a write command.