Patent ID: 6323115
Filing Date: 2001-11-27
Classification: H01L

Abstract:
A process for producing a semiconductor integrated circuit device having a dual gate CMOS comprising the steps of:(a) forming a polycrystalline silicon film over a gate insulating film containing a silicon oxide film formed over a silicon surface representing a major surface of a semiconductor wafer;(b) forming a refractory metal film mainly comprising tungsten over said polycrystalline silicon film via a barrier layer containing tungsten nitride;(c) forming a gate electrode by patterning said polycrystalline silicon film, said barrier layer and said refractory metal film; and(d) after said step (c), subjecting said silicon surface and said polycrystalline silicon film doped with boron, positioned in a part corresponding to an edge part of said gate electrode, to a thermal oxidation treatment in a mixed gas atmosphere containing a hydrogen gas and steam.