Patent ID: 6589858
Filing Date: 2003-07-08
Classification: H01L,Y10S

Abstract:
A method of forming a metal gate on a wafer, comprising the steps of:forming a gate dielectric on a substrate; forming a first metal or metal compound layer consisting of a first metal on the gate dielectric; forming a first layer of a second metal having a different compound than the first metal or metal compound layer on the first metal layer; forming a tracer layer of a third metal on the first layer of second metal; forming a second layer of the second metal on the tracer layer; etching the second layer of the second metal with a first etchant chemistry and monitoring the etching until etching of the tracer layer is detected; and switching to a second etchant chemistry to continue etching until the tracer layer, the first layer of second metal, and the first metal or metal compound layer are etched.