Patent ID: 8168999
Filing Date: 2012-05-01
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a N conductive type and having a first side and a second side opposite to the first side; an active element cell area including an IGBT cell region and a diode cell region and arranged in the semiconductor substrate; a first semiconductor region having a P conductive type and arranged in a first surface portion on the first side of the semiconductor substrate in the active element cell area, wherein the first semiconductor region provides both of a channel forming region of the IGBT cell region and an anode region of the diode cell region; a second semiconductor region having the P conductive type and arranged in a second surface portion on the second side of the semiconductor substrate in the IGBT cell region, wherein the second semiconductor region provides a collector region of the IGBT cell region; a third semiconductor region having the N conductive type and arranged in a third surface portion on the second side of the semiconductor substrate in the diode cell region, wherein the third semiconductor region provides a cathode region of the diode cell region; a fourth semiconductor region having the P conductive type and arranged in a fourth surface portion on the first side of the semiconductor substrate, wherein the fourth semiconductor region surrounds the active element cell area, and the fourth semiconductor region is electrically coupled with the first semiconductor region; a fifth semiconductor region having the P conductive type and arranged in a fifth surface portion on the first side of the semiconductor substrate, wherein the fifth semiconductor region surrounds the fourth semiconductor region; a sixth semiconductor region having the N conductive type and arranged in a sixth surface portion on the second side of the semiconductor substrate, wherein the sixth semiconductor region is disposed below the fourth semiconductor region, and a pad for coupling with a bonding wire disposed on the fourth semiconductor region via an insulation film, wherein the sixth semiconductor region is formed around an entire outer circumference of the active element cell area, wherein the second semiconductor region, the third semiconductor region and the sixth semiconductor region are electrically coupled with each other, wherein a whole of the sixth semiconductor region is formed opposite a whole of the fourth semiconductor region.