Patent ID: 6284638
Filing Date: 2001-09-04
Classification: H01L

Abstract:
A manufacturing method of a semiconductor device comprising the steps of:forming a conducting film on the entire surface of a semiconductor layer having a gate electrode formed on the semiconductor layer through a gate insulating film, a source/drain region formed in the semiconductor layer at the both sides of the gate electrode, an insulating side wall formed on the side surface at the both sides of the gate electrode, and an insulating film formed at the top of the gate electrode;anisotropically etching the conducting film and thereafter patterning the conducting film to leave a conducting side wall so as to cover the side surface of the insulating side wall of one side and contact the source/drain region;forming a covering insulating film for covering the gate electrode, source/drain region, insulating side wall, and conducting side wall; andpatterning the covering insulating film to form a contact hole on the source/drain region of the one side.