Patent ID: 8999846
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A method of forming an integrated circuit structure comprising: forming via openings in an insulator layer; forming conductive via material within said via openings; and forming a laminated structure of insulator layers on said insulator layer, said forming of said laminated structure of insulator layers comprising: said laminated structure of insulated layers being formed to have a top surface and a bottom surface opposite said top surface, said insulator layers being formed between said top surface and said bottom surface of said laminated structure of insulator layers, said repeating of said forming of said conductive via material in said via openings electrically connecting said conductive via material within said corresponding ones of said via openings to form continuous electrical via paths through said insulator layers between said top surface and said bottom surface of said laminated structure of insulator layers, said positioning of said corresponding ones of via openings within each of said continuous electrical via paths causing said forming of said conductive via material to form a diagonal structural path of said conductive via material through said laminated structure of insulator layers, and said diagonal structural path being formed non-perpendicular to said top surface and said bottom surface.