Patent ID: 8283752
Filing Date: 2012-10-09
Classification: H01F,H01L

Abstract:
1. A semiconductor device comprising: one or two semiconductor chips that include an interconnect layer; and an interconnect substrate attached to an interconnect layer side of said one or two semiconductor chips, wherein said one or two semiconductor chips includes: a first circuit that generates a signal; a second circuit that processes said signal; a first inductor that is formed in said interconnect layer, and is connected to one of said first circuit and said second circuit; a chip-side connecting terminal that is formed in an uppermost layer of said interconnect layer, and is connected to the other one of said first circuit and said second circuit, said interconnect substrate includes: a second inductor that is located above said first inductor; and a substrate-side connecting terminal that is connected to said second inductor, and is located above said chip-side connecting terminal, said chip-side connecting terminal and said substrate-side connecting terminal are connected through a first solder ball or a first bump.