Patent ID: 6583041
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A method of fabricating a plurality of microdevices, comprising the steps of:forming a first regular array of lines and spaces from a first layer of material formed on a substrate, wherein widths of all of the lines of the first regular array are substantially the same as a first line width and widths of all of the spaces of the first regular array are substantially the same as a first space width; patterning the first regular array of lines and spaces to form a plurality of first microdevice components, each first microdevice component corresponding to one of the plurality of microdevices; providing an intermediate layer over the first microdevice components; forming a second regular array of lines and spaces from a second layer of material formed on the intermediate layer, wherein widths of all of the lines of the second regular array are substantially the same as a second line width and widths of all of the spaces of the second regular array are substantially the same as a second space width; patterning the second regular array of lines and spaces to form a plurality of second microdevice components, each second microdevice component corresponding to one of the plurality of first microdevice components; and forming contact holes in the intermediate layer to establish conductivity between each associated first microdevice component and second microdevice component.