Patent ID: 6661709
Filing Date: 2003-12-09
Classification: G11C

Abstract:
A nonvolatile memory device comprising:a plurality of memory cells; and a status register, wherein each of said memory cells has a threshold voltage within one of a plurality of threshold voltage ranges, one of which is for an erase state and others are for program states, said nonvolatile memory is capable of performing an erase operation and a program operation, in said erase operation each threshold voltage of selected memory cells of said plurality moves within a threshold voltage range for said erase state, and in said program operation each threshold voltage of said selected memory cells moves within a desired threshold voltage range according to data, wherein said status register has a plurality of status bits, wherein a first bit in said status bits indicates performance of said erase operation or said program operation, wherein a second bit in said status bits indicates whether all threshold voltages of said selected memory cells move within the desired threshold voltage range or at least one threshold voltage of said selected memory cells does not move within the desired threshold voltage range, and wherein a third bit in said status bits indicates that at least one threshold voltage of said selected memory cells moves over the desired threshold voltage range.