Patent ID: 8423999
Filing Date: 2013-04-16
Classification: G06F,Y02D

Abstract:
1. A computer system comprising: a physical computer including at least one physical processor; a virtual machine monitor; and a virtual machine including at least one virtual processor such that at least one physical processor is time-shared by the virtual machine monitor; wherein: the virtual machine monitor controls switching of a normal operating state or a halt state of the physical processor and switching of a virtual normal operating state or a virtual halt state of the virtual processor as scheduling of the physical processor and the virtual processor; when the virtual processor in the virtual halt state is waiting to cancel the virtual halt state and switch the virtual halt state to the normal operating state, the virtual machine monitor selects either of a busy wait method for making repeated examination until the virtual halt state exits while the virtual processor stays on the physical processor and a blocking method for suspending execution of the virtual processor and scheduling another virtual processor on the physical processor while yielding the operating physical processor and checking off scheduling of the virtual processor to the physical processor, based on information of a virtual processor halt duration of the virtual processor; a duration from a time point where the virtual processor begins to wait for setting a virtual processor halt exit notification flag of the virtual processor to be true to a time point where the virtual processor halt exit notification flag is set to be true is regarded as the virtual processor halt duration; an average value of the latest N virtual processor halt durations of the virtual processor is regarded as a virtual processor halt duration predicted value of the virtual processor; the virtual processor halt duration is updated by adding to the previous sum of the latest N virtual processor halt durations and subtracting the oldest virtual processor halt duration and then the updated sum of latest N virtual processor halt durations is divided by N to thereby calculate the virtual processor halt duration predicted value of the virtual processor which will be halted at a next time; when the virtual processor waits for virtual halt exit, the virtual processor halt duration predicted value of the virtual processor is added to the current time to thereby calculate a virtual processor halt exit time predicted value of the virtual processor; when the blocking method is selected as a virtual processor halt exit wait method, the calculated virtual processor halt exit time predicted values are sorted in ascending order of the latest due date and inserted in a virtual processor exit time management queue corresponding to each physical processor to thereby manage a plurality of virtual processor halt exit time predicted values of the virtual processor in accordance with each physical processor so that the virtual processor halt exit time predicted value is removed from the virtual processor halt exit time management queue when the virtual halt state of the processor exits; and either of the busy wait method or the blocking method is selected dynamically as a virtual processor halt exit wait method in accordance with the plurality of predicted values calculated based on the virtual processor halt durations.