Patent ID: 7569478
Filing Date: 2009-08-04
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device having a dual damascene structure, comprising the steps of: loading a semiconductor substrate formed by stacking a trench mask and a via hole resist mask on an insulating film into a processing chamber; forming a via hole by etching the insulating film through the via hole resist mask; removing the via hole resist mask by an ashing process; forming on an underlayer of the insulating film a protective film having an organic material for protecting the underlayer serving as a bottom of the via hole, the protective film also being formed over the trench mask; forming a trench by etching the insulating film through the trench mask; and unloading the semiconductor substrate from the processing chamber after the via hole forming step, the resist mask removing step, the protective film forming step and the trench forming step are completed in said processing chamber, wherein the via hole forming step, the resist mask removing step, the protective film forming step and the trench forming step are performed without removing the semiconductor substrate from said processing chamber.