Patent ID: 9194884
Filing Date: 2015-11-24
Classification: G01R,H01H,H01L,H02J,H03F

Abstract:
1. An integrated circuit with analog device fault detection comprising: an integrated circuit die including an operational amplifier (op-amp) having a power input, a V+ input, a V− input and an op-amp output, an on-line fault detector coupled to said V+ input and said V− input and having a fault detector output, and a control circuit coupled to said fault detector and responsive to said fault detector output, wherein said on-line fault detector is a COMMON MODE fault detector including detector self-test (DST) circuitry to test said on-line fault detector and a test input coupled to said control circuit; an electrically insulating package enclosing said integrated circuit die; and a number of pins extending through said electrically insulating package and connected to said integrated circuit die; wherein said COMMON MODE fault detector includes a first window comparator having an input selectively coupled to said V+ input to develop a first fault signal when the voltage on said V+ input is out of a first range and a second window comparator having an input selectively coupled to said V− input which produces a second fault signal when said voltage on said V− input is out of a second range, whereby a fault signal is applied to said fault detector output upon the occurrence of at least one of said first fault signal and said second fault signal.