Patent ID: 6782131
Filing Date: 2004-08-24
Classification: G06F,G06K,G09G

Abstract:
A method for recognizing patterns, the method comprising the steps of:a) deriving a first sequence of memory addresses parameter values, wherein the memory addresses parameter values comprise values that are reflective of an input that is to be compared to at least one known pattern set having at least one member pattern; b) providing a plurality of memory tables residing within at least one physical memory device having a sequence of structural levels with at least one memory table at each level; c) deriving a sequence of memory addresses from look-up operations, that correspond to, and that are at least partially derived from, the sequence of parameter values so as to be reflective of the input, and for applying the sequence of memory addresses to a corresponding sequence of memory tables that extend sequentially through at least a portion of the structural levels with a single table at each level for performing simultaneous table look-up operations on all of the memory tables of the sequence of memory tables for producing a result comprised of the outputs from each of the memory tables in the sequence of memory tables; d) and determining from output circuitry, in accordance with the result from the memory table-look-up operations, whether the input is recognized as being a probable match to any member pattern of the at least one known pattern set.