Patent ID: 7760512
Filing Date: 2010-07-20
Classification: H01L,Y10T

Abstract:
1. An electronic board comprising: a substrate on which is formed an electronic circuit having a connection terminal; a stress-relaxation layer formed on the substrate and including a dielectric material; a capacitor having a first electrode that is disposed between the substrate and the stress-relaxation layer; a second electrode that is disposed at the top side of the stress-relaxation layer; and a portion of the stress-relaxation layer that is disposed between the first electrode and the second electrode; a first layer wiring that is extended from the connection terminal, a part of the first layer wiring being covered by the stress-relaxation layer; a second layer wiring that is disposed at the to side of the stress-relaxation layer and is a rearrangement wiring for the connection terminal; and a projection electrode that is formed on the surface of the second electrode and is mounted on a connection terminal of an opposite substrate, which is a substrate on which the electronic board is mounted, wherein at least one of the first electrode and the second electrode has a corrugated surface facing the stress-relaxation layer, in an overlap region where the first layer wiring and the second layer wiring overlap when the electronic board is viewed from a direction perpendicular to a surface of the electronic board, a portion of the first layer wiring in the overlap region forms the first electrode, a portion of the second layer wiring in the overlap region forms the second electrode, and the projection electrode, the capacitor, and the corrugated surface are disposed at the overlap region.