Patent ID: 7511939
Filing Date: 2009-03-31
Classification: H01G,H01L

Abstract:
1. A multi-layer integrated circuit capacitor structure, comprising: an insulating surface arranged to provide mechanical support for an integrated circuit structure; and two or more semiconductor/dielectric plates, said plates arranged in a vertical stack on top of said insulating surface, each of said semiconductor/dielectric plates comprising: a topmost layer which forms a capacitor with the topmost semiconductor/dielectric plate; a plurality of insulating layers, one of said insulating layers deposited on each of said semiconductor/dielectric plates, each of said insulating layers patterned and etched to provide an opening such that the semiconductor layer of the plate immediately above said insulating layer is in physical and electrical contact with the dielectric layer of said plate immediately below said insulating layer, or such that said topmost layer is in physical and electrical contact with the dielectric layer of said plate immediately below said insulating layer when said plate is the topmost plate; contact openings provided through said insulating layers, each of which provides access to a respective one of said semiconductor layers and is insulated from the layers of any other semiconductor/dielectric plate; and electrical contacts through said contact openings and to said topmost layer which provide electrical connections to respective semiconductor layers.