Patent ID: 7627743
Filing Date: 2009-12-01
Classification: G06F

Abstract:
1. A memory transfer method between a memory subsystem and a processor register file, the method comprising: generating a multi-word transfer instruction, wherein the multi-word transfer instruction specifies an access type information, a consecutive register group information based on a pair of information, a mask selection information and a base register information for a starting address of corresponding memory locations in the memory subsystem, wherein the mask selection information indicates at least one of a plurality of special registers to be selected, and the special registers comprises a general data pointer, a frame pointer, a function call return pointer, and a stack pointer; and moving multiple words between the memory subsystem and the processor register file in response to the multi-word transfer instruction, wherein the access type information specifies one of a memory load type and a memory store type, wherein the total number of words transferred is equal to the number of registers specified in the consecutive register group, plus the number of registers specified by the mask selection information, wherein the multi-word transfer instruction further specifies an address update mode, for indicating to update the memory address for each memory transfer, based on the starting address of the corresponding memory locations, wherein the multi-word transfer instruction further specifies an order mode for indicating whether the memory access is performed before or after each update of the memory address, and wherein the multi-word transfer instruction further specifies a modification mode for indicating whether to modify the base register information in the end of the instruction execution according to the last-updated memory address.