Patent ID: 7580306
Filing Date: 2009-08-25
Classification: G11C

Abstract:
1. A semiconductor memory apparatus comprising: a sense amplifier having two input lines and a power supply input terminal to receive a driving voltage and configured to detect and amplify a difference between signals that are supplied to the two input lines; a sense amplifier voltage supply unit configured to supply a normal driving voltage as the driving voltage in a normal mode through the power supply input terminal of the sense amplifier and an overdriving voltage as the driving voltage in a overdriving mode through the power supply input terminal of the sense amplifider, wherein an overdriving voltage level is higher than a normal driving voltage level; and a driving voltage control unit configured to detect the overdriving voltage level of the power supply input terminal of the sense amplifier and supply the normal driving voltage to the power supply input terminal of the sense amplifier using a detecting result of the overdriving voltage level, after the overdriving mode.