Patent ID: 7939227
Filing Date: 2011-05-10
Classification: G03F

Abstract:
1. A method for manufacturing a mask for integrated circuit devices, the method comprising: providing a substrate, the substrate including an opaque film overlying the substrate, an overlying negative photoresist layer, a stop layer overlying the negative photoresist layer, and a positive photoresist layer overlying the stop layer; patterning the positive resist layer to form one or more window openings in the positive photoresist layer; removing the exposed stop layer within the one or more window openings to expose a portion of the negative photoresist layer while other portions of the positive photoresist layer protect unexposed regions of the negative photoresist layer; patterning the exposed portion of the negative photoresist layer while protecting the other portions of the unexposed regions of the negative photoresist layer; developing the exposed portion of the negative photoresist layer; and removing exposed portions of the opaque layer to expose an underlying portion of the substrate; and removing any remaining portions of the negative photoresist layer, stop layer, and positive photoresist layer to provide a patterned mask.