Patent ID: 8245008
Filing Date: 2012-08-14
Classification: G06F

Abstract:
1. A computer-implemented method, comprising: a heap manager maintaining a plurality of thread caches, wherein each respective thread cache corresponds to a respective thread of a plurality of threads executing on a Non-Uniform Memory Access (NUMA) computer system and identifies one or more free memory blocks reserved for the respective thread; the heap manager receiving a first memory allocation request from a particular thread of the plurality of threads, the request comprising a first block size; in response to the first memory allocation request, the heap manager determining that a first thread cache of the plurality of thread caches corresponds to the particular thread; the heap manager locating from the one or more free memory blocks reserved for the particular thread identified by the first thread cache a first block of memory of the first block size, wherein the particular thread executes on a particular execution node of the NUMA computer system, wherein the one or more free memory blocks reserved for the particular thread identified by the first thread cache are local to the particular execution node; and the heap manager allocating the first block of memory to the particular thread.