Patent ID: 6452473
Filing Date: 2002-09-17
Classification: H01F

Abstract:
A laminated inductor comprising:a chip portion having an upper surface, opposed end surfaces, and a lower surface, said chip portion including: a plurality of electrically insulating layers; and a plurality of electrically conductive patterns formed on said insulating layers such that said insulating layers and said conductive patterns are alternately superimposed, said conductive patterns having ends electrically connected so as to form a laminated coil; and terminal electrodes formed at each of said opposed end surfaces of said chip portion, said laminated coil having a first end connected to a first of said terminal electrodes and a second end connected to a second of said terminal electrodes so as to electrically connect said terminal electrodes, each of said terminal electrodes having an end surface portion formed on a respective end surface of said chip portion and having a lower surface portion formed on said lower surface of said chip portion, said laminated coil being arranged closer to said upper surface of said chip portion than to said lower surface of said chip portion so as to define a predetermined distance between said laminated coil and said lower surface portion of each of said terminal electrodes.