Patent ID: 6747826
Filing Date: 2004-06-08
Classification: G11B,H03L,H04L

Abstract:
A clock recovery apparatus for recovering a clock signal used to reproduce digital data from an incoming signal, said apparatus comprising:an oscillation device operable to receive a control signal, and generate, as an oscillation clock signal, a clock signal having a frequency based on the control signal; a sampling device operable to sample the incoming signal with a timing of the oscillation clock signal, and output a sampled value of the incoming signal; a phase error detection device operable to detect, based on the sampled value, a phase error between the oscillation clock signal and an ideal clock signal to reproduce the digital data; a quality judgement device operable to judge a quality of the sampled incoming signal by referring to the sampled value, said quality judgement device comprising: a temporary judgement device operable to estimate the digital data based on the sampled value for output as a temporary judgement result; a reference value generation device operable to generate a reference value based on the temporary judgement result; and a calculation device operable to calculate a difference between the sampled value and the reference value, wherein the quality is judged according to the difference; a phase-frequency error detection device operable to output a phase-frequency error signal based on the phase error and the quality judged by said quality judgement device, wherein the phase error is outputted as the phase-frequency error signal while the quality is good, and a given error value which is in accordance with a sign of the phase error as detected when the quality changes from good to bad is outputted as the phase-frequency error signal at least for a given duration of time right after the quality changes from good to bad; and a filter device operable to smooth the phase-frequency error signal for output to said oscillation device as the control signal, wherein the oscillation clock signal is outputted as the clock signal used to reproduce the digital data.