Patent ID: 8295075
Filing Date: 2012-10-23
Classification: G11C,H01L

Abstract:
1. A method for controlling operations of a resistive memory, the resistive memory having a first memory layer, a second memory layer and a medium layer formed between the first memory layer and the second memory layer, the method comprising at least a step of: (a) measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance; wherein the step (a) comprises: measuring the resistance as a first resistance by applying a first voltage to the resistive memory; determining that the state of the resistive memory is the first state when the first resistance is equal to a predetermined value; when the first resistance is different from the predetermined value, measuring the resistance as a second resistance by applying a second voltage to the resistive memory; and determining that the state of the resistive memory is the second state when the second resistance is equal to the first resistance, or determining that the state of the resistive memory is the third state when the second resistance is not equal to the first resistance.