Patent ID: 7432136
Filing Date: 2008-10-07
Classification: H01L

Abstract:
1. A method, comprising: providing an SOI substrate comprised of an active layer, a buried insulation layer and a bulk substrate, said active layer being doped with a first type of dopant material, said bulk substrate having an inner well and an outer well, each of which are formed within said bulk substrate and under said buried insulation layer and said active layer, said inner well being positioned within said outer well, said inner well being doped with said first type of dopant material and defining an area, said outer well being doped with a dopant material that is of a type opposite said first type of dopant material; forming a transistor above said SOI substrate entirely within said area defined by said inner well; forming a plurality of physically separated source/drain wells in said bulk substrate under said buried insulation layer and within said inner well, said source/drain wells being doped with said first type of dopant material and applying a voltage to said inner well to vary a threshold voltage of said transistor.