Patent ID: 6541325
Filing Date: 2003-04-01
Classification: H01L

Abstract:
A method for fabricating a capacitor device with BiCMOS processes on a semiconductor substrate, comprising the steps of:forming a first buried layer and a second buried layer in the semiconductor substrate; forming an epitaxy layer above the semiconductor substrate; forming a first well, a collector region, a second well, and a third well in the epitaxy layer, wherein the second well and the third well are respectively doped with ions of a first type and a second type conductivity, and said first well and said collector region are in contact with said first buried layer and said second buried layer, respectively; forming a patterned oxide layer over the epitaxy layer; forming a base region adjacent to the collector region; forming a conducting layer over the patterned oxide layer and the base region; forming a base contact region and source/drain regions of a second type and a first type conductivity in the base region and in the second and the third well; and forming an emitter region in the base region.