Patent ID: 6728827
Filing Date: 2004-04-27
Classification: G11C

Abstract:
A semiconductor integrated circuit device comprising:a terminal group for receiving externally supplied control signal, address signal and data; an interface portion for receiving said control signal, said address signal and said data and selecting an object of instructions according to said address signal; a memory cell array, including a first and second areas designated by said address signal and transmitting/receiving said data, according to said control signal and said address signal transmitted via said interface portion, when said address signal specifies said second area; and logic circuitry for performing a data processing as an logic operation according to at least one of said control signal, said address signal and said data transmitted via said interface portion when said address signal specifies said first area, said logic circuitry processing either one of storage data already stored in said memory cell array and data transmitted via said interface portion and transmitting a result of said data processing to said memory cell array to store.