Patent ID: 6122218
Filing Date: 2000-09-19
Classification: G11C

Abstract:
A multi-port access memory comprising:a multi-port access memory cell block for storing data, the multi-port access memory cell block comprising:a plurality of memory cells, each having two inverters connected in a direct latch fashion; anda number of switching means, each selectively coupling a common bidirectional data line and a memory cell in response to decoded address;a number of common decoding means for receiving an address for reading and writing the data and, in response to a read enable signal or a write enable signal, for decoding the address to thereby select one of word lines of the multi-port access memory cell block; anddata selection means, in response to the write enable signal, for relaying input data via the common bidirectional data line to the multi-port access memory cell block and, in response to the read enable signal, for receiving the data stored in the multi-port access memory cell block to thereby provide the stored data.