Patent ID: 9224596
Filing Date: 2015-12-29
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device structure, comprising: epitaxially forming a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate, the semi-insulating or insulating GaN epitaxial layer having a thickness of at least about 4 μm; forming a conductive buffer layer disposed between the substrate and the GaN epitaxial layer, providing a backside contact on a surface of the conductive substrate, opposite the insulating or semi-insulating GaN epitaxial layer; and forming a via hole and corresponding via metal in the via hole that extends through the conductive substrate and exposes a portion of the backside contact, wherein forming the via metal comprises forming the via metal that contacts the backside contact at the exposed portion through the conductive substrate.