Patent ID: 8438454
Filing Date: 2013-05-07
Classification: G06F

Abstract:
1. A semiconductor memory device comprising: a nonvolatile memory; an interface unit configured to receive, from an outside, first address information that specifies a logical recording position of user data stored in the nonvolatile memory when the user data is to be read out; an input/output control unit configured to control input and output of data to/from the nonvolatile memory; an address translation table that associates the first address information with second address information indicating a physical recording position in the nonvolatile memory; a translating unit configured to translate the first address information to the second address information according to the address translation table; and a check code generating unit configured to generate redundant data for checking whether or not there is any error in the user data and the first address information as one data piece, wherein the input/output control unit records the user data, the first address information and the redundant data as one data set in the physical recording position in the nonvolatile memory indicated by the second address information.