Patent ID: 8758514
Filing Date: 2014-06-24
Classification: C23C,H01L

Abstract:
1. A cluster type semiconductor processing apparatus comprising: a wafer handling chamber having a polygonal base including multiple sides for wafer processing chambers and two adjacent sides for wafer loading/unloading chambers as viewed in a direction of an axis of the wafer handling chamber, said multiple sides optionally including a blank side for interior maintenance, wherein the number of the total sides is seven, wherein each of the multiple sides for wafer processing chambers and the two adjacent sides for wafer loading/unloading chambers is arranged perpendicular to a line passing through the axis of the wafer handling chamber and a center of each side as viewed in the axial direction of the wafer handling chamber, wherein two adjacent sides of the multiple sides for wafer processing chambers form a first angle measured between a line passing through the axis of the wafer handling chamber and the center of one of the two adjacent sides for wafer processing chambers and a line passing through the axis of the wafer handling chamber and the center of the other of the two adjacent sides for wafer processing chambers, wherein the first angle is greater than a second angle which is calculated by dividing 360° by the number of the total sides consisting of the multiple sides for wafer processing chambers and the two adjacent sides for wafer loading/unloading chambers, wherein a first axis-to-side distance from the axis of the wafer handling chamber to each of the two adjacent sides for wafer loading/unloading chambers is greater than a second axis-to-side distance from the axis of the wafer handling chamber to each of the multiple sides for wafer processing chambers, wherein an edge-to-edge distance which is a distance between an edge of the side for a wafer processing chamber next to one of the two adjacent sides for wafer loading/unloading chambers and an edge of the side for a wafer processing chamber next to the other of the two adjacent sides for wafer loading/unloading chambers is substantially the same as a length of the side for a wafer processing chamber located opposite the two adjacent sides for wafer loading/unloading chambers with reference to the axis of the wafer handling chamber, said edge-to-edge distance being greater than a length of each side for a wafer processing chamber except for the side located opposite the two adjacent sides for wafer loading/unloading chambers.