Patent ID: 6477092
Filing Date: 2002-11-05
Classification: G11C

Abstract:
A semiconductor device comprising:a first level shifter having an input terminal for receiving an input signal and an output terminal, said first level shifter outputting one of a first potential and a second potential lower than the first potential from said output terminal in accordance with the level of the input signal; a second level shifter having an input terminal connected to said output terminal of said first level shifter, said second level shifter outputting one of the first potential and a third potential lower than the second potential from an output terminal in accordance with the output potential from said first level shifter; a third level shifter having an input terminal for receiving said input signal and an output terminal, said third level shifter outputting one of said first and second potentials from said output terminal in accordance with the level of said input signal; and a first switching circuit connected to said output terminals of said second and third level shifters, said first switching circuit selecting one of the output potentials from said second and third level shifters in accordance with a control signal.