Patent ID: 8017510
Filing Date: 2011-09-13
Classification: H01L

Abstract:
1. A semiconductor device fabrication method comprising: forming, in a semiconductor substrate, an element isolation region for defining an element region where an element is to be formed; forming a gate insulating film on the semiconductor substrate in the element region; forming a gate electrode on the gate insulating film; forming extension regions in a surface region of the semiconductor substrate on two sides of the gate electrode; forming gate sidewall films on two side surfaces of the gate electrode; forming source/drain regions in a surface region of the semiconductor substrate outside the gate sidewall films; forming a metal film having a predetermined thickness on the gate electrode, gate sidewall films, and source/drain regions; leaving the metal film on each of side surfaces of the gate sidewall films, on the source/drain regions and within a same distance as the predetermined thickness from each of the side surfaces of the gate sidewall films by anisotropic etching; and forming silicide films on the source/drain regions under the metal films which remain on the side surfaces of the gate sidewall films by annealing.