Patent ID: 6823418
Filing Date: 2004-11-23
Classification: G06F

Abstract:
An apparatus, comprising:an interface for directly coupling to a host bus having one or more processors without being shared with a host-to-PCI bridge; a device coupled to the interface to perform one or more functions, said device appearing as a virtual PCI device, logically residing on a PCI bus that is coupled to the host bus through the host-to-PCI bridge, wherein access by the device to the host-to-PCI bridge is only through the host bus; and a monitor circuit coupled to said interface and said device to track host bus cycles initiated by at least one of the processors coupled to the host bus, to identify processor initiated host bus cycles targeted to the virtual PCI device, and to generate one or more control signals to enable the device to respond, as the virtual PCI device, to said one or more of said identified host bus cycles targeted to said virtual PCI device without having to access the host-to-PCI bridge.