Patent ID: 6097764
Filing Date: 2000-08-01
Classification: H03M,H04L

Abstract:
A pragmatic trellis-coded modulator comprising:a parsing circuit configured to parse input information bits into uncoded information bits and to-be-coded information bits;a convolutional encoding circuit coupled to said parsing circuit and configured to produce at least two encoded information bits for each to-be-coded information bit processed therein per unit interval of time; anda polar amplitude phase shift keyed (P-APSK) mapping circuit coupled to said parsing circuit and said convolutional encoding circuit and configured to:accept at least two of said uncoded information bits from said parsing circuit per unit interval of time;accept at least two of said encoded information bits from said convolutional encoding circuit per unit interval of time;map said accepted uncoded and encoded information bits to a mapped phase point, said mapped phase point being one phase point within a constellation having a plurality of said phase points arranged in at least two concentric rings, the outermost pair of which possesses a like predetermined number of phase points per ring; andprovide a quadrature signal defining said mapped phase point.