Patent ID: 7795901
Filing Date: 2010-09-14
Classification: G01R,H03K

Abstract:
1. For use with an automatic test instrument, a method for automatically isolating a defect in an integrated circuit having an array of programmable logic and interconnect circuits, the method comprising: creating a sequence of configurations for routing data in a pattern through the programmable logic and interconnect circuits, wherein each configuration within the sequence is determined as a function of output data from a prior configuration in the sequence; for each configuration in the sequence, configuring the programmable logic and interconnect circuits with the configuration and using the automatic test instrument for routing data in the pattern through the programmable logic and interconnect circuits configured with the configuration; and for each configuration in the sequence, assessing the output data from the routing of data in the pattern through the programmable logic and interconnect circuits configured with the configuration, and in response to the assessing of the output data for the configuration, isolating the defect to a portion of the pattern for the configuration that is within the portion for the prior configuration in the sequence.