Patent ID: 6774727
Filing Date: 2004-08-10
Classification: H03G

Abstract:
A device comprising a symmetrical amplifier which has, inter alia, at least one input terminal for receiving a voltage to be amplified, a pair of output terminals for producing a symmetrical amplified voltage, and a symmetrical amplifier circuit having inputs for being connected to said input terminal, and outputs for being connected to said output terminals, and also a gain control for receiving a gain control signal, characterized in that said amplifier furthermore includes a circuit for measuring the amplitude of signals to produce said gain control signal, which circuit is formed by amplitude detectors of the same type, connected to produce measurements which represent the amplitude of electrical magnitudes at said output terminal, wherein said detectors are peak detectors of which one detector is connected to one of the outputs and the other to the other output, a minimum-value simulation circuit being inserted at the output.