Patent ID: 6635566
Filing Date: 2003-10-21
Classification: H01L

Abstract:
A method for forming metallization and contact structures in an integrated circuit comprising in sequential order:a) etching a trench dielectric layer of a composite structure comprising in sequential order: i) a semiconductor substrate comprising an active region, a gate structure thereover, and dielectric spacers adjacent to said gate structure; ii) a substantially planar contact dielectric layer; iii) a trench dielectric layer; and iv) a patterned photoresist; â€ƒto form a trench in said trench dielectric layer under etch conditions which do not substantially etch said substantially planar contact dielectric layer; aâ€²) removing said patterned photoresist; aâ€³) forming a contact opening mask; b) etching said substantially planar contact dielectric layer under conditions which do not substantially damage said gate structure to form a first contact opening that exposes a region of said semiconductor substrate and a portion of at least one of said dielectric spacers; and c) depositing a conductive material into said first contact opening and said trench forming a contact structure in said first contact opening and a metallization in said trench.