Patent ID: 7109061
Filing Date: 2006-09-19
Classification: H01L

Abstract:
1. An integrated circuit chip electrically interconnectable with a carrier substrate comprising: a) a chip die having electrical contacts arranged on a surface thereof for providing electrical interconnection with electronic circuitry on a surface of the carrier substrate, said electrical contacts being flowable upon heating; b) a fluxing agent disposed on a surface of said electrical contacts at a location capable of providing effective fluxing activity to said electrical contacts of said chip die and said electronic circuitry of the carrier substrate when said chip die is mated with the carrier substrate; c) a first thermosetting underfill composition dispensed in a flowable form over said chip die about said electrical contacts and treated so as to render said first curable thermosetting underfill composition non-flowable, said first thermosetting underfill composition being distinct from said fluxing agent; and d) a second thermosetting underfill composition dispensed in a flowable form over said first thermosetting underfill composition about said electrical contacts and treated so as to render said second curable thermosetting underfill composition non-flowable, said second thermosetting underfill composition being distinct from said first thermosetting underfill composition and said fluxing agent, wherein upon mating said chip die with said carrier substrate to form a mated assembly and upon heating said mated assembly to a temperature sufficient to render said electrical contacts flowable, said electrical contacts flow to provide electrical interconnection between said chip die and said carrier substrate, and said first and second thermosetting underfill compositions are cured, thereby adhering said chip die to said carrier substrate.