Patent ID: 8569145
Filing Date: 2013-10-29
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising steps of: (a) forming grooves in a semiconductor substrate; (b) forming isolation regions by embedding first insulating films into the grooves, thereby an active device region, a plurality of first dummy patterns and a plurality of second dummy patterns are defined by the isolation regions; and (c) forming a MISFET in the active device region, wherein each of the first dummy patterns has the same planar size and is arranged with same pitch, wherein each of the second dummy patterns has the same planar size and is arranged with same pitch, wherein the planar size of each of the second dummy patterns is larger than the planar size of each of the first dummy patterns, wherein, in a first direction and a second direction which is perpendicular to the first direction, the first dummy patterns abut to the active device region, wherein, in the first direction and the second direction, the second dummy patterns abut to the active device region through the first dummy patterns, and wherein, in the first direction, at least one of the second dummy patterns directly abuts to the active device region without the first dummy patterns.