Patent ID: 6147857
Filing Date: 2000-11-14
Classification: H01L

Abstract:
A semiconductor integrated circuit comprising:a semiconductor substrate;circuits formed on said substrate;power rails and ground rails formed on said substrate, each of said rails being used to supply power for said circuits and said rails being formed on a top most interconnect metal layer of said circuits;an insulating layer formed on said substrate over said power and ground rails;a metal layer formed on said insulating layer acting as a top capacitor plate with said power and ground rails acting as a lower capacitor plate and said metal layer substantially covering said rails thereby forming a power supply bypass capacitor;means for connecting said top capacitor plate to at least one of said power rails or to at least one of said ground rails;said means for connecting said top capacitor plate to at least one of said power rails or to at least one of said ground rails comprising a bond wire leading from a bond pad connected to said top capacitor plate to a bond pad connected to at least one of said power rails or to at least one of said ground rails.