Patent ID: 7143332
Filing Date: 2006-11-28
Classification: G06F,G11C,H03K

Abstract:
1. A method of utilizing a configurable random access memory (RAM) array in a programmable device, the RAM array comprising a user data portion and an error correction code (ECC) portion, the method comprising: receiving a user data word and a user address, a number of bits in the user data word varying based on a selected virtual width for the RAM array; writing the user data word to a configurable subset of the user data portion of the RAM array, the configurable subset being determined by the selected virtual width and the user address; reading, while writing the user data word, from the RAM array at the user address a subset of a stored memory word, the stored memory word having a non-configurable width, the stored memory word including the user data word and the subset of the stored memory word; generating ECC data based on the user data word and the subset of the stored memory word, the ECC data including a fixed number of bits; and writing the ECC data to the ECC portion of the RAM array at the user address.