Patent ID: 7588945
Filing Date: 2009-09-15
Classification: B82Y,G11C,H01L

Abstract:
1. A process to manufacture a magnetic random access memory, comprising: on a first substrate, depositing a first seed layer; depositing a first AFM layer on said first seed layer; depositing a pinned layer on said first AFM layer; depositing a dielectric tunneling layer on said pinned layer; depositing a first free layer on said dielectric tunneling layer, and depositing a capping layer on said first free layer thereby forming an MTJ stack; on a second substrate, depositing a second seed layer; depositing a second free layer on said second seed layer, and depositing a second AFM layer on said second free layer, thereby forming a magnetic reference stack; positioning said magnetic reference stack so that said second free layer is magnetostatically coupled to said first free layer; forming a heating line that is in thermal contact with said reference stack; forming orthogonally disposed first and second bit lines and a word line that is not parallel to either bit line, all three lines intersecting at said magnetic reference stack; forming a first transistor that is connected to said heating line, thereby serving to control current flow through said heating line; and forming a second transistor that is connected to said MTJ stack, thereby enabling measurement of said MTJ stack's electrical resistance.