Patent ID: 6236613
Filing Date: 2001-05-22
Classification: G11C,H03K

Abstract:
A semiconductor integrated circuit device comprising:a main voltage transmission line for transmitting a voltage of a first logic level;a plurality of sub voltage transmission lines;a plurality of gate circuits grouped corresponding to said plurality of sub voltage transmission lines respectively, each the gate circuit performing a predetermined process on a received signal for outputting;a plurality of first switching transistors provided corresponding to said plurality of sub voltage transmission lines respectively, each the first switching transistor connecting a corresponding sub voltage transmission line to said main voltage transmission line in response to a group specification signal for specifying a sub voltage transmission line; anda plurality of second switching transistors provided corresponding to said plurality of sub voltage transmission lines respectively, each the second switching transistor transmitting a voltage closer to a voltage of a second logic level than to the voltage of the first logic level to a corresponding sub voltage transmission line upon non designation by the group specification signal.