Patent ID: 6720252
Filing Date: 2004-04-13
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, comprising:providing a dielectric layer over a substrate; providing a first photoresist layer over the dielectric layer; patterning and defining the first photoresist layer; etching the first photoresist layer and the dielectric layer to form a plurality of vertical openings; removing the first photoresist layer; depositing a second photoresist layer over the dielectric layer, wherein the second photoresist layer fills the plurality of vertical openings; removing only a portion of the second photoresist layer deposited over the dielectric layer, wherein the second photoresist layer has a first substantially uniform thickness over the dielectric layer; depositing an anti-reflection coating layer over the second photoresist layer; providing a third photoresist layer over the anti-reflection coating layer; patterning and defining the third photoresist layer; and etching the anti-reflection coating layer and the second photoresist layer to form a plurality of trenches in the dielectric layer.