Patent ID: 7732328
Filing Date: 2010-06-08
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising: providing semiconductor chips, each semiconductor chip including chip pads; forming through-vias extending through each of the semiconductor chips; forming redistribution structures and a chip selection interconnection layer on each of the semiconductor chips, the redistribution structures and the chip selection interconnection layer of each chip connecting the through-vias with the respective chip pads on each of the semiconductor chips; patterning the chip selection interconnection layer on each of the semiconductor chips to form chip selection interconnection lines on each of the semiconductor chips, wherein a line-to-pad connection structure of a chip selection interconnection line on one of the semiconductor chips is different from a line-to-pad connection structure of a chip selection interconnection line on another one of the semiconductor chips; and stacking the semiconductor chips such that the respective through-vias are used to electrically connect the stacked semiconductor chips to one another.