Patent ID: 6549442
Filing Date: 2003-04-15
Classification: G11C

Abstract:
A multi-bank content-addressable memory (CAM) comprising:a plurality of CAM banks, each CAM bank having a plurality of rows of CAM cells that each store data and compare data to data on compare bit lines to generate row-match signals when data stored in a row matches data on the compare bit lines; a plurality of register files for the plurality of CAM banks, each register file coupled to the compare bit lines for one of the plurality of CAM banks, each register file having a plurality of compare registers for storing compare data for driving the compare bit lines; a first compare register and a second compare register in each of the plurality of register files; wherein each register file receives an index that identifies one of the plurality of compare registers to drive the compare bit lines of a CAM bank coupled to the register file by the compare bit lines; wherein the plurality of register files includes a first register file that receives a first index and a second register file that receives a second index, the first register file being coupled by first compare bit lines to a first CAM bank in the plurality of CAM banks, and the second register file being coupled by second compare bit lines to a-second CAM bank in the plurality of CAM banks; and bank-swap means for exchanging the first index to the first register file with the second index to the second register file; wherein before execution of a bank-swap operation by the bank-swap means the first index identifies the first compare register of the first register file to drive the first compare bit lines while the second index identifies the second compare register of the second register file to drive the second compare bit lines; wherein after execution of a bank-swap operation by the bank-swap means the first index identifies the second compare register of the first register file to drive the first compare bit lines while the second index identifies the first compare register of the second register file to drive the second compare bit lines, whereby indexes to CAM bank compare registers are exchanged to swap CAM banks.