Patent ID: 8250275
Filing Date: 2012-08-21
Classification: G06K

Abstract:
1. A system for operating a smartcard with an MMC device, the system comprising: a smartcard, conforming to the SecureMMC standard, and having: said smartcard connected to said host through said MMC bus; said smartcard and said host adapted to exchange commands and responses between each other, said commands and said responses being compliant to at least one standard of the ISO/IEC7816 family of standards; said command and said response being in the form of Application Protocol Data Unit (APDU) instructions, said smartcard capable of servicing multiple APDU commands at one time, whether said commands are sent synchronously or asynchronously; said processor of said smartcard, in mono-application operation, adapted to process one command sent from said host to said smartcard with a WRITE_SEC_CMD instruction; said smartcard adapted to receive from said host a READ_SEC_CMD read instruction and adapted to respond to said host; wherein a single of said WRITE_SEC_CMD instruction or said READ_SEC_CMD instruction is capable of packaging multiple APDU commands; said smartcard adapted to set and reset a SEC_CARD_EVENTS bit in a status register of said smartcard to inform said host that a command has been processed, said bit being set when said smartcard has completed processing a command and said bit being reset when said host has read said smartcard; said smartcard adapted to have a Secure_Idle state when said smartcard is waiting for data or a command and not in error, a Secure_In_Progress state while processing a command, and a Secure_Data_Available state when processing is completed, wherein the smartcard is capable of simultaneous multi-application operation and a determined number N of commands may be processed in said smartcard in parallel, said predetermined number N of commands said smartcard can proceed in parallel being the number of logical channels N said smartcard can support; said processor of said smartcard adapted to process a command or a response encapsulated in an information field of a bloc frame, said bloc frame also having a prologue field for identifying the source node application and the destination node application in a NAD datum, in the case of a command the source identified being the host application identity and the destination identified being the related card application identity, and in the case of a response the source identified being the card application identity and the destination identified being the related host application identity; wherein said processor is adapted to simultaneously process multiple commands which are encapsulated in an information field of said bloc frame and to simultaneously send multiple responses back to said host, so as to allow more than one command to be sent at any one time and allow multiple applications to be active at any one time, so that faster applications need not wait for slower applications, running at the same time, before its responses can be sent to said host; said smartcard adapted to enter said Secure_Idle state when the number of active commands in the card is lower than N, and none of said active commands are completed; said smartcard adapted to enter said Secure_In_Progress state when the number of active commands in the card is equal to N; said smartcard adapted to enter said Secure_Data_Available state upon the completion of any command; said smartcard adapted to have a transition from said Secure_Idle state to said Secure_In_Progress state; and said smartcard adapted to have a transition from said Secure_In_Progress state to said Secure_Data_Available state.