Patent ID: 8095724
Filing Date: 2012-01-10
Classification: C07D,G06F

Abstract:
1. A method of wear leveling for a non-volatile memory, the non-volatile memory comprises a plurality of physical blocks, the method comprising the steps of: dividing the plurality of physical blocks of the non-volatile memory into windows and gaps, wherein the gaps are between the windows, each of the windows comprises physical blocks mapped to logical addresses of a host, and each of the gaps comprises physical blocks not mapped to logical addresses of the host; and shifting one window to an adjacent window through the non-volatile memory in circle to reduce the physical blocks of the gap between the window and the adjacent window, wherein at least one of the logical addresses pointing to the physical block in the window to be shifted is changed to point to the physical block in the gap and the physical block in the window to be shifted is changed to form the gap by not mapping to the logical addresses such that data is not saved in the physical block in the window to be shifted after shifting.