Patent ID: 6292216
Filing Date: 2001-09-18
Classification: G09G,H04N

Abstract:
A display image correction circuit for correcting a display image in an arbitrary area of a picture screen designated by marker signals by detecting said marker signals that are superimposed on a video signal and formed by two of three primary color signals having arbitrary signal patterns of predetermined level and using a remaining one of the three primary color signals as a color clock comprising:measuring means for measuring horizontal and vertical synchronizing signal frequencies of said video signal;processing means for calculating a time duration of said marker signals from said measured horizontal and vertical synchronizing signal frequencies; andcontrol generating means for generating a control for making an area including said marker signals inconspicuous where designated by said calculated time duration,wherein said marker signals are divided into two pairs of marker signals each provided within a same scanning line and a first marker signal within a same scanning line is followed by an adjacent marker signal, and whereinsaid processing means calculates the time duration by using said adjacent marker signal in place of said first maker; andsaid control signal generating means generates the control signal for making an area including said marker signals inconspicuous where designated by said calculated time duration using said adjacent marker signal.