Patent ID: 7163857
Filing Date: 2007-01-16
Classification: H01L

Abstract:
1. A method for fabricating a buried strap contact for a storage capacitor of a memory cell, the storage capacitor being formed in a trench of a semiconductor substrate with an outer electrode layer around a lower region of the trench in the semiconductor substrate, a dielectric intermediate layer embodied on the lower region of the trench wall of the trench, an insulation layer, which is formed in a manner adjoining the dielectric intermediate layer on an upper region of the trench wall of the trench, and an inner electrode layer essentially filling the trench, comprising: etching back of the inner electrode layer into the trench, thereby uncovering the insulation layer; removing the uncovered insulation layer from the trench wall to define buried strap contact areas; depositing a liner layer to cover the inner electrode layer in the trench and the uncovered trench wall, the liner layer being thin enough to enable tunneling of charge carriers; forming a spacer layer with the material of the inner electrode layer on the liner layer at the trench wall, thereby forming an uncovered liner layer; removing the uncovered liner layer from the inner electrode layer in the trench; and filling the trench with the material of the inner electrode layer.