Patent ID: 6376279
Filing Date: 2002-04-23
Classification: H01L

Abstract:
A method for manufacturing a semiconductor package, comprising:providing a rerouting film comprising a base film, a metal pattern layer, a plurality of terminal pads connecting to the metal pattern layer, and a plurality of via holes; attaching a semiconductor wafer, on which has a plurality of integrated circuits and a plurality of chip pads are formed, to the rerouting film, such that the chip pads of the semiconductor wafer are aligned with the via holes of the rerouting film, wherein a polymer layer is between the semiconductor wafer and the rerouting film, filling the via holes; removing at least part of the polymer layer from the via holes; forming a solder filling in each of the via holes to electrically connect the chip pads to the metal pattern layer; forming a plurality of external terminals on the respective terminal pads of the rerouting film; and separating the semiconductor wafer and the rerouting film into individual packages, each of the packages including an integrated circuit having a corresponding portion of the rerouting film attached thereon.