Patent ID: 6188701
Filing Date: 2001-02-13
Classification: H04J

Abstract:
An interface apparatus for supporting the demultiplexing and multiplexing of signals in units of VT1.5 in a SONET network by converting a DS3 signal to a VT1.5 signal, and providing a direct interface to a DS3 network, comprising:DS3/DS2 demultiplexing means for demultiplexing and converting a DS3 signal to DS2 signals;DS2/DS1 demultiplexing means for demultiplexing and converting DS2 signals to DS1 signals;memory means for DS1 format conversion for recording data in order to compensate for a frequency off-set generated while demultiplexing and converting a DS3 signal to DS1 signals via DS2 signals, and outputting data synchronized with a supplied clock;clock generating means for a SONET VT network for supplying a clock signal in order to output data stored in said memory means for DS1 format conversion at the data rate of the SONET VT network;DS1/VT1.5 multiplexing means for multiplexing and converting DS1 signals to a VT1.5 signal synchronized with the clock generated by said clock generating means for a SONET VT network;VT1.5/STS1 multiplexing means for multiplexing and converting VT1.5 signals to an STS1 signal;STS1/VT1.5 demultiplexing means for demultiplexing and converting an STS1 signal to VT1.5 signals;VT1.5/DS1 demultiplexing means for demultiplexing and converting VT1.5 signals to DS1 signals;clock generating means for a DS3 network for generating a clock signal synchronous with the data rate of the DS3 network;DS1 clock generating means for generating a clock signal synchronous with a DS1 signal;memory means for SONET destuff for storing data in order to compensate for a frequency off-set generated while demultiplexing and converting an STS1 signal to DS1 signals via VT1.5 signals, and outputting data synchronized with the clock signal generated by said DS1 clock generating means;DS1/DS2 multiplexing means for multiplexing and converting DS1 signals to DS2 signals synchronized with the clock signal generated by said clock generating means for said DS3 network;DS2/DS3 multiplexing means for multiplexing and converting DS2 signals to a DS3 signal synchronized with the clock signal generated by said clock generating means for said DS3 network.