Patent ID: 7395192
Filing Date: 2008-07-01
Classification: G06F

Abstract:
1. A method for converting an IBIS (Input/output Buffer Information Specification) model to a SPICE (Simulation Program with Integrated Circuit Emphasis) behavioral model by RC (resistor/capacitor) extraction, the method comprising: obtaining data measured from a device or simulated as being representative of a device for modeling the electrical behavior of the device, wherein the SPICE behavioral models of pull-up and pull-down transistors are switching components of the output IBIS model, the data comprising: a pinout of the device and a pin-to-buffer mapping of the device; determining a resistance from the voltage-current tables of the pull-up and pull-down transistors; determining capacitance from the voltage-time tables of the pull-up and pull-down transistors; modeling a static characteristic as a resistor; and modeling a dynamic characteristic as a capacitor, wherein the SPICE behavioral model converted from the IBIS model is applicable for load simulation executions so as to provide a universal IBIS to SPICE behavioral model, wherein the capacitance is obtained by dividing the resistance extracted from the voltage-current tables into a delay time, and adding a division result value to a pad capacitor value, and the delay time is obtained through multiplying an arithmetic operation of a capacitor (C wherein the capacitor (C