Patent ID: 8269805
Filing Date: 2012-09-18
Classification: G09G

Abstract:
1. An image processing module used for receiving an original image signal to drive a display panel, the image processing module comprising: a timing controller, comprising: a scaler, for receiving the storage image signal, adjusting the resolution of the storage image signal, and outputting a scaled image signal to the control unit according to the resolution of the storage image signal; wherein the control unit receives the scaled image signal, registers the scaled image signal in the line buffer, changes a timing of the scaled image signal, and simultaneously outputs a front-display signal and a back-display signal to drive the display panel according to the scaled image signal; wherein the timing controller divides a horizontal line displayed on the display panel into a front-horizontal line and a back-horizontal line, so that the storage image signal is analyzed into a front-storage image signal corresponding to the front-horizontal line and a back-storage image signal corresponding to the back-horizontal line; wherein the front-storage image signal comprises a plurality of front-storage image pixel signals, the back-storage image signal comprises a plurality of back-storage image pixel signals, and the timing controller outputs the storage image signal to the scaler through a channel with the front-storage image pixel signals alternating with the back-storage image pixel signals; wherein the scaler further comprises: a first buffer, a second buffer, a third buffer and a fourth buffer sequentially connected in serial, wherein the first buffer registers the data of the front-storage image signal corresponding to a first pixel in the front-horizontal line and outputs first registered data, wherein the second buffer registers the data of the back-storage image signal corresponding to a second pixel in the back-horizontal line and outputs second registered data, wherein the third buffer registers the data of the front-storage image signal corresponding to a third pixel in the front-horizontal line and outputs third registered data, wherein the fourth buffer registers the data of the back-storage image signal corresponding to a fourth pixel in the back-horizontal line and outputs fourth registered data; a first multiplier, for multiplying the first registered data by a first coefficient and then outputting first adjusting data; a second multiplier, for multiplying the second registered data with a second coefficient and then outputting second adjusting data; a third multiplier, for multiplying the third registered data by a third coefficient and then outputting third adjusting data; a fourth multiplier, for multiplying the fourth registered data with a fourth coefficient and then outputting fourth adjusting data; a first adder, for receiving the first adjusting data and the third adiusting data to be added UP and then outputting first scaling data; and a second adder, for receiving the second adjusting data and the fourth adiusting data to be added up and then outputting second scaling data; wherein, the scaler adjusts the resolution of the storage image signal according to the first scaling data and the second scaling data.