Patent ID: 7791387
Filing Date: 2010-09-07
Classification: H03K,H03M

Abstract:
1. A digital pulse width modulator comprising: a system clock signal generator; and a feed-forward logic circuit coupled to the system clock signal generator, wherein the circuit receives a system clock signal, produces a pulse having a leading edge at one of a plurality of phase offsets relative to the system clock signal based on a state counter value, and extends a trailing edge of the pulse following the duration of system clock periods by a predetermined number of fractional portions of the system clock period, wherein the pulse has a duration at least equal to a selected number of periods of the system clock signal, wherein the leading and trailing edges are separated by the selected number of system clock periods plus the selected number of fractional portions of the system clock period, wherein the plurality of phase offsets are used to perform a fine adjustment to an output of the pulse width modulator.