Patent ID: 6262750
Filing Date: 2001-07-17
Classification: G09G,G11C

Abstract:
A process for storing cues with different formats in a memory, the cues comprising first cues with a first format, each cue represented over a first number of bits and each identified by a first identifier coded on p+n+e bits, p and n being strictly positive integers and e being a positive or zero integer, and/or second cues with a second format, each cue represented over a second number of bits which is greater than or equal to the product of the first number times 2.sup.n and each identified by a second identifier coded on p+e bits, the said memory comprising memory cells each able to contain 2.sup.k sets of bits and to be designated by a cell address word of p+n-k+e bits, k being an integer greater than or equal to zero and less than or equal to n, the number of bits of each set of bits being at least equal to the said first number, in which process, if k is zero, each first cue is stored in the memory cell designated by a cell address word whose bits correspond to the p+n+e bits of the identifier of the first cue, t of the memory cell designated by a cell address word whose bits correspond to the p+n+e-k high-order bits of the identifier of the first cue, which part is selected from the 2.sup.k sets of bits contained in this designated memory cell, with the aid of a selection word of k bits corresponding to the k low-order bits of the identifier of this first cue, and which, is k is equal to n, the 2.sup.n sets of bits forming each second cue are stored in the memory cell designated by a cell address word whose e+p bits correspond to the e+p bits of the identifier of this second cue and, if k is different from n, the 2.sup.n sets of bits forming each second cue are stored in the 2.sup.n-k memory cells with consecutive addresses designated by 2.sup.n-k cell address words whose e+p high-order bits correspond to the e+p bits of the identifier of this second cue.