Patent ID: 6417727
Filing Date: 2002-07-09
Classification: H03H,H03J

Abstract:
A circuit for tuning a filter circuit to compensate for variations in manufacturing process, voltage, and/or temperature in the filter circuit, the filter circuit including one or more N-bit capacitor arrays, the circuit comprising:calibration circuitry including a resistor and a capacitor array that has at least N capacitors, the at least N capacitors in the capacitor array configured to receive N input data bits, each of the at least N capacitors being associated with one of the N input data bits, the calibration circuitry arranged to integrate an input voltage signal in response to the N input data bits to generate an output signal, the calibration circuitry further including an operational amplifier coupled to the resistor and the capacitor array for integrating an input voltage signal to generate an integrated output voltage signal, the input voltage signal being generated from a reference voltage signal, and a comparator coupled to receive and compare the integrated output voltage signal with the reference voltage signal, the comparator generating the output signal that indicates a result of the comparison; and tuning circuitry coupled to provide the N input data bits to the calibration circuitry, the tuning circuitry being configured to sequentially tune the N capacitors in response to the output signal by determining and setting a data bit value for each of the at least N capacitors, wherein the comparator provides the output signal to the tuning circuitry for setting the data bit value for each of the at least N capacitors and the tuning circuitry provides the tuned data bit value to one of the N capacitors associated with the tuned data bit for tuning the other remaining capacitors.