Patent ID: 8164360
Filing Date: 2012-04-24
Classification: H03K

Abstract:
1. A semiconductor device which is included in a first chip and is coupled via a bus wiring to a second chip, which is different from the first chip, the semiconductor device comprising: an external output terminal coupled to the bus wiring; a first transistor having a gate for receiving an internal input signal, a drain coupled to the external output terminal for outputting to the external output terminal an external output signal generated in response to the internal input signal, and a source; an operation amplifier having one input terminal coupled to the drain of the first transistor, another input terminal for receiving a predetermined reference signal, and an output terminal; a second transistor having a gate coupled to the output terminal of the operation amplifier, and a drain coupled to the source of the first transistor; and an inverter that operates with power supply voltage supplied to the first chip, and receives the internal input signal and inverts and outputs the internal input signal to the gate of the first transistor, wherein the external output signal is outputted via the external output terminal to the second chip which is different from the first chip; and wherein the internal input signal is a switching signal.