Patent ID: 6713315
Filing Date: 2004-03-30
Classification: H01L

Abstract:
A method for fabricating a Mask ROM, comprising the steps of:forming a silicon oxide/silicon nitride/silicon oxide (ONO) composite layer on a substrate; forming a plurality of gate structures on the ONO composite layer, wherein the ONO composite layer between each gate structure and the substrate serves as a predetermined coding region; forming a plurality of bit-lines in the substrate between the gate structures; forming a plurality of word-lines over the substrate to electrically connect with the gate structures; forming a chemical vapor deposition anti-reflective coating (CVD-ARC) over the substrate; forming an inter-layer dielectric layer on the chemical vapor deposition anti-reflective coating (CVD-ARC); forming a plurality of coding windows in the inter-layer dielectric layer and the chemical vapor deposition anti-reflective coating (CVD-ARC) over selected predetermined coding regions; performing a coding process by using UV light to inject charges into the selected predetermined coding regions with the chemical vapor deposition anti-reflective coating (CVD-ARC) as a mask; and forming a plurality of plugs in the coding windows.