Patent ID: 8039919
Filing Date: 2011-10-18
Classification: B82Y,G11C,H01L

Abstract:
1. A memory device having a carbon nanotube, comprising: a lower electrode; an upper electrode including a diode in a first void of the upper electrode wherein a sidewall of the first void exposes the diode; an insulating interlayer pattern between the lower electrode and the upper electrode, wherein the insulating interlayer pattern includes a second void connected with the first void, wherein the second void exposes a portion of the lower electrode; and carbon nanotube wiring electrically connected to the exposed portion of the lower electrode and extending through the second void into the first void so that a free moving portion of the carbon nanotube wiring is positioned adjacent to the sidewall of the first void, wherein the free moving portion of the carbon nanotube wiring is configured to move to electrically contact the diode at the sidewall of the first void of the upper electrode responsive to a voltage applied to the lower electrode.