Patent ID: 7553709
Filing Date: 2009-06-30
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor structure comprising: forming a metal oxide semiconductor field effect transistor over a substrate, the metal oxide semiconductor field effect transistor including a gate electrode located over a body region and an overlying channel region within a semiconductor layer that separates a pair of source/drain regions located within the semiconductor layer; masking a portion of the metal oxide semiconductor field effect transistor to leave exposed a portion of the source/drain regions and a portion of the gate electrode located over a portion of the channel region; and etching the exposed portions of the source/drain regions and the gate electrode, and the underlying channel region, to form a body contact region extending from the body region and recessed with respect to a surface of the channel region, said etching includes a two-step method comprising: a first etch step for etching the gate electrode and the source/drain regions while using a gate dielectric as an etch stop to form a body contact region extending from the channel region; and a second etch step for etching the body contact region to form a recessed body contact region with respect to the surface of the channel region, and with the proviso that said etching does not include an oxidation step when forming the body contact region recessed with respect to the surface of the channel region.