Patent ID: 6414897
Filing Date: 2002-07-02
Classification: G11C

Abstract:
An integrated circuit device including a driver circuit for a memory array including complementary global write data lines and local write data lines, said driver circuit comprising:first and second switching devices having a first terminal thereof respectively coupled to one of said complementary global write data lines and a control terminal thereof coupled to a write enable signal line; third and fourth series connected switching devices coupled between a supply voltage line and a reference voltage line, said third and fourth switching devices being coupled to one of said complementary local write data lines, said third and fourth switching devices including a control terminal thereof; fifth and sixth series connected switching devices coupled between said supply voltage line and said reference voltage line, said fifth and sixth switching devices being coupled to another one of said complementary local write data lines, said fifth and sixth switching devices including a control terminal thereof, said control terminals of said third and sixth switching devices being coupled to a second terminal of said first switching device and said control terminals of said fourth and fifth switching devices being coupled to a second terminal of said second switching device; a seventh switching device coupled between said complementary local write data lines, said seventh switching device having a control terminal thereof coupled to said write enable signal line; eighth and ninth switching devices coupling said second terminal of said first switching device to said reference voltage line, said eighth switching device having a control terminal coupled to said second terminal of said second switching device and said ninth switching device having a control terminal coupled to said write enable signal line; and tenth and eleventh switching devices coupling said second terminal of said second switching device to said reference voltage line, said tenth switching device having a control terminal coupled to said second terminal of said first switching device and said eleventh switching device having a control terminal coupled to said write enable signal line.