Patent ID: 7723835
Filing Date: 2010-05-25
Classification: H01L

Abstract:
1. A semiconductor device package structure comprising: a package substrate having a first surface and a second surface; a plurality of first terminals formed on the first surface of the package substrate; a plurality of soldering balls formed on the second surface of the package substrate, each of the plurality of soldering balls electrically connected to corresponding one of the plurality of first terminals; a first semiconductor chip arranged over the first surface of the package substrate; a semiconductor-chip-mounted-interposer arranged over the first semiconductor chip, the semiconductor-chip-mounted-interposer including: a plurality of wires for electrically connecting the first terminals formed on the first surface of the package substrate and the second terminals formed on the fourth surface of the interposer; and a second sealing resin for sealing a part of the package substrate, the first semiconductor chip, the semiconductor-chip-mounted-interposer and the plurality of wires.