Patent ID: 6353265
Filing Date: 2002-03-05
Classification: H01L

Abstract:
A semiconductor device comprising:a stacked semiconductor chip including an upper semiconductor chip and a lower semiconductor chip, both having a principal surface on which pads are arranged and a back surface which opposes the principal surface, the back surface of the upper semiconductor chip being fixed to the principal surface of the lower semiconductor chip with a jointing material, with the upper and lower chips shifted like stairs and not covering any pads; inner leads from which outer leads continuously extend; a die pad from which die pad suspending leads, to which a sunken die pad is connected, continuously extend; and a jointing material, metal wires, and a sealing material, wherein a back surface of the stacked semiconductor chip is fixed to one surface of the die pad by the jointing material, the pads on the stacked semiconductor chip and corresponding inner leads are connected via the metal wires by backward wire bonding, and major surfaces of the inner leads, the stacked semiconductor chip, the metal wires, the jointing materials, and the die pad are covered with the sealing material with a back surface of the die pad exposed at an outer surface of the sealing resin, the outer leads protruding from side surfaces of the sealing resin and exposing cut-off surfaces of the die pad from side surfaces of the sealing resin.