Patent ID: 8990658
Filing Date: 2015-03-24
Classification: G06F,G11C,H03M

Abstract:
1. A method of reading a plurality of data bits that are stored in a memory that includes a plurality of multi-bit cells, the storing being effected by computing a plurality of parity bits that correspond to the data bits and then storing the data bits and the parity bits as stored bits in the cells of the memory, the method comprising: (a) reading the cells, thereby obtaining a plurality of read bits; and (b) correcting said read bits that correspond to the data bits based on said read bits that correspond to the parity bits, wherein said correcting is performed using respective probabilities of at least two of said read bits being erroneous, the respective probabilities derived from one or more aspects of said read bits, at least one of the one or more aspects comprising a position of respective significances of said read bits relative to a voltage state distribution of respective cells storing said read bits, wherein at least one said probability is different from at least one other said probability and wherein the at least one said probability and the at least one other said probability are associated with different read bits.