Patent ID: 8587013
Filing Date: 2013-11-19
Classification: H01L

Abstract:
1. A semiconductor package structure, comprising: an insulating substrate, comprising an upper surface, wherein the upper surface is divided into an element configuration region and an element bonding region located on an outer side of the element configuration region; a patterned conductive layer, configured on the insulating substrate, and comprising a plurality of circuits and at least one bonding pad, wherein the circuits are located in the element configuration region, and the bonding pad is located in the element bonding region; a light emitting diode (LED) chip, flip chip bonded on the patterned conductive layer, and located in the element configuration region, wherein the LED chip is electrically connected to the circuits; and a conductive connection part, configured on the patterned conductive layer, and located in the element bonding region, wherein the conductive connection part comprises a first end point and a second end point, the first end point is electrically connected to the bonding pad, and the second end point is electrically connected to an external circuit, wherein an orthographic projection of the LED chip on the patterned conductive layer is a rectangle, the bonding pad and a corner of the rectangle are correspondingly disposed, and a horizontal distance between an apex of the corner and the first end point of the conductive connection part is greater than or equal to 30 micrometers (μm).