Patent ID: 7195979
Filing Date: 2007-03-27
Classification: H01L,H03K

Abstract:
1. A method for driving a dual-gated MOSFET, the dual-gated MOSFET being switchable between conduction and blocking modes, the dual-gated MOSFET having a shielding gate, a switching gate, a gate-to-drain overlap region, and a drain-to-source resistance when the MOSFET is in the conduction mode, said method comprising: applying a first voltage signal to the shielding gate; maintaining the first voltage signal at a first voltage level prior to switching the MOSFET from the blocking mode to the conduction mode, the first voltage level being selected to substantially completely charge the gate-to-drain overlap region of the MOSFET; and further applying a second voltage signal to the switching gate, the second voltage signal switching the MOSFET between the blocking and conduction modes.