Patent ID: 7742520
Filing Date: 2010-06-22
Classification: H04B,H04L

Abstract:
1. An equalizer comprising: a controllable equalization circuit connected to receive a data waveform, and to receive a control signal, and arranged to apply an equalization to the data waveform in accordance with the control signal and provide a resultant waveform; a data sampler connected to receive the resultant waveform from the equalization circuit and to provide data sampled from the resultant waveform; an early/late detector connected to receive the resultant waveform, arranged to examine the resultant waveform to determine whether transitions between logic levels fall earlier or later than expected and to provide early/late indications; and a control circuit connected to receive the data samples and the early/late indications from the early/late detector and connected to provide accordingly the control signal to the equalization circuit, wherein the control circuit is arranged to generate the control signal in response to the occurrence of particular patterns of the data samples received and from information as to whether a transition between two consecutive samples of each pattern is early or late by: