Patent ID: 6737920
Filing Date: 2004-05-18
Classification: H03F,H03G

Abstract:
A circuit that receives an input signal and control signals, and outputs an amplified signal, comprising:a differential input that receives the input signal; a differential output that outputs the amplified signal; and a variable gain amplifier coupled between the differential input and the differential output, the variable gain amplifier containing a plurality of gain stages arranged in parallel, with each gain stage comprising: a differential pair of transistors; and a pair of cross-connected capacitors coupled to the differential pair of transistors, each cross-connected capacitor coupled from an input of one of the differential pair of transistors to an output of another of the differential pair of transistors, and configured to substantially cancel any undesired signals that cause feedback and thereby maintain substantially constant impedance within each gain stage, and wherein the control signals determine which of the plurality of gain stages are used to amplify the input signal to obtain the amplified signal.