Patent ID: 8521475
Filing Date: 2013-08-27
Classification: G06F

Abstract:
1. An apparatus in a data processing system, comprising: a plurality of single bit performance event record generation components that generate performance event records according to a system clock for a performance event monitored in a data processing system; a bit mask register that combines multiple bit performance signals into a single bit output signal and records whether a performance event to be monitored in the data processing system occurred, the multiple bit performance signals including multiple lines of signals associated with one another that, in combination, reflect the performance event to be monitored; a performance event record storage component that receives the single bit output signals from the plurality of single bit performance event record generation components and that stores the performance event record generated by at least one of the plurality of performance event record generation components; and a conflict arbitration component that arbitrates the storage conflict when said multiple performance event record generation components request to store their generated performance event records into the performance event record storage component at the same time, in order to determine the storage order of the performance event records of these performance event generation components.