Patent ID: 6251753
Filing Date: 2001-06-26
Classification: H01L

Abstract:
A method of forming a trench, a via or a contact hole in a dielectric layer on a substrate with a capping layer thereon, said method comprising the steps of:(a) forming a dielectric layer on a substrate;(b) forming a photoresist layer on the dielectric layer;(c) forming a trench, a via or a contact hole in said dielectric layer by photolithography, wherein the photoresist is patterned and the dielectric layer is etched by using the patterned photoresist as a mask;(d) forming a capping layer on side walls of said trench, said via or said contact hole and substantially not on the patterned photoresist by a selective liquid phase deposition of silicon dioxide; and(e) stripping said patterned photoresist.