Patent ID: 8975570
Filing Date: 2015-03-10
Classification: H04N

Abstract:
1. A CMOS image sensor device for operation in a time delay and integration mode, the device comprising: a photosensitive imaging array having at least one column having a plurality of pixels, each pixel coupled to a column bus; a plurality of analog sampling stages coupled to the column bus, each one of analog sampling stages corresponding to one of the pixels, each of the plurality of analog sampling stages having a first memory element to sample a reset level signal from the corresponding pixel and a second memory element coupled to a previous analog sampling stage to sample an output signal of the previous analog sampling stage, each of the plurality of analog sampling stages configured to integrate a sampled signal from the corresponding pixel with the stored reset level signal from the first memory element and the output signal of the previous analog stage stored in the second memory to provide an integrated output signal in a single integration operation, the integrated output signal having the sum of the sampled signal and the output signal of the previous analog stage while subtracting the reset level signal; and an analog to digital converter for each column that converts the integrated output signal from a final analog stage in a column to a digital signal once for the TDI line time, wherein the integrated output signal from the final analog stage includes a sum of the sampled signals from the plurality of pixels over previous TDI line times.