Patent ID: 6661279
Filing Date: 2003-12-09
Classification: G05F,H03F

Abstract:
A semiconductor integrated circuit comprising:a power supply voltage step down circuit which is supplied with a power supply voltage and controlled by a standby control signal indicating an operating state or a standby state, wherein the power supply voltage step down circuit outputs a first internal power supply voltage lower than the power supply voltage to an internal power supply line when the standby control signal indicates the operating state, and the power supply voltage step down circuit outputs a second internal power supply voltage lower than the first internal power supply voltage to the internal power supply line when the standby control signal indicates the standby state; and a MOS circuit group including one or more MOS transistors which are supplied with the first internal power supply voltage or the second internal power supply voltage from the internal power supply line to operate, wherein the power supply voltage step down circuit comprises: an operating power supply voltage step down circuit which generates the first internal power supply voltage to output it to the internal power supply line in the operating state, but which does not output the first internal power supply voltage in the standby state; and a standby power supply voltage step down circuit which generates the second internal power supply voltage to output it to the internal power supply line in the standby state, wherein the second internal power supply voltage is not a fixed predetermined voltage, and wherein the standby power supply voltage step down circuit estimates an amount of gate leakage currents flowing in the MOS circuit group and lowers the second internal power supply voltage as the estimated amount of the gate leakage currents becomes large.