Patent ID: 6143620
Filing Date: 2000-11-07
Classification: H01L,Y10S

Abstract:
A semiconductor processing method, comprising:placing a substrate within a chemical vapor deposition reactor;while the substrate is within the chemical vapor deposition reactor, chemical vapor depositing an in situ conductively doped amorphous silicon layer onto the substrate at a first temperature, the first temperature being below 600.degree. C., the doped amorphous silicon layer having an outer surface of a first degree of roughness;within the chemical vapor deposition reactor and after depositing the doped amorphous silicon layer, raising the substrate temperature at a selected rate to a higher annealing second temperature, the annealing second temperature being from 550.degree. C. to 950.degree. C.; andmaintaining the substrate at the annealing second temperature for a period of time sufficient to convert at least an outer portion of the doped amorphous layer into a doped polysilicon layer having an outer surface of a second degree of roughness, the second degree of roughness being greater than the first degree of roughness, the substrate not being removed from the reactor nor exposed to oxidizing conditions between the time of deposition of the doped amorphous silicon layer and its conversion to polysilicon.