Patent ID: 6479839
Filing Date: 2002-11-12
Classification: B82Y,C30B,H01L,Y02E

Abstract:
A compound semiconductor device, comprising:a substrate; a first high temperature n-type III-V compound layer having a first band gap grown directly on said substrate, wherein said high temperature n-type III-V compound layer is grown at a temperature greater than 900Â° C. using HVPE techniques, wherein a low temperature buffer layer is not interposed between said substrate and said high temperature n-type III-V compound layer; a second n-type III-V compound layer having a second band gap grown on said first high temperature n-type III-V compound layer using HVPE techniques, wherein said first band gap is wider than said second band gap; a first p-type III-V compound layer having a third band gap grown on said second n-type III-V compound layer using HVPE techniques; a second p-type III-V compound layer having a fourth band gap grown on said first p-type III-V compound layer using HVPE techniques, wherein said fourth band gap is wider than said third band gap; and a non-continuous quantum dot layer comprised of a plurality of AlxByInzGa1âˆ’xâˆ’yâˆ’zN quantum dot regions, said non-continuous quantum dot layer formed between said second n-type III-V compound layer and said first p-type III-V compound layer, wherein 0.01&lE;x+y&lE;0.2.