Patent ID: 8253611
Filing Date: 2012-08-28
Classification: H03M

Abstract:
1. A method for calibrating at least a portion of a pipelined continuous-time (CT) sigma-delta modulator (SDM), wherein the CT SDM includes a first stage, a second stage, and a first digital-to-analog converter (DAC) coupled between the first and second stages, and a digital filter that is coupled to the first and second stages, and wherein the second stage includes a second DAC, the method comprising: determining a ratio of a gain of the first DAC to a gain of the second DAC; adjusting a gain of a digital filter to be approximately equal to the ratio of the gain of the first DAC to the gain of the second DAC; and adjusting the digital filter to maximize a cross-correlation between an output of the digital filter and the output of the second stage.