Patent ID: 6148431
Filing Date: 2000-11-14
Classification: H03M

Abstract:
An integrated circuit having an add-compare-select (ACS) circuit, the ACS circuit performing an ACS function to provide a current state metric value of a current state from a set of previous states, each having a respective previous state metric value, the ACS circuit comprising:a plurality of combining circuits, each of the plurality of combining circuits receiving a corresponding one respective previous state metric value of the set of previous states, and each of which combines the corresponding one respective previous state metric value with a respective branch metric value defined for a transition between the respective one of the set of previous states and the current state, thereby to provide a respective updated state metric value, wherein each branch metric value being equivalent to one another;a comparator circuit which compares each previous state metric value of the set of previous states to determine one previous state metric value being a minimum value and to provide a corresponding select signal; anda multiplexer which, responsive to the select signal, selects as the current state metric value the respective updated state metric value provided by the one of the plurality of combining circuits which receives the one minimum previous state metric value,wherein the current and previous states are states of a portion of a trellis structure, a sequence of states of the trellis structure corresponding to sequence of received symbols representing data and a number of possible states for each transition determined by the number of possible values for the symbol, andwherein the ACS circuit is configured to implement a double state trellis structure derived from augmentation of the number of possible states of the trellis structure.