Patent ID: 9197202
Filing Date: 2015-11-24
Classification: H03K

Abstract:
1. A phase mixing circuit comprising: a first mixing unit configured to mix phases of first and second clocks at a predetermined ratio, and generate a first mixed signal; an inverting input unit configured to receive the first and second clocks, and generate an inverted signal of the first clock and an inverted signal of the second clock; a second mixing unit configured to mix phases of the inverted signal of the first clock and the inverted signal of the second clock at the predetermined ratio; an inverting driving section configured to receive output of the second mixing unit, and generate a second mixed signal; a delay unit configured to delay the first mixed signal, wherein a delay amount of the delay unit corresponds to delay amount of the inverting input unit and the inverting driving section; and an output unit configured to generate an output signal based on outputs of the delay unit and the inverting driving section.