Patent ID: 8595678
Filing Date: 2013-11-26
Classification: G06F

Abstract:
1. A method for producing an interconnection checking statement for validating an interconnection between logic block instances, the method comprising the steps of: a computer receiving a description of a first logic block instance, a second logic block instance, and an association between the first logic block instance and the second logic block instance in a circuit design, wherein the first and second logic block instances are each selected from a plurality of logic block designs; the computer locating a rule statement associated with a first logic block design from the plurality of logic block designs and corresponding to the first logic block instance, the rule statement defining an output of at least a second logic block design, from the plurality of logic block designs, as a valid connection source to an input of the first logic block design; the computer determining whether the second logic block instance in the description connects to the first logic block instance in the description by examining the association between the first and second logic block instances; the computer determining whether the second logic block design corresponds to the second logic block instance; and responsive to determining that the second logic block instance connects to the first logic block instance and that the second logic block design corresponds to the second logic block instance, the computer creating an interconnection checking statement asserting an interconnection between an output of the second logic block instance corresponding to the output of the second logic block design, and an input of the first logic block instance corresponding to the input of the first logic block design.