Patent ID: 6180466
Filing Date: 2001-01-30
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having an active region isolated by an insulated trench, said method comprising:forming a pad oxide on a main surface of a semiconductor substrate or an epitaxial layer formed on a semiconductor substrate;forming a nitride layer on the pad oxide layer;etching to remove selected portions of the nitride layer and to form an opening therein having side surfaces;depositing an insulating layer to cover the sides of the nitride layer;etching to form spacers protecting the side surfaces of the opening in the nitride layer and to remove portions of the pad oxide layer beneath the opening in the nitride layer;isotropically etching: to remove portions of the semiconductor substrate or the epitaxial layer beneath the opening in the nitride layer; and to undercut the pad oxide layer beneath nitride layer, thereby exposing a portion of the substrate or the epitaxial layer beneath the nitride layer;anisotropically etching to remove portions of the semiconductor substrate or the epitaxial layer to form a trench opening having an internal surface and vertically sloping sides; andforming a thin oxide liner at the internal surface of the trench opening, at the vertically sloping sides, and at the exposed portion of the substrate or the epitaxial layer using the barrier nitride layer as an oxidation mask.