Patent ID: 6081138
Filing Date: 2000-06-27
Classification: G11C

Abstract:
A sense amplifier suitable for use in a semiconductor memory device, comprising:a first data line to which a first data signal is transmitted;a second data line to which a second data signal complementary to the first data signal is transmitted;a sense amplifier unit have a first amplifier circuit for outputting a first amplified signal obtained by amplifying the first data signal and a second amplifier circuit for outputting a second amplified signal obtained by amplifying the second data signal, wherein the first amplifier circuit has a first node and is coupled between the first data line and a third node, and wherein the second amplifier circuit has a second node and is coupled between the second data line and a fourth node;a first sense amplifier driving switch circuit coupled between the third node and a ground potential;a second sense amplifier driving switch circuit coupled between the fourth node and the ground potential;a first inverter circuit for inverting the first amplified signal from the first node to thereby output a first inverted signal from a first output terminal, wherein said first inverter circuit is coupled between the third node and one of the first and second data lines;a second inverter circuit for inverting the second amplified signal from the second node to thereby output a second inverted signal from a second output terminal, wherein said second inverter circuit is coupled between the fourth node and the other one of the first and second data lines;the first sense amplifier driving switch circuit controlled by a sense amplifier enable signal and activated so as to drive said first amplifier circuit; andthe second sense amplifier driving switch circuit controlled by the sense amplifier enable signal and activated so as to drive said second amplifier circuit.