Patent ID: 6303997
Filing Date: 2001-10-16
Classification: H01L

Abstract:
A semiconductor package, comprising:a semiconductor chip having an integrated circuit;a plurality of input/output pads on a central portion of a first surface of said semiconductor chip for making electrical connections between the integrated circuit of said semiconductor chip and a circuit external thereto;a plurality of leads from a lead frame, each said lead having an inner end portion extending radially inward toward said input/output pads on said chip and an upper and a lower surface, one of which surfaces is bonded to said first surface of said semiconductor chip, and a projection having a raised surface formed on each of said upper and lower surfaces of each said lead at a distal end portion thereof;connection means for electrically connecting said leads of said plurality of leads to corresponding input/output pads of said semiconductor chip;an encapsulated portion enveloping said semiconductor chip, said plurality of leads and said connection means such that said raised surfaces of said projections are flush with an outer surface of said encapsulated portion; and,a plurality of solder balls respectively welded to said raised surface of said projection of each said lead on at least one of said upper and lower surfaces thereof.