Patent ID: 6268620
Filing Date: 2001-07-31
Classification: H01L

Abstract:
A method or making a semiconductor device, comprising the steps of:providing a substrate;forming an insulating layer on said substrate;forming a series of holes in said insulating layer;placing said substrate in a sputtering chamber;sputtering a first conductive layer of a metal, or a compound thereof, over said insulating layer such that said first conductive layer covers an upper surface of said insulating layer and lines said holes formed therein;sputtering a dielectric layer over said first layer in said sputtering chamber, said dielectric consisting of a compound of said metal and being formed by the introduction of a reactive gas into said sputtering chamber to react with said metal to form said compound; andsputtering a second conductive layer of said metal, or a compound thereof, over said dielectric layer in said sputtering chamber;whereby said first, second and dielectric layers form a conformal capacitive sandwich structure extending into said holes.