Patent ID: 6825721
Filing Date: 2004-11-30
Classification: H03F

Abstract:
A differential amplifier circuit comprising:(a) first and second supply voltage rails, first and second input terminals, and an output terminal; (b) differentially connected first and second input transistors of a first channel type to the first and second input terminals; (c) a folded cascode circuit coupled to the first supply voltage rail and including a first cascode transistor and a second cascode transistor both of a second channel type, sources of the first and second cascode transistors being coupled to drains of the first and second input transistors, respectively; (d) a first load transistor of the second channel type coupled between the source of the second cascode transistor and the first supply voltage rail and a second load transistor of the second channel type coupled between the source of the first cascode transistor and the first supply voltage rail; (e) a bias source producing a bias signal on gates of the first and second cascode transistors; (f) a third cascode transistor of the second channel type having a source coupled to a drain of the second cascode transistor and a drain coupled to a first current source, a drain of the first cascode transistor being coupled to a second current source, and a voltage level shift circuit coupled between the drain of the third cascode transistor and second load transistors; and (g) a gain boost amplifier having a first input coupled to the drain of the first cascode transistor, a second input coupled to the drain of the second cascode transistor, and an output coupled to a gate of the third cascode transistor.