Patent ID: 7544556
Filing Date: 2009-06-09
Classification: H01L

Abstract:
1. A process for forming a CMOS device comprising: selectively implanting impurities into a semiconductor substrate so as to form shallow implant regions that extend on opposite sides of a gate film stack; forming a first set of spacers over the semiconductor substrate such that the first set of spacers extend on opposite sides of the gate film stack, the first set of spacers having a shape that is approximately triangular; selectively implanting impurities into the semiconductor substrate so as to form intermediate implant regions on opposite sides of the gate film stack; forming a second set of spacers over the semiconductor substrate, the second set of spacers partially covering the intermediate implant regions; selectively implanting impurities into the semiconductor substrate so as to form deep implant regions; removing the second set of spacers; forming a barrier layer immediately over the first set of spacers after the removing the second set of spacers; forming a dielectric film that extends over the barrier layer; and forming a self aligned contact that extends through the dielectric film and the barrier layer so as to contact one of the deep implant regions.