Patent ID: 8004447
Filing Date: 2011-08-23
Classification: H03M

Abstract:
1. A successive approximation analog to digital converter, comprising: a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal outputting a comparison result; a most significant bit (MSB) capacitor array having a first input terminal receiving a first reference voltage, a second input terminal sampling a signal so as to proceed a first conversion, a third input terminal receiving a second reference voltage, and a second output terminal outputting a first potential value and coupled to one of the inverting input terminal and the non-inverting input terminal; and a least significant bit (LSB) capacitor array having a fourth input terminal receiving the second reference voltage, a third output terminal outputting a second potential value, coupled to the non-inverting input terminal when the second input terminal is coupled to the inverting input terminal, and coupled to the inverting input terminal when the second input terminal is coupled to the non-inverting input terminal.