Patent ID: 6573752
Filing Date: 2003-06-03
Classification: H03K

Abstract:
A high voltage, high side driver circuit comprising:a top PFET having gate, drain, source, and bulk wherein said gate is coupled to a switching signal and said source is coupled to a high voltage; a top resistor with first and second terminals wherein said first terminal is coupled to said high voltage; a middle PFET cell comprising: a middle PFET having gate, drain, source, and bulk wherein said source is coupled to said top PFET drain and said gate is coupled to said top resistor second terminal; a middle resistor having first and second terminals wherein said first terminal is coupled to said middle PFET gate; and a middle means of clamping said middle PFET gate to a clamping voltage; and a bottom PFET cell comprising: a bottom PFET having gate, drain, source, and bulk wherein said gate is coupled to said middle resistor second terminal, said source is coupled to said middle PFET drain, and said drain forms a high side driver output; a bottom resistor coupled between said bottom PFET gate and said high side driver output; and a bottom means of clamping said bottom PFET gate to said clamping voltage.