Patent ID: 7848366
Filing Date: 2010-12-07
Classification: H04Q

Abstract:
1. A data-transmission device having a number of N uplink interfaces routable to an output element over a processing line provided with data-processing components, comprising: a first processing line and a second processing line, each having two separate processing rows for in each case N/2 data lines, with a first half of the N uplink interfaces being connected to the first processing line and a second half of the N uplink interfaces being connected to the second processing line, and with each processing line having a circuit arrangement by means of which the N/2 data lines connected to the processing line are connectable to the respective other processing line to one of the two processing rows available there, and with the circuit arrangements being controlled in such a way that one of the two processing lines is active and the respective other can be switched to a standby mode so that the data traffic waiting at the N uplink interfaces can be handled via one of the two processing lines; wherein a line crossover arising through transferring of the N/2 data lines can be canceled by means of a static multiplexer as a circuit arrangement; wherein N>4 and N is an even number; wherein the multiplexer is controlled by a slot that is derived statically from a mounting location of a board containing whichever one of the first processing line and the second processing line is active; and wherein at least one of the first processing line and the second processing line includes a line module with internal terminations that are switched either directly or crossed over to downstream framers in which signal processing takes place.