Patent ID: 6590287
Filing Date: 2003-07-08
Classification: H01L,H05K,Y02P

Abstract:
A semiconductor device packaging structure comprises:an electric connection made via bumps between an electrode of a semiconductor device and that of a wiring substrate; and a stacked formation between said semiconductor device and said wiring substrate comprising a first resin decreasing in mechanical strength and becoming reworkable under predetermined temperature conditions, and a second resin capable of moderating a stress due to a difference in thermal expansion coefficient between said semiconductor device and said wiring substrate and better in mechanical strength than the first resin under said predetermined temperature conditions, wherein the first resin is formed at a thickness of less than a half of a distance between the semiconductor device and the wiring substrate in total directly on a surface of at least either of said semiconductor device and said wiring substrate, wherein said second resin is directly on a surface of one of the semiconductor device and the wiring substrate, and wherein said first and second resins are directly secured together at an interface between the first and second resins.