Patent ID: 6831653
Filing Date: 2004-12-14
Classification: G06T

Abstract:
A method for efficiently transferring output pixels, received from one or more graphics data rendering pipelines, to a frame buffer, the method comprising:receiving a tile of output pixels from one or more rendering pipelines, wherein a tile comprises one or more pixels, up to a specified maximum number of pixels, and wherein a full tile comprises the specified maximum number of pixels; storing the tile in one or more first-in first-out (FIFO) write queues connected to the output of the rendering pipelines; determining whether a second tile of pixels stored in the FIFO write queues has one or more pixels eligible to be shifted to a first tile, in response to detecting that the first tile of pixels is not a full tile of pixels; shifting the one or more eligible pixels from the second tile into the first tile; and transferring the first tile of pixels from the FIFO write queues to a frame buffer, wherein said shifting results in an increase in the average number of pixels stored in the frame buffer per frame buffer write cycle.