Patent ID: 6219293
Filing Date: 2001-04-17
Classification: G11C

Abstract:
An internal voltage regulator for a memory device having an array of memory cells and a charge pump, the internal voltage regulator comprising a plurality of regulator circuits adapted to receive an external supply voltage and being operable to generate respective regulated output voltages, a first of the regulator circuits being coupled to the array of memory cells to supply a first regulated output voltage thereto, and a second of the regulator circuits being coupled to the charge pump to supply a second regulated output voltage thereto, the first regulator circuit being structured to generate the first regulated output voltage as a first function of the external supply voltage and to maintain the magnitude of the first regulated output voltage substantially constant responsive to the magnitude of the external supply voltage being in a normal operating range, and to increase the magnitude of the first regulated output voltage responsive to the magnitude of the external supply voltage increasing above the normal operating range, the second regulator circuit being structured to generate the second regulated output voltage as a second function of the external supply voltage, the first function being differing from the second function, and the second voltage regulator is constructed to maintain the magnitude of the second regulated output voltage substantially constant responsive to the magnitude of the external supply voltage being in the normal operating range and responsive to the magnitude of the external supply voltage increasing by at least some magnitude above the normal operating range.