Patent ID: 8156314
Filing Date: 2012-04-10
Classification: G06F,G06T

Abstract:
1. A method for managing incremental state updates to data in a processor, the processor including a register and a memory, the register configured to store entries, each entry including a data value, an address corresponding to a memory address, and a data time stamp, the processor configured to execute one or more threads, each thread having a thread time stamp, the method comprising: checking the register for an entry corresponding to a memory address; if there is no entry in the register corresponding to the memory address, then retrieving a data value from the memory address; if there is an entry in the register corresponding to the memory address, retrieving a data value from the entry in the register corresponding to the memory address only if the data time stamp of the data value is earlier than the thread time stamp; and executing the thread with the retrieved data value.