Patent ID: 8941219
Filing Date: 2015-01-27
Classification: H01L

Abstract:
1. An integrated circuit package system comprising: a die pad; an interconnection pad coplanar with and spaced away from the die pad; a first device mounted on the die pad and below the interconnection pad; a bond wire or a solder ball in direct contact with the first device and in direct contact with the interconnection pad; a lead having a top planar surface and a bottom planar surface, the lead isolated from the interconnection pad and connected to the first device, the interconnection pad between the lead and the die pad; and an encapsulation having a top surface over the first device and a recess in the top surface of the encapsulation with the interconnection pad exposed within the recess, the interconnection pad in direct contact with the encapsulation, the interconnection pad separated from, the lead by the encapsulation, and the bottom planar surface above the interconnection pad.