Patent ID: 8673734
Filing Date: 2014-03-18
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising: etching a portion of a semiconductor substrate to form a shallow trench isolation (STI) layer; sequentially forming an oxide layer and a nitride layer on or over the semiconductor substrate and the STI layer; patterning the nitride layer and the oxide layer to expose a portion of the semiconductor substrate adjacent to the STI layer and to define a field oxide region; forming a field oxide layer in contact with the STI layer in the exposed portion of the semiconductor substrate; removing the nitride layer; etching the patterned oxide layer to form a first gate oxide layer in contact with the field oxide layer; forming a second gate oxide layer on the semiconductor substrate; and forming a gate pattern on or over the field oxide layer, the first gate oxide layer, and the second gate oxide layer.