Patent ID: 8566265
Filing Date: 2013-10-22
Classification: G06N,H03M

Abstract:
1. A neural network comprising: an array of interconnected processors, at least a first processor in said array operating in a pulse domain and at least a second processor in said array operating in a spike domain, and each said processor having: first inputs selectively coupled to other processors in said array of interconnected processors, each first input having an associated voltage controlled current source coupled to a summing node, second inputs selectively coupled to inputs of the neural network, the second inputs having current generators associated therewith coupled to said summing node, a filter/integrator for generating an analog signal corresponding to current arriving at the summing node, and for processors operating in the pulse domain, an analog-to-pulse converter for converting an analog signal derived either directly from the filter/integrator or via a non-linear element, to the pulse domain, and providing the converted analog signal as an unquantized pulse domain signal at an output of each processor operating in the pulse domain and for processors operating in the spike domain, an analog-to-spike converter for converting an analog signal derived either directly from the filter/integrator or via a non-linear element, to the spike domain, and providing the converted analog signal as an unquantized spike domain signal at an output of each processor operating in the spike domain; wherein the array of interconnected processors are selectively interconnected with unquantized pulse domain and spike domain signals.