Patent ID: 7923840
Filing Date: 2011-04-12
Classification: H01L

Abstract:
1. An integrated circuit comprising: a first barrier oxide layer on a semiconductor substrate; a second barrier oxide layer over the first barrier oxide layer; a semiconductor layer between and completely separating the first barrier oxide layer and the second barrier oxide layer, a portion of the semiconductor layer entirely containing an electrically conductive path including a metal, wherein the semiconductor layer is located directly below the second barrier oxide layer; a semiconductor device above the electrically conductive path, the semiconductor device including a transistor; a plurality of contacts extending from the semiconductor device to the electrically conductive path, each of the plurality of contacts directly contacting a sidewall of the transistor; and a plurality of isolation regions entirely above the electrically conductive path, wherein the transistor is located between the plurality of isolation regions on a same level as the plurality of isolation regions, and wherein each of the plurality of contacts extends between and separates one of the plurality of isolation regions and the transistor.