Patent ID: 6072721
Filing Date: 2000-06-06
Classification: G11C

Abstract:
A semiconductor nonvolatile memory device, comprising:a plurality of bit lines;a plurality of word lines;at least one source line;a plurality of memory blocks, each constituted by memory transistors which have control gate electrodes connected to the word lines and which are electrically programmed in data connected between the bit lines and the source lines via selection transistors, arranged in the form of a matrix;a means for decoding a source line connected to a selected memory block;a means for selecting the source line to which the selected memory block is connected and charging up the potential of channel portion of the selected memory block from the source line to the programming prohibit potential at the time of a data programming operation;a means for discharging the programming prohibit potential charged in the channel portion of the memory block to the bit line according to the content of data to be programmed; anda means for performing page programming together for memory transistors connected to the selected word line by supplying the programming voltage to the selected word line.