Patent ID: 7120706
Filing Date: 2006-10-10
Classification: G06F

Abstract:
1. A method of operating a memory management system to resolve contention for access to a data bus extending to a plurality of memories; said method comprising the steps of: generating requests for a reading and writing of data in said memories; generating signals indicating a busy/idle state of each of said memories; extending said signals from said memories to an access flow regulator over a request bus comprising separate conductors independent of said data bus with each conductor being individual to a different one of said memories; operating said access flow regulator in response to a receipt of said signals to determine a busy/idle state of each of said memories; applying said requests to said access flow regulator; and operating said access flow regulator in response to a determination that one of said memories is currently idle for granting a request for access to said data bus for a reading or writing of data in said one memory.