Patent ID: 8946900
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A semiconductor package, comprising: first and second adjacent semiconductor dies; a silicon bridge structure electrically coupling the first and second semiconductor dies, and comprising a plurality of layers of conductive traces disposed above a substrate of the silicon bridge structure, a first pair of ground traces disposed in a first of the plurality of layers of conductive traces, a signal trace disposed in a second of the plurality of layers of conductive traces, below the first layer, and a second pair of ground traces disposed in a third of the plurality of layers of conductive traces, below the first layer and the second layer, wherein the first and second pairs of ground traces and the signal trace provide an X-pattern routing from a cross-sectional perspective; and a plurality of package routing layers, wherein the silicon bridge structure is disposed in one of the package routing layers, the first and second die are disposed on the plurality of package routing layers, and at least one of the first and second die is electrically coupled to the plurality of package routing layers.