Patent ID: 8389392
Filing Date: 2013-03-05
Classification: H01L

Abstract:
1. A method for fabricating a FinFET that has separate gates, comprising: providing a substrate with a transistor structure that has fabricating a first contact opening that extends through the cover layer to the contact section of the first gate layer; selectively, with respect to at least the cover layer and the substrate, removing through the first contact opening the first gate layer in the contact section and at least on the adjacent lateral face of the fin, stopping the removal before reaching an onset of the opposite lateral fin face, thus forming a first tunnel having an end wall formed by an end face of remaining parts of the first gate layer; depositing a second gate-isolation layer on the tunnel walls, thus also forming a gate-separation layer on the end wall of the first tunnel and covering the end face of the remaining parts of the first gate layer; and fabricating a first gate electrode by filling the remaining volume of the first tunnel with electrically conductive material.