Patent ID: 7099163
Filing Date: 2006-08-29
Classification: H02M

Abstract:
1. A PWM controller for controlling an output power limit of a power supply, comprising: a current switch unit, having a first terminal connected to a line input voltage of the power supply via a start-up resistor, a second terminal coupled to a power supply voltage, a third terminal connected to an under-voltage lockout unit, and a four terminal; a current multiplier, having a first terminal coupled to the four terminal of the current switch unit, and a second terminal; an adder, having a negative input terminal coupled to the second terminal of the current multiplier, a positive input terminal coupled to a reference current, and an output terminal; a resistor, having a first terminal coupled between the third terminal of the adder, and a second terminal coupled to a ground voltage; a buffer, having a input terminal coupled between the output terminal of the adder and the first terminal of the resistor, and an output terminal; a first comparator, having a positive input terminal coupled to the output terminal of the buffer, a negative input terminal, and an output terminal; a second comparator, having a positive input terminal coupled to the supply voltage, a negative terminal coupled to the negative terminal of the first comparator, and an output terminal; a NAND gate, having two input terminals coupled to the output terminals of the first and second comparators, and an output terminal; and a flip flop, coupled to the output terminal of the NAND gate; and an oscillator, coupled to the flip flop.