Patent ID: 6509221
Filing Date: 2003-01-21
Classification: H01L

Abstract:
A method for making a semiconductor device having an NFET device and a PFET device, each of the NFET device and the PFET device including a gate structure on a substrate, the gate structure having a top surface and sidewalls, the method comprising the steps of:forming a spacer disposed on each of the sidewalls and projecting laterally therefrom, the spacer covering an upper portion of the sidewall and being elevated with respect to the substrate; performing a first ion implantation at an angle of incidence other than normal to the substrate, thereby forming an implanted region in the substrate adjacent to the NFET gate structure, and performing a second ion implantation at normal incidence to the substrate, thereby forming an implanted region in the substrate offset from the PFET gate structure in accordance with a lateral projection distance of the spacer.