Patent ID: 6049226
Filing Date: 2000-04-11
Classification: H03K

Abstract:
A level converter, comprising:a level converter input, a level converter output and an inverted level converter output;a first push-pull input stage having first and second inputs and first and second outputs;first and second transistors each having first and second outputs and a control input;said first input of said first push-pull input stage connected to said level converter input, and said first output of said first push-pull input stage connected to the control input of said first transistor;said second output of said first push-pull input stage connected to the first output of said first transistor, to the first output of said second transistor and to said level converter output;an inverter;a second push-pull input stage having first and second inputs and first and second outputs;third and fourth transistors each having first and second outputs and a control input;said first input of said second push-pull input stage connected through said inverter to said level converter input, and said first output of said second push-pull input stage connected to the control input of said third transistor;said second output of said second push-pull input stage connected to the first output of said third transistor, to the first output of said fourth transistor and to said inverted level converter output;said second inputs of said first and second push-pull input stages and the second outputs of said first and third transistors connected to a first potential;the second outputs of said second and fourth transistors connected to a second potential; andthe control input of said second transistor connected to said inverted level converter output, and the control input of said fourth transistor connected to said level converter output.