Patent ID: 9190445
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A semiconductor device, comprising; a semiconductor substrate having a main surface, the main surface including a first area and a second area, the first area and the second area being respectively surrounded by an element isolation region made of an insulator in a plan view; a first semiconductor region of a first conductive type formed in the semiconductor substrate, the first semiconductor region extending at both the first area and the second area; a gate electrode formed on the main surface of the semiconductor substrate at the first area; a second semiconductor region of a second conductive type opposite to the first conductive type formed in the first semiconductor region at the first area to form a PN junction with the first semiconductor region, the second semiconductor region being disposed at one side of the gate electrode in the plan view; a third semiconductor region of the second conductive type formed in the first semiconductor region at the first area and being disposed at the other side of the gate electrode in the plan view; a gettering region formed in the first semiconductor region at the second area; a first silicide layer formed on the gettering region; and a contact plug formed on the gettering region and electrically coupled to the first semiconductor region via the first silicide layer, wherein a transfer transistor for transferring a charge generated by a photo diode including the PN junction is comprised of the second semiconductor region, the gate and the third semiconductor region, wherein the gettering region is a diffused region including carbon as impurity, and wherein a ground potential is applied to the contact plug.