Patent ID: 6624778
Filing Date: 2003-09-23
Classification: H03M

Abstract:
An AD-converter, comprising:a plurality of amplifying circuits having generally uniform amplifying and impedance characteristics, each circuit comprising: an input voltage terminal; a reference voltage terminal; and an output voltage terminal; an input voltage network applying an analog input voltage to each input voltage terminal of said amplifying circuits; a reference voltage network applying reference voltages of a generally uniformly spacing to each reference voltage terminal of said amplifying circuits, wherein a relative functional position of each amplifying circuit is determined by the magnitude of a received reference voltage; an averaging network, comprising of generally identical averaging impedances coupling output voltage terminals of adjacent amplifying circuits; an output voltage network for outputting amplified voltage differences from each of said plurality of amplifying circuits; and a termination network comprising a termination circuit and a termination averaging impedance, said termination circuit receiving an input voltage and a termination reference voltage and comprising an output voltage terminal that is coupled by said termination averaging impedance to an output voltage terminal of an outer amplifying circuit of said array, characterized in that the amplifying and/or impedance characteristics of said termination circuit and/or the termination reference voltage, and/or the termination averaging impedance are deviant to generate a current in said output voltage terminal of said outer amplifying circuit of said array, that is corrected for the finite size of the array.