Patent ID: 7060575
Filing Date: 2006-06-13
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor device comprising: (a) preparing a semiconductor substrate having a cell area and a peripheral circuit area; (b) forming gate electrodes having gate electrode tops and etch mask layers on the semiconductor substrate having the cell area and the peripheral circuit area; (c) forming an etch stopper on the gate electrodes; (d) forming sacrificial spacers at sidewalls of the gate electrodes and the etch mask layers so that the etch stopper extends between the sacrificial spacers and the sidewalls of the gate electrodes and the etch mask layers from adjacent the semiconductor substrate to adjacent the gate electrode tops, wherein the etch stopper is formed of a first material, the sacrificial spacers are formed of a second material, and the first material is different than the second material; (e) filling the semiconductor substrate between the gate electrodes in the cell area and the peripheral circuit area with an interlevel dielectric layer (f) removing the interlevel dielectric layer and the sacrificial spacers from the cell area; and (g) forming cell area spacers at sidewalls of the gate electrodes and the etch mask layers in the cell area, wherein the cell area spacers are formed of a third material that is different than the second material of the sacrificial spacers.