Patent ID: 7288963
Filing Date: 2007-10-30
Classification: H03K

Abstract:
1. A level-conversion circuit, comprising: an input-timing control unit; a PMOS-driver control unit; an NMOS-driver control unit; and an output unit, wherein the input-timing control unit receives a small-amplitude signal, as an input signal, and transmits an inverted-input signal generated by inverting the input signal, wherein the output unit transmits a large-amplitude output signal according to at least two control signals transmitted from the PMOS-driver control unit and the NMOS-driver control unit to which the input signal and the inverted-and-input signal are transmitted, and wherein: the output unit further includes a data-holding unit, each of the control signals transmitted from the PMOS-driver control unit and the NMOS-driver control unit is a one-shot-pulse control signal, the output unit transmits the large-amplitude output signal due to the one-shot-pulse signal, and the data-holding unit holds the large-amplitude output signal.