Patent ID: 7972967
Filing Date: 2011-07-05
Classification: H01L

Abstract:
1. A method of forming patterns of a semiconductor device, comprising: forming an auxiliary layer over an underlying layer comprising a cell region and a select transistor region; forming a first passivation layer over the auxiliary layer, wherein the first passivation layer blocks the auxiliary layer of the select transistor region and opens the auxiliary layer of the cell region; forming (a) a first photoresist pattern having a narrower width than the first passivation layer over the first passivation layer and (b) second photoresist patterns, each second photoresist pattern having a narrower width than the first photoresist pattern, over an opening region of the auxiliary layer, to define a gap between the first and second photoresist patterns and a gap between the second photoresist patterns, wherein the gap between the first and second photoresist patterns is identical in width with the gap defined between the second photoresist patterns; removing an exposed region of the first passivation layer; removing exposed regions of the auxiliary layer to form auxiliary patterns; removing the first and second photoresist patterns to expose the first passivation layer and the auxiliary patterns that do not overlap with the first passivation layer; forming spacers on sidewalls of the auxiliary patterns; and removing the exposed auxiliary patterns.