Patent ID: 6274435
Filing Date: 2001-08-14
Classification: H01L

Abstract:
A method for fabricating a capacitor comprising:providing an insulating layer overlying a semiconductor substrate;forming a capacitor bottom plate electrode overlying said insulating layer;depositing a capacitor dielectric layer overlying said capacitor bottom plate electrode;depositing an etch stop layer overlying said capacitor dielectric layer;depositing an oxide layer overlying said etch stop layer;etching away said oxide layer over said capacitor bottom plate electrode stopping at said etch stop layer whereby a recess is formed in said oxide layer overlying said bottom plate electrode wherein sidewalls of said oxide layer overlie the edges of said bottom plate electrode;forming a capacitor top plate electrode within said recess whereby a guard ring is formed on said sidewalls of said oxide layer within said recess and wherein gaps are left between said capacitor top plate electrode and said guard ring; andcovering said top plate electrode with a dielectric layer wherein said gaps are filled by said dielectric layer to complete formation of said capacitor in the fabrication of said integrated circuit device.