Patent ID: 6173025
Filing Date: 2001-01-09
Classification: H03L

Abstract:
A phase-locked loop frequency synthesizer comprising:a reference frequency oscillator;a first resettable frequency divider having a fixed scaling factor connected to the reference frequency oscillator;a voltage-controlled oscillator;a second resettable frequency divider having a variable scaling factor connected to the voltage-controlled oscillator;a phase detector for detecting a phase difference between the first and second frequency dividers and producing a first output pulse representative of the phase difference when said second frequency divider is leading and a second output pulse representative of the phase difference when said second frequency divider is lagging;a charge integrating circuit for integrating said first and second output pulses to produce a phase difference signal;a lowpass filter for filtering out high frequency components of the phase difference signal and operating said voltage-controlled oscillator;a control circuit responsive to the first and second output pulses of the phase detector for detecting an initial phase difference which occurs between said first and second frequency dividers immediately after the instant the first and second frequency dividers are energized and resetting one of the first and second frequency dividers so that said frequency dividers are aligned in phase; anda gate circuit connected between the phase detector and the charge integrating circuit for preventing said first and second output pulses of the phase detector from being applied to the charge integrating circuit when the initial phase difference is detected by the control circuit.