Patent ID: 8232196
Filing Date: 2012-07-31
Classification: H01L,Y10T

Abstract:
1. A method of forming an interconnect structure comprising: providing an initial interconnect structure that includes a lower interconnect level comprising a first dielectric layer having a first conductive material embedded therein, an upper interconnect level comprising a second dielectric layer having at least one via opening that exposes a portion of said first conductive material located atop said lower interconnect level, said lower and upper interconnect levels are separated in part by a dielectric capping layer, and a patterned hard mask on a surface of the said upper interconnect level; removing an exposed portion of said conductive material to form at least one via gouging feature within said conductive material at a bottom of said at least one via opening; forming a dielectric liner layer on all exposed surfaces; forming at least one line opening in said second dielectric layer that extends above said at least one via opening; selectively removing said dielectric liner layer from said at least one via gouging feature while keeping at least a portion of said dielectric liner layer at sidewalls of said at least one via opening unremoved; forming a first diffusion barrier layer on all exposed surfaces; and filling said at least one line opening and at least one via opening with a second conductive material.