Patent ID: 8551878
Filing Date: 2013-10-08
Classification: H01L

Abstract:
1. A metal interconnection method of a semiconductor device, comprising: forming a copper layer on a semiconductor substrate; thermally treating the copper layer at a first temperature; thermally treating the copper layer at a second temperature; forming a copper interconnection by patterning the copper layer; and forming an anti-oxidation layer on the copper interconnection at a third temperature, wherein the second temperature is substantially equal to the third temperature, wherein, the copper interconnection comprises a first portion of the copper layer within a first opening of a dielectric layer, wherein forming the copper interconnection by patterning the copper layer includes removing a second portion of the copper layer by planarization etching to expose the dielectric layer, and wherein the steps of thermally treating the copper layer at the first temperature and thermally treating the copper layer at the second temperature occur prior to removing the second portion of the copper layer to expose the dielectric layer and prior to any planarization etching of the copper layer.