Patent ID: 7486343
Filing Date: 2009-02-03
Classification: G02F

Abstract:
1. A thin film transistor (TFT) array panel, comprising: a substrate; a gate line formed on the substrate; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer; a data line formed on the semiconductor layer; a drain electrode separated from the data line and formed on the semiconductor layer; a coupling electrode comprising integral first and second portions extending from the drain electrode, wherein the first and second portions extend along different directions from each other; a first subpixel electrode connected to the drain electrode; and a second subpixel electrode separated from the first subpixel electrode and overlapping the coupling electrode, wherein a gap between the first subpixel electrode and the second subpixel electrode and the first portion of the coupling electrode are formed in a same direction and overlap each other, and the second portion of the coupling electrode extends along the data line.