Patent ID: 7713811
Filing Date: 2010-05-11
Classification: H01L

Abstract:
1. A process for forming bipolar junction transistors in a semiconductor substrate, the process comprising: forming first doped tub regions of a first dopant type within the substrate in a first metal oxide semiconductor field effect transistor (MOSFET) regions of the substrate; concurrently forming doped sinker regions of a second dopant type, opposite in type to the first dopant type, within first, second, third and fourth bipolar junction transistor (BJT) regions in the substrate and forming second doped tub regions with the second dopant type in second MOSFET regions; concurrently forming subcollector regions within the first, second and fourth BJT regions and forming triple well regions within the first MOSFET regions all with the second dopant type, wherein the triple well regions and the second doped tub regions cooperate to electrically isolate the first doped tub regions of the first MOSFET regions from the substrate, and wherein each one of the subcollector regions cooperate with respective doped sinker regions in the first, second and fourth BJT regions; forming gate electrodes over triple wells in the first MOSFET regions and over the second doped tub regions in the second MOSFET regions; concurrently doping unmasked portions of the doped sinker regions in the first, second, third and fourth BJT regions and the first doped tub regions with the second type dopant, including forming source/drain regions adjacent the gate electrodes in the first MOSFET regions; and doping the third and fourth BJT regions with the second dopant type to form a subcollector in the third BJT region and further doping the subcollector in the fourth BJT region.