Patent ID: 7989296
Filing Date: 2011-08-02
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming a first silicon germanium (SiGe) layer formed on a bulk semiconductor substrate; forming a silicon (Si) layer on the first SiGe layer; defining an active region on the semiconductor substrate; sequentially forming a gate insulating layer and a gate electrode on the Si layer; selectively removing portions of the Si layer and the first SiGe layer to form a recess region exposing the semiconductor substrate, the recess region being formed in the active region near the gate electrode; forming a semiconductor layer within the recess region; selectively removing the first SiGe layer to form spaces below the Si layer in the active region; epitaxially growing Si, such that the Si layer and the semiconductor layer are joined; and, forming source and drain regions in the semiconductor layer.