Patent ID: 7626272
Filing Date: 2009-12-01
Classification: H01L,H03K

Abstract:
1. A semiconductor device comprising: a circuit foundation comprising a first plurality of circuit elements; an interconnect quilt formed over the circuit elements, the interconnect quilt comprising a plurality of sections adjacent to one another, each section having a first layer comprising upper routing tracks and a second layer comprising lower routing tracks with the upper routing tracks crossing over the lower routing tracks at crossover points, the routing tracks in the first and second layers belonging to one section being rotated 90° relative to the routing tracks in the corresponding layers belonging to an adjacent section, and the first plurality of circuit elements being connected to the lower routing tracks; and a plurality of vias connecting the upper routing tracks to the lower routing tracks at only some of the crossover points in each of a plurality of sections, to thereby interconnect some of said first plurality of circuit elements and form an electrical circuit.