Patent ID: 8643006
Filing Date: 2014-02-04
Classification: H01L

Abstract:
1. A thin film transistor, comprising: a substrate; a gate, disposed on the substrate; a gate insulating layer, disposed on the gate; a source and a drain, disposed on the gate insulating layer, wherein the source, the drain and the gate insulating layer together form a hollow; a channel layer, disposed under the source and the drain, wherein a portion of the channel layer is exposed by the hollow between the source and the drain; a first patterned passivation layer, disposed completely within the hollow and contacting the portion of the channel layer, wherein the first patterned passivation layer includes a metal oxide, the first patterned passivation layer has a thickness ranging from 50 angstroms to 300 angstroms; and a second patterned passivation layer, covering the first patterned passivation layer and disposed within the hollow.