Patent ID: 8802496
Filing Date: 2014-08-12
Classification: H01L,H05K

Abstract:
1. A method of manufacturing a semiconductor package comprising: patterning an electrode formed on a mounting substrate having a semiconductor element mounted thereon to form a coplanar waveguide including a signal electrode and ground electrodes arranged on both sides of the signal electrode with intervals therebetween; forming a mask on the ground electrode in an outer circumferential part of a mounting region of the semiconductor element and etching the ground electrode in a region where the mask is not formed to form a step part having a larger distance between an upper surface of the mounting substrate and an upper surface of the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region; forming an insulator that covers the signal electrode in the outer circumferential part of the mounting region; flip-chip connecting the semiconductor element to the mounting substrate with a bump therebetween to mount the semiconductor element; and forming a conductor that fills a gap between the semiconductor element and the mounting substrate based on the ground electrode and the insulator so as not to contact the signal electrode.