Patent ID: 7897478
Filing Date: 2011-03-01
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: providing a substrate with a silicon device layer; forming a plurality of trenches filled with insulator, the plurality of trenches enclosing field regions of the silicon device layer extending longitudinally; processing the field regions of the silicon device layer to be conductive so that the field regions form longitudinal field plates; forming an active device extending longitudinally adjacent to the trenches and separated from the field regions by the trenches filled with insulator, the active device including a body region being adjacent to a source region and an extended drain region extending longitudinally between the body region and the drain region past the field regions and separated from the field regions by the trenches filled with insulator, by doping a body-forming region throughout the thickness of the silicon device layer to have a first conductivity type, wherein the body-forming region includes at least a body region in a finished device; doping a shallow source region to a depth less than the thickness of the silicon device layer to have a second conductivity type opposite the first conductivity type to form the shallow source region over part of the body-forming region; forming a drain region by strongly doping the drain region to be conductive, leaving the region between the drain region and the body-forming region as an extended drain region and the body-forming region between the source region and the extended drain region forms the body region; forming an insulated gate over the body region; doping a contact region through the full thickness of the semiconductor device layer including a body contact region laterally adjacent to the deep source region to be of the first conductivity type to form a conductive contact region contacting the body-forming region and forming an electrical connection to the body region formed from the body-forming region in the active device leaving the shallow source region adjacent to the insulated gate; wherein in the step of forming the drain region a deep source region is formed throughout the thickness of the silicon device layer and in contact with the shallow source region so that the deep and shallow source regions form together the source region; and the shallow source region is of greater width than the deep source region of a first major surface, between the deep source region and the insulated gate.