Patent ID: 7126523
Filing Date: 2006-10-24
Classification: H03M

Abstract:
1. An analog to digital converter (ADC) containing a plurality of stages including a first stage and a second stage connected in sequence, said ADC being required to support operation at a desired frequency for a desired error tolerance, said first stage and second stage together comprising: a pre-amplifier and a main amplifier; a plurality of impedances and a plurality of switches operating to amplify an input signal provided to said first stage using both of said pre-amplifier and said main amplifier connected in series in a one phase, and operating to amplify an output of said first stage using only said main amplifier in said second stage in an another phase, said plurality of impedances providing an amplification characteristic of each of said one phase and said another phase, said amplification characteristic having a first pole and a second pole in said one phase, and only a single pole in said another phase, wherein said amplification characteristic is represented in gain versus frequency response, wherein said first pole of said one phase and said single pole of said another phase are at least at the same frequency for the same loads offered in said one phase and said another phase.