Patent ID: 8949804
Filing Date: 2015-02-03
Classification: G06F

Abstract:
1. An apparatus comprising: a memory; and a processor device operatively coupled to the memory and configured to: generate a configuration file comprising one or more constructs predetermined to be unsafe for execution as identified by a user; extract a first set of program code from a second set of program code; parse the extracted first set of program code to generate a parsed structure; examine the parsed structure generated from the first set of program code for one or more expressions that use at least one of the one or more constructs predetermined to be unsafe for execution, wherein the examination further comprises providing a looping guard to verify if the entire first set of program code has been examined; detect the one or more expressions that use at least one of the one or more constructs predetermined to be unsafe for execution that are contained in the first set of program code, wherein the detecting step further comprises flagging each of the one or more expressions that use at least one of the one or more constructs predetermined to be unsafe for execution that are contained in the first set of program code; and generate an unsafe-expression flagged version of the first set of program code for editing by a user.