Patent ID: 8362934
Filing Date: 2013-01-29
Classification: H03K,H03M

Abstract:
1. A comparator comprising: a dynamic differential amplifier circuit section, to which a first input voltage signal, a second input voltage signal and a clock signal are inputted, adapted to operate, based on the clock signal, to output a first output voltage signal and a second output voltage signal and further, when the clock signal is in a first state, to cut off through-current and pre-charge the voltage values of the first and second output voltage signals to a predetermined voltage value; and, when the clock signal is in a second state, to change the voltage values of the first and second output voltage signals in the same direction at the same timing and generate a voltage difference between the voltage value of the first output voltage signal and the voltage value of the second output voltage signal without causing through-current to flow, wherein the first output voltage signal and the second output voltage signal respectively correspond to the value of the first input voltage signal and the value of the second input voltage signal and are amplified; and a differential latch circuit section adapted to operate, based on the first output voltage signal and the second output voltage signal, to keep and output a comparison result between the first input voltage signal and the second input voltage signal, without requiring a clock signal.