Patent ID: 8835206
Filing Date: 2014-09-16
Classification: H01L

Abstract:
1. A method of fabricating an array substrate, comprising: providing a substrate, and the substrate having at least one pixel region and at least one pad region; forming a first patterned metal layer on the substrate, and the first patterned metal layer comprising a gate disposed in the pixel region and a pad disposed in the pad region; forming an insulating layer on the first patterned metal layer; forming a patterned semiconductor layer on the insulating layer in the pixel region; forming a second patterned metal layer and a first conductive protection layer on the patterned semiconductor layer, and the second patterned metal layer comprising a source and a drain; forming a passivation layer on the second patterned metal layer and the insulating layer; forming a first through hole in the passivation layer, the first through hole exposes the drain, and the step of forming the first through hole comprising: forming a second conductive protection layer in the first through hole, and the second conductive protection layer comprising a first portion, the step of forming the second conductive protection layer comprising: forming a patterned transparent conductive layer on the passivation layer.