Patent ID: 9041172
Filing Date: 2015-05-26
Classification: H01L

Abstract:
1. A power semiconductor device comprising: a chip mounting unit with a die paddle and a plurality of leads arranged side by side located close to one side edge of the die paddle, a first lead of the plurality of leads connecting to the die paddle, a second and a third leads of the plurality of the leads separating from the die paddle, each of the second and third leads having a bonding area at an end close to the die paddle wherein the second lead being adjacent to the first and the third leads respectively and the first, the second and the third leads being disposed in a non-equidistant manner; a semiconductor chip mounting on the die paddle having a first electrode disposed at a backside of the semiconductor chip in electric connection with the die paddle through a conductive material, and a second and a third electrodes disposed at a front-side of the semiconductor chip opposite the backside of the semiconductor chip respectively in electric connection with respective bonding areas of the second and third leads through conductive structures; and a plastic package body encapsulating the die paddle, the semiconductor chip, the conductive structures and the bonding areas of the second and third leads, wherein the plastic package body further comprises a plastic extension portion extending along a length of one of the first, second and third leads.