Patent ID: 7443716
Filing Date: 2008-10-28
Classification: G11C

Abstract:
1. A memory cell for driving a complementary pair of electrodes associated with a micro-mirror of a spatial light modulator, the memory cell comprising: a first PMOS transistor, wherein a source of the first PMOS transistor is coupled to a first supply voltage; a first NMOS transistor, wherein a drain of the first NMOS transistor is coupled to a drain of the first PMOS transistor, a source of the first NMOS transistor is coupled to a second supply voltage, and a gate of the first NMOS transistor is coupled to a gate of the first PMOS transistor; a second transistor adapted to establish a conduction path between the gate of the first NMOS transistor and at least one of the first supply voltage or the second supply voltage; and a select transistor, wherein a drain of the select transistor is coupled to the gate of the first NMOS transistor; and a voltage source coupled to the gate of the select transistor, wherein the voltage source is configured to provide a first voltage less than or equal to the first supply voltage to the gate of the select transistor during a write operation and a second voltage to the gate of the select transistor during a read operation, the second voltage being less than the first voltage.