Patent ID: 6486011
Filing Date: 2002-11-26
Classification: H01L,H03K

Abstract:
A method for fabricating a horizontal junction field effect transistor on a p-type substrate comprising:growing a thick first oxide layer on said p-type substrate; etching said thick oxide layer to define an active area; performing an N-well ion implantation; annealing said p-type substrate to produce an N-well; etching a plurality of trenches through said N-well; filling said plurality of trenches with N-type polysilicon; etching back said polysilicon to form source and drain regions; stripping said first oxide layer; performing a phosphorus implant to form a control gate; forming a second oxide layer to cover the top surface of the substrate; forming gate, source, and drain contact openings in said second oxide layer; performing a P+ implant and anneal to form a gate contact P+ region; forming a metal layer on top of the substrate; and, etching said metal layer to form source/drain metal contacts and gate metal contacts.