Patent ID: 7966466
Filing Date: 2011-06-21
Classification: G06F

Abstract:
1. Apparatus for processing data, said apparatus comprising: a memory addressable with a memory address having a value within a memory address space, said memory address space having a plurality of domains, each of said domains comprising a set of memory addresses and each memory address belonging to at least one domain; processing circuitry coupled to said memory and configured to perform data processing operations in response to a sequence of program instructions associated with respective memory addresses; memory access control circuitry coupled to at least one of said memory and said processing circuitry and configured to control whether said processing circuitry can access a given memory address in response to access control data for different regions of said memory address space; and domain control circuitry coupled to said processing circuitry and configured to control whether an instruction to be processed can change said access control data in response to which of said plurality of domains a memory address of said instruction is associated, wherein a secure operating system is executed upon said apparatus in a secure state and a non-secure operating system is executed upon said apparatus in a non-secure state, wherein in said non-secure state said non-secure operating system writes said access control data such that said memory access control circuitry provides a trusted region of said memory address space which can be accessed by trusted software and cannot be accessed by non-trusted software, said domain control circuitry serving to prevent software stored within a domain other than a domain storing said non-secure operating system from changing said access control data and so providing access to said trusted region to non-trusted software.