Patent ID: 8456883
Filing Date: 2013-06-04
Classification: H01L

Abstract:
1. A method of fabricating a magnetic random access memory device comprising: providing CMOS devices in a substrate having a topmost metal layer wherein said topmost metal layer comprises metal landing pads and metal connecting pads; providing a plurality of magnetic tunnel junction (MTJ) structures over said CMOS devices and connected to said metal landing pads; covering said MTJ structures with a first dielectric layer and polishing said first dielectric layer until said MTJ structures are exposed; etching openings in said first dielectric layer to said metal connecting pads; filling said openings with a copper layer; etching back said copper layer to leave said copper layer only within said openings; thereafter, depositing an aluminum layer over said first dielectric layer contacting said copper layer and said MTJ structures; and patterning said aluminum layer to form a bit line.