Patent ID: 8203134
Filing Date: 2012-06-19
Classification: G11C,H01L

Abstract:
1. A memory device comprising: at least a first memory cell and a second memory cell on a substrate, each memory cell comprising: a cavity disposed between the at least a first memory cell and the second memory cell; a dielectric material extending over and between the at least a first memory cell and the second memory cell on a side thereof opposite the substrate, the dielectric material at least partially defining a boundary of the cavity; and a passivation material over at least a portion of the volume of variable resistance material of each of the at least a first memory cell and the second memory cell, the passivation material partially defining the boundary of the cavity, wherein the cavity extends from a portion of the passivation material over the at least a portion of the volume of variable resistance material of the at least a first memory cell to a portion of the passivation material over the at least a portion of the volume of variable resistance material of the second memory cell.