Patent ID: 8513121
Filing Date: 2013-08-20
Classification: G11C,H01L

Abstract:
1. A method of manufacturing a semiconductor memory device comprising: providing the semiconductor memory device, including: a protective sheet covering the second surface of the interposer chip; and a plurality of core chips that are mounted on the first surface of the interposer chip and are connected to the first internal electrodes, wherein the interposer chip includes a semiconductor substrate, a re-wiring layer formed on at least one of surface of the semiconductor substrate, a plurality of first through electrodes formed in the semiconductor substrate and connecting a part of the first internal electrodes to a part of the second internal electrodes, and a plurality of second through electrodes formed in the semiconductor substrate and connecting a remaining part of the first internal electrodes to a part of the third internal electrodes, and a pitch of the first through electrodes is substantially equal at least to a pitch of the first internal electrodes or to a pitch of the second internal electrodes, and peeling off the protective sheet from the interposer chip and mounting an interface chip on the second surface of the interposer chip, so that the interface chip is connected to the second internal electrodes.