Patent ID: 6356223
Filing Date: 2002-03-12
Classification: G09G,H03M

Abstract:
A semiconductor device, comprising:a plurality of TFTs arranged in matrix; and a source signal line driver circuit and a gate signal line driver circuit both for driving the plurality of TFTs, wherein the source signal line driver circuit comprises a D/A conversion circuit for supplying to an output line a gradation voltage corresponding to n-bit digital signal (n is a natural number that is equal to or larger than 2) to be input, comprising: a first D/A conversion circuit having a plurality of gradation voltage lines, a first switching circuit, and second switching circuit; and a second D/A conversion circuit having at least a plurality of resistors and a third switching circuit, wherein the n-bit digital signal is divided into upper x bit(s) and lower y bit(s) (where x+y=n; both x and y are natural numbers), wherein adjacent two gradation voltage lines among (2x+1) gradation voltage lines are selected in accordance with the upper x bit(s) of the n-bit digital signal in the first D/A conversion circuit, wherein after a first gradation voltage applied to either one of the selected adjacent two gradation voltage lines is supplied to the output line, 2y second gradation voltages are generated from a potential difference between the selected adjacent two gradation voltage lines by the lower y bit(s) of the n-bit digital signal in the second D/A conversion circuit, and wherein one of the 2y second gradation voltages is supplied to the output line.