Patent ID: 7491612
Filing Date: 2009-02-17
Classification: H01L,Y10S

Abstract:
1. A method for producing a field effect transistor with a heterostructure, comprising: preparing a carrier material, wherein the carrier material includes a first relaxed monocrystalline semiconductor layer made of a first semiconductor material as a topmost layer; forming a second relaxed monocrystalline semiconductor layer at a surface of the first relaxed monocrystalline semiconductor layer, wherein the second relaxed monocrystalline semiconductor layer includes a first semiconductor alloy comprising the first semiconductor material and at least one second semiconductor material, wherein a first proportion y of the at least one second semiconductor material is settable; forming a first strained monocrystalline semiconductor layer at a surface of the second relaxed monocrystalline semiconductor layer, using the first semiconductor material; forming a second strained monocrystalline semiconductor layer at a surface of the first strained monocrystalline semiconductor layer, using a second semiconductor alloy including the first semiconductor material and the at least one second semiconductor material and wherein a second proportion x of the at least one second semiconductor material is settable; forming a gate insulation layer at a surface of the second strained monocrystalline semiconductor layer; forming a gate layer at a surface of the gate insulation layer; patterning the gate layer and the gate insulation layer to form a patterned gate stack; and ion implantating using the patterned gate stack as a mask to form drain/source regions in at least the second strained monocrystalline semiconductor layer, wherein the drain/source regions define an undoped channel region.