Patent ID: 8269330
Filing Date: 2012-09-18
Classification: H01L

Abstract:
1. A MOSFET pair with a stack capacitor, comprising: a bottom lead frame having an up surface; an up lead frame having a platform, and a plurality of outer leads, wherein the platform has an inner surface and an outer surface; a first MOSFET mounted between the inner surface of the up lead frame and the up surface of the bottom lead frame, wherein the first MOSFET has a first source electrode, a first drain electrode, and a first gate electrode, wherein the first source electrode and the first gate electrode are electrically connected with the up lead frame respectively, and the first drain electrode is electrically connected with the bottom lead frame; a second MOSFET mounted between the inner surface of the up lead frame and the up surface of the bottom lead frame, wherein the second MOSFET is mounted besides the first MOSFET, and the second MOSFET has a second source electrode, a second drain electrode, and a second gate electrode, wherein the second source electrode and the second gate electrode are electrically connected with the bottom lead frame respectively, and the second drain electrode is electrically connected with the up lead frame; and a capacitor mounted on the outer surface of the up lead frame, wherein the capacitor has a first capacitor electrode and a second capacitor electrode electrically connected with the up lead frame respectively, wherein the first source electrode and the second drain electrode are electrically connected with the second capacitor electrode and the first capacitor electrode respectively via the up lead frame.