Patent ID: 6332180
Filing Date: 2001-12-18
Classification: G06F

Abstract:
A computer system having a plurality of system resources including processors, memory and I/O circuitry, the computer system comprising:an interconnection mechanism for electrically interconnecting the processors, memory and I/O circuitry so that each processor has electrical access to all of the memory and at least some of the I/O circuitry;a software mechanism for dividing the system resources into a plurality of partitions;at least one operating system instance running in each of a plurality of the partitions; anda inter-instance communication apparatus that allows communication between a first instance running on a first partition and a second instance running on a second partition, wherein the communication apparatus modifies shared memory to which both instances have access, and wherein the communication apparatus can effect a given communication by modifying at least one bit of the shared memory, wherein the at least one bit that is modified is part of a notification bitvector of the second instance, the notification bitvector comprising a plurality of bits, each of which corresponds to a different predetermined event, and can have its value changed by the first instance to indicate the occurrence of the event to the second instance.