Patent ID: 7649910
Filing Date: 2010-01-19
Classification: H04J,H04L

Abstract:
1. An Ethernet clock synchronization device for enabling legacy Ethernet devices to participate in a clock synchronous optical Ethernet network, comprising: a plurality of Ethernet physical receive circuits coupled to one or more legacy Ethernet devices and to one or more neighboring nodes, said receive circuits operative to receive one or more available input asynchronous optical Ethernet signals of various rates and one or more available input clock signals and to recover clock signals therefrom; a rate adaptation circuit operative to translate the rate of each recovered clock signal to a common rate to yield a plurality of common rate adapted clock signals; clock selection means for selecting one of said common rate adapted clock signals as a primary clock signal; conversion means for generating one or more Ethernet clock signals and one or more output clock signals derived from said primary clock signal, wherein a separate Ethernet clock signal at a particular rate is generated for each required Ethernet clock; and a plurality of Ethernet physical transmit circuits coupled to said one or more legacy Ethernet devices and to said one or more neighboring nodes, said transmit circuits operative to generate transmit optical Ethernet signals utilizing said one or more generated Ethernet clock signals, thereby distributing a clock source to said network.