Patent ID: 6329860
Filing Date: 2001-12-11
Classification: H03K,H03L

Abstract:
A clock generator comprising:an oscillating circuit having a parameter and generating an output clock signal variable in frequency depending upon said parameter;a frequency monitor responsive to a basic clock signal so as to measure an actual frequency of said output clock signal and comparing said actual frequency with a target frequency for producing a control signal representative of a result of comparison; anda trimming circuit connected between said frequency monitor and said oscillating circuit and responsive to said control signal so as to change said parameter through a binary search algorithm,wherein said frequency monitor includes:a frequency divider supplied with said basic clock signal for producing a reference clock signal;a counter counting pulses of said output clock signal supplied thereto in a time period defined by said reference clock signal for measuring said actual frequency;a register storing said target frequency; anda comparator having input nodes connected to said counter and said register and producing said first control signal representative of a result of comparison and supplied from an output node thereof to said trimming circuit.