Patent ID: 7020759
Filing Date: 2006-03-28
Classification: G11C

Abstract:
1. A device for associating information concerning first memory cells and second memory cells of a memory element with an external memory, each address of the memory element having a first predetermined number of memory cells associated therewith, each address of the external memory having a second predetermined number of memory cells associated therewith that is greater than said first predetermined number, said second predetermined number of memory cells on each address of the external memory being adapted to be subdivided into a first group of memory cells and a second group of memory cells, said device comprising: an input for receiving the information concerning said first and second memory cells; a means for associating the information concerning first memory cells with the first group of memory cells in the external memory and for associating the information concerning the second memory cells with the second group of memory cells in the external memory; and an output adapted to be connected to the external memory for outputting the information concerning the memory cells of the memory element to the associated group in the external memory; wherein said means for associating the information associates the addresses of the memory cells of the memory element with addresses of the external memory; and wherein said means for associating the information is configured to simultaneously store, in said first group of memory cells at a target address in the external memory, information concerning first memory cells of the memory element and, in said second group of memory cells at the target address in the external memory, information concerning second memory cells at an address of the memory element associated with said target address.