Patent ID: 7268032
Filing Date: 2007-09-11
Classification: H01L

Abstract:
1. A method of forming a semiconductor die containing an MIS device comprising: providing a semiconductor substrate; forming an epitaxial layer of a first conductivity type on said substrate, said substrate having a net doping concentration of a second conductivity type opposite to said first conductivity type such that forming the epitaxial layer creates a PN junction between said substrate and said epitaxial layer; etching a plurality of trenches in said epitaxial layer thereby forming a plurality of mesas between said trenches and between one of said trenches and an edge of said die, said trenches extending from a surface of said epitaxial layer and having bottoms in said epitaxial layer above said PN junction, said trenches comprising at least one active trench and a plurality of termination trenches, said termination trenches being located between said at least one active trench and said edge of said die, said mesas comprising at least one active mesa and a plurality of termination mesas said at least one active mesa bordering said at least one active trench, each of said termination mesas bordering at least one of said termination trenches; introducing a dopant of said second conductivity type through the bottoms of said active trenches and said termination trenches to form a region of said second conductivity type extending between each of said trenches and said substrate; forming a gate dielectric layer on the walls of said trenches; introducing a conductive material into said trenches; implanting a dopant of said second conductivity type into said epitaxial layer so as to form a source region adjacent said at least one active trench; forming a second dielectric layer over the surface of said epitaxial layer; masking and etching said second dielectric layer so as to form an opening over, each of said termination trenches and said termination mesas, respectively; depositing a metal layer over said second dielectric layer, said metal layer flowing into said openings; masking and etching said metal layer so as to form a plurality of termination metal layers, said termination metal layers being electrically isolated from each other, each of said termination metal layers extending into an opening over one of said termination trenches and an opening over a termination mesa bordering said one of said termination trenches so as to electrically connect the conductive material in said one of said termination trenches and with said termination mesa bordering said one of said termination trenches.