Patent ID: 6107865
Filing Date: 2000-08-22
Classification: H01L,H03F

Abstract:
A battery backed-up N-substrate, P-well semiconductor device, comprising:input/output circuitry connected to an N-substrate of the semiconductor device and having one or more input/output P-wells, wherein the N-substrate is directly connected to a primary power supply and to a battery and the one or more input/output P-wells are provided with a reference voltage of the primary power supply;internal circuitry connected to the N-substrate of the semiconductor device and having one or more internal circuitry P-wells, wherein the one or more internal circuitry P-wells are provided with the reference voltage; andcritical internal circuitry, connected to the N-substrate of the semiconductor device and having one or more critical internal circuitry P-wells, that must receive uninterrupted power in order to prevent corruption of data stored in the semiconductor device, wherein the reference voltage of the primary power supply is provided to the one or more critical internal circuitry P-wells until the primary power supply drops below a predetermined voltage level responsive to a switching circuit controlled by a control signal and when the primary power supply drops below the predetermined voltage level the one or more critical internal circuitry P-wells are provided with a battery reference voltage from the battery to provide the critical internal circuitry with uninterrupted power responsive to the switching circuit.