Patent ID: 6414362
Filing Date: 2002-07-02
Classification: H01L

Abstract:
A power semiconductor device, comprising:a semiconductor die that has a bottom surface defining a drain contact, and a top surface which includes a first metallized region defining a source contact and having at least a first groove and a first non-grooved part, a second metallized region defining a primary gate contact, a partitioning region having at least a branch confined by said first groove, and a third metallized region disposed in said branch of said partitioning region and defining a secondary gate contact; a conductive strip extending from said primary gate contact and having a finger that extends in said branch of said partitioning region and that is connected to said secondary gate contact of said third metallized region; an insulation layer enclosing said finger of said conductive strip; a conductive connecting member including a metal sheet and a conductive paste, said metal sheet having a second groove which is aligned with said branch of said partitioning region, and a second non-grooved part which is attached to said source contact at said first non-grooved part of said first metallized region via said conductive paste such that said insulation layer is exposed from said second groove; a drain terminal electrically connected to said drain contact of said die; a source terminal electrically connected to said second non-grooved part of said metal sheet; and a gate terminal electrically connected to said primary gate contact of said die.