Patent ID: 6365451
Filing Date: 2002-04-02
Classification: H01L

Abstract:
A method of fabricating a semiconductor device which comprises the steps of:(a) providing a substrate having a first region thereover of electrically conductive material, a dielectric first sidewall spacer on said first region of electrically conductive material; (b) forming a second sidewall spacer over said first sidewall spacer extending to said substrate from a material which is selectively removable relative to said first sidewall spacer; (c) forming a second electrically conductive region contacting said second sidewall spacer and spaced from said substrate; (d) selectively removing said second sidewall spacer relative to said first sidewall spacer to form an opening extending between said substrate and said second electrically conductive region; and (e) filling said opening with electrically conductive material to electrically couple said second electrically conductive region to said substrate.