Patent ID: 6253372
Filing Date: 2001-06-26
Classification: G06F

Abstract:
In a data processing system which has a plurality of processor modules, each of which includes a processor, memory, and interprocessor communication means, and wherein said communication means are able to input and output data at the same time, a method for compiling comprising the steps of:starting operation of a parallel compiler which, when compiling a source program, produces an object program which includes a communication schedule for said processors, said communication schedule being determined for said data processing system in which interprocessor data communication is to be performed by said object program between a plurality of processors and in which said communication schedule is produced in accordance with the steps of:sorting the processors which are to transmit and receive data through said interprocessor communication means, into a plurality of groups;generating communication graphs, each of which has nodes corresponding respectively to said groups of processors, and edges corresponding respectively to interprocessor communications, for at least two node distances; anddetermining said communication schedule for said interprocessor communications so that said generated communication graphs correspond to communication steps of said interprocessor communication.