Patent ID: 6153465
Filing Date: 2000-11-28
Classification: H01L

Abstract:
A method of fabricating a capacitor of a dynamic random access memory, comprising the steps of:providing a substrate, wherein a first dielectric layer is formed on the substrate, and a via is formed through the first dielectric layer to expose one of source/drain regions;forming a conductive material on the first dielectric layer so that the conductive material fills the via to contact the one of the source/drain regions;patterning the conductive material to form a first conductive layer;forming a hemispherical polysilicon grain layer at least on the first conductive layer;performing three etching steps including a break-through etching, a main etching, and an overetching, under respective first, second and third different conditions, to etch back the hemispherical polysilicon grain layer so that the first conductive layer and the hemispherical polysilicon grain layer together form a lower electrode;forming a second dielectric layer on the lower electrode; andforming a second conductive layer as an upper electrode on the second dielectric layer.