Patent ID: 9087724
Filing Date: 2015-07-21
Classification: H01L

Abstract:
1. A method of forming a complimentary pair of finFETS comprising: on a structure that includes a gate stack disposed over a plurality of fins, wherein said gate stack extends through a n-type finFET and a p-type finFET, and wherein at least two fins extend into a source drain region on one side of said gate stack, a first of said at least two fins extends into a source drain region associated with said n-type finFET and a second of said at least two fins extends into a source drain region associated with said p-type finFET; forming a spacer on said gate stack; forming a carbon-doped silicon layer on said at least two fins within said source drain region; merging said at least two fins within said source drain region by epitaxilly growing in-situ boron doped (ISBD) SiGe; forming a spacer on said ISBD SiGe, said spacer is above said first of said at least two fins and above said second of said at least two fins; removing said spacer from above said first of said at least two fins, said ISBD SiGe is exposed above said first of said at least two fins, said spacer remains above said second of said at least two fins; removing said ISBD SiGe from above said first of said at least two fins, said carbon-doped silicon layer is exposed above said first of said at least two fins; and forming in-situ phosphorus doped (ISPD) Si on said exposed carbon-doped silicon layer on said first of said at least two fins.