Patent ID: 6034436
Filing Date: 2000-03-07
Classification: H01L

Abstract:
A semiconductor device comprising a substrate, a first layer interconnect overlying said substrate, a second layer interconnect overlying said first layer interconnect, a third layer interconnect overlying said second layer interconnect, and a through-hole filled with a conductive material, wherein said through-hole extends between and contacts said first layer interconnect and said third layer interconnect, wherein said conductive material contacts said second layer interconnect at a top surface and at least one side surface of said second layer interconnect, and wherein said first layer interconnect does not contact said second layer interconnect and said third layer interconnect, wherein said second layer interconnect has a first portion, and a second portion having a width smaller than a width of said first portion, an edge of said second portion being in alignment with a center of said through-hole as viewed from a top of said through hole in a longitudinal direction of said second layer interconnect.