Patent ID: 6618802
Filing Date: 2003-09-09
Classification: G06F

Abstract:
An in-order superscalar processing system for efficiently processing instructions of computer programs, comprising:a plurality of pipelines; an instruction dispersal unit configured to receive instructions of a computer program and to define issue groups based on said received instructions, said instruction dispersal unit further configured to transmit said issue groups to said pipelines, each of said issue groups including instructions to be simultaneously processed by different ones of said pipelines, said instruction dispersal unit configured to ensure that each instruction of said issue groups is free of data dependencies with any of the other instructions of the same issue group; and a control mechanism configured to analyze instructions in one of said issue groups during processing of said instructions in said one issue group by said pipelines, said control mechanism further configured to determine whether any of said instructions in said one issue group is dependent on unavailable data, said control mechanism further configured to stall an instruction in said one issue group that is dependent on said unavailable data and configured to simultaneously enable further processing of other instructions in said one issue group.