Patent ID: 8900956
Filing Date: 2014-12-02
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: forming first and second gate structures over first and second regions of a substrate, respectively; forming spacers on sidewalls of the first and second gate structures; forming a first capping layer over the first and second gate structures; forming a first protection layer over the second region to protect the second gate structure; removing the first capping layer over the first gate structure; removing the first protection layer over the second region; epitaxially (epi) growing a first semiconductor material on exposed portions of the substrate in the first region; removing the first capping layer over the second gate structure by wet etching, wherein the wet etching selectively etches the first capping layer but not the spacers disposed on the sidewalls of the first gate structure; after removing the first capping layer, forming a second capping layer over the first and second gate structures; forming a second protection layer over the first region to protect the first gate structure; removing the second capping layer over the second gate structure; forming a recess in the substrate at either side of the second gate structure; removing the second protection layer over the first gate structure; and epitaxially growing a second semiconductor material to fill the recess.