Patent ID: 6678771
Filing Date: 2004-01-13
Classification: G06F

Abstract:
A method for adjusting an access sequencing scheme for a number of PCI-compliant units coupled to a PCI bus system on a computer system, the PCI-compliant units being each assigned in accordance with the access sequencing scheme to one of a set of request signals to request access to the PCI bus system, the method comprising the steps of:providing a two-layer access sequencing structure including a first-layer access sequence loop and a second-layer access sequence loop for the request signals to be selectively assigned thereto, with the first-layer access sequence loop having a higher priority over the second-layer access sequence loop, and the first-layer access sequence loop including a number of programmable priority levels for the request signal being assigned thereto; providing a first register and a second register, with the first register being used to specify the first-layer access sequence loop and the second register being used to specify the assignment of the request signals to either the first-layer access sequence loop or the second-layer access sequence loop; checking whether a PCI-compliant unit associated with a request signal assigned to the second-layer access sequence loop requests for a request signal of a higher priority level; and if YES, setting the second register accordingly to assign the concerned request signal to the first-layer access sequence loop.