Patent ID: 7627739
Filing Date: 2009-12-01
Classification: G06F

Abstract:
1. A method comprising: applying a first hardware resource management strategy to a first hardware resource associated with a first processor, executing a given instruction group in the first processor, the first resource management policy being an optimistic policy that assumes based on at least one of theoretical information or historical information that the given instruction group will execute in a substantially optimal manner, and acquiring a first execution context corresponding to the first processor during the execution; applying a second hardware resource management strategy to a second hardware resource associated with a second processor, executing the given instruction group in the second processor, the second resource management policy being a pessimistic policy that assumes based on at least one of theoretical information or historical information that the given instruction group will execute in a substantially sub-optimal manner such that greater than a preselected level of at least one error will occur during execution of the given instruction group, and acquiring a second execution context corresponding to the second processor during the execution; selecting a hardware resource management strategy likely to provide a substantially optimum execution of the given instruction group from the first hardware resource management strategy and the second hardware resource management strategy; and logically associating in a computer-readable storage medium the given instruction group and an optimization page, the optimization page indicative of the selected hardware resource management strategy and the acquired execution context corresponding to the processor that executed the given instruction group during the application of the selected hardware resource management strategy as set forth above.