Patent ID: 6440904
Filing Date: 2002-08-27
Classification: H01L,H02H,Y02E,Y10S

Abstract:
A high-temperature superconductor arrangementa) comprising a layered ceramic high-temperature superconductor; b) which is in thermally and electrically conducting contact via at least one of its two principle surfaces with at least one electrical base-metal bypass layer; c) a noble-metal-containing bypass layer being disposed between the high-temperature superconductor and the at least one base-metal bypass layer; d) wherein the electrical resistivity (&rgr;3) of said at least one base-metal bypass layer is in the range between 10 &mgr;&OHgr;Â·cm and 100 &mgr;&OHgr;cm at 77 K; e) wherein the ratio of the noble-metal bypass layer thickness (d2) to the superconductor layer thickness (d1) is 1/5; f) wherein the superconductor layer thickness (d1) is in the 0.5 &mgr;m-2 mm range; and g) wherein 1jc&CenterDot;d1&CenterDot;150&it;â€ƒ&it;Vcm&leq;Ï &it;â€ƒ&it;3d&it;3&leq;1jc2&CenterDot;d12&CenterDot;50&it;â€ƒ&it;Wcm2,where d1 is thickness in cm of the high-temperature superconductor, &rgr;3 is electrical resistivity in &OHgr;Â·cm of the base-metal bypass layer, d3 is thickness in cm of the base-metal bypass layer thickness, and jc is critical current density in A/cm2 of the high-temperature superconductor.