Patent ID: 8928056
Filing Date: 2015-01-06
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a memory cell including a MISFET which is formed on a semiconductor substrate of a first conductivity type, and forms a channel of a second conductivity type, and a MIS capacitor formed on a first well of the second conductivity type in the semiconductor substrate, wherein the MISFET includes a gate electrode formed on the semiconductor substrate with a gate insulating film interposed between the gate electrode and the semiconductor substrate, and source/drain impurity layers formed in portions of the semiconductor substrate located at both sides of the gate electrode, the MIS capacitor includes a second electrode formed on the first well functioning as a first electrode with a capacitor insulating film interposed between the second electrode and the first well, and a first impurity layer of a first conductivity type formed in the first well, the gate electrode and the second electrode are electrically connected together, and form a floating gate, the gate insulating film and the capacitor insulating film are made of a same material, and have a same thickness, the gate electrode and the second electrode are made of a same conductive film, a second impurity layer is formed on a pn junction between the semiconductor substrate and the first well, and the second impurity layer is in direct contact with both of the semiconductor substrate and the first well.