Patent ID: 9184760
Filing Date: 2015-11-10
Classification: H03M

Abstract:
1. A semiconductor device comprising: a sample and hold circuit; an AD converter for AD (Analog-to-Digital) converting an output of the sample and hold circuit; a signal terminal for receiving an analog signal; a reference voltage generating circuit for generating and outputting a reference voltage; a first switch electrically coupling the signal terminal to the input node of the sample and hold circuit, a second switch electrically coupling the ground node to the input node of the sample and hold circuit, and a third switch electrically coupling the output node of the reference voltage generating circuit to the input node of the sample and hold circuit; and a switch control unit for controlling the first to third switch, the switch control unit generating a first control signal (END) for turning on the second switch and generating, based on the first control signal, a second control signal (DQ) for turning on the third switch.