Patent ID: 6706557
Filing Date: 2004-03-16
Classification: H01L,Y10T

Abstract:
A method of forming a stacked semiconductor assembly, comprising:providing a first semiconductor die including an active surface and a back side, the active surface including, a plurality of bond pads, a plurality of redistribution pads and a plurality of metal traces thereon, the plurality of redistribution pads electrically independent from integrated circuitry in the first semiconductor die, at least one metal trace of the plurality of metal traces connecting at least a first redistribution pad of the plurality of redistribution pads and at least a second redistribution pad of the plurality of redistribution pads; providing a second semiconductor die including an active surface and a back side, the active surface of the first semiconductor die facing the active surface of the second semiconductor die, the active surface of the second semiconductor die including a plurality of bond pads thereon; electrically connecting the first redistribution pad of the first semiconductor die and a corresponding bond pad of the plurality of bond pads of the second semiconductor die; and electrically connecting the second redistribution pad of the first semiconductor die and a corresponding contact area of a substrate.