Patent ID: 7233172
Filing Date: 2007-06-19
Classification: G11C,H03K

Abstract:
1. A differential amplifier circuit comprising a latch unit and a differential input portion, wherein: said differential input portion comprises a first transistor and a second transistor each having a first electrode, a second electrode and a control electrode; the control electrodes of said first and second transistors are supplied with a differential input signal; a third transistor is inserted between a first power line and a common node to which the first electrodes of said first and second transistors are connected, said third transistor keeps a minute current flowing through said first and second transistors in response to a clock signal at a first level, said third transistor supplies a first drive current, in response to the clock signal at a second level, said first drive current through said third transistor is larger than said minute current; a fourth transistor is inserted between said first power line and the common node to which the first electrodes of said first and second transistors are connected, said fourth transistor supplies a second drive current in response to the clock signal at the second level; and said third transistor is connected in parallel to said fourth transistor.