Patent ID: 6348818
Filing Date: 2002-02-19
Classification: H02M,H05B,Y02B

Abstract:
A voltage-adder circuit, comprising:(a) an input voltage supply, having an input supply voltage, and having input and return terminals; (b) a normally-open first switch, having an off-time and an on-time, having an on-state voltage drop, and having two terminals, one said terminal connected to said return terminal; (c) a first inductor connected from said input terminal to remaining said switch terminal; (d) a capacitor, having two terminals, one said terminal connected to the connection of said first inductor and said switch; (e) a second inductor connected from remaining said capacitor terminal to said input voltage supply return terminal; (f) a load connected from said input voltage supply input terminal, to the connection of said capacitor and said second inductor; said capacitor being substantially fully-charged through said first and second inductors, during said off-time, to substantially said input supply voltage, said load receiving substantially the full input supply voltage, by the end of the switch off-time, when said capacitor is substantially fully charged to said input supply voltage, whereby, at the beginning of said switch on-time, said capacitor providing an increased voltage across said load, said increased voltage substantially equal to twice said input supply voltage, minus said on-state voltage drop of said switch.