Patent ID: 6236619
Filing Date: 2001-05-22
Classification: G11C

Abstract:
A synchronous dynamic random access memory semiconductor device having a write-interrupt-write function, comprising:a first memory block for storing data;a first sense amplifier for sensing the data stored in the first memory block;first and second groups of input/output lines, connected to the first sense amplifier; anda write-interrupt-write signal generating portion for receiving an externally input write signal and an internal clock signal, generating a write-interrupt-write signal and providing the write-interrupt-write signal to the first sense amplifier,wherein when externally input data is written to the first memory block through the first group of input/output lines in response to the write signal enabled at a first point in time and the write signal is enabled at a second point in time to write data to the first memory block through the second group of input/output lines, the write-interrupt write signal generator enables the write-interrupt-write signal after a predetermined number of cycles of the internal clock signal from the second point in time at which the write signal is enabled, thereby immediately precharging the first group of input/output lines.