Patent ID: 7288470
Filing Date: 2007-10-30
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming a first material layer on a semiconductor substrate; forming a second material layer comprising a first width on said first material layer; partly removing said first material layer to leave said first material layer comprising a second width smaller than said first width below said second material layer; introducing an impurity into said semiconductor substrate with said second material layer used as a mask to form an extension region; forming a gate side wall insulating film on a side surfaces of said first and second material layers, said gate side wall insulating film including a first side wall portion formed on the side surface of said first material layer and a second side wall portion formed on the side wall of said second material layer; introducing an impurity into said semiconductor substrate with said gate side wall insulating film and said second material layer used as a mask to form source and drain regions; forming an interlayer insulating film on said semiconductor substrate, on said second material layer and on said gate side wall insulating film, followed by removing said interlayer insulating film until said second material layer is exposed; removing said first and second material layers to form a groove; introducing an impurity through said groove into said semiconductor substrate to form a second diffusion layer apart from said extension region within that portion of said semiconductor substrate which is positioned below said groove; forming a gate insulating film on that portion of said semiconductor substrate which is positioned within said groove; and forming a gate electrode on said gate insulating film positioned within said groove.