Patent ID: 7700971
Filing Date: 2010-04-20
Classification: H01L

Abstract:
1. An insulated gate silicon carbide semiconductor device comprising: a first conduction-type high impurity concentration silicon carbide semiconductor substrate; a first conduction-type silicon carbide semiconductor drift layer deposited on one principal plane of the substrate, the impurity concentration of the drift layer being lower than the impurity concentration of the substrate; a static induction transistor structure including second conduction-type gate regions buried in the drift layer arranged at predetermined intervals in a direction parallel to the principal plane of the substrate and a first conduction-type first source region formed in the surface layer of the drift layer positioned at least above the predetermined interval; a MOSFET structure including a second conduction-type well region deposited on the surface of the drift layer, a first conduction-type second source region formed in the surface layer of the second conduction-type well region, and a trench gate in a trench extending from the surface of the first conduction-type second source region through the second conduction-type well region to the first conduction-type first source region, the trench gate having a gate electrode buried in the trench via a gate insulating film that covers the sidewall of the trench; and conductive connection mechanism that connects a source electrode coated on the surface including the surface of the second source region to the second conduction-type buried gate region; wherein the impurity concentration of the first conduction-type first source region is greater than or equal to 1×10