Patent ID: 7133821
Filing Date: 2006-11-07
Classification: G06F

Abstract:
1. A method of scheduling trace packets in an integrated circuit generating trace packets of plural types comprising the steps of: storing trace data of the plural types in respective first-in first-out buffers; determining if a timing trace data first-in-first-out buffer is empty; if the timing data first-in-first-out buffer is not empty, then transmitting a timing trace data packet; if the timing data first-in-first-out buffer is empty, then determining if a program counter flow data first-in-first-out buffer is empty; if the program counter flow data first-in-first-out buffer is not empty, then transmitting a program counter data packet if at a data interruptible boundary, else transmitting a data packet; if the program counter flow data first-in-first-out buffer is not empty or is empty but not at a data interruptible boundary, determining if a data first-in-first-out buffer is empty; and if the data first-in-first-out buffer is not empty, transmitting a data packet.