Patent ID: 8598028
Filing Date: 2013-12-03
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: forming a first gate structure over an iso region of a substrate and a second gate structure over a dense region of the substrate, wherein the dense region has a greater pattern density than the iso region, and wherein the first and second gate structures each have a respective hard mask disposed thereon, wherein the first and second gate structures each include a respective polysilicon gate electrode and respective gate spacers formed on opposite sidewalls of the polysilicon gate electrode; removing the hard masks from the first and second gate structures, wherein the removing of the hard mask from the second gate structure causes an opening to be formed in the second gate structure, the opening being defined by the gate spacers of the second gate structure and the polysilicon gate electrode of the second gate structure, wherein the gate spacers of the second gate structure are taller than the polysilicon gate electrode of the second gate structure; performing a deposition process followed by a first polishing process to form a sacrificial component in the opening; performing a second polishing process to remove the sacrificial component and portions of the first and second gate structures; and thereafter replacing the polysilicon gate electrodes of the first and second gate structures with metal gate electrodes.