Patent ID: 6335570
Filing Date: 2002-01-01
Classification: H01L

Abstract:
A semiconductor device, comprising:a first insulating layer having a recess and formed on a surface of a semiconductor substrate; a first diffusion preventing layer formed on a surface of said recess; a first conductive layer formed on a surface of said first diffusion preventing layer to fill said recess; a second diffusion preventing layer formed on a surface of said first insulating layer and having an opening exposing a surface of said first conductive layer; a second insulating layer formed on a surface of said second diffusion preventing layer to expose said surface of said first conductive layer and a part of the surface of said second diffusion preventing layer and having a first hole communicating with said opening; a third diffusion preventing layer formed on a side surface of said first hole and on said second insulating layer in contact with an upper surface of said second diffusion preventing layer, wherein the third diffusion preventing layer is conductive; and a second conductive layer filling said opening and said first hole in contact with said first conductive layer, wherein the second conductive later is in direct contact with the second diffusion preventing layer.