Patent ID: 6114997
Filing Date: 2000-09-05
Classification: H01Q

Abstract:
An integrated radiator tile for use in a phased array antenna, comprising:a bottom dielectric layer having a ground plane disposed on an exposed surface, and having first and second via transitions formed through the bottom dielectric layer;a coupling circuit layer adjacent to the bottom dielectric layer comprising 90.degree. hybrid coupler circuits respectively coupled to the first and second via transitions;a balun layer adjacent to the coupling circuit layer comprising lower and upper ground planes formed on opposite surfaces, 180.degree. hybrid coupler circuits, a plurality of RF transitions selectively connected between the 180.degree. hybrid coupler circuits and the 90.degree. hybrid coupler circuits, and a plurality of radiator to RF transitions coupled to the 180.degree. hybrid coupler circuits;a plurality of grounding vias interconnecting the lower and upper ground planes of the balun layer, a plurality of grounding vias interconnecting the lower ground plane of the balun layer and the ground plane of the bottom dielectric layer, and a plurality of grounding vias surrounding each of the radiator to RF transitions;a stacked disk radiator adjacent to the balun layer comprising a dielectric puck having an active radiator formed on an upper surface, an upper dielectric layer adjacent to the active radiator, a parasitic radiator adjacent to the upper dielectric layer, and a pair of excitation probes coupled between the radiator to RF transitions and the active radiator.