Patent ID: 6818520
Filing Date: 2004-11-16
Classification: H01L

Abstract:
A method for fabricating a heterojunction bipolar transistor, said method comprising steps of:fabricating a sacrificial post on a base of said heterojunction bipolar transistor; fabricating a first nitride spacer and a second nitride spacer adjacent to said sacrificial post on said base of said heterojunction bipolar transistor, said first and second nitride spacers defining an emitter window opening of said heterojunction bipolar transistor, said first and said second nitride spacers being separated by a distance substantially equal to a critical dimension; removing said sacrificial post; depositing an emitter on said base, said emitter being deposited between said first nitride spacer and said second nitride spacer and in said emitter window opening, said emitter having an emitter width substantially equal to said critical dimension.