Patent ID: 7675186
Filing Date: 2010-03-09
Classification: H01L

Abstract:
1. An IC package comprising: a substrate having a top surface, a bottom surface and at least a slot; a chip disposed on the top surface of the substrate and having an active surface partially exposed from the slot; a protective encapsulant formed on the top surface of the substrate and at least encapsulating the sides of the chip; at least a stiffening encapsulant having a Young's modulus greater than the one of the protective encapsulant and having a curing shrinkage smaller than the one of the protective encapsulant, wherein the stiffening encapsulant is in a strip and is formed inside the slot to contact with the exposed active surface of the chip and protrudes from the bottom surface of the substrate; and a plurality of external terminals disposed on the bottom surface of the substrate, wherein the substrate has a plurality of top molding gates on the top surface and a bottom molding gate on the bottom surface, wherein the bottom molding gate is not aligned with the top molding gates.