Patent ID: 6188339
Filing Date: 2001-02-13
Classification: H03K,H03M

Abstract:
A differential multiplexer comprising:a first differential input pair including first and second transistors, the first differential input pair using as control signals a first input signal and an inverted first input signal;a second differential input pair including third and fourth transistors, the second differential input pair using as control signals a second input signal and an inverted second input signal;a fifth transistor for making active the first differential input pair by using as a control signal a first clock of first and second clocks forming a pair of differential clocks;a sixth transistor for making active the second differential input pair by using as a control signal the second clock;a first constant current source for supplying a constant current to branched paths to the first and third transistors;a second constant current source for supplying a constant current to branched paths to the second and fourth transistors, the first and second current sources constituting a current mirror;a first output terminal connected to the branch paths of the second and fourth transistors for outputting the first input signal when the first clock is larger than the second clock, and outputting the second input signal when the second clock is larger than the first clock; anda second output terminal connected to the first and third transistors for outputting a paired differential signal of a signal output from the first output terminal.