Patent ID: 7521812
Filing Date: 2009-04-21
Classification: H01L

Abstract:
1. A circuit component comprising: a semiconductor substrate; a first active device in or over said semiconductor substrate; a first dielectric layer over said semiconductor substrate and over said first active device; a first interconnect metal layer over said first dielectric layer and over said semiconductor substrate; a second dielectric layer over said first interconnect metal layer and over said first dielectric layer; a second interconnect metal layer over said second dielectric layer; a passivation layer on said second interconnect metal layer and over said second dielectric layer, wherein a first opening in said passivation layer is over a contact point of said second interconnect metal layer, and wherein said passivation layer comprises a nitride; a polymer layer on said passivation layer, wherein said polymer layer has a thickness greater than 2 micrometers and greater than that of said passivation layer; a metal pad on said polymer layer and over said first active device, wherein said metal pad is connected to said contact point through said first opening, and wherein said metal pad comprises a glue/barrier layer, a gold seed layer over said glue/barrier layer, and an electroplated gold layer having a thickness greater than 1 micrometer over said gold seed layer; and a wire bonded to said metal pad, wherein a contact between said wire and said metal pad is directly over said first active device and over said polymer layer, wherein said contact has a transverse dimension greater than that of said first opening.