Patent ID: 6472275
Filing Date: 2002-10-29
Classification: G11C

Abstract:
A method for fabricating a read-only memory, comprising:providing a semiconductor substrate; forming active regions extending in a first direction to define memory cell lines along bit lines; forming a gate oxide layer on the active regions; forming a gate layer on the gate oxide layer; removing a part of the gate layer except areas for gates of field effect transistors, which store one type of binary data; forming impurity regions at both sides of each gate of the field effect transistor to form source and drain thereof; implanting impurities in the semiconductor substrate using the gate as a mask to form conducting regions, which store the other type of binary data therein; forming an interlayer insulating layer over the gates of the field effect transistors; forming contact holes passing through the interlayer insulating layer; and forming a wiring pattern which is connected to the gates via the contact holes and to word lines, which are extending in a second direction orthogonal to the first direction, wherein the word and bit lines define the locations of the memory cell matrix; and binary data stored in the memory cell matrix are decided by detecting current flowing through the corresponding bit line.