Patent ID: 7452821
Filing Date: 2008-11-18
Classification: H01L

Abstract:
1. A method of manufacturing an integrated circuit comprising contact holes to contact regions of components formed in a semiconductor substrate, comprising: forming an insulation layer over the semiconductor substrate-comprising components, wherein the components comprise a layer stack covered with a insulating layer, and first contact regions are arranged on the layer stack below the insulating layer and second contact regions are arranged in the semiconductor substrate; forming a mask with openings over the insulation layer, wherein the mask comprises a first layer and a second layer covering the first layer, the second layer being comprised of a same material as the insulating layer of the layer stacks; defining the contact holes through the openings of the mask and etching using the mask, wherein at least two etching steps are carried out and an auxiliary layer is used at least in one of the two etching steps, which auxiliary layer is applied to the mask and covers only a portion of the openings.