Patent ID: 6078073
Filing Date: 2000-06-20
Classification: H01L

Abstract:
A semiconductor apparatus comprising:a semiconductor substrate;a gate insulating film formed on said semiconductor substrate;first and second gate electrodes formed on said gate insulating film and respectively having first and second insulating films laminated thereon;side insulating films formed on the side walls of said first and second gate electrodes;a wiring layer formed between said first and second gate electrodes;a third insulating film for covering a predetermined portion on said first insulating film and said side insulating film opposite to the side wall of said first gate electrode adjacent to said wiring layer;a fourth insulating film for covering a predetermined portion on said second insulating film and said side insulating film opposite to the side wall of said second gate electrode adjacent to said wiring layer;respective interlayer dielectric films covering the third insulating film and the fourth insulating film;a first diffusion layer formed on the two sides of a region which is formed below said first and second gate electrodes and in which a channel will be formed, said first diffusion layer being formed on the surface of said semiconductor substrate; anda second diffusion layer having an end adjacent to said region in which said channel will be formed and located more apart from said region in which said channel will be formed than the end of said first diffusion layer adjacent to said region in which said channel will be formed, said second diffusion layer having a bottom portion which is deeper than the bottom portion of said first diffusion layer, wherein etching rates of said third insulating film, said fourth insulating film, and said respective interlayer dielectric films are about the same and higher than etching rates of said first and second insulating films and said side insulating films.