Patent ID: 7376043
Filing Date: 2008-05-20
Classification: G11C

Abstract:
1. An interface circuit, comprising: a first synchronizing circuit for synchronizing a data signal that is synchronized with a strobe signal having a delay equal to or more than a predetermined period with respect to a reference clock, with the reference clock; a second synchronizing circuit for synchronizing a data signal that is synchronized with a strobe signal having a delay less than the predetermined period with respect to the reference clock, with the reference clock; a delay determining circuit for outputting a determination signal based on a result of measuring a delay of the strobe signal relative to the reference clock; a delay determination setting circuit for outputting a path setting signal that designates one of the first synchronizing circuit and the second synchronizing circuit based on a preset value; and a delay selecting circuit for selecting and outputting an output value of one of the first synchronizing circuit and the second synchronizing circuit based on one of the determination signal and the path setting signal.