Patent ID: 6381729
Filing Date: 2002-04-30
Classification: G06F

Abstract:
A method in a data processing system for efficiently determining a total return current spread at an evaluation point in a reference plane in a printed circuit board, said method comprising the steps of:creating a lay-out of said printed circuit board by associating each of a plurality of traces with one of a plurality of possible trace positions within said printed circuit board; identifying a plurality of critical ones of said plurality of traces and for each one of said plurality of critical ones of said plurality of traces, determining a return current function including a return current value produced by only each one of said plurality of critical ones of said plurality of traces at each point in said reference plane; determining a total return current spread at said evaluation point utilizing said return current function associated with each one of said plurality of critical ones of said plurality of traces; determining whether said total return current spread at said evaluation point is acceptable; and in response to said total return current spread being unacceptable, creating a second lay-out of said printed circuit board whereby at least one of said plurality of traces is associated with a different one of said plurality of possible trace positions.