Patent ID: 7865543
Filing Date: 2011-01-04
Classification: H03F

Abstract:
1. An averaging circuit comprising: an averaging unit for generating an average signal from first and second input signals; and an offset compensating unit coupled to the averaging unit for conducting away a bias current from the averaging unit for preventing an offset in the average signal, wherein the averaging unit is a rail-to-rail averaging unit including: a first set of field effect transistors having gates with the first input signal applied thereon; a second set of field effect transistors having gates with the second input signal applied thereon; and a third set of field effect transistors having gates with the average signal generated thereon, and wherein the offset compensating unit includes: a first offset compensator that conducts a first bias current away from the third set of field effect transistors when the first input signal is less than a first predetermined level for preventing a positive offset in the average signal; and a second offset compensator that conducts a second bias current away from the third set of field effect transistors when the second input signal is higher than a second predetermined level for preventing a negative offset in the average signal.