Patent ID: 9141167
Filing Date: 2015-09-22
Classification: G06F,Y02D

Abstract:
1. A processor comprising: at least one processor core; and a power controller having energy usage logic to predict for each mode of a plurality of modes of operation a corresponding energy usage of the processor and a voltage regulator during a low power period in which the voltage regulator is to supply the at least one processor core with a voltage that is less than a first voltage at which the at least one processor core is fully active, and to select, based on the corresponding energy usage, one of the modes to operate the processor during the low power period, wherein according to a first mode the voltage regulator is to be deactivated during a first temporal portion of the low power period and the voltage regulator is to be activated during a second temporal portion of the low power period, wherein the voltage regulator is to maintain the voltage at approximately a second voltage during the second temporal portion.