Patent ID: 6294456
Filing Date: 2001-09-25
Classification: H01L

Abstract:
A method comprising the steps as follows:form a thin glass layer filling only the base of a keyhole formed between portions of metallization formed over a surface of a semiconductor device,form a blanket layer of silicon nitride passivation material covering said metallization, said keyhole and said thin glass layer in said keyhole, said blanket layer of silicon nitride passivation material having a deep narrow hole formed therein with a narrow neck and a wide gap deeper in said blanket layer of material (20) above said keyhole,form a blanket, first photoresist layer above said blanket layer of silicon nitride passivation material with a relatively sharp depression therein above said keyhole caused by said gap,partially stripping said first photoresist layer in a wet and dry etching process leaving a residual portion of said first photoresist layer in said gap with some residue of the first photoresist layer remaining in said gap, andform a blanket, second photoresist layer above said blanket layer of silicon nitride passivation material, thereby providing a planarized surface on said second photoresist layer, exposure, develop, and bake,whereby the surface of the silicon nitride passivation material is planarized with photoresist.