Patent ID: 6492244
Filing Date: 2002-12-10
Classification: H01L

Abstract:
A method for implementing buried dual rail power distribution and integrated decoupling capacitor for silicon on insulator (SOI) devices comprising the steps of:providing a bulk silicon substrate layer; said bulk silicon substrate layer defining one power distribution rail; performing a high energy deep oxygen implant to create a deep buried oxide layer and a first intermediate silicon layer; said deep buried oxide layer formed between said bulk silicon substrate layer and said first intermediate silicon layer; said first intermediate silicon layer defining a second power distribution rail; performing a lower energy oxygen implant to create a shallow buried oxide layer and a second intermediate silicon layer; said shallow buried oxide layer formed between said first intermediate silicon layer and said second intermediate silicon layer; forming a first connection to said bulk silicon substrate layer without making electrical connection to said intermediate silicon layers; and forming a second connection to said first intermediate silicon layer without making electrical connection to said second intermediate silicon layer.