Patent ID: 8980689
Filing Date: 2015-03-17
Classification: H01L

Abstract:
1. A method of fabricating a multi-chip stack package, the method comprising: preparing single-bodied lower chips having a single-bodied lower chip substrate having a first surface and a second surface disposed opposite the first surface; bonding unit package substrates onto the first surface of the single-bodied lower chip substrate to form a single-bodied substrate-chip bonding structure; separating the single-bodied substrate-chip bonding structure into a plurality of unit substrate-chip bonding structures; preparing single-bodied upper chips having a single-bodied upper chip substrate; bonding the plurality of unit substrate-chip bonding structures onto a first surface of the single-bodied upper chip substrate to form a single-bodied semiconductor chip stack structure; and separating the single-bodied semiconductor chip stack structure into a plurality of unit semiconductor chip stack structures.