Patent ID: 6656828
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:(a) forming a semiconductor element as a component of an integrated circuit and a predetermined number of interconnections on a principal face of a wafer and forming a surface protective film over an uppermost interconnection; (b) forming a bonding pad by forming a first polyimide resin layer on an upper layer of said surface protective film, and opening said first polyimide resin layer and said surface protective film to expose a part of said uppermost interconnection; (c) forming a long groove of which one end extends onto said bonding pad and of which other end extends in a bump electrode connection region by forming a feeder layer over said first polyimide resin layer and also over said bonding pad and exposing and developing a photoresist film formed over said feeder layer; (d) forming a Cu interconnection by electrolytic plating in said long groove formed in said photoresist film; (e) removing said photoresist film and, after that, forming a barrier layer over said feeder layer; (f) anisotropically etching said barrier layer and subsequently etching said feeder layer, thereby removing said feeder layer in an area other than an area under said Cu interconnection while leaving said barrier layer on the surface of said Cu interconnection; (g) forming a pad by forming a second polyimide resin layer over said Cu interconnection covered with said barrier layer, and opening said second polyimide resin layer in said bump electrode connection region to expose a part of said Cu interconnection; (h) curing said second polyimide resin layer by heating; and (i) connecting a bump electrode onto said pad either directly or via a metal underlayer.