Patent ID: 7755145
Filing Date: 2010-07-13
Classification: H01L

Abstract:
1. A semiconductor device, comprising: an n-type MIS (Metal Insulator Semiconductor) transistor formed over a first active region of a semiconductor substrate; a p-type MIS transistor formed over a second active region of the semiconductor substrate; and an interlayer insulating film formed over the semiconductor substrate so as to cover the n-type MIS transistor and the p-type MIS transistor, wherein the n-type MIS transistor includes a first gate insulating film formed on the first active region, a first fully silicided (FUSI) gate electrode formed on the first gate insulating film and made of a first metal silicide film, and a first sidewall insulating film formed on a side surface of the first FUSI gate electrode, the p-type MIS transistor includes a second gate insulating film formed on the second active region, a second fully silicided (FUSI) gate electrode formed on the second gate insulating film and made of a second metal silicide film, and a second sidewall insulating film formed on a side surface of the second FUSI gate electrode, a top surface of the first FUSI gate electrode is located lower than a top surface of the second FUSI gate electrode, and the first FUSI gate electrode and the second FUSI gate electrode are formed integrally.