Patent ID: 7792933
Filing Date: 2010-09-07
Classification: G06F

Abstract:
1. A co-verification interface, comprising a hardware component of a design verification system, a software component of the design verification system modeling the hardware component and being stored on a storage device, or a combination of the hardware and software components, the co-verification interface further comprising: an application layer having a plurality of communication connections configured to communicate with a first system element of the design verification system, wherein the design verification system performs functional verification of at least two system elements of a logic design including the first system element and a second system element; a network layer in communication with said plurality of communication connections and being configured to select a communication connection from said plurality of communication connections; a data link layer having a communication connection in communication with said selected communication connection and being configured to communicate with said network layer to provide flow control for said communication connection of said data link layer; and a physical layer having a communication path in communication with said communication connection of said data link layer and being configured to communicate with the second system element of the design verification system only via the communication system, wherein the first system element and the second system element are either a physical system element or a virtual system element, and wherein the physical system element comprises one or more electronic components and the virtual system element comprises software models of the physical system element.