Patent ID: 6784046
Filing Date: 2004-08-31
Classification: H01L,Y10S

Abstract:
A method for forming a diode on a silicon wafer, the method comprising:forming an active region in the silicon wafer; forming a first refractory metal silicide layer over said active region; forming a layer of insulating material over said first refractory metal suicide layer; etching a diode opening through said layer of insulating material to expose a portion of said first refractory metal suicide layer, wherein said diode opening has an interior surface; forming a second refractory metal suicide layer over said interior surface of said diode opening; forming a doped polysilicon plug within said diode opening; incorporating a platinum suicide layer into said plug, wherein said platinum suicide layer does not contact said second refractory metal suicide layer; forming an insulative silicon layer on said layer of insulation material and over said diode opening; opening a passageway through said insulative silicon layer, such that said passageway extends to said platinum silicide layer; forming a layer of chalcogenide material over said insulative silicon layer and within said passageway, wherein said forming a layer of chalcogenide material is performed at least to an extent such that said chalcogenide material contacts said platinum silicide layer; forming a layer of titanium nitride over said chalcogenide material; and providing said layer of titanium nitride with a metal contact.