Patent ID: 6635498
Filing Date: 2003-10-21
Classification: H01L

Abstract:
A method of forming an FeRAM capacitor, comprising:forming a bottom diffusion barrier layer over a substrate; forming a bottom electrode layer over the bottom diffusion barrier layer; forming a ferroelectric dielectric layer over the bottom electrode layer; forming a top electrode layer over the ferroelectric dielectric layer; patterning the top electrode layer and the ferroelectric dielectric layer to form a capacitor stack structure having a top portion and sidewalls associated therewith, the capacitor stack structure overlying a first portion of the bottom electrode layer and leaving a second portion of the bottom electrode layer exposed; forming a protection layer over the stack structure and the second portion of the bottom electrode layer, wherein the protection layer covers the sidewalls associated with the capacitor stack structure; etching the protection layer, wherein the etching removes a portion of the protection layer on the top portion of the capacitor stack structure and a portion of the protection layer on the second portion of the bottom electrode layer, but leaves at least a portion of the protection layer on the sidewalls of the capacitor stack structure, thereby leaving a protective sidewall layer on the sidewalls of the capacitor stack structure; removing the second portion of the bottom electrode layer, whereby the protective sidewall layer on the sidewalls of the capacitor stack structure prevent contamination associated with the removed second portion of the bottom electrode layer from interfering with the capacitor stack structure.