Patent ID: 6362675
Filing Date: 2002-03-26
Classification: G11C

Abstract:
An integrated circuit device including at least one data input and data output terminals, and a latch enable terminal, said integrated circuit device comprising:at least one volatile latch circuit for providing an output signal to said at least one data output terminal; at least one first multiplexer circuit being coupled to said at least one data input terminal for providing a data signal to said at least one volatile latch circuit; at least one second multiplexer circuit, said at least one second multiplexer circuit being coupled to said latch enable terminal to provide a clock signal to said at least one volatile latch circuit; at least one state change detector circuit coupled to receive said output signal from said at least one volatile latch circuit, said state change detector circuit producing a state change signal in response to a change of state of said output signal; at least one nonvolatile latch circuit coupled to receive said state change signal; and at least one restore state circuit coupled to an output of said at least one nonvolatile latch circuit, said at least one restore state circuit coupled to an input of said at least one second multiplexer circuit and said at least one first multiplexer circuit for providing a stored state in said at least one nonvolatile latch circuit to said at least one volatile latch circuit.