Patent ID: 7473593
Filing Date: 2009-01-06
Classification: H01L

Abstract:
1. A semiconductor structure fabrication method, comprising: providing a structure which comprises: after said providing the structure is performed, implanting atoms in the top portion of the gate electrode region resulting in the top portion of the gate electrode region being expanded in a lateral direction perpendicular to the reference direction, wherein said implanted atoms comprise germanium atoms; after said implanting the atoms is performed, forming a conformal dielectric layer on top and side walls of the gate electrode region; after said forming the conformal dielectric layer is performed, forming a dielectric spacer layer on the conformal dielectric layer; and after said forming the dielectric spacer layer is performed, etching the dielectric spacer layer such that only spacer portions of the dielectric spacer layer which are under the conformal dielectric layer remain, wherein for any point of the remaining spacer portions, a straight line going through that point and being parallel to the reference direction intersects the conformal dielectric layer.