Patent ID: 7848466
Filing Date: 2010-12-07
Classification: H04L

Abstract:
1. An apparatus, comprising: a multiplier for mixing a turbo coded signal; a buffer and delay module, coupled to the multiplier, for processing the mixed turbo coded signal thereby compensating for an interleaving delay incurred during generation of the turbo coded signal and thereby generating a compensated signal; a Viterbi decoder for processing the compensated signal in accordance with sequence detection thereby generating a Viterbi decoded signal, wherein the Viterbi decoder processing symbols within the compensated signal corresponding to each respective trellis code of a turbo code employed to generate the turbo coded signal; a phase detector, connected to an input and an output of the Viterbi decoder for receiving the compensated signal and outputting the Viterbi decoded signal, respectively, for determining a difference between the compensated signal and the Viterbi decoded signal; and a voltage controlled oscillator, coupled to the phase detector and the multiplier, for governing a mixing frequency of the multiplier based on the difference between the compensated signal and the Viterbi decoded signal.