Patent ID: 7590823
Filing Date: 2009-09-15
Classification: G06F

Abstract:
1. A method for triggering software emulation for executing a floating-point instruction, comprising: providing configurable logic, the configurable logic including configurable logic blocks of a programmable logic device; instantiating in the configurable logic a coprocessor responsive at least in part to a core configuration bitstream therefor, the coprocessor user configured to execute a subset of floating-point instructions; providing a processor coupled to the coprocessor via a controller, the controller being external to the coprocessor and being internal to the programmable logic device, the processor being internal to the programmable logic device; operating the controller in lock-step with a pipeline of the processor at a rated speed of the processor; the controller including monitoring logic for monitoring the pipeline of the processor, the monitoring logic coupled to receive execute signals from an execution stage of the processor for tracking execute states of an instruction progressing through a portion of the pipeline of the processor; sending each instruction of a set of instructions for both the processor and the coprocessor to the processor, a portion of the set of instructions being for the coprocessor, the portion being sent to the coprocessor after having been received by the processor; sending a floating-point instruction from the processor to the controller; querying at least one control register by the controller to determine whether the coprocessor is configured to execute the floating-point instruction; determining that the floating-point instruction is part of a set of disabled floating-point instructions; and indicating to the processor that the floating-point instruction is not executable by the coprocessor.