Patent ID: 8131976
Filing Date: 2012-03-06
Classification: G06F

Abstract:
1. A method, in a data processing system, for tracking effective addresses through a processor pipeline of the data processing system, the method comprising: fetching an instruction from an instruction cache; associating, by an effective address table logic in the data processing system, an entry in an effective address table (EAT) data structure with the fetched instruction; associating, by the effective address table logic, an effective address tag (eatag) with the fetched instruction, the eatag comprising a base eatag that points to the entry in the EAT and an eatag offset identifying the fetched instruction in association with the entry in the EAT, wherein the eatag offset is an offset from the base eatag; and processing the instruction through the processor pipeline utilizing the EAT by processing the eatag.