Patent ID: 6653182
Filing Date: 2003-11-25
Classification: H01L

Abstract:
A method of forming an insulative region within a substrate of an integrated circuit prior to fabricating one or more transistors, the method comprising the steps of:forming through a top surface of a substrate a deep insulative trench with an inside wall; coating the inside wall of the deep insulative trench with a first oxide layer formed by rapid thermal oxidation so that the coating forms an envelope; coating a second oxide layer on the first oxide layer; filling the deep insulative trench with silicon on top of the second oxide layer; forming a shallow insulative trench on the upper surface of the substrate, after the deep insulative trench is totally formed, wherein the shallow insulative trench includes an inside wall and a bottom, the bottom at substantially a same level as the second oxide layer; coating the inside walls of the shallow insulative trench with a first oxide layer obtained by rapid thermal oxidation; and filling the shallow insulative trench with an insulative material.