Patent ID: 6958945
Filing Date: 2005-10-25
Classification: G11C

Abstract:
1. A semiconductor device having a memory system having a memory array having more than one word line and having more than one memory cell, the memory system including: an enabling device for the memory system, the enabling device including at least one programmable element responsive to a first signal for the enabling device to output a second enable signal for energizing more than one word line in said memory array so more than one memory cell of said memory array is accessed; the memory array comprising: refresh counter circuitry and address buffer circuitry for generating at least one row address for at least one memory cell of the plurality of memory cells, the refresh counter circuitry comprising CAS-Before-RAS refresh counter circuitry; row decoder circuitry connected to the plurality of word lines and the address buffer circuitry for energizing at least two word lines of the plurality of word lines in the memory array in accordance with the at least one row address generated by the refresh counter circuitry and the address buffer circuitry; sense amplifier circuitry connected to the plurality of pairs of complementary digit lines for accessing and refreshing memory cells of the plurality of memory cells coupled to each of the energized at least two word lines of the plurality of word lines; and energizing circuitry connected to the enabling device for energizing more than one word line of the plurality of word lines in the memory array for the at least one row address generated by the refresh counter circuitry and the address buffer circuitry for a memory cell of the plurality of memory cells in response to the enabling device used with the memory system having the memory array so that more than at least one memory cell of the plurality of memory cells are accessible through the plurality of pairs of complementary digit lines for accessing the at least one row address generated by the refresh counter circuitry and the address buffer circuitry.