Patent ID: 6077741
Filing Date: 2000-06-20
Classification: H01L

Abstract:
A method of fabricating a DRAM capacitor, comprising steps of:providing a substrate having a dielectric layer, wherein there is a node contact opening in the dielectric layer and the node contact opening exposes part of the substrate;forming a conductive layer covering the dielectric layer and filling the node contact opening;removing a part of the conductive layer to form an annulus hollow above the node contact, so that the core of the conductive layer is encompassed by the annulus hollow;forming a thickness of the conductive layer over the dielectric layer, so that a ring of the conductive layer encompassing the annulus hollow is formed;filling the annulus hollow with an oxide layer, and forming a spacer on a sidewall of the ring;removing the ring of the conductive layer and the conductive layer over the dielectric layer with the spacer as a mask;removing the oxide layer and the spacer to form a bottom electrode;forming a dielectric layer on the bottom electrode; andcovering the dielectric layer with a top electrode.