Patent ID: 7664979
Filing Date: 2010-02-16
Classification: G09G,H03K

Abstract:
1. A method for adjusting clock phase of a monitor, comprising: setting a reference threshold voltage, wherein when an input voltage of image signals is greater than or equal to the reference threshold voltage, a scaler of the monitor begins to receive a clock phase generated by a Phase Locked Loop of the monitor; dividing the clock phase into a plurality of equal periods, recording a corresponding input voltage at each point dividing two adjacent periods, and setting the corresponding input voltage as a threshold voltage of the next period; recording a quantity of clock pulses of the clock phase in each of the periods; evaluating whether a period of the clock phase is a regular period according to whether the quantity of clock pulses in each period is equal to a reference quantity or not while the input voltage is generating retardation; and selecting the input voltage of the image signals corresponding to a regular period as a threshold voltage of the scaler.