Patent ID: 7065128
Filing Date: 2006-06-20
Classification: H04B

Abstract:
1. An apparatus for processing data in a spread spectrum system, comprising: a decimation circuit having an associated decimation factor; a memory, which is a single port RAM, coupled to said decimation circuit, wherein said memory is divided into memory blocks such that during processing a first subset of memory blocks is in a Read mode and a second subset of memory blocks is in a Write mode; and an interpolation circuit coupled to said memory, said interpolation circuit having an associated interpolation factor; wherein said decimation circuit decimates a data rate of received data by said decimation factor to a decimated rate and stores said received data into said memory at said decimated rate; and wherein said interpolation circuit interpolates said decimated rate by said interpolation factor to an interpolated rate and retrieves said received data from said memory at said interpolated rate.