Patent ID: 7028147
Filing Date: 2006-04-11
Classification: G06F

Abstract:
1. A storage controller, comprising: a processing device; a memory controller coupled to the processing device; and a memory coupled to the memory controller; wherein the processing device is configured to send one or more write requests followed by a semaphore write request to the memory controller in response to receiving a host write request; wherein in response to receiving the one or more write requests from the processing device, the memory controller is configured to perform one or more responsive write accesses to a region of the memory and to forward the one or more write requests to an other memory controller; wherein in response to receiving the semaphore write request, the memory controller is configured to forward the semaphore write request to the other memory controller and to delay performance of a responsive write access to a semaphore region of the memory until the memory controller receives an indication that the other memory controller has completed the semaphore write request.