Patent ID: 8003477
Filing Date: 2011-08-23
Classification: G11C,H01L

Abstract:
1. A method for monolithically forming a first memory level above a substrate, the method comprising: forming a plurality of first substantially parallel, substantially coplanar conductors above the substrate, the first conductors extending in a first direction; forming a plurality of vertically oriented contiguous p-i-n diodes above the first conductors, each contiguous p-i-n diode comprising semiconductor material crystallized in contact with a silicide, silicide-germanide, or germanide layer; forming a plurality of second substantially parallel, substantially coplanar conductors, the second conductors above the contiguous p-i-n diodes, the second conductors extending in a second direction different from the first direction, each contiguous p-i-n diode vertically disposed between one of the first conductors and one of the second conductors; and forming a plurality of dielectric rupture antifuses, each dielectric rupture antifuse disposed between one of the contiguous p-i-n diodes and one of the first conductors or between one of the contiguous p-i-n diodes and one of the second conductors, wherein the dielectric rupture antifuses comprise dielectric material, the dielectric material having a dielectric constant greater than about 8.