Patent ID: 8330510
Filing Date: 2012-12-11
Classification: H03L

Abstract:
1. A phase-locked loop for generating an output signal that has a predetermined frequency relationship with a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a charge pump arranged to generate current pulses for controlling the signal generator, two control units for controlling a duration of the current pulses generated by the charge pump and a selection unit arranged to select either the first control unit or the second control unit to control the charge pump, wherein: a first one of the control units is arranged to continuously monitor a phase difference between the reference signal and a feedback signal formed by a divider from the output signal and to, when selected by the selection unit, control the charge pump to output a current pulse having a duration that is dependent on that phase difference; and a second one of the control units is arranged to, when selected by the selection unit, control the charge pump to output a current pulse of duration equal to one or more time periods of the output signal to compensate for a phase error in the feedback signal caused by varying the divisor by which the divider divides the output signal.