Patent ID: 6825784
Filing Date: 2004-11-30
Classification: H03M

Abstract:
A quantizer circuit, having an analog input terminal, a first threshold input, a second threshold input, and an output terminal, comprising:an first adder coupled to receive the first threshold; a first dither signal generator having an output coupled to the first adder, wherein the first adder adds the first threshold to the first dither signal; a first comparator, having a first and second input, the first input coupled to receive the input signal from the analog input terminal, the second input coupled to the output of the first adder to receive the sum generated by the first adder; an second adder coupled to receive the second threshold; a second dither signal generator having an output coupled to the second adder, wherein the second adder subtracts the second dither signal from the second threshold; and a second comparator, having a first and a second input, the first input coupled to receive the input signal from the analog input terminal, the second input coupled to the output of the second adder to receive the result generated by the second adder.