Patent ID: 6387755
Filing Date: 2002-05-14
Classification: H01L

Abstract:
A method for providing a memory cell on a semiconductor substrate comprising the steps of:(a) providing an oxide layer on the semiconductor substrate; (b) providing at least one gate stack disposed above the oxide layer, the at least one gate stack having a corner contacting the oxide layer, the corner being at an edge of the gate stack, the gate stack including at least a floating gate and a control gate; (c) exposing at least the corner of the at least one gate stack, wherein the corner comprises a portion of a vertical side surface and a portion of a horizontal bottom surface of the at least one gate stack by removing a portion of the oxide layer under the gate stack such that the portion of the horizontal bottom surface is exposed; and (d) rounding at least the corner of the at least one gate stack, after at least the corner of the at least one gate stack has been exposed.