Patent ID: 6218253
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:separating a first element region for providing a bipolar transistor and a second element region for providing a CMOS on a semiconductor substrate;forming an insulating film which becomes a gate insulating film in said second element region on said first and second element regions;forming an emitter opening in said insulating film of said first element region;forming a polysilicon film on said insulating film on said first and second element regions and in said emitter opening;selectively implanting impurity ions into said semiconductor substrate of said first element region through said polysilicon film to form a collector layer and a base layer respectively; andperforming heat treatment for activating impurities in said base layer and said collector layer and diffusing impurities into said semiconductor substrate from said polysilicon film to form an emitter diffused layer.