Patent ID: 8910158
Filing Date: 2014-12-09
Classification: G06F

Abstract:
1. A processor for virtualizing interrupt prioritization and delivery comprising: an instruction hardware to receive a plurality of instructions, including a first instruction to transfer the processor from a root mode to a non-root mode for executing guest software in a virtual machine, wherein the processor is to return to the root mode upon the detection of any of a plurality of virtual machine exit events; an execution hardware to execute the first instruction, the execution of the first instruction to include determining a first virtual processor-priority value by computing the maximum of a highest priority virtual interrupt in-service field of a virtual machine control structure and a virtual task-priority register value, and storing the first virtual processor-priority value in a virtual copy of a processor-priority field, where the virtual copy of the processor-priority field is a virtual resource corresponding to a physical resource associated with an interrupt controller; the execution hardware to determine: