Patent ID: 9141733
Filing Date: 2015-09-22
Classification: G06F

Abstract:
1. A modeling method comprising: accessing, by at least one processor of a computer system from a memory, a design for a semiconductor device comprising a conductive region, said conductive region comprising multiple conductive materials; determining, by said processor, a current flow-through axis associated with said conductive region and a current flow-in-and-terminate axis associated with said conductive region; dividing, by said processor, said conductive region into layers for evaluation purposes; evaluating, by said processor, relative electric currents flowing along said current flow-through axis and along said current flow-in-and-terminate axis in each of said layers in order to determine a total resistance value for said conductive region; generating, by said processor, a netlist for said semiconductor device using said total resistance value; and simulating, by said processor, performance of said semiconductor device using said netlist.