Patent ID: 6614267
Filing Date: 2003-09-02
Classification: H01L

Abstract:
A hybrid integrated circuit comprising:a common substrate on which an electrode pattern is formed; a first monolithic semiconductor integrated circuit designed by the use of an ASIC technology and mounted on said common substrate; a second monolithic semiconductor integrated circuit designed by the use of an FPGA technology and mounted on said common substrate; and external terminals provided for said common substrate; wherein said first monolithic semiconductor integrated circuit and said second monolithic semiconductor integrated circuit cooperate with each other by exchanging signals through the electrode pattern of said common substrate in order to implement a predetermined operational specification, wherein said second monolithic semiconductor integrated circuit is provided with a storage element which is rewritable by means of a control signal given through said external terminal in order to store circuit configuration data with which internal connections of said second monolithic semiconductor integrated circuit are modified to form a hardware configuration within said second monolithic semiconductor integrated circuit corresponding to said predetermined operational specification, and wherein said first monolithic semiconductor integrated circuit operates by using part of the storage element of said second monolithic semiconductor integrated circuit as a storage area for storing data required for operation of said first monolithic semiconductor integrated circuit.