Patent ID: 7395364
Filing Date: 2008-07-01
Classification: G06F,Y02D

Abstract:
1. A data transfer control apparatus comprising: a bus interface coupled to a first bus; a plurality of bus slaves, which includes a first bus slave and a plurality of second bus slaves, coupled to said bus interface via a slave bus; a transfer bus coupled to said first bus slave and said plurality of second bus slaves; a selection section which outputs a select signal for selecting one of said plurality of second bus slaves; a transfer instruction section which outputs a transfer instruction signal for instructing whether or not to execute data transfer via said transfer bus; a transfer control section which controls data transfer via said transfer bus between said second bus slave selected by said select signal and said first bus slave in response to a control signal output to said slave bus when an instruction is given by said transfer instruction signal; and a second bus interface connected to a third bus, wherein said transfer control section executes data transfer from one of said plurality of second bus slaves via said third bus concurrently with data transfer which is carried out via said transfer bus between said second bus slave selected by said select signal and an external device via said first bus slave under control of said transfer control section.