Patent ID: 9070690
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a second interlayer insulating film over a substrate; (b) forming a second wiring trench in an upper surface of the second interlayer insulating film to form a second wiring by embedding the second wiring in the second wiring trench; (c) supplying source gas including porogen to form a first interlayer insulating film over the second interlayer insulating film so as to cover the second wiring; (d) eliminating porogen from the first interlayer insulating film by performing UV curing; (e) after the (d) step, forming a via hole which passes through the first interlayer insulating film; (f) after the (d) step, forming a first wiring trench in an upper surface of the first interlayer insulating film; and (g) forming a via in the via hole and forming a first wiring by embedding the first wiring in the first wiring trench, wherein, the (c) step forms the first interlayer insulating film having a first film and a second film which includes more porogen than the first film, by increasing a porogen flow rate during the formation step of the first interlayer insulating film, wherein the (d) step forms a plurality of first vacancies in the first film and forms a plurality of second vacancies having an average diameter larger than an average diameter of the first vacancies in the second film, by eliminating the porogen, and wherein the (f) step forms a third film, including a plurality of third vacancies having an average diameter smaller than the average diameter of the second vacancies, on a side wall of the first wiring trench by forming the first wiring trench by plasma etching.