Patent ID: 6775791
Filing Date: 2004-08-10
Classification: G06F

Abstract:
A method of providing recoverable data stored in system memory of a processor-based computer system, the computer system having a processor interface to the memory system, comprising the steps of:arranging the system memory as a set of memory modules; receiving, at a data recovery logic unit, from the processor interface, input data to be stored in the memory modules; calculating parity data based on the input data, using the data recovery logic unit; storing the input data in the memory modules, such that a number of the memory modules each contain a portion of the input data; and storing the parity data in the memory modules wherein the storing steps are performed using controllers, one controller connected between the logic unit and each memory module, the controllers further being in communication with the processor interface and operable to distribute the input data and parity data among the memory modules.