Patent ID: 9024794
Filing Date: 2015-05-05
Classification: H03M

Abstract:
1. A first device, comprising: a logical circuit block, wherein the logical circuit block is configured to couple to a second device and a third device, wherein the second device and the third device each comprise an analog to digital converter (ADC) configured to perform a plurality of analog to digital conversions, an ADC result register configured to store results of one or more analog to digital conversion requests from one or more sources that are distinct from the logical circuit block, and a plurality of input pins connected to a plurality of analog input channels, wherein the logical circuit block of the first device is further configured to send a request to one of the second and third devices to perform a selected analog to digital conversion of an analog input signal received via a particular analog input channel of the plurality of analog input channels to which an input pin of the one of the second and third devices is connected, wherein the logical circuit block is configured to store the result of the selected analog to digital conversion.