Patent ID: 6288344
Filing Date: 2001-09-11
Classification: H01L,H05K,Y10T

Abstract:
An integrated circuit chip carrier, comprising:an electrically insulating substrate having an edge, a first side, a second side, at least one conduction path, and one or more cavities extending from the first side, the one or more cavities adapted to at least substantially enclose one or more electrical components, the one or more cavities further comprising at least one bond pad in electrical communication with the at least one conduction path, the at least one bond pad adapted to electrically communicate with the one or more electrical components;at least one internal electrically conductive layer adapted to be a circuit ground, at least a portion of the at least one internal electrically conductive layer extending to the edge of the substrate; anda second electrically conductive layer on at least a portion of the substrate edge, the at least one internal electrically conductive layer in electrical contact with the second electrically conductive layer.