Patent ID: 8217926
Filing Date: 2012-07-10
Classification: G09G

Abstract:
1. A liquid crystal display comprising: a liquid crystal panel comprising a plurality of gate lines parallel to each other, a plurality of data lines parallel to each other and intersecting the gate lines, and a dummy line parallel to the gate lines and located at one end of the liquid crystal panel; a gate driving circuit configured for providing a plurality of scanning signals to the gate lines in sequence; a data driving circuit configured for providing a plurality of gray scale voltages to the data lines; and a compensation circuit comprising a plurality of capacitors electrically connected to the gate lines respectively, and being configured for compensating the scanning signals, wherein when one of the gate lines is being scanned, the correspondingly electrically connected capacitor discharges, the capacitor connected to the gate line to be scanned next is charged, and the capacitor connected to the gate line just previously scanned discharges to ground, wherein each of the capacitors comprises a function end and a ground end, the compensation circuit further comprising a voltage input terminal, a first signal terminal, a second signal terminal, a plurality of first transistors, a plurality of second transistors, and a plurality of third transistors, wherein gates of the first transistors are connected to the gate lines respectively, sources of the first transistors are connected to the function ends of the capacitors, and drains of the first transistors are connected to the ground ends of the capacitors, wherein gates of the second transistors are connected to the dummy line or the gate lines, sources of the second transistors are connected to the voltage input terminal, and drains of the second transistors are connected to the function ends of the capacitors, and wherein gates of the third transistors are connected to the first and second signal terminals alternately, sources of the third transistors are connected to the gate lines, and drains of the third transistors are connected to the function ends of the capacitors.