Patent ID: 6978327
Filing Date: 2005-12-20
Classification: H04L

Abstract:
1. A data transfer control device for transferring data between a plurality of nodes connected to a bus, the data transfer control device comprising: a circuit which generates identification information for determining whether or not one received packet and a next received packet are received during different reset intervals, when a reset interval is defined as the period between a reset that clears node topology information and the next reset; a write circuit which links each received packet with the generated identification information, and writes the received packet and identification information into a packet storage memory; a first pointer storage register which stores first pointer information that specifies a boundary in the packet storage memory between an area for a packet received before the occurrence of a reset that clears node topology information and an area for a packet received after the occurrence of the reset; wherein the identification information is a toggle bit that toggles from zero to one or from one to zero when one received packet and the next received packet are packets received within different reset intervals; and wherein the identification information for the one received packet is different than the identification for the next received packet.