Patent ID: 8940586
Filing Date: 2015-01-27
Classification: B81B,H01L

Abstract:
1. A method of bump processing, comprising: forming a first masking layer on a substrate comprising a dielectric layer having one or more metal interconnect layers to define a first etching area; forming one or more anti-stiction bumps by etching the substrate in the first etching area; forming a second masking layer, which exposes the one or more anti-stiction bumps, to define a second etching area that contains the one or more anti-stiction bumps; and further etching the dielectric layer on the substrate in the second etching area forming a cavity that extends through the dielectric layer from a bottom surface of the cavity located within the dielectric layer to a top surface of the dielectric layer, wherein the cavity comprises the one or more anti-stiction bumps connected to the bottom surface of the cavity, and wherein etching the dielectric layer on the substrate in the second etching area reduces a sidewall angle of the one or more anti-stiction bumps formed by etching the dielectric layer on the substrate in the first etching area; wherein some dielectric material of the dielectric layer is positioned between the cavity and a semiconductor substrate.