Patent ID: 7634767
Filing Date: 2009-12-15
Classification: G06F

Abstract:
1. An apparatus comprising a machine-readable storage medium containing instructions which, when executed by a machine, cause the machine to perform operations comprising: assigning a first register class to at least one symbolic register in at least one instruction; assigning a second register class to the at least one symbolic register based at least in part on a linear conjunctive forward dataflow analysis that iterates a basic block of instructions in a compilation unit only once; moving existing register class fixups for the assignment of the second register class to a different location and removing unnecessary register class fixups, the moving and removing to reduce the register class fixups, wherein register class fixups are instructions inserted into a program in response to one or more register class assignment modifications; and renaming the at least one symbolic register, wherein each instruction includes assignment of one of the first register class assigned and the second register class assigned.