Patent ID: 6349361
Filing Date: 2002-02-19
Classification: G06F

Abstract:
A method for reordering and renaming memory references in a multiprocessor computer system having at least a first and a second processor, the first processor having a first private cache and a first buffer, the second processor having a second private cache and a second buffer, said method comprising the steps of:for each of a plurality of gated store requests received by the first processor to store a datum, exclusively acquiring a cache line that contains the datum by the first private cache, and storing the datum in the first buffer; upon the first buffer receiving a load request from the first processor to load a particular datum, providing the particular datum to the first processor from among the data stored in the first buffer based on an in-order sequence of load and store operations; and upon the first cache receiving a load request from the second cache for a given datum, indicating an error condition and resetting a current state of at least one of the processors to an earlier state when the load request for the given datum corresponds to the data stored in the first buffer.