Patent ID: 8993414
Filing Date: 2015-03-31
Classification: B23K,H01J,H01L,Y10T

Abstract:
1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising: forming a mask above the semiconductor wafer, the mask covering and protecting the integrated circuits; patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits, wherein patterning the mask further comprises direct writing a pattern with a femtosecond laser having a wavelength less than or equal to 540 nanometers and a laser pulse width less than or equal to 400 femtoseconds; after patterning the mask with the laser scribing process, anisotropically etching the semiconductor wafer through the gaps in the patterned mask to advance an etched trench completely through the semiconductor wafer to singulate the integrated circuits; and isotropically etching the anisotropically etched trench after completely advancing the etched trench through the semiconductor wafer; wherein anisotropically etching the semiconductor wafer comprises performing iterations of a cyclic process including polymer deposition, directional bombardment etch, and isotropic chemical etch, until a back side tape is exposed at the bottom of the etched trench; wherein isotropically etching the anisotropically etched trench comprises an isotropic plasma etch employing a non-polymerizing fluorine or chlorine-based chemistry; and wherein the non-polymerizing fluorine or chlorine-based chemistry consists essentially of NF