Patent ID: 6723612
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:(a) forming a first connection hole in a first insulating film formed over a main surface of a semiconductor substrate, and burying a first conductive layer in the first connection hole; (b) forming a second insulating film over the first insulating film, and forming a trench in the second insulating film over the first connection hole; (c) forming a metal silicide layer over a sidewall and bottom surface of the trench, the metal silicide layer being electrically connected to the first conductive layer in the first connection hole; (d) forming a lower electrode of a capacitor over the metal silicide layer; (e) forming a capacitor insulating film of the capacitor over the lower electrode; and (f) forming an upper electrode of the capacitor over the capacitor insulating film, wherein a thermal treatment is performed in an oxidizing atmosphere after forming the capacitor insulating film of the capacitor, and wherein a thermal treatment is further performed in a non-oxidizing atmosphere after the thermal treatment.