Patent ID: 8982604
Filing Date: 2015-03-17
Classification: G11C,H01L

Abstract:
1. A memory device, comprising: a lower electrode to be electrically connected an access device; a data storage node, including a variable resistive material layer, to be heated by the lower electrode, the variable resistive material layer comprising a chalcogenide compound comprising 10 to 60 wt % (atomic weight) of selenium (Se) or tellurium (Te); and an upper electrode connected to the data storage node, wherein the chalcogenide compound comprises a material selected from the group consisting of (i) a tin-antimony-selenium (Sn—Sb—Se) compound, wherein an amount of the Sn is 1.0 to 25.5 wt %, an amount of the Sb is 10 to 90 wt %, and an amount of the Se is 10 to 60 wt %, (ii) a germanium-antimony-selenium (Ge—Sb—Se) compound, wherein an amount of the Ge is 1.0 to 25.5 wt %, an amount of the Sb is 10 to 90 wt %, and an amount of the Se is 10 to 60 wt %, (iii) a tin-antimony-tellurium (Sn—Sb—Te) compound, wherein an amount of the Sn is 1.0 to 25.5 wt %, an amount of the Sb is 10 to 90 wt %, and an amount of the Te is 10 to 60 wt %, and (iv) a silicon-antimony-tellurium (Si—Sb—Te) compound, wherein an amount of the Si is 1.0 to 25.5 wt %, an amount of the Sb is 10 to 90 wt %, and an amount of the Te is 10 to 60 wt %.