Patent ID: 8373207
Filing Date: 2013-02-12
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a rectifying element; an electrode pad electrically connected to said rectifying element; and a resistance and a depletion transistor arranged between said rectifying element and said electrode pad, and electrically connected to each other, the resistance and a depletion layer of the depletion transistor being included in a same layer of the semiconductor device, wherein: said rectifying element, said resistance, said depletion transistor, and said electrode pad are serially connected, said semiconductor device being configured to generate a gate potential of said depletion transistor based on a difference in potential across said resistance, and the depletion layer in a channel of said depletion transistor is controlled by said gate potential, the semiconductor device further comprising: a first insulating film and a second insulating film, wherein said rectifying element includes an anode, said depletion transistor includes an n-channel depletion transistor, said electrode pad includes an anode electrode pad, said anode of said rectifying element, said resistance, said n-channel depletion transistor, and said anode electrode pad are serially connected in ascending order of potential, said channel of said n-channel depletion transistor overlies said anode of said rectifying element with said first insulating film interposed therebetween, and underlies said anode electrode pad with said second insulating film interposed therebetween, and said semiconductor device is configured such that a value obtained by dividing a dielectric constant of said first insulating film by a thickness of said first insulating film is larger than a value obtained by dividing a dielectric constant of said second insulating film by a thickness of said second insulating film.