Patent ID: 6218217
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device with a high breakdown voltage comprising the steps of:forming a first semiconductor substrate of a first conductivity type provided at its main surface with an insulating layer;arranging a second semiconductor substrate of the first conductivity type over said insulating layer to form a semiconductor substrate having first and second main surfaces and including said insulating layer interposed therebetween;forming a first impurity layer of a second conductivity type at said first main surface of said semiconductor substrate;forming an impurity region of the first conductivity type at a predetermined region of a surface of said first impurity layer;forming a second impurity layer of the second conductivity type at said second main surface;forming a groove extending to said insulating layer at said impurity region;removing the insulating layer exposed at said groove;forming an epitaxial growth layer having the same impurity concentration as said semiconductor substrate at an inner surface of said groove by an epitaxial growth method;forming a gate insulating film at a surface of said epitaxial growth layer in said groove;filling said groove with an electric conductor to form a gate electrode;covering a portion of said gate electrode exposed at said first main surface with an insulating film;forming a first main electrode layer covering said first main surface and electrically connected to said first impurity layer and said impurity region; andforming a second main electrode layer at said second main surface.