Patent ID: 8378424
Filing Date: 2013-02-19
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a first embedded region between a pair of adjacent transistor structures, the first embedded region having a first doped epitaxial layer having a first concentration of a dopant over a bottom and sidewalls of the first embedded region and a second doped epitaxial layer having a second, higher concentration of the dopant over the first doped epitaxial layer; and a second embedded region between a pair of adjacent test structures, the second embedded region having the first doped epitaxial layer over the bottom and sidewalls of the second embedded region and the second doped epitaxial layer over the first doped epitaxial layer, wherein the second embedded region is larger than the first embedded region, and a difference in thickness of the first and second epitaxial layers together between the transistor structures compared to that between the test structures is no greater than approximately 10%.