Patent ID: 6133067
Filing Date: 2000-10-17
Classification: H01L

Abstract:
A method for manufacturing a dual-chip IC package, comprising the steps of:(1) preparing a leadframe which includes a die pad and a number of package pins;(2) performing a first die-attach process so as to mount a first chip on a first side of the die pad;(3) performing a first wire-bonding process so as to electrically connect the first chip to a first selected set of the package pins;(4) performing a second die-attach process so as to mount a second chip on a second side of the die pad;(5) performing a second wire-bonding process so as to electrically connect the second chip to a second selected set of the package pins;(6) performing a molding process so as to form a molded compound to simultaneously enclose the first chip and the second chip therein.