Patent ID: 9006099
Filing Date: 2015-04-14
Classification: H01L

Abstract:
1. A method of making a semiconductor device, comprising: providing a substrate; forming a source region on a first surface of the substrate; forming a drain region on the first surface of the substrate; forming a gate between the source region and drain region; depositing a metal over the source region and drain region to form a silicide layer over the source region and drain region; forming a first interconnect layer over the silicide layer including a first runner connected to the source region and second runner connected to the drain region, the first interconnect layer connected to the silicide layer through a conductive via; forming a second interconnect layer over the first interconnect layer, the second interconnect layer including a third runner connected to the first runner and a fourth runner connected to the second runner; forming an under bump metallization (UBM) over and electrically connected to the second interconnect layer; disposing a mask over the substrate with an opening in the mask aligned over the UBM including a portion of the mask disposed over a sidewall of the UBM; depositing a conductive bump material within the opening; removing the mask; and reflowing the conductive bump material to form a bump, the bump including a height less than a height of the bump material within the opening in the mask with a portion of the bump contacting the sidewall of the UBM.