Patent ID: 8546250
Filing Date: 2013-10-01
Classification: H01L

Abstract:
1. A method for forming a vertically integrated semiconductor device having multiple layers of single crystal silicon, said method comprising: providing a single crystal silicon substrate with an upper surface; forming a dielectric layer over said upper surface, said dielectric layer having openings therethrough that extend to said upper surface, epitaxially growing a continuous single crystal silicon layer over said dielectric layer using said openings as seed windows; forming semiconductor devices in or on said continuous single crystal silicon layer; forming a further dielectric layer over said continuous single crystal silicon layer, said further dielectric layer having further openings therethrough that extend to said continuous single crystal silicon layer, epitaxially growing a further continuous single crystal silicon layer over said further dielectric layer using at least said further openings as further seed windows; forming further semiconductor devices on or in said further continuous single crystal silicon layer; and forming interconnections between at least some of said semiconductor devices and at least some of said further semiconductor devices, wherein said interconnections extend through interconnect openings formed in said continuous single crystal silicon layer and are spaced from said continuous single crystal silicon layer by an oxide formed in said interconnect openings.