Patent ID: 8941064
Filing Date: 2015-01-27
Classification: G01J,H01L

Abstract:
1. A silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) wafer for use in manufacturing an uncooled microbolometer, the SOI-CMOS wafer comprising: a substrate layer; an insulation layer formed on the substrate layer, the insulation layer having a pixel region and a wall region surrounding the pixel region; a pixel structure formed on the pixel region of the insulation layer; a wall structure formed adjacent to the pixel structure and on the wall region of the insulation layer; a dielectric layer covering the pixel structure and the wall structure; a pixel mask formed within the dielectric layer, and for protecting the pixel structure during a dry etching process; and a wall mask formed within the dielectric layer, and for protecting the wall structure during the dry etching process, thereby releasing a space defined between the wall structure and the pixel structure after the dry etching process.