Patent ID: 8994984
Filing Date: 2015-03-31
Classification: G03G,H04N

Abstract:
1. An information processing apparatus, comprising: a plurality of output circuits that output a plurality of pieces of information to an external device, wherein each of the output circuits includes: an operation clock; a synchronization controller that synchronizes the operation clock of the output circuit with the operation clock of a separate one of the output circuits; an information receiver that receives a piece of information that is different from a piece of information that is received by the separate output circuit; and an output controller that outputs the received piece of information from the output circuit to the external device in accordance with the operation clock which has been synchronized such that the received piece of data which is output is output in a synchronized manner with data output from the separate output circuit, wherein the synchronization controller includes: a detector that receives the operation clock of the separate output circuit and detects a phase difference between the operation clock of the output circuit and the operation clock of the separate output circuit; a phase-difference transmitter that sends the detected phase difference to the separate output circuit; a phase-difference receiver that receives, from the separate output circuit, the phase difference between the operation clock of the output circuit and the operation clock of the separate output circuit; a delay generator that delays the phase of the operation clock so as to eliminate the received phase difference, wherein the information receiver of the output circuit receives the piece of information which is information of at least two colors, and wherein the information receiver of the separate output circuit receives the piece of information of a third color which is different from said at least two colors.