Patent ID: 6207575
Filing Date: 2001-03-27
Classification: H01L,Y10S

Abstract:
A method of processing a wafer including characterizing a local interconnect etch as acceptable or unacceptable, comprising:etching a portion of a wafer comprising at least one device thereon to form a local interconnect etched portion on the wafer;scanning the local interconnect etched portion of the wafer with an atomic force microscope;generating surface profile data including sidewall profile data of the local interconnect etched portion from the atomic force microscope;evaluating the surface profile data to determine whether the surface profile data indicates the presence of a trenching phenomenon and etching through an etch stop layer; andfurther processing of the wafer if both the trenching phenomenon and the etching through an etch stop layer are not present or reprocessing or discarding the wafer if either the trenching phenomenon or the etching through an etch stop layer are present.