Patent ID: 6696732
Filing Date: 2004-02-24
Classification: H01L,Y10S

Abstract:
A semiconductor device comprising:a semiconductor substrate having one main surface; a first semiconductor element having source and drain regions provided on the main surface of said semiconductor substrate, and a gate electrode provided on an active region lying between the source and drain regions with an insulating film interposed therebetween; a second semiconductor element provided with each of isolation regions being interposed between said first semiconductor element and said second semiconductor element, having source and drain regions provided on the main surface of said semiconductor substrate, and a gate electrode provided on an active region lying between the source and drain regions with an insulating film interposed therebetween; a first insulating film which is provided on said semiconductor substrate with said first and second semiconductor elements interposed therebetween and has a through hole extending via the source region or drain region of said first semiconductor element and the source region or drain region of said second semiconductor element; a first wiring layer which is buried in the through hole of said first insulating film and connects the source region or drain region of said first semiconductor element and the source region or drain region of said second semiconductor element; and a second insulating film which covers said first wiring layer and is provided on said first insulating film, and which has a surface on which second wiring layers are provided.