Patent ID: 6762628
Filing Date: 2004-07-13
Classification: H03F,H03K

Abstract:
A method for operating a comparator (10) and a pre-amplifier (20) of an integrated circuit, which pre-amplifier is connected in series to the comparator,wherein the comparator (10) is operated with clock pulses in order to compare comparator input signals at periodical decision points (t2) and to provide a comparator output signal (COUT) which corresponds to the comparison result, wherein the pre-amplifier (20) is operated with clock pulses so as, in amplification phases (t1 to t2) which precede the decision points (t2), to amplify a signal (IN) which has been input to the pre-amplifier, and to provide the amplified signal (OUT) as a comparator input signal, and so as, in reset phases (t0 to t1) which precede the amplification phases (t1 to t2), to reset the amplification (G) to a minimum value, characterised in that the pre-amplifier (20) is operated such that its amplification (G) during a rise phase within the amplification phase (t1 to t2) rises uniformly and gradually from the minimum value to a maximum value.