Patent ID: 8912017
Filing Date: 2014-12-16
Classification: H01L

Abstract:
1. A method for the bonding of a III-V semiconductor wafer to a CMOS silicon wafer comprising: forming bonding surfaces on the wafers for the transfer of electric signals between the bonded wafers by: forming a dielectric intermediary bonding layer on a surface of each wafer, within which surface is embedded electrical interconnects for the transfer of electrical signals; respectively; planarizing the surfaces of the dielectric intermediary bonding layers of the two wafers; interfusing the electrical interconnects and the dielectric intermediary bonding layer on the wafers to bond the wafers together with electrical interconnections between the wafers; wherein the density of the electrical interconnects across the bonding interface is more than one million electrical interconnects per square centimeter; wherein the III-V semiconductor wafer is a photonic wafer comprising multiple III-V material layers deposited on an epitaxial growth substrate and cross etched to delineate an array comprising a multiplicity of photonic elements, and further cross etched to delineate the die boundaries of the array.