Patent ID: 7834440
Filing Date: 2010-11-16
Classification: G11C,H01L

Abstract:
1. A semiconductor device, comprising: a package board; a first LSI connected to the package board including: an external I/O interface for performing communication via the package board; and a first communication section; a second LSI provided above the first LSI including: a first memory device having a plurality of first memory cells; and a second communication section; a third LSI provided above the first LSI for performing arithmetic operation including: a third communication section for communicating with the second communication section; and a fourth communication section for communicating with the first communication section; a fourth LSI provided above the second LSI and above the third LSI including: a second memory device including a plurality of second memory cells; and a fifth communication section; and a fifth LSI provided above the second LSI and above the third LSI for performing arithmetic operation including: a sixth communication section for communicating with the fifth communication section; and a seventh communication section for communicating with the first communication section.