Patent ID: 8964467
Filing Date: 2015-02-24
Classification: G11C

Abstract:
1. A method of programming a Multi Level Cell (MLC) block in a three dimensional nonvolatile memory formed in two or more physical levels of memory cells disposed above a substrate, comprising: programming memory cells of a first segment along a word line in the MLC block to their final programmed logical states, final programmed logical states of memory cells of the first segment representing two or more bits of a first portion of data using four or more logical states; subsequently, while memory cells of the first segment remain in their final programmed logical states, programming memory cells of a second segment along the word line to their final programmed logical states, each final programmed logical state of a memory cell of the second segment representing two or more bits of a second portion of data; and subsequently reading the first portion of data and the second portion of data from the word line.