Patent ID: 6327218
Filing Date: 2001-12-04
Classification: G11C

Abstract:
A circuit for measuring access time for a memory device, having an input and output and a power supply rail, V.sub.DD, comprising:a clocking signal, having a period, T, the input of the memory device coupled to receive the clocking signal;a phase detector having a first and a second input and a first and a second output, the first input coupled to the input of the memory device, the second input coupled to the output of the memory device;a first filter coupled to the first output of the phase detector;a second filter coupled to the second ouput of the phase detector;a comparator for measuring the difference, V.sub.Diff, between the first filtered output signal and the second filtered output signal;a processing unit coupled to the comparator to calculate the access time, where access time=(V.sub.Diff /V.sub.DD) T.