Patent ID: 6480016
Filing Date: 2002-11-12
Classification: G01R

Abstract:
A tester for testing a semiconductor integrated circuit, said tester comprising:a tester body generating a clock signal and sampling an output signal, synchronous with the clock signal, to determine whether a semiconductor integrated circuit being tested is defective; and a plurality of test boards selectively connectable to the tester body, each test board including a first memory storing an input signal for testing a specific semiconductor integrated circuit; a second memory storing an expectation value signal expected to be output by the specific semiconductor integrated circuit when the specific semiconductor integrated circuit operates normally, in response to input of the input signal for testing to the specific semiconductor integrated circuit; and a comparator for comparing the expectation value signal output from said second memory with a signal actually output by the specific semiconductor integrated circuit, and outputting a comparison signal to the tester body for determination, by the tester body, whether the specific semiconductor integrated circuit is defective, regardless of which test board is connected to the tester body.