Patent ID: 7666736
Filing Date: 2010-02-23
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device at least comprising a p-type MISFET formed on a first active area of a semiconductor substrate, said method comprising the steps of: (a) forming a gate insulating film, a gate electrode film and a protective insulating film on the semiconductor substrate; (b) forming on the first active area a first gate insulating film, a first gate electrode and a first protective insulating film by patterning the gate insulating film, the gate electrode film and the protective insulating film; (c) forming p-type source/drain extension regions in parts of the first active area located below the lateral end parts of the first gate electrode; (d) implanting fluorine ions into the parts of the first active area located below the lateral end parts of the first gate electrode with the top surface of the first gate electrode covered with the first protective insulating film; (e) after the steps (c) and (d), forming a first sidewall on the side surfaces of the first gate electrode; and (f) forming p-type source/drain regions in parts of the first active area located below the outer lateral end parts of the first sidewall; and (g) after the step (f), subjecting the semiconductor substrate to a heat treatment, wherein in the step (d), the first gate electrode covered with the first protective insulating film having a thickness smaller than a depth to which fluorine is implanted is doped with fluorine in an amount smaller than that to be implanted into the first active area and an amount larger than 0, and in the step (g), the heat treatment allows fluorine in the first gate electrode to diffuse toward an interface between the first gate insulating film and the semiconductor substrate.