Patent ID: 6549571
Filing Date: 2003-04-15
Classification: G01R,H04L

Abstract:
Circuitry for measuring a duty of an input data signal, wherein at least one of a peak pulse width and a trough pulse width of the input data signal is detected and is determined, when smaller than a preselected value, to be valid for a calculation of a duty value, comprising:sampling means for sampling the input data signal with either one of N-phase (N being any integer greater than 2 inclusive) clock signals which are N clock signals sequentially shifted in phase by 360Â°/N and identical in frequency with the input signal and an N-times clock signal N times higher in frequency than the input signal, wherein said sampling means produces N sampled signals by sampling the input data signal with said N-phase clock signal or said N-times clock signal, and sequentially shifts said N sampled signals by Mâˆ’1 periods (M being any integer greater 1 inclusive) of said N-phase clock signals or by N(Mâˆ’1) periods of said N-times clock signal to thereby output NÃ—M sampled signals.