Patent ID: 6066967
Filing Date: 2000-05-23
Classification: G06F,H03L

Abstract:
A phase-coherent frequency synthesis device comprising:a clock source;a divide-by-N circuit having a first input and a first output, wherein N is an integer and wherein said first input is connected to said clock source;an M-bit free running counter having a second input and a second output, wherein M is an integer and wherein said second input is connected to said first output;a processor having a third input, a fourth input, a fifth input, a sixth input, and a third output, wherein a frequency change signal is connected to said third input, wherein said second output is connected to said fourth input, wherein said clock source is connected to said fifth input, and wherein a frequency code is connected to said sixth input;a direct digital synthesizer having a seventh input, an eighth input, and a fourth output, wherein said system clock is connected to said seventh input and said third output is connected to said eighth input;a digital-to-analog converter having a ninth input and a fifth output, wherein said fourth output is connected to said ninth input; anda low-pass filter having an tenth input and a sixth output, wherein said fifth output is connected to said tenth input, and wherein said sixth output is a signal representing an output frequency of said phase-coherent frequency synthesis device.