Patent ID: 8120107
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate; a first semiconductor region of a first conductivity type formed in said semiconductor substrate; an MOS transistor of the first conductivity type formed at a surface of said semiconductor substrate, said MOS transistor of the first conductivity type including a gate electrode, a source electrode, a drain electrode, a second semiconductor region of a second conductivity type having a channel formed by a potential difference between said gate electrode and said source electrode, formed in said first semiconductor region and electrically connected to said drain electrode, a third semiconductor region of the first conductivity type formed in said second semiconductor region and electrically connected to said source electrode, and a fourth semiconductor region of the first conductivity type formed in said second semiconductor region and electrically connected to said drain electrode; and a fifth semiconductor region of the second conductivity type formed in said first semiconductor region, opposed to said second semiconductor region with said first semiconductor region therebetween and electrically connected to said gate electrode, wherein each of said second and fifth semiconductor regions is formed by implanting the impurities, and a diffusion depth of said fifth semiconductor region is smaller than a diffusion depth of said second semiconductor region.