Patent ID: 7225378
Filing Date: 2007-05-29
Classification: G01R,G06F

Abstract:
1. A system for obtaining selected test pattern sequences to be used in transient power supply current testing to detect path delay faults in a semiconductor integrated circuit, the system comprising a fault list memory for storing a stored fault list of path delay faults in the semiconductor integrated circuit under test; a test pattern sequence list memory for storing the selected test pattern sequences; a test pattern sequence generator for generating test pattern sequences to be applied to the semiconductor integrated circuit, each test pattern sequence including two or more test patterns; a transition signal values calculating unit for performing a simulation of transitions that occur in the semiconductor integrated circuit when one of the test pattern sequences is applied to the semiconductor integrated circuit, thereby obtaining a train of transition signal values that occur on signal lines within the semiconductor integrated circuit; a detectable fault list preparing unit for preparing a detectable fault list by determining whether any of the path delay faults in the stored fault list is a detectable fault that is capable of being detected by transient power supply current testing, wherein the testing uses transition signal values obtained from the simulation of transitions when one of the generated test pattern sequences is applied to the semiconductor integrated circuit; and one or more control units