Patent ID: 7102932
Filing Date: 2006-09-05
Classification: G11C

Abstract:
1. A self-biased amplifier, comprising: a first transistor having a drain, a source and a gate, the source of the first transistor being coupled to a first supply voltage; a second transistor having a drain, a source and a gate, the second transistor being coupled to the first transistor in a current mirror configuration with its gate coupled to the drain of the first transistor, the source of the second transistor being coupled to the first supply voltage; a third transistor having a drain, a source and a gate, the source of the third transistor being coupled to the first supply voltage; a fourth transistor having a drain, a source and a gate, the fourth transistor being coupled to the third transistor in a current mirror configuration with its gate coupled to the drain of the third transistor, the source of the fourth transistor being coupled to the first supply voltage; a fifth transistor having a drain, a source and a gate, the fifth transistor having its gate coupled to receive a first input signal and its drain coupled to the drain of the first transistor; a sixth transistor having a drain, a source and a gate, the sixth transistor having its gate coupled to receive a second input signal and its drain coupled to the drain of the third transistor; a seventh transistor having a drain, a source and a gate, the seventh transistor having its gate coupled to the drain of the first transistor, its drain coupled to the drain of the fifth transistor and its source coupled to a second supply voltage; and an eighth transistor having a drain, a source and a gate, the eighth transistor having its gate coupled to the drain of the third transistor, its drain coupled to the drain of the sixth transistor and its source coupled to the second supply voltage.