Patent ID: 8401098
Filing Date: 2013-03-19
Classification: H04J,H04L

Abstract:
1. A digital differential signal transmitter circuit for a low supply voltage, comprising: signal selection switches composed of multiplexers which are respectively installed on two signal paths to select and output to the respective signal paths any ones of input differential signals and clock signals; a differential phase correction circuit arranged between the two signal paths to be inputted with signals outputted from the two signal paths, delay output timing and correct a phase difference between two signals; duty cycle correction circuits configured to detect edges of signals transmitted from the respective signal paths after phase correction is implemented, generate pulses, and control a switch for increasing and decreasing an output signal by the pulses so that duty cycles of signals outputted from the respective signal paths are corrected to be constant; and a final output section configured to match an impedance of an output driver using a reference resistor having the same impedance as transmission lines for transmitting the input differential signals to a receiver, and output the input differential signals corrected in duty cycles to the transmission lines, wherein the signal selection switches are configured to output the clock signals while phase difference correction and duty cycle correction are implemented in response to a correction function activation signal.