Patent ID: 6057792
Filing Date: 2000-05-02
Classification: H03H

Abstract:
An n th order Delta Sigma Modulator (DSM) where n.gtoreq., comprising an input for receiving a 1-bit input signal having a signal component and a noise component,a quantizer for re-quantizing a p-bit signal (where p>1) to 1-bit form, the re-quantised 1-bit signal being the output signal of the DSM,a first combiner for forming the integral of an additive combination of the product of the input 1-bit signal and a coefficient and of the product of the output signal and a coefficient,n-1 intermediate combiners each for forming the integral of an additive combination of the product of the input 1-bit signal and a coefficient, of the product of the output signal and a coefficient and of the integral of the additive combination of the preceding combiner, anda final combiner for forming an additive combination of the input signal and a coefficient and of the integral of the combination of the preceding combiner to form the said p-bit signal re-quantised by the quantizer,wherein the transfer function applied by the DSM to the input 1-bit signal is ##EQU24## the transfer function applied to the quantized noise introduced by the quantizer is ##EQU25## wherein at least one of a.sub.1 to a.sub.n equals +1, and each of b.sub.1 to b.sub.n is not equal to +1, and wherein the zeroes of the transfer function applied by the DSM to the input 1-bit signal are defined in the DSM independently of the poles and zeroes of the transfer function applied to the quantized noise introduced by the quantizer.