Patent ID: 6060896
Filing Date: 2000-05-09
Classification: G01R

Abstract:
A super-voltage circuit having an input terminal receiving an input signal, the super-voltage circuit comprising:a detection circuit coupled to the input terminal, the detection circuit generating a detect signal in response to the input signal having a magnitude with an absolute value that is greater than a predetermined value;a reset circuit coupled to the input terminal, the reset circuit generating a reset signal in response to the input signal having a first logic level and generating an enable signal in response to the input signal having a second logic level, the second logic level having a magnitude that is between the magnitude of the first logic level and the predetermined value; anda logic circuit having first and second input terminals coupled to the reset circuit and the detection circuit, respectively, the logic circuit generating a super-voltage signal responsive to receiving the detect signal and the enable signal, the logic circuit terminating the super-voltage signal responsive to either the detect signal being terminated or the reset signal being generated.