Patent ID: 8970411
Filing Date: 2015-03-03
Classification: H03M

Abstract:
1. An apparatus comprising: a terminal; an analog-to-digital converter (ADC) that is coupled to the terminal; a first digital-to-analog converter (DAC) that is coupled to the ADC; a first summing circuit that that is coupled to terminal and the first DAC, wherein the second summing circuit is configured to determine a difference; a first gain circuit that is coupled to the first summing circuit summing circuit, wherein the first gain circuit has a first gain; a continuous-time (CT) sigma-delta modulator (SDM) having: a second gain circuit that is coupled to the second quantizer, wherein the second gain circuit has a second gain, and wherein the second gain is substantially the inverse of the first gain, and wherein the first gain circuit, the CT SDM, and the DAC collectively have a first transfer function; a filter that is coupled to the ADC and second gain circuit, wherein the digital filter has a second transfer function, wherein the second transfer function substantially matches the first transfer function, wherein the first DAC has a third gain, and wherein the second DAC has a fourth gain, and wherein the filter has a fifth gain, and wherein the ratio of the third gain to the fourth gain is approximately equal to the fifth gain.