Patent ID: 6168975
Filing Date: 2001-01-02
Classification: H01L

Abstract:
A method of packaging electronic circuits, comprising the steps of: providing an integrated circuit element having a first surface, a second surface, and input/output pads on said first surface; providing a plurality of first electrically conducting leads and a plurality of second electrically conducting leads, wherein a part of each of said first electrically conducting leads extend under said second surface of said integrated circuit element; placing bonding material between said second surface of said integrated circuit element and those parts of said first electrically conducting leads extending under said second surface of said integrated circuit element, wherein said bonding material is a thermal conductor, and an electrical insulator; bonding said second surface of said integrated circuit element to those parts of said first electrically conducting leads extending under said second surface of said integrated circuit element using said bonding material, wherein said bonding material contacts said second surface of said integrated circuit element and those parts of said first electrically conducting leads extending under said second surface of said integrated circuit element; and forming electrically conductive wire bonds between said input/output pads on said first surface of said integrated circuit element and said first electrically conducting leads and said second electrically conducting leads.