Patent ID: 7492644
Filing Date: 2009-02-17
Classification: G11C

Abstract:
1. A semiconductor device comprising: a bit line; a plurality of memory cells coupled to the bit line; a sense amplifier receiving a signal read out from one of the plurality of memory cells and a reference level, and amplifying the signal; a write driver coupled to the bit line and the sense amplifier, the write driver driving the bit line in order to write data to one of the plurality of memory cells; and an I/O line coupled to the sense amplifier via a column switch, wherein the write driver drives the bit line according to information which is held in the sense amplifier, wherein the write data is transferred from the I/O line to the sense amplifier via the column switch, and the amplified signal is transferred from the sense amplifier to the I/O line via the column switch, and wherein the column switch is selected according to an address inputted from outside the semiconductor device.