Patent ID: 8076770
Filing Date: 2011-12-13
Classification: H01L

Abstract:
1. A semiconductor device comprising: a wiring board including a first surface, a second surface opposite to the first surface, a plurality of connection pads formed on the first surface, and a plurality of first lands formed on the second surface, the first lands being electrically connected to the connection pads, respectively; a semiconductor chip mounted on the first surface of the wiring board; a plurality of first conductive members electrically connecting the connection pads of the wiring board to the semiconductor chip; an insulating resin layer formed on the first surface of the wiring board to cover the semiconductor chip and the first conductive members; a plurality of second conductive members formed on the connection pads of the wiring board, so as to penetrate through the insulating resin layer; and a plurality of second lands formed on the insulating resin layer and electrically connected to the second conductive members, respectively; wherein the plurality of first conductive members include a third conductive member and a fourth conductive member, wherein the plurality of second conductive members include a fifth conductive member and a sixth conductive member, and wherein the plurality of connection pads include a first connection pad, a second connection pad and a third connection pad, the first connection pad being connected to both of the third conductive member and the fifth conductive member, the second connection pad being connected to the fourth conductive member without connecting to the first connection pad, and the third connection pad being connected to the sixth conductive member without connecting to the second connection pad.