Patent ID: 6778125
Filing Date: 2004-08-17
Classification: H03M

Abstract:
A system, comprising:a first circuit having first sampling rate, wherein fist circuit digitizes an inputted analog signal into an outputted first digital signal; a second circuit having second sampling rate less than first sampling rate and having input connected to first circuit input, wherein second circuit digitizes the inputted analog signal into an outputted second digital signal and wherein when frequency of a first component of the inputted analog signal is less than half of first sampling rate and greater than half of second sampling rate, second circuit outputs an aliased component folded into an aliased frequency less than half of the second sampling rate and first circuit outputs a non-aliased component; an anti-aliasing circuit having a first output and having input connected to first circuit output, wherein anti-aliasing circuit converts the non-aliased component to approximate amplitude of aliased component and folds into the aliased frequency at first output; and a subtracter having inputs separately connected to second circuit output and to first output, wherein subtracter outputs first output subtracted from second circuit output.