Patent ID: 6291964
Filing Date: 2001-09-18
Classification: H01L

Abstract:
A multiple power source electrostatic discharge protection circuit installed between a bonding pad and an internal circuit, comprising:a first NMOS transistor whose source terminal is grounded and whose drain terminal is connected to the bonding pad;a second NMOS transistor whose drain terminal is connected to a gate terminal of the first NMOS transistor and whose gate terminal is connected to a first voltage source;a third NMOS transistor whose drain terminal is connected to a source terminal of the second NMOS transistor, whose gate terminal is connected to a second voltage source and whose source terminal is grounded;a fourth NMOS transistor whose drain terminal is connected to a voltage source pad and whose gate terminal is connected to the first voltage source;a fifth NMOS transistor whose drain terminal is connected to a source terminal of the fourth NMOS transistor and whose gate terminal is connected to the second voltage source; anda PMOS transistor whose source terminal is connected to the voltage source pad, whose gate terminal is connected to a source terminal of the fifth NMOS transistor and whose drain terminal is connected to the bonding pad.