Patent ID: 8453124
Filing Date: 2013-05-28
Classification: G06F

Abstract:
1. A method for collecting processor instrumentation data, the method comprising: marking as a tagged instruction group, within a processor comprising a plurality of pipelined instruction execution stages arranged in an out-of-order execution architecture, one instruction group from within a plurality of instruction groups being simultaneously processed by the plurality of pipelined instruction execution stages; storing, by the processor in response to the marking, correlated instrumentation data obtained from execution stages within the plurality of pipelined instruction execution stages while processing the tagged instruction group, the execution stages within the plurality of pipelined instruction execution stages processing the tagged instruction group being fewer than the plurality of pipelined instruction execution stages; accepting, at the processor, a sample signal at a sample signal time; determining, at a time related to the sample signal time, that the tagged instruction group is indicated as a next-to-complete instruction group; writing, in response to determining that the tagged instruction group is indicated as a next-to-complete group at the time related to the sample signal time, the correlated instrumentation data; and providing, in response to accepting the sample signal and writing the correlated instrumentation data, the correlated instrumentation data as an instrumentation data output.