Patent ID: 8693226
Filing Date: 2014-04-08
Classification: H01L,H02M

Abstract:
1. An inverter comprising: a circuit including N arms connected in parallel, N being an integer equal to or greater than two, each of the N arms including a first switch and a second switch connected in series, each of the first switch and the second switch being a metal-insulator-semiconductor field-effect transistor including a gate for controlling a switching operation; and N gate drive circuits corresponding one-to-one to the N arms and configured to control, by pulse-width modulation using synchronous rectification, each of the first switch and the second switch to switch to an on-state or an off-state, wherein each metal-insulator-semiconductor field-effect transistor includes: each gate drive circuit synchronizes a timing at which the gate drive circuit outputs a signal for causing the first switch to switch to the on-state with a timing at which the gate drive circuit outputs a signal for causing the second switch to switch to the off-state, and synchronizes a timing at which the gate drive circuit outputs a signal for causing the first switch to switch to the off-state with a timing at which the gate drive circuit outputs a signal for causing the second switch to switch to the on-state, a threshold voltage of each metal-insulator-semiconductor field-effect transistor is Vth, and an electric potential of each gate based on an electric potential of a source of the metal-insulator-semiconductor field-effect transistor is Vgs, an electric potential of a drain of the metal-insulator-semiconductor field-effect transistor based on the electric potential of the source is Vds, when the relations Vgs≧Vth and Vds≧0 are both satisfied, a current flows from the drain to the source via the channel region, when the relations Vgs≧Vth and Vds<0 are both satisfied, a current flows from the source to the drain via the channel region, when the relations Vgs<Vth and Vds≧0 are both satisfied, there is no conduction between the source and the drain, when the relation 0≦Vgs<Vth is satisfied and Vds is lower than a predetermined voltage, a current flows from the source to the drain via the channel region, and when the current flows from the source to the drain via the channel region with the relation 0≦Vgs<Vth satisfied, an absolute value of an on-voltage for the metal-insulator-semiconductor field-effect transistor is smaller than an absolute value of an on-voltage for the body diode.