Patent ID: 6423986
Filing Date: 2002-07-23
Classification: H01L

Abstract:
A semiconductor device comprising:(a) a semiconductor structure having top and bottom surfaces, said structure including a plurality of semiconductor layers defining a blocking p-n junction remote from both said surfaces, said structure including a control layer defining the top surface of the structure; a top conductive region extending from said top surface; a conductive tub region spaced apart from said top conductive region and extending from said top surface toward said blocking p-n junction at least through said control layer, said control layer including a field effect region disposed between said top conductive region and said conductive tub region; (b) a top ohmic contact in contact with said top surface at said top conductive region; (c) a bottom ohmic contact in contact with said semiconductor structure below said blocking p-n junction, said semiconductor layers being arranged so that when a potential is sustained between said top and bottom ohmic contacts, a major portion of said potential appears across said blocking p-n junction thereby forming depletion regions about said blocking p-n junction, and (d) a gate contact overlying said field effect region, whereby conductivity of said field effect region can be selectively controlled by a controlling potential on said gate contact to create and interrupt a conductive channel within said control layer, said top conductive region and said conductive tub region being coupled and decoupled by said conductive channel, said conductive tub region extending downwardly to the vicinity of said blocking p-n junction so that a least resistive current path including said top conductive region, said conductive channel and said conductive tub region is created between said top ohmic contact and said blocking p-n junction when said conductive channel is created.