Patent ID: 6774620
Filing Date: 2004-08-10
Classification: G01N

Abstract:
A wafer map display apparatus for a semiconductor test system for testing semiconductor devices by displaying an image of IC chips on a semiconductor wafer based on test results, comprising:means for controlling a display device for displaying a wafer map of a semiconductor wafer under test on a specified window; means for acquiring IC chip information from the semiconductor test system, wherein the IC chip information includes XY address data of an IC chip on the semiconductor wafer under test; means for calculating a chip display size every time when XY address data of an IC chip that has been tested is received from the semiconductor test system with use of all of XY address data of IC chips acquired up to present and window size information from the means for controlling the display device; and means for renewing the wafer map display every time when a new IC chip is tested based on the chip display size determined by the means for calculating the chip display size, thereby displaying all of the IC chips that have been tested with a maximum available size on an image of the semiconductor wafer within the specified window.