Patent ID: 8390069
Filing Date: 2013-03-05
Classification: H01L,H03K

Abstract:
1. A semiconductor device comprising: a semiconductor substrate including a semiconductor layer; a power device formed in said semiconductor substrate; a plurality of concentric guard rings formed in said semiconductor substrate and surrounding said power device; and voltage applying means for applying successively higher voltages respectively to said plurality of concentric guard rings, with the outermost concentric guard ring having the highest voltage applied thereto, wherein: said power device includes a grounded emitter electrode formed on a top surface of said semiconductor substrate, a gate electrode formed in said top surface of said semiconductor substrate, and a collector electrode formed on a bottom surface of said semiconductor substrate, said bottom surface being opposite said top surface; said voltage applying means includes a plurality of series-connected resistance elements connected between said semiconductor layer and said emitter electrode; and said plurality of concentric guard rings are connected to different successive ones of said plurality of series-connected resistance elements, with the outermost concentric guard ring being connected to the one of said successive series-connected resistance elements closest to said semiconductor layer.