Patent ID: 6999105
Filing Date: 2006-02-14
Classification: G06T,G09G

Abstract:
1. A circuit arrangement, comprising: a line buffer having a width; and an image scaling circuit coupled to the line buffer and configured to generate a scaled image from a source image by partitioning the source image into a plurality of partitions and image scaling each partition using the line buffer, wherein each partition has a width that is no greater than that of the line buffer, and the scaled image has an overall width that is greater than that of the line buffer; wherein the plurality of partitions includes first and second partitions arranged adjacent to one another in the source image, wherein the image scaling circuit is further configured to store boundary conditions for the first partition for use during image scaling of the second partition, and wherein the image scaling circuit is configured to initiate a partition boundary save operation to store the boundary conditions for the first partition upon image scaling a last line of the first partition, and to initiate a partition boundary restore operation prior to image scaling a first line of the second partition to retrieve the stored boundary conditions for use during image scaling of the second partition.