Patent ID: 8368416
Filing Date: 2013-02-05
Classification: G01R

Abstract:
1. A method of testing integrated circuits during an assembly process, said method comprising: accessing a first integrated circuit from an inventory comprising said integrated circuits; for system-level testing of said first integrated circuit, coupling said first integrated circuit to a first circuit board that is specific to a first type of product and application; accessing a second integrated circuit from said inventory; for system-level testing of said second integrated circuit, coupling said second integrated circuit to a first circuit board that is specific to a second type of product and application different from said first type; if said system-level testing of said first integrated circuit is successful, then attaching permanently said first integrated circuit onto a second circuit board of said first type, wherein said attaching of said first integrated circuit is the next step following said system-level testing of said first integrated circuit; and if said system-level testing of said second integrated circuit is successful, then attaching permanently said second integrated circuit onto a second circuit board of said second type, wherein said attaching of said second integrated circuit is the next step following said system-level testing of said second integrated circuit.