Patent ID: 6222822
Filing Date: 2001-04-24
Classification: H04L

Abstract:
For use in a high speed packet switching network node having a plurality of transmit adapters and a plurality of transmit queues created by assigning memory locations from a buffer pool, each transmit queue being assigned to one of the transmit adapters, a plurality of systems for controlling the admission of packets to the transmit queues, each system being associated with one of the transmit queues and comprising:a queue threshold detector which generates a threshold-exceeded signal when the queue occupancy exceeds a predetermined threshold level;a free buffer space detector for generating a low-buffer signal when the number of free memory locations in the buffer pool falls below a predetermined threshold;a discard signal generator responsive to concurrent threshold-exceeded and low-buffer signals to generate a packet discard signal;a port activity timer which generates a transmission time-out packet discard signal if the transmit queue requires more than a predetermined time to dequeue its contents following the start of a dequeuing operation; andgate control logic responsive to packet discard signals from either said discard signal generator or said port activity time to block the enqueuing of a received packet into the transmit queue.