Patent ID: 7700410
Filing Date: 2010-04-20
Classification: H01L

Abstract:
1. A method of producing a semiconductor chip from a wafer to form electrical edge connections, said method comprising: providing a substrate having a plurality of electrically interconnected metal levels formed therein; depositing a protective dielectric material mask layer on an upper surface of said semiconductor chip; imparting an etching step to said dielectric mask layer so as to form a deep trench extending into said semiconductor chip; applying a dielectric to the walls of said trench so as to create an electrical isolation layer in said trench; depositing a temporary sacrificial polysilicon in said trench; filling any cavities remaining in said trench with an electrically conductive material; removing said protective dielectric material from said trench; planarizing said semiconductor chip to remove excess electrically conductive material and form electrical edge connectors; opening via holes to connect said metal levels and providing wiring to said electrical edge connectors; and thinning said semiconductor chip so as to expose said electrical edge connectors.