Patent ID: 7782117
Filing Date: 2010-08-24
Classification: H03K

Abstract:
1. A switch circuit defining an on state and an off state, the switch circuit when on couples a input node to an output node, the circuit comprising: an MOSFET device having a gate, a source coupled to the input node and an drain coupled to the output node; wherein, when the MOSFET device is on, an input voltage signal at the input node is coupled to the output node via the MOSFET device; a first circuit comprising: an unity gain amplifier with an input connected to the input voltage signal and an output providing the input voltage signal; a bias circuit comprising: an unity gain amplifier with an input connected to a bias voltage signal and an output providing the bias voltage signal; a signal summing circuit that accepts both outputs of the first circuit and the bias circuit and outputs a gate drive voltage equal to the sum of the outputs of the first circuit and the bias circuit; wherein the gate drive voltage signal is coupled to the MOSFET device gate.