Patent ID: 6472259
Filing Date: 2002-10-29
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device comprising a nonvolatile memory transistor of a stacked gate structure having a floating gate and a control gate, and a MOS transistor of a single gate structure, said method comprising:forming a first insulation film on a semiconductor substrate, said first insulation film becoming a gate oxide film of both the nonvolatile memory transistor and the MOS transistor; forming a first conductive layer on the first insulation film; removing the first conductive layer in an area extending in a direction perpendicular to a direction in which the control gate is formed extendedly from the first conductive layer to form a region for separating the floating gate; forming a second insulation layer on the first conductive layer; forming a second conductive layer so as to form the control gate; patterning the second conductive layer on the second insulation film; and patterning the first conductive layer to form the stacked gate structure and the single gate structure, wherein the MOS transistor of the single gate structure includes a high-voltage transistor and forming a peripheral circuit, and wherein the step of forming the first insulation film comprises the steps of forming a gate insulation film of the high-voltage transistor, and forming a tunnel oxide film between the floating gate and the substrate and simultaneously forming a gate insulation film of the MOS transistor forming the peripheral circuit.