Patent ID: 8236696
Filing Date: 2012-08-07
Classification: H01L

Abstract:
1. A method for fabricating a transistor, the method comprising: forming a trench by partially etching a substrate to form a fin active region that protrudes vertically from the substrate; forming an isolation structure around a lower portion of the fin active region while exposing an upper portion of the fin active region; forming spacers on the upper portion of the fin active region; partially removing the isolation structure under the spacers to expose a portion of sidewalls of the fin active region; and etching the exposed portion of the sidewalls of the fin active region so that the fin active region defines an upper region, a middle region, and a lower region, the middle region being thinner than the upper region, wherein the etching process is a dry etch process using hydrogen chloride (HCl) as an etchant and exposes an uppermost surface of the lower region, side surfaces of the middle region, and a bottom surface of the upper region, a height of the uppermost surface of the lower region being equal to a height of a resulting upper surface of the isolation structure after said act of etching the exposed portion of the sidewalls of the fin active region.