Patent ID: 7319419
Filing Date: 2008-01-15
Classification: H03M

Abstract:
1. Circuitry including a switched-capacitor sample/hold circuit, comprising: (a) a switched-capacitor input sampling stage including a first input sampling capacitor for sampling a first input voltage; (b) a sample/hold amplifier circuit including an operational amplifier having a first input coupled to the first input sampling capacitor, a first feedback capacitor coupled between the first input and a first output of the operational amplifier, and first switching circuitry coupling the first feedback capacitor to the first output of the operational amplifier; (c) a continuous-time offset DAC (digital to analog converter) receiving a digital input signal representative of an offset voltage and having a first output producing a first offset correction voltage to represent the offset voltage; and (d) second switching circuitry for coupling the first offset correction voltage to the switched-capacitor sample/hold circuit to adjust an amount of pre-charging of the first feedback capacitor in accordance with the digital input signal.