Patent ID: 7838777
Filing Date: 2010-11-23
Classification: H01L,H01R,H05K

Abstract:
1. A package structure, comprising: a first substrate having a first signal pad, a first reference plane and a first solder mask layer, wherein the first reference plane is surrounding the first signal pad and the first solder mask layer is disposed on the first reference plane and the first signal pad is exposed by the first solder mask layer, the first solder mask layer having a first annular opening surrounding the first signal pad to expose a part of the first reference plane; a second substrate having a second signal pad, a second reference plane and a second solder mask layer, wherein the second reference plane is surrounding the second signal pad and the second solder mask layer is disposed on the second reference plane and the second signal pad is exposed by the second solder mask layer, the second solder mask layer having a second annular opening surrounding the second signal pad to expose a part of the second reference plane; an electrical conductive element connecting between the first signal pad and the second signal pad so as to transmit a signal; and a conductive wall connecting between the first reference plane exposed by the first solder mask layer and the second reference plane exposed by the second solder mask layer as well as surrounding the electrical conductive element.