Patent ID: 6218211
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A method of fabricating an integrated circuit device having multiple electrodes, comprising:(a) providing a semiconductor die having a front side and a back side and containing an active region subjacent the front side, there being a field region of the front side of the die adjacent the active region,(b) forming a first level electrode structure and a first level bus over the front side of the die, wherein the first level electrode structure extends over the active region of the die and the first level bus extends over the field region of the front side of the die,(c) forming a second level electrode structure and a second level bus over the front side of the die, wherein the second level electrode structure extends over the active region of the die and the second level bus extends over the field region of the front side of the die, and(d) making electrical contact to the buses along substantially the entire length of each bus from beneath the bus.