Patent ID: 8964480
Filing Date: 2015-02-24
Classification: G11C

Abstract:
1. A method for operating a non-volatile memory device, comprising: measuring a combined current through a plurality of NAND strings as a reference combined current while applying a read pass voltage to a plurality of word lines, the plurality of NAND strings comprise a plurality of memory cells and the plurality of word lines are connected to the plurality of memory cells; and identifying one or more selected word lines of the plurality of word lines which are programmed word lines, the identifying comprises, for each of the one or more selected word lines: measuring an additional combined current through the plurality of NAND strings while applying a demarcation voltage to the selected word line and applying the read pass voltage to remaining word lines of the plurality of word lines, and determining whether the additional combined current is less than the reference combined current by at least a margin; and performing an erase operation for the plurality of NAND strings, the erase operation comprises an erase-verify test which is made relatively hard to pass when a number of the programmed word lines is relatively small and relatively easy to pass when the number is relatively large.