Patent ID: 6816404
Filing Date: 2004-11-09
Classification: G11C,H01L

Abstract:
A phase-change nonvolatile memory array, comprising:a plurality of column-selection lines extending in a first direction; a plurality of word-selection lines extending in a second direction, orthogonal to the first direction; and a plurality of memory cells extending in the first and second directions, each of said memory cells comprising a PCM storage element and a corresponding selection transistor, each of said PCM storage elements having a first and a second terminal, and each of said selection transistors having a first, a second, and a control terminal, said first terminal of each of said selection transistors being connected to said first terminal of said corresponding PCM storage element, and said control terminal of each of the selection transistors being connected to a respective one of said word-selection lines, said second terminal of each of said PCM storage elements being connected to a respective one of said column-selection lines, and said second terminal of each of said selection transistor is connected to a reference-potential region while reading and programming said memory cells, wherein said selection transistor is of NMOS type and is a low-threshold transistor.