Patent ID: 8230377
Filing Date: 2012-07-24
Classification: G06F

Abstract:
1. A method of globally placing a circuit design on a programmable integrated circuit device (programmable IC), the method comprising: subdividing, by a placement system, the programmable IC into a grid comprising a plurality of cells; assigning each component of a selected component type of the circuit design to one of a plurality of control set groups according to a control set of the component, wherein each component of a control set group has same control signals comprising a same clock signal and at least one of a same set signal or a same enable signal specifying the control set; calculating a force comprising a control set force component that depends upon control set overlap within the plurality of cells, wherein the control set overlap indicates whether a cell of the plurality of cells comprises components belonging to a number of control sets that is larger than supported by the cell; applying the force to at least one selected component of a cell comprising overlap; assigning components of the circuit design to locations on the programmable IC by solving a set of linear equations that depend upon application of the force to the at least one selected component, thereby specifying a global placement; and outputting the circuit design comprising the global placement.