Patent ID: 8647935
Filing Date: 2014-02-11
Classification: H01L

Abstract:
1. A method of forming an integrated circuit device, said method comprising: forming a protective layer over a horizontal surface of a substrate, said horizontal surface running in a horizontal direction; patterning at least one pair of openings through said protective layer and into said substrate, said openings each having a top adjacent said protective layer, a bottom within said substrate, and sidewalls running from said top to said bottom, said openings running in a vertical direction from said top to said bottom, said vertical direction being approximately perpendicular to said horizontal direction, said openings being positioned on opposite sides of a channel region of said substrate; forming sidewall spacers along said sidewalls of said openings; performing a material removal process to remove additional substrate material from said bottom of said openings, said material removal process extending said bottom of said openings deeper into said substrate in said vertical direction and extending said sidewalls outward into said substrate in said horizontal direction at said bottom of said openings to create an extended bottom within said openings; forming a first strain producing material within said extended bottom of said openings; removing said sidewall spacers; forming a second material within a remainder of said openings between said first strain producing material and said top of said openings; removing said protective layer; and forming a gate dielectric and a gate conductor on said horizontal surface on said substrate adjacent said channel region, said second material comprising source and drain regions.