Patent ID: 6859860
Filing Date: 2005-02-22
Classification: G06F

Abstract:
1. A control circuit for controlling a cache system having a store queue for storing at least one store instruction, said control circuit including: a first comparator circuit comparing, in view of an index and an off-set, an object instruction with tag-retrieval to said at least one store instruction stored in said store queue, and said first comparator circuit outputting a first stall signal for stalling said object instruction with tag-retrieval if said object instruction with tag-retrieval corresponds, in view of said index and said off-set, to at least any one of said at least one store instruction stored in said store queue; a second comparator circuit comparing, in view of an index and a way, said object instruction with tag-retrieval to said at least one store instruction stored in said store queue, and said second comparator circuit outputting a second stall signal for stalling said object instruction with tag-retrieval if said object instruction with tag-retrieval corresponds, in view of said index and said way, to at least any one of said at least one store instruction stored in said store queue; and a controller circuit stalling, in accordance with said first stall signal, said object instruction with tag-retrieval and executing said store instruction, which corresponds, in view of said index and said off-set, to said object instruction with tag-retrieval; and said controller circuit also stalling, in accordance with said second stall signal, said object instruction with tag-retrieval and executing said store instruction, which corresponds, in view of said way to said object instruction with tag-retrieval and subsequently said controller circuit replacing a cache.