Patent ID: 6297102
Filing Date: 2001-10-02
Classification: H01L

Abstract:
A method for method for forming a ROM cell surface implant region using a PLDD implant, comprising the steps of:a. providing a semiconductor structure comprising a substrate having isolation structures thereon; said isolation structures separating and electrically isolating a first area, a second area, and a third area of said semiconductor structure; said first area further comprising a P-well formed in the substrate and a gate structure formed over the substrate; said second area further comprising a N-well formed in the substrate and a gate structure formed over the substrate; said third area further comprising a P-well formed in the substrate and buried N+ regions formed in the substrate with second isolation structures overlying said buried N+ regions;b. forming a NLDD photoresist mask having an NLDD opening over said first area of said semiconductor structure;c. implanting impurity ions through said NLDD opening to form n-type lightly doped source and drain regions;d. removing said NLDD photoresist mask;e. forming a PLDD/ROM photoresist mask over said semiconductor structure; said PLDD/ROM photoresist mask having an PLDD opening over said second area of said semiconductor structure and a ROM opening over said third area of said semiconductor structure;f. simultaneously implanting impurity ions through said PLDD opening to form p-type lightly doped source and drain regions and through said ROM opening to form a ROM cell surface implant region; andg. removing said PLDD/ROM photoresist mask.