Patent ID: 6788136
Filing Date: 2004-09-07
Classification: H03F

Abstract:
A method for amplifying a signal comprising:generating an input signal; amplifying the input signal utilizing a chopper-stabilized, silicon carbide NMOS depletion made operational amplifier to produce an amplified output signal, the operational amplifier including a first NMOS depletion mode amplification stage and a second NMOS depletion mode amplification stage, the first stage and the second stage fabricated on the same silicon carbide substrate, wherein amplifying the input signal comprises chopping the input signal utilizing a first NMOS depletion mode chopping switch responsive to a first chopping signal to produce a first chopped input signal; and generating at least one opposite node of a resistor of an NMOS depletion mode buffered field effect transistor logic (BFL) level shifting/inverter circuit, the first chopping signal, and the level shifted first chopping signal in response to a clock signal.