Patent ID: 7405483
Filing Date: 2008-07-29
Classification: H01L

Abstract:
1. An electronic assembly, comprising: an electronic package, comprising a lead frame, having a chip pad and a plurality of inner leads, wherein the chip pad is used for carrying a chip and the chip pad and at least a portion of the inner leads are electrically connected to a plurality of bonding pads on the chip; and a circuit board, wherein the electronic package is disposed on the circuit board and the circuit board comprises an insulating layer, a patterned conductive layer disposed on a side of the insulating layer, a conductive via passing through the insulating layer, and a ground layer disposed on an opposite side of the insulating layer, wherein the patterned conductive layer comprises: wherein the conductive via is electrically connected to the extension portion and disposed under one of the inner leads and the ground layer is electrically connected to the conductive via; wherein a first orthogonal projection of a second end of the inner lead electrically connected to the second pad is formed on the insulating layer, and the first orthogonal projection at least overlaps with a second orthogonal projection of the extension portion formed on the insulating layer.