Patent ID: 6308253
Filing Date: 2001-10-23
Classification: G06F,Y10S

Abstract:
An integrated circuit device circuit arrangement for processing multimedia data, the circuit arrangement comprising a processing core including:(1) a datapath configured to perform a predetermined digital signal processing (DSP) operation;(2) unit registers for storing data used in digital signal processing; and(3) a programmable controller coupled to the datapath and unit registers, the programmable controller configured to execute a local computer program comprising instructions to control the operation of the datapath to process data, the programmable controller responding to an extract instruction identifying a source register of said unit registers, a target register of said unit registers, a number of bits and a starting position, by copying the identified number of bits, starting from the identified starting position, from the identified source register of said unit registers to a predetermined position in the identified target register of said unit registers.