Patent ID: 7656087
Filing Date: 2010-02-02
Classification: H01L

Abstract:
1. A flat panel display, comprising: an insulating substrate; a lower conductive layer on the insulating substrate; an upper conductive layer above the lower conductive layer; and an insulating layer between the upper conductive layer and the lower conductive layer and having an interconnecting hole used for forming a contiguous contact between the upper conductive layer and the lower conductive layer, wherein the interconnecting hole is tapered with a taper angle of 60° or less immediately adjacent the lower conductive layer, with respect to a surface of the insulating substrate, and wherein the lower conductive layer includes source and drain regions of a thin film transistor, the upper conductive layer includes source and drain electrodes of the thin film transistor, and the interconnecting hole includes contact holes used for connecting the source and drain regions to the source and drain electrodes, respectively.