Patent ID: 8964117
Filing Date: 2015-02-24
Classification: H04N

Abstract:
1. An integrated circuit comprising: a frame construction engine operative to construct both a first frame of deinterlaced video and a second frame of deinterlaced video, constructing of the first frame of deinterlaced video including examining and using both of a first field of interlaced video and a second field of interlaced video, independent of any other fields of interlaced video, constructing of the second frame of deinterlaced video including examining and using both of the first field of interlaced video and the second field of interlaced video, independent of any other fields of interlaced video, the frame construction engine being further operative to construct the first frame of deinterlaced video by: the frame construction engine being further operative to construct the second frame of deinterlaced video by: the interpolation control information is based on the first field of interlaced video and the second field of interlaced video independent of any other fields of interlaced video, the first and second fields of spatially-interpolated pixel values are respectively based on the first and second fields of interlaced video independent of any other fields of interlaced video, and the missing pixel locations in the first and second frames respectively represent pixel locations in the first and second frames that are respectively not associated with a pixel location in the first and second fields of interlaced video; the circuit further comprising an interpolation controller operative to generate the interpolation control information, and wherein the first field of interlaced video and the second field of interlaced video together represent a woven frame of interlaced video, the interpolation controller is operative to implement a shredding pattern detection algorithm such that the interpolation control information indicates whether a shredding pattern exists within a vicinity of each pixel location in the woven frame that corresponds to a missing pixel location in the first frame, when the shredding pattern is detected in the vicinity of a first pixel location in the woven frame corresponding to a first missing pixel location in the first frame, the frame construction engine is operative to assign the pixel value from the first field of spatially-interpolated pixel values to the first missing pixel location in the first frame, and when the shredding pattern is not detected in the vicinity of the first pixel location in the woven frame corresponding to a first missing pixel location in the first frame, the frame buffer is operative to assign the pixel value from the second field of interlaced video to the first missing pixel location in the first frame.