Patent ID: 6466083
Filing Date: 2002-10-15
Classification: G05F

Abstract:
An integrated current reference circuit comprising a first current mirror and a second current mirror, the first current mirror having a first diode-connected transistor providing a controlling input and a first controlled transistor having a control electrode connected to a control electrode of the first diode-connected transistor, and the second current mirror having a second diode-connected transistor providing a controlling input and a second controlled transistor having a control electrode connected to a control electrode of the second diode-connected transistor, the first diode-connected transistor and the second controlled transistor and the first controlled transistor and the second diode-connected transistor respectively forming first and second serial branches disposed between a first supply rail and a second supply rail, wherein one of said branches comprises a series connection of a voltage offset circuit and a control transistor having a main current path, the voltage offset circuit being connected between the main current path of the control transistor and one of said supply rails, and a control terminal of the control transistor being coupled to said one supply rail, wherein the first current mirror includes transistors having a first polarity and the second current mirror includes transistors having a second polarity that is opposite the first polarity;wherein the second diode-connected transistor is large by comparison with the second controlled transistor.