Patent ID: 7667253
Filing Date: 2010-02-23
Classification: G11C,H01L

Abstract:
1. A non-volatile memory device, comprising: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers, wherein the pair of sidewall spacers is formed by using one of a single layer of oxynitride containing a metal selected from a group consisting of hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), titanium (Ti), cerium (Ce), platinum (Pt) and lanthanum (La) and stacked layers of oxynitride containing a metal selected from the group.