Patent ID: 7081398
Filing Date: 2006-07-25
Classification: H01L

Abstract:
1. A method of forming a local interconnect, comprising: providing a bulk semiconductor substrate having a first conductivity type background region, an adjacent second conductivity type background region and a boundary extending therebetween; forming an isolation trench within the bulk semiconductor substrate laterally centered over and along the boundary; depositing a first trench isolation material over the bulk semiconductor substrate and to within the isolation trench; chemically etching the first trench isolation material effective to form a line trench within the first trench isolation material at least a portion of which is laterally centered within the isolation trench and laterally centered over the boundary; depositing conductive material within the line trench and recessing it within the line trench after depositing it; depositing a second trench isolation material the same as the first trench isolation material over the first trench isolation material, over the recessed conductive material within the isolation trench and within the line trench; and removing at least some first and second trench isolation material from the semiconductor substrate in at least one common removing step.