Patent ID: 6504208
Filing Date: 2003-01-07
Classification: H01L,H02M

Abstract:
A MOS device comprising:a semiconductor layer of a first conductivity type, said semiconductor layer having a major surface; a body region of a second conductivity type formed from a portion of the major surface, said body region having a surface plane and a junction face, said junction face adjoining the semiconductor layer of the first conductivity type; a source region of said first conductivity type, said source region being formed from said surface plane of said body region, wherein the body region is exposed at the surface plane around a perimeter of the source region and the source region is exposed at the surface plane and substantially fills a central portion of the body region; an insulating film over the portion of the body region extending between the source region and the semiconductor layer; a gate electrode on the insulation film; and a conductive layer electrically contacting the source region without directly electrically contacting the body region so that a parasitic body diode defined at the junction face between the body region and semiconductor layer is substantially open circuited.