Patent ID: 6291344
Filing Date: 2001-09-18
Classification: H01L,Y10S

Abstract:
A method of fabricating an integrated circuit structure having a barrier layer at contact locations, comprising the acts of:forming a doped semiconductor region at a semiconducting surface of a body;forming a dielectric film over said doped region, said dielectric film having a contact opening therethrough;after the step of forming a dielectric film, depositing a first layer comprising titanium metal in contact with the surface of the doped region and overlying the dielectric layer;exposing the structure to an oxygen-bearing atmosphere;annealing the structure to form from said first titanium metal layer a first titanium oxynitride layer overlying a titanium disilicide layer over the surface of the doped region within the contact opening;depositing a second titanium metal layer over the structure;depositing a layer of titanium nitride over the second titanium metal layer in a vacuum between about 4 mTorr and about 10 mTorr and at a substrate temperature of equal to or less than about 100.degree. C.;exposing the structure to an oxygen-bearing atmosphere; andafter the exposing step, annealing the structure to form from said second titanium metal layer a second titanium oxynitride layer overlying said first titanium oxynitride layer.