Patent ID: 6166950
Filing Date: 2000-12-26
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device executing a programming operation based on data and an address signal comprising:a plurality of memory cells each of which has a threshold voltage so as to allocate to one of a plurality of threshold voltage ranges indicating a program state from a first threshold voltage range indicating an erase state by executing said programming operation,wherein an address signal has first information and second information,wherein when said second information has data of a first state, a threshold voltage of a first memory cell coupled to a word line selected by said first information is allocated to a second threshold voltage range of said plurality of threshold voltage ranges indicating said programming state from said first threshold voltage range in accordance with first program data, andwherein when said second information has data of a second state, a threshold voltage of a second memory cell coupled to said word line selected by said first information is allocated to a third threshold voltage range of said plurality of threshold voltage ranges indicating said programming state from said first threshold voltage range and a threshold voltage of a third memory cell coupled to said word line selected by said first information is allocated to a fourth threshold voltage range of said plurality of threshold voltage ranges indicating said programming state from said second threshold voltage range in accordance with second program data.