Patent ID: 9029981
Filing Date: 2015-05-12
Classification: G11C,H01L

Abstract:
1. A semiconductor device comprising: a chip; a SRAM formed on the chip; an active region including a core circuit forming region and a buffer forming region on the chip; a fuse element forming region arranged on a corner of the active region and including a fuse element able to be electrically fused; and a pad forming region arranged around the buffer forming region and outside of the active region, wherein the active region, the fuse element and the pad forming region are arranged on the chip, the fuse element region being arranged within the active region, the fuse element is coupled to the SRAM, the fuse element is coupled to a first pad and a second pad in the pad forming region, the first pad is opened to an external terminal, and the second pad is bonded to the external terminal by a wire bonding.