Patent ID: 6253284
Filing Date: 2001-06-26
Classification: G06F

Abstract:
A memory module controlling system, comprising:a memory controller;a first, a second and a third slots, each having a signal input terminal and a signal output terminal, wherein the signal output terminal of the first slot is coupled to the signal input terminal of the second slot, the signal output terminal of the second slot is coupled to the signal input terminal of the third slot, the signal input terminal of the first slot is coupled to the memory controller, and the first, the second and the third slots form a serially connected cascade structure;a multiplexer, having a first, a second, a third input terminal and an output terminal, wherein the signal output terminals of the first, the second and the third slots are coupled to the first, the second and the third input terminals of the multiplexer, respectively;a terminal device, coupled to the output terminal of the multiplexer; andan automatic detector, coupled to the first, second and third slots for detecting a status signal of whether a memory module is plugged in, so as to transmit an output signal to the terminal device by selecting via the multiplexer one of the signal output terminals of the first, second, and third slots according to the status signal.