Patent ID: 6100154
Filing Date: 2000-08-08
Classification: H01L

Abstract:
A method of forming a polysilicon resistor in the fabrication of integrated circuits comprising:providing a field oxide layer overlying a semiconductor substrate;depositing a polysilicon layer overlying said field oxide layer;etching away said polysilicon layer where it is not covered by a mask to form a polysilicon resistor;oxidizing said polysilicon resistor to form an oxide layer on all surfaces of said polysilicon resistor;depositing a silicon nitride barrier layer overlying said oxide layer;depositing an interlevel dielectric layer overlying said silicon nitride barrier layer;etching contact openings through said interlevel dielectric layer, said silicon nitride barrier layer, and said oxide layer to said polysilicon resistor;filling said contact openings with a metal layer and patterning said metal layer; andcovering said patterned metal layer with a passivation layer wherein said passivation layer contains hydrogen atoms and wherein said silicon nitride barrier layer prevents said hydrogen atoms from penetrating said polysilicon resistor.