Patent ID: 8859410
Filing Date: 2014-10-14
Classification: H01L

Abstract:
1. A method of forming a gate structure for a semiconductor device comprising: forming a non-stoichiometric high-k gate dielectric layer on a semiconductor substrate, wherein an oxide containing interfacial layer is present between the non-stoichiometric high-k gate dielectric layer and the semiconductor substrate; forming at least one gate conductor layer including a boron semiconductor alloy layer on the non-stoichiometric high-k gate dielectric layer, wherein the at least one gate conductor layer including a boron semiconductor alloy layer reduces a strength of an electric field that is produced during burn in when compared to a similarly structured semiconductor device having a metal gate conductor; and annealing said non-stoichiometric high-k gate dielectric layer, after forming said at least one gate conductor layer, to remove oxide material from the oxide containing interfacial layer, wherein the oxide containing interfacial layer is thinned by removing the oxide material during said annealing.