Patent ID: 7272203
Filing Date: 2007-09-18
Classification: H03L,H04L

Abstract:
1. A data-and-pilot directed frequency-and-phase lock loop having a symbol rate, comprising: a signal input; a VCO having an in-phase and a quadrature output; a first multiplier having as input the signal input and the in-phase and quadrature outputs of the VCO, the first multiplier further having a first output; a second multiplier having as input the first output, the second multiplier further having a second output; a narrow band-pass filter having as input the second output, the narrow band-pass filter further having a third output; a third multiplier having as input the third output, the third multiplier further having a fourth output that is a convolution of the third output; a fourth multiplier having as input the fourth output, the fourth multiplier further having a fifth output; a first low-pass filter having as input an in-phase component of the fifth output, the first low-pass filter further having a first filtered output; a fifth multiplier having as input the first filtered output and a quadrature component of the fifth output, the fifth multiplier further having a sixth output; a first summer having as input the second output and the third output, the first summer further having a seventh output that is a difference between the second output and the third output; a sixth multiplier having as input the seventh output, the sixth multiplier further having an eighth output that is a convolution of the seventh output; seventh and eighth multipliers having as input the eighth output, the seventh and eighth multipliers further having a ninth and tenth output, respectively; second and third low pass filters having as input in-phase portions of the ninth and tenth outputs, respectively, the second and third low pass filters having a second and third filtered output, respectively; ninth and tenth multipliers having as inputs the second and third filtered outputs, respectively, and quadrature portions of the ninth and tenth outputs, respectively, the ninth and tenth multipliers further having an eleventh and twelfth outputs, respectively; a second summer having as input the sixth, eleventh, and twelfth outputs, the second summer further having a thirteenth output; and a fourth low-pass filter having as input the thirteenth output, the fourth low-pass filter further having a fourteenth output; wherein the fourteenth output is returned to the VCO to complete a feedback loop.