Patent ID: 6458685
Filing Date: 2002-10-01
Classification: H01L

Abstract:
A self aligned contact opening forming method comprising:providing a bulk semiconductor substrate having an active area received between at least two undoped silicon dioxide comprising substrate isolation regions, the substrate comprising at least two transistor gate constructions received at least partially over the active area, the gate constructions comprising gates having their sides and tops covered with insulating material comprising at least one of undoped silicon dioxide and silicon nitride; forming a doped silicon dioxide layer over the active area, the isolation regions and the gate constructions; forming a patterned masking layer over the doped silicon dioxide layer, the patterned masking layer having a mask opening formed therein which overlaps at least one of the gate constructions and the active area; placing the substrate within a high density plasma etcher; the etcher having a directly coolable top power electrode, a biasable electrostatic chuck, a focus ring, and directly heatable chamber sidewalls; and plasma etching through the mask opening, using a hydrogen containing fluorocarbon chemistry, a top electrode power less than or equal to 1000 W per 200 mm of substrate diameter, an electrostatic chuck bias power less than the top electrode power, directly heated chamber sidewalls at greater than 100Â° C., the top electrode cooled to less than or equal to 100Â° C. and the focus ring not being directly heated, into the doped oxide substantially selective to the active area, insulating material and any overlapped area of the substrate isolation regions to form a substantially self aligned contact opening to the active area.