Patent ID: 8873637
Filing Date: 2014-10-28
Classification: G06F,H04N

Abstract:
1. A video processing system comprising: a motion compensator coupled to a pixel processing pipeline, wherein the motion compensator is configured to concurrently perform multiple interpolations on multiple pairs of pixels based on a single parallel interpolation instruction, wherein the single parallel interpolation instruction identifies the multiple pairs of pixels, and wherein the single parallel interpolation instruction identifies an interpolation type of each interpolation of the multiple interpolations; and the pixel processing pipeline configured to receive frame data having a first format, the pixel processing pipeline including: a color space converter configured to receive the frame data having the first format and generate converted frame data having a second format; a horizontal upscaler coupled to the color space converter, the horizontal upscaler configured to generate upscaled frame data having the second format by increasing a number of horizontal pixels included in lines of the converted frame data; and a reduction module coupled to the horizontal upscaler, the reduction module configured to reduce a number of bits used to encode the upscaled frame data to generate reduced frame data.