Patent ID: 6594174
Filing Date: 2003-07-15
Classification: G11C

Abstract:
A method for sensing data stored in a ferroelectric memory device including an access transistor having a gate connected to a word line and a current path connected between a bit line and an internal cell node, a ferroelectric capacitor being connected between the internal cell node and a plate line, and a reference voltage generator connected across the access transistor and the ferroelectric capacitor for generating a reference voltage, the reference voltage generator including a reference capacitor, the method comprising:precharging the reference capacitor to a reference voltage; connecting the ferroelectric capacitor to the bit line responsive to the word line; activating the plate line and simultaneously connecting the reference capacitor to the complementary bit line thereby transmitting the reference voltage to the complementary bit line; sensing a voltage difference between the bit line and the complementary bit line; and insulating the reference capacitor from the complementary bit line.