Patent ID: 6429084
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A method of forming transistors in SOI processing comprising the steps of:preparing an SOI substrate, including forming a set of STI isolation members defining a set of transistor active areas; forming a set of gate stacks in said set of active areas; depositing a protective layer of nitride over said set of gate stacks and over said set of STI isolation members and forming a set of temporary sidewall spacers on said set of gate stacks; masking said set of STI isolation members and removing an exposed portion of said protective layer of nitride that is between said set of STI isolation members and said set of temporary sidewall spacers; implanting sources and drains in said set of active areas; removing an oxide film from said sources and drains while said STI members are protected by said protective layer of nitride; selectively growing epitaxial raised S/D members on said sources and drains while said set of gate stacks are protected by said protective layer of nitride; growing oxide on said raised S/D members; removing a previously masked portion of said protective layer of nitride over said gate stack and between said raised S/D members; annealing said S/D members and thereafter performing extension and halo implants; and forming a final gate sidewall spacer.