Patent ID: 8044405
Filing Date: 2011-10-25
Classification: H01L

Abstract:
1. A thin film transistor (TFT) substrate, comprising: a gate interconnection line comprising a gate line and a gate electrode arranged on an insulating substrate; a gate insulating layer formed on the gate interconnection line; a semiconductor layer formed on the gate insulating layer; a data interconnection line comprising a data line, a source electrode, and a drain electrode formed on the semiconductor layer; a first passivation layer formed on the data interconnection line and exposing a portion of the drain electrode; a second passivation layer formed on the first passivation layer, wherein the outer sidewalls of the second passivation layer are positioned inside the outer sidewalls of the first passivation layer; and a pixel electrode connected to the drain electrode, wherein the first passivation layer is formed of a same material as the second passivation layer and the lattice structure of the first passivation layer is denser than the lattice structure of the second passivation layer.