Patent ID: 6664577
Filing Date: 2003-12-16
Classification: C23C,H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate; and a MOSFET provided on the semiconductor substrate, the MOSFET including a source region formed in the semiconductor substrate, a drain region formed in the semiconductor substrate, a shallow source region extended from the source region, a shallow drain region extended from the drain region, a channel region formed between the shallow source region and the shallow drain region in the semiconductor substrate, a gate insulating film formed on the channel regions a gate electrode provided on the gate insulating film and side-wall insulating films formed on sides of the gate electrode, wherein said gate insulating film has a portion sandwiched between the gate electrode and the channel region, the portion including a first surface region facing the channel region and a second surface region facing the gate electrode, the first surface region having a dielectric constant higher than that of the second surface region.