Patent ID: 7554358
Filing Date: 2009-06-30
Classification: H03K

Abstract:
1. A programmable logic device comprising: a plurality of logic blocks; a plurality of input/output blocks; a volatile memory block adapted to store user data within the programmable logic device, but which is not adapted to configure the logic blocks and the input/output blocks; configuration memory adapted to store first configuration data for configuration of the logic blocks, the input/output blocks, and the volatile memory block of the programmable logic device; and a non-volatile memory adapted to store the user data provided from the volatile memory block and further adapted to store configuration data for transfer to the configuration memory, the non-volatile memory being partitioned to provide a configuration portion to store configuration data for transfer to the configuration memory and a user portion to store the user data for the volatile memory block, wherein the volatile memory block and the configuration memory are distinct and separate from each other and located in different portions of the programmable logic device.