Patent ID: 7800106
Filing Date: 2010-09-21
Classification: H01L

Abstract:
1. A test structure, comprising: a substrate; a plurality of test assemblies formed on said substrate on the basis of an optical proximity correction (OPC) process, each test assembly comprising a plurality of first line features and a plurality of second line features, said first and second line features comprising opposing end portions provided at a predefined tip-to-tip design distance and having a spatial design relationship for electrically insulating the plurality of first line features from the plurality of second line features, said spatial design relationship being defined by at least two design dimensions wherein members of said plurality of test assemblies comprise different combinations of values for said at least two design dimensions; and an interconnect structure formed above said substrate and connecting said plurality of test assemblies so as to identify a short current path in at least one of said test assemblies between said first and second line features of said at least one test assembly.