Patent ID: 6530043
Filing Date: 2003-03-04
Classification: H04L

Abstract:
In a PCI bus system having at least one PCI bus, at least one PCI data source, and at least one PCI data destination, a method for checking errors in write data transferred from said one PCI data source across said PCI bus to said PCI bus system for said at least one PCI data destination, said write data comprising a data stream of a plurality of blocks, comprising the steps of:across said PCI bus from said at least one PCI data source, calculating a check value for each said block of said data stream transferred across said PCI bus; updating any previously calculated check value for said data stream with said calculated check value at a storage location, said storage location across said PCI bus from said at least one PCI data source; responding to an unique identifier of a redundancy write command sent subsequent to completion of said transfer of said write data across said PCI bus, checking said updated calculated check value at said storage location for an error indication; and upon said checking step indicating an error, signaling said error.