Patent ID: 7205241
Filing Date: 2007-04-17
Classification: H01L,Y10S

Abstract:
1. A method for manufacturing a semiconductor device comprising: forming gate lines on a semiconductor substrate; forming a first insulating layer to cover the gate lines; forming first contact pads and second contact pads, wherein the first contact pads and second contact pads are electrically connected to the semiconductor substrate between the gate lines by penetrating the first insulating layer; forming a second insulating layer to cover the first contact pads and the second contact pads; forming bit lines, wherein the bit lines cross over the gate lines and are electrically connected to the second contact pads by penetrating the second insulating layer; forming a third insulating layer to cover the bit lines; selectively etching the third insulating layer to form a band-type opening, wherein the band-type opening crosses the bit lines and exposes the first contact pads; forming a conductive layer on the third insulating layer to fill the band-type opening; patterning the conductive layer to form individual storage electrode contact bodies, wherein each of the contact bodies includes an extension that is extended on the third insulating layer along the length of the bit line and a body that is electrically connected to a first contact pad; and forming a storage electrode on each of the storage electrode contact bodies, and wherein the storage electrodes formed on the storage electrode contact bodies are arranged in a zigzag pattern along at least one of the bit lines or the gate lines.