Patent ID: 8886877
Filing Date: 2014-11-11
Classification: G06F,G11C

Abstract:
1. A method of operating a nonvolatile three dimensional memory that is monolithically formed in one or more physical levels of arrays of memory cells having an active area above a silicon substrate, comprising: receiving a host command to write a portion of data; programming a first logical page of the portion of data one-bit-per-cell in a first physical page of a first block of the nonvolatile three dimensional memory using a lower page Multi Level Cell (MLC) programming scheme; programming a second logical page of the portion of data one-bit-per-cell in a second physical page of a second block of the nonvolatile three dimensional memory using a Single Level Cell (SLC) programming scheme; programming a third logical page of the portion of data one-bit-per-cell in a third physical page of a third block of the nonvolatile three dimensional memory using the SLC programming scheme; subsequently, after execution of the host command, copying the second and the third logical pages of data to the first physical page where they are stored with the first logical page; and subsequently, marking the second physical page and the third physical page as obsolete.