Patent ID: 7342262
Filing Date: 2008-03-11
Classification: H01L

Abstract:
1. A power module packaging and interconnecting plural power transistor dies to operate at a first frequency, without oscillation at a second frequency higher than said first frequency but lower than a cutoff frequency of the transistors, the module comprising: a substrate having a conductive layer patterned to form a first area, a second area, and a third, common, interior central landing area; plural power transistor dies mounted on the substrate with a lower side (drain) of each die electrically and thermally bonded to the first area of the conductive layer on the substrate; a source of each die electrically connected to the second area of the conductive layer on the substrate; and a gate of each die electrically connected to the third, common, interior central landing area of the conductive layer on the substrate via separate electrical leads; the electrical leads being sized to substantially the same electrical length and providing a first impedance corresponding to said electrical length from the third, common, interior central landing area to each gate that will pass the first frequency substantially unattenuated and providing a second impedance from the gate of one die to the gate of a second die that will substantially attenuate the second frequency.