Patent ID: 6355549
Filing Date: 2002-03-12
Classification: H01L

Abstract:
A method of forming a local interconnect for a memory device, the method comprising:selectively oxidizing the surface of a substrate to form at least one active area and field oxide regions; forming a gate region, source region, and drain region in the at least one active area; forming one of at least a portion of a bit line or a word line; forming a polysilicon layer to connect at least two of the gate region, source region, drain region, bit line and word line; forming an oxide hard mask over the polysilicon layer to define the local interconnect for connecting at least two of the gate region, source region, drain region, bit line, or word line, resulting in exposed regions of the polysilicon layer and unexposed regions of the polysilicon layer; forming a layer comprising a refractory metal over the oxide hard mask and the exposed regions of the polysilicon layer; reacting the layer comprising the refractory metal with the exposed regions of the polysilicon layer to form metal silicide portions of the local interconnect; removing unreacted portions of the layer comprising the refractory metal and the oxide hard mask; and removing unexposed regions of the polysilicon layer to define a polysilicon portion of the local interconnect.