Patent ID: 7880303
Filing Date: 2011-02-01
Classification: H01L

Abstract:
1. An integrated circuit structure comprising: a semiconductor substrate; a metallization layer over the semiconductor substrate; a first dielectric layer between the semiconductor substrate and the metallization layer, and having a first thickness; an etch stop layer overlying the first dielectric layer and having a second thickness; a second dielectric layer between the semiconductor substrate and the metallization layer, wherein the second dielectric layer is over the first dielectric layer and the etch stop layer, the second dielectric layer having a third thickness, wherein the third thickness is between about one half and about two thirds the sum of the first thickness, the second thickness, and the third thickness; and a circular-shaped contact plug connecting to a portion of an upper surface of the semiconductor substrate, the contact plug extending through the first and second dielectric layers and the etch stop layer with an upper portion comprising a via filled with a first conductor material extending through and lying substantially in the second dielectric layer and a lower portion comprising a contact formed of a material different from the first conductor material extending to the surface of the semiconductor substrate and lying substantially in the first dielectric layer, wherein the contact plug is electrically connected to a metal line in the metallization layer, and wherein the contact plug is discontinuous at an interface between the upper portion and the lower portion.