Patent ID: 7709908
Filing Date: 2010-05-04
Classification: H01L

Abstract:
1. A high-voltage MOS transistor device, comprising: a substrate of a first conductive type; a source of a second conductive type disposed in the substrate; a drain of the second conductive type disposed in a well; at least a second doped region of the first conductive type disposed between the source and the drain; a third ion well of the second conductive type disposed around the second doped region in the substrate; an isolation structure disposed on a part of the third ion well; a gate dielectric layer disposed on a surface of the substrate between the source and the isolation structure; a gate disposed on a surface of the gate dielectric layer and extended to approach the isolation structure; a first dielectric layer covering the gate, the doped regions, and the isolation structure; and a plurality of field plate rings disposed on the first dielectric layer; and a first conductive layer disposed across the field plate rings, the first conductive layer comprising: