Patent ID: 7235477
Filing Date: 2007-06-26
Classification: H01L,H05K

Abstract:
1. A method of manufacturing a multi-layer interconnection circuit module in which plural unit wiring layers are connected to each other through via holes so that they are laminated and formed, comprising: forming a first insulating layer of a photosensitive insulating material, implementing photo-lithographic processing to the first insulating layer to form via holes, coating a second insulating layer of a photosensitive insulating material over the entire surface of the first insulating layer without forming any metal layer over the first insulating layer, implementing photo-lithographic processing on the second insulating layer to form wiring grooves corresponding to wiring patterns including communicating portions with the respective via holes, thereafter filling conductive metal in the respective via holes and in the wiring grooves by applying a conductive metal layer over the entire surface of the second insulating layer, and polishing the conductive metal layer until the principal surface of the second insulating layer is exposed, wherein the polishing processing is implemented so that the wiring patterns formed by the conductive metal filled in the respective via holes and the respective wiring grooves are polished until a principal surfaces of the wiring patterns are even with the principal surface of the second insulating layer, and wherein the unit wiring layer of the first layer is adapted so that the first insulating layer is formed over a base substrate, and a unit wiring layer of an upper layer is adapted so that a respective first insulating layer of said upper layer is formed over the principal surface of the second insulating layer of the first layer.