Patent ID: 7268384
Filing Date: 2007-09-11
Classification: H01L,Y10S

Abstract:
1. A semiconductor substrate comprising: a first pair of word lines having a bit node formed within semiconductive material of the substrate between the first pair of word lines, and a second pair of word lines having a capacitor node formed within semiconductive material of the substrate between the second pair of word lines, the first and second pair of word lines comprising conductive material; insulative material between the first pair of word lines over the bit node and between the second pair of word lines over the capacitor node; polysilicon between the first pair of word lines over the insulative material over the bit node and between the second pair of word lines over the insulative material over the capacitor node, the polysilicon being electrically isolated from the bit node and from the capacitor node, the polysilicon not being received elevationally over the conductive material of the first and second pair of word lines; an insulative layer over the first and second pairs of word lines and over the polysilicon and the insulative material which is between the second pair of word lines; and an opening through the insulative layer which outwardly exposes the polysilicon between the first pair of word lines.