Patent ID: 6185669
Filing Date: 2001-02-06
Classification: G06F

Abstract:
A hardware system for fetching an instruction for execution that corresponds to an instruction pointer in a program, wherein the program has at least one portion expressed in a first code and at least one portion expressed in a second code wherein the second code is comprised of instructions that has been optimized, the system comprising:a first memory portion for holding the first code;a second memory portion for holding the second code;a third memory portion for holding an active portion of a mapping of instruction pointers to addresses of instructions of the second code in the second memory portion;a fourth memory portion that holds a mapping of instruction pointers to addresses of instructions of the first code in the first memory position; anda processor sub-unit for determining whether the instruction pointer is an address in the second memory portion;wherein if the instruction pointer is an address in the second memory portion, the processor sub-unit fetches the instruction in the second code corresponding to the address in the second memory portion for execution; andwherein if the instruction pointer is not an address in the second memory portion, the processor sub-unit performs a parallel search of the third memory portion to determine whether the instruction pointer has a mapping to a corresponding instruction in the second code, and the fourth memory portion to determine whether the instruction pointer has a mapping to a corresponding instruction in the first memory portion, wherein an address match in the fourth memory portion is ignored in favor of an address match in the third memory portion,if the instruction pointer has a mapping in the third memory portion, then the processor sub-unit fetches the instruction in the second code corresponding to the address in the second memory portion for execution, andif the instruction pointer does not have a mapping in the third memory portion, then the processor sub-unit fetches the instruction in the first code corresponding to the instruction pointer for execution.