Patent ID: 6245602
Filing Date: 2001-06-12
Classification: H01L

Abstract:
A method of making a top gate, self-aligned polysilicon thin film transistor comprising the steps ofdepositing a dummy gate on an optically transparent substrate;depositing an isolation oxide layer over the dummy gate and the substrate;depositing an active silicon layer over the isolation oxide layer;depositing a mask layer over the active silicon layer and patterning the mask layer by backside exposure wherein the dummy gate acts as an optical mask;ion implanting dopant material to form a source-drain region;laser annealing to simultaneously crystallize the active layer into polysilicon and to activate the source-drain region;depositing a gate oxide layer over the polysilicon layer;depositing a transparent conductive gate over the gate oxide layer; anddepositing a photoresist layer and patterning the photoresist layer by backside exposure wherein the dummy gate acts as an optical mask.