Patent ID: 7842989
Filing Date: 2010-11-30
Classification: G11C,H01L

Abstract:
1. A semiconductor memory cell comprising a memory element including a first field effect transistor and a selection switch including a second field effect transistor, the memory element and the selection switch being connected in series, wherein a semiconductor film and a dielectric film stacked over a substrate form a common channel and a common gate insulating film in the first field effect transistor and the second field effect transistor; a first gate electrode of the first field effect transistor and a second gate electrode of the second field effect transistor are formed on the dielectric film; on the semiconductor film, a drain electrode is formed outwardly of the first gate electrode, and a source electrode is formed outwardly of the second gate electrode; under the semiconductor film, a back-gate electrode is formed with a ferroelectric film interposed therebetween; and ends of the semiconductor film that forms the channel are located inwardly of ends of the back-gate electrode.