Patent ID: 7184494
Filing Date: 2007-02-27
Classification: H04L

Abstract:
1. A regenerated data signal generation circuit comprising: a receiving circuit for receiving a modulated signal and demodulating the modulated signal so as to output a demodulated signal; a first binarization circuit connected to the receiving circuit, the first binarization circuit receiving the demodulated signal and binarizing the demodulated signal while compensating for offset deviation of the demodulated signal by a first method so that the first binarization circuit outputs a first binarization signal; a second binarization circuit connected to the receiving circuit, the second binarization circuit receiving the demodulated signal and binarizing the demodulated signal while compensating for offset deviation of the demodulated signal by a second method that is different from the first method so that the second binarization circuit outputs a second binarization signal; a first preparation circuit coupled to the first binarization circuit, the first preparation circuit outputting a first regenerated data signal and a first delayed regenerative data signal based on the first binarization signal; a second preparation circuit coupled to the second binarization circuit, the second preparation circuit generating a second regenerated data signal and outputting a delayed regenerative data signal based on the second binarization signal; a synchronous detection circuit coupled to the first preparation circuit so as to output a changeover signal based on the first generated data signal; and a switch circuit coupled to the first and second preparation circuit and the synchronous detection circuit so as to output either the first delayed regenerative data signal or the second delayed regenerative data signal in response to the changeover signal.