Patent ID: 7764134
Filing Date: 2010-07-27
Classification: H03K,H03L

Abstract:
1. An apparatus coupled to receive an input signal and supply as an output signal the input signal divided by a number having an integer portion and a fractional portion (M/N), where M and N are integers and M<N, the apparatus comprising: a divider configured to generate a divider output signal according to a divider control signal; a division control circuit configured to generate the divider control signal and a fractional signal indicative of a phase error in the divider output signal, the division control circuit including a first and a second delta sigma modulator, the first delta sigma modulator coupled to receive at its input, and accumulate, an error associated with a quantization of the fractional portion and supply a first delta sigma modulator output signal to the second delta sigma modulator and wherein the second delta sigma modulator is coupled to supply the fractional signal; and a phase interpolator coupled to receive the fractional signal and adjust the divider output signal according to the fractional signal.