Patent ID: 8633730
Filing Date: 2014-01-21
Classification: G06F,H03K,Y02D

Abstract:
1. A method of controlling power to a circuit, comprising: in response to determining that a first sub-circuit of a plurality of sub-circuits of a programmable IC is to be deactivated, deasserting a global write enable (GWE) signal, wherein the programmable IC includes a first plurality of configuration memory cells, and each configuration memory cell of the first plurality is associated with one sub-circuit of the plurality of sub-circuits and controls whether the sub-circuit is responsive to the GWE signal; in response to deassertion of the GWE signal and the first cell associated with the first sub-circuit being in a first state, disabling flip-flops in the first sub-circuit from changing state; in response to cells of the first plurality associated with sub-circuits other than the first sub-circuit being in a second state, enabling flip-flops in the sub-circuits other than the first sub-circuit to change state; in response to determining that the first sub-circuit is to be activated, asserting the GWE signal; preserving logic implemented by the first sub-circuit between the deasserting and the asserting of the GWE signal; and in response to assertion of the GWE signal and the first cell associated with the first sub-circuit being in the first state, enabling flip-flops in the first sub-circuit to change state.