Patent ID: 6377898
Filing Date: 2002-04-23
Classification: H01L

Abstract:
A method of analyzing and classifying defects on a semiconductor wafer on which at least two different types of die are manufactured during a semiconductor manufacturing process, the method comprising:sending a production lot of wafers through a manufacturing process; scanning a selected wafer from the production lot of wafers for defects; sending location information for defects caught during the step of scanning to a defect management system; sending die information for the at least two different types of die from the scanning tool to the defect management system: sending the location information for defects and the die information from the defect management system to a comparator die selector system wherein the automatic defect classification review tool analyzes and classifies defects by comparing a defect location on the die on which the defect is located with an identical location on an identical die located on the semiconductor wafer being inspected; and sending the location information for defects and the die information from the comparator die selector system to an automatic defect classification review tool wherein the automatic defect classification review tool analyzes and classifies defects contained in the location information for defects and the die information from the comparator die selector system.