Patent ID: 7389490
Filing Date: 2008-06-17
Classification: G06F

Abstract:
1. A method of specifying a selectively presentable digital system in one or more files, said method comprising: in at least one hardware definition language (HDL) file among said one or more files, specifying at least one design entity containing a functional portion of the digital system, said at least one design entity logically containing a latch having a respective plurality of different possible latch values; with one or more statements in said one or more files, associating a configuration entity with said latch, wherein said configuration entity has a plurality of different legal settings and each setting reflects which of the plurality of different possible values is loaded in said associated latch; and with one or more statements within said one or more files, defining a controlling value set for at least one instance of said configuration entity, wherein said controlling value set indicates at least one controlling value for which presentation of a current legal setting of the configuration entity instance is restricted.