Patent ID: 9129893
Filing Date: 2015-09-08
Classification: B82Y,G11C,H01L,Y10S

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a main surface; a switching element including a source region and a drain region, placed over the main surface of the semiconductor substrate; a flat plate-like lead-out wiring placed above the switching element; a spin torque written in-plane magnetization magnetoresistive element, positioned above the lead-out wiring, whose magnetization state can be changed according to the direction of a current flow; and a first wiring electrically coupled with the magnetoresistive element and extended toward the direction along the main surface, wherein the aspect ratio as viewed in a plane of the magnetoresistive element is a value other than 1, and wherein in a memory cell area where a plurality of memory cells in which the magnetoresistive element and the switching element are electrically coupled with each other are arranged, a plurality of the magnetoresistive elements adjoining to each other in a first direction, or the direction of length of each the magnetoresistive element as viewed in a plane, are so arranged that the magnetoresistive elements are not on an identical straight line extended in the first direction, wherein in an identical memory cell, the lead-out wiring is so arranged that the lead-out wiring does not at least partly overlap with an active region of the switching element in the main surface of the semiconductor substrate as viewed in a plane, wherein in the memory cell area, a plurality of the memory cells are arranged in a third direction and a fourth direction orthogonal to each other as viewed in a plane, and wherein the memory cell area further includes: a source contact electrically coupled to the source region of the switching element; and a drain contact electrically coupling together the drain region of the switching element and the lead-out wiring.