Patent ID: 9117906
Filing Date: 2015-08-25
Classification: H01L

Abstract:
1. A method for fabricating a fin field-effect transistor, comprising: providing a semiconductor substrate; forming a plurality of fins and an isolation structure on top of the semiconductor substrate, wherein the fins are covered with a hard mask layer; forming a first dummy gate layer on the fins and the isolation structure; polishing the first dummy gate layer using the hard mask as a polishing stop layer and until the hard mask layer is exposed; after polishing the first dummy gate layer, removing the hard mask layer to expose a top surface of the fins; after removing the hard mask layer, forming a second dummy gate layer on the first dummy gate layer and also on the exposed top surface of the fins; and etching the second dummy gate layer and the first dummy gate layer such that the second dummy gate layer is etched to form a dummy gate on each of the fins and the first dummy gate layer is removed to expose the isolation structure between adjacent fins.