Patent ID: 6067631
Filing Date: 2000-05-23
Classification: G06F

Abstract:
A time setting device of an operating system in a computer system having a power saving mode and a normal mode of operation, said device comprising:a random access memory for storing said operating system;a real time clock for providing representations of real time and date;a power management system controller for generating a clock driving signal in said normal mode and stopping said clock driving signal from being generated in said power saving mode;a clock for generating a clock signal in response to said clock driving signal;a central processing unit for measuring time and date of said operating system in response to said clock signal and, in response to no clock signal being generated during said power saving mode, being shut down; anda device driver for comparing, after a change from said power saving mode to said normal mode, said time and date measured by said central processing system to said real time and date provided by said real time clock, said device driver resetting said time and date of said operating system according to said real time and date provided by said real time clock when said time and date of said operating system is delayed due to said central processing unit being shutdown during said power saving mode.