Patent ID: 6650220
Filing Date: 2003-11-18
Classification: H01F,H01L,Y10T

Abstract:
A method of manufacturing a parallel stacked inductor comprising:providing a substrate; forming a first conductive material layer over the substrate; processing the first conductive material layer to form a first turn; forming a first dielectric layer over the substrate and the first turn; forming first and second via openings in the first dielectric layer connected to only to distal ends of the first turn; forming a second conductive material layer over the first dielectric layer and in the first and second via openings; processing the second conductive material layer to form a second turn connected only to the distal ends of the first turn by the second conductive material in the first and second via openings forming first and second vias therebetween; and forming a second dielectric layer over the first dielectric layer and the second turn.