Patent ID: 8791004
Filing Date: 2014-07-29
Classification: H01L

Abstract:
1. A non-transitory computer readable medium encoded with a program for fabricating at least one transistor, the program comprising instructions configured to perform a method comprising: forming a metal layer on a high dielectric constant layer formed on a semiconductor layer; forming a silicon containing layer over the metal layer, wherein a silicon dioxide layer incidentally forms during the silicon containing layer formation and resides on the metal layer beneath the silicon containing layer; forming a first gate stack for a pFET region, wherein the first gate stack comprises a first portion of the metal layer and a first portion of the silicon containing layer, and wherein a first portion of the silicon dioxide layer resides on the first portion of the metal layer; forming a second gate stack for an nFET region, wherein the second gate stack comprises a second portion of the metal layer and a second portion of the silicon containing layer, and wherein a second portion of the silicon dioxide layer resides on the second portion of the metal layer; selectively removing the first portion of the silicon containing layer; and thereafter, removing the first portion of the silicon dioxide layer residing on the first portion of the metal layer while maintaining the second portion of the silicon dioxide layer on the second portion of the metal layer.