Patent ID: 8617981
Filing Date: 2013-12-31
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor integrated circuit device, comprising steps of: (a) forming a first insulating film over a semiconductor substrate; (b) forming a first wiring trench in the first insulating film; (c) filling a first metal film in the first wiring trench; (d) forming a second insulating film over the first metal film and over the first insulating film; (e) forming a third insulating film over the second insulating film; (f) forming a fourth insulating film formed over the third insulating film; (g) forming a contact hole in the fourth, third and second insulating films; (h) forming a second wiring trench in the fourth insulating film; and (i) filling a second metal film in the second wiring trench and the contact hole as one combined unit, such that the second metal wiring is connected to the first metal film, wherein the first and second metal films include copper as a primary component, wherein the fourth insulating film has a greater thickness than the combined thicknesses of the second and third insulating films, has a dielectric constant lower than a dielectric constant of a silicon oxide film and is comprised of a material including silicon, oxygen and carbon, wherein the first insulating film is comprised of a material including silicon, oxygen and carbon, wherein the second insulating film is comprised of a material including silicon, carbon and nitrogen, wherein the third insulating film is comprised of a material including silicon and carbon, wherein the material of the second insulating film is different form the material of the third insulating film, and wherein a thickness of the second insulating film is larger than a thickness of the third insulating film.