Patent ID: 8384221
Filing Date: 2013-02-26
Classification: B41J,H01L

Abstract:
1. A semiconductor device comprising: a substrate including a metal layer as an upper layer; a semiconductor thin film having a first principal surface as a bonding area and a second principal surface which is an opposite surface of said first principal surface, said first principal surface of said semiconductor thin film being placed above and bonded to a top surface of said substrate having the metal layer, an area of said bonding area of said first principal surface of said semiconductor thin film being larger than an area of said second principal surface of said semiconductor thin film; an interlayer insulating film disposed so as to cover said semiconductor thin film and said metal layer, said interlayer insulating film having an opening formed on a top contact area of said second principal surface; and a discrete interconnection layer which extends from and on said top contact area, through said opening, through and on said interlayer insulating film, and to and on said substrate, so as to electrically couple said top contact area to said substrate.