Patent ID: 7301198
Filing Date: 2007-11-27
Classification: H01L

Abstract:
1. A semiconductor device wherein a logic circuit area having a semiconductor switching element and a memory area having a semiconductor storage element are disposed on one semiconductor substrate; wherein each of the semiconductor switching element and the semiconductor storage element has no more than one gate electrode, a pair of source/drain regions of first conductivity type formed on portions of a semiconductor substrate surface corresponding to opposite sides of the gate electrode, and a channel forming region of second conductivity type formed between the source/drain regions; wherein memory function bodies having a function of storing electric charges are provided on the opposite sides of the gate electrode of the semiconductor storage element; and wherein in the semiconductor storage element, an amount of current that flows from one of the source/drain regions to the other of the source/drain regions upon application of a voltage to the gate electrode is variable depending on an amount of electric charges retained in the memory function body; wherein in the semiconductor switching element, the source/drain regions extend under and overlap with the gate electrode with respect to a channel direction; and in the semiconductor storage element, spacings are provided between the gate electrode and each of the source/drain regions with respect to the channel direction, and the memory function bodies having the function of storing electric charges are disposed on the opposite sides of the gate electrode so as to overlap with the spacings at the semiconductor substrate surface, respectively.