Patent ID: 8188766
Filing Date: 2012-05-29
Classification: H03L

Abstract:
1. A self-contained clock generation system for generating a real-time programmable clock signal, the clock generation system, comprising: a reference signal divider generating a first periodic signal in response to a reference clock; a phase-locked loop coupled to receive the first periodic signal and configured to generate a frequency controlled output signal; a programmable divider including control logic, core logic, and post-processing logic, the programmable divider coupled to receive the output signal and generate a frequency controlled clock signal, the reference signal divider and the programmable to divider responsive to real-time changes in respective inputs to achieve real-time control of phase-locked loop input and output signals, the core logic generating a divide-by-N waveform that is forwarded to the post-processing logic, where N is an integer and the post-processing logic generates a half duty cycle clock signal responsive to the divide-by-N waveform.