Patent ID: 8954806
Filing Date: 2015-02-10
Classification: G06F,G11C

Abstract:
1. A method comprising: entering an operation mode on an electronic system, the electronic system configured to receive and route packets in the operation mode, wherein the electronic system comprises an integrated circuit that comprises reconfigurable logic circuitry to perform a function of the integrated circuit and a configuration memory that configures the reconfigurable logic circuitry; injecting, with a controller circuit, one or more faults into the configuration memory of the integrated circuit; and monitoring, with monitoring circuitry, the electronic system for failures while packets are received and routed by the electronic system in the operation mode and the configuration memory is subjected to the one or more faults, wherein the integrated circuit comprises a field programmable gate array, wherein the reconfigurable logic circuitry comprises a plurality of reconfigurable logic blocks each configured to perform a logic function, and wherein the configuration memory configures the plurality of reconfigurable logic blocks.