Patent ID: 6051476
Filing Date: 2000-04-18
Classification: H01G,H01L,Y10S

Abstract:
A method for manufacturing capacitor of semiconductor memory device comprising the steps of:providing a semiconductor substrate including a storage node;forming a first intermetal insulating layer, a planarization layer and a second intermetal insulating layer on the semiconductor layer successively;forming a contact hole by etching the first intermetal insulating layer, the planarization layer and the second intermetal insulating layer so that a selected portion of the storage node is exposed;forming a photoresist pattern on the second intermetal insulating layer so as to fill the contact hole, wherein the photoresist pattern has a wave of saw-teeth shape at sidewalls thereof;forming spacers at both sidewalls of the photoresist pattern in which the wave of saw-teeth shape is formed, wherein a wave of saw-teeth shape is formed at inner surfaces of the spacer owing to both sidewalls of the photoresist pattern;removing the photoresist pattern in which the waves of saw-teeth shape are formed at sidewalls thereof;forming a storage node electrode by filling inside of the contact hole and between the spacers with a doped polysilicon layer, wherein a wave of saw-teeth shape is formed at sidewalls of the storage node electrode owing to the spacer;removing the spacer and the second intermetal insulating layer; anddepositing a dielectric layer and a plate electrode on a surface of the storage node electrode successively.