Patent ID: 8049267
Filing Date: 2011-11-01
Classification: G11C,H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a first gate insulating film formed on the substrate; a first gate electrode formed on the first gate insulating film; source and drain regions formed in the substrate so as to sandwich the first gate electrode; a first intergate insulating film formed on the first gate electrode and including a first opening; a second gate electrode formed on the first intergate insulating film and electrically connected to the first gate electrode through the first opening; and a boost electrode formed on the first intergate insulating film and electrically isolated from the first gate electrode and the second gate electrode; wherein the source and drain regions are respectively connected to a word line and a row main decoder circuit unit, the second gate electrode is connected to a transfer gate line, and the boost electrode is connected to a boost electrode control circuit.