Patent ID: 6138173
Filing Date: 2000-10-24
Classification: G06F

Abstract:
An I/O expansion circuit comprising:a plurality of input/output ports for parallel data;a data input for inputting said parallel data;a data output for outputting said parallel data;a data bus for data transfer among said data input, said plurality of input/output ports and said data output;control input for inputting a signal for controlling operation of said I/O expansion circuit;a first bus buffer to provide a status of said data input;a second bus buffer to provide a status of said data bus to said data output based on a state of the signal provided to said control input; andan IO expander connected to said data bus and controlled by a control signal provided from said control input;said I/O expansion circuit outputs parallel data provided from a selected one of said input/output ports to said data output based on the control signal from said control input, or outputs parallel data provided from said data input to one of said input/output ports selected by the control signal from said control input, and outputs the status of said data input or the status of said selected input/output port;said I/O expansion circuit inputs a command for selection of said input/output ports to set an operation mode, selects said input/output ports and inputs data to said data input that is to be output to said selected input/output ports;said IO expander selects said input/output port to input a command for selection of said input/output and sets the operation mode in transition of a signal provided to said control input, outputs data provided from said data input when said command is a write command, and provides a status of said input/output port selected by said command to said data output.