Patent ID: 6492222
Filing Date: 2002-12-10
Classification: G11C,H01L

Abstract:
A method of fabricating a ferroelectric memory device comprised of a top electrode over a bottom electrode with a ferroelectric material located between said top electrode and said bottom electrode, said method comprising the steps of:providing a stack including: a layer of bottom electrode material, a layer of top electrode material, and a layer of ferroelectric material situated between said layer of bottom electrode material and said top electrode material; depositing a layer of hardmask material on said layer of top electrode material, said hardmask material being comprised of a refractory nitride; removing a portion of said layer of hardmask material thereby exposing a portion of said layer of top electrode material by subjecting said portion of said layer of hardmask material to a first gas comprised of a first chlorine-bearing species and argon; removing said exposed portion of said layer of top electrode material thereby exposing a portion of said layer of ferroelectric material by subjecting said exposed portion of said layer of top electrode material to a second gas comprised of nitrogen, a first oxygen-bearing species, argon, and a second chlorine-bearing species; removing said exposed portion of said layer of ferroelectric material thereby exposing a portion of said layer of bottom electrode material by subjecting said exposed portion of said ferroelectric material to a third gas comprised of a third chlorine-bearing species, a second oxygen-bearing species, and a first fluorine-bearing species; and removing said exposed portion of said layer of bottom electrode material by subjecting said exposed portion of said layer of bottom electrode material to a fourth gas comprised of nitrogen, argon, a fourth chlorine-bearing species, and a third oxygen-bearing species.