Patent ID: 8198916
Filing Date: 2012-06-12
Classification: H03K

Abstract:
1. A digital signal voltage level shifter, comprising: an edge detector for detecting assertion of a digital input signal from a first logic circuit in a source voltage domain; an output module triggered by said edge detector for asserting a digital output signal corresponding to said digital input signal for a second logic circuit in a destination voltage domain, wherein the edge detector and the output module are supplied with power only from a power supply of the destination voltage domain; and a reset generator connected to the output module for asserting a reset signal in response to subsequent de-assertion of the digital input signal, wherein the reset generator is supplied with power only from the power supply of the destination voltage domain; wherein said reset generator comprises: wherein the edge detector asserts a set signal in response to the assertion of the digital input signal, and the output module asserts the digital output signal in response to assertion of the set signal and de-asserts the digital output signal in response to the reset signal.