Patent ID: 6570449
Filing Date: 2003-05-27
Classification: H03F

Abstract:
An operation amplification circuit, comprising:a differential amplification circuit that receives a differential signal and performs a differential amplification thereof; an output amplification circuit that amplifies an output of the differential amplification circuit; and a bias circuit that determines a bias of the differential amplification circuit and the output amplification circuit, the bias circuit including a reference voltage circuit that generates a specified reference voltage, and a current mirror circuit based on the reference voltage generated by the reference voltage circuit, the reference voltage circuit including a first MOS transistor and a second MOS transistor of an identical conduction type serially connected to one another, the first MOS transistor including a gate electrode that is formed from polysilicon including a P-type impurity and connected to a source electrode thereof, the second MOS transistor including a gate electrode that is formed from polysilicon including an N-type impurity and connected to a drain electrode thereof, a voltage corresponding to a difference between threshold voltages of the first and second MOS transistors being generated at a common connection section of the first and second MOS transistors as the reference voltage.