Patent ID: 8338890
Filing Date: 2012-12-25
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a plurality of external terminals; a plurality of semiconductor substrates that are layered with respect to each other, such that there is no gap between adjacent ones of the semiconductor substrates; at least one through electrode penetrating through the semiconductor substrates and electrically connected with at least one of the external terminals; a plurality of electrostatic discharge protection circuits, each electrostatic discharge protection circuit being provided on one of the semiconductor substrates, wherein the at least one through electrode is electrically connected with the plurality of electrostatic discharge protection circuits; and a simple electrostatic discharge protection circuit electrically connected with the at least one through electrode, the simple electrostatic discharge protection circuit having a lower electrostatic discharge protection function than the electrostatic discharge protection circuits, the simple electrostatic discharge protection circuit being provided on a semiconductor substrate on which no electrostatic discharge protection circuit is provided, the electrostatic discharge protection circuits comprising grounded-gate negative-channel metal oxide semiconductors, and the simple electrostatic discharge protection circuit comprising a diode.