Patent ID: 6111283
Filing Date: 2000-08-29
Classification: H01L

Abstract:
A triple well structure, wherein the triple well structure is suitable for being used in an embedded dynamic random access memory (embedded DRAM), comprising:a first conductive type substrate, comprising:a transistor comprising a second conductive type gate, a second conductive type source, and a second conductive type drain, wherein the second conductive type gate is on the first conductive type substrate, and the second conductive type source and the second conductive type drain are on different sides of the second conductive type gate in the first conductive type substrate;an isolation structure in the first conductive type substrate, wherein the isolation structure encircles the transistor;a second conductive type isolation well in the first conductive type substrate, wherein the second conductive type isolation well is under the isolation structure and in contact with the isolation structure; anda second conductive type deep well in the first conductive type substrate under the transistor, wherein a bottom portion of the second conductive type isolation well overlaps with a side portion of the second conductive type deep well;a first conductive type well in the first conductive type substrate, wherein the second conductive type isolation well encircles the first conductive type well and the second conductive type deep well underlies the first conductive type well, such that the first conductive type well is surrounded by the second conductive type isolation well together with the second conductive type deep well;a first conductive type block region between the second conductive type source and the second conductive type deep well, wherein the first conductive type block region is directly under the second conductive type source and does not directly connect with the second conductive type source; anda first conductive type field in the first conductive type substrate between the transistor and the second conductive type deep well, wherein the first conductive type block region overlaps with the first conductive type field.