Patent ID: 7510941
Filing Date: 2009-03-31
Classification: H01L

Abstract:
1. The manufacturing method of a semiconductor device comprising an LDMOSFET having a source region, a drain region, and a gate electrode formed on a main surface of a semiconductor substrate, comprising the steps of: (a) preparing said semiconductor substrate of a first conductivity type; (b) forming said gate electrode via a gate insulating film over the main surface of said semiconductor substrate; (c) forming a first insulating film so as to cover said gate electrode over the main surface of said semiconductor substrate; (d) forming a first conductor film on said first insulating film; and (e) forming a field plate electrode with a side wall spacer shape comprising said first conductor film over a side surface of said gate electrode over a side of said drain region by anisotropically etching said first conductor film, wherein in said step (e), a conductor portion with a side wall spacer shape comprising said first conductor film is formed over the side surface of said gate electrode over the side of said source region, and said manufacturing method further comprising: (f) after said step (e), removing said conductor portion present over the side surface of said gate electrode over the side of said source region and leaving said field plate electrode on the side surface of said gate electrode on the said of said drain region, wherein in said step (a), said semiconductor substrate comprising silicon is prepared, in said step (b), said gate electrode comprising silicon is formed, said manufacturing method further comprising, after said step (f), the steps of: (g) forming a second insulating film so as to cover said gate electrode and said field plate electrode over the main surface of said semiconductor substrate; (h) forming an etching mask layer on said drain region located over said second insulating film; (i) removing said second insulating film located over said gate electrode and over said source region and leaving said second insulating film over said drain region by etching using said etching mask layer as an etching mask; and (j) forming a metal silicide film on said gate electrode and on said source region.