Patent ID: 6418616
Filing Date: 2002-07-16
Classification: B32B,H05K,Y10T

Abstract:
A method of producing fine-line circuitry on a printed circuit board having a planar surface and at least one filled plated through hole, said method comprising the steps of:(a) drilling at least one hole through a dielectric substrate, said hole defining a surface; (b) depositing a seed layer on the planar surface of said dielectric substrate and on said surface defined by said hole; (c) depositing electrically conductive plating on said planar surface of said dielectric substrate and on said surface defined by said hole to form a subcomposite; (d) filling said hole with a filler composition; (e) etching said subcomposite to partially remove said electrically conductive layer to thereby reduce the thickness of said electrically conductive layer; (f) removing residual amounts of said filler composition on said subcomposite; (g) etching said subcomposite to completely remove said electrically conductive layer; (h) depositing a seed activator on the surface of said subcomposite; (i) covering said subcomposite with a photoresist and exposing and developing said photoresist to reveal selected areas of said subcomposite; and (j) additively plating electrical circuitry on said selected areas of said subcomposite.