Patent ID: 8592272
Filing Date: 2013-11-26
Classification: H01L

Abstract:
1. A method of manufacturing a non-volatile semiconductor memory device, comprising: forming, on a semiconductor substrate, a plurality of element regions extended in a first direction and arranged in parallel with each other, and an element isolation region mutually isolates the element regions and filled with a first insulating film; forming, on the element regions, a plurality of memory cell gate electrodes extends in a second direction orthogonal to the first direction and arranged in parallel with each other; etching the first insulating film, after forming the memory cell gate electrodes, in such a manner that the first insulating film remains in at least the element isolation region of a region where select gate electrodes are to be formed; forming a second insulating film on the memory cell gate electrodes having a gap between the memory cell gate electrodes; forming two select gate electrodes extends in the second direction and arranged side by side in parallel with each other, on the element regions of the region where the select gate electrodes are to be formed; forming carbon side walls on opposing side surfaces of the select gate electrodes; implanting impurity ions into the element regions between the two select gate electrodes with the carbon side walls as a mask; and removing the carbon side walls.