Patent ID: 8237491
Filing Date: 2012-08-07
Classification: H01L,H03K

Abstract:
1. A semiconductor device, comprising: a first conductive type first transistor; a first conductive type second transistor; a first power supply pad arranged between the first transistor and the second transistor and supplying a first potential; a second conductive type third transistor; a second conductive type fourth transistor; a second power supply pad arranged between the third transistor and the fourth transistor and supplying a second potential; a first output pad arranged between the first transistor and the third transistor; and a second output pad arranged between the second transistor and the fourth transistor, wherein a direction in which an axis connecting the first power supply pad with the second power supply pad extends is substantially perpendicular to a direction in which an axis connecting the first output pad with the second, output pad extends, wherein drain regions of the first and third transistors are electrically connected to the first output pad by a first wiring, wherein drain regions of the second and fourth transistors are electrically connected to the second output pad by a second wiring, wherein source regions of the first and second transistors are electrically connected to the first power supply pad by a third wiring, wherein source regions of the third and fourth transistors are electrically connected to the second power supply pad by a fourth wiring, wherein each of the first to fourth wirings includes three conductive layers, such that the layers are layered in a direction perpendicular to both the direction in which the axis connecting the first power supply pad with the second power supply pad extends and direction in which the axis connecting the first output pad with the second output pad extends, and wherein the third wiring includes a lower conductive layer comprising substantially a same shave as a shape of the source regions of the first and second transistors.