Patent ID: 6529419
Filing Date: 2003-03-04
Classification: G11C

Abstract:
An apparatus for varying a data input/output path in a semiconductor memory device, comprising:a plurality of DBSAs amplifying a signal loaded on a data bus; a plurality of fuse circuits producing output signals of specific levels respectively in accordance with whether or not fuses are cut; a plurality of input multiplexers each of which selects either an external signal inputted through a corresponding pad or another external signal inputted through a pad next to the corresponding pad in accordance with the output signals of the fuse circuits, and applies the selected signal to a write driver; and a plurality of data input/output parts including respectively a plurality of output multiplexers, each of the output multiplexers selecting a signal outputted from either a corresponding one of the DBSAs or one next to the corresponding DBSA in accordance with the output signals of the fuse circuits, and outputing the selected signal through a corresponding pad.