Patent ID: 6517412
Filing Date: 2003-02-11
Classification: B24B

Abstract:
A method of controlling the polishing time of a wafer lot, comprising:performing a chemical mechanical polishing (CMP) process for a time &Dgr;t(n) on a plurality of wafers on an n-th wafer lot among a plurality of wafer lots, each wafer lot consisting of a plurality of wafers; calculating an amount removed &Dgr;ToxP(n) from a polished layer on a selected one of the wafers of the n-th wafer lot; calculating a predicted removal rate RRb(n) of a layer on a blanket wafer from the amount removed &Dgr;ToxP(n); and determining a CMP time &Dgr;t(n+1) for wafers on an n+1-th wafer lot using the equation &Dgr;t(n+1)={&Dgr;ToxT(n+1)+A}/RRb(n) where â€œAâ€  is a constant and &Dgr;ToxT(n+1) is a target amount of a layer to be removed from each of the wafers of the n+1-th wafer lot.