Patent ID: 8320148
Filing Date: 2012-11-27
Classification: G11C

Abstract:
1. A binary content addressable memory (BCAM) cell, comprising: a) a first programmable metallization cell (PMC) coupled to a first access transistor and a bit node, the first PMC being coupled to the first access transistor at a first node having no other transistors connected thereto, wherein the first access transistor is coupled to a true bit line; b) a second PMC coupled to a second access transistor and the bit node, the second PMC being coupled to the second access transistor at a second node having no other transistors connected thereto, wherein the second access transistor is coupled to a complement bit line, the first and second access transistors being controlled by a word line; c) a program enable transistor coupled to the bit node, and being configured to couple a program control voltage to the bit node when enabled; and d) a match indication transistor configured to discharge a match line in response to states of the true and complement bit lines relative to resistances of the first and second PMCs.