Patent ID: 6372562
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A method of producing a semiconductor device for forming a transistor on a substrate having a first semiconductor layer, an insulating layer formed on the first semiconductor layer, and a second semiconductor layer formed on the insulating layer, said method comprising the steps of:forming an element isolation region connected to the insulating layer at a bottom of the element isolation region and connected at least at a part to the second semiconductor layer; forming an opening through the element isolation region and through the insulating layer to the first semiconductor layer; forming a gate electrode having a gate insulating layer and a conductor on the second semiconductor layer; introducing an impurity in the second semiconductor layer and in the opening to form source/drain regions in the second semiconductor layer and to form a high concentration impurity diffusion region at the bottom of the opening in the first semiconductor layer; forming an interlayer insulating layer at least on the element isolation region and on the transistor forming region; and forming contact holes connected to the source/drain regions, the gate electrode, and the high concentration impurity diffusion region in the interlayer insulating layer.