Patent ID: 7238599
Filing Date: 2007-07-03
Classification: G11C,H01L

Abstract:
1. A method for programming a split-channel transistor having a pair of pillars forming a trench, each pillar having a pillar source/drain region formed at the top of the pillar and the trench having a floating diffusion region that has no electrical contact, nitride charge storage regions formed only along facing sides of the trench and a control gate overlying the nitride charge storage regions and the pair of pillars, the method comprising: grounding a first pillar source/drain region; applying a gate voltage to the control gate; and applying a drain voltage to a second pillar source/drain region such that a channel segment forms along each facing side of the trench between the first and second pillar source/drain regions wherein the floating diffusion region couples the channel segments into one channel.