Patent ID: 6376389
Filing Date: 2002-04-23
Classification: H01L

Abstract:
A method of manufacturing a semiconductor comprising the steps of:providing a semiconductor substrate; forming a plurality of semiconductor devices on and in the semiconductor substrate; depositing an etch stop layer over the plurality of semiconductor devices; depositing a low dielectric layer over the etch stop layer; planarizing the low dielectric layer to form a planar surface; depositing a layer of photoresist over the low dielectric layer; processing the photoresist to provide patterned openings therein for forming connections for the semiconductor device; etching the pattern from the photoresist through the low dielectric layer to the etch stop layer; etching the etch stop layer in the pattern created by the patterned photoresist and low dielectric layer; filling the openings formed by etching with a conductive material, thus forming local interconnects for the semiconductor device, and removing the excess photoresist.