Patent ID: 7533246
Filing Date: 2009-05-12
Classification: G06F

Abstract:
1. A method of automatically configuring an architecture of a target microprocessor of a first type, comprising the steps of: (a) a processor generation tool taking, as an input, executable code for an existing microprocessor of a second type differing from said first type; (b) the said executable code implementing a software application requiring enhanced performance over that attainable by direct execution by a microprocessor of the second type; (c) the processor generation tool adapting an instruction set of the microprocessor of the first type at design time, such that the microprocessor of the first type is optimized for the execution of the software application implemented by the said executable code (d) the processor generation tool outputting a hardware description of a microprocessor of the first type that implements the adapted instruction set which differs from that of the second type; (e) a code generation tool outputting executable code implementing the software application for the first type of microprocessor by using executable code implementing the software application for the microprocessor of the second type as input and translating that code output from the code generation tool so that identical program behavior is provided but with enhanced performance enabled by use of the adapted instruction set of the first type; wherein at run time (f) the microprocessor of the first type with its adapted instruction set being used as a coprocessor in a system for the microprocessor of the second type; (g) a number of individual software functions in the executable code that implements the software application and that has been output from the code generation tool being marked for translation and execution on said coprocessor; (h) the said executable code marked for translation and execution on the coprocessor being modified by a tool so that function calls to those functions marked for translation cause an equivalent translated function to be executed on said coprocessor; and (i) the modified executable code being executed on the microprocessor of the second type.