Patent ID: 7483306
Filing Date: 2009-01-27
Classification: G11C,H03F

Abstract:
1. A sensing circuit for a target memory cell, the target cell drawing a target cell current from a first node in response to selection of the target cell, the target cell current being dependent upon a charge level stored in the target cell, comprising: a reference cell drawing a reference cell current from a second node in response to selection of the reference cell; a current difference generator generating a third current flow into a third node, and generating a fourth current flow into a fourth node; and a sense amplifier having a first input connected to the third node and a second input connected to the fourth node, wherein the current difference generator comprises: a first current mirror having an input and first and second outputs, the input being connected to the first node and the first output being connected to the third node; a second current mirror having an input and a first and second outputs, the input of the second current mirror being connected to the second node and the first output of the second current mirror being connected to the fourth node; a third current mirror having an input connected to the second output of the first current mirror and an output connected to the fourth node; and a fourth current mirror having an input connected to the second output of the second current mirror and an output connected to the third node.