Patent ID: 8178919
Filing Date: 2012-05-15
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a stacked structural unit including a plurality of electrode films alternately stacked in a first direction with a plurality of inter-electrode insulating films; a first semiconductor pillar piercing the stacked structural unit in the first direction; a second semiconductor pillar adjacent to the first semiconductor pillar in a second direction perpendicular to the first direction, the second semiconductor pillar piercing the stacked structural unit in the first direction; a connection portion semiconductor layer aligned in the second direction to electrically connect the first semiconductor pillar and the second semiconductor pillar on a same side in the first direction; a connection portion conductive layer provided to oppose the connection portion semiconductor layer; a memory layer provided between the first semiconductor pillar and each of the electrode films, between the second semiconductor pillar and each of the electrode films, and between the connection portion conductive layer and the connection portion semiconductor layer; an inner insulating film provided between the memory layer and the first semiconductor pillar, between the memory layer and the second semiconductor pillar, and between the memory layer and the connection portion semiconductor layer; an outer insulating film provided between the memory layer and each of the electrode films; and a connection portion outer insulating film provided between the memory layer and the connection portion conductive layer, the connection portion outer insulating film having a film thickness thicker than a film thickness of the outer insulating film.