Patent ID: 8127069
Filing Date: 2012-02-28
Classification: G11C

Abstract:
1. A memory device including self-ID information, the memory device comprising: a plurality of banks, wherein each bank includes a predecoder configured to receive and decode an address signal; an information storage unit for storing information related to the memory device in such a manner that the information storage unit outputs the information related to the memory device by receiving an output signal of the predecoder, wherein the information storage unit includes a fuse unit for substantially storing the information; an input/output line driver configured to receive the information outputted from the information storage unit; a pipe latch configured to receive an output signal of the input/output line driver; a data output driver configured to receive an output signal of the pipe latch; a data pad configured to receive an output signal of the data output driver; and a data output control unit configured to output a controlling signal controlling operations of the data output driver, wherein the pine latch is configured to output the output signal of the input/output line driver after receiving the controlling signal, in that order.