Patent ID: 6828615
Filing Date: 2004-12-07
Classification: H01L

Abstract:
A vertical internally connected trench cell device for microelectronic devices, said device comprising:(a) a semiconductor substrate having a deep trench formed therein; (b) a capacitor formed in said trench, said capacitor having a buried plate; (c) a vertical transistor formed in said trench and comprising: (i) a gate conductor stack formed in said trench, and (ii) first and second source/drain regions located in a sidewall of said deep trench, said first and second source/drain regions being separated from one another by said substrate; (d) a strap totally contained within said deep trench without any direct contact with said substrate, said strap electrically connecting said capacitor and said vertical transistor with one another; (e) a surface strap formed in said substrate so as to be in contact with one of said first and second source/drain regions; (f) a bit line pad formed on said semiconductor substrate outside said deep trench so as to be in contact with said surface strap; and a wordline pad formed on and in contact with said gate conductor stack.