Patent ID: 6111555
Filing Date: 2000-08-29
Classification: G09G

Abstract:
A plasma display panel including a pair of substrates positioned to define a gap region therebetween, and electrodes disposed in the gap region to form display lines composed of pixels, the electrodes including a group of electrodes, the plasma display panel further comprising:a register capable of storing display bits, each bit representing a next state for a corresponding electrode;latch connected to the register and having outputs, each output representing a current state for a corresponding electrode;logic circuits corresponding to the electrodes, each logic circuit generating a plurality of control signals based on the next state and the current state of the corresponding electrode, the plurality of control signals including a change up control signal, a change down control signal, a hold up control signal, and a hold down control signal; anddriver circuitry including a change up driver, a change down driver, a hold up voltage source, and a hold down voltage source, each electrode being selectively connectable to the driver circuitry by the corresponding logic circuit control signals,wherein each logic circuit is configured such that upon an activation signal, the logic circuit asserts the change up control signal to connect the change up driver to electrodes having a low current state and a high next state, asserts the change down control signal to connect the change down driver to electrodes having a high current state and a low next state, asserts the hold up control signal to connect the hold up voltage source to electrodes having a high current state and a high next state, and asserts the hold down control signal to connect the hold down voltage source to electrodes having a low current state and a low next state.