Patent ID: 6673665
Filing Date: 2004-01-06
Classification: H01L

Abstract:
A method, comprising:forming a conductive silicon-containing feature, said feature having sidewalls and an upper surface; forming spacer elements adjacent to a portion of said sidewalls, said spacer elements covering less than all of said sidewalls and defining an exposed portion of said sidewalls by depositing a layer of a dielectric material on the upper surface and upper and lower sidewall portions of the conductive silicon-containing feature, with the layer of dielectric material being thicker at the lower sidewall portions of the conductive silicon-containing feature than on the upper surface portion of the conductive silicon-containing feature and isotropically etching the dielectric material by performing a single isotropic etching process until the upper sidewall portion is exposed; forming a metal layer on at least the upper surface and exposed portion of the sidewalls; and forming a metal silicide on said upper surface and said exposed portion of said sidewalls by performing at least one thermal treatment.