Patent ID: 8014969
Filing Date: 2011-09-06
Classification: G01R,G11C

Abstract:
1. A test apparatus for testing a plurality of devices under test, comprising: a signal input section that applies a test signal to the devices under test so as to cause the devices under test to concurrently output response signals that are the same as each other; a combining section that generates a single combination signal by using the response signals output from the devices under test; a judging section that judges whether the devices under test operate normally with reference to the combination signal; and a calibration section that measures, prior to the test of the devices under test, a level of the combination signal which is generated when causing one or more of the devices under test and the one or more remaining devices under test to output response signals such that the response signals output by the one or more devices under test have logic values different from those output by the one or more remaining devices under test, and designates the threshold value in accordance with the measured level of the combination signal, wherein the combining section generates a signal by combining the response signals in an analog manner, as the combination signal, and the judging section judges whether the devices under test operate normally by determining whether a signal level of the combination signal is higher than a predetermined threshold value at a predetermined timing.