Patent ID: 9214483
Filing Date: 2015-12-15
Classification: G02F,H01L

Abstract:
1. A manufacturing method of a thin-film-transistor array substrate, comprising steps of: forming a scan-signal line and a compensation electrode on a substrate, wherein the scan-signal line has a first side, a second side opposite to the first side and an opening, and the opening extends to the first side; the compensation electrode extends from the second side of the scan-signal line, and an area of the compensation electrode is equal to an area of the opening; forming a first isolation layer on the scan-signal line; forming a semiconductor layer on the first isolation layer, wherein the semiconductor layer is disposed in a position corresponding to the opening; and forming a data-signal line, a drain electrode and a source electrode so that a thin-film transistor is formed with a gate electrode, the semiconductor layer, the drain electrode and the source electrode, and a distance between the compensation electrode and the data-signal line is more than 3.5 micrometers, wherein the gate electrode is a portion of the scan-signal line having the opening; the data-signal line and the scan-signal line are isolatedly crossed with each other; the drain electrode is disposed on the semiconductor layer and corresponds to the opening of the scan-signal line; the source electrode extends from a side of the data-signal line, is disposed on the semiconductor layer and surrounds the drain electrode and the opening of the gate electrode along an edge of the semiconductor layer.