Patent ID: 6879042
Filing Date: 2005-04-12
Classification: H01L

Abstract:
1. A semiconductor interconnect structure comprising: a substrate; a first insulating film directly on said substrate; a first interconnect through said first insulating film and directly contacting said substrate, said first interconnect comprising a trench having a metal barrier layer on walls and a bottom of said trench and a copper layer within said trench; a first diffusion barrier film directly on said first insulating film, said first diffusion barrier film suppressing aggregation of copper and preventing diffusion of copper; a second diffusion barrier film directly on said first diffusion barrier film, said second diffusion barrier film being an etch stop layer; a second insulating film directly on said second diffusion barrier film; and a second interconnect through said first and second diffusion barrier films and said second insulating film, said second interconnect comprising a trench having a metal barrier layer on walls and a bottom of said trench and a copper layer within said trench.