Patent ID: 8607131
Filing Date: 2013-12-10
Classification: H03M,H04L

Abstract:
1. A decoder comprising: a log likelihood ratio calculation section that calculates first log likelihood ratio sequence using second coded sequence formed by removing bits in first coded sequence s, an insertion section that generates second log likelihood ratio sequence in which a predetermined log likelihood ratio is inserted to the first log likelihood ratio sequence based on the y-th puncturing pattern; and a BP decoding section that decodes the second log likelihood ratio sequence based on the parity check matrix H and outputs the first information bit sequence u: where H is a parity check matrix of an low density parity check code of (z×m b ) rows and (z×n b ) columns configured by arranging submatrixes of z rows and z columns in m b rows and n b columns, G is a generator matrix holding a relationship of equation 1-1 with the parity check matrix H of the low density parity check code and the first coded sequence s is a coded sequence made up of z×n b bits.