Patent ID: 6909662
Filing Date: 2005-06-21
Classification: G11C

Abstract:
1. A data read circuit in a semiconductor device, comprising: selection means for selectively reading output data from a plurality of circuit blocks to shared data lines; precharging means for precharging said shared data lines; determination means for determining whether said output data that have been read are to be supplied as output to the outside in accordance with a determination start signal that is synchronized with a selection signal for said selection means; and discharging means for being controlled by the determination result of said determination means, and being inserted in a cascade connection in data lines that are shared with a succeeding circuit block; whereby a control operation that if, based on the determination result, the output data that are to be transferred are at a low level, said discharging means is placed in a conductive state to discharging the shared data lines for the succeeding circuit block, and if the data that are to be transferred are at a high level, the shared data lines for the succeeding circuit block is precharged with said precharging means, is successively executed, as far as the lowest-order circuit block, to thereby supply data of a logic level that corresponds to said output data as output.