Patent ID: 7551116
Filing Date: 2009-06-23
Classification: H03K

Abstract:
1. A semiconductor integrated circuit comprising: a first differential amplifier circuit having a first input terminal receiving a first input voltage, a second input terminal receiving a second input voltage, a first output terminal and a second output terminal; a first capacitor having a first terminal coupled to the first output terminal of said first differential amplifier circuit and a second terminal; a second capacitor having a first terminal coupled to the second output terminal of said first differential amplifier circuit and a second terminal; a first switch having a first terminal coupled to the second terminal of said first capacitor and a second terminal receiving a predetermined voltage, and selecting connection and disconnection of said first and second terminals of said first switch; a second switch having a first terminal coupled to the second terminal of said second capacitor and a second terminal receiving a predetermined voltage, and selecting connection and disconnection of said first and second terminals of said second switch; a third capacitor having a first terminal coupled to the second terminal of said first capacitor and a second terminal coupled to the second terminal of said second capacitor; and a latch circuit comparing a voltage received from the first output terminal of said first differential amplifier circuit through said first capacitor and a voltage received from the second output terminal of said first differential amplifier circuit through said second capacitor and providing a digital signal representing a result of a comparison between said first and second input voltages.