Patent ID: 9136832
Filing Date: 2015-09-15
Classification: H03K

Abstract:
1. A level shift circuit comprising: a first pair of transistors of a first conductive type, sources of the first pair of transistors being coupled to a pair of input nodes and gates of the first pair of transistors being coupled to a first power supply in common; a second pair of transistors of a second conductive type, drains of the second pair of transistors being coupled to drains of the first pair of transistors and gates of the second pair of transistors being coupled to the first power supply in common; a third pair of transistors of the second conductive type, drains of the third pair of transistors being coupled to sources of the second pair of transistors, and gates and drains of the third pair of transistors being cross-coupled to each other while sources of the third pair of transistors are coupled to a second power supply in common; a pair of capacitive elements, one ends of the capacitive elements being coupled to the pair of input nodes while other ends of the capacitive elements are coupled to the drains of the third pair of transistors; and a first transistor of the second conductive type, a gate of the first transistor being coupled to a drain of one of the first pair of transistors and a source of the first transistor being coupled to a source of one of the second pair of transistors while a drain of the first transistor is coupled to the first power supply.