Patent ID: 6316300
Filing Date: 2001-11-13
Classification: H01L

Abstract:
A method of manufacturing a vertical type power MOSFET comprising:forming a mask having an opening at a predetermined area on a surface of a semiconductor substrate;forming a thin oxide film on the semiconductor substrate by oxidizing the semiconductor substrate through the opening of the mask by a wet thermal oxidation at a first oxidation temperature;growing the thin oxide film to a thick oxide film thicker than the thin oxide film by further oxidizing the semiconductor substrate through the opening of the mask by a wet thermal oxidation at a second oxidation temperature higher than the first oxidation temperature;implanting impurities through the thick oxide film to form a source region in the semiconductor substrate and a channel region at the semiconductor substrate where the thick oxide film is formed;forming a groove portion to expose the channel region by etching the thick oxide film; andforming a gate electrode, a source electrode and a drain electrode.