Patent ID: 6601194
Filing Date: 2003-07-29
Classification: G11C

Abstract:
An integrated semiconductor memory, comprising:memory cells, some of said memory cells combinable to form individually addressable normal units, and others of said memory cells combinable to form individually addressable redundant units for replacement of said normal units; a selection circuit connected to said memory cells for selecting one of said redundant units and having an input; a non-volatile first memory unit for storing an address of one of said normal units to be replaced and having an output connected to said input of said selection circuit for transmission of the address stored in said first memory unit to said selection circuit, said first memory being programmable by an energy beam for programming the address; and a non-volatile second memory unit for storing a further address of a normal unit to be replaced and having an output connected to said input of said selection circuit for transmission of the further address stored in said second memory unit to said selection circuit, said second memory unit programmable by electrical contact for programming the further address.