Patent ID: 6171940
Filing Date: 2001-01-09
Classification: H01L,Y10S

Abstract:
A method for fabricating semiconductor devices comprising:providing a semiconductor device;forming a gate oxide layer and a polysilicon layer over said semiconductor substrate one after another;coating a dielectric layer over said polysilicon layer;forming an anti-reflection layer over said dielectric layer;forming a photoresist layer over said anti-reflection layer for defining the location of a gate electrode;using said photoresist layer as a mask for etching said anti-reflection layer and carrying out a photoresist shrink process, where a substantial portion of said dielectric layer is also etched;using said photoresist layer as a mask for etching said dielectric layer, in accompanying with that, said photoresist layer and said anti-reflection layer are also etched partially;using said photoresist layer as a mask for etching said polysilicon layer till a surface of said gate oxide layer is exposed, in accompanying with that, said photoresist layer and said anti-reflection layer are removed; andremoving said dielectric layer that is on top of said polysilicon layer.