Patent ID: 6442093
Filing Date: 2002-08-27
Classification: G11C

Abstract:
In a core memory of a memory device comprising a plurality of core cells electronically coupled with a plurality of cascodes, a method for reading memory data, comprising:accessing a set of consecutively addressed cells in said plurality of core cells via said plurality of cascodes; sensing an output of a subset of said plurality of cascodes; reading said output of said subset of said plurality of cascodes; and looking ahead in each of said cascodes such that, subsequent to said sensing of an output of said subset of said plurality of cascodes and reading of said output of said subset of said plurality of cascodes, data from a core cell of said set of core cells, having a higher address and communicatively coupled with the selected cascode is established as a valid output from said selected cascode prior to said corresponding sampler next sensing said output of said selected cascode.