Patent ID: 6807077
Filing Date: 2004-10-19
Classification: G11C

Abstract:
A semiconductor memory device for determining match between received search data with stored data, comprising:at least one memory cell circuit each for storing one bit of said stored data, said memory cell circuit including; a first twin cell including a first transistor, a first capacitive element for storing data received via said first transistor at a first storage node, a second transistor driven to a selected state concurrently with said first transistor, and a second capacitive element for storing data supplied via said second transistor at a second storage node, complementary data being stored at the first and second storage nodes, a second twin cell, provided separately from said first twin cell, including a third transistor, a third capacitive element for storing data supplied via said third transistor at a third storage node, a fourth transistor driven to a selected state concurrently with said third transistor, and a fourth capacitive element for storing data supplied via said fourth transistor at a fourth storage node, complementary data being stored at the third and fourth storage nodes, and a comparing circuit for comparing a pair of data stored in one of the first and second storage nodes and data stored in one of the third and fourth storage nodes with applied complementary search data, and selectively driving a match line in accordance with a result of comparison.