Patent ID: 6696852
Filing Date: 2004-02-24
Classification: H04L

Abstract:
A low-voltage differential I/O apparatus, comprising:means for providing a resistance between a first end and a second end, the first end and the second end being directly connected to first and second transmission lines, respectively; means for providing a first voltage to a first node, the means including a fixed second resistor in series between a first voltage source and the first node; means for providing a second voltage to a second node, the means including a fixed third resistor in series between a second voltage source and the second node; and means for selectively coupling the first end to either one of the first and second nodes and the second end to the other of the first and second nodes in accordance with a logic state desired to be signaled on the first and second transmission lines, wherein during signaling of a first logic state, a first polarity of a differential voltage is established between the first and second ends of the resistance by firstly selectively coupling the first end to the first node and the second end to the second node with a minimal resistance between the firstly coupled nodes and ends, the minimal resistance being less than 10% of the resistance, and wherein during signaling of a second logic state, a second opposite polarity of the differential voltage is established between the first and second ends of the resistance by secondly selectively coupling the first end to the second node and the second end to the first node with the minimal resistance between the secondly coupled nodes and ends, such that the magnitude of the differential voltage is substantially the absolute difference between the first voltage and the second voltage provided to the first and second nodes, respectively, during signaling of both the first and second logic states.