Patent ID: 6165897
Filing Date: 2000-12-26
Classification: H01L

Abstract:
A method for forming a dielectric layer within a microelectronics fabrication comprising:providing a microelectronics substrate layer employed within a microelectronics fabrication;forming upon the microelectronics substrate layer a patterned microelectronics layer;forming conformally over the patterned microelectronics layer a conformal silicon oxide dielectric layer formed employing a plasma enhanced chemical vapor deposition (PECVD) method employing silane as a silicon source material, the conformal silicon oxide dielectric layer comprising:a first region of the conformal silicon oxide dielectric layer formed over the upper surfaces of the patterned microelectronics layer;a second region of the conformal silicon oxide dielectric layer formed interposed between a series of patterns which comprises the patterned microelectronics layer and parallel with a series of sidewalls of the series of patterns which comprises the patterned microelectronics layer; anda third region of the conformal silicon oxide dielectric layer formed interposed between the series of patterns which comprises the patterned microelectronics layer but not parallel with the series of sidewalls of the series of patterns which comprises the patterned microelectronics layer;treating with an oxygen containing plasma the conformal silicon oxide dielectric layer to form an oxygen containing plasma treated conformal silicon oxide dielectric layer, the oxygen containing plasma treated conformal silicon oxide dielectric layer having an enhanced rate of formation of a second silicon oxide dielectric layer upon the first region of the oxygen containing plasma treated conformal silicon oxide dielectric layer with respect to at least the second region of the oxygen containing plasma treated conformal silicon oxide dielectric layer, the second silicon oxide dielectric layer being formed employing an ozone assisted thermal chemical vapor deposition (CVD) method employing tetraethylorthosilicate (TEOS) as a silicon source material; andforming upon the oxygen containing plasma treated conformal silicon oxide dielectric layer the second silicon oxide dielectric layer, where the second silicon oxide dielectric layer defines at least in part a series of voids formed interposed between the series of patterns which comprises the patterned microelectronics layer.