Patent ID: 6013534
Filing Date: 2000-01-11
Classification: H01L

Abstract:
A method of thinning integrated circuits in die form, comprising the steps of:a) acquiring a handle wafer;b) depositing an etch stop material on the handle wafer;c) coating an adhesive layer onto the etch stop material;d) acquiring a template wafer;e) cutting at least one opening through the template wafer, where the opening is large enough to accommodate at least one die;f) placing the at least one die circuit-side down onto the adhesive layer of the handle wafer in an area that constitutes an intersection between the handle wafer and the at least one opening in the template wafer;g) bonding the template wafer onto the handle wafer so that the at least one die is contained within the at least one opening of the template wafer;h) filling at least partially with adhesive material any gaps created by the at least one die and the template wafer;i) thinning the result of step (h) from the non-circuit side of the at least one die to a die thinness in the range of from five microns to one-hundred microns;j) acquiring a transfer wafer;k) coating an adhesive layer onto the transfer wafer;l) bonding the result of step (i) to the result of step (k) so that the non-circuit side of the thinned at least one die is attached to the adhesive layer of the transfer wafer;m) removing the handle wafer from the result of step (l) down to the etch stop material contained thereon;n) removing the etch stop material from the result of step (m);o) removing any adhesive material remaining on the circuit-side of the thinned at least one die after step (n);p) testing electrically the thinned at least one die to determine which are functional after step (i);q) recording which of the thinned at least one die are functional after step (p);r) dicing the transfer wafer into at least one portion containing at least one thinned die; ands) holding the at least one portion containing at least one thinned die.