Patent ID: 6766503
Filing Date: 2004-07-20
Classification: G06F,H01L

Abstract:
A method of circuit design for a multi-layer circuit, comprising:defining one circuit block of a plurality of circuit blocks in the multi-layer circuit, the one circuit block having a port for connecting a portion of the circuit block to inter-block routing; determining routing layers in the plurality of circuit blocks that are connected to the port of the one circuit block; selecting a bridging layer that is a conducting layer of the multi-layer circuit such that the bridging layer is farther from a substrate of the multi-layer circuit than any routing layer connected to the port of the one circuit block; connecting the port to the bridging layer using a first interlayer connection; connecting the bridging layer to the inter-block routing using a second interlayer connection; and isolating a portion of the conducting layer from the rest of the bridging layer, the isolated portion defined between the first interlayer connection and the second interlayer connection.