Patent ID: 9209315
Filing Date: 2015-12-08
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a semiconductor substrate; an element isolation insulating film buried in the semiconductor substrate so as to isolate adjacent element; a memory cell having a layered structure in which a first insulating film and a charge accumulation film are sequentially layered on the semiconductor substrate; a second insulating film formed on the charge accumulation film and the element isolation insulating film; and a control electrode film formed on the second insulating film, wherein an upper surface of the element isolation insulating film is lower than an upper surface of the charge accumulation film; and the second insulating film includes a cell upper portion and an inter-cell portion, the cell upper portion being above the charge accumulation film, the inter-cell portion being above the element isolation insulating film, in which a dielectric constant of the cell upper portion is lower than a dielectric constant of the inter-cell portion.