Patent ID: 6614841
Filing Date: 2003-09-02
Classification: G11B,H03M

Abstract:
A signal processing apparatus, comprising:sampling means for subjecting an incoming signal to sampling with a given clock signal; equalization means for subjecting the signal sampled by said sampling means to product-sum operation according to a plurality of tap coefficients; adaptive control means for setting, on the basis of an output signal from said equalization means, a plurality of tap coefficients of said equalization means according to a given algorithm; phase error detection means for detecting a phase error from the output signal from said equalization means; tap barycenter detection means for detecting, according to the plurality of tap coefficients set by said adaptive control means, a barycenter of the tap coefficients; phase shift means for correcting an output from said phase error detection means according to an output from said tap barycenter detection means; and oscillation means for oscillating in a frequency based on an output signal from said phase shift means, and generating said given clock signal for output to said sampling means.