Patent ID: 6788654
Filing Date: 2004-09-07
Classification: H04H,H04L,H04N

Abstract:
A digital data receiving apparatus for receiving a plurality of digital data signals transmitted by a time division multiplex mode in accordance with different transmission schemes comprising:a demodulation circuit for demodulating a time division multiplex signal including a plurality of digital data signals which are transmitted in accordance with different transmission schemes; a detection circuit for detecting whether or not each of said plurality of digital data signals in the time division multiplexed signal demodulated by said demodulation circuit is received correctly and generating an error signal when a digital data signal transmitted by any one of the different transmission schemes is not received correctly; and a replacement circuit for responding to said error signal to replace said digital data signal which has been detected to be received not correctly by a signal which does not affect a correct reception of digital data signals transmitted by one or more remaining transmission schemes to form a corrected time division multiplexed signal, wherein: said detection circuit comprises a bit error rate detecting circuit for detecting a bit error rate of each of said plurality of digital data signals in the received time division multiplexed signal, and a comparator for comparing said bit error rate with a predetermined threshold value to generate said error signal when said bit error rate exceeds said threshold value.