Patent ID: 7026206
Filing Date: 2006-04-11
Classification: H01L

Abstract:
1. A method of making a semiconductor device, comprising the steps of: first forming a field insulating film for separating elements and an active region surrounded by the field insulating film on a semiconductor substrate; second forming a gate oxide film over a surface of the active region; third forming an insulative first polysilicon film over an entire surface of the semiconductor substrate; fourth forming a resistive-element-aimed insulating film over the insulative first polysilicon film; patterning the resistive-element-aimed insulating film so that the resistive-element-aimed insulating film remains in a region related to a middle portion of a resistive element formed over the field insulating film; fifth forming a second polysilicon film at a position adjacent to the insulating first polysilicon film formed underneath the resistive-element-aimed insulating film by introducing an impurity to provide a conductivity to the insulating first polysilicon film using the resistive-element-aimed insulating film as a mask; sixth forming a third polysilicon film determining a resistance value over an entire surface of the semiconductor substrate; patterning the third polysilicon film, the resistive-element-aimed insulating film, the second polysilicon film, and the insulating first polysilicon film to form a resistive element on the field insulating film, said resistive element including the insulating first polysilicon film, the second polysilicon film adjacent to each side edge of the insulating first polysilicon film, the resistive-element-aimed insulating film, and the third polysilicon film, and to form a gate electrode of a field effect semiconductor transistor at the active region, including the second polysilicon film and the third polysilicon film; seventh forming an inter-layer insulating film over an entire surface of the semiconductor substrate; and eighth forming a contact hole in the inter-layer insulating film in a region in which the second polysilicon film adjacent to each side of the resistive element is overlaid by the third polysilicon film.