Patent ID: 8364854
Filing Date: 2013-01-29
Classification: G06F

Abstract:
1. A computer program product for performing an input/output (I/O) processing operation at a host computer system configured for communication with a control unit, the computer program product comprising: a non-transitory tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: obtaining information relating to an I/O operation at a channel subsystem in the host computer system, the channel subsystem including at least one channel having a channel processor and a local channel memory; generating an address control structure for each of a plurality of consecutive data transfer requests specified by the I/O operation and forwarding each address control structure from the at least one channel to a network interface between the channel subsystem and at least one I/O device, each address control structure specifying a location in the local channel memory of a corresponding address control word (ACW), each address control structure including an Offset field indicating a relative order of a corresponding data transfer request relative to other data transfers in the plurality of consecutive data transfer requests; generating at least one ACW specifying one or more host memory locations for the plurality of consecutive data transfer requests, and storing the at least one ACW in the local channel memory, the at least one ACW including an Expected Offset field indicating a relative order of an expected data transfer request; forwarding an I/O command message to the at least one I/O device via the network interface; responsive to the I/O command message, receiving a data transfer request from the network interface that includes the addressing information specified by a corresponding address control structure; comparing, by a data router in the channel, the Offset field and the Expected Offset field to determine whether the data transfer request has been received in the correct order; and responsive to determining that the data transfer request has been received in the correct order, accessing the at least one ACW by the data router and routing the data transfer request to the host memory location specified in the at least one ACW.