Patent ID: 7476412
Filing Date: 2009-01-13
Classification: C23C,H05K

Abstract:
1. A process for metallizing at least one insulating layer of an electronic or microelectronic component, which comprises: applying at least one first insulating layer to a substrate such that the first insulating layer has a thickness not greater than 50 μm; activating the entire first insulating layer by treatment with an activator, the activator being at least one of a gas, a liquid, a solution, and a plasma; then, after activating the entire first insulating layer, applying to the first insulating layer a second insulating layer made of a photosensitive material, and patterning the second insulating layer made of a photosensitive material; and then, after applying and patterning the second insulating layer, seeding and metallizing regions of the first insulating layer that are exposed by the patterning step.