Patent ID: 6191483
Filing Date: 2001-02-20
Classification: H01L

Abstract:
A thin chip-scale integrated-chip package, comprising:a semiconductor die having a top surface and a bottom surface, wherein the bottom surface has a number of solder ball-mounting pads formed thereupon;a composite chip-scale substrate to which is mounted the semiconductor die, the composite chip-scale substrate including:a thin aluminum oxide layer having a top surface and a bottom surface, wherein the aluminum oxide layer has a thickness approximately 0.2 mm,wherein a number of solder-bump connection pads are formed on the top surface of the aluminum oxide, wherein a number of solder-ball connection pads are formed on the bottom surface of the thin aluminum oxide layer, wherein a number of conductors are deposited on the top surface and on the bottom surface of the thin aluminum oxide layer and connected to respective solder-bump connection pads and solder-ball connection pads;a first thin organic film deposited on the top surface of the aluminum oxide layer except for the solder-bump connection pads; anda second thin organic film deposited on the bottom surface of the aluminum oxide layer except for the solder-ball connection pads;wherein the first and second relatively thin organic films have a thickness in the range of 0.025-0.075 mm;a number of solder bumps adapted for connecting the solder-bump connection pads on the bottom surface of the semiconductor die to the solder-bump mounting pads on the top surface of the aluminum oxide layer; anda number of solder balls adapted for connecting the solder ball-mounting pads on the bottom surface of the ceramic layer to corresponding solder-ball mounting pads on a mounting surface of a printed circuit board.