Patent ID: 8438203
Filing Date: 2013-05-07
Classification: G01S

Abstract:
1. A system for processing and displaying data, comprising one or more processors and a display device coupled to the one or more processors, where one or more of the processors are programmed to: process time-time data from a time series of data to obtain an in-phase sum of said time-time data, the time-time data comprising multiple data traces with each of said multiple data traces corresponding to a different time segment of the time series than each other of said multiple data traces, and the in-phase sum of said time-time data being obtained by adding said time-time data in phase across said multiple data traces in a straight line; provide said in-phase sum of said time-time data as a display signal from the one or more processors to the display device for display; and graphically display said in-phase sum of said time-time data on the display device using said provided in-phase sum of time-time data; wherein one or more of the processors are further programmed to obtain said time-time data from reinforceable repetitive synchronous data; and wherein said reinforceable repetitive synchronous data comprises rectified average delta data.