Patent ID: 7391839
Filing Date: 2008-06-24
Classification: H03L

Abstract:
1. An apparatus comprising: a phase frequency detector configured to receive at a first input a reference signal and to generate a control signal at an output; a voltage controlled oscillator configured to receive at an input a signal based on the control signal and to generate at an output a signal defining an output frequency; a feedback path configured to connect the output of the voltage controlled oscillator to a second input of the phase frequency detector; a digital accumulator configured to generate the reference signal at a first output under the control of an accumulator reference clock signal; a summer having a first input connected to the output of the phase frequency detector and an output connected to the input of the voltage controlled oscillator; and a digital to analogue converter having an input connected to a second output of the digital accumulator, a second input of the summer being connected to an output of the digital to analogue converter, wherein the digital to analogue converter is clocked by a clock signal derived from dividing the accumulator reference clock signal.