Patent ID: 6544845
Filing Date: 2003-04-08
Classification: H01L

Abstract:
A method of fabricating an integrated circuit nonvolatile memory device comprising the steps of:forming an array of nonvolatile memory cells in a first portion of an integrated circuit substrate, the nonvolatile memory cells including a gate oxide film on the integrated circuit substrate and a floating gate on the gate oxide film, opposite the substrate, the floating gate having a central portion and an edge portion; forming a plurality of peripheral circuit devices in a second portion of the integrated circuit substrate, the peripheral circuit devices including a gate oxide film on the integrated circuit substrate and a peripheral circuit gate on the gate oxide film opposite the integrated circuit substrate; forming a peripheral circuit mask over the peripheral circuit devices; implanting ions into the first portion of the integrated circuit substrate, using the floating gate as a mask to prevent ion implantation thereunder, to form source and drain regions adjacent to the edge portion of the floating gate, and using the peripheral circuit mask to prevent ion implantation thereunder in the second portion of the integrated circuit substrate; and thermally oxidizing the integrated circuit substrate, the implanted ions in the source and drain regions producing a bird's beak in the gate oxide film adjacent the edge portion of the floating gate, to thereby separate the edge portion of the floating gate from the integrated circuit substrate by more than the central portion, while the prevention of ion implantation in the second portion of the integrated circuit substrate producing an oxide film, in the integrated circuit substrate that is adjacent to the peripheral circuit gate, that has a thickness that is less than the gate oxide film between the peripheral circuit gate and the integrated circuit substrate.