Patent ID: 6173434
Filing Date: 2001-01-09
Classification: G06F

Abstract:
A method for designing a programmable logic array, said programmable logic array comprising a plurality of programmable elements, said method comprising:A. creating an intermediate circuit module within a programmable logic array such that said intermediate circuit can be relocated within said programmable logic array, wherein said intermediate circuit module contains an application-specific instruction module containing a computational engine as control logic and wherein said intermediate circuit module is readable from a configuration library;B. finding an unused portion of said programmable logic array of sufficient size to hold said intermediate circuit module and, if said programmable logic array does not have available sufficient space as a control block, rearranging one or more preexisting circuit modules to provide a sufficiently sized space in said programmable logic array;C. producing a final circuit module by relocating said intermediate circuit module such that it can be placed in said unused portion; andD. configuring said programmable logic array by placing said final circuit module into said programmable logic array at said unused portion.