Patent ID: 6075725
Filing Date: 2000-06-13
Classification: G11C

Abstract:
In a multi-level memory device including a plurality of memory cells, each of which has a programmable threshold voltage such that the memory cell produces a current in response to a word line voltage applied thereto, an apparatus for generating word line voltages comprising:a plurality of memory cell referenced regulators connected to an output terminal that is configured to connect to the plurality of memory cells, a respective one of said memory cell referenced regulators including:a variable current mirror having a controlled current path and an output current path including said output terminal, said controlled current path having a controlled impedance therein that provides a variable impedance responsive to a control voltage applied thereto such that current produced at said output terminal is proportional to current in said controlled current path; anda control circuit connected between said output terminal and said controlled impedance and including a dummy memory cell having a predetermined threshold voltage, said control circuit operative to apply a control voltage to said controlled impedance to vary a current at said output terminal when an output voltage at said output terminal is greater than a sum of said predetermined threshold voltage of said dummy memory cell and a predetermined offset voltage.