Patent ID: 7378315
Filing Date: 2008-05-27
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising: preparing a substrate defined as a first region, a second region and a third region; forming a stack structure on the substrate; exposing the substrate of the first region by etching the stack structure and simultaneously forming a plurality of first floating gates on the second region; forming second inter-poly dielectric layers on sidewalls of the first floating gates and a sidewall of the stack structure remaining on the third region; forming a gate oxide layer on the substrate of the second region exposed in both sides of the first floating gates and on the substrate of the first region; forming a second polysilicon layer over the gate oxide layer, the first floating gates and the stack structure; forming a gate electrode on the substrate of the first region by etching the second polysilicon layer and the gate oxide layer and simultaneously forming control gates on both sidewalls of the second inter-poly dielectric layers existing on the substrate of the second region; and forming second floating gates and second control gates by etching the second polysilicon layer, the second inter-poly silicon layer, the stack structure on the substrate of the third region.