Patent ID: 7163887
Filing Date: 2007-01-16
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising: a process for forming a cap film, a first insulating film, an organic insulating film, a second insulating film and a mask film in order on a semiconductor substrate; a process for making a first opening of a wiring shaped pattern by etching part of the mask film; a process for making a second opening of a hole shaped pattern by etching part of the second insulating film which overlaps with the first opening; a process for making a third opening of the hole shaped pattern in the organic insulating film by etching the organic insulating film through the second opening in the second insulating film; a process for making a fourth opening of the wiring shaped pattern in the second insulating film by etching the second insulating film through the first opening in the mask film, and for making a fifth opening of the hole shaped pattern in the first insulating film by etching the first insulating film through the third opening in the organic insulating film; a process for making a sixth opening of the hole shaped pattern in the cap film by etching the cap film through the fifth opening in the first insulating film to use the sixth opening and the fifth opening as a via hole, and for removing the mask film; a process for making a seventh opening of the wiring shaped pattern in the organic insulating film by etching the organic insulating film through the fourth opening in the second insulating film to use the seventh opening and the fourth opening as a wiring trench; and a process for forming a via in the via hole and a wiring in the wiring trench by embedding a conductor in the via hole and the wiring trench at the same time.