Patent ID: 9111799
Filing Date: 2015-08-18
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate doped with a first conductive type dopant; a plurality of stacked structures arranged side by side on the substrate and extending in a first direction, each of the stacked structures including gate electrodes spaced apart from each other, the plurality of stacked structures including a pair of stacked structures spaced apart from each other at a first interval in a second direction perpendicular to the first direction; a plurality of semiconductor pillars penetrating the plurality of stacked structures to connect to the substrate; a pick-up region extending in the first direction in the substrate between the pair of stacked structures and doped with the first conductive type dopant, wherein the semiconductor pillars do not overlap the pick-up region; a pick-up contact pattern connected to the pick-up region and extending in the first direction between the pair of stacked structures, wherein the pair of stacked structures comprises first and second stacked structures, and wherein the plurality of stacked structures further comprise as third stacked structure adjacent to the second stacked structure and spaced apart from the second stacked structure at a second interval, in the second direction; and a source contact pattern disposed on the substrate between the second and third stacked structures.