Patent ID: 6170998
Filing Date: 2001-01-09
Classification: G06F

Abstract:
A processor which executes a machine language program including a plurality of subroutines, the processor comprising:a special register for storing one of the return address and a calculation result upon execution of a predetermined calculation instruction;an address hold unit for holding a fetch address in the machine language program;a call means, when calling one of the plurality of subroutines, for storing a call address indicated by a subroutine call instruction into the address hold unit, for storing an address of an instruction which follows the subroutine call instruction as the return address into a stack area, and also for storing the same return address into the special register; andreturn means for prioritizing a storing of the return address from the special register into the address hold unit over a storing of the return address from the stack area when a return is performed from one of said plurality of subroutines unless a calculation result has been overwritten into the special register whereby the return means stores the return address from the stack area into the address hold unit.