Patent ID: 6804732
Filing Date: 2004-10-12
Classification: G06F,Y02D

Abstract:
A port sampling circuit apparatus comprising a hardware arrangement for automatically performing sampling of data given to an input port of a microcomputer based on conditions instructed by a central processing unit and for storing the sampled data into a data register whose stored data is readable by said central processing unit,wherein said hardware arrangement of the port sampling circuit apparatus comprises: a sampling period setting register for setting a sampling period; a sampling timing signal output section for outputting a sampling timing signal periodically based on said sampling period being set by said sampling period setting register; a data latch section for latching the data given to said input port based on said sampling timing signal produced from said sampling timing signal output section, and for storing the latched data into said data register; and an output condition changing means for periodically changing a condition of an output port of said microcomputer in synchronism with said sampling timing signal, said output condition changing means comprises: a condition change period setting register for setting a period for changing the condition of said output port; a condition change timing signal output section for periodically outputting a condition change timing signal based on the condition chance period being set by said condition change period setting register; and a condition changing section for changing the condition of said output port based on the condition chance timing signal produced from said condition change timing signal output section.