Patent ID: 6288929
Filing Date: 2001-09-11
Classification: G11C

Abstract:
A ferromagnetic memory circuit having a plurality of memory cells, each of the memory cells comprising:a) a bit, made of a ferromagnetic material, having a remnant polarity and a height to width ratio of greater than 1:1;b) a write line, located proximate the bit, coupled to receive a current sufficient to create the remnant polarity of the bit;c) a magneto sensor including:1) a magneto resistor, in intimate contact with the bit, having a current flow direction responsive to the remnant polarity of the bit; and2) a pair of collectors, coupled to the magneto resistor, to collect current from the magneto resistor and create a voltage differential therebetween; andd) a control circuit, electrically coupled to the write line and the magneto sensor, to provide separate current during the write and read operations.