Patent ID: 6654899
Filing Date: 2003-11-25
Classification: G06F,H03L

Abstract:
A tracking bin split clock generator apparatus comprising:a clock generator to receive an externally generated board clock and to selectively generate a reference clock in phase with the externally generated board clock at a frequency equal to that of the externally generated board clock multiplied by M, wherein M is an integer equal to or greater than one; a phase locked loop to receive the reference clock output by the clock generator and to generate an output clock in phase with the reference clock and having a frequency which is an integral multiple of that of the reference clock; and a PLL (Phase Locked Loop) feedback divider to receive the output clock generated by the phase locked loop and to generate a feedback clock in phase with the output clock and at a frequency equal to that of the output clock divided by 2N, wherein 2N is an even integer equal to or greater than two.