Patent ID: 8691691
Filing Date: 2014-04-08
Classification: H01L

Abstract:
1. A method for building a through-substrate via (TSV) for interconnecting an integrated circuit chip, the method comprising the steps of: etching a TSV hole into a semiconductor substrate from one face of the semiconductor substrate, wherein the TSV hole has a depth less than an entire depth of the semiconductor substrate; depositing a first diffusion barrier layer on the semiconductor substrate at a periphery of the TSV hole; subsequently depositing an insulation layer on a surface of the first diffusion barrier layer; subsequently depositing a second diffusion barrier layer on a surface of the insulation layer; subsequently depositing a conductive material interior to the second diffusion barrier layer within the TSV hole; subsequently thinning the semiconductor substrate from an opposite face of the substrate to expose at least a portion of the TSV; depositing an etch resistant cap over the exposed portion of the TSV; etching the thinned face of the substrate further to cause the exposed portion of the TSV to protrude from the thinned face of the substrate; and removing the etch resistant cap.