Patent ID: 6706578
Filing Date: 2004-03-16
Classification: H01L

Abstract:
A method for manufacturing a floating gate of non-volatile memory, comprising the steps of:providing a silicon substrate including at least two trenches; forming an isolation oxide layer on said trenches and said isolation oxide layer protruding from said silicon substrate; forming a tunneling oxide layer on said silicon substrate and beside both sides of said isolation oxide layer; depositing a composite polysilicon layer on said tunneling oxide layer; polishing said composite polysilicon layer until said isolation oxide layer is exposed; etching said composite polysilicon layer so as to form a concave-convex rugged surface; annealing said composite polysilicon layer so as to form a first polysilicon layer; depositing a dielectric layer on said first polysilicon layer and said isolation oxide layer; and depositing a second polysilicon layer on said dielectric layer.