Patent ID: 6466059
Filing Date: 2002-10-15
Classification: G11C

Abstract:
A sense amplifier for comparing a reference current drawn from a reference bit line and a cell current drawn from a cell array bit line, said sense amplifier comprising:an amplifying stage having an input coupled to a reference node of the reference bit line and another input coupled to an array node of the cell array bit line; a mirroring circuit coupled between the reference node and the array node, the mirroring circuit mirroring the reference current from the reference bit line to the cell array bit line; a voltage setting circuit coupled to the reference bit line, the voltage setting circuit setting a predetermined voltage on the reference bit line; and current compensation circuits for a predetermined current that is generated outside of the sense amplifier, the current compensation circuits being provided between the voltage setting circuit for the reference bit line and the mirroring circuit, wherein a first transistor is coupled between the reference node and a power supply so as to operate as a load circuit for the reference bit line, the mirroring circuit includes a second transistor coupled between the array node and the power supply so as to operate as a load circuit for the cell array bit line, and the load circuit for the reference bit line mirrors the predetermined current that is generated outside of the sense amplifier.