Patent ID: 7672101
Filing Date: 2010-03-02
Classification: H01L

Abstract:
1. In a system having a driving device with a first supply voltage Vdd l and an output, and a driven device having a second supply voltage Vdd2 lower than the first supply voltage Vdd1, wherein the driven device has an input coupled to the output of the driving device, a protection circuit comprising: a first resistor coupled to the output of the driving device and a gate of an input NMOS transistor of the driven device; a gate grounded NMOS (GGNMOS) having a drain coupled between the first resistor and the input of the driven device, the GGNMOS having a source coupled to ground; a parasitic NPN bipolar junction transistor having a collector connected to the gate of the input NMOS transistor of the driven device and an emitter coupled to a lower-voltage supply rail Vss, the source of the GGNMOS forming the emitter of the parasitic NPN bipolar junction transistor, the drain of the GGNMOS forming the collector of the parasitic NPN bipolar junction transistor; and a second resistor connecting a base of the parasitic NPN bipolar junction transistor to Vss, the second resistor having a resistance sized for controlling a trigger voltage of the parasitic NPN bipolar junction transistor for protecting a gate oxide layer of the input NMOS transistor of the driven device from an electrostatic discharge.