Patent ID: 6060330
Filing Date: 2000-05-09
Classification: H01L,H05K

Abstract:
A method for customizing or repairing an integrated circuit in which first gaps within a patterned interconnect layer are electrically connected to form desired connection points, wherein said first gaps comprise at least a portion of second gaps within said patterned interconnect layer, said second gaps located at possible connection points of said patterned interconnect layer, said method comprising:providing a substrate in which circuit elements have been formed, said circuit elements having contact points provided at an upper surface of the substrate;forming said patterned interconnect layer over said upper surface of the substrate, said patterned interconnect layer having said second gaps within said interconnect layer to separate selected portions of said interconnect layer;depositing a first insulative layer over said interconnect layer;depositing a first negative photoresist layer over said first insulative layer;exposing said first negative photoresist layer to define said possible connection points on said interconnect layer, wherein areas over said second gaps remaining unexposed define said possible connection points;selectively exposing said first negative photoresist layer to define said desired connection points, wherein said desired connection points remain unexposed; anddeveloping and removing portions of said first negative photoresist layer at said desired connection points, etching said first insulative layer to uncover said desired connection points within the interconnect layer, and depositing a conductive material in said desired connection points to form connections across said first gaps.