Patent ID: 7754577
Filing Date: 2010-07-13
Classification: H01L

Abstract:
1. A method for fabricating a capacitor, comprising: forming a storage node contact plug over a substrate; forming an insulation layer having an opening exposing a surface of the storage node contact plug over the storage node contact plug; forming a conductive layer including a lower layer and an upper layer over the insulation layer, side walls of the opening, and the exposed surface of the storage node contact plug, wherein forming the conductive layer comprises: forming the lower layer by performing a low temperature atomic layer deposition (ALD) process, and forming the upper layer on the lower layer by performing a high temperature process; performing an isolation process to isolate the conductive layer for the storage node; and sequentially forming a dielectric layer and a plate electrode over the isolated conductive layer for the storage node, wherein the low temperature ALD process is performed at a temperature ranging from approximately 100° C. to approximately 250° C., and the high temperature process is performed at a temperature of approximately 300° C. and wherein performing the high temperature process comprises using one of an ALD method and a combination of an ALD method and a chemical vapor deposition (CVD) method.