Patent ID: 9087915
Filing Date: 2015-07-21
Classification: H01L

Abstract:
1. A method of fabricating a microelectronic transistor, comprising: forming a transistor gate including a gate electrode adjacent a substrate and a pair of gates spacers on opposing sides of the gate electrode; forming a source/drain region; forming a first interlayer dielectric material layer adjacent the source/drain region and adjacent at least one gate spacer; forming a densified portion of the first interlayer dielectric material which results in the densified portion of the first interlayer dielectric material and a non-densified portion of the first interlayer dielectric material layer, wherein the densified portion of the first interlayer dielectric material is formed by oxidizing a portion of the first interlayer dielectric material layer; and annealing the portion of the first interlayer dielectric material layer.