Patent ID: 8723528
Filing Date: 2014-05-13
Classification: G01R

Abstract:
1. A structure for testing a 2-dimensional array of electrical devices comprising: a first row of device under test (DUT) structures and at least a second row of DUT structures, wherein the DUT structures of the first row are connected in series and the DUT structures of said at least the second row are connected in series; a first row switch in electrical communication to the first row of DUT structures, and at least a second row switch in electric communication to the at least the second row of DUT structures; two voltage pads for applying a force voltage, wherein electrical communication of the two voltage pads to the first row of DUT structures is through the first row switch and electrical communication of the two voltage pads to the at least the second row of DUT structures is through the at least the second row switch, wherein the force voltage, when applied through the first row switch, is across the series connection of the DUT structures of the first row and wherein the force voltage, when applied through the second row switch, is across the series connection of the DUT structures of the second row; and a plurality of test pad structures, wherein each set of two test pad structures in said plurality of test pad structures is in switchable parallel connection to a DUT structure in the first row of DUT structures and at least the second row of DUT structures, wherein the switchable parallel connection of the set of two test pad structures to the DUT structure is to measure a voltage across the DUT structure.