Patent ID: 7809886
Filing Date: 2010-10-05
Classification: G06F,Y02D

Abstract:
1. A write-caching redundant array of inexpensive disks (RAID) controller, comprising: a volatile memory; a non-volatile memory; a central processing unit (CPU), for managing transfers of posted-write data from host computers to said volatile memory and transfers of said posted-write data from said volatile memory to storage devices when a main power source is supplying power to the RAID controller; a memory controller, coupled to said volatile memory and said non-volatile memory, wherein said memory controller, rather than said CPU, is configured to flush said posted-write data from said volatile memory to said non-volatile memory when said main power source fails to supply power to the RAID controller, wherein said memory controller comprises a register for specifying a source location of said posted-write data in said volatile memory, wherein said memory controller flushes said posted-write data from said source location specified in said register to said non-volatile memory, wherein said memory controller comprises a second register for specifying a destination location of said posted-write data in said non-volatile memory, wherein said memory controller flushes said posted-write data from said source location specified in said first register to said destination location specified in said second register; and at least one capacitor, coupled to provide power to said memory controller, said volatile memory, and said non-volatile memory when said main power supply fails to supply power to the RAID controller, wherein said CPU is excluded from receiving power from said at least one capacitor when said main power supply fails to supply power to the RAID controller, wherein the capacity of said at least one capacitor is sufficient to store enough energy when fully charged to power the memory controller, the volatile memory, and the non-volatile memory during the time required to flush all the posted-write data from the volatile memory to the non-volatile memory.