Patent ID: 6943456
Filing Date: 2005-09-13
Classification: H01L

Abstract:
1. A semiconductor device comprising: a lead frame having a die pad, supporting leads continuously formed with said die pad, and a plurality of leads, first ends of said plurality of leads being disposed to surround said die pad in a plane view; a semiconductor chip mounted on said die pad, said semiconductor chip having an integrated circuit and bonding pads formed on a main surface thereof, said main surface of said semiconductor chip having a quadrilateral shape, said bonding pads being disposed along four sides of said main surface of said semiconductor chip, said die pad having a size which is smaller than that of said semiconductor chip; a plurality of bonding wires electrically connecting said bonding pads with the first ends of said plurality of leads respectively; and a resin body sealing said semiconductor chip, said die, said supporting leads, portions of the plurality of leads and said plurality of bonding wires, wherein a pitch between first ones of adjacent bonding pads at each of four corners defined by said four sides of said main surface of said semiconductor chip is wider than a pitch between second ones of adjacent bonding pads which are disposed at a relatively central position of each of said four sides as compared to said four corners, and wherein a pitch between tips of first ones of adjacent leads at each of said four corners is wider than a pitch between tips of second ones of adjacent leads which are disposed at said relatively central position of each of said four sides as compared to said four corners.