Patent ID: 7459329
Filing Date: 2008-12-02
Classification: B81B,B81C

Abstract:
1. In a method of fabricating a silicon-based microstructure, the improvement comprising: depositing electrically conductive amorphous silicon doped in situ with first and second dopants, said first dopant being selected from the group consisting of arsenic, antimony, and bismuth; and said second dopant being phosphorus, and wherein said structure is a laminated structure with alternating first and second layers, each said first layer being doped with said first dopant and being in compressive mechanical stress and each said second layer being doped with said second dopant and being in tensile mechanical stress, and wherein said structure has a residual mechanical stress of less than +/−100 Mpa and a stress gradient of less than +/−20 Mpa/μm.