Patent ID: 6784678
Filing Date: 2004-08-31
Classification: G01R

Abstract:
A test apparatus for testing at least one semiconductor integrated circuit having a group of contact areas defining a wafer surface profile, the test apparatus comprising:a chuck for holding a wafer that has at least one semiconductor integrated circuit with a group of contact areas that define a wafer surface profile; a test head that is configured opposite said chuck and that includes a performance board; a probe card that is configured on said test head and that has contacts for making contact with the contact areas of the integrated circuit, said contacts having areas that are intended to come into contact with the contact areas of the integrated circuit and that define a test surface profile; and at least three actuators electrically driven to change actuator length according to an electrical signal from sensors, said at least three actuators being configured on said probe card for aligning the test surface profile parallel with the wafer surface profile prior to the test surface profile contacting the wafer surface profile, said actuators also changing a distance between said performance board and said contacts of said probe card in a direction substantially orthogonal to the wafer surface profile.