Patent ID: 8832360
Filing Date: 2014-09-09
Classification: G06F

Abstract:
1. A solid state storage device comprising: a memory device of a first type; a first memory device of a second type different than the first type; a second memory device of the second type; a plurality of first communication channels, with a first portion of the plurality of first communication channels coupled to the memory device of the first type and a second portion of the plurality of first communication channels coupled to the first memory device of the second type; a plurality of second communication channels separate from the plurality of first communication channels and coupled to the second memory device of the second type; and a multiplexer coupled to receive output from a plurality of memory sequencers and to provide output of a selected one of the plurality of memory sequencers to the plurality of first communication channels, wherein the plurality of memory sequencers comprises a memory sequencer for memory devices of the first type and a memory sequencer for memory devices of the second type.