Patent ID: 6642109
Filing Date: 2003-11-04
Classification: H01L

Abstract:
A method of manufacturing a flash memory cell, comprising the steps of:forming a pad oxide film and a pad nitride film on a semiconductor substrate; forming a trench in the semiconductor substrate; forming a trench insulating film on the entire structure and then performing a first chemical mechanical polishing (CMP) process to isolate the trench insulating film; removing the pad nitride film to expose a protrusion of the trench insulating film; performing an ion implantation process to dope the protrusion of the trench insulating film; performing a cleaning process to etch the protrusion of the trench insulating film by a given width, thereby forming a first resulting structure; forming a first polysilicon layer on the first resulting structure and then performing a second CMP process to form an isolated floating gate thereby forming a second resulting structure; and forming a dielectric film and a second polysilicon layer on the second resulting structure and then performing respective etch processes to form a control gate.