Patent ID: 6388591
Filing Date: 2002-05-14
Classification: G06F,Y02D

Abstract:
A receiver interface for interfacing with an Advanced Technology Attachment Packet Interface (ATAPI) in a first device, the receiver interface comprising:a. a converter converting a first set of signals from a serial bus into a second set of signals, the first set of signals being serial to one another and using low-voltage, differential signaling (LVDS), the first set of signals being adapted to be received on fewer lines and at a faster data rate than possible with an Integrated Disc Electronics (IDE) Bus, the second set of signals being serial to another, using TTL voltage levels, and single-ended signaling, the second set of signals using a packet format to represent a packet; b. a depacketizing circuit disassembling the packet represented by the second set of signals to generate a third set of signals, the third set of signals being parallel to one another and using TTL, single-ended signaling, the third set of signals representing a payload of the packet; and c. an ATAPI receiver circuit for storing a fourth set of signals at a location within the ATAPI in response to the third set of signals, the fourth set of signals representing a portion of the payload of the packet.