Patent ID: 6374342
Filing Date: 2002-04-16
Classification: G06F

Abstract:
A translation lookaside buffer (TLB) circuit for converting a virtual address to a physical address comprising:a carry storage section for storing digit overflow information when a lower side bit string of a base address and a lower side bit string of an offset address of virtual address information as a comparison criterion are added to each other; an upper side address storage section for storing an upper side bit string of the base address and an upper side bit string of the offset address of the virtual address information as a comparison criterion; a carry comparator for comparing a digit overflow information when a lower side bit string of the base address and a lower side bit string of the offset address of the virtual address information which has been received in an access request are added to each other, with the digit overflow information stored in said carry storage section; an upper side address comparator for detecting whether or not the upper side bit string of the base address of the virtual address information which has been received in the access request matches the upper side bit string of the base address stored in said upper side address storage section, and for detecting whether or not the upper side bit string of the offset address of the virtual address information which has been received in the access request matches the upper side bit string of the offset address stored in said upper side address storage section; and a match detector for outputting a match signal of the virtual address only when comparison results by said carry comparator are matched and comparison results by the upper side address comparator are matched.