Patent ID: 7064531
Filing Date: 2006-06-20
Classification: H02M,Y02B

Abstract:
1. A voltage converter comprising: a pulse width modulation (PWM) regulator portion having a PWM control and at least one MOS switching transistor of a first size having a first terminal connected to an input voltage and a second terminal providing an output current to a load, the PWM control receiving a feedback voltage corresponding to an output voltage of the converter and switching the at least one MOS switching transistor at a duty cycle to maintain a regulated output voltage of the converter, the at least one MOS switching transistor of a first size providing up to a first maximum current to the load; a low dropout (LDO) regulator portion having an error amplifier and an MOS series transistor whose conductance is controlled by an output of the error amplifier, the error amplifier receiving a feedback voltage corresponding to an output voltage of the converter and generating an error signal based on a difference between the feedback voltage and a reference voltage, the MOS series transistor having a first terminal connected to an input voltage and a second terminal providing a regulated voltage to the load, the MOS series transistor being of a second size less than one-fifth the first size, the MOS series transistor providing up to a second maximum current to the load, the second maximum current being less than one-fifth the first maximum current; and a mode select circuit that receives a mode select signal in a first state indicating the onset of a low current mode and, in response, disables the PWM regulator portion and enables the LDO regulator portion, wherein the mode select circuit also receives a mode select signal in a second state indicating a non-low current mode and, in response, enables the PWM regulator portion and disables the LDO regulator portion, the PWM regulator portion, the LDO regulator portion, and the mode select circuit being formed on a single chip.