Patent ID: 6884945
Filing Date: 2005-04-26
Classification: H01L,H05K,Y10T

Abstract:
1. A multi-layer printed circuit board comprising: a first substrate having a plurality of stacked resin layers, circuit patterns formed at the upper surface of each resin layer, blind via holes formed between the circuit patterns and plated layers formed at the inner wall face of the blind via holes and at the upper surface of the circuit patterns; and a second substrate having a plurality of stacked resin layers, circuit patterns formed at the upper surface of each resin layer, blind via holes formed between the circuit patterns and plated layers formed at the inner wall face of the blind via holes and at the upper surface of the circuit patterns, wherein the blind via hole of the first substrate and the blind via hole of the second substrate are disposed to face each other, and wherein the first substrate comprises: a first resin layer; a first circuit pattern formed at the upper surface of the first resin layer; a first blind via hole formed to penetrate the first resin layer and the first circuit pattern; a first plated layer formed at the upper surface of the first circuit pattern and at the inner wall and the bottom of the first blind via hole; a second resin layer formed at the upper surface of the first plated layer and the first resin layer; a second circuit pattern formed at the upper surface of the second resin layer; a second blind via hole formed to penetrate the second circuit pattern and the second resin layer; a second plated layer formed at the upper surface of the second circuit pattern and at the inner wall face and the bottom of the second blind via hole; and a third circuit pattern formed at the surface of the first plated layer which is exposed to the first resin layer, wherein a core resin layer is contained in the second blind via hole.