Patent ID: 6713326
Filing Date: 2004-03-30
Classification: H01L,Y10S

Abstract:
A method for forming a semiconductor layer, the method comprising:forming a first heterostructure by: forming a graded Si1âˆ’xGex buffer layer on a first substrate, the graded Si1âˆ’xGex buffer layer having a Ge concentration x increasing from zero to a value y; forming a relaxed Si1âˆ’yGey layer on the graded Si1âˆ’xGex buffer layer; forming a separation layer on the relaxed Si1âˆ’yGey layer; and forming a second relaxed layer over the separation layer; bonding the first heterostructure to a second substrate to define a second heterostructure; and splitting the second heterostructure along the separation layer, wherein the second relaxed layer remains on the second substrate after the second heterostructure is split.