Patent ID: 8421779
Filing Date: 2013-04-16
Classification: G09G

Abstract:
1. A display comprising: a timing controller having at least one data pin and a clock signal pin and a transfer pulse pin, wherein the transfer pin sends a transfer pulse indicating a first state and a second state; a source driver connected to the at least one data pin and the clock signal pin and the transfer pulse pin of the timing controller; and a panel connected to the source driver; wherein the timing controller sends a clock signal to the source driver via the clock signal pin, sends the transfer pulse via the transfer pulse pin, and then after the transfer pulse shifts from the first state to the second state, the timing controller sends a start pulse pattern comprising a predetermined and specific serial bit pattern to the source driver via the at least one data pin such that the source driver receives setting signals and display data signals in response to the predetermined and specific serial bit pattern while the transfer pulse indicates the second state; and wherein the source driver receives the setting signals from the timing controller via the at least one data pin during a setting period after receiving the transfer pulse and then the start pulse pattern so as to adjust setting of the display, and the source driver receives the display data signals from the timing controller via the at least one data pin after the setting period, and the source driver drives the display panel when receiving the next transfer pulse.