Patent ID: 6417834
Filing Date: 2002-07-09
Classification: H04L

Abstract:
An arrangement for graphically displaying, in an IQ plane on a screen of a display device, IQ values emitted at an output of a demodulator for quadrature-amplitude-modulated signals, comprising:a data memory; a processor, that controls the display device, connected to the data memory; a respective address of the data memory allocated to each individual IQ value and a respective pixel of the display device allocated to each address of the data memory; the processor directly connected to the IQ output of the demodulator, the processor determining an associated IQ value address in the data memory for each IQ value; and a respective frequency stored under each address of the data memory, the respective frequency being a frequency with which a respective address of the data, and thereby the corresponding IQ value, has been determined in a predetermined acquisition time.