Patent ID: 6535064
Filing Date: 2003-03-18
Classification: H03F

Abstract:
A current feedback amplifier exhibiting reduced distortion comprising:an input line (IN); a first common voltage line (V+); a first current mirror (128) connected to said first common voltage line (V+); a second common voltage line (Vâˆ’); a second current mirror (126) connected to said second common voltage line (Vâˆ’); a first transistor (104) having a base connected to said input line (IN), a collector connected to said first common voltage line (V+), and an emitter connected to said second common voltage line (Vâˆ’) via a current sink (114); a second transistor (116) having a base connected to said input line (IN), a collector connected to said second common voltage line (Vâˆ’), and an emitter connected to said first common voltage line (V+) via a current sink (120); a third transistor (124) having a base connected to said emitter of said second transistor (116), a collector connected to an input of said first current mirror (128) and an emitter forming a first node (n10); a fourth transistor (126) having a base connected to said emitter of said first transistor (104), a collector connected to an input of said second current mirror (136), and an emitter connected to the first node (n10); a fifth transistor (538) having a base connected to said emitter of said second transistor (116), a collector connected to said collector of said third transistor (124), an emitter connected to a second node (n40), said second node (n40) having an associated charge storage device (548); a sixth transistor (540) having a base connected to said emitter of said first transistor (104), a collector connected to said collector of said fourth transistor (126), and an emitter connected to said second node (n40); a first diode (240) having a first terminal connected to an output (Cm+) of said first current mirror (128) and having a second terminal; a second diode (242) having a first terminal connected to the second terminal of the first diode (240) and a second terminal connected to an output (Cmâˆ’) of said second current mirror (136); a seventh transistor (158) having a base connected to the first terminal of the first diode, a collector connected to said first common voltage line (V+), and an emitter connected to an output; and an eighth transistor (160) having a base connected to the second terminal of the second diode (242), a collector connected to said second common voltage line (V+), and an emitter connected to said output.