Patent ID: 7960219
Filing Date: 2011-06-14
Classification: H01L

Abstract:
1. A method of fabricating a TFT substrate, the method comprising: forming a gate line on an insulating substrate, and forming a gate pad by extending an end of the gate line to be wider than the gate line in a first direction substantially perpendicular to a longitudinal direction of the gate line; forming a gate insulating film on the gate line and the gate pad; sequentially stacking a first semiconductor material layer and a second semiconductor material layer on the gate insulating film and forming a first photoresist layer on the second semiconductor material layer; forming a contact hole which exposes a portion of the gate line extension portion, by etching the gate insulating film, the first semiconductor material layer, and the second semiconductor material layer using the first photoresist layer as an etching mask; forming a data line including: forming a pixel electrode which is electrically connected to the gate line and the data line by a switching device, wherein the gate line and the data line are arranged in a lattice.