Patent ID: 6255978
Filing Date: 2001-07-03
Classification: H03M

Abstract:
Converting apparatus for converting digital input signal to analog voltage, said converting apparatus comprising:reference voltage selecting means for coupling a first voltage level from a first set of reference voltage levels to a first output terminal of said reference voltage selecting means as a first power source according to a first portion of said digital input signal, said reference voltage selecting means also coupling a second voltage level within a second set of reference voltage levels to a second output terminal of said reference voltage selecting means as a second power source according to said first portion of said digital input signal;controlled selectively coupling means for coupling one of said first power source and said second power source to output terminal of said controlled selectively coupling means as a charge power source according to voltage level of every bit of a second portion of said digital input signal, each bit of said second portion of said digital input signal sequentially fed to said controlled selectively coupling means enabling said controlled selectively coupling means coupling to one of said first power source and said second power source, a starting signal being generated at time when a first bit of said second portion of said digital input signal fed to said converting apparatus; andvoltage cumulating means for generating said analog voltage, said voltage cumulating means comprising a first storage capacitor, a second storage capacitor, an output capacitor, a first coupling means, a second coupling means, and a third coupling means, said first coupling means, said second coupling means, and said third coupling means operating responding respectively to a first switching signal, a second switching signal, and a third switching signal, said first switching signal, said second switching signal, and said third switching signal being generated responding to a clock signal and said starting signal, said third coupling means electrically coupling both electrodes of said output capacitor during a first duration to proceed with a reset procedure, said first duration being a time interval that a first bit of said first switching signal fed to said first coupling means, one of said first coupling means coupling said first storage capacitor to output terminal of said controlled selectively coupling means during said first duration, the other of said first coupling means coupling said second storage capacitor to said output capacitor during said first duration, simultaneously said second coupling means being opened during said first duration, one of said second coupling means coupling said second storage capacitor to output terminal of said controlled selectively coupling means during a second duration, said second duration being a time interval that a second bit of said switching signal fed to said controlled selectively coupling means, the other of said second coupling means coupling said first storage capacitor to said output capacitor during said second duration, simultaneously said first coupling means being opened during said second duration, after the bit next the last bit of said second portion of said digital input signal have been fed to said controlled selectively coupling means, said output capacitor being electrically coupled to one of said first storage capacitor and said second storage capacitor, then voltage on said output capacitor being equal to said analog voltage, two electrodes of said output capacitor being electrically coupled together only during said first duration, starting time of each of said first and second switching signal leading to the starting time of each bit of said second portion of said digital input signal.