Patent ID: 8536556
Filing Date: 2013-09-17
Classification: H01L

Abstract:
1. A nonvolatile memory device comprising: a first interconnection extending in a first direction; a second interconnection extending in a second direction nonparallel to the first direction; a third interconnection extending in the first direction; a first memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state by a current supplied via the first interconnection and the second interconnection; a first rectifying element provided between the first interconnection and the first memory layer; a second memory layer placed between the second interconnection and the third interconnection and reversibly transitioning between a first state and a second state by a current supplied via the second interconnection and the third interconnection; and a second rectifying element provided between the second interconnection and the second memory layer; a cross section parallel to the first and the second directions of the first memory layer decreasing toward the second interconnection, a cross section parallel to the first and the second directions of the first rectifying element decreasing toward the second interconnection, a cross section parallel to the first and the second directions of the second memory layer decreasing toward the third interconnection, a cross section parallel to the first and the second directions of the second rectifying element decreasing toward the third interconnection, a cross-sectional dimension changing continuously from the second memory layer to the first rectifying element, and the cross-sectional dimension decreasing continuously with distance from the first interconnection.