Patent ID: 7701761
Filing Date: 2010-04-20
Classification: G11C

Abstract:
1. In a non-volatile memory device having individual pages of memory cells to be sensed in parallel, each memory cell having a source, a drain, a charge storage unit and a control gate for controlling a conduction current along said drain and source, the memory device comprising: a page source line coupled to the source of each memory cell in a page; an aggregate node coupled to individual page source lines; a source voltage control circuit coupled via said aggregate node to a page source line of a selected page for memory operation; a word line coupling to the control gate of each memory cell of said page; a word line voltage supply for providing a predetermined word line voltage; and a source level tracking circuit connectable to receive the word line voltage and the voltage level at the aggregate node and connectable to provide to the word line an output voltage during the sensing operation, including an op amp with an output providing the output voltage and having a first input connected to receive a voltage derived from the word line voltage and the aggregate node voltage and having a second input connected by a feedback loop from the output.