Patent ID: 8461024
Filing Date: 2013-06-11
Classification: G01R,H01L

Abstract:
1. A method, comprising: disposing a wafer translator having an inquiry-side and a wafer-side on a vacuum chuck such that the inquiry-side is facing the vacuum chuck; disposing a wafer bonding releasable adhesive material on the wafer-side of the wafer translator; patterning the wafer bonding releasable adhesive material such that a plurality of wafer-side contact structures are exposed to a wafer having a topside with a plurality of integrated circuits and a backside; aligning the topside of the wafer with the wafer-side of the wafer translator; bringing the wafer into electrical contact with the wafer-side contact structures through a pattern in the releasable adhesive material, and applying heat and pressure to removably attach the wafer and wafer translator, thereby forming a wafer/wafer translator pair in an attached state; after forming the wafer/wafer translator pair capable of being tested, thinning the wafer from the wafer backside; dicing the wafer to form one or more individual integrated circuits; and removing one or more diced integrated circuits.