Patent ID: 7956652
Filing Date: 2011-06-07
Classification: G11C,H03K

Abstract:
1. A semiconductor integrated circuit comprising: a sampling circuit which samples a potential of an input terminal; a dynamic comparator having a standby and a comparison mode which compares the potential of the input terminal and a reference potential, the dynamic comparator comprising an output terminal outputting a comparison result of the comparison of the potential of the input terminal and a reference potential and a mode switching terminal which switches between the standby mode and the comparison mode; a switch for input signals connected between the input terminal and the dynamic comparator; a capacitor for comparator having one end connected between the switch for input signals and the dynamic comparator and another end connected to a fixed potential; and a timing control circuit which controls a timing to sample by the sampling circuit, a timing to switch the modes of the dynamic comparator by applying a signal to the mode switching terminal, and a timing to make the switch for input signals enter a conducting state or a blocking state, wherein the timing control circuit makes the switch for input signals enter the blocking state from the conducting state before the dynamic comparator switches from the standby mode to the comparison mode, and terminates the sampling by the sampling circuit after the mode switch.