Patent ID: 6589865
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A process for filling a cavity formed in a semiconductor substrate, comprising the steps of:providing a semiconductor substrate having a metal layer thereon and a layer of dielectric material over said metal layer; forming a cavity in said layer of dielectric material extending to said metal layer; depositing a cavity liner in said cavity at a temperature of from about 100Â° C. to about 300Â° C. at subatmospheric pressure of from about 0.1 to about 50 Torr; depositing a cavity fill metal at a temperature up to about 300Â° C. and at subatmospheric pressure of from about 0.1 to about 50 Torr in overlying relation with at least a portion of said cavity liner; and then applying pressure up to about 30 MPa, to said cavity fill metal at a temperature of from about 20Â° C. to about 300Â° C. to cause further filling of said cavity with said cavity fill metal.