Patent ID: 6589846
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, comprising the steps of:forming a device isolation insulation material, by sequentially forming a gate insulation material and a conductive material for a first gate electrode on a semiconductor substrate, forming a trench by partially etching the conductive material for the first gate electrode, the gate insulation material and the semiconductor substrate by employing a device isolation mask having a predetermined pattern, and filling up the trench; forming a groove, by exposing the upper portion of the conductive material for the first gate electrode by removing the device isolation insulation material according to an etch back process, and removing a part of the device isolation insulation material in a presumed field region of a gate electrode line; forming a conductive material for a gate electrode, by forming a conductive material for a second gate electrode to fill up the groove, and exposing the upper portions of the device isolation insulation material and the conductive material for the first gate electrode by removing the conductive material for the second gate electrode according to an etch back process; and forming a gate electrode self aligned with the device isolation insulation film, by removing a part of the conductive material for the gate electrode according to an etching process using a gate electrode mask having a predetermined pattern.