Patent ID: 8595415
Filing Date: 2013-11-26
Classification: G06F

Abstract:
1. A memory system for digital data communication with a host device to provide data storage capacity for the host device, said memory system comprising: at least one module including a nonvolatile memory section and the module is configured to independently perform at least one of a wear leveling function, a garbage collection function and a bit density setting function for the nonvolatile memory section of only that module based on one or more module input parameters and the module is configured for operation at least in a first mode for a selected one of the functions based on a first set of the one or more module input parameters and for operation in a second mode for the selected one of the functions based on a second set of the one or more module input parameters with the first set of module input parameters being different from the second set of module input parameters; and a controller configured for said digital data communication with the host device and further configured for module digital data communication with the module such that any data flowing to and from the module passes through the controller and at least the controller is configured to provide the module input parameters to the module to define an independent execution of at least one of the wear leveling function, the garbage collection function and the bit density function in the module.