Patent ID: 6950046
Filing Date: 2005-09-27
Classification: H03M

Abstract:
1. An IC with built-in self-test, comprising: a sigma-delta analog-to-digital converter (SD-ADC) having a first and a second input terminals, receiving a first and a second reference voltage signals, and comprising a first-stage translation unit with a first-stage gain and a second-stage translation unit with a second-stage gain; and a test circuit testing the SD-ADC and receiving a first stimulus, wherein a gain of the test circuit is set to 1; wherein in a testing mode, the test circuit respectively provides a third reference voltage signal and a fourth reference voltage signal inverse to the third reference voltage signal to the first and the second input terminals according to the first stimulus and the SD-ADC outputs a first digital signal; wherein in an operating mode, the test circuit respectively provides a first and a second analog signals to the first and the second input terminals according to the first stimulus and the SD-ADC outputs a second digital signal.