Patent ID: 6292515
Filing Date: 2001-09-18
Classification: H04L

Abstract:
A circuit for use in a high speed multi-channel transmission system, which system is intended to transmit data at a rate R using K sub-channels through a channel having varying transmission characteristics, said circuit comprising:a sub-channel parameter memory for storing data capacities associated with some or all of said sub-channels, including initial data capacities and adapted data capacities; anda processing unit which can perform a configuration procedure to generate said initial data capacities to configure said system to operate at the data rate R; andsaid processing unit being further configured to perform a first adaptation procedure to generate said adapted data capacities within a first time period when significant changes are required in the data rate R; andsaid processing unit being otherwise configured to perform a second adaptation procedure to generate said adapted, data capacities within a second time period, said second time period being shorter than said first time period;wherein the processing unit executes the configuration procedure until said data rate is achieved or until a specified iteration criteria parameter is satisfied and thereafter executes either or both of the first and second adaptation routines as needed to maintain the data rate R.