Patent ID: 9070736
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A semiconductor device comprising: a second conductivity-type isolation layer surrounding a semiconductor function region, wherein the second conductivity-type isolation layer is disposed from one principal surface of a first conductivity-type semiconductor substrate, having a predetermined depth; a V-shaped groove reaching a bottom portion of the isolation layer from another principal surface of the semiconductor substrate; a second conductivity-type semiconductor layer disposed at a part surrounded by the V-shaped groove in the other principal surface of the semiconductor substrate; a second conductivity-type semiconductor thin-layer coupling the isolation layer and the second conductivity-type semiconductor layer, wherein the second conductivity-type semiconductor thin-layer is disposed along a side wall of the V-shaped groove; and a metal electrode contacting a surface of the second conductivity-type semiconductor layer and a surface of the second conductivity-type semiconductor thin-layer, wherein the metal electrode at least includes a laminated film configured in a sequence of a first metal film including aluminum and silicon, a second metal film having a metal with solder wettability principally, and a third metal film preventing the second metal film from being oxidized from the semiconductor substrate side, and wherein the first metal film is in a range of 1.1 to 3.0 μm in thickness at a part contacting the surface of the second conductivity-type semiconductor layer, wherein the first metal film is in a range of 0.55 to 1.5 μm in thickness at a part contacting the surface of the second conductivity-type semiconductor thin-layer.