Patent ID: 8377815
Filing Date: 2013-02-19
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor load board, comprising: coating a first conductive material on a substrate to form a first conductive layer; forming a first photoresist on the first conductive layer, exposing the first photoresist to light using a first pattern photomask, developing the exposed first photoresist to form a first photoresist pattern on the first conductive layer, etching the exposed portions of the first conductive layer, removing the first photoresist pattern to form a plurality of connecting pads and a patterned circuit layer, forming a dielectric layer on the substrate, the connection pads and the patterned circuit layer; forming a plurality of openings at the positions of the dielectric layer corresponding to the connection pads by using an alignment laser micro-drilling method, wherein the opening has a width reduced gradually toward the connection pads; forming a conductive film on the dielectric layer; forming a second conductive layer made of the same material as the conductive film on the conductive film, the second conductive layer filling the openings; forming a second photoresist on the second conductive layer, exposing the second photoresist to light using a second pattern photomask, developing the exposed second photoresist to form a second photoresist pattern having a width equal to a maximum width of the openings on the second conductive layer, etching the exposed portions of the second conductive layer, removing the second photoresist pattern to form a plurality of solder pads, wherein each solder pad has a height higher than a height of the dielectric layer, and a width of a portion of each solder pad, which is higher than the dielectric layer, equals to the maximum width of the opening; and forming solders on the solder pads.