Patent ID: 6590289
Filing Date: 2003-07-08
Classification: G06F,H01L

Abstract:
An integrated circuit comprising:a semiconductor layer; a plurality of cells formed on the semiconductor layer, each of the cells having terminals; a first metal layer having a first set of conductors extending in a first direction for interconnecting the terminals of the cells; a second metal layer having a second set of conductors extending in a second direction approximately orthogonal to the first direction for interconnecting the terminals of the cells; a third metal layer having a third set of conductors extending in a third direction for interconnecting the terminals of the cells; a fourth metal layer having a fourth set of conductors extending in a fourth direction approximately orthogonal to the third direction for interconnecting the terminals of the cells; a fifth metal layer having a fifth set of conductors extending in a fifth direction for interconnecting the terminals of the cells; and a sixth metal layer having a sixth set of conductors extending in a sixth direction approximately orthogonal to the fifth direction for interconnecting the terminals of the cells, wherein the third and the fourth directions form non-orthogonal angles with the first and the second directions, and the fifth and the sixth directions form non-orthogonal angles with the first, second, third and fourth directions.