Patent ID: 6482681
Filing Date: 2002-11-19
Classification: H01L

Abstract:
The process for making a punch-through IGBT in a float zone silicon wafer of the N type conductivity; said process comprising the steps of forming a plurality of junctions and metallizing for said junctions on the top surface of said wafer to define at least a portion of said IGBT; removing material from the bottom surface of said wafer to reduce the thickness of said wafer to a given value; implanting hydrogen ions into the bottom surface of said wafer at an implant energy in the range of about 100 KeV to 500 KeV to define an N+ buffer layer to a given depth and concentration into said bottom surface; and forming a Pâˆ’ type collector region on the bottom of said N+ buffer layer; forming a backside contact atop said Pâˆ’ type collector region; and annealing said hydrogen implant by raising said wafer to a temperature less than the temperature which damages the top side structure of said IGBT at a time after the implant thereof.