Patent ID: 7176822
Filing Date: 2007-02-13
Classification: H03M

Abstract:
1. An analogue-to-digital converter comprising: a summing element that combines an analogue input signal with an analogue feedback signal to generate an analogue fault signal; a quantizer having comparators that compare the analogue fault signal with reference voltages to generate a digital output signal; a digital-to-analogue converter that converts the digital output signal into the analogue feedback signal and comprises elements; a control device for dynamic element matching that generates a control signal from the digital output signal to control the elements within the digital-to-analogue converter and compensate for mismatching of the elements; a random number generating device that generates random numbers used in the quantizer to interchange assignment of the reference voltages to the comparators in order to mitigate an effect of offset voltages at inputs of the comparators; and a compensation device that generates a compensated control signal from the control signal as a function of the random numbers to compensate the assignment of the reference voltages to the comparators while the elements of the digital-to-analogue converter are being controlled.