Patent ID: 6411538
Filing Date: 2002-06-25
Classification: G11C

Abstract:
A ternary content addressable memory (TCAM) cell, said TCAM cell comprising:a first 1-bit 4-T static random access memory (SRAM) cell coupled to a first bit line (BL) by a first pass-gate PMOS transistor that has a first NP drain diode section whose reverse-biased leakage current is adapted to keep a first dynamic node of said first cell high without relying on any resistive-load element; and a second 1-bit 4-T SRAM cell coupled to a second BL by a second pass-gate PMOS transistor that has a second NP drain diode section whose reverse-biased leakage current is adapted to keep a second dynamic node of said second cell high without relying on any resistive-load element.