Patent ID: 6725413
Filing Date: 2004-04-20
Classification: H04L

Abstract:
A data transfer control device for performing data transfer in accordance with the IEEE 1394 standard between a plurality of nodes connected to a bus, the data transfer control device comprising:a link circuit that provides a service for packet transfer between the nodes; and a write circuit that writes a packet, which has been received through the link circuit, to a packet storage memory which is randomly accessible, wherein the link circuit performs processing to check a header CRC or a transaction code included within the header of the packet received from another node and, performs processing to invalidate the packet when it is determined that there is a CRC error in the header of the packet or when it is determined that the transaction code of the packet is an unknown code, wherein the packet storage memory is divided into a header area and a data area, wherein the write circuit writes the header of the packet to the header area of the packet storage memory and the data of the packet to the data area of the packet storage memory, wherein when it is determined that there is the CRC error in the header of the packet, the packet is invalidated by returning a header pointer indicating a received header position within the header area of the packet storage memory to a position indicated by the header pointer at a completion of a previous packet reception.