Patent ID: 7786535
Filing Date: 2010-08-31
Classification: H01L

Abstract:
1. A design structure embodied in a non-transient machine readable medium for designing, manufacturing, or testing an integrated circuit, the design structure comprising: a first gate electrode; a second gate electrode, a semiconductor body including a source, a drain, and a channel between the source and the drain, the semiconductor body positioned laterally on the insulating layer between the first gate electrode and the second gate electrode; a first gate dielectric layer disposed between the semiconductor body and the first gate electrode; and a second gate dielectric layer disposed between the semiconductor body and the second gate electrode, the second gate dielectric layer in contact with the semiconductor body; wherein the semiconductor body, the first gate electrode, the second gate electrode, the first gate dielectric layer, and the second gate dielectric layer each have a contacting relationship with the insulating layer.