Patent ID: 6020755
Filing Date: 2000-02-01
Classification: H03K

Abstract:
A programmable logic device comprising:(a) an array of programmable logic cells (PLCs), each PLC comprising one or more programmable logic elements and programmable routing;(b) a set of device input/output (I/O) pads;(c) a set of programmable I/O cells (PICs), each PIC providing a programmable interface between the PLC array and a first subset of the I/O pads;(d) an application-specific block (ASB) comprising non-field-programmable mask-programmed logic; and(e) a set of programmable ASB-interface cells (AICs), wherein:each AIC provides a programmable interface between a first pin on the PLC array and the ASB; andat least one AIC provides one or more output values from one or more programming memory cells to the ASB for use in programmably selecting between different functionalities in the ASB during configuration of the programmable portion of the device.