Patent ID: 9083287
Filing Date: 2015-07-14
Classification: G05F,H03F

Abstract:
1. An electronic circuit comprising an electronic biasing circuit and a circuit to be biased by said electronic biasing circuit, the biasing circuit arranged to provide a DC bias voltage to a circuit to be biased by said DC bias voltage, the biasing circuit comprising a first transistor pair comprising a first transistor and a second transistor both being of a first MOSFET type, a gate of said first transistor being connected to a gate of said second transistor and arranged to supply said DC bias voltage, a source of said first transistor being connected to a supply reference voltage, a source of said second transistor being connected to said supply reference voltage via a resistor element, in use a first current flowing through said first transistor and a second current flowing through said second transistor, the electronic biasing circuit comprising circuit components arranged to cause said first current and said second current to be substantially equal, wherein the biasing circuit comprises a second transistor pair comprising a third transistor and a fourth transistor of said same first MOSFET type, which third transistor is, at one side, connected in series with said first transistor at a first common node, and a gate of said third transistor being connected to a gate of said fourth transistor, a source of said fourth transistor being connected to a drain of said second transistor at a second common node, in use a third current flowing through said third transistor and a fourth current flowing through said fourth transistor, said circuit components also being arranged to cause said third current and said fourth current to be substantially equal, and the circuit to be biased comprises a fifth transistor of said first MOSFET type and a sixth transistor of said first MOSFET type, said sixth transistor being connected in series with said fifth transistor, the circuit to be biased being connected to said DC bias voltage produced by said biasing circuit via an input circuit such that a gate of said fifth transistor receives a first DC voltage substantially equal to said DC bias voltage.