Patent ID: 7890695
Filing Date: 2011-02-15
Classification: G06F,G11C,Y02D

Abstract:
1. A storage device, comprising: a flash memory device providing a storage medium; a cache memory for use with the flash memory device; and a control circuit, wherein based on a write command and provided address information, the control circuit selects either the flash memory device or the cache memory as a writing destination of input data, wherein a unit cell is set based on a write unit or an erase unit of the flash memory device, and the unit cell includes a plurality of sectors, and when a write command comes for writing of block data to any of the plurality of sectors, the control circuit segments the block data into sub blocks in accordance with the unit cell, and selects either the flash memory device or the cache memory as the writing destination of each of the sub blocks in accordance with a check corresponding to the unit cell for each of the sub blocks, the check comprising at least one of checking a level of data occupation in the unit cell, checking an entry of the cache memory corresponding to the unit cell or data therein, or checking a free space on the flash memory device for the unit cell.