Patent ID: 6391705
Filing Date: 2002-05-21
Classification: H01L

Abstract:
A method for forming a memory device on a semiconductor substrate, comprising the steps of:forming a trench in the semiconductor substrate, said trench having a lower sidewall and an upper sidewall; forming a capacitor along said lower sidewall of said trench; forming a source region by diffusing dopants into the outer perimeter of the lower portion of said upper sidewall of said trench; forming a first oxide layer in the trench above said capacitor; after forming said source region, forming a gate oxide layer on said upper sidewall of said trench; after forming said gate oxide layer, forming a gate electrode in said trench, said gate electrode being surrounded by said gate oxide layer; forming a drain region by diffusing dopants into the outer perimeter of the upper portion of said upper sidewalls of said trench, said drain region being above said source region and separated from said source region; forming an isolation layer above said gate electrode; forming a word line above said isolation layer and above said capacitor; forming a gate contact window by etching a gate contact opening through part of said word line and through said isolation layer to expose said gate electrode, and filling said gate contact opening with a conducting material; depositing an insulating layer above said word line; etching a drain contact opening through said insulating layer to expose said drain region; depositing a conducting layer above said insulating layer and filling into said drain contact opening; and etching said conducting layer to form a bit line.