Patent ID: 8753956
Filing Date: 2014-06-17
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor structure, comprising: providing a semiconductor substrate having a first region and an adjacent second region; etching the semiconductor substrate to form a plurality of first trenches in the first region and at least a second trench in the second region using a hard mask layer as an etching mask, the width of the second trench being greater than that of the first trench; filling the first trenches and the second trench using a first isolation material to form a plurality of first isolation structures in the first trenches and sidewall spacers in the second trench, respectively, within the same process; etching the exposed semiconductor substrate on the bottom of the second trench to form a third trench using the sidewall spacer as an etching mask; and filling the second trench and the third trench using a second isolation material to form a second isolation structure.