Patent ID: 6763034
Filing Date: 2004-07-13
Classification: G06F,H04L

Abstract:
A target port for a functional module in an integrated circuit system, the target port comprising:an input buffer for holding a plurality of request packets received from a packet router of the integrated circuit system; control circuitry for selecting a request packet from amongst the plurality of request packets held in said input buffer for supply to the functional module to implement the operation defined in the request packet; and an output buffer for holding a plurality of response packets, each response packet being generated by the functional module responsive to receipt of a request packet; wherein each request packet includes an indicator of the source of the packet and a transaction identifier uniquely identifying the transaction in which the packet is engaged and wherein said response packets use the source identifier as a destination indicator for identifying the destination of the response packet, and also convey said unique transaction identifier; and wherein said control circuitry is operable to determine whether a request packet forms part of a simple transaction involving a single request packet or a compound transaction involving a plurality of request packets and, in the case of a compound transaction, causing a lock signal to be supplied for all request packets involved in the compound transaction save the last packet, wherein a response lock signal is set with responses generated responsive to said request packets forming part of said compound transaction.