Patent ID: 6212594
Filing Date: 2001-04-03
Classification: G06F

Abstract:
A method for causing two programmable interrupts to take place, using a counter having an output and an adjustable period, a first register which controls the length of the total period of the counter, a second register which controls the length of the second portion of the period of the counter cycle, the steps in the method comprising:loading a first register with a first value;loading a second register with a second value;simultaneously causing a counter to count down from said first value to zero, and causing an output representing a first interrupt signal of a timer to be a binary ""0"" during a first portion of the counter period;comparing the value of said first register to the value of said second register; andcausing, said output representing a second interrupt signal of said counter to be a binary ""1"", when said value of said first register and said second register are equal and until the value of said first register becomes zero.