Patent ID: 7129112
Filing Date: 2006-10-31
Classification: H01L

Abstract:
1. A manufacturing method for a semiconductor device comprising: a hole portion formation step for forming hole portions whose entire width is substantially identical to the width of the opening portion in a part of the active surface side of the substrate on which electronic components are formed; a curved surface formation step for curving the bottom surface of the hole portion while maintaining the width of the bottom surface in the hole portions substantially identical to the width of the opening portion; a connecting terminal formation step for forming connecting terminals that serve as the external electrodes of the electronic circuits by burying metal in the hole portions; an exposure step for exposing a part of the connecting terminals by carrying out processing on the back surface of the substrate; and an insulating film formation step of forming an insulating film on the inner wall and the bottom surface of the hole portions between the curved surface formation step and the connecting terminal formation step, and further the exposure step comprising: a first etching step for etching the back surface of the substrate until the thickness of the substrate is approximately slightly thicker than the burying depth of the connecting terminals; a second etching step for exposing the insulating film formed in the hole portions by etching the back surface of the substrate at an etching rate that is lower than the etching rate in the first etching step; and a third etching step for exposing the connecting terminals by etching at least a part of the exposed insulating film.