Patent ID: 7476587
Filing Date: 2009-01-13
Classification: H01L

Abstract:
1. A method for creating a self-converged memory material element during the manufacture of a memory cell, comprising: forming a base layer comprising a bottom electrode; forming an upper layer on the base layer, the upper layer forming step comprising forming a third, planarization stop layer over the base layer, a second layer over the third layer, and the first layer over the second layer; forming a keyhole opening through the upper layer to expose a surface of the bottom electrode and to create a first memory cell subassembly, the keyhole opening comprising a first, upper opening segment formed within the first layer, a second opening segment formed within the second layer, and a third opening segment formed within the third layer, the first and second opening segments having first and second widths, the first layer having an overhanging portion extending into the opening so that the first width is shorter than the second width; depositing a fill material into the keyhole opening to create a second memory cell subassembly comprising a void within the deposited fill material, the void having a width related to the difference between the first and second widths; etching the second memory cell subassembly anisotropically, thereby forming a sidewall of the fill material in the keyhole opening with an electrode hole aligned with the void and exposing the bottom electrode; depositing a memory material into the electrode hole and in contact with the bottom electrode to create a third memory cell subassembly; and planarizing the third memory cell subassembly down to the third, planarization stop layer to create a fourth memory cell subassembly having a memory material element of the memory material and a flat top surface defined by the memory material element, the fill material, and the third layer.