Patent ID: 6145078
Filing Date: 2000-11-07
Classification: G06F

Abstract:
A data processing apparatus comprising:(a) a central processing unit;(b) a first memory;(c) a system bus controller electrically connected to both said central processing unit and said first memory;(d) a system bus electrically connected to said system bus controller;(e) a second memory electrically connected to said system bus and including an operation system;(f) a third memory electrically connected to said system bus and including a system firmware;(g) at least one extension including therein a fourth memory which is electrically connected to said system bus and includes BIOS code having an architecture different from an architecture of said central processing unit and acting as a program for implementing initialization and start-up;(h) a fifth memory electrically connected to said system bus;(i) an emulation system for driving said operation system to thereby emulate said BIOS code so that said BIOS code has the same architecture as an architecture of said central processing unit, and for storing the thus emulated BIOS code in said fifth memory; and(j) a starter for starting-up said extension through the use of said emulated BIOS code.