Patent ID: 7664922
Filing Date: 2010-02-16
Classification: G06F

Abstract:
1. A data transfer arbitration apparatus in which data to be recorded are sequentially transferred to a memory controller that records data in memory having a plurality of banks, the apparatus comprising: a selector which selects a data transfer requesting entity from among a plurality of data transfer requesting entities, irrespective of priority sequence of transfer service for the data transfer requesting entity; and a transmitter which transmits, to the memory controller, data requested to be transferred by the selected data transfer requesting entity, wherein: said selector selects consecutively the data transfer requesting entity so that the transfer service for the same data transfer requesting entity is consecutively executed, and determines the number of consecutive selections in a manner that a product of a bit number of data transmitted by one transfer service and the number of consecutive selections is less than or equal to predetermined stride length so that a transfer across the banks of the memory occurs by a plurality of the transfer services; and when data write destinations which have been read in advance are not consecutive among the addresses of one round of all the banks, the stride length is shortened from maximum stride length, the maximum stride length being defined as a product of the number of the banks and the entry bit number of each bank.