Patent ID: 6085309
Filing Date: 2000-07-04
Classification: G06F,G10H,Y10S

Abstract:
A signal processing apparatus for executing a plurality of microprograms in a time-sharing manner, so as to perform arithmetic operations on a digital signal, comprising:a microprogram memory device that stores said plurality of microprograms;a signal input device that enters said digital signal; anda delay memory device that delays said digital signal in a manner such that said digital signal is sequentially written into said delay memory device and then said digital signal is read out from said delay memory device after a predetermined time period;wherein said delay memory device has a plurality of delay areas that are independently provided for respective ones of said plurality of microprograms, such that each of the plurality of microprograms that is being executed uses a corresponding one of said plurality of delay areas so as to delay said digital signal, and a common area accessible by all of the plurality of microprograms to store and read out common data.