Patent ID: 7825031
Filing Date: 2010-11-02
Classification: H01L

Abstract:
1. A method of fabricating an integrated circuit, the method comprising: providing at least one layer over a workpiece having active area regions disposed on a top surface; performing a first implantation step, wherein particles are implanted into the at least one layer under a first direction of incidence; performing a second implantation step, wherein particles are implanted into the at least one layer under a second direction of incidence that is different from the first direction of incidence, wherein on a plane parallel to the top surface of the workpiece, the azimuthal component of the first direction and the azimuthal component of the second direction are not along a same line; and partially removing the at least one layer such that the at least one layer is partially removed depending on a local implant dose generated by the first implantation step and the second implantation step.