Patent ID: 6545294
Filing Date: 2003-04-08
Classification: H01L

Abstract:
An electronic apparatus, comprising:a semiconductor device including a plurality of transistors formed at a surface of a polycrystalline layer structure, said polycrystalline layer structure having n polycrystalline layers (n&gE;2) formed on an insulating substrate, in which the number of crystal grains in each of said polycrystalline layers is gradually reduced from lower to upper layer, wherein projections are provided at a predetermined pitch, each of which are formed of a single crystal having a tip in a specific crystal orientation at the surface of said first to (nâˆ’1)th polycrystalline layers, the crystal grains in the nth polycrystalline layer being single crystals provided on the projections of said (nâˆ’1)th polycrystalline layer; and the projections of each layer are registered so as to be all under the projections of said (nâˆ’1)th polycrystalline layer.