Patent ID: 6430149
Filing Date: 2002-08-06
Classification: H04L

Abstract:
A processing circuit for a complex operation comprising:first and second buffer memories for temporarily storing a pair of quadrature demodulation output signals produced by quadrature demodulation processing of a modulated carrier wave signal obtained in accordance with the Orthogonal Frequency Division Multiplexing system; a complex operation processor for causing the pair of quadrature demodulation output signals read from the first and second buffer memories, respectively, to be subjected to a first complex operation processing by performing a fast Fourier transform operation and further for causing output signals from the fast Fourier transform operation to be subjected to a second complex operation processing by performing a differential demodulation operation to produce first and second data outputs; an operation controller for supplying the complex operation processor with operation control signals for causing the complex operation processor to perform the first and second complex operation processings; and a program storing memory for supplying the operation controller with program data for causing the operation controller to produce the operation control signals for controlling the operations of the complex operation processor in accordance with an operation program including the program data so that the complex operation processor performs the first and second complex operation processings as time sharing processings at a time share corresponding to a data format of the quadrature demodulation output signals.