Patent ID: 8258842
Filing Date: 2012-09-04
Classification: H03K

Abstract:
1. A dead-time detecting circuit, coupled between an output-stage circuit and a previous-stage circuit, for detecting a dead-time of the output-stage circuit, an output end of the output-stage circuit coupled to an inductive load, a first resistor of the dead-time detecting circuit coupled between a first voltage source and a second end of a first transistor of the dead-time detecting circuit, a first end of the first transistor coupled to the output end of the output-stage circuit for receiving an output voltage of the output-stage circuit, a control end of the dead-time detecting circuit controlling operation of the first transistor according to a controlling voltage, wherein when relation between the output voltage and the controlling voltage conforms to a predetermined relation, the second end of the first transistor outputs a dead-time detecting signal representing turning on to the previous-stage circuit for the previous-stage circuit urging the output-stage circuit to leave a dead-time state.