Patent ID: 8106495
Filing Date: 2012-01-31
Classification: H01L

Abstract:
1. A semiconductor apparatus comprising: a first wiring substrate; a second wiring substrate which is stacked and directly connected to on the first wiring substrate through a bump electrode; a semiconductor chip which is mounted on the first wiring substrate by flip chip bonding and received between the first wiring substrate and the second wiring substrate, an upper surface of the semiconductor chip being formed as a mirror surface; an adhesive layer which is formed on the upper surface of the semiconductor chip; and a molding resin which is filled in a gap between the first wiring substrate and the second wiring substrate, wherein the molding resin is interposed between an upper surface of the adhesive layer on the semiconductor chip and a lower surface of the second wiring substrate, and the molding resin is directly adhered to the upper surface of the adhesive layer.