Patent ID: 8450798
Filing Date: 2013-05-28
Classification: H01L

Abstract:
1. A semiconductor structure, comprising: a field effect transistor (FET) trench in a FET region of a semiconductor layer, the FET trench having a FET conductive electrode therein, the FET conductive electrode having a top surface recessed relative to a top surface of a source region associated with the FET trench in the FET region; and a Schottky trench in a Schottky region of the semiconductor layer, the Schottky trench having a Schottky conductive electrode therein, the Schottky conductive electrode in the Schottky trench having a top surface substantially coplanar with a top surface of a mesa region in the Schottky region, the top surface of the mesa region forming at least a portion of a Schottky contact, the top surface of the source region of the FET region being higher than the top surface of the mesa region of the Schottky region.