Patent ID: 6469952
Filing Date: 2002-10-22
Classification: G11C

Abstract:
A semiconductor memory device comprising:a memory array including a plurality of memory cells arranged in a plurality of rows and a plurality of columns, a plurality of word lines provided for the plurality of rows, respectively, and a plurality of pairs of bit lines provided for the plurality of columns, respectively; a row decoder provided for each word line, responsive to application of a row address signal previously allotted a word line corresponding thereto, for setting the word line corresponding thereto to a selected level and activating a plurality of memory cells corresponding thereto; a column decoder responsive to a column address signal for selecting any pair of said plurality of pairs of bit lines; and a read/write circuit reading/writing data from/to a memory cell activated by said row decoder, via a pair of bit lines selected by said column decoder; said row decoder including a first transistor of a first conductivity type, having a first electrode receiving a first signal having two values corresponding to a high potential higher than a power supply potential and a negative potential, a second electrode connected to a word line corresponding thereto, and an input electrode receiving a second signal having two values corresponding to said high potential and said negative potential, a second transistor of a second conductivity type, having a first electrode receiving said negative potential and a second electrode connected to a word line corresponding thereto, a third transistor of the second conductivity type, having a first electrode receiving said second signal, a second electrode connected to the input electrode of said second transistor, and an input electrode receiving said power supply potential, and a signal generation circuit responsive to application of a row address signal previously allotted a word line corresponding thereto, for setting said first signal and said second signal to said high potential and said negative potential, respectively, and setting the word line corresponding thereto to a selected level.