Patent ID: 7332420
Filing Date: 2008-02-19
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device with a P-type MOSFET and an N-type MOSFET, each comprising a gate electrode having a stacked structure in which a polysilicon film into which an impurity is introduced, a metal silicide film, a metal nitride film and a metal film are stacked on a gate insulating film in this order, the method comprising the steps of: forming a gate insulating film on a semiconductor substrate; forming a non-doped polysilicon film on the gate insulating film; forming a metal silicide film on the non-doped polysilicon film; forming a metal nitride film on the metal silicide film; forming a metal film on the metal nitride film; processing at least the metal film, the metal nitride film and the metal silicide film to pattern them into the shape of a gate such that the portion of the metal silicide film that forms part of a gate electrode of a P-type MOSFET and the portion of the metal silicide film that forms part of a gate electrode of an N-type MOSFET are separated from each other; introducing a P-type impurity into the non-doped polysilicon film in the region where the P-type MOSFET is formed; introducing an N-type impurity into the non-doped polysilicon film in the region where the N-type MOSFET is formed; performing thermal treatment to diffuse the P-type and N-type impurities introduced in the polysilicon film; and patterning the polysilicon film with the impurities introduced into the shape of the gate to form the gate electrodes.