Patent ID: 7282757
Filing Date: 2007-10-16
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a workpiece; a first insulating layer formed over the workpiece; at least one second insulating layer formed over the first insulating layer; and a plurality of metal-insulator-metal (MIM) capacitors formed in the first insulating layer and the at least one second insulating layer, at least one of the plurality of MIM capacitors comprising a first conductive layer, a dielectric layer disposed over the first conductive layer, and a second conductive layer formed over the dielectric layer, and wherein the first conductive layer extends completely to a top surface of the at least one second insulating layer, wherein the at least one second insulating layer comprises a recessed region between at least two adjacent MIM capacitors, the at least two adjacent MIM capacitors having top plates comprised of the second conductive layer, wherein the second conductive layer within the recessed region electrically couples the top plates of the at least two adjacent MIM capacitors.