Patent ID: 6323102
Filing Date: 2001-11-27
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising:forming a first mask pattern having a clipping pattern corresponding to a trench isolation region on a semiconductor substrate,forming a trench opening by etching said trench isolation region,depositing an insulating material on said semiconductor substrate so as to completely fill said insulating material into said trench opening,forming a second mask pattern over said trench isolation region,pre-planarizing by dry etching said insulating film using said second mask pattern as an etching mask,removing said second mask pattern and polishing the insulating film using CMP and using said first mask pattern as a stopper layer, andwherein the end surface of the second mask pattern used for processing the pre- planariation of the insulating film is deposited on an end portion of a first region corresponding to the trench isolation region or a second region surrounding said first region; andwherein:the distance from the end portion of the first region to the outer periphery of the second region corresponds to a half of a minimum feature size when the insulating film is laminated using a HDP-CVD technique.