Patent ID: 9165879
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A semiconductor device comprising: a wiring board; a first semiconductor chip that is mounted over a first surface of the wiring board so that an element formation surface faces the first surface, and has a first circuit; a second semiconductor chip that is disposed over the first semiconductor chip; and a plurality of connection terminals that couple the first semiconductor chip with the wiring board, wherein the first semiconductor chip has the element formation surface facing the first surface and has a plurality of first through-silicon vias, wherein the second semiconductor chip is electrically coupled to the first through-silicon vias of the first semiconductor chip, wherein each of the first through-silicon vias is arranged on any of grid points arranged in m rows and n columns (m>n), wherein a through-silicon via area defined by coupling the outermost grid points arranged in m rows and n columns does not overlap with the first circuit in plan view, and wherein some of the connection terminals are located between the first circuit and the first through-silicon vias in plan view.