Patent ID: 7378713
Filing Date: 2008-05-27
Classification: H01L

Abstract:
1. A complementary metal oxide semiconductor (CMOS) device with dual-metal gate structures, comprising: a semiconductor substrate with a first doped region and a second doped region separated by an insulation; a first metal gate stack on the first doped region layer; a second metal gate stack on the second doped region; a sealing layer disposed on sidewalls of the first gate stack and the second gate stack, wherein the first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer, and wherein the second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.