Patent ID: 6610564
Filing Date: 2003-08-26
Classification: H01L

Abstract:
A method of fabricating a semiconductor device comprising the steps of:(a) forming a first gate electrode over a first semiconductor region of a first conductivity type formed in a semiconductor body, and a second gate electrode over a second semiconductor region of a second conductivity type, opposite to said first conductivity type, formed in said semiconductor body; (b) after said step (a), implanting ions in said first semiconductor region to form a third semiconductor region of said second conductivity type in said first semiconductor region; (c) after said step (a), implanting ions in said first region to form a fourth semiconductor region of said second conductivity type in said first semiconductor region; (d) after said step (a), implanting ions in said second semiconductor region to form a fifth semiconductor region of said first conductivity type in said second semiconductor region; (e) after said step (a), implanting ions in said second semiconductor region to form a sixth semiconductor region of said first conductivity type in said second semiconductor region; (f) after said steps (b), (c), (d) and (e), coating a cobalt film over said third semiconductor region and said fifth semiconductor region; and (g) forming cobalt silicide layers in said third semiconductor region and said fifth semiconductor region by reacting said cobalt film with silicon of said third semiconductor region and said fifth semiconductor region, wherein a dose amount in said step (b) is greater than a dose amount in said step (c) such that an impurity concentration of said third semiconductor region is greater than an impurity concentration of said fourth semiconductor region, wherein a junction depth of said fourth semiconductor region is greater than a junction depth of said third semiconductor region, wherein a dose amount in said step (d) is greater than a dose amount in said step (e) such that an impurity concentration of said fifth semiconductor region is greater than an impurity concentration of said sixth semiconductor region, and wherein a junction depth of said sixth semiconductor region is greater than a junction depth of said fifth semiconductor region.