Patent ID: 8239637
Filing Date: 2012-08-07
Classification: G06F

Abstract:
1. A method for a controller of a memory device to execute a write operation, comprising: initiating the write operation on a memory array; transmitting a write command and a write data, via a first bus of the memory device, wherein the first bus comprises a command bus having lines that carry the write command and a byte mask command to the memory array; transmitting, when the write operation indicates masking, a byte mask command having byte mask information that comprises one bit for every eight bits of write data associated with the write operation, via the first bus, to the memory array, before transmitting the write data, and wherein the byte mask information is transmitted via column address lines of the address lines of the first bus when the column address lines are not utilized in the write operation, wherein the byte mask command is an embedded command that includes byte mask information for the write operation comprising a byte mask wherein the write command is a disparate command from the byte mask command; and transmitting the write data via a second bus of the memory device, to the memory array.