Patent ID: 6746943
Filing Date: 2004-06-08
Classification: H01L,Y10S

Abstract:
A method of fabricating a semiconductor device comprising:depositing a polycrystalline silicon germanium film above a semiconductor substrate with a gate dielectric film interposed therebetween; patterning said polycrystalline silicon germanium film to form gate electrodes in first and second circuit regions, respectively; prior to or after execution of the patterning of said gate electrodes, selectively oxidizing a surface of the polycrystalline silicon germanium film in the second circuit region such that a germanium concentration of the polycrystalline silicon germanium film in the second circuit region is higher than a germanium concentration of the polycrystalline silicon germanium film of the first circuit region and such that a thickness of polycrystalline silicon germanium film in the second circuit region is smaller than a thickness of polycrystalline silicon germanium film in the first circuit region; and forming source and drain diffusion layers as self-aligned with said gate electrodes.