Patent ID: 6236280
Filing Date: 2001-05-22
Classification: H03K

Abstract:
A voltage controlled oscillator having first and second complementary output terminals, comprising:a first edge delay circuit having an input terminal, an output terminal, and a control input terminal, said input terminal being coupled to the first complementary output terminal, said first edge delay circuit being capable of delivering a signal on said output terminal that varies between first and second logic levels at first and second preselected rates in response to detecting a variation between first and second logic levels at said input terminal, said first edge delay circuit being capable of varying at least one of said first and second preselected rates in response to receiving a signal at said control input terminal;a first comparator having a first input terminal, an output terminal, and a control input terminal, said first comparator first input terminal being coupled to the output terminal of the first edge delay circuit, said first comparator output terminal being coupled to the second complementary output terminal, said first comparator circuit being capable of delivering a signal on said output terminal that varies between first and second logic levels at first and second preselected rates in response to detecting a variation between first and second logic levels at said first input terminal, said first comparator being capable of varying at least one of said first and second preselected rates in response to receiving a signal at said control input terminal, said control input terminals of said first edge delay circuit and said first comparator being coupled together; anda feedback circuit coupled between the second complementary output terminal and the first comparator circuit.