Patent ID: 7615411
Filing Date: 2009-11-10
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor package comprising: arranging, on a first surface of a base plate, a plurality of semiconductor constructing bodies while separating the semiconductor constructing bodies from each other, each of the semiconductor constructing bodies including a semiconductor substrate, a plurality of connection pads formed on the semiconductor substrate, a plurality of columnar electrodes electrically connected to the connection pads, and a sealing film formed around the columnar electrodes, an upper surface of the sealing film being flush with upper surfaces of the columnar electrodes; forming an insulating layer on said first surface of the base plate around the semiconductor constructing bodies; forming, over the insulating layer, upper interconnections each of which includes at least one interconnection layer and has at least one connection terminal portion, at least some of the upper interconnections being connected to the columnar electrodes of the semiconductor constructing bodies; forming, over a second surface of the base plate, lower interconnections each of which includes at least one interconnection layer and at least one connection terminal portion; forming a through hole in the insulating layer and the base plate; and forming, in the through hole, a vertical conducting portion which connects one of the layers of the upper interconnections to one of the layers of the lower interconnections.