Patent ID: 6159864
Filing Date: 2000-12-12
Classification: H01L

Abstract:
A method for preventing gate oxides on a semiconductor wafer from being damaged by electromagnetic waves or particles generated in a plasma-related process, the semiconductor wafer comprising:a substrate;a plurality of gate oxides positioned separately on the substrate;a first dielectric layer positioned on the gate oxides for isolating the gate oxides; anda conducting layer positioned on the first dielectric layer having a plurality of testing slits, each testing slit having a test pattern and each testing slit being installed above a corresponding gate oxide;the method comprising:performing a plasma-related process on the surface of the semiconductor wafer;performing an electrical test to find damaged gate oxides out of the gate oxides on the substrate; andestablishing a mask lay-out design rule based on the test patterns of the damaged gate oxides or adjusting the plasma-related process based on damages of the damaged gate oxides to prevent gate oxides on other semiconductor wafers from being damaged in the plasma-related process.