Patent ID: 7981800
Filing Date: 2011-07-19
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device having a shallow trench isolation (STI) structure, the method comprising steps of: depositing a nitride over a pad oxide on a surface of a substrate, the pad oxide having a thickness of at least 125 angstroms (Å) and the nitride having a thickness of between 500 to 2000 Å; forming a patterned resist layer on the nitride; etching in a process chamber at least one opening through the nitride and pad oxide using plasma comprising methyl fluoride (CH stripping the patterned resist layer in-situ in the same process chamber using fluorine based plasma, to substantially prevent nitride pinch-off; and etching at least one STI trench into the substrate, and wherein the etch is accomplished in-situ in the same process chamber used for etching through the nitride and stripping the patterned resist layer.