Patent ID: 6275841
Filing Date: 2001-08-14
Classification: G06F,G11C,H03K

Abstract:
An apparatus that provides the product of a multiplicand and a multiplier, comprising:an encoder circuit that performs a Booth recoding, said encoder circuit further comprises a plurality of N-NARY logic cells, each N-NARY logic cell receives an individual 1-of-N signal where N=4 that represents the value of one dit of the multiplier, each N-NARY logic cell produces an output 1-of-N signal;a translation buffer that converts each dit of the multiplicand into a bit pair represented by two 1-of-N signals where N=2, said translation buffer receives a plurality of 1-of-N signals where N=4 and outputs a plurality of 1-of-N signals where N=2;a plurality of multiplexers that produce a plurality of partial products, wherein each multiplexer receives said plurality of 1-of-N signals where N=2 and an output 1-of-N signal produced by a said encoder circuit N-NARY logic cell and produces one partial product; andan output structure comprising a Wallace tree and a final adder, said Wallace tree comprises a plurality of carry-save-adders that sum said plurality of partial products to produce two intermediate partial products, said final adder sums said two intermediate partial products to produce a final product.