Patent ID: 8963278
Filing Date: 2015-02-24
Classification: C23C,H01L

Abstract:
1. A donor wafer containing integrated semiconductor device, the donor wafer comprising: a donor wafer membrane portion comprising a device layer and a buried insulating layer, the donor wafer membrane portion comprising a plurality of integrated semiconductor devices each integrated semiconductor device within the plurality of semiconductor devices corresponding to a die formed on the donor wafer, wherein the donor wafer membrane portion has a diameter of at least 200 mm, the donor wafer having a crystalline substrate substantially removed from a thinned area of the donor wafer membrane portion such that the device layer and the buried insulating layer of the donor wafer membrane in the thinned area is configured to conform to a pattern specific topology on an acceptor surface; and a support structure attached to regions of the donor wafer that are outside of the donor wafer membrane portion.