Patent ID: 8488645
Filing Date: 2013-07-16
Classification: H01L,H01S

Abstract:
1. A semiconductor device comprising: a substrate having at least one n-type layer of semiconductor material formed on an upper surface thereof; a first plurality of layers comprising a semiconductor material disposed on top of said at least one n-type layer, wherein a first, lower distributed Bragg reflector (DBR) is formed in the first plurality of layers, and wherein at least one of the first plurality of layers is of an n-type; a first intrinsic layer containing a light-emitting material disposed on top of the first plurality of layers; a second plurality of layers comprising a semiconductor material disposed on top of the first intrinsic layer, wherein a second, upper DBR is formed in the second plurality of layers, and wherein at least one of the second plurality of layers is of a p-type, and wherein portions of the first plurality of layers, the first intrinsic layer, and the second plurality of layers constitute a vertical cavity surface emitting laser (VCSEL); a second intrinsic layer disposed on top of the second plurality of layers; at least one layer of n-type semiconductor material disposed on top of the second intrinsic layer, and wherein portions of the second plurality of layers, the second intrinsic layer, and said at least one layer of n-type semiconductor material constitute a protection diode for protecting the VCSEL from electrostatic discharge (ESD) events, and wherein said portion of the second intrinsic layer has a depletion region that has a width that is equal to or greater than 100 nanometers (nm); ohmic p and n contact pads in contact with the VCSEL and protection diode; a first metal interconnect connecting the p contact pad of the VCSEL with the n contact pad of the protection diode; a second metal interconnect connecting the n contact pad of the VCSEL with the p contact pad of the protection diode; and one or more layers of dielectric material disposed on the semiconductor device and electrically isolating the p and n contact pads from each other, and wherein the second intrinsic layer reduces a capacitance of the protection diode to allow the VCSEL to operate at high speeds.