Patent ID: 7225285
Filing Date: 2007-05-29
Classification: G06F

Abstract:
1. A method for assigning interrupts in a system, comprising: receiving a plurality of master components for implementation on a programmable chip; receiving a plurality of slave components for implementation on the programmable chip; identifying interconnections between the plurality of master and slave components; receiving a plurality of interrupt entries for first slave components connected to a first master component; comparing each interrupt entry to a range of assignable interrupts for said first master component; accepting certain interrupt entries that are within said range of assignable interrupts for said first master component, said accepted interrupt entries being a first set of interrupts; assigning said first set of interrupts to said first slave components connected to said first master component; and assigning a second set of interrupts to slave components connected to a second master component, wherein an interrupt assigned to the first master component is transparent to the second master component.