Patent ID: 8987085
Filing Date: 2015-03-24
Classification: H01L

Abstract:
1. A method of forming an integrated circuit, the method comprising: providing a semiconductor substrate; forming a metallization layer over the semiconductor substrate, wherein the metallization layer comprises a metal feature in a low-k dielectric layer and extending from a top surface of the low-k dielectric layer into the low-k dielectric layer; after the step of forming the metallization layer, performing a treatment to form a hydrophilic top surface in a gaseous environment, wherein the treatment comprises a first treatment step to form the hydrophilic top surface for the low-k dielectric layer, wherein the first treatment step comprises an oxygen-containing process gas; and after the step of performing the treatment, plating a cap layer on the metal feature in a solution, wherein the cap layer is substantially planar with a substantially planar top surface and a substantially planar bottom surface.