Patent ID: 6268757
Filing Date: 2001-07-31
Classification: H01L,H03K

Abstract:
A semiconductor device driven by two power source voltages VDD and VSS (VDD>VSS) comprising:a base;a plurality of electric circuits, each of which is provided with two power source voltages VDD and VSS, respectively;at least one FET provided on said base connecting in parallel with each of said electric circuits, said FET having a gate, a source, a drain, and a substrate; andsaid gate is connected to one of said two power source voltages VDD and VSS of a corresponding electric circuit, and at least one of said source, said drain, or said substrate is connected to another of said two power source voltages VDD and VSS of said corresponding electric circuit, anda capacity coupling is formed between said power source voltage VDD and said power source voltage VSS of each of said electric circuits by a capacitance realized between said gate and at least one of said source, said drain, and said substrate to compensate a fluctuation of said power source voltages VDD and VSS for each of said electric circuits.