Patent ID: 8001358
Filing Date: 2011-08-16
Classification: G06F

Abstract:
1. A microprocessor executing a peak value obtaining process obtaining a peak value out of a plurality of data, the peak value being a maximum value or a minimum value, the microprocessor comprising: an address generator sequentially generating a reading address and outputting the generated reading address; a data storing part outputting n-bit data having a starting point of the reading address output from the address generator; a peak value candidate selecting part selecting an element including a peak value out of a plurality of elements forming the n-bit data output from the data storing part as a peak value candidate when m-bit (m: multiple integral of an addressing unit) data of one data unit is expressed as one element, the peak value candidate selecting part further outputting the peak value candidate together with a positional information, the positional information indicating a position of the peak value candidate in an element column in which the plurality of elements are aligned in an address order; a peak value holding part holding a peak value and an address of an element including the peak value; and a peak value calculating part calculating an address of the element of the peak value candidate using the positional information of the peak value candidate and the reading address, outputting the calculated address and the peak value candidate to the peak value holding part, and updating content held in the peak value holding part on a condition that the peak value candidate output from the peak value candidate selecting part and the peak value held in the peak value holding part satisfy a magnitude relation corresponding to an instruction to obtain the maximum value or the minimum value.