Patent ID: 9024377
Filing Date: 2015-05-05
Classification: H01L

Abstract:
1. A semiconductor device capable of reducing influences of adjacent word lines, comprising: a substrate; a first word line disposed in the substrate, and source/drain doping regions disposed in the substrate at two side of the first word line, wherein the first word line comprising: a first gate trench embedded in the substrate, wherein the first gate trench has a lower part and an upper part; a first gate electrode disposed in the lower part of the first gate trench; a first gate dielectric layer disposed between the first gate electrode and the substrate; at least one first charge trapping dielectric layer disposed adjacent to the first gate electrode, wherein the first charge trapping dielectric layer directly contacts the first gate electrode; and a capping layer disposed in the upper part of the first gate trench, wherein the capping layer is only composed of dielectric, and wherein the upper part of the first gate trench is completely filled with the capping layer and the at least one first charge trapping dielectric layer, wherein the capping layer has a top surface that is flush with a top surface of the first charge trapping dielectric layer.