Patent ID: 6816431
Filing Date: 2004-11-09
Classification: G11C

Abstract:
A magnetic random access memory circuit, comprising:a plurality of magnetic memory cells, each of the memory cells comprising a magnetic storage element having an easy axis and a hard axis associated therewith; a plurality of column lines and row lines for selectively accessing one or more of the memory cells, each of the memory cells being proximate to an intersection of one of the column lines and one of the row lines; and at least one row line circuit configurable for generating a write current for writing a logical state of one or more of the memory cells, the at least one row line circuit being operatively coupled to the row lines, the write current being conveyed in a substantially same direction via the row lines; and at least one column line circuit configurable for generating at least one of a sense current and a sense voltage for reading the logical state of one or more of the memory cells, the at least one column line circuit being operatively coupled to the column lines, the column lines conveying to the one or more memory cells the at least one of the sense current and the sense voltage; wherein the row lines are substantially orthogonal to the easy axis of the magnetic storage element in each of the memory cells.