Patent ID: 7511390
Filing Date: 2009-03-31
Classification: H02M

Abstract:
1. A switching circuit, comprising: a first main switching transistor, of a first conductivity type, having a source and drain coupled between a first power supply node and a switch node; a second main switching transistor, of a second conductivity type opposite the first conductivity type, having a source and drain coupled between the switch node and a second power supply node; first logic circuitry responsive to phases of an input clock signal and coupled to gates of the first and second main switching transistors, for controlling the first and second main switching transistors to toggle between a state in which the first main switching transistor is on and the second main switching transistor is off and a state in which the first main switching transistor is off and the second main switching transistor is on, in response to phases of the input clock signal; a first weak switching transistor of the first conductivity type having a higher output impedance than the first main switching transistor and having a source and drain coupled between the first power supply node and the switch node in parallel with the source and drain of the first main switching transistor; a second weak switching transistor of the second conductivity type having a higher output impedance than the second main switching transistor and having a source and drain coupled between the switch node and second power supply node in parallel with the source and drain of the second main switching transistor; and second logic circuitry, coupled to gates of the first and second weak switching transistors for controlling the first and second weak switching transistors to toggle between a state in which the first weak switching transistor is on and the second weak switching transistor is off and a state in which the first weak switching transistor is off and the second weak switching transistor is on, in accordance with the phases of the input clock signal, and at a slew rate slower than a slew rate of the toggling of the first and second main switching transistors.