Patent ID: 7523249
Filing Date: 2009-04-21
Classification: G06F,G11C

Abstract:
1. A storage device having nonvolatile memory coupled to a host, said nonvolatile memory for storing information, the host for generating a plurality of logical block addresses for use in storing or reading information in and from the nonvolatile memory, the storage device comprising: a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by one of the logical block addresses, and wherein each of the volatile memory locations is configured to store a physical block address without requiring the storage of a corresponding logical block address; one or more nonvolatile memory devices, coupled to the volatile memory, each of said one or more nonvolatile memory devices being organized into a plurality of nonvolatile data blocks, wherein each block is selectively programmable and erasable and further wherein each block is uniquely addressable by one of the physical block addresses; and means for receiving a block of data to be stored in the one or more nonvolatile memory devices, for receiving a target logical block address, for identifying a free particular block within the nonvolatile blocks having no data stored therein, and for storing the physical block address of the particular block in the volatile memory location that corresponds to the target logical block address; wherein the storage device is adapted to copy information stored in the one or more nonvolatile memory devices which correlate to the physical block addresses of the plurality of nonvolatile data blocks to the volatile memory locations during power-up.