Patent ID: 6172886
Filing Date: 2001-01-09
Classification: H02M

Abstract:
An apparatus for voltage multiplication, comprising:at least two pump transistors connected as a series circuit with connections therebetween defined as transistor connection nodes, a first pump transistor connected directed to an input voltage of the apparatus and a second pump transistor connected to an output voltage of the apparatus;a first clock signal to which gates of odd-numbered pump transistors are connected via first capacitors;a second clock signal to which gates of even-numbered pump transistors are connected via further first capacitors;a third clock signal to which odd-numbered connection nodes of the series circuit are connected via second capacitors;a fourth clock signal to which even-numbered connection nodes of the series circuit are connected via further second capacitors;a regulator connected to the voltage output of the apparatus wherein the regulator switches on and off the first through fourth clock signals; anda voltage divider which feeds a partial voltage of the output voltage to all substrate terminals of the at least two pump transistors.