Patent ID: 6724333
Filing Date: 2004-04-20
Classification: H03M

Abstract:
A digital-to-analog converter comprising:a plurality of resistors connected in series; selection means that selects one of voltages at respective junctions between said plurality of resistors, based on M (M: an integer which is larger than 1) more significant bits of data for conversion; current output means that generates a current having a value which is proportional to a value of a current flowing through said plurality of resistors and corresponds to N (N: an integer which is larger than 1) less significant bits of said data for conversion; a conversion resistor that converts an output current from said current output means to a voltage; and an operational circuit that performs an operation on said voltage selected by said selection means and a voltage developed across said conversion resistor; wherein said current output means comprises: a control transistor serially connected to said plurality of resistors connected in series, for controlling said current flowing through said plurality of resistors; and first to N-th transistors each controlled by a voltage identical to a voltage at a control terminal of said control transistor and each cooperating with said control transistor to form a current mirror circuit for outputting a current having a value which is proportional to a weight assigned to a corresponding one of said N less significant bits of said data for conversion, each of said first to N-th transistors being turned on and off by a corresponding one of said N less significant bits.