Patent ID: 7268374
Filing Date: 2007-09-11
Classification: H01L

Abstract:
1. A semiconductor device comprising a vertical stack of layers comprising: an active layer configured to support a two dimensional carrier gas having an excess of carriers; source and drain contacts provided to said active layer such that a current can flow between said source and drain contacts through said two dimensional carrier gas; a lower conducting region, wherein said lower conducting region is a patterned lower conducting region such that said active layer is suspended across gaps in said lower conducting region and said active layer is physically supported by and suspended between parts of said lower conducting region; and an upper etch stop layer provided between said lower conducting region and the active layer, said lower conducting region comprising a first material and said upper etch stop layer comprising a second material, wherein said first material is etchable by a first etchant but resistant to a second etchant and said second material is etchable by the second etchant but resistant to etching by the first etchant.