Patent ID: 7495961
Filing Date: 2009-02-24
Classification: G11C

Abstract:
1. A sense amplifier comprising: a first inverter that is responsive to a sense amplifier enable signal and is configured to output a bias signal; a first precharging unit that is configured to precharge a first node and a second node in response to a first precharge signal; a second precharging unit that is configured to precharge the bias signal in to a predetermined bias signal voltage in response to a second precharge signal and to maintain the bias signal at the predetermined bias signal voltage until the second precharge signal is disabled, wherein the second precharging unit comprises a PMOS transistor having a source and a drain that are directly connected between a power supply voltage and the bias signal and a gate directly connected to the second precharge signal; a switching unit that is configured to connect the first and second nodes to a data line in response to the bias signal; a feedback unit that is configured to control the bias signal to maintain a voltage of the data line and a voltage of a bit line; and a second inverter that is responsive to the first node and is configured to output a sense amplifier output signal.