Patent ID: 8370705
Filing Date: 2013-02-05
Classification: H03M

Abstract:
1. A computer-implemented method for calculating a checksum address in a computer system memory configured to maintain error correction information, the method comprising: receiving a data request from a processor that includes a memory address associated with the requested data; subdividing the memory address into a plurality of coefficients in a polynomial equation, wherein the polynomial equation expresses the memory address in an X-based number system; calculating a quotient value based on a summation of concatenated coefficient values, wherein each concatenated coefficient value comprises a concatenation of a different coefficient included in the plurality of coefficients and corresponds to a position of the different coefficient in the polynomial equation; computing the checksum address based on the quotient value and a value of X; requesting error correction information from the computer system memory at a location corresponding to the checksum address; and confirming an integrity of the requested data by analyzing error correction information stored at the checksum address.