Patent ID: 7257184
Filing Date: 2007-08-14
Classification: H03D,H03L,H04J,H04L

Abstract:
1. A phase comparator for comparing differences in phase between a transient edge of an input data signal and transient edges of clock signals, comprising: a latch unit for latching the input data signal in parallel on rising/falling edges of the respective clock signals respectively; an error signal output unit for outputting m error signals respectively indicative of differences in phase between the transient edge of the input data signal and the transient edges of the respective clock signals and each having a minimum pulse width of (m/2−1)×T or more, based on respective output signals produced from the latch unit and the respective clock signals; an input unit for inputting the respective output signals produced from the latch unit in parallel on the rising/falling edges of the respective clock signals; and a reference signal output unit for outputting m reference signals whose pulse widths are (m/2)×T, based on output signals produced from the input unit and the respective clock signals, wherein the input data signal having a cycle of T, and the clock signals are m clock signals whose frequencies are expressed in f/m (where f=1/T, and m=2