Patent ID: 6809673
Filing Date: 2004-10-26
Classification: H03M

Abstract:
A multi-channel integrated circuit comprising:a plurality of channels, a current steering digital to analogue converter (DAC) in each channel, each DAC comprising: a plurality of current sources provided by corresponding current source devices coupled to a common supply rail, the gates of the current source devices of the DACs being electrically tied together for mirroring a reference current, and being biased by a first bias voltage, a plurality of current steering switches for steering currents from the current sources to either one of a pair of summing nodes of the corresponding DAC in response to a digital word for providing an analogue output signal on the summing nodes corresponding to the digital word, a cascode device located between each current source device and the corresponding current steering switch for preventing capacitive feedthrough of voltage swings on the current steering switch to the gate of the corresponding current source device, a reference circuit for generating the reference current for mirroring by the current source devices of the respective DACs, and for generating the first bias voltage, a separate cascode bias voltage circuit being provided for each DAC for providing a second bias voltage for biasing the gates of the cascode devices of the corresponding DAC, the gates of the cascode devices of each DAC being electrically tied to the corresponding cascode bias voltage circuit for applying the second bias voltage to the cascode devices of the corresponding DAC, and being isolated from the gates of the cascode devices of the other DACs for preventing voltage swings on the current steering switches capacitively fed through to the gates of the corresponding cascode devices being transferred to the gates of the cascode devices of the other DACs for minimising crosstalk between the DACs.