Patent ID: 7274922
Filing Date: 2007-09-25
Classification: H03H

Abstract:
1. A circuit arrangement including a circuit for generating an IQ voltage signal from an electrical input signal, wherein said IQ voltage signal has an I-part and a Q-part that are orthogonal to each other and that both have approximately the same amplitude as each other, wherein said electrical input signal has an input signal frequency that varies in a limited range about a carrier frequency, and wherein said circuit comprises: first and second terminals adapted to have said input signal applied to at least one of said terminals; at least one series circuit branch respectively including at least one ohmic resistance and at least one reactance connected respectively in series with one another between said first and second terminals, wherein said ohmic resistance has a resistance value and said reactance has an impedance at said carrier frequency that approximately corresponds to said resistance value respectively in each said series circuit branch; and a plurality of output tap nodes at opposite sides of a selected output resistance among said at least one ohmic resistance and at opposite sides of a selected output reactance among said at least one reactance, wherein a first pairing of said output tap nodes is adapted to tap and output a first part among said I-part and said Q-part of said IQ voltage signal across said output resistance and a second pairing of said output tap nodes is adapted to tap and output a second part among said I-part and said Q-part of said IQ voltage signal across said output reactance.