Patent ID: 6031272
Filing Date: 2000-02-29
Classification: H01L

Abstract:
A MOS type semiconductor device comprising:a semiconductor substrate of a first conductivity type;a first source diffusion layer of a second conductivity type formed in a principal surface region of the semiconductor substrate;a first drain diffusion layer of the second conductivity type formed in the principal surface region of the semiconductor substrate so as to be distant from the first source diffusion layer;a channel region formed in the semiconductor substrate so as to be located between the first source diffusion layer and the first drain diffusion layer;a gate insulating film provided on the channel region;a gate electrode provided on the gate insulating film;a single impurity diffusion layer of the first conductivity type which is formed along substantially the whole channel region, and has a nonuniform impurity concentration profile along a channel length direction, an impurity concentration in a region of the impurity diffusion layer which is adjacent to the first source diffusion layer being higher than an impurity concentration in a region of the impurity diffusion layer which is closer to the first drain diffusion layer, wherein an impurity concentration of the semiconductor substrate just under the first source diffusion layer is lower than an impurity concentration on a source side of the impurity diffusion layer of the first conductivity type, anda pair of second source/drain diffusion layers of the second conductivity type which are formed in both end portions of the channel region, wherein the pair of second source/drain diffusion layers of the second conductivity type have an impurity concentration of 1.times.10.sup.19 cm.sup.-3 or more and have a junction depth shallower than a junction depth of the first source/drain diffusion layers.