Patent ID: 6282291
Filing Date: 2001-08-28
Classification: H04L

Abstract:
An apparatus for encrypting an input bit sequence comprising:a bit sequence output means for outputting a predetermined bit sequence which is derived from an initial bit sequence inputted to the bit sequence output means, the predetermined bit sequence including a predetermined trap bit sequence within the predetermined bit sequence;means for processing the input bit sequence in a first mode of operation that encrypts said input bit sequence using the predetermined bit sequence and in a second mode of operation that does not so encrypt the input bit sequence;a switch signal output means monitoring said predetermined bit sequence for detecting said predetermined trap bit sequence and outputting a switch signal upon detecting said predetermined trap bit sequence; anda switch responsive to said switch signal for automatically switching said means for processing to said second mode of operation if said means for processing is in said first mode of operation and to said first mode of operation if said means for processing is in said second mode of operation.