Patent ID: 8976209
Filing Date: 2015-03-10
Classification: G02F,G09G,Y10T

Abstract:
1. An active matrix substrate, comprising: a scan signal line; a data signal line; a transistor connected to the scan signal line and to the data signal line; first and second pixel electrodes provided in a single pixel region, said first pixel electrode being connected to said data signal line through said transistor; and first and second capacitance electrodes formed in a same layer as said scan signal line, wherein said first capacitance electrode is electrically connected to one of said first and second pixel electrodes, and forms a capacitance with the other of said first and second pixel electrodes, wherein said second capacitance electrode is electrically connected to one of said first and second pixel electrodes, and forms a capacitance with the other of said first and second pixel electrodes, wherein at least a portion of said first capacitance electrode overlaps with said other of the first and second pixel electrodes through an interlayer insulating film covering a channel of said transistor and a gate insulating film covering said first capacitance electrode and said scan signal line, wherein at least a portion of said second capacitance electrode overlaps with said other of the first and second pixel electrodes through the interlayer insulating film covering the channel of said transistor and the gate insulating film covering said second capacitance electrode and said scan signal line, wherein said first capacitance electrode is connected to said first pixel electrode through a first contact hole running through said interlayer insulating film and said gate insulating film, and overlaps with said second pixel electrode through said interlayer insulating film and said gate insulating film, and wherein said second capacitance electrode is connected to said first pixel electrode through a second contact hole running through said interlayer insulating film and said gate insulating film, and overlaps with said second pixel electrode through said interlayer insulating film and said gate insulating film.