Patent ID: 6479886
Filing Date: 2002-11-12
Classification: H01L

Abstract:
A packaged integrated circuit comprising:a substrate; a semiconductor die mounted to the substrate; an EMI shield that encapsulates the semiconductor die; a ground pin electrically coupled to the semiconductor die; a ferrite bead electrically coupled to the EMI shield and the ground pin; and a package body that encapsulates the EMI shield; wherein the EMI shield has substantially planar upper and lower surfaces and first, second, third and fourth side surfaces, those side surfaces each oriented substantially perpendicular to both the upper and lower surfaces, the first and second side surfaces each being substantially planar and oriented substantially perpendicular to the third and fourth side surfaces, the third and fourth side surfaces receiving a plurality of external pins; and wherein the third and fourth side surfaces each have a substantially jigsaw like configuration, in which indented portions alternate with extended portions, the indented portions each receiving an end of each of the plurality of external pins, and the extended portions penetrating between adjacent external pins a distance along the length of those pins.