Patent ID: 9190453
Filing Date: 2015-11-17
Classification: G11C,H01L

Abstract:
1. A magnetic memory comprising: a semiconductor substrate; a plurality of active areas formed on a surface of the semiconductor substrate; a plurality of word lines buried in the surface of the semiconductor substrate including the plurality of active areas, the plurality of word lines being parallel to a first direction; a plurality of select transistors provided on the plurality of active areas, wherein at least two of the plurality of select transistors are provided for each of the plurality of active areas, and a plurality of gate electrodes of the plurality of select transistors are used for the plurality of word lines; a plurality of variable resistance elements provided on the plurality of active areas, wherein at least two of the plurality of variable resistance elements are provided for each of the plurality of active areas, and the plurality of variable resistance elements are respectively connected to a plurality of drain regions of the plurality of select transistors; and a plurality of lower plugs provided on the plurality of active areas, wherein at least two of the plurality of the lower plugs are provided for each of the plurality of active areas, and the plurality of lower plugs are respectively provided between the plurality of drain regions of the plurality of select transistors and the plurality of variable resistance elements; wherein the plurality of lower plugs comprise a first lower plug, and the plurality of variable resistance elements comprise a first variable resistance element provided on the first lower plug, and a center of a top surface of the first lower plug is shifted from a center of a bottom surface of the first variable resistance element in a second direction, and the top surface of the first lower plug partially overlaps with the bottom surface of the first variable resistance element.