Patent ID: 7444440
Filing Date: 2008-10-28
Classification: G06F

Abstract:
1. A method for increasing a processor data communication rate through a serial peripheral interface (SPI) module comprising the steps of: storing a first value from a Central Processing Unit (CPU) using a virtual special function register (VSFR), the VSFR comprising a virtual transmitter register and a virtual receiver register, wherein the first value is stored in memory addresses within a FIFO memory device external to the SPI module, the memory addresses within the FIFO memory device identified by hardware pointers in the SPI module, wherein the first value is written to the memory addresses within the FIFO memory device by the virtual transmitter register, wherein the step of storing the first value further comprises the steps of: retrieving the first value and transmitting the first value through the SPI module, wherein the first value is retrieved from the FIFO memory device and transmitted through the SPI module.