Patent ID: 8513740
Filing Date: 2013-08-20
Classification: H01L

Abstract:
1. A complementary metal oxide semiconductor (CMOS) device, comprising: a semiconductor substrate including a NMOS region and a PMOS region; a NMOS metal gate stack structure in the NMOS region, the NMOS metal gate stack structure including a first high dielectric layer, a first barrier metal gate on the first high dielectric layer, and a first metal gate on the first barrier metal gate, the first barrier metal gate including a first metal oxide nitride layer; and a PMOS metal gate stack structure on the PMOS region, the PMOS metal gate stack structure including a second high dielectric layer, a second barrier metal gate on the second high dielectric layer, and a second metal gate on the second barrier metal gate, the second barrier metal including a second metal oxide nitride layer; wherein the first metal oxide nitride layer includes a metal carbide oxide nitride layer, a metal silicide oxide nitride layer or a metal aluminum oxide nitride layer, and wherein the second metal oxide nitride layer includes a metal carbide oxide nitride layer, a metal silicide oxide nitride layer or a metal aluminum oxide nitride layer.