Patent ID: 6117704
Filing Date: 2000-09-12
Classification: H01L

Abstract:
A method of preparing a plurality of pre-formed IC chips for encapsulation in stackable layers of an electronic package, comprising the following steps;forming a neo-wafer structure having a flat surface;photo-patterning and processing the flat surface to precisely locate and form vias in the flat surface;providing a plurality of IC chips, each having conductive bumps connected to the terminals of the IC chip;inserting the conductive bumps of the IC chips through the vias in the flat neo-wafer surface, in order to precisely locate the chips with respect to one another, and in order to expose the conductive bumps to suitable electrical connections on the other side of the flat neo-wafer surface from the IC chips;covering the chips in the neo-wafer with non-conductive encapsulating material which supports the chips; anddicing the neo-wafer to provide a plurality of separate stackable layers, each having the same area and each containing at least one encapsulated chip.