Patent ID: 9201549
Filing Date: 2015-12-01
Classification: G06F,G09G

Abstract:
1. A display driver circuit comprising: a capacitor configured to provide a plurality of voltages to a display via a supply rail, wherein the capacitor is coupled in series with a chip on glass (COG) circuit and a flex on glass (FOG) circuit of the display; a plurality of resistors, wherein each of the plurality of resistors has substantially the same resistance value and wherein at least one of the plurality of resistors is associated with a matching error; closing a first switch of the plurality of switches, thereby discharging the capacitor via a first resistor; measuring a first amount of time between when the capacitor has a first voltage value and when the capacitor discharges to a second voltage value via the first resistor; opening the first switch after the capacitor discharges to the second voltage value; closing a second switch of the plurality of switches, thereby discharging the capacitor via a second resistor; measuring a second amount of time that corresponds to an amount of time between when the capacitor has the first voltage value and when the capacitor discharges to the second voltage value via the second resistor; measuring a third amount of time that corresponds to an amount of time between when the capacitor has the first voltage value and when the capacitor discharges to the second voltage value via the first resistor and the second resistor; and determining the sum of the COG resistance value and the FOG resistance value based at least in part on the first amount of time, the second amount of time, the third amount of time, and the matching error.