Patent ID: 6181212
Filing Date: 2001-01-30
Classification: H03C,H03D,H03L,H04B

Abstract:
An integrated circuit having a phase locked loop circuit, said phase locked loop circuit generating first and second local oscillator output signals, comprising:an oscillator having an output;a phase comparator having a first input coupled to said output of said oscillator, said phase comparator further having a second input and an output, said output indicative of a phase difference between signals at its first and second inputs;a voltage controlled oscillator having an input coupled to said output of said phase comparator and an output, said voltage controlled oscillator generating a signal at its output having a frequency that is a function of the output of the comparator, said output comprising said first local oscillator output signal;a first frequency divider having an input coupled to said output of said voltage controlled oscillator, and an output coupled to said second input of said phase comparator, said first frequency divider capable of dividing the frequency of a signal presented to its input by at least first and second division factors and having a control input for accepting a signal to select said division factor, said output of said first frequency divider comprising said second local oscillator output signal; anda .SIGMA./.DELTA. converter having an output coupled to said control input of said first frequency divider for setting an average division factor of said first frequency divider, said .SIGMA./.DELTA. converter being controlled by a control signal establishing the frequency to be generated at said output of said first frequency divider.