Patent ID: 7523367
Filing Date: 2009-04-21
Classification: G01R

Abstract:
1. A method of testing a device, comprising: (a) randomly selecting a first entry from a plurality of entries from a set of one or more access tables, the entry including at least an address field, a read data field, a read data mask field, a write data field, and a write data mask field, wherein the access table from which the first entry was selected indicates an order in which a write access and a read access are to be performed relative to each other, wherein a read data field, a read data mask field, a write data field, and a write data mask field of a respective entry each corresponds to a respective address field in the respective entry, and wherein each address field of a respective entry corresponds to a different register of the device; (b) generating randomized write data by randomly assigning logical values to one or more bits of data in the write data field, wherein the write data mask field identifies bits in the write data field to be excluded from the random assigning of logical values, thereby preserving original logical values at bit locations identified by the write data mask field; step (c): performing the write access to write the randomized write data to a first register of the device identified by the address field; (d) subsequently, performing the read access to the first register of the device identified by the address field; (e) comparing data received from the device, in response to the read access, to data in the read data field, wherein the read data mask field identifies bits in the read data field to be excluded from the comparison; and (f) repeating steps (a)-(e) to access multiple registers.