Patent ID: 8184414
Filing Date: 2012-05-22
Classification: H01L,H03K,Y10T

Abstract:
1. An input/output (I/O) cluster, comprising: a first I/O pad comprising a first type transistor disposed at a first end of the first I/O pad, and a second type transistor disposed away from the first end; and a second I/O pad comprising another first type transistor disposed at a first end of the second I/O pad, and another second type transistor disposed away from the first end, the second I/O pad being adjacent to and positioned side-by-side with the first I/O pad so the first type transistor is closer to the other first type transistor than to the other second type transistor and the second type transistor is closer to the other second type transistor than to the other first type transistor, the first I/O pad and the second I/O pad defining a first I/O pad pair.