Patent ID: 8415808
Filing Date: 2013-04-09
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a substrate including a single row of aligned contact pads; a first semiconductor die mounted on the substrate and having a first set of die bond pads, an x-axis and a y-axis being parallel with orthogonal edges of the first semiconductor die; a second semiconductor die mounted on top of the first semiconductor die and having a second set of die bond pads, the second semiconductor die being offset along the x-axis with respect to the first semiconductor die, and the second semiconductor die being staggered along the y-axis with respect to the first semiconductor die; a first set of wire bonds between the first set of die bond pads and contact pads in the single row of contact pads on the substrate; and a second set of wire bonds between the second set of die bond pads and contact pads in the single row of contact pads on the substrate, the first and second sets of wire bonds interspersed with each other.