Patent ID: 7358149
Filing Date: 2008-04-15
Classification: H01L

Abstract:
1. A method for fabricating an integrated circuit comprising a conductive transistor gate formed over an active area of a semiconductor substrate, the active area having a first conductivity type, the method comprising: (a) forming one or more isolation trenches in the semiconductor substrate, the one or more trenches comprising a first sidewall surface on a first side of the active area and a second sidewall surface on a second side of the active area, the second side being opposite to the first side; (b) introducing a dopant of the first conductivity type into the active area through the first and second sidewall surfaces by an ion implantation, wherein the active area includes a first region implanted through the first sidewall surface and a second region implanted through the second sidewall surface, and the first and second regions overlap with each other.