Patent ID: 7102558
Filing Date: 2006-09-05
Classification: H03M

Abstract:
1. A reference voltage switching arrangement for a five level feed-back digital-to-analog converter used with a switched capacitor sigma-delta analog-to-digital converter, said reference voltage switching arrangement comprising: a plus reference voltage capacitor having a capacitance of C/2; a minus reference voltage capacitor having a capacitance of C/2; a first pair of switches adapted for switchably coupling the plus and minus reference voltage capacitors to plus and minus reference voltages, respectively; a second pair of switches adapted for switchably coupling the plus and minus reference voltage capacitors to the minus and the plus reference voltages, respectively; and a third switch adapted for switchably coupling the plus and minus reference voltage capacitors together, wherein the first pair of switches, the second pair of switches, and the third switch are sequenced in a charge phase and a transfer phase to produce five equally distributed charge levels of C*V