Patent ID: 8330546
Filing Date: 2012-12-11
Classification: H03F,H03G

Abstract:
1. A power amplification circuit comprising: a power amplifier having a first input to receive an input signal, a second input to receive a gain control signal, and an output to provide an amplified output signal based upon the input signal and the gain control signal; an RF detector having an input coupled to the output of the power amplifier and an output to provide a detection signal indicative of a logarithm of a power of the amplified output signal; an error amplifier having a first input to receive an amplification control signal, a second input to receive a signal that is based on the detection signal and an output electrically coupled to the second input of the power amplifier; a saturation detector having a first input to receive the gain control signal, a second input to receive a reference signal and an output to provide a saturation detection signal in response to the gain control signal differing in voltage from the reference signal by less than a first predetermined voltage; and an offset circuit having a first input to receive the saturation detection signal, a second input electrically coupled to the second input of the error amplifier and an output electrically coupled to the first input of the error amplifier, the offset circuit being configured to decrease a voltage level of the amplification control signal by up to a second predetermined voltage in response to the saturation detection signal and the amplification control signal differing in voltage from the signal that is based on the detection signal by less than the second predetermined voltage.