Patent ID: 6212050
Filing Date: 2001-04-03
Classification: H01L,H03K

Abstract:
An apparatus within an integrated circuit comprising:a protection circuit having associated therewith a maximum terminal voltage difference, which, if exceeded, causes failure of the protection circuit;a power supply circuit coupled between the protection circuit and an internal power supply provided within the integrated circuit comprising a first p-channel field effect transistor having a first known resistance between a source terminal and a drain terminal when the first p-channel field effect transistor is in a first known state, and having a bulk terminal coupled to a source terminal;a pass circuit coupled to the protection circuit and to the power supply circuit at a common node and comprising a second p-channel field effect transistor having a second known resistance between a source terminal and a drain terminal when the second p-channel field effect transistor is in a second known state, and having a bulk terminal coupled to a source terminal, and wherein the pass circuit cooperates with the power supply circuit to reduce a terminal voltage difference across the protection circuit by an amount not limited by the gate-source voltage of the first p-channel field effect transistor, and by an amount not limited by the gate-source voltage of the second p-channel field effect transistor, in the event of failure of the internal power supply; anda variable voltage supply circuit coupling the pass circuit to an external power supply provided from outside the integrated circuit.