Patent ID: 7805701
Filing Date: 2010-09-28
Classification: H01L

Abstract:
1. For use in producing a semiconductor integrated circuit that includes a plurality of metal layers and a plurality of via layers, a method of incorporating a spare logic gate provided in the semiconductor integrated circuit into a target logic circuit provided in the semiconductor integrated circuit, the method comprising: selecting one of a plurality of logic functions for the spare logic gate, wherein each logic function is associated with at least one data input of the spare logic gate, and the selection of one of the logic functions determines the at least one data input of the spare logic gate that is connected to a supply voltage; selecting one of the metal layers which defines therein a node of the target logic circuit that is to be connected to a first control input of the spare logic gate; and modifying a photolithographic mask associated with the selected metal layer and using the modified photolithographic mask to (i) connect the node of the target logic circuit to the first control input of the spare logic gate and (ii) connect the at least one data input of the spare logic gate to the supply voltage.