Patent ID: 7687371
Filing Date: 2010-03-30
Classification: H01L

Abstract:
1. A method of forming an isolation structure of a semiconductor device, the method comprising the steps of: forming a hard mask layer on a semiconductor substrate having an active region and a field region, wherein the hard mask exposes the field region; forming a trench by etching the exposed field region of the semiconductor substrate using the hard mask as an etch mask; forming an spin on glass (SOG) layer in a portion of the trench to partially fill the trench; forming an amorphous aluminum oxide layer at least on the SOG layer; forming a high density plasma (HDP) layer on the amorphous aluminum oxide layer to completely fill the trench; chemical mechanical polishing any HDP layer and any amorphous aluminum oxide layer on the hard mask to expose the hard mask; removing the hard mask and portions of the amorphous aluminum oxide layer that are formed on the HDP layer; and crystallizing the amorphous aluminum oxide layer.