Patent ID: 6043700
Filing Date: 2000-03-28
Classification: G06G

Abstract:
A pseudo-four-quadrant analog multiplier circuit for receiving a first input voltage, a second input voltage and a third input voltage, and for generating an output voltage, said multiplier comprising:first and second voltage to current converters each including a resistive element and each receiving a level-shifted voltage of one of said multiplier input voltages and a level-shifted voltage of a reference voltage and in response thereto generating first and second currents substantially proportional to said respective level-shifted multiplier input voltage and said level-shifted reference voltage respectively;a first voltage generator for receiving said first and second currents of said first voltage to current converter and in response thereto generating a first and a second voltage, said first voltage generator comprising a first and a second diode-connected bipolar transistor, each diode-connected bipolar transistor being connected in series with a resistive element having a positive temperature coefficient, wherein each said transistor of said first voltage generator receives a different one of said first and said second currents of said first voltage to current converter;a second voltage generator for receiving said first and second currents of said second voltage to current converter and in response thereto generating a first and a second voltage, said second voltage generator comprising a first and a second diode-connected bipolar transistor, each diode-connected bipolar transistor being connected in series with a resistive element having a positive temperature coefficient, wherein each said transistor of said second voltage generator receives a different one of said first and said second currents of said second voltage to current converter;an output stage for receiving the third multiplier input voltage and the respective first and second voltages generated in each of said first and second voltage generators and in response thereto generating said output voltage.