Patent ID: 6219280
Filing Date: 2001-04-17
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device comprising nonvolatile memory cells, redundant memory cells switchable from said nonvolatile memory cells, means for performing a write and erase in and from said nonvolatile memory cells, erase verify means for sequentially verifying erase of said nonvolatile memory cells one by one, count means for counting said nonvolatile memory cells that are not erased to a predetermined state, comparison means for comparing a count value of said count means with a set value set based on the number of redundant memory cells, and control means for controlling respective functions of said erase verify means, said count means, and said comparison means on the basis of a comparison result of said comparison means, said control means controlling the respective functions of said erase verify means, said count means, and said comparison means so as to execute erase verify for nonvolatile memory cells to be verified next until the count value exceeds the set value.