Patent ID: 8003991
Filing Date: 2011-08-23
Classification: H01L

Abstract:
1. An SiC MOSFET using a unit cell as a component element, comprising: a first conducting-type silicon carbide substrate; a low-density first deposit film of first conducting-type silicon carbide formed on the first conducting-type silicon carbide substrate; a low-density second deposit film of second conducting-type silicon carbide formed on the low-density first deposit film; a first base region of the first conducting type, a second base region of the first conducting type and a gate region of the second conducting type formed selectively in the low-density second deposit film so that the first base region and the second base region penetrate the low-density second deposit film and contact directly the low-density first deposit film; a gate electrode disposed at least on a surface of the gate region of the second conducting type via a gate insulating film; a high density source region of the first conducting type formed selectively in the gate region of the second conducting type; a drain electrode connected at low resistance to a surface of the first conducting-type silicon carbide substrate; a high density gate layer of the second conducting type interposed between the low-density first deposit film and the low-density second deposit film, wherein the high density gate layer of the second conducting type is provided with a first partially deficient part and a second partially deficient part in regions defined by projections of the first base region and second base region of the first conducting type, respectively, and wherein the low-density second deposit film is enabled to contact directly the low-density first deposit film in the first partially deficient part and second partially deficient part; and a source electrode connected at a low resistance to surfaces of the high density source region and gate region and adapted to form a Schottky barrier on a surface of the second base region of first conducting type.