Patent ID: 6118417
Filing Date: 2000-09-12
Classification: G09G,H01J

Abstract:
A field emission display for displaying a plurality of pixels so that each respective pixel has a respective desired luminance, comprising:(A) a plurality of pixels arranged in a matrix of intersecting rows and columns so that the number of pixels is M times N, where M and N denote the number of rows and columns, respectively, there being one pixel at each intersection of one row and one column, wherein each pixel comprises(1) one or more field emitter tip electrodes,(2) a transistor having a gate, a source, and a drain, the drain being connected to the field emitter tip electrodes, and(3) a resistor having first and second terminals, the first terminal being connected to the source of the transistor;(B) a plurality of row conductors, the number of row conductors being said number M, wherein for each integer ""i"" from 1 through M, the i-th row conductor connects to the second terminal of the resistor of each of the pixels in the i-th row;(C) a plurality of column conductors, the number of column conductors being said number N, wherein for each integer ""k"" from 1 through N, the k-th column conductor connects to the gate of the transistor of each of the pixels in the k-th column; and(D) a video decoder circuit connected to each of the row and column conductors, wherein the video decoder circuit repeatedly cycles through M successive row scanning periods such that, for each integer ""i"" from 1 through M,(1) for each integer ""k"" from 1 through N, during a k-th time interval within the i-th row scanning period the video decoder applies to the k-th column conductor a k-th ""luminance"" voltage L.sub.C (k), wherein the video decoder establishes the value of the k-th luminance voltage L.sub.C (k) as a function of the desired luminance of the pixel at the intersection of the i-th row and the k-th column,(2) during a portion of the i-th row scanning period, the video decoder applies to the i-th row conductor a voltage having an ""enable"" value which biases the transistor of each pixel in the i-th row so that said transistor conducts current from the i-th row conductor to the field emitter tip electrodes of that pixel in proportion to the voltage on the gate of said transistor, and(3) during substantially all row scanning periods other than said i-th row scanning period, the video decoder applies to the i-th row conductor a voltage having a ""disable"" value which biases the transistor of each pixel in the i-th row so that said transistor does not conduct current;(E) wherein the voltage applied by the video decoder to the row conductors is the only substantial source of electrical power to the field emitter tip electrodes.