Patent ID: 6222238
Filing Date: 2001-04-24
Classification: H01L,Y10S

Abstract:
An integrated circuit comprising:at least one n-channel transistor having a gate, a source and a drain;at least one p-channel transistor having a gate, a source and a drain;at least one spacer located adjacent the gate of said n-channel transistor; andat least one additional spacer located adjacent the gate of said p-channel transistor, said at least one additional spacer being different in size than the at least one spacer of said n-channel transistor, a relative size of said at least one spacer and said at least one additional spacer being selected to provide balanced operation of said n-channel transistor and said p-channel transistor in response to a variation in voltage of a voltage power source of said n-channel and p-channel transistors wherein said at least one additional spacer has a height substantially equal to a height of said at least one spacer.