Patent ID: 6451647
Filing Date: 2002-09-17
Classification: H01L

Abstract:
A process of fabricating a semiconductor device, comprising:providing a first semiconductor wafer; depositing on the first semiconductor wafer a layer comprising a high-K dielectric material layer; depositing on the layer comprising a high-K dielectric material a polysilicon or polysilicon-germanium layer; and forming a gate stack by plasma etching both a portion of the polysilicon or polysilicon-germanium layer and a portion of the layer comprising a high-K dielectric material, wherein the steps of plasma etching are carried out in a single chamber without moving the first wafer from the chamber and without opening the chamber, and wherein the step of plasma etching the polysilicon or polysilicon-germanium layer comprises providing a HBr/Cl2/HeO2 chemistry to the chamber.