Patent ID: 8487658
Filing Date: 2013-07-16
Classification: H01L,H03K

Abstract:
1. A multi-voltage circuit to shift each of two bits from a first voltage level logic to a second voltage level logic, comprising: a first N-well formed in a substrate; a second N-well formed in the substrate, adjacent to a side of the first N-well; a third N-well formed in the substrate, adjacent to a side of the first N-well opposite the second N-well; a first one-bit voltage level shift (VLS) circuit having a portion formed on the first N-well and a portion formed on the second N-well; and a second one-bit VLS circuit having a portion formed on the first N-well and a portion formed on the third N-well; the first one-bit VLS circuit and the second one-bit VLS circuit to provide a pair of output signals at the first N-well.