Patent ID: 8407410
Filing Date: 2013-03-26
Classification: G06F,G11C

Abstract:
1. A method for performing, in a memory system, the method comprising: receiving logical memory addresses; applying a randomizing function to the logical memory addresses to generate intermediate addresses within a range of intermediate addresses; mapping the intermediate addresses into physical addresses of a memory using an algebraic mapping, the physical addresses within a range of physical addresses that include at least one more location than the range of intermediate addresses; said mapping performed using a circular buffer having a physical address location and a gap address location not mapped to said intermediate address locations; outputting the physical addresses for accessing the memory; periodically shifting the mapping between the intermediate addresses and the physical addresses; detecting a bad block in the memory; and redirecting references to the bad block, the redirecting including storing a redirection address and one or more indicator bits indicating that the bad block includes the redirection address, the redirection address specifying a memory block containing data intended for the bad block, wherein memory access requests to the bad block are directed to the redirection address.