Patent ID: 6473435
Filing Date: 2002-10-29
Classification: H04Q

Abstract:
An apparatus for transferring packets comprising:a memory; an accumulation mechanism in which packets are stored until they are to be placed in the memory, said accumulation mechanism connected to the memory, the accumulation mechanism includes a plurality of queues in which packets are stored; and a controller connected to the memory and the accumulation mechanism which controls when packets in the accumulation mechanism are transferred to the memory, the controller preventing any packet in the accumulation mechanism from remaining in the accumulation mechanism indefinitely, the controller is connected to each queue and prevents a queue partially filled with packets from remaining partially filled indefinitely and the controller causes the packets in the partially filled queue to transfer to the memory, the controller transfers packets of the queue partially filled with packets when the queue partially filled with packets is then defined to be in a ready state, the controller checks the queue whether it is in the ready state whenever data of a packet is added to the queue, or data of the packet that contains only known packet boundary is removed from the queue.