Patent ID: 7409678
Filing Date: 2008-08-05
Classification: G06F

Abstract:
1. An optimization compiler embodied on a physical computer-readable medium comprising: an update instruction detecting section that detects, in a target program to be optimized, an update instruction to update a content of a variable or a content of a storage area specified by a variable; a series of instructions detecting section that detects a series of instructions in said target program, the series of instructions executes a different process corresponding to the content of said variable or the content of said storage area in response to control shifting to the process by a control shift instruction to shift the control to a different series of instructions; a series of instructions compile section that compiles the detected series of instructions by optimizing the series of instructions for a process executed if said variable or said storage area has a predetermined particular content; and a set instruction generating section that generates a set instruction to set a destination address in said control shift instruction to an address of said series of instructions optimized by said series of instructions compile section, the set instruction being executed between said update instruction and said control shift instruction in said target program if said variable or said storage area has said particular content; wherein: an attribute is specified for each variable in said target program, the attribute indicating a read and write allowable range of said target program within which an instruction to read or write the content of the variable is allowed to be executed; said update instruction detecting section detects an instruction to update each variable in said read and write allowable range for the variable, said series of instructions detecting section detects, in said read and write allowable range for the variable, a series of instructions that executes a different process corresponding to the content of the variable or the content of a storage area specified by the content of the variable; for each variable in said target program, said update instruction detecting section detects all update instructions for the variable or the storage area specified by the variable, in the read and write allowable range for the variable, if said update instruction detecting section detects all the update instructions for the variable or the storage area specified by the variable, said series of instructions compile section generates a specialized series of instructions by compiling said series of instructions detected by said series of instructions detecting section by optimizing the series of instructions for a process executed if the variable or the storage area has said particular content, and generates a normal series of instructions by compiling the series of instructions without optimizing the series of instructions for the process, for each update instruction detected by said update instruction, in a range of the program executed between the update instruction and said control shift instruction, said set instruction generating section sets said destination address to an address of said specialized series of instructions if the content updated by the update instruction is said particular one, and generates, as said set instruction, an instruction to set said destination address to an address of said normal series of instructions if the content updated by the update instruction is not said particular one; said set instruction generating section further generates a set instruction to set the destination address of each control shift instruction to an address of said normal series of instructions, in a reflection method of changing the content of the variable or the content of the storage area specified by the variable, from outside said read and write allowable range for the variable.