Patent ID: 6360292
Filing Date: 2002-03-19
Classification: G11C

Abstract:
A memory device command generator receiving command packets indicative of a memory command, the command generator comprising:a plurality of command units, each of the command units, when enabled, storing a plurality of command bits of a respective command packet received by the command generator and, when activated, outputting the command bits stored in the command unit, each of the command units comprising: a counter counting in one direction from an initial count to a terminal count responsive to a clock signal, the counting being initiated responsive to a start signal derived from a timing signal associated with the command packet received by a command unit when the command unit is activated by the command unit selector; and a start command generator generating a start command signal at one of a plurality of respective counts of the counter that are a function of the nature of the command indicated by the stored command bits; a command unit selector coupled to each of the command units, the command unit selector determining which of the command units are storing command bits, and enabling one of the command units that is not storing command bits to store a plurality of command bits from a command packet received by the command units at a first time, the command unit selector further activating one of the command units to output the command bits stored in the command unit at a second time that may be different from the first time; and a command processor coupled to the command units, the command processor receiving the command bits output from an activated command unit and processing the command bits to generate at least one command signal responsive thereto at a third time that may be different from the second time, the command processor processing the command bits to generate the command signal responsive to the start command signal.