Patent ID: 6954828
Filing Date: 2005-10-11
Classification: G06F

Abstract:
1. A data processing apparatus comprising: a processor; an n-way set associative cache having a plurality of entries, where n is an integer greater than 1, each entry being arranged to store one or more data values, the processor being operable to select one of the n-ways to operate in a lockdown mode, the lockdown mode being used to lock data values into the selected one of the n ways; and a plurality of lockdown controllers, each lockdown controller being associated with a corresponding way, each lockdown controller comprising: the processor being operable to set the disable unlocked allocation flag for all of said lockdown controllers other than the lockdown controller associated with said selected one of the n-ways in order to subsequently cause a number of data values for storage in the cache to be stored in that selected one of the n-ways, whereafter the processor is operable to set the disable unlocked allocation flag for the lockdown controller associated with said selected one of the n-ways in order to cause the data values stored in that way to become locked.