Patent ID: 7613901
Filing Date: 2009-11-03
Classification: G06F,H03M,Y02D

Abstract:
1. An integrated circuit package on a single chip, comprising: a processing core for operating on a set of instructions to carry out predefined processes; a plurality of comparators for performing compare operations within the integrated circuit package; at least one control register associated with each of the plurality of comparators for storing a first group of control bits controlling an amount of positive hysteresis of each of the plurality of comparators and a second group of control bits controlling an amount of negative hysteresis of each of the plurality of comparators; a crossbar switch for assigning an output of the plurality of comparators to package pins; and wherein when a comparator output is assigned to the package pins, the comparator output can be programmed by the processing core to operate in either an open drain mode or a push-pull mode.