Patent ID: 7064035
Filing Date: 2006-06-20
Classification: H01L

Abstract:
1. A method for fabricating a Mask ROM, comprising: forming a gate oxide layer on the substrate; forming a strip conductive structure on the gate oxide layer; forming a buried bit line in the substrate beside the strip conductive structure; patterning the strip conductive structure perpendicular to the buried bit line to form a plurality of gates; forming an insulator on the buried bit lines and between the gates; forming a coding layer and a word line thereon over the substrate perpendicular to the buried bit line, wherein the word line is formed over a gate and the insulator, and a portion of the coding layer between the gate and the word line constitutes a coding region of a memory cell; forming a coding mask over the substrate; and performing an implantation using the coding mask as a mask to dope the coding regions of selected memory cells, wherein after the implantation, the selected memory cells are in a logic state of 1 (or 0), and the other memory cells are in a logic state of 0 (or 1).