Patent ID: 6114071
Filing Date: 2000-09-05
Classification: G03F

Abstract:
A method for making a mask for optically transferring a lithographic pattern corresponding to an integrated circuit from said mask onto a semiconductor substrate by use of an optical exposure tool, said method comprising the steps of:forming a plurality of features on said mask, said features corresponding to elements forming said integrated circuit, andforming a plurality of non-resolvable biasing segments disposed on an edge of at least one of said features, said plurality of non-resolvable biasing segments disposed on an edge of at least one of said features being substantially equally spaced from one another by a distance--s, each of said plurality of said non-resolvable biasing segments having a predetermined width--w, and a predetermined length--d, said plurality of said non-resolvable biasing segments defining a critical halftone period which equals d+s,wherein said mask is utilized in a photolithography process comprising an exposure source having a wavelength--.lambda. and an imaging objective lens having a numerical aperture--NAo, and said critical halftone period of said non-resolvable biasing segments is less than 0.61 multiplied by (.lambda./NAo).