Patent ID: 9099362
Filing Date: 2015-08-04
Classification: G02F,G09G,H01L

Abstract:
1. A semiconductor device comprising: a driver circuit comprising: a first channel region; a second channel region; a third channel region adjacent to the first and the second channel region; a fourth channel region adjacent to the first and the second channel region; a fifth channel region; a first gate electrode overlapping with the first channel region and the second channel region, wherein the first gate electrode includes a first slit overlapping with the first channel region and a second slit overlapping with the second channel region; and a second gate electrode overlapping with the third channel region, wherein the second gate electrode includes a third slit overlapping with the third channel region, a third gate electrode overlapping with the fourth channel region, the third gate electrode electrically connected to the second gate electrode, wherein the third gate electrode includes a fourth slit overlapping with the fourth channel region, wherein the first gate electrode extends from a first position to a fourth position through turning right at a second position and turning left at a third position, wherein the first gate electrode overlaps with the first channel region at the first position, wherein the first gate electrode does not overlap with the first channel region and the second channel region at the second position and at the third position, wherein the first gate electrode overlaps with the second channel region at the fourth position, wherein the first gate electrode, the second gate electrode, and the third gate electrode do not overlap with one another, wherein a length of the first slit is larger than a channel width of the first channel region, wherein the first slit is positioned inside the first gate electrode, wherein the second slit extends to an edge of the first gate electrode, wherein the third slit extends to an edge of the second gate electrode, wherein the fourth slit extends to an edge of the third gate electrode, and wherein a channel width of a first transistor comprising the first channel region is at least twice as wide as a channel width of a second transistor comprising the fifth channel region.