Patent ID: 7572719
Filing Date: 2009-08-11
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: sequentially forming an oxide layer and a nitride layer on a substrate having a gate insulating layer and a gate formed in the order named thereon; forming a spacer at both sidewalls of the gate by etching the nitride layer; forming a source region and a drain region at both sides of the spacer in the substrate; removing the oxide layer formed on the gate and the substrate; removing oxygen at a surface portion of the gate and surface portions of the source region and the drain region by partially removing the surface portion of the gate, and the surface portions of the source region and the drain region; and depositing and thermally annealing a metal layer on surfaces of the gate, the source region, and the drain region, whose surface portions are partially removed, to form a salicide layer; wherein removing the oxide layer further comprises performing a wet etch process using an oxide etchant and a buffered oxide etchant (BOE) to adjust the etch rate of the oxide layer, and wherein partially removing the surface portion of the gate and the surface portions of the source region and the drain region comprises performing a wet etch process using a silicon etchant containing both H