Patent ID: 6728381
Filing Date: 2004-04-27
Classification: H03H,H04N

Abstract:
A noise reducing circuit comprising:a first signal path for receiving an input signal and outputting a noise component contained in the input signal; a second signal path for receiving the input signal and outputting a first correlating signal correlating to the input signal; and a first calculating means for calculating the noise component outputted from said first signal path and the input signal to reduce noise, wherein said first signal path includes a plurality of bandpass filters for extracting a plurality of first predetermined frequency components contained in the input signal, a plurality of limiters for individually receiving outputs of said bandpass filters, and a first creating means for creating the noise component based on outputs of said limiters, wherein said first creating means includes a second correlating signal creating means for creating a second correlating signal correlating to the input signal, and a second calculating means for subtracting the second correlating signal at least from second predetermined frequency components in the outputs of said limiters, and wherein said second calculating means includes a first adding means for adding the second predetermined frequency components together, and a first subtracting means for subtracting the second correlating signal from a first additional signal outputting from said first adding means.