Patent ID: 8846541
Filing Date: 2014-09-30
Classification: G11C,H01L

Abstract:
1. A method of manufacturing a NAND device having a cell array region and a peripheral region, the method comprising: forming a feature layer in the cell array region and the peripheral region; forming a first structure on the feature layer in the cell array region and a second structure on the feature layer in the peripheral region; forming a first spacer on a sidewall of the first structure and a second spacer on a sidewall of the second structure; removing the first structure while maintaining at least a portion of the second structure; and forming first feature patterns in the cell array region and a second feature pattern in the peripheral region by simultaneously etching the feature layer in the cell array region and the peripheral region using the first spacer, the second spacer, and the at least the portion of the second structure as an etch mask.