Patent ID: 6187652
Filing Date: 2001-02-13
Classification: H05K

Abstract:
A method of fabricating a multi-layer substrate, comprising:providing a first substrate element having an upper and a lower surface and a conductive pad arranged on the upper surface of the element, wherein the conductive pad is in the form of at least a portion of a ring;providing a second substrate element having an upper and a lower surface and a conductive pad arranged on each of the upper and lower surfaces, and a conductive via which connects the conductive pads on the upper and the lower surfaces of the second substrate element;vertically aligning the conductive pad of the first substrate element to the conductive pad of the second substrate element;laminating the first substrate element to the second substrate element;drilling a via hole extending through the conductive pad of the first substrate element to the conductive pad of the second substrate element, wherein the conductive pad of the second substrate element stops the drilling; andfilling the via hole with a conductive material.