Patent ID: 6823014
Filing Date: 2004-11-23
Classification: H04N

Abstract:
A video decoder comprising:a VLD for analyzing a received compressed bitstream; an IQ for inverse quantizing the bitstream analyzed at the VLD; an IDCT for inverse discrete cosine transform of a data from the IQ in macro block units; an MC for making motion compensation of a data up sampled by using motion vectors, a motion type, and a motion vertical field selection signal extracted at the VLD; a DCT buffer for separating a data from the IDCT into a top field data and a bottom field data by using a DCT type signal, a picture structure signal, and a progressive sequence signal extracted at the VLD; an MC buffer for separating a data from the MC into a top field data and a bottom field data by using the DCT type signal, the picture structure signal, and the progressive sequence signal; a first adder for adding the top field data from the DCT buffer and the top field data from the MC; a second adder for adding the bottom field data from the DCT buffer and the bottom field data from the MC; an adaptive down sampler for subjecting added top field data and added bottom field data from above two adders to adaptive down sampling, and storing in an external memory; and, an adaptive up sampler for up sampling a down sampled data stored in the external memory and providing to the MC.