Patent ID: 6647542
Filing Date: 2003-11-11
Classification: H01L

Abstract:
A method of masking a semiconductor substrate to form high and low voltage devices comprising:applying a first mask over a first surface of said substrate, said mask including a first aperture; doping a first region of said substrate through said first aperture; removing said first mask from over said first surface; applying a second mask over said first surface, said second mask including a second aperture; doping a second region of said substrate through said second aperture, said first and second regions being non-intersecting regions; redoping said second region of said substrate through said second aperture; removing said second mask from over said first surface; applying a third mask over said first surface, said third mask including third and fourth apertures, said third aperture being disposed over said first region and said fourth aperture being disposed over said second region; doping a portion of said first region aligned with said third aperture and doping a portion of said second region aligned with said fourth aperture; removing said third mask from over said first surface; forming first and second electronic devices in said first and second regions respectively; and forming a third electronic device in said portion of said second region aligned with said fourth aperture.