Patent ID: 6757785
Filing Date: 2004-06-29
Classification: G06F

Abstract:
A method for improving cache memory performance in a data processing system having multiple processing units, said method comprising:partitioning a main memory data structure into a plurality of exclusive substructures and at least one sharing substructure; storing a first exclusive substructure of the plurality of exclusive substructures, assigned to a first processing unit, only in a first exclusive cache memory area associated with said first processing unit from said multiple processing units; and storing one of said at least one sharing substructure only in a first shared cache memory area associated with said first processing unit and a second shred cache memory area associated with a second processing unit of said multiple processing units, wherein said first exclusive substructure of the plurality of exclusive substructures is accessible only to said first processing unit, and said one of said at least one substructure is accessible only to said first and second processing units.