Patent ID: 7519802
Filing Date: 2009-04-14
Classification: G06F

Abstract:
1. A computer system, comprising: at least one processor; a plurality of control registers, each having a value that defines at least one operating characteristic for an associated component of the computer system; memory that stores configuration data for at least some of the plurality of control registers; a configuration system that operates in a configuration mode associated with a boot process of the at least one processor, the configuration system accessing the configuration data to program at least one of the plurality of control registers with corresponding configuration data as part of the configuration mode; a register controller coupled to program at least some of the plurality of control registers; a configuration control register having state information that is programmed with a first value to cause the configuration system to enter the configuration mode, the configuration control register being programmed with a second value to terminate the configuration mode in response to corresponding configuration data from the memory, the configuration control register being communicatively coupled to cause the at least one processor of the computer system to operate in a reset mode that inhibits operation thereof based on the state information being programmed with the first value; and an address decoder that routes the configuration data to the register controller for programming the state information of the configuration control register and for programming the at least some of the plurality of control registers based on system address data stored in association with the configuration data in the memory.