Patent ID: 7363394
Filing Date: 2008-04-22
Classification: G06F

Abstract:
1. An Identification (ID) configuration method applied to a computer system with a plurality of central processor units (CPUs), wherein each CPU has at least one local advanced programmable interrupt controller (APIC) for communication with a plurality of input/output (I/O) APICs in the computer system to process interrupt requests, the method comprising the steps of: assigning a postponed ID to each local APIC of the CPUs respectively, the value of each postponed ID being not smaller than the number of a plurality of reserved IDs and the number of the reserved IDs being not smaller than the number of the I/O APICs; and assigning the reserved IDs to the I/O APICs; wherein the postponed IDs and the assigned reserved IDs are written into a multiprocessor (MP) configuration table in a BIOS of the computer system.