Patent ID: 8832538
Filing Date: 2014-09-09
Classification: H03M,H04L

Abstract:
1. A method of detecting data transmission errors in an Inter-Integrated Circuit (‘I 2 C’) system, the I 2 C system comprising an I 2 C source device, an I 2 C destination device, and a data transmission signal line coupling the I 2 C source device and the I 2 C destination device, the data transmission signal line configured to carry data transmission signals between the I 2 C source device and the I 2 C destination device, the method comprising: receiving, by the I detecting, by the I if the detected rise time of the preselected bit is less than a predefined threshold, determining that the I if the detected rise time of the preselected bit is not less than a predefined threshold, determining that the I determining, by the I