Patent ID: 7485574
Filing Date: 2009-02-03
Classification: H01L

Abstract:
1. A method of forming a metal line in a semiconductor device, comprising: sequentially depositing a first etch stop layer, an interlayer insulating layer, a second etch stop layer, and a line insulating layer over a semiconductor substrate; forming a contact hole pattern on the line insulating layer; forming a contact hole by etching an exposed portion of the line insulating layer, the second etch stop layer, and the interlayer insulating layer using the contact hole pattern as a mask; forming a trench pattern on the line insulating layer; forming a trench by etching an exposed portion of the line insulating layer using the trench pattern as a mask; removing exposed portions of the first etch stop layer and the second etch stop layer after forming the contact hole and the trench; forming a barrier metal layer in the contact hole and the trench; forming a first metal seed layer on the barrier metal layer in a lower portion of the contact hole; forming a first metal thin film only within the contact hole on the first metal seed layer; forming a second metal seed layer on the barrier metal layer in the trench and a portion of the contact hole where the first metal thin film is absent; and forming a second metal thin film on the second metal seed layer.