Patent ID: 6952734
Filing Date: 2005-10-04
Classification: G06F,H04L

Abstract:
1. A node for a storage area network comprising: at least one processor; at least one port for connection to a storage area network coupled to the at least one processor; and a memory system coupled to the at least one processor; wherein the memory system contains machine readable instructions comprising instructions for: determining a status associated with the at least one port, the status capable of having at least an active, a normal, a probationary, and a failed value; when the status has a failed value, of detecting a repair associated with the at least one port and when repair is detected advancing the status to a value selected from the group consisting of active and probationary status; detecting when the port operates without error for a predetermined period and thereupon advancing the status from the probationary value to a value selected from the group consisting of active and normal; and preferentially routing exchanges over a port of the at least one port having a status value selected from the group of active and normal when a port having such status exists and a target node of the exchange is reachable over that port.