Patent ID: 9018613
Filing Date: 2015-04-28
Classification: H01L

Abstract:
1. A semiconductor memory device, comprising, in the case that three mutually intersecting directions are assumed to be an X direction, a Y direction, and a Z direction: a semiconductor substrate having as principal plane a plane extending in the X direction and the Y direction; and a memory cell block formed on the semiconductor substrate and configured having a plurality of memory cell arrays aligned in the Y direction, each of the memory cell arrays including a plurality of column lines extending in the Z direction and arranged in the X direction, a plurality of row lines extending in the X direction and arranged in the Z direction, and a plurality of memory cells disposed at each of intersections of the plurality of column lines and the plurality of row lines, each of the memory cells including a variable resistance element having a transition metal oxide as a material, at least one of the plurality of column lines and the plurality of row lines being a polysilicon wiring line having polysilicon as a material, the memory cell block including a block film between the variable resistance element of the memory cell and the polysilicon wiring line, and the block film configured from silicon nitride, silicon oxynitride, or silicon oxide.