Patent ID: 8742797
Filing Date: 2014-06-03
Classification: G11C

Abstract:
1. A high speed double switched track-and-hold circuit operable at sampling bandwidths greater than 10 GHz comprising: a track-and-hold core circuit including a switched amplifier circuit for tracking the input signal in a track mode and isolating the input signal from a track-and-hold output in a hold mode; and; an input buffer amplifier including: a differential amplifier stage, an additional switched amplifier circuit comprising a switchable emitter follower buffer coupled to the output of the differential amplifier stage and the track-and-hold core circuit, a clamping circuit coupled to outputs of the switchable emitter follower buffer configured to clamp a signal at the output of the input buffer amplifier during the hold mode and configured to divert current from the switchable emitter follower buffer in the hold mode, and the additional switched amplifier circuit in combination with the clamping circuit configured to provide minimal input capacitive loading, low output impedance in the track mode, and high output impedance in the hold mode to enable sampling bandwidths greater than 10 GHz and simultaneous switching of the track-and-hold core circuit and the switchable emitter follower to provide enhanced isolation.