Patent ID: 8030773
Filing Date: 2011-10-04
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device comprising: a first linear interconnection layer; a second linear interconnection layer having a same width as the first linear interconnection layer and having a portion disposed above the first linear interconnection layer to overlap with each other in a line direction, the second linear interconnection layer having one end portion; a third linear interconnection layer disposed near the second linear interconnection layer and apart from the one end portion of the second linear interconnection layer; a first conductor layer electrically connecting the first linear interconnection layer and the second linear interconnection layer to each other, and overlapping with the first linear interconnection layer and the second linear interconnection layer; and a second conductor layer for redundancy, disposed by a side of the first conductor layer and at the end portion of the second linear interconnection layer so as to face the third linear interconnection layer, and electrically connecting the first linear interconnection layer and the second linear interconnection layer to each other, no portion of the second linear interconnection layer being extended from a portion connected to the second conductor layer toward the third linear interconnection layer.