Patent ID: 6818546
Filing Date: 2004-11-16
Classification: H01L

Abstract:
A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:(a) forming a groove for wiring in a first insulating film formed on a semiconductor substrate; (b) successively forming a barrier layer and a conductive film over said first insulating film including the inside of said groove for wiring and removing said barrier layer and said conductive film from outside of said groove for wiring by polishing, thereby forming a wiring; (c) cleaning a surface of said first insulating film to remove conductive film that remains on said first insulating film in said step (b), and to improve plating selectivity and ability for preferential growth; (d) forming a cap conductive film on said wiring by selective growth or preferential growth of said cap conductive film on said wiring; (e) cleaning a surface of said first insulating film after said step (d) to remove undesired cap conductive film grown on the surface of said first insulating film; and (f) forming a second insulating film over said cap conductive film and said first insulating film.