Patent ID: 7411804
Filing Date: 2008-08-12
Classification: G09G,G11C

Abstract:
1. An integrated circuit device, comprising: first to Nth circuit blocks (N is an integer larger than one) disposed along a first direction, when the first direction is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side, the first to Nth circuit blocks including at least one memory block that stores image data, and at least one data driver block that drives data lines, the at least one memory block including a memory cell array, a row address decoder that selects a worldline from a plurality of worldlines of the memory cell array, and a sense amplifier block that outputs image data read from the memory cell array to the at least one data driver block, the row address decoder being disposed so that a longitudinal direction of the row address decoder coincides with the first direction, and the sense amplifier block being disposed so that a longitudinal direction of the sense amplifier block coincides with the second direction.