Patent ID: 6774398
Filing Date: 2004-08-10
Classification: G02F,H01L

Abstract:
A thin film transistor panel comprising:an insulating substrate having a display area and a surrounding area; a first signal line formed on the insulating substrate; a second signal line formed on the insulating substrate and insulated with and intersecting the first signal line to define the display area; a plurality of driving signal lines formed on the surrounding area of the insulating substrate and connected to a Voff voltage applying terminal; a plurality of inspection signal lines formed on the surrounding area of the insulating substrate; a first thin film transistor for inspection having a drain electrode coupled to the first signal line, a source electrode coupled to any one of the inspection signal lines and a gate electrode coupled to any one of the driving signal lines; and a second thin film transistor for inspection having a drain electrode coupled to the second signal line, a source electrode coupled to any one of the inspection signal lutes and a gate electrode coupled to any one of the driving signal lines.