Patent ID: 6606118
Filing Date: 2003-08-12
Classification: H04N

Abstract:
A clamping circuit of a solid-state imaging apparatus for receiving a pixel signal including a black level and a signal level through a signal line and outputting the pixel signal with noise being suppressed, the clamping circuit comprising:a first capacitance and an inverting amplifier inserted into the signal line and connected to each other in series; a first switch and a second switch connected to each other in series to form a serial circuit; and a second capacitance connected between the first and second switches of the serial circuit and a constant potential, wherein: both sides of the serial circuit including the first switch and the second switch are connected to an input side and an output side of the inverting amplifier, respectively; the first switch and the second switch are opened and closed in synchronization with a clock signal; and a time constant defined by an output-side impedance of the inverting amplifier and the second capacitance when the first switch and the second switch are closed is sufficiently greater than a cycle of the clock signal.