Patent ID: 6483738
Filing Date: 2002-11-19
Classification: G11C

Abstract:
A method for driving a nonvolatile ferroelectric memory device that includes a main cell provided with a transistor and a main cell wordline, a bitline, a first voltage applying line, and a reference cell provided with at least one transistor, a reference wordline and one or more ferroelectric capacitors, the method comprising the steps of:primarily activating the main cell wordline and the reference wordline with respective high level signals in an active period of one cycle; deactivating the main cell wordline and the reference wordline; activating a sensing amplifier with a high level signal after the main cell wordline is inactivated; secondarily activating the main cell wordline with a high level signal during a period in which the sensing amplifier is activated in the active period; applying a high level signal at least one time or more to the first voltage applying line to be coincident with the secondary active period of the main cell wordline during at least one point of time; and transiting a chip enable signal from low to a high signal level to precharge the chip enable signal.