Patent ID: 6849945
Filing Date: 2005-02-01
Classification: H01L

Abstract:
1. A multi-layered semiconductor device characterized in that a film-like semiconductor package incorporating therein a semiconductor chip is disposed in a package accommodation opening of a circuit pattern layer to form a circuit board, said circuit pattern layer comprises a substrate, a circuit pattern formed on the substrate, and said package accommodation opening, and a plurality of such circuit boards are layered together to electrically connect said circuit patterns of the respective circuit boards with each other, wherein the electrical connection between the circuit patterns on the respective circuit boards is performed via a low melting point metal filled in a through-hole formed in the semiconductor package or the circuit board, and the electric connection between the semiconductor package and a circuit pattern layer accommodating the semiconductor package is performed by connecting an extension of the circuit pattern, formed on the semiconductor package to project outside the package, with an electrode pad of the circuit pattern layer.