Patent ID: 7969521
Filing Date: 2011-06-28
Classification: G02F

Abstract:
1. A method for fabricating an LCD device comprising: preparing a substrate including a multitude of pixel regions; forming a gate line and a light-shielding layer on the substrate; sequentially forming a gate insulation layer, a semiconductor material layer, an impurity semiconductor material layer, a metal layer, and a photoresist layer on a surface of the substrate including the light-shielding layer; forming a photoresist pattern having first and second thicknesses by performing a diffraction exposure process to the photoresist layer, wherein the first thickness is different from the second thickness; forming a semiconductor layer, an ohmic contact layer, and a data line by using the photoresist pattern as a mask to remove exposed portions of the semiconductor material layer, the impurity semiconductor material layer, and the metal layer; exposing a predetermined portion of the data line by ashing the photoresist pattern; forming a preliminary contact hole to expose the semiconductor layer by using the ashed photoresist pattern as a mask to remove exposed portion of the data line; forming a passivation layer on the surface of the substrate including the data line; forming a first contact hole to expose the light-shielding layer by etching the passivation layer, the semiconductor layer, the ohmic contact layer and the gate insulation layer provided above the light-shielding layer; and forming a connection layer inside the first contact hole, wherein the light-shielding layer is connected to the data line through the connection layer; forming a thin film transistor adjacent to a crossing of the gate and data lines; and forming a pixel electrode in each of the pixel region, wherein the pixel electrode is electrically connected with the thin film transistor; wherein the process of forming the thin film transistor and the pixel electrode includes: 1) forming a gate electrode connected with the gate line; 2) sequentially forming a gate insulation layer, a semiconductor material layer, an impurity semiconductor material layer, a metal layer, and a photoresist layer on a surface of the substrate including the gate electrode; 3) forming a photoresist pattern having the different first and second thicknesses by performing a diffraction exposure process to the photoresist layer; 4) forming a semiconductor layer, an ohmic contact layer, and a source/drain metal layer by using the photoresist patter as a mask to remove exposed portions of the semiconductor material layer, the impurity semiconductor material layer, and the metal layer; 5) exposing a predetermined portion of the source/drain metal layer above a channel region of the thin film transistor by ashing the photoresist pattern; 6) forming source and drain electrodes of the thin film transistor by etching the source/drain metal layer exposed in state of using the ashed photoresist pattern as a mask; 7) forming a passivation layer on the entire surface of the substrate including the source and drain electrodes; 8) forming a second contact hole to expose the predetermined portion of the drain electrode by partially removing the passivation layer; and 9) forming the pixel electrode in the pixel region, wherein the pixel electrode is electrically connected with the drain electrode through the second contact hole.