Patent ID: 6979621
Filing Date: 2005-12-27
Classification: H01L

Abstract:
1. A method of forming a trench MOSFET device comprising: providing a silicon substrate of a first conductivity type; depositing a silicon epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower majority carrier concentration than said substrate; forming a body region of a second conductivity type within an upper portion of said epitaxial layer; etching a trench extending into said epitaxial layer from an upper surface of said epitaxial layer, said trench extending through said body region and said trench having trench sidewalls and a trench bottom; forming an oxide region lining said trench, said oxide region comprising a lower segment covering at least the trench bottom and upper segments covering at least upper regions of said trench saidwalls, wherein said oxide region lining said trench is formed by a process comprising: forming a thermal oxide layer within said trench; providing a deposited oxide layer over said thermal oxide layer; forming an etch resistant region in the trench bottom over said deposited oxide layer; and etching said deposited oxide layer where not covered by said etch resistant region; depositing a conductive region within said trench adjacent said oxide region; and forming a source region of said first conductivity type within an upper portion of said body region and adjacent said trench,