Patent ID: 6944694
Filing Date: 2005-09-13
Classification: G06F,G11C,Y02D

Abstract:
1. A computer system comprising: a central processing unit; a memory module, said memory module comprising a first memory bank of substantially identical memory chips, a second memory bank of substantially identical memory chips, and a plurality of system bus connectors, said first and second memory banks each comprising a plurality of pin assignments, one pin assignment from each said first and second memory banks coupled to an associated one of said plurality of system bus connectors, wherein at least one of said plurality of bus connectors is coupled to non-identical pin assignments of said first and second memory banks, wherein said non-identical pin assignments have internal assignments for like functions in a bilaterally symmetrical aarrangement; and, a system bus coupling said central processing unit to said plurality of system bus connectors of said memory module, wherein said central processing unit places information on said system bus mapped to a first pattern corresponding with said pin assignments of said first memory bank when accessing said first memory bank, and said information mapped to a second pattern corresponding with said pin assignments of said second memory bank when accessing said second memory bank.