Patent ID: 6368907
Filing Date: 2002-04-09
Classification: H01L

Abstract:
A method of fabricating a semiconductor device including, on a semiconductor substrate, a memory region where a nonvolatile memory device is disposed and a logic region where a logic device is disposed, comprising the steps of:(a) forming, in said memory region, a first insulating film to be formed into a gate insulating film of said nonvolatile memory device, a first conducting film and a second insulating film and forming, in said logic region, a gate insulating film of said logic device; (b) forming a second conducting film on said semiconductor substrate after the step (a); (c) forming a stacked gate of said nonvolatile memory device including a control gate electrode, an interelectrode insulating film and a floating gate electrode of said nonvolatile memory device by patterning said second conducting film, said second insulating film and said first conducting film in said memory region with allowing said second conducting film to remain in said logic region; (d) forming, on said semiconductor substrate, a third insulating film for implant protection of said stacked gate after the step (c); (e) implanting impurity ions for forming source/drain diffusion layers of said nonvolatile memory device into regions on both sides of said floating gate electrode in said semiconductor substrate after the step (d); (f) removing at least a portion of said third insulating film disposed on said second conducting film by subjecting said third insulating film to anisotropic etching after the step (e); and (g) forming a gate electrode of said logic device by patterning said second conducting film remaining in said logic region.