Patent ID: 6351158
Filing Date: 2002-02-26
Classification: H03K

Abstract:
An output driver circuit having a transmitting state for driving an output terminal in accordance with an input signal and a quiescent state, comprising:a first output MOS transistor having a source, an insulated gate, a body and a drain; a supply terminal connected to the source of the first output MOS transistor; a gate terminal connected to the insulated gate of the first output MOS transistor; an output terminal connected to the drain of the first output MOS transistor for generating an output voltage in response to an input voltage on the gate of the first output MOS transistor; a floating gate circuit coupled to the gate terminal for receiving an input signal, said floating gate circuit comprising a two transistor inverter and a third, control transistor disposed between the inverter transistors, with the well of the third transistor coupled to its drain; and a well pull up circuit connected to the gate termninal, said well pull up circuit generating a first signal while the driver circuit is enabled for keeping the third transistor on during enabled operation and a second signal when the driver circuit is not enabled for connecting together enough of the terminals of the third transistor to keep the third transistor off.