Patent ID: 8589840
Filing Date: 2013-11-19
Classification: G06F

Abstract:
1. A design verification device comprising: a verification unit configured to perform a data verification of design data of a semiconductor chip designed by replacing hardware Intellectual Property including layout data and netlist of a circuit block with box Intellectual Property produced from data that is disclosed to a designer of the hardware Intellectual Property; and an obtaining unit configured to obtain encryption Intellectual Property including part or all of data of the hardware Intellectual Property being encrypted; wherein, in a storage area where storage data is hidden from outside, the verification unit decrypts the encryption Intellectual Property and replaces the box Intellectual Property with decrypted encryption Intellectual Property so as to perform the data verification; wherein the verification unit compares a first verification result of the data verification that is performed on the design data designed by using the box Intellectual Property without replacing the box Intellectual Property with the decrypted encryption Intellectual Property, with a second verification result of the data verification that is performed by replacing the box Intellectual Property with the decrypted encryption Intellectual Property, and wherein, in such a case that information indicating the layout data of the hardware Intellectual Property is not included in the first verification result but included in the second verification result, the verification unit converts the information and outputs the second verification result.