Patent ID: 9191599
Filing Date: 2015-11-17
Classification: H04N

Abstract:
1. A correlated double sampling (CDS) circuit included in an image sensor, the CDS circuit comprising: a sampling unit configured to generate an output signal by performing a CDS operation with respect to a reset component of an input signal and an image component of the input signal based on a ramp signal, the input signal being provided from a pixel array included in the image sensor; and a timing controlled band-limitation (TCBL) unit connected to the sampling unit, and configured to remove noise from the output signal based on a timing control signal, the timing control signal being activated during a first comparison duration, in which a first comparison operation is performed with respect to the ramp signal and the reset component of the input signal, and during a second comparison duration, in which a second comparison operation is performed with respect to the ramp signal and the image component of the input signal.