Patent ID: 7965569
Filing Date: 2011-06-21
Classification: G11C

Abstract:
1. A semiconductor storage device comprising: a memory cell; a bit line connected to the memory cell; a precharge circuit for stepping up a voltage of the bit line to a power supply voltage; a step-down circuit for stepping down the voltage of the bit line to a voltage level lower than the power supply voltage before data is read from the memory cell; a high-potential-side power supply and a low-potential-side power supply respectively connected to the pre charge circuit; and a precharge switching element for controlling a connection between the high-potential-side power supply and the precharge circuit and a connection between the low-potential-side power supply and the precharge circuit, wherein a power supply connecting circuit is connected to and between the precharge switching element and the high-potential-side power supply, and a ground connecting circuit is connected to and between a connecting point at which the precharge switching element is connected to the power supply connecting circuit and the low-potential-side power supply, and the power supply connecting circuit and the ground connecting circuit are integrally constituted as an inverter which is turned on and off by a common precharge/step-down control signal.