Patent ID: 6936883
Filing Date: 2005-08-30
Classification: G11C,H01L

Abstract:
1. A non-volatile memory cell for the storage of a plurality of bits, comprising: a substantially single crystalline semiconductive material of a first conductivity type; a first region of a second conductivity type, different from said first conductivity type in said material; a second region of said second conductivity type in said material, spaced apart from said first region; a channel region, having a first portion, a second portion and a third portion, connecting said first and second regions for the conduction of charges; a dielectric on said channel region; a first floating gate on said dielectric, spaced apart from said first portion of said channel region; said first portion of said channel region adjacent to said first region, said first floating gate for the storage of at least one of said plurality of bits; a second floating gate on said dielectric, spaced apart from said second portion of said channel region; said second portion of said channel region adjacent to said second region, said second floating gate for the storage of at least another of said plurality of bits; a gate electrode on said dielectric, spaced apart from said third portion of said channel region, said third portion of said channel region between said first portion and said second portion; a first gate electrode electrically connected to said first region and capacitively coupled to said first floating gate; and a second gate electrode electrically connected to said second region and capacitively coupled to said second floating gate.