Patent ID: 6356487
Filing Date: 2002-03-12
Classification: G11C

Abstract:
A dual mode flip-flop, comprising:a latch having at least one input/output (â€œI/Oâ€ ) terminal, the latch being structured to latch a signal applied to the I/O terminal; an input circuit coupled to the I/O terminal of the latch, the input circuit being structured to couple the data signal to the I/O terminal; and an output circuit coupled between the I/O terminal of the latch and the single-ended and double-ended output terminals, the output circuit being structured to couple the I/O terminal to the single-ended output terminal responsive to a first mode signal, and to couple the I/O terminal to at least one of the double-ended output terminals responsive to receiving a second mode signal, the output circuit comprising: a pair of double-ended output drivers having respective input terminals coupled to the latch and respective output terminals coupled to one of the double-ended output terminals, the double-ended output driver being enabled responsive to the second mode signal; and a single-ended output driver having an input terminal coupled to the latch and an output terminal coupled to the single-ended output terminal, the single-ended output driver being enabled responsive to the first mode signal.