Patent ID: 6484307
Filing Date: 2002-11-19
Classification: H01L

Abstract:
A method for fabricating and checking at least two structures of an electronic circuit in a semiconductor substrate, which comprises the method steps of:using a first mask having a plurality of first parts for defining first useful areas and first scribe lines bordering the first useful areas, the first mask extending over first regions of the semiconductor substrate; producing first and second structures in the first useful areas according to a predetermined pattern; producing further ones of the first structures in the first scribe lines; using a second mask having a plurality of second parts for defining second useful areas and second scribe lines bordering the second useful area, the second mask extending over second regions of the semiconductor substrate; producing the first and second structures in the second useful areas according to the predetermined pattern; producing further ones of the second structures in the second scribe lines; and using the first structures in the first scribe lines and the second structures in the second scribe lines for checking the first and second structures in the first useful areas and the second useful areas.