Patent ID: 6662344
Filing Date: 2003-12-09
Classification: H01L

Abstract:
A semiconductor device comprising:a silicon-on-insulator (SOI) substrate including a base substrate, an insulating layer, and a semiconductor layer laminated in this order, in which circuit elements are formed over a main surface of the semiconductor layer; a plurality of semiconductor islands used as element-forming regions, the semiconductor islands being of identical size, and being mutually isolated by element isolation grooves crossing the semiconductor layer of the SOI substrate; a plurality of unit bipolar transistors formed in respective semiconductor islands, having a size matching the size of the semiconductor islands, and having respective emitter, base, and collector regions formed on the main surface of the semiconductor layer; and interconnection wiring for connecting the emitter, base, and collector regions of the plurality of unit bipolar transistors in parallel and causing them to function in combination as one transistor having desired electrical characteristics.