Patent ID: 6559012
Filing Date: 2003-05-06
Classification: H01L

Abstract:
A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:(a) forming a floating gate member over a first element forming region of a main surface of a substrate through a gate insulating film therebetween; (b) after said step (a), forming a thermally oxidized film over a second element forming region and a third element forming region of said main surface of said substrate; (c) after said step (b), depositing an insulating film over said main surface and over said thermally oxidized film, so as to form a deposited film; (d) removing said deposited film from said third element forming region; (e) after said step (d), forming a thermally oxidized film over said third element forming region; (f) after said step (e), forming a gate electrode of a first MISFET and a second MISFET over said deposited film of said second element forming region and said thermally oxidized film of said third element forming region, respectively.