Patent ID: 9087796
Filing Date: 2015-07-21
Classification: H01L

Abstract:
1. A method of making a semiconductor assembly defining a thickness dimension, an up direction and a down direction, the method comprising the steps of: providing an initial-state assembly comprising: (i) a fin layer, (ii) a hard mask layer located on top of at least a portion of the fin layer, and (iii) a sacrificial material layer on the hard mask layer; performing a first material removal on the initial-state assembly to yield a second-state assembly; and performing a second material removal on the second-state assembly to yield a third-state assembly; wherein: the fin layer has a footprint including one or more fins and a fin-embedding material and defines: (i) one or more fin regions, and (ii) one or more non-fin regions; in the initial-state assembly: (i) the fin layer is thicker in the one or more fin regions than in the one or more non-fin regions, (ii) at least a lower portion of the hard mask layer extends over at least a portion of the one or more non-fin regions of the fin layer, and (iii) the hard mask layer is present over at least a portion of the one or more fin regions of the fin layer; in the first material-removal step in a chemical mechanical polish (CMP): (i) a portion of the sacrificial material layer is removed from the one or more fin regions, and (ii) the upper portion of the hard mask layer is used as a stop layer for the first material removal; and in the second material-removal step, material removal is selectively performed so that the upper portion of the hard mask layer is removed.