Patent ID: 8791463
Filing Date: 2014-07-29
Classification: H01L

Abstract:
1. A thin film transistor substrate comprising: a base substrate; a plurality of gate lines extending parallel to each other on the base substrate; a plurality of source lines extending parallel to each other in a direction intersecting the gate lines; thin film transistors each of which is provided at an associated one of intersections of the gate lines and the source lines; and pixel electrodes each of which is provided to an associated one of the thin film transistors, wherein each of the thin film transistors includes a gate electrode connected to the gate line forming an associated one of the intersections, a gate insulating layer provided on the gate electrode, an oxide semiconductor layer provided on the gate insulating layer and including a channel region overlapping the gate electrode, a source electrode connected to one side of the oxide semiconductor layer and connected to the source line forming the associated one of the intersections, and a drain electrode connected to the other side of the oxide semiconductor layer such that the drain electrode faces the source electrode, each of the thin film transistors is configured such that side end faces of the gate electrode, the gate insulating layer, and the oxide semiconductor layer are formed to be flush with one another to form a multilayer structure, a stopper insulating film is provided to cover the multilayer structure, a pair of contact holes for connection to the oxide semiconductor layer is formed in the stopper insulating film to connect the source electrode to the oxide semiconductor layer via one of the contact holes, and to connect the drain electrode to the oxide semiconductor layer via the other of the contact holes, and the stopper insulating film serves as an etching stopper on the channel region when the source electrode and the drain electrode are formed, an insulating layer made of a film identical to a film forming the gate insulating layer is stacked also on the gate lines, the stopper insulating film is provided to cover at least part of side end faces of the gate lines and of the insulating layer, the stopper insulating film has channel isolation holes formed in positions each of which is located between adjacent two of the thin film transistors connected to a common one of the gate lines, and corresponds to the common gate line, where the oxide semiconductor layer of the adjacent thin film transistors is divided in each of the channel isolation holes so as to isolate the channel regions of the adjacent thin film transistors from each other, the stopper insulating film has terminal section exposing holes formed in positions each corresponding to an end portion of the gate line, where the end portion of the gate line is exposed in each of the terminal section exposing holes from the insulating layer to form a terminal section, each of the pixel electrodes is made of a film identical to at least one layer included in the drain electrode, the thin film transistors are covered with a protective insulating film, each of the drain electrodes includes a transparent conductive layer and a light shielding conductive layer which are sequentially stacked, each of the pixel electrodes is made of a film identical to a film forming the transparent conductive layer, in the protective insulating film, openings are formed in positions each corresponding to the pixel electrode, and the light shielding conductive layer of each of the drain electrodes has an end face facing an associated one of the pixel electrodes, where the end face matches an inner surface of the opening in the protective insulating film.