Patent ID: 6974720
Filing Date: 2005-12-13
Classification: C30B,H01L

Abstract:
1. A method of forming a silicon carbide MOSFET device having a 10 kV or higher blocking voltage rating, comprising the steps of: forming a silicon carbide boule using a seeded sublimation growth technique or a high-temperature CVD growth technique; irradiating the silicon carbide boule with thermal neutrons of sufficient fluence to thereby transmute some fraction of silicon atoms to phosphorus atoms within the silicon carbide boule; forming a silicon carbide wafer from the irradiated silicon carbide boule; forming a boule-grown silicon carbide drift layer having a net n-type dopant concentration therein that is less than about 2×10 forming a p-type silicon carbide base region on the silicon carbide drift layer; forming an n-type silicon carbide source region that defines a p-n rectifying junction with the p-type silicon carbide base region; and forming a gate electrode on the p-type silicon carbide base region.