Patent ID: 6157695
Filing Date: 2000-12-05
Classification: H03K

Abstract:
A loadable counter circuit which is able to perform multiple contiguous counts comprising, in combination:a counter for monitoring a number of specified events;a data storage device coupled to said counter for loading said counter with counter values for each of said contiguous counts;a control logic circuit coupled to said counter and to said data storage circuit for loading said counter and said data storage device with said counter values, andan enable signal coupled to said counter for enabling said counter and for disabling said counter when said counter is being loaded with one of said counter values, wherein said control logic circuit comprises:a first clock signal line for signalling said data storage device;a load signal line for signalling said counter to load a next counter value from said data storage device;a second clock signal line for providing a run time clock to said counter; andterminal count signal line coupled to said control logic circuit for signalling said control logic circuit to load said counter with a new counter value.