Patent ID: 6711601
Filing Date: 2004-03-23
Classification: G06F

Abstract:
A logarithmic arithmetic unit for carrying out logarithmic operations on floating-point data, including:a first logarithmic operation part receiving an exponent part of said floating-point data for multiplying said exponent part by a prescribed value and carrying out logarithmic operations on 2 raised to the power specified by said exponent part; a logarithmic table memory storing a plurality of logarithmic values for receiving bit data expressing a digit higher than a prescribed digit of a fixed-point part of said floating-point data as an address and outputting a logarithmic value corresponding to said address; a divisional precision decision part receiving said exponent part of said floating-point data and deciding divisional precision on the basis of said exponent part; a division part connected to said divisional precision decision part for performing division on a dividend obtained by subtracting said bit data from said fixed-point part of said floating-point data and a divisor of said bit data and obtaining a result of division of a number of digits set on the basis of said divisional precision decided in said divisional precision decision part; a second logarithmic operation part connected to said division part for obtaining the logarithmic value of a value obtained by dividing said fixed-point part of said floating-point data by said bit data with said result of division of said division part; and a sum operation part connected to said first logarithmic operation part, said logarithmic table memory and said second logarithmic operation part for adding outputs from said first logarithmic operation part, said logarithmic table memory and said second sum operation part to each other.