Patent ID: 7380151
Filing Date: 2008-05-27
Classification: G06F,H04W,Y02D

Abstract:
1. An apparatus for signal processing, comprising: (a) a component that enables the communication of a received signal and a transmitted signal with a node; (b) a plurality of class processors that are in communication with the component, wherein each of the plurality of class processors are separately configurable to asynchronously process at least a portion of the data flow associated with the transmitted signal and another data flow associated with the received signal; (c) a plurality of clock signals, wherein each class processor is associated with at least one of the plurality of clocks, and wherein at least one clock signal is separately configurable to enable each associated class processor to asynchronously process the data flows associated with the transmitted signal and the received signal; and (d) a host processor that is in communication with the plurality of class processors, wherein the other data flow associated with the received signal is provided to the host processor after processing by the plurality of class processors, and wherein the data flow associated with the transmitted signal is provided by the host processor to the plurality of class processors for asynchronous processing and communication of the transmitted signal to the node.