Patent ID: 6667602
Filing Date: 2003-12-23
Classification: H02M

Abstract:
A low-frequency switching voltage pre-regulator circuit, comprising:an input node operative to receive an input voltage signal VIN having a magnitude substantially in the range from and including about 20 Volts to and including about 58 Volts; a pulse width modulated (â€œPWMâ€ ) signal input node operative to receive a PWM signal having a duty cycle between approximately 25 percent and 50 percent and having a frequency substantially in the range from and including about 5 kiloHertz to and including about 15 kiloHertz; and a chopped voltage node operative to provide a chopped voltage VCH having a substantially constant magnitude independent of the magnitude of the input voltage signal VIN and substantially in the range from and including about 6 Volts to and including about 10 Volts, wherein the pre-regulator circuit is operative to selectively generate the chopped voltage VCH at the chopped voltage node in response to the PWM signal and the input voltage signal, and selectively operate in a sleep mode, whereby current through the pre-regulator circuit is restricted.