Patent ID: 9224812
Filing Date: 2015-12-29
Classification: B82Y,H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising: providing a first insulation layer on a wafer substrate; forming an elongated semiconductor region overlying the first insulation layer along a first direction, the elongated semiconductor region including a first end section, a middle section, and a second end section; forming an undercut structure of the first insulation layer beneath the elongated semiconductor region; removing the undercut structure selectively beneath the middle section to form a cavity having a first length and a first height; forming a channel region by shaping the middle section above the cavity to a substantially cylindrical shape, the channel region having a channel length substantially equal to the first length; forming a second insulation layer around the cylindrical channel region, the second insulation layer having a thickness substantially less than the first height of the cavity; depositing a conductive layer on the first insulation layer to at least cover the elongated semiconductor region including the cylindrical channel region surrounded by the second insulation layer; forming a gate region from the conductive layer along a second direction surrounding the cylindrical channel region including the cavity beneath the channel region, the second direction being substantially perpendicular to the first direction; forming a source region in the first end section; and forming a drain region in the second end section.