Patent ID: 7401257
Filing Date: 2008-07-15
Classification: G06F

Abstract:
1. A microcomputer comprising: a central processing unit; a universal serial bus interface circuit which can be utilized as a debugging interface; and an external bus interface circuit which can be connected to an external memory, wherein the universal serial bus interface circuit includes a plurality of input buffers, and data is output from one of said input buffers in parallel with an input operation to another of said input buffers, wherein the universal serial bus interface circuit receives a system program in a debugging mode, and the system program thus received can be output from the external bus interface circuit together with a memory access control signal, wherein the microcomputer further comprises a direct memory access controller configured to perform a control to transfer the received system program to a memory connected to the external bus interface, and wherein a transfer source of the system program through the direct memory access controller is one of said input buffers of the universal serial bus interface circuit.