Patent ID: 7253494
Filing Date: 2007-08-07
Classification: H01L,H01M,Y02E

Abstract:
1. A battery mounted integrated circuit device, comprising: (1) a semiconductor substrate; (2) a solid state battery mounted on said semiconductor substrate; (3) an integrated circuit mounted on said semiconductor substrate; (4) a first diffusion layer, containing an N-type impurity, formed between a region of said semiconductor substrate where said solid state battery is mounted and a region of said semiconductor substrate where said integrated circuit is mounted; and (5) a second diffusion layer, containing an N-type impurity, formed below said region of said semiconductor substrate where said solid state battery is mounted, and overlapping with said first diffusion layer, wherein: said solid state battery comprises a positive electrode, a negative electrode, and a solid electrolyte disposed between said positive electrode and said negative electrode, the concentration of said N-type impurity in said first diffusion layer is higher than the concentration of said N-type impurity in said second diffusion layer, at least when said solid state battery is being charged and discharged, said first diffusion layer and said second diffusion layer have a positive potential not less than the potential of the positive electrode with respect to the negative electrode, said solid state battery is carried on the second diffusion layer, and said first diffusion layer surrounds said region where said solid state battery is mounted.