Patent ID: 7888197
Filing Date: 2011-02-15
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor-on-insulator (“SOI”) substrate, comprising: forming a SOI substrate including (i) an SOI layer of monocrystalline silicon separated from (ii) a bulk semiconductor layer by (iii) a buried oxide (“BOX”) layer including a layer of doped silicate glass by steps including depositing the doped silicate glass layer onto a first wafer including a first semiconductor layer, bonding the doped silicate glass layer to a second wafer including a second semiconductor layer, and then removing a portion of one of the first and second semiconductor layers; then depositing a sacrificial stressed layer onto the SOI substrate to overlie the SOI layer; etching trenches through the sacrificial stressed layer and into the SOI layer; then heating the SOI substrate with the sacrificial stressed layer to a temperature of about 600° C. to cause the doped silicate glass layer to soften and the sacrificial stressed layer to relax, to thereby apply a stress to the SOI layer to form a stressed SOI layer; then filling the trenches in the stressed SOI layer with a dielectric material to form trench isolation regions contacting peripheral edges of the stressed SOI layer, the trench isolation regions extending downwardly from a major surface of the stressed SOI layer towards the BOX layer; after the filling of the trenches, removing the sacrificial stressed layer to expose the stressed SOI layer; and then forming a transistor having an active semiconductor region disposed within the stressed SOI layer, wherein the stress in the stressed SOI layer remains essentially fixed despite thermal processing required to form the transistor.