Patent ID: 6330204
Filing Date: 2001-12-11
Classification: G11C

Abstract:
A memory circuit formed on a semiconductor substrate, comprising:a fuse having a first end connected to a power supply potential generated by a main power supply used to provide a bias voltage to components of the memory circuit so that the fuse has a disconnect/connect state for storing a bit of binary data based on whether or not the fuse has been blown by a current passing therethrough produced by the power supply potential;a switching element inserted between a second end of the fuse opposite the first end and a reference potential, and being capable of passing a current large enough to blow out the fuse based solely on the power supply potential;a read-out circuit for reading out the binary data bit stored by the fuse; anddrive control means for driving and controlling the switching element when writing to the fuse so that the current passing through the fuse based solely on application of the power supply potential is large enough to blow out the fuse.