Patent ID: 6781472
Filing Date: 2004-08-24
Classification: H03L

Abstract:
A pseudo-cubic function generator circuit comprising:a CMOS inverter which is applied with a detected voltage of a sensor and supplied with a power supply voltage; and a voltage divider circuit for dividing the power supply voltage, wherein said CMOS inverter has an output terminal connected to a voltage division point of said voltage divider circuit to generate an output voltage from said voltage division point. wherein said power supply voltage has a positive polarity, and said pseudo-cubic function generator circuit generates a voltage in response to an input, said voltage approximating to a cubic function having a negative third-order coefficient, and wherein: said CMOS inverter includes a P-MOS FET and an N-MOS FET, and said pseudo-cubic function generator circuit controls an input/output characteristic thereof in a voltage region lower than a first voltage by scaling a gate area of said P-MOS FET, and controls the input/output characteristic in a voltage region higher than the first voltage by scaling a gate area of said N-MOS FET.