Patent ID: 6378115
Filing Date: 2002-04-23
Classification: G06F

Abstract:
An LSI manufacturing method for embedding in a chip a plurality of blocks having prescribed functions and comprising a plurality of circuit elements and a plurality of block pins connecting to the circuit elements and connecting externally, wherein said plurality of blocks comprises hard blocks, wherein the block pins in a vicinity of a frame comprise a fixed position at the layout design stage, and soft blocks, wherein the block pins in the vicinity of the frame comprise a variable position at the layout design stage, said manufacturing method comprising:arranging said plurality of blocks on the chip; moving a first block pin in said soft block to a position in the vicinity of the frame of said soft block and opposite to a first corresponding block pin in a first adjacent block; generating a second block pin comprising a same potential as the first block pin in said soft block at a position in the vicinity of the frame of said soft block and opposite to a second corresponding block pin in a second adjacent block; and forming a first signal between the blocks for connecting said first block pin with said first corresponding block pin opposite thereto, and a second signal between the blocks for connecting said second block pin with said second corresponding block pin opposite thereto in a region between said plurality of blocks.