Patent ID: 6212630
Filing Date: 2001-04-03
Classification: G06F

Abstract:
A microprocessor which is connected to a data memory providing a stack area and to an instruction memory prestoring instructions, comprising:a subroutine call means for causing a branch to a subroutine in an execution sequence;a stack reserve means for reserving a new stack area in the data memory by updating a stack pointer using a fixed value;an instruction fetch means for fetching an instruction from the instruction memory;a first instruction execution means for having, when the fetched instruction is a first instruction, the subroutine call means cause the branch and the stack reserve means reserve the new stack area in parallel; anda post-branch data save means for having, after the branch by the subroutine call means, the stack reserve means reserve another new stack area in parallel with a saving of data into the previously reserved new stack area.