Patent ID: 7262069
Filing Date: 2007-08-28
Classification: G11C,H01F,H01L

Abstract:
1. A method of forming an integrated circuit device, said method comprising: forming, on a substrate, at least one digit line from a first metal layer; forming, on said substrate, at least one bit line from a second metal layer; forming, on said substrate and between said first metal layer and said second metal layer, a magnetic tunnel junction core, said at least one digit line, said at least one bit line, and said magnetic tunnel junction core comprising a magnetic random access memory (“MRAM”) architecture; and forming, on said substrate, an inductor from at least one of said first metal layer or said second metal layer, wherein the inductor is formed on a portion of said first metal layer that is physically separated from said at least one digit line or on a portion of said second metal layer that is physically separated from said at least one bit line.