Patent ID: 8030960
Filing Date: 2011-10-04
Classification: H04L

Abstract:
1. An electronic circuit comprising: a first stage coupled to an input node; a second stage coupled to the first stage and an output node; a feedback path coupled between the second stage and the first stage; an echo stage coupled between the feedback path and the input node, wherein, when active, the echo stage is configured to drive the input node; a keeper coupled between the input node and the output node; and a plurality of switches, wherein when the plurality of switches are in a first configuration, the electronic circuit is configured to act as a dynamic repeater circuit, wherein the second stage is configured to be activated responsive to a logic transition of an input signal and is further configured, when activated, to drive an output signal responsive to a logical transition on the input node, and wherein the first stage is configured to, after a delay time, deactivate the second stage responsive to a receiving a feedback signal via the feedback path, and wherein the keeper circuit is configured to provide the output signal on the output node subsequent to deactivation of the second stage; and wherein, when the plurality of switches are in a second configuration, the electronic circuit is configured to act as a static repeater circuit, wherein the feedback path is disabled and wherein the keeper circuit is configured to provide the output signal on the output node.