Patent ID: 7504877
Filing Date: 2009-03-17
Classification: H02M

Abstract:
1. An integrated circuit, comprising: a voltage generator for generating a negative body bias voltage, the voltage generator including a charge pump and a voltage regulator coupled to the charge pump; a plurality of n-type transistors coupled to the charge pump to receive the negative body bias voltage from the voltage generator; the charge pump including a voltage-controlled oscillator coupled to a charge transfer circuit; the voltage-controlled oscillator including a first output port and a second output port for providing a first oscillating signal and a second oscillating signal respectively therefrom; the voltage-controlled oscillator further including a voltage control port; the charge transfer circuit including an input voltage node and an output voltage node; the output voltage node for sourcing the negative body bias voltage therefrom to provide to a plurality of body regions respectively of the plurality of n-type transistors; the charge transfer circuit further including a first charge input node and a second charge input node, and a first capacitive device and a second capacitive device; the first charge input node coupled to the first output port of the voltage-controlled oscillator to receive the first oscillating signal therefrom, the first charge input node coupled to the first capacitive device, wherein the first capacitive device receives the first oscillating signal; the second charge input node coupled to the second output port of the voltage controlled oscillator to receive the second oscillating signal therefrom, the second charge input node coupled to the second capacitive device, wherein the second capacitive device receives the second oscillating signal; the first and the second oscillating signal being out of phase with respect to one another; the charge transfer circuit configured to transfer charge to the output voltage node from the first capacitive device and the second capacitive device responsive to the first oscillating signal and the second oscillating signal, respectively; the voltage regulator including a voltage divider circuit and an operational amplifier; the voltage divider circuit coupled to the output voltage node to receive the negative body bias voltage and configured to provide a nodal voltage responsive to the negative body bias voltage as an input to the operational amplifier; and the operational amplifier coupled to receive the nodal voltage and a first reference voltage and configured to provide a control voltage responsive to a difference between the nodal voltage and the first reference voltage, the control voltage being an analog of the difference.