Patent ID: 8688920
Filing Date: 2014-04-01
Classification: G06F

Abstract:
1. An article of manufacture comprising: at least one computer usable non-transitory medium having computer readable program code logic tangibly embodied therein the computer readable program code logic configured to facilitate access to a memory of a processing environment, the computer readable code logic configured to cause a processor to perform a method comprising: providing information tables and a software emulation program that are both configured for enabling hardware that does not natively implement Private to Transaction (PTRAN) bits for executing transactional memory constructs to run new software that uses transactional memory; associating a directly addressable guest PTRAN bit with each increment of real system memory of the computer system to execute transactional memory constructs for the hardware that does not natively implement PTRAN bits, the guest PTRAN bit providing a transactional memory model for a portion of guest memory; locating a transaction table and the guest PTRAN bit in the real system memory, the information tables comprising the transaction table; detecting an instruction that specifies an increment of the computer system's memory is part of a first atomic instruction group (AIG) by the new software; determining a second AIG is currently accessing the specified increment based on accessing the guest PTRAN bit associated with the specified increment; updating each of the transaction table and the guest PTRAN bit to indicate that the specified increment is part of the first AIG based on a determination that there is no second AIG currently accessing the specified increment; and based on a determination that the second AIG is currently accessing the specified increment, inspecting the transaction table to determine whether the specified increment is already part of the transaction table.