Patent ID: 7459772
Filing Date: 2008-12-02
Classification: H01L,H03K

Abstract:
1. An integrated circuit system including: a first integrated circuit die having a plurality of wire-bonding pads and an array of face-to-face bonding structures disposed on a face thereof, the first integrated circuit die also having only input/output circuits disposed thereon, first ones of the input/output circuits having inputs connected to ones of the wire-bonding pads and outputs connected to ones of the face-to-face bonding structures, and second ones of the input/output circuits having inputs connected to ones of the face-to-face bonding structures and outputs connected to ones of the wire-bonding pads; and a second integrated circuit die having an array of face-to-face bonding structures disposed on a face thereof, the array of face-to-face bonding structures mating with the array of face-to-face bonding structures disposed on the first integrated circuit die, the second integrated circuit die having only logical function circuits disposed thereon, input elements associated with the logical function circuits coupled to first ones of the face-to-face bonding structures, and output elements associated with the logical function circuits coupled to second ones of the face-to-face bonding structures.