Patent ID: 7353430
Filing Date: 2008-04-01
Classification: G06F

Abstract:
1. A device for validating a data flow processing circuit, said circuit having inputs/outputs and including firstly at least one microprocessor intended to cooperate with a memory external to the circuit and secondly at least one specialized unit for performing a partial processing of the data, the microprocessor or the unit comprising registers, which device includes a read memory containing, in addition to an operating system necessary for the functioning of the microprocessor and the specialized unit: a set of data suitable to supply a known real-time data flow representing a real-time data flow which could be received by the circuit in normal operation, a set of theoretical values which is to appear during processing at least one given instant in at least one of the registers of the microprocessor or the specialized unit, instructions for effecting a validation, including instructions for loading the data to be processed by organizing the data in a flow and sequentially comparing values present in registers with said theoretical values, and instructions for supplying a signature representing results of said comparisons, and which device further includes a validation computer that controls selection between a first configuration in which the circuit to be validated has inputs/outputs connected to the validation computer, and a second configuration in which the same inputs/outputs are connected to the external memory.