Patent ID: 7474007
Filing Date: 2009-01-06
Classification: H01L

Abstract:
1. A semiconductor package, comprising: a first substrate having a first face and a second face; a first wiring provided on the first face of the first substrate; a second substrate having a first face and a second face; a second wiring provided on the first face of the second substrate; an insulation layer provided between the first and second wiring; a semiconductor chip connected to the first and second wiring; and first and second bumps provided on the semiconductor chip, wherein the first wiring is connected to the semiconductor chip via the first bump and the second wiring is connected to the semiconductor chip via the second bump, and wherein the first face of the first substrate faces the first face of the second substrate, and the first wiring crosses the second wiring and is electrically insulated from the second wiring by the insulation layer.