Patent ID: 8748977
Filing Date: 2014-06-10
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate; a semiconductor layer of a wide band gap semiconductor arranged on a principal surface of the substrate; a trench arranged in the semiconductor layer and including a bottom surface, a plurality of side surfaces, and a plurality of corner portions each connecting together two adjacent side surfaces, wherein the trench has a polygonal shape having n apexes and n sides as seen from a direction vertical to the principal surface of the substrate, the plurality of corner portions being n corner portions, one of the plurality of corner portions being located at each of the n apexes of the polygonal shape, the plurality of side surfaces being n side surfaces, and one of the plurality of side surfaces being located along each of the n sides of the polygonal shape; a gate insulating film arranged on the bottom surface, the plurality of side surfaces and the plurality of corner portions of the trench, and a portion of a surface of the semiconductor layer located in a peripheral portion of the trench at the plurality of corner portions; and a gate electrode arranged in the trench and being insulated from the semiconductor layer by means of the gate insulating film, wherein: the semiconductor layer includes a drift region of a first conductivity type, and a body region of a second conductivity type arranged on the drift region; the trench runs through the body region and has the bottom surface inside the drift region; the plurality of corner portions of the trench do not have a depressed portion; the gate insulating film is thicker on the plurality of corner portions of the trench and the portion of the surface of the semiconductor layer located in the peripheral portion of the trench at the plurality of corner portions than on at least some of the plurality of side surfaces of the trench; portions of the gate insulating film located on the plurality of corner portions and the portion of the surface of the semiconductor layer located in the peripheral portion of the trench at the plurality of corner portions are a first insulating layer, and portions of the gate insulating film located on the at least some side surfaces are a second insulating layer; the first insulating layer is arranged so as to cover a plurality of shoulder portions of the trench, the shoulder portions connecting together the surface of the semiconductor layer located on the peripheral portion of the trench and the plurality of corner portions; and the first insulating layer is a deposited film, and the second insulating layer is a thermal oxidation film, the second insulating layer being provided only in portions of the surface of the trench where the first insulating layer is absent.