Patent ID: 6479858
Filing Date: 2002-11-12
Classification: G11C,H01L

Abstract:
A semiconductor device comprising:a cell including a first gate; a second gate located in proximity to the first gate; a third gate located in proximity to the first gate; a plurality of electrodes coupled to the cell, the plurality of electrodes including a first electrode and a second electrode, the first electrode being located in proximity to the second gate and the second electrode being located in proximity to the third gate, the plurality of electrodes allowing a variable threshold voltage to be provided in the cell; a plurality of insulating layers; and a plurality of insulating spacers; wherein the second gate has a first side and the third gate has a second side, a first spacer of the plurality of insulating spacers and a first layer of the plurality of insulating layers being disposed between the first side of the second gate and the first gate, a second spacer of the plurality of spacers and a second layer of the plurality of insulating layers being disposed between the second side of the third gate and the first gate.