Patent ID: 7389428
Filing Date: 2008-06-17
Classification: G11B

Abstract:
1. An information processing apparatus comprising: detecting means for detecting a recording medium having a data file area storing a plurality of data files and a verification data area storing a plurality of verification data, said data files being classified into at least two categories such that each data file is associated with at least one of said categories; reading means for reading a plurality of verifidation data respectively for a plurality of data files as named in a verification data list and a previously generated total verification data for each of said categories from the verification data area, in response to detection of the recording medium by the detecting means; generating means for generating a total verification data for each of said categories based on the plurality of the verification data of the verification data list read from the verification data area of the recording medium; comparing means for comparing at least one of the total verification data generated by the generating means with a corresponding one of the previously generated and stored total verification data read by the reading means from the verification data area; updating means for updating the previously generated total verification data in the verification data area of the recording medium if an act of tampering with the data file has occurred; and controlling means for inhibiting the reproduction and/or copying of data associated with a previously generated total verification data when the corresponding total verification data generated by the generating means does not coincide with the previously generated total verification data; wherein the plurality of verification data is generated using one or more keys; and wherein the keys are arranged in a hierarchical structure having a plurality of levels, the apparatus is associated with a device level of the structure, and the apparatus stores, in unencrypted form, at least one key corresponding to a level of the structure above the device level.