Patent ID: 8365029
Filing Date: 2013-01-29
Classification: G01R,G11C

Abstract:
1. A digital circuit comprising: a first plurality of storage elements; and a second plurality of storage elements; the digital circuit being operable in a first operation mode and in a second operation mode; wherein, in the first operation mode, the storage elements of the second plurality of storage elements are connected in series to receive and store test data and are disconnected from the storage elements of the first plurality of storage elements, and wherein the first plurality of storage elements receive and transfer signal data within the digital circuit, and wherein, in the second operation mode, each storage element of the first plurality of storage elements is connected with a corresponding storage element of the second plurality of storage elements, such that each of the second plurality of storage elements is adapted to transmit the test data stored in a respective storage element of the second plurality of storage elements to the corresponding storage element of the first plurality of storage elements, and each of the first plurality of storage elements is adapted to transmit the signal data stored in a respective storage element of the first plurality of storage elements to the corresponding storage element of the second plurality of storage elements.