Patent ID: 7847939
Filing Date: 2010-12-07
Classification: G03F,H01L

Abstract:
1. An integrated circuit structure comprising: a first layer including an active circuit area and a scribe line area; a first optical metrology target in the active circuit area of the first layer; a second layer including an active circuit area and a scribe line area; and a second optical metrology target in the active circuit area of the second layer, the second optical metrology target overlies the first optical metrology target forming an overlay metrology mark that is 1 square micron or smaller; wherein the first optical metrology target comprises one of a rectangle-shaped frame and four rectangles positioned in a cross shape and the second optical metrology target comprises the other of the frame and the cross shape, wherein the cross shape is nominally positioned to be bounded by the frame, the four rectangles radiating from a central point of the cross shape.