Patent ID: 8796751
Filing Date: 2014-08-05
Classification: G11C,H01L

Abstract:
1. A semiconductor construction, comprising: a semiconductor base; a gate extending into the base; a first region of the base adjacent the gate being a conductively-doped source region, and a second region of the base adjacent the gate and spaced from the first region being a conductively-doped drain region; a gate dielectric comprising a first segment between the source region and the gate, a second segment between the drain region and the gate, and a third segment between the first and second segments; wherein at least a portion of the gate dielectric comprises ferroelectric material; wherein the ferroelectric material is within the first, second and third segments; wherein the gate dielectric, along a cross-section, is configured as an upwardly-opening container having the gate therein; wherein the first segment of the gate dielectric comprises a first substantially vertical leg of the container, the second segment of the gate dielectric comprises a second substantially vertical leg of the container, and the third segment of the gate dielectric comprises a bottom of the container; wherein the gate dielectric comprises a first material as an outer boundary of the container and which is directly against the semiconductor base; wherein the gate dielectric comprises a second material between the first material and the gate; wherein the second material is the ferroelectric material; and wherein the first material is a non-ferroelectric material.