Patent ID: 8547771
Filing Date: 2013-10-01
Classification: G11C,H01L,H03K

Abstract:
1. A semiconductor integrated circuit comprising: a storage circuit configured to hold data obtained by arithmetic operation; and a power-gating control circuit configured to control supply of a power supply voltage to the storage circuit, wherein the storage circuit includes first to n-th sequential circuits (n is a natural number of 2 or more), and first to n-th combinational circuits configured to operate with an output signal from the respective first to n-th sequential circuits, and wherein each of k sequential circuits (k is a natural number of 1 to n) among the first to n-th sequential circuits includes a transistor whose channel region comprises an oxide semiconductor, and a capacitor having one of electrodes electrically connected to a node that is brought into a floating state when the transistor is turned off.