Patent ID: 7317904
Filing Date: 2008-01-08
Classification: H03D,H04B

Abstract:
1. A DC offset cancel circuit including: an analog adder which subtracts, from a baseband analog signal input to one end, an analog correction signal input from the other end; an A/D converter which converts an output of the analog adder to a digital value; a control circuit which extracts an output digital value of the A/D converter as a sample value; a control section which controls an operation timing of the control circuit; a memory which stores the sample value; a D/A converter which converts upper bits of the sample value to an analog value and outputs the analog value as the analog correction signal to the analog adder; and an adder which subtracts, from an output of the A/D converter input to one end, lower bits of the sample value input from the other end.