Patent ID: 8901607
Filing Date: 2014-12-02
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate having an N-type field-effect transistor (N-FET) region; a gate region in the N-FET region; source and drain (S/D) regions separated by the gate region in the N-FET region; a first portion of a fin structure in the gate region of the N-FET region, the first portion of the fin structure including: a second portion of the fin structure in the S/D regions of the N-FET region, the second portion of the fin structure including: source/drain features on top of the upper portion of the second portion of the fin structure in the source/drain region; and a high-k (HK)/metal gate (MG) stack on the substrate including wrapping over a portion of the first portion of the fin structure in the gate region.