Patent ID: 6267479
Filing Date: 2001-07-31
Classification: H01L

Abstract:
A semiconductor device containing in a single chip a low withstanding voltage MOS transistor and a high withstanding voltage MOS transistor, wherein:the low withstanding voltage MOS transistor comprisinga first gate oxide film having a first thickness,a first channel region formed below the first gate oxide film, anda first source/drain region formed across the first channel region, the first source/drain region including lightly doped drain extensions;the high withstanding voltage MOS transistor comprisinga second gate oxide film having a second thickness which is greater than the first thickness,a second channel region formed below the second gate oxide film, anda second source/drain region formed across the second channel region, the second source/drain region including lightly doped drain extensions;the first channel region side end of the first source/drain region has an impurity profile differing from that of the second channel region side end of the second source/drain region;the first channel region side end of the first source/drain region has a junction depth of 1 .mu.m or less; andthe second channel region side end of the second source/drain region have a junction end of 1 .mu.m or less,wherein the lightly doped drain extensions of the first source/drain region include the first channel region side end of the first source/drain region, and the lightly doped drain extensions of the second source/drain region include the second channel region side end of the second source/drain region.