Patent ID: 6781227
Filing Date: 2004-08-24
Classification: H01L

Abstract:
A compression assembled semiconductor package comprising:a semiconductor die having a first major surface and a second major surface; a control electrode disposed on a first major surface of said semiconductor die, and first and second electrodes disposed on first and second major surfaces respectively of said semiconductor die; a molded plastic insulation ring annularly disposed around said semiconductor die; a control signal carrier extending through said molded insulation ring from the exterior thereof and electrically connected to said control electrode; a first pole being in surface-to-surface electrical contact with said first electrode; and a second pole being in surface-to-surface electrical contact with said second electrode, whereby said semiconductor die is held in place between said first pole and said second pole; wherein said first pole comprises and forms a unitary body with a rim, said rim being ultasonically bonded directly to an end of said molded plastic insulation ring.