Patent ID: 6208177
Filing Date: 2001-03-27
Classification: H03K

Abstract:
An integrated circuit having an output buffer circuit for driving voltage state transitions of a transmission line, the output buffer circuit comprising:(a) an output transistor having a gate terminal for controlling an output voltage of the output transistor which is applied at an output terminal to the transmission line, wherein a voltage state transition comprises changing the output voltage from a first state voltage to a second state voltage;(b) an impulse current driver for providing an impulse current for injecting charge into the gate terminal during an impulse phase at the beginning of the voltage state transition to rapidly bring the output transistor through its dead zone to the threshold of its active region; and(c) a slewing current driver for providing a gentle Miller limited slewing current to the gate terminal after the impulse phase, wherein the slewing current causes a gentle Miller limited voltage state transition and is comparatively limited with respect to the impulse current so as to cause the output transistor to complete a substantially smooth voltage state transition.