Patent ID: 6603829
Filing Date: 2003-08-05
Classification: H03L,H04L

Abstract:
A method for phase matching between a cyclical data signal and a clock signal, said method comprising the steps of:deriving a number of phase clock signals exhibiting a same offset relative to one another from a clock signal; supplying a data signal and said phase clock signals to a data edge detector; determining a distribution signal over a measuring time span equal to a number of cycles of said data signal, said distribution signal containing information about positions of edges of said data signal with reference to said individual phase clock signals; outputting said distribution signal from said data edge detector; forming a delay value from said distribution signal by addressing a tabularly stored allocation of delays to different distribution signals, and, based on said distribution signal, selecting a delay value from a table which is allocated to said distribution signal and which represents a largest continuous area between successive transitions; and matching a phase position between said data signal and said clock signal based on said delay value.