Patent ID: 6782355
Filing Date: 2004-08-24
Classification: G06F

Abstract:
A hardware design emulation system, comprising:an emulator associated with a workstation external to said emulation system, said emulator programmable with executable logic having a user model portion defining a hardware design and a non-user-model portion reflecting peripheral system functions; a handshaking controller associated with said emulator producing a domain step signal and a model step signal, said domain step signal indicating said emulator is entering a state for executing a portion of its logic, and said model step signal indicating said emulator is entering a state for advancing said user model executing on said emulator; and a run-time assist unit (RTAU) external to said emulator performing a portion of said emulation and communicating emulation data with said emulator, said RTAU producing a domain halt signal and a model halt signal in response to said domain step signal and said model step signal received from said handshaking controller, said handshaking controller not producing said domain step and model step signals again until said RTAU deasserts said domain halt and model halt signals.