Patent ID: 6246124
Filing Date: 2001-06-12
Classification: H01L

Abstract:
A semiconductor chip module comprising:a substrate having a substantially planar surface;a pattern of circuit areas disposed on the surface of the substrate;non-conductive bare areas adjacent the circuit areas, the bare areas being substantially planar and further being substantially coplanar to the surface of the substrate;a semiconductor chip positioned on the substrate and electrically coupled thereto;a first dielectric layer disposed on the surface of the substrate between the substrate and the chip and having at least one anchor opening located to at least partially expose a corresponding one of the bare areas;a second dielectric layer covering the chip and forming an outer perimeter with the at least one anchor opening spaced inwardly from the perimeter;the dielectric material of the second layer having flowed into the at least one anchor opening to be deposited on and adhered to the corresponding one of the bare areas, thereby bonding the second dielectric layer directly and integrally to at least one of the bare areas to enhance the adhesion of the second dielectric layer.