Patent ID: 8169023
Filing Date: 2012-05-01
Classification: H01L

Abstract:
1. A power semiconductor device, comprising: a semiconductor substrate of a first conductivity type; a drift layer of the first conductivity type formed on the semiconductor substrate and having an impurity concentration lower than an impurity concentration of the semiconductor substrate; a base layer of a second conductivity type formed on the drift layer; a source layer of the first conductivity type formed on a portion of the base layer; a plurality of trench gate electrodes extending through the source layer and the base layer to enter into an interior of the drift layer; a gate insulation film provided between the trench gate electrode and the drift layer, the base layer, and the source layer; a base contact layer of the second conductivity type formed in a region of an upper layer portion of the base layer between the trench gate electrodes and having an impurity concentration higher than an impurity concentration of the base layer; a source electrode connected to the source layer and the base contact layer; and a drain electrode connected to the semiconductor substrate, an impurity concentration profile of the base contact layer along a direction perpendicular to an upper face of the semiconductor substrate being highest at an upper face of the base contact layer, having a local minimum value at a position other than the upper face and a lower face of the base contact layer, and having a local maximum value at a position lower than the position of the local minimum value.