Patent ID: 6660597
Filing Date: 2003-12-09
Classification: H01L

Abstract:
A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:(a) preparing a silicon substrate having a first region and a second region on a principal surface; (b) removing a film including a natural oxide film formed on the principal surface of the silicon substrate, and thereby exposing a silicon layer on the principal surface of the silicon substrate; (c) forming, after the step (b), a first insulating film having a smaller relative dielectric constant than that of a silicon nitride film on the silicon layer; (d) selectively removing the first insulating film in the second region, leaving the first insulating film in the first region, and thereby exposing the silicon layer in the second region; (e) forming, after the step (d), a second insulating film having a larger relative dielectric constant than that of a silicon nitride film on the first insulating film in the first region and on the silicon layer in the second region; (f) forming a first conductive layer on the second insulating film; and (g) patterning the first conductive layer, and thereby forming a gate electrode of a first MISFET comprised of the first conductive layer on the second insulating film in the first region and forming a gate electrode of a second MISFET comprised of the first conductive layer on the second insulating film in the second region, wherein at least the steps (b) to (e) are continuously carried out without exposing the silicon substrate to air.