Patent ID: 8912654
Filing Date: 2014-12-16
Classification: H01L

Abstract:
1. An integrated circuit, comprising: a substrate with a lower and an upper surface, the substrate comprising at least one via extending between the upper and the lower surface, wherein the via comprises a hole formed by substrate material removal with a diameter between 0.1 μm and 50 μm and a length between 1 μm and 500 μm, wherein the hole of the via comprises a conductive material that comprises 75% to 80% carbon, 15% to 20% of boron and 2% to 8% of nitrogen, wherein the conductive material entirely fills the hole of the via such that the conductive material is substantially free of voids, wherein a first metallic contact pad disposed above the upper surface of the substrate is coupled to a first end of the via and a second metallic contact pad disposed below the lower surface of the substrate is coupled to a second end of the via.