Patent ID: 6064108
Filing Date: 2000-05-16
Classification: H01L

Abstract:
An integrated circuit (I.C.) capacitor structure, comprising:a substrate,at least three conductive plates stacked on said substrate, said plates arranged approximately parallel to said substrate and interdigitated such that each conductive plate at least partially overlaps at least one adjacent conductive plate,a plurality of dielectric layers electrically isolating respective conductive plates from their adjacent conductive plates and from said substrate,at least two interconnection traces, each of said traces arranged to interconnect at least two of said conductive plates, the edges of said conductive plates staggered to reduce the number of dielectric layers and conductive plates through which said interconnection traces must traverse, anda plurality of vias through which said interconnection traces traverse said dielectric layers and conductive plates, none of said vias superimposed over any other of said vias such that any one of said conductive plates contacts only one other of said conductive plates at any given spatial location.