Patent ID: 6677204
Filing Date: 2004-01-13
Classification: G11C,H01L

Abstract:
A method of forming a multibit nonvolatile memory comprising:forming a plurality of parallel lines, each line comprising a first heavily doped semiconductor region of a first conductivity type, a second lightly doped semiconductor region of a second conductivity type on the first region and a third heavily doped semiconductor region of the first conductivity type on the second region, each of said plurality of parallel lines having a top surface comprising a top surface of a respective third heavily doped semiconductor region, a bottom and first and second laterally opposite sidewalls; forming a first pair of charge storage media adjacent to and in contact with said first and second laterally opposite sidewalls of said plurality of parallel lines; forming a first pair of control gates adjacent to said first pair of charge storage media adjacent to said first and second laterally opposite sidewalls; depositing conductor film over and in contact with said top surface of said plurality of parallel lines; etching said conductor film into a plurality of source/drain conductor lines which are perpendicular to said plurality of parallel lines, and etching a portion of said plurality of parallel lines not covered by said conductor lines to form a plurality of pillars, said pillars having third and fourth laterally opposite sidewalls; forming a second pair of charge storage media adjacent to and in contact with said third and fourth laterally opposite sidewalls of said pillars; and forming a second pair of control gates adjacent to and in contact with said second pair of charge storage media.