Patent ID: 8951811
Filing Date: 2015-02-10
Classification: B82Y,G11C,H01F,H01L

Abstract:
1. A method of fabricating a memory device, comprising: depositing and forming a common reference layer on a first racetrack film, the first racetrack film comprising a first racetrack magnetic film deposited on a complementary metal on oxide (CMOS) layer fabricated on a substrate, and a first magnetic tunnel junction (MTJ) barrier layer deposited on the first racetrack magnetic film layer; depositing a dielectric encapsulation on the reference layer; depositing a second racetrack film on the dielectric encapsulation, the second racetrack film comprising a second MTJ barrier layer deposited on the reference layer and a second racetrack magnetic film layer deposited on the second MTJ barrier layer; and exposing the reference layer to couple the second racetrack film to the reference layer.