Patent ID: 6335841
Filing Date: 2002-01-01
Classification: G11B,H03M

Abstract:
A coding apparatus comprising:a QMTR (Quasi-Maximum Transition Run) coding device for inputting a data stream, and translating said data stream into a coded bit stream in which a number of continuous â€œ1â€ s in a bit stream of a coded word is limited smaller than or equal to r bits; a parity generating circuit for inputting said coded bit stream outputted from said QMTR coding device, generating a parity bit with respect to a fixed length block of said coded bit stream, and adding said parity bit to said fixed length block of said coded bit stream; and a bit converting circuit for inputting the bit stream with parity outputted from said parity generating circuit, and converting said parity bit, a bit stream of a predetermined number of bits in said bit stream immediately before said parity bit and a bit stream of a predetermined number of bits in said bit stream immediately after said parity bit by using a predetermined conversion rule to limit a number of continuous â€œ1â€ s smaller than or equal to r bits.