Patent ID: 6140163
Filing Date: 2000-10-31
Classification: H01L

Abstract:
A method of making a high performance semiconductor device structure comprising the steps of:providing a bulk semiconductor substrate;providing an upper level silicon substrate having a thickness of less than 1,000 .ANG., the upper level silicon substrate including a low-K dielectric layer formed on the bulk semiconductor substrate and a silicon substrate layer formed upon the low-K dielectric layer, the silicon substrate layer and low-K dielectric layer being patterned into the upper level substrate in a first region and the bulk semiconductor substrate being exposed in a second region, the low-K dielectric layer having a dielectric K-value in the range of 2.0-3.8;forming a gate oxide layer over the upper level substrate in the first region and over the exposed bulk semiconductor substrate in the second region; andforming transistor device formations in the upper level substrate and in the bulk semiconductor substrate such that the upper level silicon substrate definition is maintained.