Patent ID: 6218711
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A silicon chip, comprisinga silicon substrate;a source extension in the substrate;a drain extension in the substrate;a gate oxide on the substrate extending from the source extension to the drain extension;a gate on the gate oxide, wherein part of the gate is poly-silicon and part of the gate is a silicide;a raised source on the substrate and over the source extension, wherein part of the raised source is made of silicon and germanium and part of the raised source is a silicide, and wherein the germanium has a graded concentration that is greater than 4% near where the raised source is closest to the substrate and where the concentration of the germanium decreases to less than 1% where the raised source is furthest from the substrate; anda raised drain on the substrate and over the drain extension, wherein part of the raised drain is made of silicon and germanium and part of the raised drain is a silicide, and wherein the germanium has a graded concentration that is greater than 4% near where the raised drain is closest to the substrate and where the concentration of the germanium decreases to less than 1% where the raised drain is furthest from the substrate.