Patent ID: 6097069
Filing Date: 2000-08-01
Classification: H01L

Abstract:
A field effect transistor comprising:a. a substrate having a first doped region forming a source and a second doped region forming a drain, and a gate structure forming a channel between the source and drain regions to form the field effect transistor;b. a trench isolation region formed in the substrate around the transistor to isolate the transistor from other devices formed in the substrate, with the trench isolation region forming first and second junction corner devices with the channel;c. a first dielectric layer formed under the gate structure to form a gate insulator for the field effect transistor;d. a second corner edge dielectric layer formed under the gate structure and over the first and second corner devices such that the corner edge dielectric layer increases the thickness of dielectric over each corner device, and thus increases the threshold voltage (Vt) and edge breakdown voltage and decreases corner gate-induced drain leakage.