Patent ID: 7888800
Filing Date: 2011-02-15
Classification: H01L,Y10T

Abstract:
1. A semiconductor structure, comprising: a first rigid dielectric layer; a second rigid dielectric layer; a first non-rigid low-k dielectric layer formed between the first and second rigid dielectric layer; a plurality of dummy fill shapes formed in the first non-rigid layer which replace portions of the first non-rigid low-k dielectric layer with lower coefficient of thermal expansion (CTE) metal such that an overall CTE of the first non-rigid low-k dielectric layer and the plurality of dummy fill shapes matches a CTE of the first and second rigid dielectric layers more closely than that of the first non-rigid low-k dielectric layer alone, wherein the dummy fill shapes physically connect together the first and second rigid dielectric layers and have a density of approximately between 45% and 50% of a density of the first non-rigid low-k dielectric layer; a second non-rigid low-k dielectric layer formed on the second rigid dielectric layer; a third rigid dielectric layer formed on the second non-rigid low-k dielectric layer; a metal interconnect extending between the second and third rigid dielectric layer and formed in the second non-rigid low-k dielectric layer; and at least one dummy fill shape formed in the second non-rigid low-k dielectric layer in proximity to the metal interconnect, the at least one dummy fill shape being formed of a material such that an overall CTE of the at least one dummy fill shape better matches to the second and third rigid dielectric layer than that of the second non-rigid low-k dielectric layer.