Patent ID: 6777908
Filing Date: 2004-08-17
Classification: H02J

Abstract:
A voltage balancing circuit comprising:a low power op-amp having a positive input terminal, a negative input terminal, and an output terminal; said op-amp connected to a first resistor; said first resistor having a first and second end, said first end connected to said op-amp output terminal and said second end connected to an inter-cell interface; a second high impedance resistor connected between said op-amp positive input terminal and an external-cell positive interface; a third high impedance resistor connected between said op-amp positive input terminal and an external-cell negative interface; wherein said second and third resistors are precision matched; and a connection between said op-amp negative input terminal and said first end of said first resistor wherein either: current flows away from said op-amp and in the direction of said inter-cell interface when appropriate to balance voltages; or current flows in the direction of said op-amp and away from said inter-cell interface when appropriate to balance voltages.