Patent ID: 8952516
Filing Date: 2015-02-10
Classification: H01L

Abstract:
1. A system comprising a microelectronic package, the microelectronic package, comprising: a substrate having first and second opposed surfaces, a plurality of substrate contacts at the first surface, and a plurality of terminals at the second surface configured to connect with at least one component external to the substrate; and first and second microelectronic elements, the first microelectronic element having a first surface facing the first surface of the substrate and a second surface opposite therefrom, the first microelectronic element having a lateral edge extending between the first and second surfaces thereof and extending in the second direction, the second microelectronic element having a front surface facing the first surface of the substrate, each microelectronic element having a plurality of element contacts at the front surface thereof, the element contacts of each microelectronic element being joined with corresponding ones of the substrate contacts, the front surface of the second microelectronic element partially overlying a rear surface of the first microelectronic element and attached thereto, the front surface of the second microelectronic element projecting in the first direction beyond the lateral edge of the first microelectronic element, the second microelectronic element having first and second opposed edges extending between the front and rear surfaces of the second microelectronic element and extending in the first direction, the front surface of the second microelectronic element having a first outer region adjacent the first edge, a second outer region adjacent the second edge, and a central region disposed between the first and second outer regions, each of the first and second outer regions and the central region having equal width such that the central region extends a middle third of a distance between the first and second edges, the element contacts of the second microelectronic element being disposed in two adjacent parallel rows in the central region, wherein the element contacts of the first microelectronic element are arranged in an area array and are flip-chip bonded with a first set of the substrate contacts, and the element contacts of the second microelectronic element are joined with a second set of the substrate contacts by elongated solder connects, each elongated solder connect having a width that is less than a distance between the corresponding one of the element contacts and the corresponding one of the substrate contacts to which it is joined.