Patent ID: 6245611
Filing Date: 2001-06-12
Classification: G11C,H01L,Y10S

Abstract:
A method of manufacturing a semiconductor integrated circuit device, comprising steps of:providing a semiconductor substrate having a gate insulating film of a MISFET over a main surface of said semiconductor substrate, a first conductive film, serving as a gate electrode of said MISFET, over said gate insulating film, a first insulating film over said first conductive film, and a first semiconductor region in said semiconductor substrate and serving as a source region or a drain region of said MISFET, wherein said first insulating film has a thinner part over a part of said first conductive film than over another part of the first conductive film;forming an etching stopper film over said first insulating film;forming a second insulating film over said etching stopper film; andforming an opening by etching said second insulating film using said etching stopper film as etching stopper and by removing said etching stopper film positioned over said part of said first conductive film and said first semiconductor region.