Patent ID: 7122428
Filing Date: 2006-10-17
Classification: H01L

Abstract:
1. A method of fabricating a flash memory device, comprising the steps of: forming a nitride layer pattern defining a trench forming area on a semiconductor substrate; forming a spacer on a sidewall of the nitride layer pattern; forming a trench in the semiconductor substrate by removing a portion of the semiconductor substrate using the nitride layer pattern and the spacer as an etch mask; forming a device isolation layer filling up the trench; removing the nitride layer pattern and the spacer so that a portion of the device isolation layer above the semiconductor substrate has a negative profile; forming a conductor layer over the semiconductor substrate including the device isolation layer; planarizing the conductor layer and the device isolation layer to lie in a same plane; and removing the device isolation layer embedded in the planarized conductor layer; forming an insulating layer over the semiconductor substrate.