Patent ID: 7649425
Filing Date: 2010-01-19
Classification: G06F,H03J,H03K,H03L

Abstract:
1. A free running clock circuit, comprising: a switching circuit for switching between first and second logic states at a predetermined frequency, said switching circuitry changing between said first and second logic states based upon a trip voltage, said switching circuitry having an inherent temperature profile associated therewith; and a voltage divider circuit for outputting a defined trip voltage that is compensated over temperature to offset the temperature profile of said switching circuit to provide an overall temperature compensated operation for said free running clock circuit, the voltage divider circuit having a top digitally programmable resistor array comprised of a pair of resistor arrays in parallel connected in series with at least two bottom digitally programmable resistor arrays connected in parallel between two supply terminals of differing voltages; wherein process variations in the top digitally programmable resistor array comprised of the pair of resistor arrays in parallel approximately cancel process variations in the at least two bottom digitally programmable resistor arrays connected in parallel.