Patent ID: 9209804
Filing Date: 2015-12-08
Classification: G11C,H01L,H03K

Abstract:
1. A method for calibrating an output buffer, the method comprising: adjusting a first impedance code applied to a first plurality of first transistor units connected in parallel between a calibration terminal and a first power supply potential so that the potential on the calibration terminal substantially equals a reference potential; applying the first impedance code to a second plurality of first transistor units connected in parallel between a node and the first power supply potential; adjusting a second impedance code applied to a second transistor unit connected between the node and a second power supply potential so that the potential on the node substantially equals the reference potential; applying the first impedance code to a third plurality of first transistor units connected in parallel between a data terminal and the first power supply potential; and applying the second impedance code to a fourth plurality of second transistor units connected in parallel between the data terminal and the second power supply potential, wherein each of the first transistor units comprises a plurality of transistors of a first conductivity type connected in parallel to each other, each of the second transistor units comprises a plurality of transistors of a second conductivity type opposite the first conductivity type connected in parallel to each other, and the calibration terminal is connected through a resistor to the second power supply potential.