Patent ID: 8999775
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A method of forming a pixel structure, comprising: providing a substrate; forming a patterned semiconductor layer on the substrate; forming an insulation layer on the patterned semiconductor layer; forming a patterned metal layer on the insulation layer, wherein the patterned metal layer partially overlap the patterned semiconductor layer in a perpendicular projection direction; forming a first inter-layer dielectric (ILD) layer covering the patterned metal layer after forming the patterned metal layer; performing a low temperature annealing process after forming the first ILD layer; performing a hydrogen plasma treatment process after the low temperature annealing process; forming a second ILD layer covering the first ILD layer after the hydrogen plasma treatment process; forming a third ILD layer covering the second ILD layer; forming a first contact window and a second contact window in the third ILD layer, the second ILD layer, the first ILD layer and the insulation layer to partially expose the patterned semiconductor layer, respectively; forming a source electrode and a drain electrode on the third ILD layer, wherein the source electrode is electrically connected to the patterned semiconductor layer via the first contact window, and the drain electrode is electrically connected to the patterned semiconductor layer via the second contact window; forming a passivation layer on the source electrode and the drain electrode, and forming a third contact window in the passivation layer to partially expose the drain electrode; and forming a pixel electrode on the passivation layer, the pixel electrode being electrically connected to the drain electrode via the third contact window.