Patent ID: 6160428
Filing Date: 2000-12-12
Classification: H03K

Abstract:
A trigger circuit arranged to provide a reset voltage signal at a trigger circuit output line useful in initializing an integrated circuit connected thereto based upon an input voltage signal received at a trigger circuit input line having an associated input voltage ramp rate indicative of the rate of increase in the input voltage signal from zero to full voltage, the reset voltage signal being ratiometric to the input voltage signal whenever the input voltage signal becomes at least equal to a selectable trip point voltage, comprising:a first voltage signal generator connected in series between the trigger circuit input line and ground arranged to generate a first voltage signal based upon the input voltage signal having a first voltage signal ramp rate at a first voltage signal generator output line, wherein the first voltage signal generator is a first voltage divider arranged to generate the first voltage signal at a first voltage divider output line, and wherein the first voltage divider is formed of a first PMOS transistor, a second PMOS transistor,and a third PMOS transistor connected in series between the trigger circuit input line and ground;a second voltage signal generator connected in series between the trigger circuit input line and ground having a second voltage signal generator input line connected to the first voltage signal generator output line arranged to generate a second voltage signal having a second voltage signal ramp rate at a second voltage signal generator output line based upon the first voltage signal, the second voltage signal ramp rate being substantially linear to and greater than the first voltage signal ramp rate;a reset voltage signal generator connected in series between the trigger circuit input line and ground having a reset voltage signal generator input line connected to the second voltage signal generator output line arranged to generate and output the reset voltage signal at a reset voltage signal generator output line only when the input voltage signal becomes at least approximately equal to the trip point voltage; andan inverting amplifier connected in series between the trigger circuit input line and ground having an inverting amplifier input line connected to the reset voltage signal generator output line arranged to increase a voltage gain of the reset voltage signal at the trip point voltage at the trigger circuit output line so as to improve circuit performance.