Patent ID: 6194263
Filing Date: 2001-02-27
Classification: H01L

Abstract:
A method for forming a dynamic random access memory, said method comprising the steps of:forming a memory cell access transistor on a semiconductor substrate wherein said memory cell access transistor includes a source/drain at the surface of the semiconductor substrate;forming an insulating layer on said semiconductor substrate and said memory cell access transistor wherein said insulating layer has a contact hole therein exposing a portion of said source/drain of said memory cell access transistor;forming a first capacitor electrode on said insulating layer wherein said first capacitor electrode is connected to said source/drain of said memory cell access transistor through said contact hole;forming HSG-silicon seeds on the surface of said first capacitor electrode; andetching said first capacitor electrode using said HSG-silicon seeds as a mask so that pits are formed between said HSG-silicon seeds;wherein said etching step comprises using an etching gas while varying an incident angle of said etching gas.