Patent ID: 6228539
Filing Date: 2001-05-08
Classification: G03F,G06F

Abstract:
A method of generating a set of mask definitions corresponding to a set of masks for fabricating at least a layer of material of a circuit using a first manufacturing process having a first particular dimension, said method comprising:accessing a first data set defining at least a portion of a layout of said circuit corresponding to said layer, said layout being for a second manufacturing process having a second particular dimension, said second particular dimension being greater than said first particular dimension; identifying a first set of areas in said layout, destructive light interference being used to realize a dimension of a first set of structures in said layer corresponding to areas in the first set of areas;creating a first mask definition defining a set of phase shifting areas corresponding to said first set of structures; and,creating a second mask definition defining a second set of areas in said layout, said second set of areas including at least some areas in said layout defining a second set of structures in said layer and not using destructive light interference to be realized, wherein said first mask definition and said second mask definition are included in said set of mask definitions.