Patent ID: 7186632
Filing Date: 2007-03-06
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device having a laminated gate electrode, comprising: forming a phosphorus-doped polysilicon layer on a gate oxide film; forming a high-melting metal or a compound of a high-melting metal and silicon on the polysilicon layer; doping phosphorus into the polysilicon layer so that a concentration of the phosphorus in the polysilicon layer at an interface between the polysilicon layer and the gate oxide film is 2×10 carrying out thermal oxidation of about 3 to 5 nm of the polysilicon layer without oxidizing the high-melting metal by treating in a wet-hydrogen atmosphere containing water vapor, wherein the wet-hydrogen atmosphere contains 5 to 10% by volume of water vapor, and wherein the thermal oxidation is carried out under conditions of a temperature of 800 to 900° C.