Patent ID: 7755196
Filing Date: 2010-07-13
Classification: H01L

Abstract:
1. An integrated circuit arrangement comprising: a first electrode layer which contains at least one first electrode; a second electrode layer which contains at least one second electrode, a dielectric layer between the first electrode layer and the second electrode layer and having at least one aperture that passes through the dielectric layer to the at least one first electrode, wherein the second electrode layer includes a first electrically conductive layer overlying and adjacent to the dielectric layer but not within the at least one aperture, and a second electrically conductive layer overlying the first electrically conductive layer and extending into the at least one aperture and contacting the first electrode, wherein the second electrically conductive layer comprises a liner/barrier layer, and wherein the second electrode comprises an electrically conductive material different from the first electrically conductive layer and the second electrically conductive layer.