Patent ID: 6115716
Filing Date: 2000-09-05
Classification: G06F,Y10S

Abstract:
A method for implementing a memory, in which memory data is stored as data units for each of which a dedicated storage space is assigned in the memory, in accordance with which methodthe memory is implemented as a directory structure comprising a tree-shaped hierarchy having nodes at several different levels, wherein an individual node can be (i) a trie node comprising an array wherein an individual element may contain the address of a lower node in the tree-shaped hierarchy and wherein an individual element may also be empty, or (ii) a bucket containing at least one element so that the type of an individual element in the bucket is selected from a group including a data unit, a pointer to a stored data unit, a pointer to another directory structure and another directory structure,in at least part of the directory structure sets of successive trie nodes are replaced with compressed nodes in such a way that an individual set made up by successive trie nodes, from each of which there is only one address to a trie node at a lower level, is replaced with a compressed node (CN),address computation performed in the directory structure comprises the steps of(a) selecting in the node at the uppermost level of the tree-shaped hierarchy a predetermined number of bits from the bit string formed by the search keys employed, forming from the selected bits a search word with which the address of the next node is sought in the node, and proceeding to said node,(b) selecting from the unselected bits in the bit string formed by the search keys employed a predetermined number of bits and forming from the selected bits a search word with which the address of a further new node at a lower level is sought from the array of the node that has been accessed,repeating step (b) until an empty element is encountered or until the address of the new node at a lower level is the address of a bucket,characterized by implementing the arrays in the trie nodes as quad nodes having a fixed size of four elements,storing in an individual compressed node an address to the quad node that the lowest node in the set to be replaced points to, the value of the search word by means of which said address is found, and the total number of bits from which search words are formed in the set to be replaced, whereby said compressed nodes are formed so that said total number in a compressed node is smaller than or equal to the word length employed, andfurther compressing chains of several successive compressed nodes by replacing a single chain with a single collecting node (CN4) storing the sum of said total numbers in said successive compressed nodes, and a list of the values of the search words obtained from said successive compressed nodes.