Patent ID: 7847638
Filing Date: 2010-12-07
Classification: H03F

Abstract:
1. A cascoded circuit, comprising: a first transistor having a drain electrically to connect to a higher voltage source; a second transistor having a drain connected to a source of the first transistor, the second transistor having a source electrically to connect to a lower voltage source; a third transistor having a drain electrically to connect to the higher voltage source; and a fourth transistor having a drain connected to a source of the third transistor, the fourth transistor having a source electrically to connect to the lower voltage source, wherein the first transistor, the second transistor, the third transistor and the fourth transistor are N channel insulated gate field effect transistors, the threshold voltages of the second transistor and the fourth transistor are larger than those of the first transistor and the third transistor, and wherein the first transistor, the second transistor, the third transistor and the fourth transistor are formed in the same active region, and gates of the first transistor, the second transistor, the third transistor and the fourth transistor are arranged in parallel with each other.