Patent ID: 7913014
Filing Date: 2011-03-22
Classification: G06F

Abstract:
1. A data processing system comprising: at least one first processing unit configured to perform latency critical processing; at least one second processing unit configured to perform real time processing; at least one memory module for storing data from said at least one first and second processing unit; an interconnect means for coupling said memory module to the first and second processing units; and an arbitration unit for arbitrating for access to the memory module for the first and second processing units on a time window basis by monitoring a first access time during which the second processing unit has accessed the memory module and a second access time which is required by the second processing unit to complete its processing during a predefined time window, and by comparing the second access time to the remaining access time in the time window, wherein said arbitration unit is configured to allow said at least one first processing unit to access the memory module in said time window if the remaining access time is larger than the second access time, and allows the at least one second processing unit to access the memory module if the remaining access time is not larger than the second access time, wherein said arbitration unit is configured to first give a high priority to latency critical traffic from said at least one first processing unit in order to provide a low latency access, and to place traffic of the at least one second processing unit in any empty time slots during which the latency critical traffic is not present, and wherein during the process of a time window the arbitration unit is configured to switch a priority to the traffic of the at least one second processing unit if the latency critical traffic requests access to the at least one memory module such that the arbitration unit detects that a programmed real-time requirement is close to being violated, so as to provide a bandwidth guarantee for the traffic of the at least one second processing unity and to only provide a latency hit when an actual threat of violating the real-time requirements is present.