Patent ID: 6795121
Filing Date: 2004-09-21
Classification: H01L,H04N

Abstract:
An MOS-type solid-state imaging apparatus comprising:unit cells arranged in an array; a selector configured to select one row of the unit cells; selection lines connected to said selector, to which a selection signal is supplied, the selection signal having two levels; reset lines connected to said selector and each row of said unit cells, to which a reset signal is supplied, the reset signal having two levels; and vertical signal lines to which outputs from said unit cells in each column are supplied, wherein each of said unit cells comprises: a photoelectric conversion portion; an amplification transistor having a gate to which an output from said photoelectric conversion portion is supplied, a source connected to said vertical signal line, and a drain connected to said selection line; and a reset transistor having a gate to which the reset signal is supplied, a source connected to the photoelectric conversion portion, and a drain connected to the selection line, and wherein said amplification transistor has a short channel effect that when a selection voltage is applied to said selection line, a channel potential under the gate changes to a voltage not less than a signal voltage of said photoelectric conversion portion.