Patent ID: 6404012
Filing Date: 2002-06-11
Classification: G09G,H01L

Abstract:
A semiconductor device having a substrate comprising:a source diffusion layer which is formed in said substrate; an extended drain diffusion layer which is formed in said substrate; a drain diffusion layer which is formed in said extended drain diffusion layer; a reverse conductive type diffusion layer which is formed adjacent to said drain diffusion layer in said extended diffusion layer, and extending to a surface of said substrate, said reverse conductive type diffusion layer having a conductive type opposite to that of said extended drain diffusion layer; a main gate region which is formed between said source diffusion layer and said extended drain diffusion layer and on said substrate; a sub-gate region which is formed between said reverse conductive type diffusion layer and said drain diffusion layer and on said extended drain diffusion layer, wherein said sub-gate region is formed over at least half of a distance between said reverse conductive type diffusion layer and said drain diffusion layer on said extended drain diffusion layer, a source electrode which is placed on said source diffusion layer; and a drain electrode, formed separately from a sub-gate electrode, said drain electrode placed in said drain diffusion layer and contacting said sub-gate electrode, wherein said main gate region is composed of a main gate oxide film and a main gate electrode formed thereon while said sub-gate region is composed of a sub-gate oxide film with said sub-gate electrode formed thereon.