Patent ID: 6134247
Filing Date: 2000-10-17
Classification: H03M,H04J

Abstract:
A broadband line interface circuit comprising:a) a transmission module, including:1) a multiplexer for receiving data from at least one input data tributary;2) a parity generator for calculating a byte parity of data passing through the multiplexer, and for inserting a resulting byte parity calculation into a predetermined field of a data frame;3) a randomizer for performing randomization on the data that had passed through the multiplexer, the randomizer including:means for performing terminal randomization independently on each input data tributary that is synchronously multiplexed by the multiplexer;means for performing line randomization on a global stream of bytes, after the tributaries have been multiplexed by the multiplexer; anda disable input for receiving a disable signal that is a primary input of the transmission module, for disabling both the means for performing the terminal randomization and the means for performing the line randomization;4) a parallel-to-serial converter for receiving multiplexed data from the multiplexer and for converting it to a serial data stream that is transmitted from the transmission module; and5) a transmission clock generator for generating transmission clocks to govern timing of transmission of the serial data from the transmission module; andb) a reception module, including:1) a reception clock generator for generating reception clocks to govern timing of reception of receiving serial data;2) a serial-to-parallel converter, controllably timed by one of the reception clocks, for converting the received serial data into parallel data;3) a parity verification block for verifying byte parity in the received serial data;4) a demultiplexer for demultiplexing parallel data from the serial-to-parallel converter into at least one output data tributary; and5) a derandomizer for derandomizing the data passing through the demultiplexer.