Patent ID: 7688887
Filing Date: 2010-03-30
Classification: H03L,H04L

Abstract:
1. A precision adaptive equalizer circuit, comprising: a variable gain equalizer operable to apply a variable gain to an input signal to generate an equalized output signal; and a phase and pattern detector circuit coupled in a feedback loop with the variable gain equalizer, the phase and pattern detector circuit being operable to identify a high frequency data pattern in the equalized output signal and compare the high frequency data pattern with a clock signal to detect a high frequency phase error; the phase and pattern detector circuit being further operable to generate a control signal as a function of the high frequency phase error, the control signal being fed back to the variable gain equalizer to control the variable gain applied to the input signal; a clock and data recovery circuit operable to extract a recovered clock signal from the equalized output signal; wherein the phase and pattern detector circuit compares the high frequency data pattern with the recovered clock signal to detect the high frequency phase error; wherein the phase and pattern detector circuit and the clock and data recovery circuit include a common phase detector circuit.