Patent ID: 6897472
Filing Date: 2005-05-24
Classification: B82Y,H01L

Abstract:
1. A semiconductor device comprising: a substrate; and at least one MOSFET adjacent said substrate and comprising a superlattice channel including a plurality of stacked groups of layers, and source and drain regions laterally adjacent said superlattice channel and a gate overlying said superlattice channel for causing transport of charge carriers through said superlattice channel in a parallel direction relative to the stacked groups of layers, each group of layers of said superlattice channel comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon, said energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that said superlattice channel has a higher charge carrier mobility in the parallel direction than would otherwise be present.