Patent ID: 8809152
Filing Date: 2014-08-19
Classification: H01L

Abstract:
1. A method of forming a semiconductor device comprising: forming a passivation layer comprised of silicon germanium oxide on a surface of a germanium containing substrate; depositing a silicon oxide layer on the passivation layer utilizing atomic layer deposition (ALD) at a deposition temperature ranging from 375° C. to 450° C.; forming a high-k gate dielectric layer on the silicon oxide layer; forming a gate structure on a channel portion of the germanium containing substrate, wherein the gate structure includes at least one gate conductor on an upper surface of a dielectric stack comprised of a portion of the high-k gate dielectric layer and a portion of the silicon oxide layer; and forming a source region and a drain region on opposing sides of the channel portion of the germanium containing substrate, wherein during the forming of the passivation layer, germanium oxide is substantially removed from the surface of the germanium containing substrate so that the silicon oxide layer formed on the passivation layer has a substantially uniform thickness.