Patent ID: 6101520
Filing Date: 2000-08-08
Classification: G06F

Abstract:
An arithmetic and logic unit for performing logarithmic operations over a GF(q.sup.4) finite Galois field using logic circuits for logarithmic operations over a GF(q.sup.2) finite Galois field, wherein q can be expressed as 2.sup.n, n.gtoreq.1, n being an integer which is a power of two, and GF(q.sup.4) can be expressed as GF(q.sup.4)={x.vertline.x=a.gamma.+b;a,b.epsilon.GF(q.sup.2)}, said logic circuits for logarithmic operations over a GF(q.sup.2) finite Galois field including logic circuits for logarithmic operations over a GF(q) finite Galois field, wherein GF(q.sup.2) can be expressed as GF(q.sup.2)={x.vertline.x=c.beta.+d;c,d.epsilon.GF(q)}, where .gamma. and .beta. are basis elements of GF(q.sup.4) and GF(q.sup.2) respectively, a and b being referred to as a first element and a second element of an element in said GF(q.sup.4) finite Galois field, and said c and d being referred to as a first element and a second element of an element in said GF(q.sup.2) finite Galois field.