Patent ID: 6141230
Filing Date: 2000-10-31
Classification: H02M,Y02B

Abstract:
A power factor correction circuit comprising:a rectifying circuit having input terminals and output terminals;a storage circuit connected to said output terminals, said storage circuit includes a first diode disposed between first and second capacitors, said storage circuit further including second and third diodes, each of said second and third diodes having one end connected to one of said capacitors and another end connected to one of said output terminals, each of said first and second capacitors includes two terminals, one terminal of each of said first and second capacitors being connected to one of said output terminals, the anode of said second diode being connected to the cathode of said first diode, the cathode of said second diode being connected to one of said output terminals, the cathode of said third diode being connected to the anode of said first diode, and the anode of said third diode being connected to the other of said output terminals, the other terminal of said second capacitor being connected to one of said output terminals through a low impedance circuit; anda voltage doubler circuit including third and fourth capacitors, each of said third and fourth capacitors includes two terminals, one terminal of each of said third and fourth capacitors being connected to one of said output terminals and the other terminal of each of said third and fourth capacitors being connected to a common node which is connected to one of said input terminals.