Patent ID: 8257909
Filing Date: 2012-09-04
Classification: G03F,H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming a resist film over a base layer; exposing a first area of the resist film and developing the exposed resist film to form a resist pattern including an opening in the first area of the resist film; forming a resist pattern smoothing material onto a surface of the resist pattern, thereafter heating and developing the resist pattern so as to form a smoothed resist pattern; and etching the base layer using the smoothed resist pattern as a mask so as to form a pattern of the base layer, wherein the resist pattern smoothing material comprises at least one of cationic surfactants and amphoteric surfactants, wherein at least one of an application thickness of the resist pattern smoothing material and a heat temperature for the heating is adjusted in the range of 70 nm to 90 nm in thickness and in the range of 80° C. to 95° C. in temperature so as to smooth at least wall surfaces of the resist pattern, wherein a maximum opening dimension Dmax (nm) and a minimum opening dimension Dmin (nm) of the smoothed resist pattern are within a range of ±5% with respect to a predetermined opening dimension D (nm) of the opening, wherein the predetermined opening dimension D (nm), and an average opening dimension Dav. (nm) of the smoothed resist pattern having the wall surfaces which have been smoothed satisfy the relation expressed by: wherein the application thickness of the resist pattern smoothing material is within a range of 70 nm to 100 nm.