Patent ID: 8760329
Filing Date: 2014-06-24
Classification: H03M

Abstract:
1. An apparatus comprising: a comparison circuit that is configured to receive an analog signal; a reference circuit that is coupled to the comparison circuit and that is configured to provide a plurality of reference signals to the comparison circuit; a conversion circuit that is coupled to the comparison circuit and that is configured to detect a change in the output of the comparison circuit; a time-to-digital converter (TDC) that is coupled to the comparison circuit; a timer that is coupled to the comparison circuit; an output circuit that is coupled to the conversion circuit and the TDC, wherein the output circuit is configured to output at least one of a synchronous digital representation of the analog signal and an asynchronous digital representation of the analog signal; and an analog-to-digital converter (ADC) that is coupled to the conversion circuit, the timer, and the TDC, wherein the ADC is configured to be enabled by the timer when a predetermined period has lapsed.