Patent ID: 8457176
Filing Date: 2013-06-04
Classification: H04B,H04L

Abstract:
1. A receiver, comprising: an RF circuit comprising a digital control unit, a memory, and a reception path; a data interface configured to receive data and forward the data to the RF circuit over at least one data line; a control interface coupled to the digital control unit and configured to receive control information and an initialization signal, and forward the control information and the initialization signal to the digital control unit; wherein, based on the initialization signal, the digital control unit is configured to program the memory with a plurality of chip settings, wherein respective chip settings are to be used by the RF circuit to receive data during respective timeslots of a frequency hopping sequence; wherein the RF circuit receives data via the data interface according to the frequency hopping sequence in accordance with the control information to the digital control unit via the control interface, wherein the control information reflects a chip setting programmed in the memory and corresponding to a timeslot in the frequency hopping sequence on which data is received.