Patent ID: 6057715
Filing Date: 2000-05-02
Classification: G06J,H03B,H04J

Abstract:
A clock signal generating circuit for generating at least one clock signal from a reference clock signal having a predetermined reference frequency, the clock signal generating circuit comprising:an oscillator generating the reference clock signal;a counter counting the reference clock signal to divide the reference frequency of the reference clock signal so that a count value output from said counter is reset when the count value reaches a predetermined number;sine-wave data generating means for outputting sine-wave data of a sine-wave when the count value is input, a set of the sine-wave data being output for successive numbers of the count value from zero to the predetermined number, the set of the sine-wave data corresponding to a predetermined number of waves of the sine-wave;a digital-to-analog converter converting the set of the sine-wave data into an analog sine-wave signal;a filter selectively filtering a predetermined frequency component contained in the analog sine-wave signal output from said digital-to-analog converter;a comparator converting the analog sine-wave signal output from said filter into said at least one clock signal; andwherein said predetermined number of the count value and the predetermined number of waves are changed by a switch signal provided by an external device.