Patent ID: 6181733
Filing Date: 2001-01-30
Classification: H03H,H04B

Abstract:
A digital matched filter for determining a correlation value between an N-bit digital signal, which is synchronous with a clock, and a digital code sequence which includes M digital codes, comprising:a) first to M-th digital signal storing means applied with said N-bit digital signal;b) digital write selection means for sequentially selecting said first to M-th digital signal storing means one by one in synchronism with said clock to store said N-bit digital signal in the selected digital signal storing means;c) a recursive shift register for digital code sequence having first to M-th stages of code flip-flops connected in cascade, and being operative in synchronism with said clock, whereinsaid M digital codes are stored in said first to M-th stages of code flip-flops, respectively, andan output terminal of said M-th stage of code flip-flop is connected to an input terminal of said first stage of code flip-flop;d) first to M-th digital multiplication means for multiplying output signals of said first to M-th digital signal storing means by output signals of said first to M-th stages of code flip-flops, respectively; ande) digital addition means for adding output signals of said first to M-th digital multiplication means.