Patent ID: 6809373
Filing Date: 2004-10-26
Classification: G11C,H01L,Y10S

Abstract:
A semiconductor memory device including:a semiconducting substrate; a first diffusion region provided in a substrate surface; a first insulating film provided in a first area on said substrate neighboring to said first-diffusion region; a first gate electrode provided on said first insulating film; a second insulating film provided in a second area on said substrate neighboring to said first area; and a second gate electrode provided on said second insulating film, wherein said first diffusion region, said first insulating film, said first gate electrode, said second insulating film and said second gate electrode constitute a unit cell; wherein a second diffusion region is provided in a third area in the substrate surface located in an extension of said second gate electrode; and wherein, in said unit cell, said first gate electrode intersects said second gate electrode via an insulating film.