Patent ID: 6586986
Filing Date: 2003-07-01
Classification: G05F

Abstract:
A circuit in a semiconductor device for generating internal power voltage comprising:a comparison unit for comparing reference voltage and internal voltage; a buffer unit comprising a CMOS inverter for buffering the output signal of the comparison unit; a buffer control unit for controlling power consumption and response speed of the circuit by controlling the current flowing through a foremost CMOS inverter in the buffer unit during a regular operation and also by controlling the current flowing through the foremost CMOS inverter during an active operation; a gate bias unit for supplying a constant voltage source to the buffer unit in operations other than the active operation; a first current supply unit for supplying current according to the output signal of the buffer unit; a second current supply unit for supplying current to the load unit according to the output signal of the comparison unit; and a load unit for generating internal voltage by drawing on the current from at least one of the first and second current supply units.