Patent ID: 8697455
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming an etch stopping layer and a target layer on a substrate including a chip region and a scribe lane; forming a first hard mask pattern on the target layer; forming a second hard mask pattern on the first hard mask pattern; performing a first partial etching process with respect to the target layer using the second hard mask pattern, to form partial contact holes in the chip region and in the scribe lane, respectively; performing a second etching process with respect to the target layer and a third etching process with respect to the etch stopping layer using the first hard mask pattern, to form a trench and a contact hole in the chip region and a first opening portion extending from the partial contact hole in the scribe lane and a second opening portion formed by etching the target layer near the partial contact hole in the scribe lane; and measuring a depth of the partial contact hole formed in the scribe lane by the first partial etching process using a difference between a depth of the first opening portion and a depth of the second opening portion.