Patent ID: 8446170
Filing Date: 2013-05-21
Classification: G11C,H03K

Abstract:
1. A field programmable gate array integrated circuit device comprising: a programmable array having logic modules and routing interconnects programmably coupleable to the logic modules; a random access memory circuit including first, second, and third ports, each of the first second, and third ports comprising a plurality of address input terminals each programmably coupleable to the routing interconnects; wherein each of the first and second ports of the random access memory circuit is readable and asynchronous and further include a plurality of data output terminals each programmably coupleable to the routing interconnects; and the third port of the random access memory circuit is synchronous, writeable, and further includes a plurality of data input terminals each programmably coupleable to the routing interconnects, wherein at least one external input terminal is shared by one address input and one data input.