Patent ID: 9064792
Filing Date: 2015-06-23
Classification: G11C,H01L

Abstract:
1. A semiconductor storage device comprising: a first word line and a second word line both extending in a first direction and being adjacent to each other in a second direction orthogonal to the first direction; a third word line located adjacent to the second word line on the opposite side of the second word line with respect to the first word line, and extending in the first direction so as to be parallel with the second word line; a fourth word line located adjacent to the third word line on the opposite side of the third word line with respect to the second word line, and extending in the first direction so as to be parallel with the third word line; a first active area and a second active area both extending in a third direction that intersects with the word lines, the first and second active areas being isolated from each other by an element isolation area; a first resistance change element connected to the first active area through a first via contact provided between the first and second word lines on the first active area; a second resistance change element connected to the first active area through a second via contact provided between the third and fourth word lines on the first active area; a third resistance change element connected to the second active area through a third via contact provided between the first and second word lines on the second active area; and a fourth resistance change element connected to the second active area through a fourth via contact provided between the third and fourth word lines on the second active area, wherein a total of a line width of one of the word lines and a space width between adjacent word lines has a ratio of about 2:3 to a length of a projected line obtained by projecting a center line on a line in the second direction, the center line being connected between centers of the first and fourth resistance change elements.