Patent ID: 7353412
Filing Date: 2008-04-01
Classification: B60L

Abstract:
1. An electrical circuit comprising: a main input for coupling to an external power supply; a main output for coupling to an electrical device; and a first electrical operable switch interconnected between said main input and said main output, said first electrical operable switch having an open position and a closed position, said first electrical operable switch being conductive in said closed position and being non-conductive in said open position; at least one wake-up input to receive a wake-up signal; at least one sleep input to receive a sleep signal; and a bi-stable sub-circuit coupled to said main input and coupled to said first electrical operable switch, said sub-circuit being connected to said at least one wake-up input and to said least one sleep input such that wherein said bi-stable sub-circuit comprises: a first transistor having an emitter terminal, a collector terminal and a base terminal, wherein said first transistor is configured with a bridge resistor interconnected between its emitter terminal and its base terminal and a base resistor connected to its base terminal; a second transistor having an emitter terminal, a collector terminal and a base terminal, wherein said second transistor is configured with a bridge resistor interconnected between its emitter terminal and its base terminal and a base resistor connected to its base terminal; and an interposed resistor; wherein said first transistor is coupled via its emitter terminal to said main input, via its collector terminal to a first terminal of said interposed resistor and via its base resistor to said collector terminal of said second transistor; wherein said second transistor is coupled via its emitter to ground, via its base resistor to a second terminal of said interposed resistor and via its collector to said base resistor of said first transistor; wherein said at least one wake-up input is coupled to a first connection line between said base resistor of said first transistor and said collector terminal of said second transistor, both being coupled; wherein said at least one sleep input is coupled to a second connection line between said base resistor of said second transistor and said second terminal of said interposed resistor, both being coupled; and wherein said first electrical operable switch is operable with said bi-stable sub-circuit being coupled to said second connection line.