Patent ID: 8483219
Filing Date: 2013-07-09
Classification: H04L

Abstract:
1. A control apparatus comprising: at least one of a hardware processor and circuitry configured to effect portions including: a communication processing portion which is connected to nodes for transmission/reception of a packet marked with a first label, and which transmits/receives a control signal to/from the nodes, and an arithmetic operation portion which is connected to the communication processing portion, wherein: the arithmetic operation portion includes a swap arithmetic operation portion which performs an arithmetic operation of swap information concerned with a path route of the packet, and a label processing portion which sets adjustment of the first label based on a result of the arithmetic operation executed by the swap arithmetic operation portion; the communication processing portion transmits/receives the control signal to/from the nodes based on the setting executed by the label processing portion; and the control a apparatus, including the communication processing portion, the arithmetic operation portion, swap arithmetic operation portion and label processing portion is provided as a component discrete from the nodes.