Patent ID: 9153671
Filing Date: 2015-10-06
Classification: B82Y,H01L

Abstract:
1. A non-planar semiconductor device, comprising: a silicon substrate; a silicon germanium barrier layer formed over the silicon substrate; a germanium layer formed over the silicon germanium barrier layer, wherein at least a portion of the germanium layer comprises a germanium fin structure having a top surface and laterally opposite sidewall surfaces; a silicon capping layer formed on at least a portion of the germanium fin structure, wherein the silicon capping layer covers the top surface and sidewall surfaces of the germanium fin structure; a gate dielectric layer formed on the silicon capping layer, the gate dielectric layer formed atop the portion of the silicon capping layer that covers the top surface of the germanium fin structure and formed adjacent to portions of the silicon capping layer that cover the sidewall surfaces of the germanium fin structure; and a gate electrode layer formed on the gate dielectric layer.