Patent ID: 6187626
Filing Date: 2001-02-13
Classification: H01L

Abstract:
A method for forming a semi-recessed capacitor structure in an inter-polysilicon dielectric layer, comprising:forming a first oxide layer on the surface of a semiconductor substrate;forming a first dielectric layer on the surface of the first oxide layer;forming a second oxide layer on the surface of the first dielectric layer;forming a first photoresist layer on the surface of the second oxide layer to define a first opening as a polysilicon via;etching a portion of the second oxide layer, a portion of the first dielectric layer and a portion of the first oxide layer using the first photoresist as an etching mask until the surface of the semiconductor substrate being exposed to form the first opening;forming a first conductive layer on the surface of the semiconductor substrate and over the surface of the second oxide layer, wherein the first conductive layer fills up the first opening of the polysilicon via;etching a portion of the first conductive layer until the second oxide layer being exposed, whereby the surface of the first conductive layer being lower than the surface of the second oxide layer;forming a second dielectric layer over the surface of the first conductive layer and the second oxide layer;forming a second photoresist layer over the surface of the second dielectric layer to define a capacitor region;etching a portion of the second dielectric layer and a portion of said first dielectric layer until some of the first dielectric layer being remained;depositing a second conductive layer over said second dielectric layer to cover the surface of said second dielectric layer;etching back a portion of said second conductive layer so that the surface of the second conductive layer being lower the surface of the second dielectric layer, whereby the first dielectric layer being as a stop layer;etching the second dielectric layer and the second oxide layer until the bottom surface of the first dielectric layer being exposed, so that some of the second conductive layer remains in the dielectric layer, whereby completing the capacitor structure having the semi-recessed capacitor structure.