Patent ID: 9093459
Filing Date: 2015-07-28
Classification: H01L,Y10T

Abstract:
1. A package structure having a semiconductor component embedded therein, comprising: a first dielectric layer having a first surface and a second surface opposing the first surface; a semiconductor chip embedded in the first dielectric layer in a manner that the semiconductor chip protrudes from the second surface of the first dielectric layer, and having an active surface and an inactive surface opposing the active surface, in which electrode pads are formed on the active surface and in the first dielectric layer, the inactive surface and a part of a side surface adjacent the inactive surface protrude from the second surface of the first dielectric layer and are exposed from the second surface of the first dielectric layer, and the inactive surface is higher than the second surface of the first dielectric layer and exposed to outside; a first circuit layer formed on the first surface of the first dielectric layer, with a plurality of first conductive vias formed in the first dielectric layer for electrically connecting to the first circuit layer to the electrode pads; a built-up structure formed on the first surface of the first dielectric layer and the first circuit layer; and an insulating protective layer formed on the built-up structure, with a plurality of through holes formed in the insulating protective layer for exposing a part of a surface of the built-up structure.