Patent ID: 8028266
Filing Date: 2011-09-27
Classification: G06F

Abstract:
1. A computer-implemented method for automatically generating an electronic circuit layout with placed circuit elements, comprising: receiving a user provided schematic, the user provided schematic comprising a plurality of circuit elements, each circuit element comprising general parameters; associating by a processor a plurality of first placement parameters with each of the plurality of circuit elements; retrieving, from a design library, design parameters associated with at least one of the plurality of circuit elements; selecting a subset of circuit elements; receiving placement inputs; generating adjusted placement parameters based on a first placement algorithm, the received placement inputs, the first placement parameters, and the design parameters; generating a first placed layout configuration based on the adjusted placement parameters; assigning absolute placement coordinates for each of the plurality of circuit elements based on the first placed layout configuration; and generating an electronic circuit layout with placed circuit elements based on the absolute placement coordinates.