Patent ID: 6674176
Filing Date: 2004-01-06
Classification: H01L

Abstract:
A wire bond package for an integrated circuit die comprising:a first I/O core ring and a second I/O core ring formed of a first metal layer of the wire bond package; a pad strap formed of a second metal layer of the wire bond package overlapping the second I/O core ring; a first via connecting the first metal layer and the second metal layer where the second I/O core ring and the pad strap overlap; a first core ring formed of a third metal layer of the wire bond package overlapping the first I/O core ring; a second via connecting the first metal layer and the third metal layer where the first I/O core ring and the first core ring overlap outside the power strap; a first power mesh formed of a fourth metal layer of the wire bond package overlapping the first core ring; and a third via connecting the third metal layer and the fourth metal layer where the first core ring and the first power mesh overlap.