Patent ID: 6479985
Filing Date: 2002-11-12
Classification: G01R

Abstract:
A circuit for high performance automatic test systems, comprising:a first device with a plurality of input terminals and at least one output terminal; a second device with a plurality of input terminals and at least one output terminal; a third device with a plurality of input terminals and at least one output terminal; a fourth device with a plurality of input terminals and at least one output terminal; a fifth device with a plurality of input terminals and at least one output terminal; a first programmable voltage source connected to a first of said plurality of input terminals of said first device; a second programmable voltage source connected to a first of said plurality of input terminals of said second device; an input signal terminal connected to a second of said plurality of input terminals of said first device and a second of said plurality of input terminals of said second device; a first connecting element connecting an output of said first device to one of said plurality of inputs of said third device and to one of said plurality of inputs of said fourth device; a second connecting element connecting an output of said second device to one of said plurality of inputs of said fourth device and to one of said plurality of inputs of said fifth device; a sixth device with at least one output terminal, a first input terminal connected to an output terminal of said third device, and a second input terminal connected to an output terminal of said fourth device; and a seventh device with at least one output terminal, a first input terminal connected to an output terminal of said fifth device, and a second input terminal connected to an output terminal of said fourth device.