Patent ID: 6884679
Filing Date: 2005-04-26
Classification: G11C,H01L

Abstract:
1. A method of manufacturing a flash memory cell, comprising the steps of: forming an isolation film having a projection that is projected higher than the surface of a semiconductor substrate in an isolation region of the semiconductor substrate; forming a first tunnel oxide film on the semiconductor substrate; depositing a material film for a first floating gate on the semiconductor substrate on which the first tunnel oxide film is formed; patterning the material film for the first floating gate and the first tunnel oxide film; sequentially forming a second tunnel oxide film and a material film for a second floating gate over the semiconductor substrate on which the material film for the patterned first floating gate is formed along the step; isolating the material film for the first floating gate by means of the projection while removing the second tunnel oxide film on the material film for the first floating gate and the material film for the second floating gate by means of chemical mechanical polishing; forming a material film for a control gate and a hard mask layer on the resulting surface; and patterning the hard mask layer, the material film for the control gate, the material film for the second floating gate, the second tunnel oxide film, the material film for the first floating gate and the first tunnel oxide film, using a mask defining a gate pattern.