Patent ID: 7564126
Filing Date: 2009-07-21
Classification: H01L

Abstract:
1. An integrated circuit package comprising: an interconnection substrate including an ASIC integrated circuit and having a first main surface and a second main surface which are opposite to each other; a first plurality of external terminals disposed on the first main surface of said interconnection substrate; and a second plurality of external terminals disposed on the second main surface of said interconnection substrate; wherein said second plurality of external terminals comprises a predefined selection of external terminals defining a first interface for another integrated circuit memory package disposed on said first interface and having either type NAND memory or type NOR memory; wherein said selection of external terminals of the first interface includes shared external terminals that are used by both the type NAND memory and the type NOR memory; wherein said second plurality of external terminals comprises another predefined selection of external terminals defining a second interface for said other integrated circuit memory package disposed on said second interface and further having type 32-bit DDR SDRAM memory.