Patent ID: 8093936
Filing Date: 2012-01-10
Classification: G06F

Abstract:
1. A semiconductor device comprising: a substrate of the semiconductor device divided into a plurality of area each of which is provided with a clock adjusting unit, a skew detecting unit, and a clock distributing unit; a clock supplying unit supplying a first clock; a clock distributing unit being inputted a delay set value and the first clock, outputting a second clock obtained by changing a phase of the inputted first clock based on the inputted delay set value, and supplying the second clock to circuits provided in an area to which the clock distributing unit belongs; a skew detecting unit detecting at least one over delay path or racing path, one of an input unit and an output unit of the over delay path or racing path is provided in an area to which the skew detecting unit belongs, and the other of the input unit and the output unit of the over delay path or racing path is provided in an area to which the skew detecting unit does not belong, and detecting skew in the over delay path or racing path; and a clock adjusting unit setting a value of delay based on the skew detected by the skew detecting unit.