Patent ID: 6020621
Filing Date: 2000-02-01
Classification: H01L

Abstract:
A trench isolation in a semiconductor substrate, said trench isolation comprising of:a recessed region in said semiconductor substrate, said recessed region having well rounded corners at bottom and at regions neighboring to the top surface of said semiconductor substrate;a first insulator layer lining said recessed region, said first insulator layer having the outward edge being aligned with the top surface of said semiconductor substrate at the edge of said recessed region, and having the inward edge being higher than the outward edge, said first insulator layer having a top surface between said outward edge and said inward edge in a smooth curvature, said first insulator layer having no vertical sidewall above the top surface of said semiconductor substrate; anda second insulator layer filing within said recessed region over said first insulator layer, said second insulator layer aligning with the inward edge of said first insulator layer, said second insulator layer having a plain surface on top.