Patent ID: 7989333
Filing Date: 2011-08-02
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: forming a gate insulation layer on a substrate; forming a gate pattern on the gate insulation layer, the gate pattern comprising a polysilicon layer and a metal layer; conformally forming a first nitride layer on sidewalls and a top surface of the gate pattern and on portions of the substrate on which the gate pattern is not formed; forming an oxynitride layer by anisotropically oxidizing at least a portion of the first nitride layer using an oxygen-based plasma, said oxynitride layer comprising a first oxynitride region of a first thickness on the top surface of the gate pattern and a second oxynitride region of a second thickness on the sidewalls of the gate pattern, and wherein a ratio of the first thickness to the second thickness is in a range from about 3:1 to about 7:1; and removing the oxynitride layer to expose a top surface of the gate pattern and expose a second nitride layer on sidewalls of the gate pattern.