Patent ID: 8627117
Filing Date: 2014-01-07
Classification: G06F,G11B,G11C

Abstract:
1. A data storage device that stores data in response to data accesses under the control of a memory control circuit, the data storage device comprising: a primary memory circuit configured and arranged to maintain data integrity in the absence of operating power; a solid-state caching memory circuit mapped to the primary memory circuit and configured and arranged to provide the memory control circuit with access to a set of data representing a cached portion of memory that is mapped to the primary memory circuit, the caching memory circuit including a controller configured to control backup functions of the caching memory circuit in response to a power interruption; a backup power-reservoir circuit that includes a capacitor coupled to receive a charge from a power supply, and that is configured to hold a charge to supply backup power for powering backup functions of the caching memory circuit; and a power supply control circuit configured and arranged to control, in response to a determined type and number of memory circuits in the data storage device, offset charging of the backup power-reservoir circuit relative to powering of another memory circuit to limit a current load upon the power supply according to a threshold current.