Patent ID: 7560956
Filing Date: 2009-07-14
Classification: G11C,H04L

Abstract:
1. A method of controlling an operating mode of an electronic device, comprising: receiving a clock signal comprising at least one of a first clock derived from rising edges of an external reference clock supplied to said electronic device and a second clock derived from falling edges of said external reference clock; detecting whether a clock pulse occurs in said clock signal during a clock period, said detecting further including detecting whether said clock pulse occurs in at least one of said first and said second clocks during said clock period; determining said sufficiency of said clock signals dependent upon the presence of said clock pulse during at least one half of said clock period, and determining said insufficiency of clock signals dependent upon the absence of said clock pulse during an entirety of said clock period, said determining further including determining a sufficiency of clock signals when said clock pulse occurs in at least one of said first and said second clocks during said clock period and an insufficiency of clock signals when no clock pulse is present in both of said first and said second clocks during said clock period; and selecting between a synchronous mode and an asynchronous mode of operation for a circuit within said electronic device in response to said determining irrespective of the status of address signals received by said electronic device.