Patent ID: 8913430
Filing Date: 2014-12-16
Classification: G11C

Abstract:
1. A non-volatile memory device comprising: a first sector including a first sector selection transistor and a first plurality of pages connected to the first sector selection transistor; a second sector including a second sector selection transistor and a second plurality pages connected to the second sector selection transistor; and a control unit configured to apply an enable signal to each of the first and second pluralities of pages through word lines, wherein the control unit is configured to apply the enable signal to the second plurality of pages by applying the enable signal to one or more selected pages through the word lines, the one or more selected pages being pages from among the second plurality of pages, the one or more selected pages not including all of the second plurality pages, the selected pages each including a selection transistor and memory transistor, the memory transistors of the selected pages being different from the selection transistors of the selected pages and configured to store data, the word lines through which the enable signals are provided to the selected pages being connected to the selection transistors of the selected pages.