Patent ID: 7227253
Filing Date: 2007-06-05
Classification: H01L

Abstract:
1. A dual chip stacked package, comprising: a peripheral chip having a first active surface and a corresponding first back surface, the first active surface comprising a first plurality of bonding pads; a leadframe comprising a plurality of leads and further comprising a supporting pad that includes at least one elongated chip supporting bar, the supporting pad being configured in such a way as not to interfere with the first plurality of bonding pads; an image sensor chip having a second active surface and a corresponding second back surface, the second active surface comprising a light receiving area and a peripheral area with a second plurality of bonding pads and the image sensor chip being secured to the supporting pad; a plurality of wires, parts of which electrically connect with the first plurality of bonding pads and the leads, and parts of which electrically connect with the second plurality of bonding pads and the leads; an encapsulation at least partially encompassing the leadframe, plurality of wires, peripheral chip, and image sensor chip, and forming a cavity over the second active surface to at least partially expose the light receiving area; and a transparent lid disposed over the cavity to direct light to the light receiving area.