Patent ID: 6268629
Filing Date: 2001-07-31
Classification: H01L

Abstract:
A field effect transistor comprising:a semiconductor substrate;a channel region of a second conductivity type formed in a surface of said substrate and a pair of source/drain regions of a first conductivity type formed in the surface of said substrate, the source/drain regions opposing each other via the channel region in a channel length direction;a gate electrode arranged above the channel region and opposing the channel region via a gate insulating film; anda trench formed in the surface of said substrate so as to define an element isolation region adjacent to the channel region in a channel width direction perpendicular to the channel length direction, the trench being covered with an insulating trench side wall,wherein the channel region has a main portion having an upper surface at a level higher than an upper end portion of the trench side wall, and a side portion having an upper surface tilting downward from the main portion to the upper end portion of the trench side wall in the channel width direction, andthe channel region contains a dopant impurity of the second conductivity type which has a concentration peak whose part in said main portion is arranged at a level below the upper end portion of the trench side wall, and a first distance from the upper surface of the main portion to the peak is larger than a second distance from the upper surface of the side portion to the peak.