Patent ID: 6546448
Filing Date: 2003-04-08
Classification: G06F

Abstract:
A compatible bus master, coupled to a bus, said compatible bus master comprising:a plurality functional circuits, used to issue a local inquiry signal so as to request a data transmission on said bus; and an arbiter, comprising a rotating inquiry scheduler (RIS) coupled to said functional circuits and a heuristic inquiry initiator (EH) coupled to said RIS and said bus, wherein said RIS receives and stores said local inquiry signal, produces a first bus inquiry signal, according to said local inquiry signal, and sends said bus inquiry signal to said HII, which sends a second bus inquiry signal, according to said bus inquiry signal, to said bus, in which said HII repeatedly sends said second bus inquiry signal to said bus to inquire a data status if said bus responds with a delay transaction termination, and said HII informs said RIS to perform said data transmission if said bus does not response with a delay transaction termination.