Patent ID: 6212259
Filing Date: 2001-04-03
Classification: H03G,H03H,H04M

Abstract:
An impedance blocking filter circuit used in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances from above 20 KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit, said filter circuit comprising:first and second third inductors connected in series between a first input terminal and a first common point;said first inductor having its one end connected to said first input terminal and its other end connected to one end of said second inductor, said second inductor having its other end connected to said first common point;third and fourth inductors connected in series between a second input terminal and a second common point;said third inductor having its one end connected to said second input terminal and its other end connected to one end of said fourth inductor, said fourth inductor having its other end connected to said second common point;first switching means having a first end and a second end and being responsive to DC loop current for electrically connecting said first end to said second end;a first capacitor having a first end connected to said first common point and a second end connected to said first end of said switching means, said second end of said switching means being connected to said second common point;a fifth inductor having a first end connected to said first common point and a second end connected to a first output terminal, and a sixth inductor having a first end connected to said second common point and a second end connected to a second output terminal;second switching means having a first end and a second end and being responsive to said DC loop current for electrically connecting said first end to said second end;a second capacitor having a first end connected to said sixth inductor at a first node and a second end connected to said first end of said second switching means, said second end of said second switching means being connected to said fifth inductor at a second node;switch suppression circuit means interconnected between said first and second common points for preventing transients caused by actuation of said first and second switching means from being fed back into the incoming telephone lines; andcorrection circuit means interconnected between said first and second nodes and said output terminals for significantly reducing return loss caused by inductive impedance when the customer's terminal equipment goes off-hook.