Patent ID: 6418615
Filing Date: 2002-07-16
Classification: H01L,H05K,Y10T

Abstract:
A method of producing a substrate of multilayered structure,the method comprising providing a seed layer on a metal sheet, the seed layer being made up of a metal which is substantially not etched by an etchant subsequently used to remove the metal sheet, or comprising a sublayer made up of a metal which is substantially not etched by an etchant subsequently used to remove the metal sheet; and successively forming a plurality of sets of an insulation layer and a wiring line layer, wherein the plurality of sets of the insulation layer are formed on the seed layer provided on a metal sheet, forming a multilayered structure having a plurality of sets of an insulation layer and a wiring line layer, and having one face for mounting a semiconductor element thereon and an other face on which external connection terminals are to be provided, the face for mounting a semiconductor element being provided with pads to be bonded to an electrode terminal of the semiconductor element, the other face being provided with pads to be bonded to an external connection terminal, the wiring line layers on both sides of an insulation layer being connected with each other by vias piercing the insulation layer, and the surfaces of the pads to be bonded to an electrode terminal of a semiconductor element being flat and in the same plane.