Patent ID: 9059237
Filing Date: 2015-06-16
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first semiconductor region, which has a first conductivity type; a second semiconductor region, which has a second conductivity type and is arranged on the first semiconductor region; a third semiconductor region, which has the first conductivity type and is arranged on the second semiconductor region; a plurality of fourth semiconductor regions, each of which has the second conductivity type and is spaced from each other on the third semiconductor region; an insulation film arranged on an inner wall of a recess, which extends from upper faces of the fourth semiconductor region to pass through the third semiconductor region and the fourth semiconductor region and reaches the second semiconductor region, wherein the insulation film faces a side face of the third semiconductor region, and wherein a width of the recess is in a range between 3 μm and 20 μm; a control electrode, which is arranged on the insulation film in the recess; a first main electrode, which is electrically connected to the first semiconductor region; and a second main electrode, which is electrically connected to the third semiconductor region and the fourth semiconductor region, wherein the semiconductor device comprises an insulated gate bipolar transistor in which holes moving from the first semiconductor region towards the third semiconductor region are accumulated in a vicinity of a bottom of the recess in the second semiconductor region by suppressing movement of the holes by the bottom of the recess, and wherein a ratio of the width of the recess to a width of the third semiconductor region abutting on the second main electrode is 1 or more.