Patent ID: 8681566
Filing Date: 2014-03-25
Classification: G11C,H03K

Abstract:
1. An apparatus, comprising: a pre-driver circuit, the pre-driver circuit including a step-down transistor configured to be coupled between a supply voltage and an output of the pre-driver circuit, and further including a pFET and nFET both coupled to the output of the pre-driver circuit, and the step-down transistor is configured to be coupled to the supply voltage and a source of the pFET; and a driver circuit, the input of the driver circuit coupled to the output of the pre-driver circuit, the driver circuit including a pull-down transistor configured to be coupled to a reference voltage, wherein in a first mode, the step-down transistor is configured to reduce a voltage provided to the pull-down transistor to reduce a leakage current of the pull-down transistor, and in a second mode, the step-down transistor is configured to provide the voltage to the pull-down transistor.