Patent ID: 6990613
Filing Date: 2006-01-24
Classification: G01R,G11C

Abstract:
1. A test apparatus for testing an electronic device, comprising: a reference clock generating unit for generating a reference clock; a pattern generating unit for generating a test pattern synchronously with said reference clock to test said electronic device; a waveform formatting unit for receiving said test pattern and inputting a formatted pattern which results from formatting said test pattern to said electronic device; a first timing generator for generating a timing signal; an output signal sampling circuit for sampling an output signal outputted by said electronic device in response to said test pattern at timing based on said timing signal generated by said first timing generator; and a judging unit for judging quality of said electronic device based on a sampling result of said output signal sampling circuit, wherein said first timing generator comprises: a first variable delay circuit unit for receiving, delaying and outputting said reference clock; and a first delay control unit for controlling a delay amount of said first variable delay circuit unit, and said first delay control unit comprises: