Patent ID: 7828893
Filing Date: 2010-11-09
Classification: C30B,Y10T

Abstract:
1. A process for the heat treatment of a multiplicity of silicon wafers with a diameter of at least 300 mm said process comprising resting wafers on supports selected with regard to the upper yield stress of the wafer, and at predetermined heating and cooling rate, as follows: a) for wafers having an upper yield stress of at least 0.6 MPa, measured at a temperature of 1200° C., in a vertical furnace, resting the silicon wafers during the heat treatment on substrate holders which are in the form of a continuous concentric ring with an internal diameter of at most 250 mm and an external diameter which is at least equal to the diameter of the silicon wafers, the surfaces of the substrate holders on which the silicon wafers rest having a flatness with deviations in the range from 0.05 mm to 0.5 mm from an ideal leveled plan, heating the silicon wafers, at the start of the heat treatment, to a target temperature in the range from 1100° C. to 1300° C. at a predetermined heating rate, holding the silicon wafers at the target temperature for a period of from 30 minutes to 3 hours under an inert or reducing atmosphere, and cooling the silicon wafers at a predetermined cooling rate, wherein the predetermined heating and cooling rates RR (in ° C./minute) in the temperature range above 900° C. are selected as a function of the current temperature T (in ° C.) such that the following condition is satisfied: b) for wafers having an upper yield stress of at least 0.4 Mpa, measured at a temperature of 1200° C., in a vertical furnace, resting the silicon wafers during the heat treatment on substrate holders which are in the form of a continuous concentric ring with an internal diameter of at most 250 mm and an external diameter which is at least equal to the diameter of the silicon wafers, and with an additional bearing surface in the center of the ring, the surfaces of the substrate holders on which the silicon wafers rest having a flatness with deviations in the range from 0.05 mm to 0.5 mm from an ideal leveled plan, the silicon wafers, at the start of the heat treatment, are heated up to a target temperature in the range from 1100° C. to 1300° C. at a predetermined heating rate, holding the silicon wafers at the target temperature for a period of 30 minutes to 3 hours under an inert or reducing atmosphere, cooling the silicon wafers are then cooled at a predetermined cooling rate, and the predetermined heating and cooling rates RR (in ° C./minute) in the temperature range above 900° C. are selected as a function of the current temperature T (in ° C.) in such a way that the following condition is satisfied: c) for wafers having an upper yield stress of at least 0.3 MPa, measured at a temperature of 1200° C., in a vertical furnace, resting the silicon wafers during the heat treatment on substrate holders which are in the form of a plate with an external diameter which is at least equal to the diameter of the silicon wafers, the surfaces of the substrate holders on which the silicon wafers rest having a flatness with deviations in the range from 0.05 mm to 0.5 mm from an ideal leveled plane, heating the silicon wafers, at the start of the heat treatment to a target temperature in the range from 1100° C. to 1300° C. at a predetermined heating rate, holding the silicon wafers at the target temperature for a period of 30 minutes to 3 hours under an inert or reducing atmosphere, cooling the silicon wafers at a predetermined cooling rate, wherein the heating and cooling rate RR (in ° C./minute) in the temperature range above 900° C. is selected as a function of the current temperature T (in ° C.) in such a way that the following condition is satisfied;