Patent ID: 7297594
Filing Date: 2007-11-20
Classification: H01L

Abstract:
1. A method of manufacturing a non-volatile semiconductor memory device, comprising: successively depositing a first gate insulator having a first thickness, a first gate electrode film and a first mask insulator on a semiconductor substrate; leaving the first gate insulator, the first gate electrode film and the first mask insulator in only an array region; separately forming the following gate insulators in a peripheral region excepting the array region, that is, forming a second gate insulator having a second thickness greater than the first thickness in a first region of a peripheral region, and forming a third gate insulator having a thickness the same as the first thickness in a second region of the peripheral region; successively depositing a second gate electrode film and a second mask insulator thicker than the first mask insulator on each of the first mask insulator, the second gate insulator and the third gate insulator; removing the second mask insulator and the second gate electrode film on the first mask insulator; forming an isolation trench on a surface of the semiconductor substrate to correspond to each position between the array region and first and second regions of the peripheral region; depositing a buried insulator on the entire surface; and polishing an upper surface of the buried insulator so that the upper surface can be planarized.