Patent ID: 6584546
Filing Date: 2003-06-24
Classification: G06F,G11C

Abstract:
A method of operating a cache memory comprising the steps of:storing a set of data in a first space in the cache memory, the set of data associated with a set of tags; storing a subset of the set of data in a second space in the cache memory and associated with a tag, the tag associated with the subset of data being a subset of the set of tags; comparing a tag portion of an address with the tag associated with the subset of data in the second space in the cache memory; reading the subset of data in the second space when the tag portion of the address and the tag associated with the subset of data match; comparing the tag portion of the address with the set of tags associated with the set of data in the first space in the cache memory; and reading the set of data in the first space when the tag portion of the address matches one of the set of tags associated with the set of data in the first space and the tag portion of the address and the tag associated with the subset of data in the second space do not match.