Patent ID: 6501682
Filing Date: 2002-12-31
Classification: G11C

Abstract:
A non-volatile semiconductor memory device, comprising a chip having a plurality of memory cells for storing information based on a difference of threshold voltages by changing the threshold voltages through application of a predetermined voltage to selected memory cells, and a status register for indicating the internal condition of the chip,wherein said status register is provided with status bits and is constituted to be capable of outputting conditions of the bits to an external terminal of the chip, wherein a first bit in said status bits indicates a first status when access can be made from outside of the chip or a second status when access can not be made from the outside of the chip, wherein a second bit in said status bits indicates a first status when a write operation is not normally completed or a second status when the write operation is normally completed, and wherein a third bit in said status bits indicates a first status when the write operation is possible of being normally completed by executing again the write operation when the write operation is not normally completed.