Patent ID: 7653798
Filing Date: 2010-01-26
Classification: G06F

Abstract:
1. A memory management apparatus comprising: a data memory which comprises a plurality of data blocks, each of which comprises a plurality of sub data blocks having a predetermined size, and when there is a request for allocating memory space of a variable size, allocates memory space in units of any one of the sub data blocks and the data blocks; a free list memory which manages a free memory space of the data memory as an entry of a plurality of entries; and registers that store a plurality of head location information and a plurality of tail location information of the entry, wherein a first head location information in the plurality of head location information and a second head location information are used for allocation of different byte sizes in the data memory, and the free list memory and the data memory have an equal number of entries and all of the entries of the free list memory and all of the entries of the data memory have a 1:1 corresponding relationship, wherein use of pointers between the entries of the data memory and the entries of the free list memory is unnecessary.