Patent ID: 7002381
Filing Date: 2006-02-21
Classification: G11C,H02M,H03K

Abstract:
1. A circuit for controlling the rise time of a signal, comprising: a voltage multiplication circuit for converting an input voltage corresponding to said signal to an output voltage greater than said input voltage; a ramp generator coupled to said voltage multiplication circuit for controlling said output voltage from said voltage multiplication circuit, wherein a ratio between a first capacitor of said ramp generator and a second capacitor of said ramp generator determines said rise time of said signal, wherein said signal comprises a staircase ramp signal; a divide by N counter coupled to said ramp generator for generating a plurality of clock phases wherein said ramp generator is controlled with said clock phases; and a keeper device coupled to said voltage multiplication circuit for allowing said voltage multiplication circuit to selectively hold said signal at a supply voltage and, upon enabling, to perform said converting.