Patent ID: 7596019
Filing Date: 2009-09-29
Classification: G11C

Abstract:
1. A method of preventing hot electron program disturbance of a non-volatile memory device, the method comprising: boosting channels of a first group of memory cells to a first voltage, the first group of memory cells coupled to first and Nth word lines of N word lines, wherein the first group of memory cells is coupled in series between a first select transistor and a second select transistor, the first and second select transistors coupled to a first bit line, wherein the second select transistor is coupled to a common source line; and boosting channels of a second group of memory cells to a second voltage, the second group of memory cells coupled to a plurality of remaining word lines other than the first word line, the Nth word line, and a program word line, wherein the second group of memory cells is coupled to the first bit line, wherein the first voltage is lower than the second voltage, wherein the N is a positive integer.