Patent ID: 8575686
Filing Date: 2013-11-05
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory transistor comprising: an island-shaped semiconductor having a source region, a channel region, and a drain region in order from surface of a substrate; a hollow pillar-shaped floating gate surrounding an outer periphery of the channel region and a tunnel insulating film between the floating gate and the channel region, the hollow pillar-shaped floating gate having a circumferential recess therein; and a hollow pillar-shaped control gate surrounding an outer periphery of the floating gate and at least partially within the circumferential recess; and an inter-polysilicon insulating film residing in the circumferential recess between the control gate and the floating gate, wherein the inter-polysilicon insulating film resides between the floating gate and an upper surface, a lower surface, and a lateral side surface of the control gate, wherein the control gate faces the floating gate in the recess and the lateral side surface of the control gate does not face the island-shaped semiconductor in a vertical direction, and wherein the upper surface of the floating gate does not face the island-shaped semiconductor in the vertical direction.