Patent ID: 6753249
Filing Date: 2004-06-22
Classification: H01L

Abstract:
A method of using dual damascene comprising:providing a substrate having an insulator layer deposited thereon; depositing a low dielectric constant material, as an intermetal dielectric (IMD) layer, over said substrate; depositing a multilayer interface layer over the intermetal dielectric layer (IMD) comprised of a bottom hard film layer and a top soft film layer; depositing a dielectric anti-reflective coating (DARC) over the multilayer interface layer; patterning and forming dual damascene trench/via openings in said intermetal dielectric (IMD) layer, along with the exposed dielectric anti-reflective coating (DARC) and the exposed multilayer interface; removing the patterning and masking material; depositing a metal diffusion barrier layer and a copper seed layer into the dual damascene trench/via openings of the intermetal dielectric (IMD) layer and over said substrate and over the dielectric anti-reflective coating (DARC); depositing a copper metal layer over said copper seed layer, filling the dual damascene trench/via; polishing off the excess materials, thereby planarizing the surface to form conductive interconnects and contacts to the underlying substrate.