Patent ID: 6738006
Filing Date: 2004-05-18
Classification: H03M

Abstract:
A digital to analog converter circuit, comprising:a main digital to analog converting unit including a plurality of current sources and a plurality of cascode units, each current source being connected to a cascode unit; a sub-digital to analog converting unit including a current source connected to a plurality of cascode units; a first cascode bias unit, operatively connected to each cascode unit of said main digital to analog converting unit, to bias each current source of said main digital to analog converting unit to operate at a same voltage; a second cascode bias unit, operatively connected to each cascode unit of said sub-digital to analog converting unit, to bias the current source of said sub-digital to analog converting unit to operate at a same voltage; and a reference voltage source, operatively connected to an input of said first cascode bias unit and connected to an input of said second cascode bias unit, to cause the operating emitter/source to collector/drain voltage of each current source of the main digital to analog converting unit to be equal to the operating emitter/source to collector/drain voltage of the current source of the sub-digital to analog converting unit.