Patent ID: 6141235
Filing Date: 2000-10-31
Classification: G06F

Abstract:
A stacked cache memory system comprising:a cache system comprising at least one cache memory cell coupled to a memory cell array, the cache system outputting at least one stored data output signal that corresponds to previously stored data from the memory cell array;a column select system coupled to the cache system, the column select system operable to select at least one data signal from the memory cell array or at least one stored output data signal from the cache system;a sense-amp system coupled to the column select system, the sense-amp system operable to sense and amplify the at least one data signal from the memory cell array selected by the column select system, and output an amplified data output signal; anda switching system coupled to the cache system and the sense-amp system, the switching system coupling at least one output line to the sense-amp system by a first data path to output the amplified data output signal and coupling the at least one output line to the column select system by a second data path to output the stored output data signal.