Patent ID: 8976102
Filing Date: 2015-03-10
Classification: G09G

Abstract:
1. A timing controller, configured for controlling a driving circuit coupled to a display panel provided with a luminance characteristic and a pixel arrangement, and processing an image signal provided with image data and a synchronous signal, comprising: an image processing circuit, for processing image data; a luminance adjusting circuit, for adjusting the processed image data according to the luminance characteristic and generating an adjusted image data; a data converting circuit comprising a buffer selecting unit configured to select either a first scan line buffer or a second scan line buffer, for converting the adjusted image data to a display data provided for the driving circuit according to the pixel arrangement; and a driving signal generating circuit, for generating a driving signal to control the driving circuit according to the synchronous signal; wherein the display panel is built in a notebook; and wherein the first scan line buffer is configured for storing adjusted image data for a left half of the display panel and the second scan line buffer is configured for storing adjusted image data for a right half of the display panel.