Patent ID: 6393452
Filing Date: 2002-05-21
Classification: G06F

Abstract:
A floating-point unit configured to perform load bypass operations, the floating-point unit comprising:a register file, the register file comprising a plurality of registers for storing operand data to be operated on and for storing results of operations that have been performed by the floating-point unit; at least one bypass component, the bypass component being configured to perform a memory format-to-register format conversion, the memory format-to-register format conversion including a partial conversion process and a final conversion process, the partial conversion process including the steps of formatting data into a format which is suitable for storage in the registers of the register file, detecting whether operand data to be operated on includes a special case exponent, and generating at least one special case flag which indicates whether or not a special case exponent has been detected; at least one multiply accumulate unit, the multiply accumulate unit being configured to perform an arithmetic operation on the operand data, the multiply accumulate unit being configured to receive the results of the partial conversion process including said at least one special case flag and to perform the final conversion process.