Patent ID: 8904110
Filing Date: 2014-12-02
Classification: G06F,H03K,H03M,Y02D

Abstract:
1. A data processing system comprising: a central processing unit executing program instructions to manipulate data; at least one first level cache connected to said central processing unit temporarily storing in a plurality of cache lines at least one of program instructions for execution by said central processing unit and data for manipulation by said central processing unit, each cache line including a tag indicating a memory address of said program instruction or said data stored therein; and at least one first cache operation unit connected to said at least on first level cache capable of performing a program controlled cache state operation selected from a predetermined set of program controlled cache state operations on a corresponding program designated address range encompassing a plurality of cache lines; a second level cache connected to said first level cache temporarily storing in a plurality of cache lines at least one of program instructions for execution by said central processing unit and data for manipulation by said central processing unit, each cache line including a tag indicating a memory address of said program instruction or said data stored therein; and a second level cache operation unit connected to said first level cache operation unit and said second level cache capable of performing a combined program controlled cache state operation selected from the predetermined set of program controlled cache state operations on a corresponding program designated address range encompassing a plurality of cache lines in each of said at least one first level cache and said second level cache on a program designated address range encompassing a plurality of cache lines having the same address range for said at least one first level cache and said second level cache.