Patent ID: 6185087
Filing Date: 2001-02-06
Classification: H01G

Abstract:
A multilayer ceramic chip capacitor comprising alternately stacked, fired dielectric layers and internal electrode layers, the dielectric layers comprising:BaTiO.sub.3 : 94 to 99 mol %;CaTiO.sub.3 : 0.1 to 4 mol %;BaO: 0.1 to 2 mol %;CaO: 0 to 1 mol %;SrO: 0 to 1 mol %;SiO.sub.2 : 0.1 to 5 mol %;MnO.sub.2 : 0.01 to 2 mol %;Y.sub.2 O.sub.3 : 0.1 to 3 mol %; andCoO: 0.01 to 1 mol %;wherein the dielectric layers are free of magnesium oxide.