Patent ID: 6238802
Filing Date: 2001-05-29
Classification: B32B,H05K,Y10S,Y10T

Abstract:
An arrangement for sealing and encapsulating electronic components, comprisingan outer metal layer of a mechanically strong and/or corrosion resistant material,a layer, inside the outer metal layer, of plastic material having at least surface layers of ionomer plastics material,an inner metal layer, inside the plastics layer, of a metal material different from the material of the outer metal layer and having a good electrical conductivity, anda circuit board disposed between the outer metal layer and the layer of plastic material, the circuit board having a plurality of electronic components mounted thereon and having a surface area less the other layers of the arrangement, such that when the circuit board is substantially centered within the arrangement and the layers are brought into contact with one another while apply a compressive force and heat, a seal is formed around the circuit board at the periphery of the arrangement.