Patent ID: 6455428
Filing Date: 2002-09-24
Classification: H01L

Abstract:
A method of forming a metal silicide layer on a surface of a heavily doped silicon region, in a semiconductor substrate, with said heavily doped silicon region located at the bottom of a contact hole in an insulator layer, and featuring the removal of a contact hole defining photoresist shape using a combination of procedures that avoid the formation of a native oxide layer comprised with a sub-stoichiometric silicon oxide component, formed on the top surface of the exposed conductive region, comprising the steps of:forming a heavily doped silicon region in said semiconductor substrate; forming a composite insulator layer, featuring an overlying, silicon nitride layer, on said heavily doped silicon region; forming a photoresist shape on said composite insulator layer with an opening in said photoresist shape exposing a portion of said composite insulator; performing an anisotropic dry etching procedure to remove portion of said insulator layer exposed in said opening in said photoresist shape, and creating said contact hole in said insulator layer, exposing a portion of top surface of said heavily doped silicon region; performing a chemical mechanical polishing procedure to remove said photoresist shape from the top surface of said silicon nitride layer; performing a post-chemical mechanical polishing wet clean procedure, creating a native oxide layer on surface of said heavily doped silicon region, with said native oxide layer comprised of a stoichiometric silicon oxide layer; performing a pre-metal deposition procedure to remove said native oxide; depositing a metal layer; performing a first anneal procedure to form a first metal silicide layer on said heavily doped silicon region, while portions of said metal layer located on surfaces of said composite insulator layer remain unreacted, selectively removing said portions of unreacted metal layer from the surfaces of said insulator layer; and performing a second anneal procedure to convert said first metal silicide layer, to a lower resistance, second metal silicide layer.