Patent ID: 6838751
Filing Date: 2005-01-04
Classification: H01L

Abstract:
1. A leadframe for a semiconductor device, the leadframe comprising: a paddle ring having an inner perimeter, an outer perimeter, and a cavity located within the inner perimeter for receiving an integrated circuit die, wherein the inner perimeter of the paddle ring also includes a plurality of spaced projections; a first row of terminals integral with, extending outwardly from, and generally surrounding the paddle ring, wherein the terminals of the first row of terminals are sized and shaped such that wires may be wirebonded between the terminals and bonding pads of an integrated circuit die disposed within the cavity and the terminals may be cut and thus separated from the paddle ring without destroying the wirebond; a second row of terminals aligned with, surrounding and spaced from the first row of terminals; and a connection bar surrounding the first and second rows of terminals, wherein each of the terminals of the second row of terminals is connected to the connection bar and wherein the first row of terminals is connected to the second row of terminals at a corner of the connection bar.