Patent ID: 6084464
Filing Date: 2000-07-04
Classification: H01L

Abstract:
A decoupling-capacitor system for an integrated circuit, said integrated circuit having a power source and a ground plane, said system comprising:a capacitive path, said capacitive path including a capacitor and a capacitive-path transistor in series between said power source and said ground plane, said capacitive path defining a capacitive-path voltage node between said capacitor and said capacitive-path transistor; anda fusible path, said fusible path including a fuse and a fusible-path transistor in series between said power source and said ground plane, said fusible path defining a fusible-path voltage node between said fuse and said fusible-path transistor, said fusible-path transistor having a gate coupled to said capacitive-path voltage node, said capacitive-path transistor having a gate coupled to said fusible-path voltage node.