Patent ID: 6870410
Filing Date: 2005-03-22
Classification: H02M,H03K,H04L

Abstract:
1. A power supply system comprising: a first clock generator that outputs an input clock signal and a sample clock signal; a power node; a propagation delay detector connected to the power node that detects a propagation delay of the input clock signal as clocked by the sample clock signal, and outputs a multi-bit propagation delay word that identifies the propagation delay; a frequency detector connected to the propagation delay detector that receives the propagation delay word from the propagation detector, and generates a multi-bit encoded word that represents the propagation delay word; a second clock generator that outputs a load signal in response to a reference clock signal; a counter that loads the encoded word in response to the load signal, changing a binary value of the encoded word as a count in response to the reference clock signal, and outputting the binary value of the count as a binary word; a pulse width modulator connected to the counter that outputs a pulse modulated signal where a width of a pulse is defined by the binary value of the binary word output from the counter; a level shifter and driver connected to the pulse width modulator that level shifts and drives the pulse modulated signal; and an LC filter connected to the level shifter and driver that generates a DC supply voltage on the power node in response to the pulse modulated signal.