Patent ID: 8772848
Filing Date: 2014-07-08
Classification: H01L

Abstract:
1. A circuit structure, comprising: a substrate comprising an array region and a peripheral region; the substrate in the array and peripheral regions comprising insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material; the array region comprising vertical circuit devices comprising the second semiconductor material, the peripheral region comprising horizontal circuit devices comprising the second semiconductor material, amorphous material in the array and peripheral regions between the insulator material and the conductive material, the amorphous material in the array and peripheral regions being directly against the conductive material; the horizontal circuit devices in the peripheral region individually comprising a floating body comprising the second semiconductor material, the conductive material in the peripheral region being under and electrically coupled to the second semiconductor material of the floating bodies; conductive straps in the array region under the vertical circuit devices, the conductive straps comprising the conductive material and individually being electrically coupled to a plurality of the vertical circuit devices in the array region; and the second semiconductor material in the peripheral region comprising a PMOS region, the PMOS region comprising first dopant concentration n-type material and second dopant concentration n-type material that are directly against one another, the second dopant concentration being higher than the first dopant concentration, the second dopant concentration n-type material being directly against the conductive material in the PMOS region and being laterally discontinuous across the floating body of the horizontal circuit devices in the PMOS region.