Patent ID: 6563183
Filing Date: 2003-05-13
Classification: H01L

Abstract:
An integrated circuit fabricated on a semiconductor substrate comprising:a first field effect transistor comprising a first polysilicon gate positioned above a first channel region of the substrate and isolated from the first channel region by a first dielectric layer comprising a first dielectric material selected from the group of materials consisting of TiO2, Y2O3, Ta2O5, La2O3, their silicates or aluminates, BaTiO3, SrTiO3, BST ((Ba,Sr)TiO3), PbTiO3, PZT, HfO2, ZrO2, CeO2, Al2O3, TiO2, Y2O3, and tertiary metal oxides and ferroelectric material having a dielectric constant greater than 20, the first dielectric layer extending across the entire length of the first channel region; and a second field effect transistor comprising a second polysilicon gate positioned above a second channel region of the substrate and isolated from the second channel region by a second dielectric layer comprising the first dielectric material implanted with at least one of N+, Hf+, Al+, and Zr+, the second dielectric layer extending across the entire length of the second channel region.