Patent ID: 6519001
Filing Date: 2003-02-11
Classification: H04N

Abstract:
A color signal separating circuit comprising:a CCD output synchronizing block for synchronizing first and second data input signals received from a CCD in response to first and second basic clock signals, first and second sampling clock signals, and a line selecting signal, and generating first through fifth output signals; a color signal generating block for receiving the first through fifth output signals from the CCD output synchronizing block in response to the first and second basic clock signals, and generating red, green, and blue color signals; and a pre-white balance controlling block for receiving the red and blue color signals and first and second coefficient inputs in response to the first and second basic clock signals, and third and fourth basic clock signals, controlling the gains of the red and blue color signals, and generating a final output signal; wherein the first data input signal is a signal passed through a single unit delay, and the size of the second data input signal is adjusted to be a half of the size of the sum of a signal avoiding the single unit delay and a signal passed through two unit delays.