Patent ID: 6871314
Filing Date: 2005-03-22
Classification: H04L

Abstract:
1. A decoder for a forward error correcting code, for decoding a digital signals of a frame, being encoded for error correction by a unit of block divided and inserted with an error correction code therein, and transmitted periodically at a time constant period, comprising: an error correction portion receiving the digital signals of said frame transmitted periodically at the time constant period and conducting error correction upon each of the blocks thereof, said digital signal being encoded for error correction, for providing an output having an error corrected therein; a fixed delay portion receiving said digital signals of the frame being encoded for error correction, for providing an output by delaying said digital signal of the frame being encoded for error correction, for at least a fixed time corresponding to said constant time period of said a sum of a time necessary for receiving one of the blocks and a time necessary for conducting the error correction upon each of the blocks; a through processing portion receiving said digital signals of the frame being encoded for error correction, for providing an output without delaying said digital signals of the frame being encoded for error correction; and a selecting portion, receiving and selecting one of the outputs of said error correcting portion, said fixed delay portion, and said through processing portion, so as to provide an output therefrom.