Patent ID: 7414876
Filing Date: 2008-08-19
Classification: G11C

Abstract:
1. A nonvolatile ferroelectric memory device having a power control function, comprising: a voltage dropping unit for dropping an external power voltage to a predetermined level and supplying an internal power voltage; a nonvolatile ferroelectric circuit unit having a hierarchical bit line structure including a plurality of sub bit lines connected to one of a plurality of main bit lines and including a first nonvolatile ferroelectric capacitor for reading/writing data depending on the internal power voltage, wherein a voltage of a sub bit line induced by cell data is converted into current by a current controller according to the voltage of the sub bit line so that a sensing voltage of a main bit line is induced; a power stabilization unit including a second ferroelectric capacitor and a capacitor connected in parallel between the internal power voltage and a ground voltage for reducing noise from the internal power voltage applied from the voltage dropping unit to stabilize the internal power voltage; a power-up detection reset unit for detecting the external power voltage level and generating a reset signal to initialize the nonvolatile ferroelectric circuit unit; and a nonvolatile ferroelectric register unit, driven depending on the external power voltage, for storing cell data in a nonvolatile memory cell, wherein the nonvolatile ferroelectric register unit comprises: