Patent ID: 7633568
Filing Date: 2009-12-15
Classification: G02F

Abstract:
1. A pixel structure, comprising: a scan line and a data line crossed with each other on a substrate; a first storage capacitance electrode disposed on the substrate, comprising: a thin film transistor (TFT) disposed on the substrate and driven by the scan line and the data line, wherein the TFT comprises a gate, a channel layer, a source and a drain; a second storage capacitance electrode disposed above the third portion, covering a part of the third portion, and being electrically connected to the drain, wherein the second storage capacitance electrode partially protrudes outward from a side of the third portion of the first storage capacitance electrode and the side is away from the scan line so that the protruding portion of the second storage capacitance electrode is not overlapped with the first storage capacitance electrode; and a pixel electrode electrically connected to the TFT.