Patent ID: 7985647
Filing Date: 2011-07-26
Classification: H01L

Abstract:
1. A method of manufacturing a nonvolatile memory device, comprising: forming a tunnel insulating layer and a charge trap layer over a semiconductor substrate that defines active regions and isolation regions; forming trenches for isolation in the respective isolation regions by etching the tunnel insulating layer, the charge trap layer, and the semiconductor substrate formed in the isolation regions; filling the trenches for isolation with an insulating layer to form isolation layers in the respective trenches; forming a lower passivation layer over an entire surface including top surfaces of the isolation layers; forming a first oxide layer over an entire surface including the lower passivation layer; removing meta-stable bond structures within the lower passivation layer; and sequentially forming a nitride layer, a second oxide layer, and an upper passivation layer over an entire surface including the first oxide layer.