Patent ID: 6365450
Filing Date: 2002-04-02
Classification: H01L

Abstract:
A method for fabricating a PMOS (P-channel Metal Oxide Semiconductor) field effect transistor on a semiconductor substrate, the method including the steps of:A. depositing a layer of gate dielectric material on said semiconductor substrate; B. depositing a layer of dummy gate electrode material on said layer of gate dielectric material; C. patterning said layer of gate dielectric material and said layer of dummy gate electrode material over a first active device area of said semiconductor substrate to form a PMOS (P-channel Metal Oxide Semiconductor) gate dielectric from said gate dielectric material and to form a PMOS (P-channel Metal Oxide Semiconductor) dummy gate electrode from said dummy gate electrode material; D. implanting a drain and source P-type dopant into exposed regions of said first active device area of said semiconductor substrate to form a PMOS (P-channel Metal Oxide Semiconductor) drain junction and a PMOS (P-channel Metal Oxide Semiconductor) source junction; E. performing a thermal anneal to activate said drain and source P-type dopant within said PMOS drain and source junctions; F. forming a PMOS (P-channel Metal Oxide Semiconductor) drain silicide with said PMOS drain junction and a PMOS (P-channel Metal Oxide Semiconductor) source silicide with said PMOS source junction; G. depositing an insulating material to surround said PMOS dummy gate electrode and said PMOS gate dielectric; H. etching away said PMOS dummy gate electrode to form a PMOS (P-channel Metal Oxide Semiconductor) gate electrode opening surrounded by said insulating material; and I. filling said PMOS gate electrode opening with a metal oxide material to form a PMOS metal oxide gate electrode.