Patent ID: 6529977
Filing Date: 2003-03-04
Classification: G06F

Abstract:
A transceiver circuit comprising:a line transmitter for transmitting a signal from a higher layer to a transmission medium; a line receiver for receiving a signal from said transmission medium; a first detector for producing a first detector output if a first bus reset signal is detected in the signal transmitted from said line transmitter; a second detector for producing a second detector output when said second bus reset signal is being detected in the received signal; a selector having a first position in which the selector is normally coupling the received signals to said higher layer and a second position in which the selector is coupling a masking signal to said higher layer; and control circuitry for sing the selector in the second position in response to a start ting of said first detector output, starting a count operation for incrementing a count value in response to a start timing of the second detector output until the count value exceeds a predetermined value, and setting the selector in the first position in response to an end timing of the count operation.