Patent ID: 8674738
Filing Date: 2014-03-18
Classification: G11C,H03K

Abstract:
1. A semiconductor device comprising: a level shifter, the level shifter comprising: a first buffer, the first buffer comprising: a second buffer, the second buffer comprising: a first switch; a second switch; a first terminal; a second terminal configured to receive an inverted signal of a signal input to the first terminal; and a third terminal configured to receive a clock signal for controlling states of the first switch and the second switch, wherein the first output terminal is electrically connected to the third input terminal, the sixth input terminal, and the seventh input terminal via the first switch, wherein the second output terminal is electrically connected to the fourth input terminal, the fifth input terminal, and the eighth input terminal via the second switch, wherein the first input terminal is electrically connected to the fourth output terminal, and wherein the second input terminal is electrically connected to the third output terminal.