Patent ID: 8954646
Filing Date: 2015-02-10
Classification: G06F

Abstract:
1. A method for managing a plurality of blocks of a Flash memory, the method comprising: recording/updating linking information regarding a logical block address, wherein the linking information comprises a plurality of physical block addresses linking to the logical block address, wherein each physical block address represents a block of the plurality of blocks, and recording/updating information regarding a plurality of physical page addresses of the plurality of physical block addresses respectively linking to a plurality of logical page addresses of the logical block address in a logical-to-physical page linking table, the logical-to-physical page linking table also comprising current physical page location information indicating a location of a latest written physical page, each row of the logical-to-physical page linking table comprising a set of physical block address table index and physical page address; writing at least a logical page of the logical block to a physical page of one of the plurality of physical blocks; when a logical page address originally linked to a first physical page address is then linked to a second physical page address, removing the linking information to the first physical page address and determining the physical page represented by the first physical page address as an invalid page; referring to the logical-to-physical page linking table to determine blocks which have no valid page; and when a number of non-continuous blocks that are within blocks represented by the physical block addresses and have no valid page reaches a threshold which is a predetermined value greater than one, erasing all of the blocks that have no valid page and removing physical block addresses thereof from the linking information.