Patent ID: 7611942
Filing Date: 2009-11-03
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor integrated circuit device including a non-volatile memory cell formed in a non-volatile memory cell forming region of a semiconductor substrate, a resistor element formed in a resistor element forming region of said semiconductor substrate and a first transistor formed in a first transistor forming region of said semiconductor substrate, comprising steps of: forming a groove in said semiconductor substrate such that said groove defines an active region in said non-volatile memory cell forming region; filling a first insulating film in said groove by polishing an insulating film formed over said substrate such that said first insulating film is formed in said resistor element forming region and in said non-volatile memory cell forming region; forming a second insulating film over said active region in said non-volatile memory cell forming region, and, in a same step, forming said second insulating film over said first insulating film in said resistor element forming region; forming a first conductive film over said second insulating film in said non-volatile memory cell forming region, and, in a same step, forming said first conductive film over said second insulating film in said resistor element forming region; and after said first conductive film forming step, forming a third insulating film and a second conductive film in the first transistor forming region, wherein said second insulating film formed over said active region serves as a gate insulating film of said non-volatile memory cell, wherein said second insulating film formed over said active region is configured for storing information of said non-volatile memory cell, wherein said first conductive film formed in said non-volatile memory cell forming region serves as a gate electrode of said non-volatile memory cell, wherein said first conductive film formed in said resistor element forming region serves as said resistor element, wherein said third insulating film serves as a gate insulating film of a first transistor, and wherein said second conductive film serves as a gate electrode of said first transistor.