Patent ID: 6277732
Filing Date: 2001-08-21
Classification: H01L

Abstract:
A method of forming a planarized inter-metal dielectric layer, comprising the steps of:providing a substrate having a plurality of metal lines thereon so that some of the metal lines are packed closer together to form densely packed metal line regions while some of the metal lines are packed quite far apart to form loosely packed metal line regions;forming a dielectric liner layer on the substrate structure;performing a nitridation treatment on the dielectric liner layer;forming a low dielectric constant organic dielectric layer that completely fills the gaps in the densely packed metal line regions but only partially fills the gaps in the loosely packed metal line regions;performing a reactive ion etching operation on the organic dielectric layer using the dielectric liner layer as an etching stop layer;forming a low dielectric constant inorganic dielectric layer over the organic dielectric layer such that the inorganic dielectric layer is thick enough to be at a level higher than a top surface of the metal lines;forming a cap dielectric layer over the inorganic dielectric layer;planarizing the cap dielectric layer;forming a via that passes through the cap dielectric layer, the inorganic dielectric layer, the organic dielectric layer, and the dielectric liner layer, and exposes a portion of the metal line;performing an electron beam curing operation so that properties of exposed sidewalls of the organic dielectric layer inside the via are densed; andforming a barrier layer and a metal plug inside the via.