Patent ID: 7267610
Filing Date: 2007-09-11
Classification: B24B

Abstract:
1. A polishing pad, comprising: a) a polishing layer configured for polishing at least one of a magnetic, optical and semiconductor substrate in the presence of a polishing medium, the polishing layer including a polishing surface having a concentric center, a wafer track defined thereon during polishing of a wafer and an outer periphery, the wafer track having an inner boundary and an outer boundary spaced from the inner boundary; b) a plurality of grooves located in the polishing surface, each groove of the plurality of grooves extending through the wafer track so as to cross each of the inner boundary and the outer boundary, the plurality of grooves having an angular pitch that varies in a predetermined manner where radial pitch between grooves measured in a radial direction from the concentric center to the outer periphery is unequal for all adjacent grooves within the wafer track; and c) a plurality of groove sets in the wafer track, each of the plurality of groove sets being formed by the plurality of grooves, having at least one intra-set pitch angle and having adjacent inter-set pitch angles, at least some of the inter-set pitch angles differing from the at least one intra-set pitch of at least some of the plurality of groove sets.