Patent ID: 8039970
Filing Date: 2011-10-18
Classification: H01L

Abstract:
1. A stacked semiconductor device, comprising: a circuit substrate having an element mounting section and a connection portion; a first semiconductor element, mounted on the element mounting section of the circuit substrate, including a first semiconductor element body having a circuit with a transistor, a first electrode pad disposed on a surface of the first semiconductor element body, a metal bump formed on the first electrode pad and an insulating protection film formed on the surface of the first semiconductor element body, on which the first electrode pad is disposed, to cover the surface containing a periphery of the first electrode pad while exposing the first electrode pad; a second semiconductor element, stacked on the first semiconductor element so as to cover the first electrode pad, including a second semiconductor element body and a second electrode pad disposed on a surface of the second semiconductor element body, the second semiconductor element being disposed on the first semiconductor element via a spacer layer; and a first metal wire electrically connecting the connection portion of the circuit substrate and the first electrode pad of the first semiconductor element, wherein a first end portion of the first metal wire is ball-connected to the connection portion of the circuit substrate, a second end portion of the first metal wire is connected to the metal bump formed on the first electrode pad, and the first metal wire is in contact with the insulating protection film located around the first electrode pad on the surface of the first semiconductor element body.