Patent ID: 8049262
Filing Date: 2011-11-01
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a trench formed in a predetermined portion of a substrate; a first recess region formed beneath the trench; a field oxide layer buried into both of the trench and the first recess region; an active region defined by the field oxide layer, and having a first active region and a second active region having a second recess region formed in a lower portion than the first active region; and a step gate pattern on a border region between the first active region and the second active region, wherein the gate pattern has a step structure whose one side is extended to a surface of the first active region and the other side is extended to a surface of the second active region, wherein the field oxide layer includes: a first insulation layer formed on a surface of the first recess region not to completely fill the first recess region: a second insulation layer with a spacer shape formed on sidewalls of the trench; and a third insulation layer buried in the first recess region and the trench.