Patent ID: 7821588
Filing Date: 2010-10-26
Classification: G02F

Abstract:
1. A thin film transistor substrate comprising: a substrate having a display area and a peripheral area adjacent to the display area; a first pad section formed in the peripheral area, the first pad section including a first line and a second line, the first pad section receives a driving signal through at least one of the first and second lines; a second pad section including a third line electrically connected to one of an end portion of the first line and second line and a fourth line electrically connected to one of an end portion of the first line and second line, the second pad section receives the driving signal through the first pad section to at least one of the third and fourth lines; a signal wiring formed in the display area, the signal wiring electrically connected to at least one of the third and fourth lines of the second pad section; and a pixel array formed in the display area, the pixel array receives the driving signal from the signal wiring, wherein the first and second pad sections comprise: a first metal pattern is formed on the substrate to form the first and third lines, an insulation layer is disposed on the first metal pattern, and a second metal pattern is formed on the insulation layer to form the second and fourth lines, wherein the first and second receives the driving signal through the first line to repair a path through the second line when the second line is electrically opened, and wherein the second pad section receives the driving signal through the third line to repair a path through the fourth line when the fourth line is electrically opened.