Patent ID: 6879037
Filing Date: 2005-04-12
Classification: H01L

Abstract:
1. A semiconductor device comprising: a lead frame having a chip supporting portion and a plurality of leads; a first semiconductor chip and a second semiconductor chip each having an integrated circuit and bonding pads formed on a main surface thereof, and a rear surface opposing to said main surface; a plurality of bonding wires connecting one ends of said plurality of leads with said bonding pads of said first and second semiconductor chips respectively; and a resin body sealing said first and second semiconductor chips, said plurality of bonding wires and said chip supporting portion and portions of said plurality of leads, wherein said first semiconductor chip is mounted on one surface of said chip supporting portion by an adhesive layer, while said second semiconductor chip is mounted on the other surface of said chip supporting portion by an adhesive layer such that said main surfaces of said first and second semiconductor chips are faced to each other, and wherein said plurality of bonding wires are formed such that a peak height of each of said plurality of bonding wires is within a total thickness of said chip supporting portion, said adhesive layers and said first and second semiconductor chips in a thickness direction of said chip supporting portion.