Patent ID: 6800884
Filing Date: 2004-10-05
Classification: H01L,H03K

Abstract:
A field programmable gate array, said field programmable gate array comprising:a plurality of field programmable gate array tiles arranged in an array of rows and columns, each field programmable gate array tile comprising: a plurality of functional groups wherein each of said plurality of functional groups is configured to receive at least one input signal, and generate at least one output signal, a plurality of interface groups, wherein each of said plurality of interface groups is configured to selectively transfer signals between said primary routing structure and circuitry external to the field programmable gate array tile, and a primary routing structure including a horizontal bus and a vertical bus wherein the primary routing structure is coupled to said functional groups and interface groups, and is configured to receive signals from said plurality of functional groups and said plurality of interface groups and provide signals between said plurality of functional groups and said plurality of interface groups; a horizontal buffer connecting a primary routing structure in a first one of said plurality of field programmable gate array tiles in a first column and to a primary routing structure in a second one of said plurality of programmable gate array tiles in a second column adjacent to said first column; and a vertical buffer connecting a primary routing structure in a first one of said plurality of field programmable gate array tiles in a first row to a primary routing structure in a second one of said plurality of programmable gate array tiles in a second row adjacent to said first row.