Patent ID: 6725437
Filing Date: 2004-04-20
Classification: G06F

Abstract:
A method for VLSI circuit placement providing improved quality and enhanced speed, comprising the steps of:a. defining a target objective cost function and an initial value for a control parameter for circuit placement, b. grouping selected circuit elements of the VLSI circuit to form performance groups, c. selecting an initial placement configuration of the performance groups, d. increasing the value of the initial control parameter to a predetermined level, e. perturbing the placement configuration randomly to get a new configuration, f. determining an objective cost of the new configuration using the objective cost-function, g. accepting the new configuration when it has a lower objective cost as compared to the previous configuration, otherwise probabilistically accepting the new configuration when it has a higher objective cost, h. decreasing the value of the control parameter, and i. repeating steps (e) to (h) until a configuration having a lower objective cost is not detected for a predetermined number of iterations.