Patent ID: 7428288
Filing Date: 2008-09-23
Classification: H04N

Abstract:
1. An asynchronous transport stream receiver of a digital broadcasting receiving system comprising: a FIFO (First-In First-Out) section for storing MPEG data generated based on a DVB-ASI (Digital Video Broadcasting Asynchronous Serial Interface) mode; an oscillator for generating clock signals; a controller for reading and outputting the MPEG data stored in the FIFO section in synchronization with the clock signals of the oscillator, the controller including a PLL (Phase Locked Loop) or DLL (Dynamic Linking Library) for demultiplying the clock signals of the oscillator; wherein said controller outputting the MPEG data stored in the FIFO section in synchronization with the clock signals of the oscillator is to a standard-definition (SD) or high-definition (HD) leveled MPEG decoder for a subsequent processing without requiring an additional clock generator.