Patent ID: 9038070
Filing Date: 2015-05-19
Classification: G06F

Abstract:
1. A method of debugging thread execution within a multicore processor, the method comprising: receiving, by one or more hardware debug machines from a hardware thread management and allocation controller, a plurality of thread parameter indicators indicative of one or more parameters relating to the function, identity, or execution location of at least one thread stored within a thread queue of the hardware thread management and allocation controller communicatively coupled to each of a plurality of cores of the multicore processor, each core of the multicore processor coupled to a hardware debug machine; comparing, by the one or more of the hardware debug machines, at least one of the thread parameter indicators with one or more predefined criteria each representative of an indicator of interest, wherein the predefined criteria is defined and stored within each of the one or more hardware debug machines; and performing, by the one or more hardware debug machines, debugging operations for each core coupled to each of the one or more hardware debug machines based upon the thread parameter indicators identified to be of interest as a result of the comparison.