Patent ID: 8018213
Filing Date: 2011-09-13
Classification: H01L,H03K

Abstract:
1. A circuit arrangement comprising: an input to feed a control signal and an output to couple a load; a first load transistor having a control connection and a first and a second load path connection and a second load transistor having a control connection and a first and a second load path connection coupled in parallel with one another, wherein the control connections are coupled to the input, and the second load path connections are coupled to the output; a first measuring transistor having a control connection and a first and a second load path connection, wherein the control connection is coupled to the input and the first load path connection is coupled to the first load path connections of the first and second load transistors; an evaluation circuit coupled to the second load path connection of the measuring transistor, the evaluation circuit comprising a measuring output to provide a current-measuring signal; a first reverse-control circuit coupled to the control connection of the second load transistor, the first reverse-control circuit designed to regulate the second load transistor downwards if a voltage between the first and the second load path connections of the first load transistor falls below a predefined limit value.