Patent ID: 9123807
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first region forming a source region; a second region forming a drain region; a third region forming a gate region between the source region and the drain region, the gate region having a first vertical side and a second vertical side and including a doped region and an undoped region, the doped region extending from the first vertical side of the gate region to a third vertical side and the undoped region extending from the third vertical side to the second vertical side of the gate region; a silicide region formed onto the gate region, the silicide region not contacting at least a portion of a top side of the undoped region; a first well region extending from a fourth vertical side to a fifth vertical side; a second well region extending from a sixth vertical side to a seventh vertical side, at least a portion of the fifth vertical side of the first well region contacting at least a portion of the sixth vertical side of the second well region beneath the undoped region; a first spacer formed between the first region and the gate region, the first spacer contacting at least a portion of the first vertical side of the gate region; and a second spacer formed between the second region and the gate region, the second spacer contacting at least a portion of the second vertical side of the gate region.