Patent ID: 9058277
Filing Date: 2015-06-16
Classification: G06F,Y02D

Abstract:
1. A method of prefetching data for a processor, the method comprising: selecting one of a first prefetching control logic and a second prefetching control logic of the processor as a candidate feature for evaluation, wherein selecting the candidate feature includes selecting the candidate feature based on an instruction fetch miss rate; capturing a performance metric of the processor over an inactive sample period when the candidate feature is inactive; capturing the performance metric of the processor over an active sample period when the candidate feature is active; comparing the performance metric of the processor for the active and inactive sample periods; and setting a status, by the processor, of the candidate feature as enabled when the performance metric in the active sample period indicates improvement over the performance metric in the inactive sample period, and setting the status, by the processor, of the candidate feature as disabled when the performance metric in the inactive sample period indicates improvement over the performance metric in the active sample period.