Patent ID: 9041187
Filing Date: 2015-05-26
Classification: H01L

Abstract:
1. A semiconductor package comprising: a first power semiconductor die that includes a first electrode on a surface thereof; a second power semiconductor die that includes a first electrode on a surface thereof; a support plate having a first surface and a second surface opposite said first surface; an insulation body disposed on said first surface of said support plate; and a plurality of laterally spaced conductive pads on said insulation body, a first one of said conductive pads including a first region electrically and mechanically coupled to said first electrode of said first semiconductor die with a conductive adhesive body interposed between said first electrode and said first region and a second region readied for connection using a conductive adhesive body to a conductive pad external to said package, and a second one of said conductive pads including a first region electrically and mechanically coupled to said first electrode of said second semiconductor die with a conductive adhesive body interposed between said first electrode and said first region and a second region readied for connection using a conductive adhesive body to a conductive pad external to said package.