Patent ID: 6137339
Filing Date: 2000-10-24
Classification: H03K

Abstract:
A high voltage driver circuit, comprising:a control stage having an input, a lower output section, and an upper output section, said control stage receiving at said input a low voltage signal having a predetermined voltage swing magnitude, outputting at said lower output section a first stepped-up voltage signal having said predetermined voltage swing magnitude and outputting, at said upper output section, a second stepped-up voltage signal having said predetermined voltage swing magnitude; anda driver stage connected to said control stage, said driver stage having a lower section with a lower output for receiving, as an input signal, said first stepped-up voltage signal and producing a lower section output signal on said lower output, and an upper section having an upper output, said upper section receiving as an input said second stepped-up voltage signal and producing an upper section output signal on said upper output, said upper and lower sections of said driver stage comprising a plurality of PMOS transistors with each PMOS transistor formed in a corresponding n-well and having a source terminal, each said PMOS transistor being configured for maintaining a potential of said corresponding n-well at a potential of the source terminal of the said each PMOS transistor while allowing the n-wells in said plurality of PMOS transistors to have different potentials from each other, so that the upper and lower sections of said driver stage can operatively accommodate an output voltage swing across said upper and lower outputs of said driver stage having a voltage swing magnitude larger than the predetermined voltage swing magnitude.