Patent ID: 8117573
Filing Date: 2012-02-14
Classification: G06F

Abstract:
1. A non-transitory computer-readable recording medium storing therein a computer program that is for verification-scenario generation and that causes a computer to execute: extracting from among a plurality of hardware blocks that constitute a bus system to be verified, an access-origin hardware block and an access-destination hardware block; searching for a path reaching from the access-origin hardware block to the access-destination hardware block; generating, for each path found at the searching, a verification scenario which is used for verifying a transaction of the access-origin hardware block for a case where access to an address range assigned to the access-destination hardware block occurs; outputting the verification scenario which is associated with the path; and deleting the verification scenario for a path where the access-origin hardware block of the path is substantially the same as the access-destination hardware block of the path.