Patent ID: 6504202
Filing Date: 2003-01-07
Classification: H01L

Abstract:
An integrated circuit (IC) comprising a substrate, a generally horizontally-extending interconnect layer, the interconnect layer having a vertical thickness extending between an upper surface and a lower surface of the interconnect layer, first and second layers of intermetal dielectric insulating material (IMD) contacting opposite sides of the interconnect layer, and an improvement comprising;a cavity within the interconnect layer and located vertically between the upper and lower surfaces of the interconnect layer and horizontally between edges of the interconnect layer which define the cavity; a capacitor embedded within the cavity, the capacitor comprising top and bottom vertically-spaced plates separated by capacitor dielectric material, one of the top or bottom capacitor plates electrically connected to the interconnect layer within the cavity, one of the top or bottom capacitor plates horizontally spaced from the edges defining the cavity; and an electrical connector extending through one of the IMD layers contacting the interconnect layer, the electrical connector electrically connected to the other one of the top or bottom capacitor plates.