Patent ID: 8427963
Filing Date: 2013-04-23
Classification: H04J,H04L

Abstract:
1. A method of routing a timing packet between a master clock and a slave clock of a packet network, comprising the steps of: transmitting a first set of timing packets between the master clock and the slave clock along a first path; evaluating a transit delay characteristic of the first path based on timing information contained in the timing packets of the first set, wherein the transit delay characteristic is evaluated using at least one of an MTIE metric, a TDEV metric, a two-way metric based on asymmetry in forward and reverse directions, a skewness metric, and an excess kurtosis metric; transmitting a second set of timing packets between, the master clock and the slave clock along a second path; evaluating a transit delay characteristic of the second path based on timing information contained in the timing packets of the second set, wherein the transit delay characteristic is evaluated using at least one of an MTIE metric, a TDEV metric, a two-way metric based on asymmetry in forward and reverse directions, a skewness metric, and an excess kurtosis metric; and controlling future timing packets to be transmitted between the master clock and the slave clock along the path that has a better transit delay characteristic.