Patent ID: 7568138
Filing Date: 2009-07-28
Classification: G01R,G06F

Abstract:
1. A computer implemented method of preventing firmware defects from disturbing logic clocks, the computer implemented method comprising: receiving a request for a scan operation from a firmware interface for a functional unit, wherein the request includes a scan chain length value and a ring select; producing global scan clocks using the scan chain length value; and responsive to the ring select being set equal to a ring select value of one and a global clock enable value being set equal to zero, setting the value of a scan enable signal equal to one, wherein the global scan clocks are gated with the scan enable signal to form local scan clocks; responsive to the ring select value being set to one and the global clock enable value being set equal to one, setting the value of a scan enable signal equal to zero; generating an error in a register; and generating an interrrupt to the firmware interface.