Patent ID: 6630384
Filing Date: 2003-10-07
Classification: H01L

Abstract:
A method of forming a non-volatile semiconductor memory device, comprising:forming a charge trapping dielectric over a substrate, the substrate having a core region; forming a first set of memory cell control gates over the charge trapping dielectric in the core region; forming a conformal insulation material layer around the first set of memory cell control gates; and forming a second set of memory cell control gates in the core region, wherein each memory cell control gate of the second set of memory cell control gates is horizontally adjacent to at least one memory cell control gate of the first set of memory cell control gates, each memory cell control gate of the first set of memory cell control gates is horizontally adjacent at least one memory cell control gate of the second set of memory cell control gates, and the conformal insulation material layer is positioned between each horizontally adjacent memory cell control gate.