Patent ID: 7719107
Filing Date: 2010-05-18
Classification: G11C,H01L

Abstract:
1. A semiconductor device, comprising: an IC chip body that includes: a multiplicity of IC pads arranged in a rectangular configuration on one side of, and along the periphery of, said IC chip body; a first circuit section connected to one IC pad on one side of said IC chip body of said IC pads; and a second circuit section connected to another IC pad on the other side of said IC chip body, said another IC pad being other than one IC pad where said first circuit section is connected to, and a package substrate that includes: an insulating substrate having a multiplicity of via-holes formed to penetrate from one side to the other side of said insulating substrate, said via-holes arranged in a grid configuration; a multiplicity of substrate pads formed on one side of said insulating substrate, said substrate pads facing said IC pads and electrically connected to said IC chip body; a multiplicity of external electrodes formed to protrude from the other side of said insulating substrate, corresponding to said via-holes and surrounded by said substrate pads; a first lead wire connecting one external electrode of said external electrodes to one substrate pad on one side of said substrate pads via one via-hole of said via-holes, wherein said one substrate pad is facing to one IC pad connected to said first circuit section; and a second lead wire connecting another external electrode of said external electrodes to another substrate pad, other than said one external electrode connected to said first lead wire, on the other side of said substrate pads via another via-hole not adjacent to said one vial-hole connected to said first lead wire, wherein said another substrate pad is facing to another IC pad connected to said second circuit section; wherein said one external electrode connected to said first circuit section and said another external electrode connected to said second circuit section are respectively located at the outermost circumference, said first circuit section is a section more likely to emit noise, said second circuit section is a section more likely to be susceptible to noise, and said first circuit section and said second circuit section are separated and spaced apart from each other.