Patent ID: 6828232
Filing Date: 2004-12-07
Classification: H01L

Abstract:
A method for forming a semiconductor structure with in-situ unit resistors comprising the steps of:providing a pre-processed substrate having a planar top surface; depositing a first insulating material layer on said planar top surface of said pre-processed substrate; forming a first plurality of conductive elements on said first insulating material layer; depositing a second insulating material layer on top of said first plurality of conductive elements and said first insulating material layer; forming a plurality of via openings in said second insulating material layer, each of said via openings exposing one of said first plurality of conductive elements; depositing an electrically resistive metal having a resistivity of at least 100 &OHgr;-cm into said plurality of via openings forming a plurality of electrically resistive vias; and forming a second plurality of conductive elements on top of said second insulating material layer wherein each of said second plurality of conductive elements in electrical communication with at least one of said plurality of electrically resistive vias.