Patent ID: 9196702
Filing Date: 2015-11-24
Classification: H01L

Abstract:
1. A method of manufacturing a power semiconductor device, the method comprising: preparing a base substrate having one surface and the other surface and formed of a first conductive type drift layer; forming an etching resist on one surface of the base substrate, the etching resist having an open part for forming a trench; forming a primary trench corresponding to the open part from one surface of the base substrate in a thickness direction; performing ion injection and thermal diffusion on the primary trench to form a first conductive type diffusion layer having a concentration higher than that of the first conductive type drift layer; and forming a secondary trench extended from a lower surface of the primary trench to the thickness direction and penetrating through the first conductive type diffusion layer, wherein the diffusion layer is overlapped with the diffusion layer formed on one side of the adjacent primary and secondary trenches, and a peak point of an impurity doping profile of the first conductive type diffusion layer according to the ion injection is positioned between one surface of the base substrate and a lower surface of the secondary trench.