Patent ID: 6654075
Filing Date: 2003-11-25
Classification: G02F,G09G

Abstract:
A liquid crystal display device, comprising:a first transparent substrate having a first surface and a second surface; and a second transparent substrate having a first surface and a second surface, wherein said first transparent substrate and said second transparent substrate are arranged such that said first surface of said first transparent substrate faces said first surface of said second transparent substrate, and a liquid crystal material is enclosed between said first surface of said first transparent substrate and said first surface of said second transparent substrate, wherein a pixel array is formed on each of said first surface of said first transparent substrate and said first surface of said second transparent substrate, wherein each said pixel array comprises transistors, data lines and gate lines defining a plurality of pixel regions, and each pixel region comprises pixel electrode, wherein said plurality of pixel regions are arranged in row and column directions, wherein said data lines are arranged in one of said row and column directions, gate lines are arranged in the other direction of said row and column directions, and each of said pixel regions on said first transparent substrate is aligned with each of said pixel regions on said second transparent substrate, wherein said gate lines on said first transparent substrate are aligned with said gate lines on said second transparent substrate, respectively, and said data lines on said first transparent substrate are aligned with said data lines on said second transparent substrate, wherein said gate lines on said first surface of said first transparent substrate are connected to a first gate line driver, said data lines on said first surface of said first transparent substrate are connected to a first data line driver, said gate lines on said first surface of said second transparent substrate are connected to a second gate line driver, and said data lines on said first surface of said second transparent substrate are connected to a second data line driver, wherein each of said first and second transparent substrates has a top edge, a bottom edge, a left side edge and a right side edge. wherein data line pads respectively connected to said data lines on said first transparent substrate are formed in a first area adjacent to one of said top edge and bottom edge of said first transparent substrate, gate line pads respectively connected to said gate lines on said first transparent substrate are formed in a second area adjacent to one of said left side edge and said right edge of said first transparent substrate, data line pads respectively connected to said data lines on said second transparent substrate are formed in a third area adjacent to the other of said top edge and said bottom edge of said second transparent substrate, and gate line pads respectively connected to said gate lines are formed in a fourth area adjacent to the other of said left edge and said right side edge of said second transparent substrate, wherein said first data line driver is connected to said data line pads in said first area, said first gate line driver is connected to said gate line pads in said second area, said second data line driver is connected to said data line pads in said third area, and said second gate line driver is connected to said gate line pads in said fourth area, wherein said liquid crystal material is switched from a first state, in which no voltage is applied, to a second state, in which a switching voltage is applied to said liquid crystal material, wherein said first gate line driver applies a gate pulse to a selected one gate line on said first transparent substrate, said second gate line driver applies a gate pulse to one gate line, which faces said selected one gate line, on said second transparent substrate, and said application of said two gate pulses are simultaneously performed, and wherein said first data line driver applies a data signal having a value, which is half of said switching voltage, to at least one data line on said first transparent substrate, during the application of said gate pulse to said gate line on said first transparent substrate, and said second data line driver applies a data signal having an amplitude, which is half of said switching voltage, to a data line on said second transparent substrate, which faces said one data line on said first transparent substrate, during the application of said gate pulse to said gate line on said second transparent substrate.