Patent ID: 7037778
Filing Date: 2006-05-02
Classification: H01L

Abstract:
1. A method for fabricating a capacitor in a semiconductor memory device, comprising the steps of: forming a first insulation layer over a substrate; forming a first etch stop over the first insulation layer, the first etch stop layer having an upper surface; forming a plurality of contact holes by etching the first insulation layer and the first etch stop layer; forming a plurality of contact plugs on the plurality of contact holes, each contact plug having an upper portion that extends above the upper surface of the first etch stop layer; forming a second etch stop layer over the contact plugs and the first etch stop layer, the second etch stop layer being substantially non-planar; forming a capacitor insulation layer over the second etch stop layer; forming a plurality of openings by etching the second etch stop layer and the capacitor insulation layer to expose the contact plugs; sequentially forming a storage node material and a sacrificial layer; etching the storage node material and the sacrificial layer, thereby obtaining isolated storage node material; and removing remaining portions of the sacrificial layer and the capacitor insulation layer.