Patent ID: 7509475
Filing Date: 2009-03-24
Classification: G06F

Abstract:
1. A method of controlling a virtual machine system comprising a host program for operating a guest program on each of a plurality of virtual machines constructed by logically partitioning a main storage and a processor, wherein the processor includes, as an address translation mechanism for translating a guest virtual address into a host real address, a TLB, a page table search mechanism for inserting address translation information into the TLB by searching a host page table on the main storage in the absence of the address translation information in the TLB and an address register for holding the bottom address of the host page tables; the method comprising the steps of: generating a plurality of host page tables through the host program; creating the translation information for setting the guest virtual address and the host real address in correspondence with each other and registering the translation information in the host page tables; selecting one host page table from the guest program in accordance with the address translation mode for operating the guest program; and setting the bottom address of the selected host page table in the address register.