Patent ID: 8853068
Filing Date: 2014-10-07
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: providing a semiconductor substrate having a first region and a second region; forming a high-k dielectric layer over the semiconductor substrate; forming a capping layer over the high-k dielectric layer in the first region; forming a first metal layer over capping layer in the first region and over the high-k dielectric layer in the second region, the first metal having a first work function; forming a polysilicon layer over the first metal in the first and second regions; after forming the polysilicon layer over the first metal in the first and second regions, forming a first gate stack in the first region and a second gate stack in the second region; after forming the first gate stack in the first region and the second gate stack in the second region, forming a second metal over the first metal layer in the first gate stack and the second gate stack, the second metal having a second work function; removing the second metal over the first metal layer in the first gate stack to expose a portion of the first metal layer in the first gate stack; and forming a third metal layer over the exposed portion of the first metal layer in the first gate stack and over the second metal layer in the second gate stack.