Patent ID: 7253063
Filing Date: 2007-08-07
Classification: H01L

Abstract:
1. A method of fabricating a composite gate dielectric layer comprising the step of: forming a complementary dielectric layer upon a layer of silicon oxide, SiO forming a first monolayer of oxygen upon a silicon substrate by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition or low pressure chemical vapor deposition; forming a monolayer of silicon upon the first monolayer of oxygen by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition or low pressure chemical vapor deposition; forming a second monolayer of oxygen upon the monolayer of silicon by at least one of atomic layer chemical vapor deposition, metal organic chemical vapor deposition or low pressure chemical vapor deposition; and growing the complementary dielectric layer upon the second monolayer of oxygen.