Patent ID: 6380017
Filing Date: 2002-04-30
Classification: H01L

Abstract:
A method for forming a bipolar transistor on a wafer, the wafer having a buried layer and a first epitaxial layer of a first conductivity type, the first epitaxial layer being formed over the buried layer and having a smaller dopant concentration than the buried layer, the method comprising the steps of:forming a layer of isolation material on the first epitaxial layer; forming an extrinsic base and an extrinsic emitter on the layer of isolation material, the extrinsic base having a second conductivity type and being spaced apart from the extrinsic emitter, the extrinsic emitter having the first conductivity type; etching the layer of isolation material to form a first opening in the layer of isolation material, the first opening being between the extrinsic base and the extrinsic emitter, and exposing a surface of the first epitaxial layer; forming an intrinsic base region on the surface of the first epitaxial layer in the first opening; forming a first insulating spacer, a second insulating spacer, and an insulating plug on the intrinsic base region in the first opening, the first insulating spacer contacting the extrinsic base, the second insulating spacer being spaced apart from the first insulating spacer and contacting the extrinsic emitter, the insulating plug being spaced apart from the first and second insulating spacers, and formed between the first and second insulating spacers; forming a base spacer that contacts the extrinsic base and the intrinsic base between the first insulating spacer and the insulating plug, and an emitter spacer that contacts the extrinsic emitter and the intrinsic base between the second insulating spacer and the insulating plug.