Patent ID: 6922649
Filing Date: 2005-07-26
Classification: G11C

Abstract:
1. A structure, comprising: a fuse bay including a fuse array of N fuses, N being an integer; a built-in-self-test (BIST) circuit electrically coupled to the fuse bay; a memory module electrically coupled to the fuse bay and the BIST circuit; and a new repair circuit electrically coupled to the fuse bay and the BIST circuit, wherein the fuse bay is configured to store and shift an original combined repair solution to the BIST circuit; the BIST circuit is configured to (i) perform a first test run on the memory module so as to obtain a first test-run repair solution, and then (ii) combine the first test-run repair solution and the original combined repair solution from the fuse bay so as to obtain a first combined repair solution; the new repair circuit is configured to receive and compare the original combined repair solution and the first combined repair solution to obtain a first new repair solution; and the fuse bay is further configured to program the first new repair solution into the fuses of the fuse array so that the fuse bay stores the first combined repair solution.