Patent ID: 6124194
Filing Date: 2000-09-26
Classification: H01L

Abstract:
A method of fabricating an anti-fuse module and dual damascene interconnect structure, the steps comprising:providing a semiconductor structure having at least two exposed metal lines covered by a first dielectric layer; a first metal line is within an anti-fuse area and a second metal line is within an interconnect area;forming a first metal via within said first dielectric layer within said anti-fuse area, said first metal via contacting said first metal line;depositing a SiN layer over said first dielectric layer and said first metal via;patterning said SiN layer to form at least two openings; a first opening exposes said first metal via, and a second opening exposes a portion of said first dielectric layer above said second metal line;depositing and patterning a fusing element layer over said patterned SiN layered structure to form a fusing element over said first metal via; andsimultaneously forming: an anti-fuse metal line over said fusing element to form an anti-fuse module within said anti-fuse area; and a dual damascene interconnect over, and contacting with, said second metal line and within said interconnect area.