Patent ID: 8299371
Filing Date: 2012-10-30
Classification: H05K,Y10T

Abstract:
1. A circuitized substrate comprising: a) a first printed circuit board (PCB) layer having a first plurality of conductive features, each of said conductive features having a predetermined dimension; b) a dielectric interposer positioned on said first PCB layer; c) a second PCB layer having a second plurality of conductive features further positioned on said dielectric interposer; and d) a plurality of thru-holes extending through said dielectric interposer layer, each of said plurality of thru-holes having a diameter greater than said predetermined conductive feature dimension, resulting in a pocket of space proximate said plurality of conductive features, and each of said plurality of thru-holes being in alignment with a respective one of said first and said second plurality of conductive features on said first and said second PCB layers, respectively, and including a portion of laminated, electrically resistive paste thereon, said laminated electrically resistive paste being spread outside boundaries of said plurality of conductive features to fill said pockets of space, said electrically resistive paste having an adjustable resistivity factor.