Patent ID: 8284143
Filing Date: 2012-10-09
Classification: G09G

Abstract:
1. A timing controller, comprising: a frame memory capable of storing previous frame data; a comparator structured to output a first control signal or a second control signal at least based on predetermined minimum white data and current frame data; an overdriver unit structured to output a compensation data signal in response to a comparison of the previous frame data and the current frame data; a saturation voltage data supplying unit structured to generate a saturation voltage data signal in response to the previous frame data and the current frame data, the saturation voltage data signal being limited according to at least one of allotted drive time and a response speed of liquid crystals in a liquid crystal display panel associated with the timing controller; and an outputting unit capable of selectively outputting either the compensation data signal or the saturation voltage data signal in response to a selection control signal, wherein the selection control signal is either the first control signal or the second control signal.