Patent ID: 6689696
Filing Date: 2004-02-10
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, comprising:forming a conductive contact in an upper surface of a lower dielectric layer, wherein an opposite lower surface of the lower dielectric layer confronts a surface of a semiconductor substrate; depositing a dielectric mold layer over the lower dielectric layer and the conductive contact while modifying one of a plurality of deposition parameters such that the dielectric mold layer has an intrinsic etch rate that increases along a depth direction of a thickness of the dielectric mold layer, wherein the depth direction extends from an upper surface of the dielectric mold layer to a lower surface of the dielectric mold layer, and wherein the lower surface of the dielectric mold layer confronts the upper surface of the lower dielectric layer; selectively etching the dielectric mold layer to form a through hole which extends through the dielectric mold layer, wherein side surfaces of the through hole are defined by the dielectric mold layer, and wherein a bottom surface of the through hole is defined by the conductive contact and upper surface portions of the lower dielectric layer; and forming a conductive layer on the side surfaces and bottom surface of the through hole to form a substantially cylindrical electrode.