Patent ID: 6599796
Filing Date: 2003-07-29
Classification: H01L

Abstract:
A thin-film cross point memory array fabricated on a substrate and having a plurality of memory cells, each memory cell including a diode and an anti-fuse, comprising:a first conducting material disposed in discrete areas on the substrate to form a plurality of first electrodes; a second conducting material disposed in discrete areas that are transverse to the discrete areas of the first electrodes and are spaced from the first electrodes to form a plurality of second electrodes having cross points relative to the first electrodes; a plurality of semiconductor layers disposed between the first and second electrodes to form a diode between each of the cross points of the first and second electrodes; and a passivation layer between the first electrodes and the diodes to form a plurality of anti-fuses adjacent to the diodes at the cross points of the first and second electrodes; wherein portions of the diode layers are removed between adjacent electrode cross points to form the plurality of memory cells with rows of trenches between adjacent memory cells to provide a baffler against crosstalk between adjacent memory cells, the passivation layer disposed within the trenches to substantially follow the contour of the trenches to enhance the barrier.