Patent ID: 6141254
Filing Date: 2000-10-31
Classification: G11C

Abstract:
A method for programming a Flash-EPROM type memory (1) comprising words of memory cells arranged in rows (23) and columns (31), in which a floating-gate transistor (7) acts as a storage device, the floating-gate transistors of the memory cells (2-9) of one and the same word (10) have their control gate connected to the same word line connection (30) and their source connected to the same main electrode (29) of a selection transistor (26), the other main electrode (28) of which is connected to a vertical word source connection (25),characterized in that during a single programming cycle, M memory cells (2,2b) are programmed simultaneously in N different words (10, 200), where M is less than the number P of memory cells in a word, and where M, N and P are integer numbers.