Patent ID: 7317442
Filing Date: 2008-01-08
Classification: G09G

Abstract:
1. A drive circuit for a display apparatus including a plurality of scanning lines and a plurality of data lines arranged in a matrix of rows and columns, said drive circuit comprising: a data latch circuit for latching image data corresponding to said plurality of data lines in response to a horizontal signal; a decoder circuit for decoding said latched image data; a gradation voltage selection circuit for selecting at least one of a plurality of gradation voltage lines to be connected to said plurality of data lines based on said decoded image data; a data determination circuit for generating determination signals based on said selected at least one of said plurality of gradation voltage lines such that a plurality of gradation amplifiers are grouped into at least one active gradation amplifier and inactive gradation amplifier excluding said at least one active gradation amplifier based on said determination signal, in order to drive said at least one of said plurality of gradation voltage lines and then said plurality of data lines; a gradation amplifier circuit including said plurality of gradation amplifiers, each amplifying corresponding one of gradation voltages only when activated, said amplified gradation voltage being output to at least one of said plurality of gradation voltage lines; an output circuit for driving said plurality of data lines based on said amplified gradation voltages of said plurality of gradation voltage lines; and a bias control circuit for setting each of said plurality of gradation amplifiers to one of said active state and an inactive state based on said determination signals from said data determination circuit.