Patent ID: 7354781
Filing Date: 2008-04-08
Classification: H01J,Y10S

Abstract:
1. A method of forming stacked layers in an electronic device, comprising: preparing a multi-layer structure comprising a substrate, a cathode on the substrate, a gate electrode having a through-hole, and a gate insulation layer disposed between the cathode and the gate electrode and having a gate hole corresponding to the through-hole; forming a sacrificial layer by coating a positive photoresist having polymers on the multi-layer structure, the polymers comprising at least 50 mole % of monomers having structures selected from the group consisting of Formulae 1 through 3; forming a photomask on a position of the sacrificial layer corresponding to the gate hole; exposing a portion of the sacrificial layer uncovered by the photomask to light; forming a well in the sacrificial layer by etching the unexposed portion of the sacrificial layer covered by the photomask using one of TCE and CH filling the well by applying an electron emitting material paste which is able to be hardened by light to the sacrificial layer; hardening a lower portion of the electron emitting material paste filled in the well by radiating light from the bottom of the substrate; and forming an electron emitting material layer having a predetermined height on the cathode by removing the sacrificial layer and the unexposed electron emitting material paste: where R where R where R