Patent ID: 6470043
Filing Date: 2002-10-22
Classification: H04B,H04L

Abstract:
A receiver comprising:a plurality of receiver antennas; circuitry that obtains signals transmitted from a plurality of transmitter antennas; and a processor that develops a sum signal corresponding to the addition of said obtained signals that are each pre-multiplied by &lgr;j, where j is an index integer specifying that &lgr;j multiplies the signal received from antenna j of said plurality of receiver antennas, develops values for transfer functions &agr;ij, where i is associated with said transmitter antennas, and j is associated with said receiver antennas, develops said &lgr;j factors from said transfer functions, where said &lgr;j factors are components of a vector &Lgr;, where &Lgr; is an eigenvector of a matrix containing said elements &agr;ij, and detects symbols transmitted by said transmitter antennas embedded in said sum signal.