Patent ID: 6215685
Filing Date: 2001-04-10
Classification: G11C

Abstract:
A content addressable memory (CAM) that stores tags and data associated with each tag and sequentially compares the tags to a target tag, comprising:a data cache operable to store data associated with each tag;a tag memory having rows and columns of tag cells, each tag cell operable to store a bit of a tag and having a multiplexing switch that receives a cell output signal representing the bit;a number of bit-select lines, each of the bit-select lines connecting cells of one of the columns and operable to activate the multiplexing switches of those cells;a number of readlines, each of the readlines connecting cells of a row and operable to receive a cell output signal from a cell of that row via the cell's associated multiplexing switch;a tag compare circuit operable to receive cell output signals via each readline and to compare a cell output signal on each readline with a signal representing a bit of the target tag;a target tag line operable to sequentially deliver bits of the target tag to the tag compare circuit;a hit line operable to indicate the results of comparisons made by the tag compare circuit;a data bus operable to output data from the data cache when a tag is matched to the target tag; anda controller having a control input for receiving control signals, and operable to activate the bit-select lines and to generate a readout signal to activate the data cache such that data associated with a matched tag may be retrieved.