Patent ID: 7852174
Filing Date: 2010-12-14
Classification: H03B,H03H

Abstract:
1. A negative capacitance circuit having a first input terminal and a second input terminal, the negative capacitance circuit comprising: a first branch coupled between a first reference voltage terminal and a second reference voltage terminal, said first branch having, in series, a first biasing resistor, a first diode, a collector-emitter circuit of a first bipolar transistor and a first current source; a second branch coupled between said first reference voltage and said second reference voltage, said second branch having, in series, a second biasing resistor, a second diode, a collector-emitter circuit of a second bipolar transistor and a second current source, said first transistor having a base terminal which is coupled to a collector terminal of said second transistor and to said second input terminal, and said second transistor having a base terminal which is coupled to a collector terminal of said first transistor and to said first input terminal; a capacitor connected between the emitter terminal of said first bipolar transistor and the emitter terminal of said second bipolar transistor; a linearization resistor which is coupled in parallel between the two emitter terminals of said first and said second bipolar transistors.