Patent ID: 8400589
Filing Date: 2013-03-19
Classification: G02F,H01L

Abstract:
1. A flat panel display device comprising: a first substrate; a second substrate disposed opposite to the first substrate; a common electrode formed between the first and second substrates, wherein the common electrode is closer to the second substrate than the first substrate; a liquid crystal layer formed between the first and second substrates; a thin film transistor (TFT) formed between the first and second substrates, wherein the TFT comprises source and drain electrodes; a blocking layer formed between the first substrate and the TFT, wherein the blocking layer is formed only beneath the TFT, wherein the blocking layer comprises a first sub-blocking layer and a second sub-blocking layer formed on the first sub-blocking layer, wherein the first sub-blocking layer is closer to the first substrate than the second sub-blocking layer, and wherein the first sub-blocking layer is formed of silicon oxide, and wherein the second sub-blocking layer is formed of silicon nitride; a planarization layer formed on the TFT, wherein a via hole is defined in the planarization layer; and a pixel electrode formed on the planarization layer and electrically connected to the source or drain electrode of the TFT through the via hole.