Patent ID: 6360297
Filing Date: 2002-03-19
Classification: G06F

Abstract:
A data processing system comprising:a processor; a plurality of caches located on different vertical levels; means for coupling said processor to said plurality of vertical caches; means for determining preferences of ordering data requested from a cache line of one of said vertical levels of caches, wherein a first preference applies to a first vertical level cache and a second preference applies to a second vertical level cache; and means, responsive to said determining means, for issuing from said processor to an address bus that interconnects said processor with said plurality of vertical caches a load request along with a preference order comprising said first preference, wherein said preference order forces said first vertical level cache to retrieve said data from said cache line within said first vertical level cache according to said first preference when said data is located in said first vertical level cache; and means for setting said preference order to said second preference when said data is not stored in said first vertical level cache.