Patent ID: 8130013
Filing Date: 2012-03-06
Classification: H03K

Abstract:
1. A driving circuit, comprising: a main output stage, for receiving at least one driving signal and outputting an output signal corresponding to an input signal accordingly; and an enhancing unit, coupled to the main output stage, for receiving and detecting a level of the output signal, so as to drive an output force of the main output stage at a first output level or a second output level, wherein the first output level is higher than the second output level, wherein if the enhancing unit detects that the level of the output signal at a rising edge is higher than a first predetermined level, the enhancing unit drives the output force of the main output stage at the second output level, otherwise the enhancing unit drives the output force of the main output stage at the first output level; wherein if the enhancing unit detects that the level of the output signal at a falling edge is lower than a second predetermined level, the enhancing unit drives the output force of the main output stage at the second output level, otherwise the enhancing unit drives the output force of the main output stage at the first output level; wherein the first predetermined level is different from the second predetermined level, wherein the enhancing unit comprises: an auxiliary output stage, coupled to the main output stage, for receiving a first and a second detection signals, so as to drive the output force of the main output stage at the first output level or the second output level; and a detection unit, coupled to the main output stage and the auxiliary output stage, for receiving the input signal and the output signal and detecting the level of the output signal at a rising edge and a falling edge, so as to output the first and the second detection signals for turning on/off the auxiliary output stage, wherein the detection unit comprises: a first sub-detection unit, for receiving the input signal and the output signal and detecting the level of the output signal at the rising edge, so as to output the first detection signal, and the first sub-detection unit comprising: a first transistor, having a gate for directly receiving the output signal and a source for directly receiving a system voltage; a second transistor, having a gate and a drain both directly coupled to a drain of the first transistor, and a source for directly receiving a reference voltage; a first inverter, having an input terminal directly coupled to the drain of the first transistor; a second inverter, having an input terminal directly coupled to an output terminal of the first inverter; a third transistor, having a gate for directly receiving the input signal and a source for directly receiving the system voltage; a fourth transistor, having a gate directly coupled to an output terminal of the second inverter, a source for directly receiving the system voltage, and a drain directly coupled to a drain of the fourth transistor for outputting the first detection signal; a fifth transistor, having a gate for directly receiving the input signal and a drain directly coupled to the drain of the third transistor; a sixth transistor, having a gate directly coupled to the gate of the second transistor, a drain directly coupled to a source of the fifth transistor, and a source for directly receiving the reference voltage; and a seventh transistor, having a gate directly coupled to the output terminal of the first inverter, a drain directly coupled to the gate of the sixth transistor, and a source for directly receiving the reference voltage; and a second sub-detection unit, for receiving the input signal and the output signal and detecting the level of the output signal at the falling edge, so as to output the second detection signal, wherein the at least one driving signal comprises a first driving signal and a second driving signal, and the driving circuit further comprises a driving stage, coupled to the main output stage, for receiving the input signal and outputting the first driving signal and the second driving signal accordingly, wherein the first driving signal and the second driving signal have a same phase, and the first driving signal and the second driving signal are reverse to the input signal, wherein the main output stage comprises: at least one eighth transistor, having a gate for receiving the first driving signal and a source for receiving the system voltage; and at least one ninth transistor, having a gate for receiving the second driving signal, a source for receiving the reference voltage, and a drain coupled to a drain of the eighth transistor for outputting the output signal, wherein the auxiliary output stage comprises: at least one tenth transistor, having a gate coupled to the first sub-detection unit for receiving the first detection signal, a source for receiving the system voltage, and a drain coupled to the drain of the eighth transistor; and at least one eleventh transistor, having a gate coupled to the second sub-detection unit for receiving the second detection signal, a source for receiving the reference voltage, and a drain coupled to the drain of the ninth transistor.