Patent ID: 6946348
Filing Date: 2005-09-20
Classification: H01L

Abstract:
1. A method for manufacturing a power mosfet comprising the steps of: forming a gate trench mask with open and closed regions on the surface of a semiconductor substrate; removing semiconductor material from areas exposed by the open regions of the trench mask to form a plurality of gate trenches; forming a sacrificial gate oxide layer on the sidewalls of the trenches; implanting the substrate with a drift region implant that penetrates the oxide on the floors of the trenches and is stopped on the surface of the substrate by the residual trench mask; annealing the substrate to diffuse the drift implant to form a continuous drift layer and define the length of the gate; removing the trench mask and the sacrificial oxide and forming a gate oxide on the surface of the trench; depositing a layer of polysilicon on the surface of the substrate and in the trenches; removing the polysilicon from the surface of the semiconductor substrate and leaving enough polysilicon in the gate trenches to form gates in the trenches; implanting the substrate with a source dopant to form source regions in the surface of the semiconductor substrate and to increase the conductivity of the polysilicon in the trenches to form gate regions in the trenches; depositing a layer of BPSG on the substrate; removing at least apart of the BPSG layer to expose portions of the surface having the source implant; depositing and patterning a conductive layer over the surface of the substrate to form electrical contacts to the source regions.