Patent ID: 6037633
Filing Date: 2000-03-14
Classification: H01L

Abstract:
A semiconductor device comprising:a drain proper region of a first conductivity type formed in a semiconductor substrate;a base region of a second conductivity type extending into said semiconductor substrate from a first major surface of said semiconductor substrate to said drain proper region;a source region of the first conductivity type extending into said semiconductor substrate from said first major surface to said base region;a gate electrode insulated by a gate insulating film and formed in a groove extending into said semiconductor substrate from said first major surface and adjoining said base region and said source region;a drain electrode formed above said first major surface of said semiconductor substrate and connected with said base region and said source region;a low resistivity region formed under said drain proper region;a drain lead region extending into said semiconductor substrate from said first major surface to said low resistivity region and connecting said drain electrode and said low resistivity region; anda surge absorbing section comprising a nearby region of the second conductivity type formed near said drain lead region;wherein the sure absorbing section is formed in the drain proper region, and the nearby region is separated from the drain lead region by the drain proper region.