Patent ID: 9190431
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A method of fabricating a TFT array substrate, the method comprising the steps of: forming an active layer and a capacitor first electrode on a substrate; forming a gate insulating film on the substrate, the active layer and the capacitor first electrode; forming a gate electrode and a capacitor second electrode on the gate insulating film; sequentially forming an interlayer insulating film and a conductive film for forming a pixel electrode on the gate insulating film, the gate electrode, and the capacitor second electrode; forming contact holes which expose predetermined regions of the active layer by etching predetermined regions of the conductive film for forming the pixel electrode, the interlayer insulating film, and the gate insulating film; forming a conductive film for forming source and drain electrodes on the conductive film for forming the pixel electrode; forming a first photoresist pattern on the conductive film for forming the source and drain electrodes using a halftone mask; and forming the source and drain electrodes and the pixel electrode by etching the conductive film for forming the source and drain electrodes and the conductive film for forming the pixel electrode using the first photoresist pattern as an etch mask, wherein the gate electrode comprises a first gate electrode film, a second gate electrode film and a third gate electrode film stacked sequentially on the gate insulating film; and the step of forming the gate electrode and the capacitor second electrode on the gate insulating film comprises: