Patent ID: 8571053
Filing Date: 2013-10-29
Classification: H04L,H04N

Abstract:
1. A system for processing a plurality of packets, said system comprising: a first circuit configured to extract information regarding a first packet during a first packet time, the first circuit being further configured to process a portion of said first packet during said first packet time to generate a partially processed first packet by determining a format associated with the first packet, wherein the first circuit is configured to extract the information regarding the first packet based on the format of the first packet and writing the extracted information regarding the first packet to a memory, wherein the extracted information is written to said memory in a format that is independent of the format associated with the packet with which it is associated; and a second circuit configured to retrieve the extracted information and process said partially processed first packet based on said extracted information while the first circuit processes a portion of a second packet during a second packet time to generate a partially processed second packet, said second circuit being further configured to process the partially processed second packet while the first circuit processes a portion of a third packet during a third packet time to generate a partially processed third packet, said first, second, and third packets comprising audio and video data.