Patent ID: 7876146
Filing Date: 2011-01-25
Classification: H03K

Abstract:
1. An integrated circuit comprising: a low voltage power supply adapted to provide a low voltage potential; a high voltage power supply adapted to provide a high voltage potential, higher than the low voltage potential; a ground voltage power supply adapted to provide a ground voltage potential, lower than the low voltage potential; a digital circuit electrically coupled to receive the low voltage potential and the ground voltage potential; an analog circuit electrically coupled to receive the high voltage potential and the ground voltage potential; a power down circuit electrically coupled to the analog circuit and adapted to power down the analog circuit in response to a power down signal, wherein no portion of the power down circuit is disposed intermediate the high voltage power supply and the analog circuit; and a node protection circuit electrically coupled to the analog circuit, wherein each transistor in the node protection circuit is adapted to provide the low voltage potential to at least one node in the analog circuit in response to the power down signal.