Patent ID: 7394290
Filing Date: 2008-07-01
Classification: H03K

Abstract:
1. A semiconductor integrated circuit, comprising: a logic circuit connected between a first power line and a virtual ground line, the logic circuit including at least one NMOS transistor having a first threshold voltage and at least one PMOS transistor having a second threshold voltage; a first MOS transistor connected between the virtual ground line and a ground voltage line and having the first threshold voltage, the first MOS transistor applying a ground voltage to the virtual ground line in an active state; and a controller connected to the first MOS transistor to control a threshold voltage of the first MOS transistor, the controller applying the ground voltage to the first MOS transistor in the active state and applying a bulk voltage supplied from a bulk power line in a standby state, wherein the bulk voltage is different in power than the first power line.