Patent ID: 6192089
Filing Date: 2001-02-20
Classification: H03J

Abstract:
In a digital receiver that converts a broadcast input signal to a digital baseband signal, an automatic frequency control circuit for minimizing a frequency difference between a reference signal and the digital baseband signal, the automatic frequency control circuit comprising:a CORDIC vector rotation processor, receiving the digital baseband signal and receiving the reference signal, and performing a CORDIC computing technique to frequency shift the digital baseband signal using the reference signal, thereby generating a frequency shifted signal including a frequency shifted pilot tone;a pilot filter receiving and filtering the frequency shifted signal, leaving a frequency shifted pilot tone remaining;a CORDIC angle accumulation processor, coupled to the pilot filter, receiving the frequency shifted pilot tone and performing the CORDIC computing technique to generate an angle accumulated signal;a differentiator, coupled to the CORDIC angle accumulation processor, and receiving the angle accumulated signal and performing a differentiation on the angle accumulated signal to generate a differentiated signal;a first multiplier, coupled to the differentiator and receiving the differentiated signal and normalizing the differentiated signal by a first constant value to generate a normalized signal;a limiter, coupled to the first multiplier, receiving the normalized signal and scaling and clipping the normalized signal to generate a limited signal;a loop gain, coupled to the limiter and receiving the limited signal and scaling the limited signal to generate a scaled signal;a first integrator, coupled to the loop gain, the first integrator generating a frequency accumulated signal by performing a successive accumulation of a plurality of scaled signals;a second integrator, coupled to the first integrator, the second integrator generating a phase whose corresponding frequency converges on the frequency of the digital baseband signal by performing a successive accumulation of the frequency accumulated signal; anda second multiplier, coupled to the second integrator and receiving the phase and denormalizing the phase by a second constant value to generate the reference signal received by the CORDIC vector rotation processor.