Patent ID: 6380606
Filing Date: 2002-04-30
Classification: H01L

Abstract:
A semiconductor device manufactured by the method, comprising:forming a pad oxide layer over a semiconductor substrate to a thickness ranging from about 5 nm to about 25 nm; depositing a first stack-sublayer over the pad oxide layer at a deposition rate that ranges from about 0.5 nm per minute to about 1 nm per minute and in a zone of low pressure and at a temperature of about 800Â° C.; subsequently depositing a second stack-sublayer over said first stack-sublayer at a deposition rate that ranges from about 3 nm per minute to about 5 nm per minute in said zone of low pressure and at said temperature, said first and second stack-sublayers forming an isolation structure; and forming an oxide structure adjacent the isolation structure wherein the oxide structure has a bird's-beak length of less than 50 nm.