Patent ID: 8004876
Filing Date: 2011-08-23
Classification: B82Y,G11C,H01L

Abstract:
1. A computing system for implementing at least one electronic circuit with gain comprising: at least one two-dimensional molecular switch array, said molecular switch array formed by assembling two or more crossed planes of wires into a configuration of devices, said device comprising a junction formed by a pair of crossed wires where one wire crosses another and at least one connector species connecting said pair of crossed wires in said junction, said junction having a functional dimension in nanometers and at least one switching capability provided by both (1) at least one connector species and said pair of crossed wires and (2) a configurable nano-scale wire transistor having a first state that functions as a transistor and a second state that functions as a conducting semiconductor wire; and at least one of said devices on one of said molecular switch arrays is configured to implement at least one of said electronic circuits, wherein specific connections are made to interconnect said devices and to connect said devices to two structures that provide voltages equal to a desired signal level for a high voltage level and a low voltage level; wherein said nano-scale wire transistor comprises (a) a pair of crossed nanowires that form an intersection, one of said nanowires comprising a semiconductor material and another of said nanowires comprising either a metal or a second semiconductor material, and (b) a hot electron trap region associated with said intersection for controlling conductance of each associated transistor, thereby forming a configurable transistor or a switch memory bit that is capable of being set by application of a voltage that is larger in absolute magnitude than any voltage at which said transistor operates; wherein said hot electron trap region comprises a member selected from the group consisting of (1) a molecular species associated with said first wires and said second wires, (2) a dielectric layer on either said first wires, said second wires, or both, and (3) a dielectric layer above, below, or between said first wires and said second wires: wherein said hot electron trap region comprises a molecular species configured between said first wires and said second wires; wherein said molecular species comprises a molecule having the structure represented by I-M-I′, where M represents a conjugated moiety having a relatively smaller HOMO-LUMO value and where I and I′ represent an insulator portion of the molecule that is connected to said first wires and second wires, with I and I′ the same or different and having a relatively higher HOMO-LUMO value.