Patent ID: 6130967
Filing Date: 2000-10-10
Classification: G06T

Abstract:
An image processing apparatus comprising:(a) a host computer;(b) a plurality of field of view processors;(c) a system bus to connect the computer and the plurality of field of view processors;(d) an image disk interface connected to the system bus;(e) a means for acquiring an image connected to an image interface and image reformatter wherein the image interface is also connected to the system bus; and(f) a high speed image bus ring for connecting the plurality of field of view processors via the image interface and the image disk interface wherein the field of view processors perform multidimensional image processing, and wherein one of the field of view processors further comprises:(i) a first multiplier for multiplying a first image input signal by a first coefficient;(ii) a second multiplier for multiplying a second coefficient by a second image input signal;(iii) a third multiplier for multiplying a first constant by the first image input signal;(iv) a fourth multiplier for multiplying a second constant by the second image input signal; and(v) a first summer for summing the output of a first multiplier and a second multiplier and a first constant and a second summer for summing the output of the third multiplier and the fourth multiplier and a second constant.