Patent ID: 6185082
Filing Date: 2001-02-06
Classification: H02M

Abstract:
A protection circuit for a boost power converter comprising:a transistor connected in series between a ground of said boost power converter and a ground of a load, said transistor having a source terminal, a drain terminal and a gate terminal, wherein the source terminal of said transistor is connected to the ground of said boost power converter, and the drain terminal of said transistor is connected to the ground of the load; anda control circuit having a first output coupled to the gate terminal of said transistor so as to shut-off said transistor, a second output coupled to a PWM controller of said boost power converter for current limiting, a first input coupled to the input of said boost power converter for sensing the input voltage of said boost power converter, and a second input coupled to the drain terminal of said transistor to sense a voltage drop across said transistor, wherein said voltage drop is produced by the current of the load to be protected and an on-state resistance, Rds-on, of said transistor.