Patent ID: 8171204
Filing Date: 2012-05-01
Classification: G06F,Y02D

Abstract:
1. A Non-Volatile Memory Device (NVMD) comprising: a host-device interface for receiving commands from a host over a host bus; a bridge, coupled to the host-device interface, for converting requests from the host into concurrent requests; a traffic controller and dispatcher, coupled to the bridge, receiving the concurrent requests, for dispatching the concurrent requests over an internal bus; a plurality of NVMD branches, each NVMD branch coupled to the internal bus to receive one of the concurrent requests from the traffic controller and dispatcher; wherein each NVMD branch of the plurality of NVMD branches further comprises: wherein multiple NVMD branches are accessed concurrently in parallel by the concurrent requests; wherein the NVMD is a single chip integrated onto a single substrate of silicon; wherein the NVMD memory in each of the NVMD branches comprises: wherein each NVMD branch of the plurality of NVMD branches further comprises: wherein each of the plurality of flash channel interfaces is coupled to a NVMD memory; whereby multiple NVMD memory are coupled to each NVMD controller; wherein the NVMD controller further comprises: wherein the plurality NVMD memory include a reserved area for a plurality of first physical blocks and a plurality of second physical blocks, the first physical blocks referenced by a plurality of first special logical addresses while the second physical blocks referenced by a plurality of second special logical addresses; wherein the plurality of first physical blocks is configured for storing the PLTPPUI tracking table and the plurality of second physical blocks for storing the WL/BB tracking table; wherein the ACPUM is configured to keep one set, corresponding to a set number, from the PLTPPUI tracking table; wherein the PLTPPUI tracking table is configured to hold correlations between the first special logical addresses and the first physical blocks; whereby requests from the host are dispatched to multiple NVMD branches.