Patent ID: 7624261
Filing Date: 2009-11-24
Classification: G06F

Abstract:
1. A method of secure booting of an electronic apparatus that includes plural processors and an external shared memory that are linked by at least one communication bus, each processor having hardware elements and a stack of software elements that can execute on said hardware elements, the method comprising: a) securely booting of a first of said processors, up to but not including a software element corresponding to an operating system; b) protecting, by said first processor, a part of the shared memory, in such a way as to form a secure domain that includes said first processor and of said protected part of the shared memory; c) booting the operating system of said first processor, including storing data of said operating system in said protected part of the shared memory; d) securely booting a second of said processors, up to but not including a software element corresponding to an operating system; then e) authenticating the second processor with the first processor and vice versa, and, in case of successful authentications, f) extending the secure domain to the second processor, wherein said first processor provides to said second processor, a write-access entitlement to said protected part of the shared memory; then g) booting the operating system of said second processor, including storing data of said operating system of the second processor in said protected part of the shared memory.