Patent ID: 7489022
Filing Date: 2009-02-10
Classification: H01L

Abstract:
1. An electronic device, comprising: a die bond-pad; an integrated circuit chip coupled to said die bond-pad; a first lead coupled to said die bond-pad; a dielectric space defined by said first lead and said die bond-pad wherein said dielectric space extends from said first lead to a surface of said die bond-pad; a second lead coupled to said die bond-pad wherein said second lead is flush with the surface of said die bond-pad and wherein said second lead is configured to contact a circuit board and wherein first lead is configured to not contact said circuit board; a first wirebond coupling said integrated circuit chip to said first lead wherein said first lead is a capacitance lead configured to reduce and offset an amount of inductance created by said first wirebond; and a second wirebond coupling said first lead to said second lead wherein said second lead is a radio frequency input/output lead.