Patent ID: 7541271
Filing Date: 2009-06-02
Classification: H01L

Abstract:
1. A method, comprising: forming first and second structures with a space between them over a surface of a substrate, wherein the forming of first and second structures comprises forming first and second gate elements on a dielectric layer formed on the surface of the substrate, the respective first and second gate elements are part of respective first and second metal-oxide-semiconductor (MOS) transistors, and the forming of first and second gate elements comprises: forming a first cap of first material over an upper surface of the first structure; forming a second cap of first material over an upper surface of the second structure, the caps being separated from each other and extending over the space more near the upper surfaces than near the substrate; forming a layer of second material above the first cap of first material; forming a layer of second material above the second cap of first material, the layers extending over a portion of the first and second caps such that a space between the layers is greater than the space between the first and second caps and such that a portion of each of the first and second caps beneath the space between the layers is not overlain by the layers of second material, the first material and the second material being different materials; and forming a contact hole reaching the substrate.