Patent ID: 6175138
Filing Date: 2001-01-16
Classification: H01L,Y10S

Abstract:
A semiconductor memory device having a first and second bit lines and a word line, comprising:a first MIS transistor for driving, which has a first input electrode and a first output electrode and which has a first conductive type and a first threshold voltage;a second MIS transistor for driving, which has a second input electrode and a second output electrode and which has the first conductive type and the first threshold voltage, the first input electrode being connected to the second output electrode while the second input electrode being connected to the first output electrode;a third MIS transistor for selecting an address, which is connected between the first bit line and the first output electrode and which has a third input electrode and has a second conductive type and a second threshold voltage, the third input electrode being connected to the word line and the second conductive type being opposite to the first conductive type; anda fourth MIS transistor for selecting an address, which is connected between the second bit line and the second output electrode and which has a fourth input electrode and has the second conductive type and the second threshold voltage, the fourth input electrode being connected to the word line;the first threshold voltage exceeding the second threshold voltage.