Patent ID: 8853009
Filing Date: 2014-10-07
Classification: H01L

Abstract:
1. A method of manufacturing a reverse-blocking semiconductor element, comprising: a step of forming a main surface structure including a MOS gate structure on one main surface of a first-conduction-type semiconductor substrate; a step of forming a second-conduction-type collector layer on another main surface; and a step of forming a second-conduction-type separation layer, which connects the one main surface and the other main surface and is connected to the second-conduction-type collector layer on the other main surface, along a side surface of a tapered groove which is formed from the one main surface to the other main surface by etching in an outer circumference of the main surface structure, wherein, in the step of forming the second-conduction-type collector layer and the step of forming the second-conduction-type separation layer, second-conduction-type impurity element ions are implanted into the semiconductor substrate while the semiconductor substrate is maintained at a temperature of 400° C. or 500° C. and a laser annealing process and a furnace annealing process at a temperature of 350° C. or 500° C. are performed to form each of the second-conduction-type collector layer and the second-conduction-type separation layer.