Patent ID: 9048849
Filing Date: 2015-06-02
Classification: H03L

Abstract:
1. A phase locked loop comprising: a phase frequency detector comparing a reference frequency and a frequency of a signal corresponding to a clock signal to output a pulse signal in response to a difference between the reference frequency and the frequency of the signal; a charge pump controlling charge amount on the basis of the pulse signal; and a supply regulated voltage controlled oscillator outputting the clock signal in response to an input signal, the supply regulated voltage controlled oscillator comprising an operational amplifier used as a supply regulator, a negative feedback circuit connected to an output terminal of the operational amplifier and feeding an output signal of the operational amplifier back to an inverting input terminal of the operational amplifier, a notch filter connected between an output terminal of the charge pump and the inverting input terminal of the operational amplifier, and a supply controlled oscillator outputting the clock signal in response to the output signal of the operational amplifier, wherein an output of the charge pump is input to the inverting input terminal of the operational amplifier, wherein a reference voltage is input to a non-inverting input terminal of the operational amplifier, and wherein a capacitor is connected between the notch filter and the output terminal of the amplifier.