Patent ID: 7315073
Filing Date: 2008-01-01
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a first isolation region formed on the semiconductor substrate; a first element region isolated via the first isolation region; a first gate insulating film formed on the first element region; a first gate electrode formed on the first gate insulating film; a second isolation region formed on the semiconductor substrate; a second element region isolated via the second isolation region; a second gate insulating film formed on the second element region; a second gate electrode formed on the second gate insulating film; a first oxide film formed between the first isolation region and the first element region; and a second oxide film formed between the second isolation region and the second element region, wherein the first isolation region has a width narrower than the second isolation region, the first oxide film has a thickness thinner than the second oxide film, and the first gate electrode contacting with the first gate insulating film has a width narrower than the first element region contacting with the first gate insulating film in a channel width direction of the first element region.