Patent ID: 6174786
Filing Date: 2001-01-16
Classification: H01L

Abstract:
A method of shallow trench isolation in a semiconductor device, comprising the steps of:forming an oxide layer over a substrate;forming a mask layer over the oxide layer;anisotropically etching the mask layer and leaving at least a portion of the oxide layer to form an opening in the mask, the opening exposing the oxide layer in the mask opening and the width of the opening greater than the width of a trench;forming a cap layer in the opening over the mask opening;blanket etching the cap layer in a first etch step to form rounded end caps adjacent the mask opening on opposite ends of the opening, the distance between the end caps about equal to the width of the trench, wherein the blanket etch does not etch the substrate;plasma etching the substrate surface to form the trench in the substrate in a second etching step;whereby the rounding of the end caps is transferred to the top corners of the trench, concurrent with the trench etching step.