Patent ID: 7378743
Filing Date: 2008-05-27
Classification: H01L,H05K

Abstract:
1. A circuit board, suitable for being electrically connected to a chip package, wherein the chip package has a chip, a chip pad and a plurality of inner leads, and the chip pad and some of the inner leads are electrically connected to the chip via a plurality of bonding wires, the circuit board comprising: a patterned conductive layer with at least one first pad and at least one second pad, wherein the first pad has an extension part and is electrically connected to the chip pad, and the second pad is electrically connected to one end of at least one of the inner leads and the other end of the inner lead being electrically connected to the second pad has a projection at least partially overlapping the extension part on the patterned conductive layer, and therefore compensating for impedance mismatch caused by bonding wire inductance; and a first insulating layer, wherein the patterned conductive layer is disposed outside the first insulating layer.