Patent ID: 8859344
Filing Date: 2014-10-14
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor integrated circuit device, comprising steps of: (a) forming a MISFET over a semiconductor substrate; (b) forming a first interlayer insulating film over the semiconductor substrate in order to cover the MISFET; (c) forming a first plug and a second plug in the first interlayer insulating film; (d) forming a chalcogenide material film over the first interlayer insulating film and over the first plug such that a bottom surface of the chalcogenide material film is located over the first plug; (e) forming an electrode over the chalcogenide material film; (f) forming a protective film over the electrode, over the first interlayer insulating film and over the second plug in order to cover a side surface of the chalcogenide material film; (g) forming a second interlayer insulating film over the protective film; (h) forming a first contact hole and a second contact hole in the second interlayer insulating film and in the protective film, such that the first contact hole reaches the electrode and the second contact hole reaches the second plug; and (i) forming a third plug in the first contact hole, and forming a fourth plug in the second contact hole, wherein, in the step (h), the protective film is used for an etching stopper when the second interlayer insulating film is etched.