Patent ID: 9047179
Filing Date: 2015-06-02
Classification: G06F,G11C

Abstract:
1. A level placement method for q-level cells of solid-state memory, where q>2, the method comprising: controlling programming of groups of cells to respective levels of a predetermined plurality of programming levels; controlling reading of each programmed cell at a series of time instants to obtain a sequence of read metric values for that cell; processing the sequence of read metric values for the groups of cells programmed to each programming level to derive statistical data as a function of time for that level; processing said statistical data for each programming level to determine for that level at least one parameter of a model defining variation with time of the statistical data for programming levels; extrapolating the at least one parameter for the levels to define parameter variation as a function of level; and calculating, using a processor, from said parameter variation and said model a set of q programming levels which has a pre-determined property over time.