Patent ID: 6285222
Filing Date: 2001-09-04
Classification: H03K

Abstract:
A power-on reset circuit comprising:a line potential detection circuit havinga first line potential monitoring circuit which includes a first voltage dividing circuit connected between a power supply node and a ground node and which outputs a first monitor voltage,a second line potential monitoring circuit which includes a second voltage dividing circuit connected between a power supply node and a ground node and which outputs a second monitor voltage, anda comparison circuit which compares the first monitor voltage with the second monitor voltage;a pulse signal generation circuit which outputs a first pulse signal in response to the detection results output from said line potential detection circuit;a power-on reset circuit which has a setting circuit which brings a power-on reset signal to a set level in response to the first pulse signal and which produces the power-on reset signal upon sensing a rise in the potential of the power supply; anda delay circuit which receives the first pulse signal output from the pulse signal generation circuit and which outputs a second pulse signal by delaying the first pulse signal by a predetermined period of time; and whereinsaid power-on reset signal waveform generation circuit further includes a reset circuit which brings the power-on reset signal to a deactivation potential in response to the second pulse signal.