Patent ID: 6982478
Filing Date: 2006-01-03
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: providing a wiring substrate having a first thickness, the wiring substrate further having a substrate first surface and a substrate second surface opposed to the substrate first surface, the wiring substrate having a plurality of conductive lines formed on the substrate first surface and a through hole extending between the substrate first and second surfaces; providing a semiconductor IC chip having a second thickness that is smaller than the first thickness, the semiconductor IC chip further having a chip first surface, a chip second surface opposed to the chip first surface and a plurality of chip side surfaces extending between the chip first and second surfaces, the semiconductor IC chip including a plurality of bond pads formed on the chip first surface, wherein a size of the semiconductor IC chip is smaller than that of the through hole; supporting the semiconductor IC chip in the through hole so that a level of the substrate first surface is substantially equal to a level of the chip first surface; electrically connecting the bond pads with the conductive lines by a plurality of conductive members, respectively, while the supporting is maintained; coating the conductive members, the chip first surface, the chip side surfaces, the through hole and a part of the substrate first surface, with a sealing resin, while the supporting is maintained; and ceasing the supporting of the semiconductor IC chip so that the sealing resin is a substantially sole member for physically connecting the semiconductor IC chip with the wiring substrate.