Patent ID: 6369587
Filing Date: 2002-04-09
Classification: G01R

Abstract:
A pulse center detection circuit, comprising:a switch control signal generator for receiving a detected pulse and generating a first switch control signal, a second switch control signal, a third switch control signal, a fourth switch control signal, a fifth switch control signal and a sixth switch control signal according to the detected pulse, wherein the first switch control signal and the fourth switch control signal are complementary to each other and the second switch control signal and the third switch control signal are complementary to each other; a comparator for outputting a pulse center signal according to input signals imported through its positive input terminal and negative input terminal; a first controlled current source that has an input terminal connected to a voltage source and that has an output terminal connected to the negative input terminal of the comparator, wherein a switch state of the first controlled current source is controlled by the first switch control signal; a second controlled current source that has an input terminal connected to the negative input terminal of the comparator and has an output terminal connected to a ground voltage, wherein a switch state of the second controlled current source is controlled by the second switch control signal; a third controlled current source that has an input terminal connected to the voltage source and that has an output terminal connected to the positive input terminal of the comparator, wherein a switch state of the third controlled current source is controlled by the third switch control signal; a fourth controlled current source that has an input terminal connected to the positive input terminal of the comparator and that has an output terminal connected to the ground voltage, wherein a switch state of the fourth controlled current source is controlled by the fourth switch control signal; a first capacitor is connected from the negative input terminal of the comparator to the ground voltage; a second capacitor is connected from the positive input terminal of the comparator to the ground voltage; a first switch is connected from the negative input terminal of the comparator to a reset capacitor voltage source, wherein a switch state of the first switch is controlled by the fifth switch control signal; and a second switch is connected from the positive input terminal of the comparator to the reset capacitor voltage source, wherein a switch state of the second switch is controlled by the sixth switch control signal; when the switch control signal generator receives the detected pulse and the detected pulse increases, the switch control signal generator generates a half cycle of the second switch control signal, the fifth switch control signal, the fourth switch control signal and the sixth switch control signal at a high level in alternation during a rising-falling edge of each half cycle of the detected pulse.