Patent ID: 8294236
Filing Date: 2012-10-23
Classification: H01L

Abstract:
1. A semiconductor device having a first area and a second area, comprising: a silicon substrate; a first isolation structure including a silicon oxide film formed on a surface of said silicon substrate in said first area; a second isolation structure including said silicon oxide film formed on said surface of said silicon substrate in said second area; a third isolation structure including said silicon oxide film formed on said surface of said silicon substrate at a boundary between said first area and said second area; a first gate structure formed in an element area defined by said first isolation structure in said first area; a second gate structure formed in an element area defined by said second isolation structure in said second area; and a third gate structure formed on said third isolation structure, wherein a depth of said first isolation structure is smaller than a depth of said second isolation structure, and said third isolation structure has a first portion having a substantially same depth as said first isolation structure and a second portion having a substantially same depth as said second isolation structure.