Patent ID: 7067900
Filing Date: 2006-06-27
Classification: H01L

Abstract:
1. An insulated gate bipolar transistor comprising: a P-type collector region; an N-type buffer region which is formed on said P-type collector region; an N-type base region which is formed on said N-type buffer region and has an impurity concentration lower than that of said N-type buffer region; a P-type base region which is formed in a surface region of said N-type base region; and an N-type emitter region which is formed in a surface region of said P-type base region, wherein said N-type buffer region includes arsenic as an N-type impurity at an impurity concentration of equal to or greater than 5× wherein an impurity concentration of the N-type impurity in said N-type buffer region is higher than an impurity concentration of a P-type impurity in said P-type collector region.