Patent ID: 9190529
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first gate electrode layer; a first insulating film over the first gate electrode layer; an oxide semiconductor layer comprising a channel formation region and overlapping the first gate electrode layer with the first insulating film therebetween; a source electrode layer and a drain electrode layer over and electrically connected to the oxide semiconductor layer; a second insulating film over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween; a third gate electrode layer over the second insulating film and overlapping a first end portion of the oxide semiconductor layer; and a fourth gate electrode layer over the second insulating film and overlapping a second end portion of the oxide semiconductor layer that is opposite the first end portion; wherein the third gate electrode layer and the fourth gate electrode layer each extend in a direction that intersects with a channel length direction of the channel formation region.