Patent ID: 6208641
Filing Date: 2001-03-27
Classification: H04Q

Abstract:
A method for implementing switching in a switch in a digital telecommunications system, in accordance with which methodN incoming signals are input to the switch, each comprising successive one-bit time slots that form successive frames, each frame comprising K time slots,the contents of the time slots for the incoming signals are stored in a memory (SM) at a memory location determined by a write address in such a way that a word having the width of at least one bit is stored at one memory location,one word at a time is read out from the memory (SM), wherefrom the desired bit is selected for the outbound signal from the switch,characterized in thatthe incoming signals are distributed to X multiplexers (A.sub.1 . . . A.sub.x), each interleaving the incoming signals thereto into a single serial output signal (IN1 . . . INX), andwriting into memory is carried out by writing the contents of the time slots of the output signals into the same memory location having a width of at least X bits, the memory location changing from one time slot of the output signals of the multiplexers to another.