Patent ID: 8929121
Filing Date: 2015-01-06
Classification: G11C

Abstract:
1. An apparatus, comprising: a reference one time programmable (OTP) cell, wherein the reference OTP cell can generate a reference bias current in at least a programmed-on configuration; a current mirror coupled to an output of the reference OTP cell, wherein the current mirror includes at least two gate-coupled field effect transistors (FETs); a programmable OTP memory bit element (OTPMBE) coupled to an input of the current mirror; and a comparator having an input coupled to a node between the OTPMB and the current mirror, wherein the reference OTP cell and the OTPMBE are fabricated substantially simultaneously; wherein a long-term decay of the reference current of the reference OTP cell is substantially matched with a long-term decay of the reference current of the OTPMBE due at least in part to said substantially simultaneous fabrication.