Patent ID: 8415247
Filing Date: 2013-04-09
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: forming a first metal layer on a semiconductor substrate, the semiconductor substrate including a diffusion layer; forming an insulating layer having an opening on the first metal layer; forming a second metal layer on the first metal layer in the opening of the insulating layer; leaving the second metal layer and removing the insulating layer; removing partially the first metal layer using the second metal layer as a mask; covering an upper face and a side face of the second metal layer with a covering layer; forming a protective layer to protect the first metal layer and the second metal layer, the protective layer having an opening; removing the covering layer from the opening of the protective layer to make a space between the second metal layer and the protective layer; and forming an electrode interconnect including the first metal layer, the second metal layer, and the third metal layer by covering an exposed surface of the second metal layer of the space with a third metal layer, the third metal layer including a metal having an ionization tendency lower than that of the second metal layer.