Patent ID: 7355238
Filing Date: 2008-04-08
Classification: H01L,Y10S

Abstract:
1. A nonvolatile semiconductor memory device comprising: a source region and a drain region formed on a surface of a semiconductor substrate; a channel-forming region formed so as to connect the source region and the drain region or so as to be sandwiched between the source region and the drain region; a tunnel insulating film formed in contact with the channel-forming region; a charge retention layer formed adjacently to the tunnel insulating film; a gate insulating film formed adjacently to the charge retention layer; and a control gate formed adjacently to the gate insulating film, wherein the charge retention layer includes an insulating matrix having, per nonvolatile semiconductor memory device, one conductive nano-particle which is made of at least one single-element substance or chemical compound that functions as a floating gate and has a particle size of at most 5 nm, or including a plurality of conductive nano-particles of the same type independently dispersed with a density of from 10 wherein the conductive nanoparticles and the insulating matrix comprise a medium co-sputtered from a common target including both the insulating matrix and the substance of the conductive nanoparticles.