Patent ID: 6887651
Filing Date: 2005-05-03
Classification: G03F,H05K

Abstract:
1. A photolithography process for printed circuit board patterning, the printed circuit board being copper plated and including a set of copper plated outer layers and one or more copper plated through holes, comprising the steps of: electro-depositing a layer of photoresist onto the copper plated printed circuit board including the set of outer layers and the one or more plated through holes; exposing a circuit image onto the electro-deposited photoresist layer; developing and patterning the circuit image on the exposed electro-deposited photoresist layer; applying a layer of dry film resist on top of the developed electro-deposited photoresist layer disposed on the printed circuit board; and exposing said circuit image onto the dry film resist layer; and developing and patterning said circuit image on the exposed dry film resist layer.