Patent ID: 8859347
Filing Date: 2014-10-14
Classification: H01L

Abstract:
1. A method of fabricating an integrated circuit, the method comprising the steps of: forming an active device in an active layer of a semiconductor-on-insulator wafer; removing a substrate material from a substrate layer disposed on a back side of the semiconductor-on-insulator wafer; removing an insulator material from a back side of the semiconductor-on-insulator wafer to form an excavated insulator region; and depositing an electrically conductive layer on the excavated insulator region; wherein the depositing puts the electrically conductive layer in physical contact with a body of the active device in a first portion of the excavated insulator region, and couples the body to a contact, the contact being in a second detached portion of the excavated insulator region and being physically connected to another part of the active device.