Patent ID: 7849315
Filing Date: 2010-12-07
Classification: G01R

Abstract:
1. A method for managing operability of an on-chip debug capability in a product configured to execute software comprising: storing a first public component of a first trust anchor and a second public component of a second trust anchor in a memory of said product; appending a signature to said software; saving said software with said appended signature in said memory; detecting an enablement indicator for said on-chip debug capability at said product; validating, in response to said detecting operation, said signature appended to said software using said public component of said trust anchor; enabling said on-chip debug capability upon validation of said signature; determining a disablement indicator for said on-chip debug capability; verifying, in response to said determining operation, said signature appended to said software using said second public component of said second trust anchor; and disabling said on-chip debug capability upon verification of said signature.