Patent ID: 7309923
Filing Date: 2007-12-18
Classification: H01L

Abstract:
1. A non-volatile memory integrated circuit package, comprising: a leadframe having a plurality of electrically conductive leads, each lead including a lead finger having a hole for coupling one or more solder balls to the lead; a first memory-storage integrated circuit die having an active side and a non-active side, the active side of said first integrated circuit die having bonding pads that are electrically connected to the electrically conductive leads of said leadframe; a second memory-storage integrated circuit die having an active side and a non-active side, the active side of said second integrated circuit die having bonding pads that are electrically connected to the electrically conductive leads of said leadframe; a lower adhesive provided on the non-active side of said first integrated circuit die; and a third memory-storage integrated circuit die having an active side and a non-active side, the non-active side of said third integrated circuit die being affixed to the non-active side of said first integrated circuit die by said lower adhesive, and the active side of said third integrated circuit die having bonding pads that are electrically connected to the electrically conductive leads of said leadframe by wire bonds.