Patent ID: 6156643
Filing Date: 2000-12-05
Classification: H01L

Abstract:
A method of forming a dual damascene structure in a semiconductor device, comprising the steps of:etching a trench pattern in a mask layer that overlays a dielectric layer;depositing photoresist material on the mask layer after etching the trench pattern;patterning a via pattern in the photoresist material;etching the mask layer further in accordance with the via pattern;initially etching the dielectric layer to an approximate first predetermined depth through the mask layer in accordance with the via pattern in the photoresist material;removing the photoresist material on the mask layer; andetching the dielectric layer in accordance with the trench pattern etched in the mask layer to an approximate second predetermined depth and further etching the dielectric layer initially etched to the approximate first predetermined depth to an approximate third predetermined depth in accordance with the via pattern.