Patent ID: 8327058
Filing Date: 2012-12-04
Classification: G06F,Y02D

Abstract:
1. A method for routing data in a parallel Turbo decoder, wherein the parallel Turbo decoder comprises a plurality of processors and a plurality of memory banks, said method comprising: associating a memory bank with a processor; addressing a data item; and routing the addressed data item between the associated memory bank and the processor, wherein the processor is associated with the memory bank that is indexed according to a function of a position of the data item, wherein a memory bank index is the position of the data item divided by a length of an interleaver sub-block, wherein any remainder of the division is disregarded, wherein the data item is addressed according to a function of the position of the data item, wherein a data item address is the remainder of the division of the position of the data item by the length of the interleaver sub-block.