Patent ID: 6998713
Filing Date: 2006-02-14
Classification: H01L,H05K,Y10T

Abstract:
1. A semiconductor device comprising: a first wiring board; a second wiring board; and an amount of solder disposed between the first wiring board and the second wiring board, wherein each of the wiring boards comprises: a substrate; an insulation layer disposed on the substrate; and a wiring comprising a first layer of Cr or Ti, a second layer of Cu, and a third layer of Cr or Ti, wherein the first layer is disposed adjacent the insulation layer and the second layer is disposed between the first layer and the third layer, wherein the solder is in contact with a portion of the wiring on the first wiring board such that the solder is diffused into its second layer and through it to form an electrical contact with its first layer, wherein the second wiring board includes an opening formed through its substrate and through its insulation layer, wherein the solder is disposed in the opening of the substrate and the insulation layer of the second wiring board, the solder contacting a portion of the wiring of the second wiring board such that the solder is diffused into its second layer and through it to form an electrical contact with its third layer.