Patent ID: 9171886
Filing Date: 2015-10-27
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor memory device comprising: forming a plurality of switching transistors on a semiconductor substrate; embedding a conductive plug material between adjacent two of the switching transistors, and also depositing the material on an upper surface of the adjacent two switching transistor; depositing a first mask material on the plug material; processing the first mask material to leave the material on the plug material between the adjacent two switching transistors; forming a contact plug electrically connected to diffusion layers of the switching transistors by etching the plug material by using the first mask material as a mask; depositing an interlayer dielectric film in order to cover the contact plug after removing the first mask material; polishing the interlayer dielectric film until when an upper surface of the contact plug is exposed; depositing a material of a memory element storing data, on the contact plug; depositing a second mask material on the material of the memory element; processing the second mask material in order to have a plane area larger than a plane area of an upper surface of the contact plug; and forming the memory element having a bottom surface larger than an upper surface of the contact plug by etching a material of the memory element by using the second mask material as a mask.