Patent ID: 8416232
Filing Date: 2013-04-09
Classification: G09G

Abstract:
1. A liquid crystal display, comprising: a liquid crystal display panel including a plurality of data lines, an n-number of gate lines crossing the data lines, a plurality of TFTs connected to the crossings of the data lines and the gate lines, and liquid crystal cells connected to the TFTs and arranged in an m×n matrix, wherein the m and n are natural numbers; a data driving circuit that converts digital video data into positive/negative data voltages to be supplied to the data lines in response to a vertical polarity control signal and adjusts the horizontal polarity inversion cycle of the positive/negative data voltages in response to a horizontal polarity control signal; and a timing controller that generates the vertical polarity control signal and the horizontal polarity control signal, adds a frame rate control (FRC) correction value to input digital video data to supply the input digital video data to the data driving circuit, detects a predetermined weak pattern from the input digital video data and, when data having the weak pattern is detected, changes either the logic inversion cycle of the vertical polarity control signal or the logic of the horizontal polarity control signal and changes the position of the data to which the FRC correction value is added, wherein the weak pattern data includes data having a first weak pattern in which white data and black data alternate in vertical and horizontal directions, respectively, of the liquid crystal display panel; and data having a second weak pattern in which the white data and the black data form a stripe pattern, and wherein the timing controller comprises: a bit expansion unit that expands the number of bits of i-bit digital video data, i being a natural number of 6 or more; a FRC processing unit that adds the FRC correction value to the MSB i-j bits data in the digital video data expanded by the bit expansion unit to supply j-bit digital video data to the data driving circuit, j being a natural number less than i; an image analysis unit that detects first and second weak pattern data by analyzing the input digital video data; a first selection unit that receives first to third FRC patterns designated with different positions of the data to which the FRC correction value is added, and, under the control of the image analysis unit, supplies the first FRC pattern to the FRC processing unit upon receipt of data other than the weak pattern data, supplies the second FRC pattern to the FRC processing unit upon receipt of the first weak pattern data, and supplies the third FRC pattern to the FRC processing unit upon receipt of the second weak pattern data.