Patent ID: 6762001
Filing Date: 2004-07-13
Classification: G03F

Abstract:
A method of fabricating an exposure mask for semiconductor manufacture comprising the steps of:forming a chrome layer, a first photo resist, an Ag layer as a conductive layer and a second photo resist on a transparent quartz substrate, in sequence; forming a second photo resist pattern by exposing and developing the second photo resist; forming a conductive layer pattern by etching the conductive layer using the second photo resist pattern as an etch barrier; removing the second photo resist pattern; forming an oxide layer as a layer for shielding light at a surface of the conductive layer pattern by oxidizing the conductive layer pattern; exposing the first photo resist using the conductive layer pattern having the oxide layer at the surface thereof; forming a first photo resist pattern exposing a part of the chrome layer by developing the exposed first photo resist; forming a mask pattern including the chrome layer by selectively etching the exposed chrome layer part; and removing the conductive layer pattern including the oxide layer and the first photo resist pattern.