Patent ID: 8026162
Filing Date: 2011-09-27
Classification: H01L

Abstract:
1. A method for manufacturing a layer-stacked wiring comprising a microcrystalline silicon thin film and a metal thin film formed on said microcrystalline silicon thin film, said method comprising: a microcrystalline silicon thin film forming process to form a portion corresponding to a desired film thickness of said microcrystalline silicon thin film on an insulating substrate at a deposition rate that does not degrade, at least, quality of a thin film of said microcrystalline silicon thin film; a metal thin film forming process to form said metal thin film on said microcrystalline silicon thin film; and a heat treatment process to perform heat treatment on said insulating substrate formed on said microcrystalline silicon thin film and said metal thin film, wherein, in said microcrystalline silicon thin film forming process, a portion corresponding to a desired film thickness of said microcrystalline silicon thin film at a deposition rate combined with a deposition rate that degrades quality of a thin film of said microcrystalline silicon thin film.