Patent ID: 6671664
Filing Date: 2003-12-30
Classification: G06F

Abstract:
A method for generating random programs for use during a design or a verification process to test a processor, the method, comprising:determining a plurality of data locations, wherein each data location of the plurality of data locations has an unassigned initial content; assigning an initial content to one or more data locations of the plurality of data locations, the assignment occurring once; and processing a plurality of instructions, one instruction at a time, in a program execution order, until a desired random program length is achieved, wherein the processing provides the one or more of the data locations with current contents, and wherein the processing, comprises: computing a current content of each of the plurality of data locations, wherein the current content depends on functions of previously processed instructions, and wherein the current content may be unknown when the current content depends on an unassigned initial content of one or more data locations; generating a random instruction, if a current content of a data location consumed by the random instruction depends on an unassigned initial content of at least one data location, assigning the initial content to the at least one data location that optimizes an effectiveness of the random instruction, and assigning an instruction opcode to an initial content of a pointed to data location.