Patent ID: 9170980
Filing Date: 2015-10-27
Classification: G06F,H01L

Abstract:
1. A system, comprising: a processor chip configured to include a first ground-referenced single-ended signaling (GRS) interface circuit, the first GRS interface circuit comprising: a first GRS driver circuit configured to: a second GRS driver circuit, configured to: a receiver circuit, configured translate a GRS input signal to a corresponding logic signal; a system functions chip configured to include a second GRS interface circuit and a host interface; a multi-chip module (MCM) package configured to include the processor chip and the system functions chip; a first set of electrical traces manufactured within the MCM package and configured to couple the first GRS interface circuit to the second GRS interface circuit, wherein the first set of electrical traces comprise the GRS input signal, the output signal, and the ground network; and a second set of electrical traces manufactured within the MCM package and configured to couple the host interface to at least one external pin of the MCM package, wherein the first GRS interface circuit is a primary communications interface between the processor chip and the system functions chip.