Patent ID: 6455410
Filing Date: 2002-09-24
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising:forming a first conductive region; forming an interlayer insulation layer on said first conductive region; opening a contact hole which has a recessed region wherein the side walls are recessed in the middle area and which pierces through said interlayer insulation layer and reaches said first conductive region; forming a resist film within said contact hole and on the upper surface of said interlayer insulation layer; exposing the recessed region for removing said resist film and part of said interlayer insulation layer located on the upper surface of said interlayer insulation layer so that said recessed region within said contact hole is exposed; removing the resist film of which the residue remains within said contact hole; forming a wiring plug within said contact hole; and forming a second wiring region connected to said wiring plug on the upper surface of said interlayer insulation layer.