Patent ID: 6012136
Filing Date: 2000-01-04
Classification: H04L

Abstract:
A communications system with a configurable data transfer architecture, the communications system comprising:a data flow processor (DFP);a micro-controller unit (MCU) coupled to the DFP, wherein the MCU controls operations in the communications system;a digital signal processor (DSP) coupled to the DFP, wherein the DSP performs digital signal processing functions and executive functions in the communications system;a memory coupled to the DFP and to the DSP, wherein the memory stores data used by the DSP and the MCU, wherein the DFP selectively allows access to the memory by the MCU;wherein the DFP provides an interface between the MCU, the DSP, and the memory, wherein the MCU and the DSP are operable to communicate with each other and the memory through the DFP, wherein the DFP is programmable to perform data transfers between two or more of the MCU, the DSP, and the memory;wherein the MCU is operable to program the DFP to perform data transfers between two or more of the MCU, the DSP, and the memory;wherein the MCU is operable to transfer a task list to the memory, wherein the task list comprises tasks to be executed by the DSP;wherein the DSP executes the tasks in the task list and the DFP performs data transfers to perform communication functions in the communications system.