Patent ID: 6683377
Filing Date: 2004-01-27
Classification: H01L

Abstract:
A chip package comprising:a substrate having an outer first side and an outer second side opposite the first side, wherein the second side includes a metallization layer, but the first side is devoid of metallization; a first chip and a second chip each having a first surface with bond pads thereon and an opposite second surface wherein the respective first surfaces of the first card second chips are adhesively coupled to the first side of the substrate, the respective second surfaces of the first and second chips face each other, and the substrate includes at least one bend; a plurality of bond wires, wherein some of the bond wires extend through an aperture of the substrate and electrically couple the bond pads of the first chip to the metallization layer of the second side of the substrate, and some of said bond wires extend through an aperture of the substrate and electrically couple the bond pads of the second chip to the metallization layer of the second side of the substrate; and an adhesive insulative encapsulant filling the apertures and covering the bond wires.