Patent ID: 9069546
Filing Date: 2015-06-30
Classification: G06F

Abstract:
1. A method for counting mappings of logical registers to physical registers in a processor for instruction executions by a mapper unit of the processor, comprising: assigning, using a computer system, a particular counter from among a plurality of counters currently in a counter free pool to count a number of mappings of logical registers from among a plurality of logical registers to a particular physical register from among a plurality of physical registers, responsive to an execution of an instruction by a mapper unit mapping a second logical register from among the plurality of logical registers to the particular physical register, wherein a first logical register from among the plurality of logical registers is currently mapped to the particular physical register; and the computer system, responsive to the counted number of mappings of logical registers to the particular physical register decremented to less than a minimum value, returning the particular counter to the counter free pool.