Patent ID: 8497705
Filing Date: 2013-07-30
Classification: G11C

Abstract:
1. An apparatus, comprising: a programmable logic device having logic blocks, configurable interconnections coupling interconnects of the logic blocks, and programming circuitry of the configurable interconnections, wherein the configurable interconnections include: a plurality of phase change elements, each phase change element in the plurality coupling a first interconnect and a second interconnect of the logic blocks; grounding transistors electrically coupled to the interconnects of the logic blocks, the grounding transistors electrically isolating the interconnects from the programming circuitry, wherein the grounding transistors are turned on by programming bit lines of the programming circuitry; wherein, each phase change element in the plurality of phase change elements including: an amorphous region connected to a heater to receive pulses from the programming circuitry via a path distinct from the first interconnect and the second interconnect, wherein the amorphous region electrically isolates the heater from the first interconnect and the second interconnect.