Patent ID: 9159566
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A method comprising: forming an NMOS transistor on a substrate, wherein the substrate further comprises a PMOS transistor disposed thereon, wherein the NMOS transistor comprises a first channel, a first gate structure disposed on the first channel, and first sidewall spacers adjacent the first gate structure; forming a stressor over the first gate and the first sidewall spacers wherein the stressor comprises a tensile layer; removing a portion of the stressor from over the gate structure and leaving a portion of the stressor on the spacers; forming a first trench in the first gate structure after removing the portion of the stressor from the over the gate structure; forming a first high-k gate dielectric in the first trench; forming an n-type work function material on the first high-k gate dielectric disposed in the first trench; and forming a first metal gate electrode over the n-type work function material.