Patent ID: 6759340
Filing Date: 2004-07-06
Classification: H01L

Abstract:
A method of etching a trench in silicon overlying a dielectric material, which reduces notching at a silicon-dielectric interface, wherein the method includes:a) etching a first portion, which is at least 50%, of a desired nominal trench depth by alternatingly performing the following steps, i) an etching step comprising exposing the silicon, through a patterned masking layer, to a plasma generated from a fluorine-containing gas, and ii) a polymer deposition step comprising exposing the silicon to a plasma generated from a gas which is capable of forming a polymer on etched silicon surfaces; and b) etching at least the final 10% of said trench to said desired nominal depth by exposing said silicon to a plasma generated from a combination of a fluorine-containing gas and a polymer-forming gas.