Patent ID: 6864543
Filing Date: 2005-03-08
Classification: H01L,H02M

Abstract:
1. A semiconductor device comprising: a single crystalline semiconductor substrate of a first conductivity type; a first epitaxial semiconductor layer of a second conductivity type grown on the single crystalline semiconductor substrate; a second epitaxial semiconductor layer of the second conductivity type stacked on the first epitaxial semiconductor layer; a well region of the first conductivity type formed in the second epitaxial semiconductor layer; a buried layer of the first conductivity type abutting on a bottom of the well region of the first conductivity type; and an MOS transistor formed in the well region of the first conductivity type, wherein the MOS transistor comprises a first source layer of high impurity concentration, a first drain layer of high impurity concentration and a second source layer or a second drain layer of low impurity concentration extending deeper than the first source layer of high impurity concentration and the first drain layer of high impurity concentration.