Patent ID: 7670888
Filing Date: 2010-03-02
Classification: H01L

Abstract:
1. A method of forming a junction field effect transistor (JFET) in a semiconductor substrate, comprising: forming a buried layer having a first electrical conductivity type in the semiconductor substrate; forming an epitaxial layer having a second electrical conductivity type over the semiconductor substrate and over the buried layer; forming first well regions having the first electrical conductivity type in the epitaxial layer down to the buried layer; forming a second well region having the second electrical conductivity type within the epitaxial layer between the first well regions; forming isolation regions in the surface of the epitaxial layer to electrically isolate different active areas from one another; forming a first threshold voltage region having the first electrical conductivity type in the second well region within a first active area between first and second adjacent ones of the isolation regions; forming a second threshold voltage region having the second electrical conductivity type in the first threshold voltage region, the first threshold voltage region formed deeper than the second threshold voltage region; and forming a source region and a drain region having the first electrical conductivity type in a spaced apart relationship in the first threshold voltage region.