Patent ID: 7157796
Filing Date: 2007-01-02
Classification: H01L

Abstract:
1. A semiconductor device including and packaging a semiconductor having an electronic circuit formed therein and used when mounted on a board, comprising: a substrate; an insulation layer formed of a plurality of resin layers stacked on the substrate on a region other than an outer circumferential portion of the substrate; a plurality of wiring layers formed to be electrically connected to the electronic circuit and respectively buried in at least one of the plurality of resin layers forming said insulation layers; an insulating buffer layer formed on an uppermost one of the plurality of resin layers forming the insulation layer on a region not exceeding a formation region of the resin layer formed with the largest area among the plurality of the resin layers, and for buffering a stress which is generated when mounted on the board; a conductive post formed through the insulating buffer layer to be electrically connected to the wiring layer; and a projecting electrode formed projecting from a surface of the insulating buffer layer to be electrically connected to the conductive post.