Patent ID: 7936575
Filing Date: 2011-05-03
Classification: H02M,Y02B

Abstract:
1. A method for controlling a synchronous rectifier (SR), comprising: providing an SR transistor having a source terminal, a drain terminal and a gate terminal, wherein a drain to source current conduction path of the SR transistor is coupled between a secondary coil of a transformer and a first voltage output terminal, a second voltage output terminal is coupled to the secondary coil, and an output capacitor is coupled across first and second voltage output terminals; monitoring a drain to source voltage across the SR transistor; determining a secondary current conduction time based on monitoring the drain to source voltage; monitoring a primary switching period of a source coupled to a primary coil, the primary coil magnetically coupled to the secondary coil; determining a ratio of a secondary conduction time to the primary switching period; comparing the ratio to a first predetermined threshold; and disabling the SR transistor if the predetermined threshold is greater than the ratio.