Patent ID: 6249036
Filing Date: 2001-06-19
Classification: G03F,H01L

Abstract:
A semiconductor dual mask set apparatus for preserving alignment marker integrity while forming dual field oxide regions on a semiconductor substrate, said apparatus comprising:a. a first mask member disposed on said semiconductor substrate comprising:a primary first mask member portion for patterning at least one first field oxide region, anda secondary first mask member portion for patterning at least one alignment marker region,whereby said primary first mask member portion facilitates formation of saidat least one first field oxide region on a core region of a semiconductor substrate, andwhereby said secondary first mask member portion facilitates formation of saidat least one alignment marker; andb. a second mask member disposed on said semiconductor substrate comprising:a corresponding primary second mask member portion for patterning at least one second field oxide region, anda corresponding secondary second mask member portion for covering and preserving said at least one formed alignment marker,whereby said corresponding primary second mask member portion facilitates formation of said at least one second field oxide region on a peripheral region of said semiconductor substrate, andwhereby said corresponding secondary second mask member portion covers and preserves said at least one alignment marker during formation of said at least one second field oxide region.