Patent ID: 6418056
Filing Date: 2002-07-09
Classification: G11C

Abstract:
A method for protecting a EEPROM when power supply voltage source voltage drops below a predetermined level comprising the steps of;connecting a {overscore (RESET)} terminal of the EEPROM to an under voltage lockout circuit {overscore (RESET)} terminal; providing a reference voltage; comparing the power supply voltage source voltage to the reference voltage; switching a comparator output when the power supply voltage source voltage drops to the predetermined value; switching an under voltage lockout {overscore (RESET)} voltage to a value which prevents reading or reprogramming of said EEPROM when said power supply voltage source voltage is below the predetermined level; and holding said under voltage lockout {overscore (RESET)} voltage at a constant value from when power supply voltage source voltage equals 0 to the point where said step of switching of the comparator output occurs.