Patent ID: 9121913
Filing Date: 2015-09-01
Classification: G01R,H02P

Abstract:
1. A system for detecting a fault associated with an inverter or a machine associated with the inverter, the system comprising: a direct current bus having a positive terminal and a negative terminal; an inverter comprising a first pair of semiconductor devices with switched terminals that are coupled in series between the positive terminal and the negative terminal of the direct current bus; an analog interface for adjusting a measured voltage level, at measurement nodes associated with base or gate control terminals of the semiconductor devices, to an adjusted voltage level; an analog-to-digital converter having analog inputs for receiving the adjusted voltage level of the measurement nodes and outputting corresponding digital count data; and a data processor for detecting the fault in the inverter if the digital count data does not conform to one or more reference ranges stored in a data storage device for corresponding switch states of the semiconductor devices, or for detecting the absence of fault in the inverter if the digital data count conforms to one or more reference ranges stored in the data storage device for corresponding switch states of the semiconductor devices.