Patent ID: 8446010
Filing Date: 2013-05-21
Classification: G02F,H01L

Abstract:
1. A multilayer wiring comprising: a plurality of insulating layers each having a connection hole; a plurality of conductive layers; and a substrate having the plurality of insulating layers and the plurality of conductive layers alternately laminated on a main face of the substrate, wherein the multilayer wiring includes: a first conductor positioned in a (n+1)th conductive layer laminated on the substrate; a second conductor positioned in a (n+2)th conductive layer laminated on the substrate, electrically connected to a conductor in a layer below the (n+1)th conductive layer through at least a first connection hole in a (n+1)th insulating layer directly below the (n+2)th conductive layer, and positioned so as not to overlap with the first conductor in a plan view of the main face of the substrate; and a third conductor positioned in a (n+3)th conductive layer laminated on the substrate, electrically connected to a second conductor through a second connection hole in a (n+2)th insulating layer directly below the (n+3)th conductive layer, and positioned on the second connection hole toward the first conductor, the second connection hole overlapping with the first connection hole in a plan view of the main face of the substrate, n referring to an arbitrary natural number; which further comprises a fourth conductor positioned in a (n+4)th conductive layer laminated on the substrate and electrically connected to the third conductor through a third connection hole that is formed in a (n+3)th insulating layer directly below the (n+4)th conductive layer and is positioned closer to the first conductor than the second connection hole is in a plan view of the main face of the substrate.