Patent ID: 8281276
Filing Date: 2012-10-02
Classification: G06F

Abstract:
1. A computer-assisted method to be executed by a computer comprising a processor for manufacturing a semiconductor integrated circuit, the method comprising: generating, by the processor, first data by performing floor planning of the semiconductor integrated circuit based on semiconductor integrated circuit information and monitor path circuit information; generating second data by arranging at least one monitor path flip-flop and at least one monitor path circuit element in the first data based on monitor path position information; generating third data by performing arrangement or wiring based on the second data; generating a first timing analysis result by performing a timing analysis on data corresponding to the semiconductor integrated circuit information of the third data; generating a second timing analysis result by performing a timing analysis on data corresponding to the monitor path circuit information of the third data; modifying the semiconductor integrated circuit information by comparing the first timing analysis result with the second timing analysis result; and manufacturing the semiconductor integrated circuit based on the modified semiconductor integrated circuit information.