Patent ID: 6664589
Filing Date: 2003-12-16
Classification: G11C,H01L

Abstract:
A PMOS transistor, comprising:a first source/drain region; a second source/drain region, wherein the first and the second source/drain region include source/drain regions having a large work function greater than 4.1 eV; a channel located between the first and the second source/drain regions; a gate opposing the channel, wherein the gate includes a p-type polycrystalline semiconductor gate having a large work function greater than 4.1 eV; a gate insulator separating the gate from the channel, the gate insulator having a thickness less than 20 Angstroms, wherein the large work function of the source/drain regions and of the gate provide larger tunneling barriers such that a primary tunneling mechanism is direct band to band tunneling rather than Fowler-Nordhiem (F-N) tunneling.