Patent ID: 6433635
Filing Date: 2002-08-13
Classification: H03F

Abstract:
An amplifier comprising:a first operational amplifier for receiving an input signal; a power buffer connecting respective drains of a first P-channel MOS transistor and a first N-channel MOS transistor and providing an output terminal at a connection point for connecting the first P-channel MOS transistor and the first N-channel MOS transistor; a second P-channel MOS transistor having a temperature characteristic the same as a temperature characteristic of the first P-channel MOS transistor; a second N-channel MOS transistor having a temperature characteristic the same as a temperature characteristic of the first N-channel MOS transistor; a second operational amplifier for receiving a voltage based on a voltage between a source and a drain of the second P-channel MOS transistor at a positive phase input terminal thereof, receiving an output signal of the first operational amplifier at a negative input terminal thereof, generating an output signal constituting a potential center of a voltage waveform by a potential lowered from a potential of a source of the first P-channel MOS transistor by an amount in correspondence with the voltage between the source and the drain of the second P-channel MOS transistor and driving the first P-channel MOS transistor by the output signal; and a third operational amplifier receiving a voltage based on a voltage between a source and a drain of the second N-channel MOS transistor at a positive input terminal thereof, receiving the output signal from the first operational amplifier at a negative phase input terminal thereof, generating an output signal constituting a potential center of a voltage waveform higher than a potential of a source of the first N-channel MOS transistor by an amount in correspondence with the voltage between the source and the drain of the second N-channel MOS transistor and driving the first N-channel MOS transistor by the output signal.