Patent ID: 9129830
Filing Date: 2015-09-08
Classification: G11C,H01L

Abstract:
1. A semiconductor memory device, comprising: first conductive lines extending along a first direction; second conductive lines extending along the first direction in parallel with the first conductive lines and disposed vertically higher, with respect to a vertical direction perpendicular to the first direction, than the first conductive lines, such that each of the second conductive lines is offset from a corresponding one of the first conductive lines in a second direction perpendicular to the first direction and the vertical direction such that no gap exists between adjacent first and second conductive lines in the second direction; a third conductive line extending along the second direction to cross the first and second conductive lines to form intersections therewith and disposed vertically higher than the second conductive lines; and first single memory cells and second single memory cells formed, respectively, by intersections between the first conductive lines and the third conductive line and by intersections between the second conductive lines and the third conductive line.