Patent ID: 7560349
Filing Date: 2009-07-14
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: forming a tunnel dielectric layer on a substrate forming a first conductive layer on the tunnel dielectric layer; removing a native oxide layer from the first conductive layer; nitriding a surface of the first conductive layer to alter the surface into a nitride layer; forming a composite dielectric layer on the nitride layer, the composite dielectric layer having at least a first dielectric layer and a second dielectric layer on the first dielectric layer, the second dielectric layer including a material having a higher crystalline temperature than the first dielectric layer; forming a second conductive layer on the composite dielectric layer; and patterning the second conductive layer, the composite dielectric layer, the nitride layer, the first conductive layer and the tunnel dielectric layer to form a gate structure including a control gate electrode, a composite dielectric layer pattern, a nitride layer pattern, a floating gate electrode and a tunnel dielectric layer pattern.