Patent ID: 6984548
Filing Date: 2006-01-10
Classification: G11C

Abstract:
1. A method for manufacturing a nonvolatile memory including a plurality of memory cells programmable by a heat induced chemical reaction, said method comprising the steps of: forming a multilayer stack on a surface of a substrate, said multilayer stack including a first conductor layer for formation of a plurality of bit lines, a layer or layers for formation of a plurality of selecting elements each for a respective one of said plurality of memory cells, a barrier layer, and at least two base materials for formation of a plurality of storage cells capable of being programmed by said heat induced chemical reaction; etching first gaps into said multilayer stack to reach said surface of a substrate in a first pattern to define said plurality of bit lines in a first direction and a plurality of remaining stack lines each on one of said plurality of bit lines; filling a first insulator in said first gaps; depositing a second conductor layer over said plurality of remaining stack lines and said first insulator for formation of a plurality of word lines; etching second gaps into said second conductor layer, said plurality of remaining stack lines, and said first insulator to reach a surface of said first conductor layer in a second pattern to define said plurality of word lines in a second direction to thereby form a plurality of intersections in an array between said plurality of word lines and bit lines with each of said plurality of memory cells thus formed at one of said plurality of intersections; and filling a second insulator in said second gaps to form a memory array including said plurality of memory cells.