Patent ID: 6603204
Filing Date: 2003-08-05
Classification: H01L

Abstract:
An interconnect structure comprising:a substrate having a patterned multilayer of dielectrics located thereon, said patterned multilayer of dielectrics including first and second porous low-k dielectrics which are directly separated from each other by a buried etch stop layer, said first and second porous low-k dielectrics having a first composition, and said buried etch stop layer is selected from the group consisting of an inorganic dielectric, an inorganic/organic hybrid dielectric, and an organic dielectric with the proviso that when the buried etch stop layer is an inorganic material then the first and second porous low-k dielectrics are organic dielectrics, and when the buried etch stop layer is an organic material then the first and second porous low-k dielectrics are inorganic dielectrics, said first composition and said buried etch stop layer are selected to provide an etch selectivity of at least 10:1 or greater; a polish stop layer atop said patterned multilayer of dielectrics over said second porous low-k dielectric; and a metal conductor comprising at least one line and at least one via located within said patterned multilayer of dielectrics, wherein said at least one line is located in said second porous low-k dielectric and said at least one via is located in said first porous low-k dielectric.