Patent ID: 9029234
Filing Date: 2015-05-12
Classification: H01L

Abstract:
1. A method for forming a three-dimensional (3D) wafer to wafer stack implemented on a computer controlled wafer stacking apparatus, said method comprising: providing, in said computer controlled wafer stacking apparatus, a plurality of wafers in a stack, each wafer having N chips, N is a defined value greater than 1, and I/O pads having fixed position around the symmetric boundaries of each chip; placing a next wafer in proximity to a previous wafer in the stack; positioning the next wafer in a defined number of orientations relative to the previous wafer in the stack; providing orientation code for each of the defined number of orientation for said next wafer; selecting an orientation code for the next wafer; storing the orientation code, so selected, for said next wafer; and bonding the next wafer to the existing stack in an orientation maximizing alignment of good chips on said next wafer to good chips on the previous wafer in the stack; wherein the code is used to reroute signals from a pad on the next wafer that has been located due to rotation of said next wafer.