Patent ID: 7985648
Filing Date: 2011-07-26
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor memory device, comprising steps of: (a) forming a gate insulating film on a semiconductor substrate and forming a resist having plural linear opening parts on said gate insulating film; (b) removing said gate insulating film in a linear pattern by an etching employing said resist as a mask; (c) forming a linear diffusion bit line in a semiconductor substrate by an ion implantation employing said resist as a mask; (d) forming a linear third insulating film on an upper part of said diffusion bit line; (e) forming plural linear word lines running at right angles to said diffusion bit line and having a first insulating film in its upper surface and a second insulating film in its side surface on said gate insulating film and said third insulating film; (f) forming an interlayer insulating film on said word lines; (g) forming a linear trench on an upper side of said diffusion bit line in said interlayer insulating film, removing said third insulating film between said word lines in said trench and exposing said diffusion bit line; and (h) forming a linear metal bit line in said trench by filling up said trench with a predetermined metal.