Patent ID: 7833870
Filing Date: 2010-11-16
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising: forming a recess in a semiconductor substrate; filling the recess with a first conductive layer; forming a pair of stack structures over a landing plug contact region of the semiconductor substrate on opposite sides of the recess, wherein each stack structure comprises a second conductive layer and a first insulation layer, wherein the first insulation layer is formed after the filling of the recess with a first conductive layer; forming a spacer on sidewalls of each stack structure; forming a third conductive layer between the stack structures to form a first gate electrode, wherein the first gate electrode comprises the first conductive layer and the third conductive layer; forming a conductive layer for a second gate electrode and an insulation layer for a gate hard mask over the third conductive layer and the stack structures; and patterning the insulation layer for the gate hard mask and the conductive layer for the second gate electrode using a gate mask.