Patent ID: 6103589
Filing Date: 2000-08-15
Classification: H01L

Abstract:
A method for fabricating high-voltage device substrate, comprising the steps of:sequentially forming a pad oxide layer and a mask layer over a substrate;patterning the mask layer and the pad oxide layer to expose a first region in the substrate where oxidation is to be formed later;performing a thermal oxidation whereby the first region is oxidized into a first oxide layer;removing the mask layer and then performing a first ion implantation, thus forming a first ion doped region in the substrate underneath the pad oxide layer;removing the first oxide layer so that the first region previously covered by the first oxide layer is exposed;forming a patterned photoresist layer over the substrate to cover the first ion doped region, whereby a portion of the first region is still exposed;performing a second ion implantation to form a second ion doped region in the substrate at the exposed portion of the first region, wherein the second ion doped region is not overlapping with the first ion doped region;removing the patterned photoresist layer and then forming a conformal second oxide layer over the substrate;performing a thermal drive-in, which also induces oxidation reaction between the conformal second oxide layer and the substrate, whereby a conformal third oxide layer is formed over the substrate and is thicker than the conformal second oxide layer;removing the conformal third oxide layer that covers the substrate surface; andforming an epitaxial layer over the substrate.