Patent ID: 6818922
Filing Date: 2004-11-16
Classification: H01L

Abstract:
A thin film transistor array and driving circuit structure fabricated on a substrate, comprising:a plurality of scanning lines over the substrate; a plurality of signaling lines over the substrate; a plurality of thin film transistors supported over the substrate, wherein the thin film transistors are driven by the scanning lines and the signaling lines and each thin film transistor having: a polysilicon layer; a source/drain terminal over the polysilicon layer; a doped thin film between the polysilicon layer and the source/drain terminal; a gate over the polysilicon layer; a gate insulation layer between the polysilicon layer and the gate; a plurality of pixel electrodes that corresponds to the thin film transistors; a plurality of storage electrodes that correspond to the pixel electrodes; and a plurality of complementary metal-oxide-semiconductor (CMOS) transistors, wherein each CMOS transistor includes an N-type metal-oxide-semiconductor (NMOS) transistor and a P-type metal-oxide-semiconductor (PMOS) transistor.