Patent ID: 6600296
Filing Date: 2003-07-29
Classification: H02M

Abstract:
An on-die power converter comprising:a plurality of single phase switching blocks fabricated on a semiconductor die to receive phase-shifted clock signals and to provide an output voltage; a clock signal phase generator fabricated on the semiconductor die to provide one of the phase-shifted clock signals to each of the single phase switching blocks; and one or more functional unit blocks on the semiconductor die to receive the output voltage, wherein the single phase switching blocks each have switching elements comprised of PMOS and NMOS FETs and a charge storage element comprised of one or more of either PMOS and NMOS FETs, the charge storage element utilizing a gate capacitance of the one or more either PMOS or NMOS FETS for storing charge during portions of the phase shifted clock signals, the PMOS and NMOS FETs of the switching elements and the one or more either PMOS or NMOS FETs of the charge storage element fabricated with a CMOS process on the semiconductor die.