Patent ID: 9178630
Filing Date: 2015-11-03
Classification: H04B

Abstract:
1. A receiving circuit, comprising: an interpolation circuit configured to generate, by using an interpolation coefficient, output data including a data point and a boundary point from pieces of input data that are input in chronological order; a detection circuit configured to output a detection signal when the detection circuit detects a phase of the output data by using the boundary point of the output data; a low pass filter configured to filter the detection signal and generate the interpolation coefficient; and a modulation circuit configured to modulate, by using a modulation signal having a frequency different from a cutoff frequency of the low pass filter, the interpolation coefficient generated by the low pass filter, and output the modulated interpolation coefficient to the interpolation circuit; wherein the interpolation circuit is further configured to apply currents corresponding to the pieces of input data to a first variable capacitor and a second variable capacitor that are capable of changing capacitances in accordance with the interpolation coefficient, a point in time at which a current is applied to the first variable capacitor is earlier than a point in time at which a current is applied to the second variable capacitor, and the interpolation circuit is further configured to generate the data point and the boundary point by combining electric charges of the first variable capacitor and the second variable capacitor.