Patent ID: 6225829
Filing Date: 2001-05-01
Classification: H03K

Abstract:
In a semiconductor device, a circuit for providing an alterable device signature, the circuit comprising:a logic section that receives a plurality of information signals and provides a plurality of configuration signals, the logic section activating selected configuration signals when selected combinations of information signals are activated; anda signature option section that includes a plurality of conductive options, each conductive option having an enabled state and a disabled state, the signature option section receiving the configuration signals and providing a signature corresponding to each configuration signal, the signature being dependent upon the state of selected of the conductive options, wherein:the signature includes a plurality of signature bits; and the signature option section includes a plurality of select banks, each select bank receiving the configuration signals and including a conductive option corresponding to each configuration signal, each select bank providing one of the signature bits, and activating its respective signature bit when a configuration signal is active and its corresponding conductive option is in the enabled state.