Patent ID: 6790715
Filing Date: 2004-09-14
Classification: H01L

Abstract:
A method of forming a TFT device, comprising the steps of:providing a substrate; performing a first patterning procedure with a first photomask to form a first semiconductor island and a second semiconductor island on part of the substrate; performing a second patterning procedure with a second photomask to expose the first semiconductor island and/or the second semiconductor island; doping impurities into the exposed first semiconductor island and/or the exposed second semiconductor island to adjust threshold voltage; forming an insulating layer on the first semiconductor island, the second semiconductor island and the substrate; forming a conductive layer on the insulating layer; performing a third patterning procedure with a third photomask to remove part of the conductive layer and define a first gate and a second gate; using the first gate and the second gate as a mask, performing an nâˆ’-ion doping procedure to form an LDD region in the first semiconductor island; performing a fourth patterning procedure with a fourth photomask to expose the second gate; using the second gate as a mask, performing a p+-ion doping procedure to form a second source/drain region in the second semiconductor island; forming a passivation layer on the insulating layer, the first gate, and the second gate; performing a fifth pattering procedure with a fifth photomask to form a plurality of contact holes penetrating the passivation layer and the insulating layer to expose portions of the first and second semiconductor islands; and by means of the contact holes, performing an n+-ion doping procedure to form a first source/drain region in the first semiconductor island; wherein an ion dosage of the p+-ion doping procedure is greater than an ion dosage of the n+-ion doping procedure.