Patent ID: 6504758
Filing Date: 2003-01-07
Classification: G11C

Abstract:
A nonvolatile memory, comprising:a memory array organized according to global word lines and local word lines and having a plurality of memory cells; global row decoding means; local row decoding means; first supply means for supplying said global row decoding means; second supply means for supplying said local row decoding means; third supply means for biasing terminals of said memory cells; each of said first, second and third supply means having a plurality of electronic components connected in series, and a plurality of first controlled switching means, each of which is connected in parallel to a respective one of said electronic components; control means being provided for controlling opening and closing of each of said first controlled switching means; and supply switching means for selectively connecting a supply input of said control means to an output of said second supply means and to an output of said third supply means according to an operating step of the nonvolatile memory.