Patent ID: 7174492
Filing Date: 2007-02-06
Classification: G01R

Abstract:
1. A method for testing interconnections of a circuit having at least one DC coupled interconnection and at least one AC coupled interconnection, the circuit having at least one driving IC and at least one receiving IC that are capacitively coupled together by at least one AC coupled interconnection, each IC having a plurality of boundary scan cells (BSCs), an instruction register, and a TAP controller, the method comprising the steps of: evaluating a test type signal and effecting an AC interconnection test if the test type signal is set, the AC interconnection test comprising: shifting an AC test stimulus into the BSCs of the at least one driving IC, the AC test stimulus having a plurality of voltage transitions; scanning an initiate AC test instruction into the instruction register of both ICs; performing an execute AC test instruction by moving the TAP controller to the Run-Test/Idle state and holding the TAP controller of both ICs in the Run-Test/Idle state for the time required to complete execution of the AC test instruction, wherein, during the Run-Test/Idle controller state, the at least one driving IC is applying the AC test stimulus to the at least one AC coupled interconnection and the at least one receiving IC is sampling a received signal embodying captured AC test instruction results; transferring the captured AC test instruction results into the BSCs of the at least one receiving IC; scanning out the captured AC test instruction results if the Test type signal is set; and; effecting a DC interconnection test if the test type signal is not set.