Patent ID: 6144078
Filing Date: 2000-11-07
Classification: H03K,H04N

Abstract:
A memory, comprising:a plurality of cells formed in a substrate of a first doping type, the plurality of cells including a programmed first cell having a drain of a second doping type, a conduction channel of the first doping type, and a source including non-conducting means for providing a non-conducting response in a region of the source that contacts the conduction channel to prevent a transistor effect from occurring between the drain and the source when predetermined voltages are applied to the programmed first cell to read the programmed first cell;wherein the non-conducting means is a first region of the source of the programmed first cell contradoped such that the first region is of the first doping type to form a degenerate transistor as the programmed first cell; andwherein the source of the programmed first cell further includes:a metal contact that contacts the non-conducting means.