Patent ID: 6287916
Filing Date: 2001-09-11
Classification: H01L

Abstract:
A method of fabricating a non-volatile semiconductor device, comprising the steps of:forming a gate oxide on a semiconductor substrate;forming a floating gate on top of the gate oxide;forming sidewall spacers on each side of the floating gate;forming source/drain regions on opposite sides of the sidewall spacers in the semiconductor substrate;forming a layer of LPCVD nitride film over the floating gate and over portion of said source/drain regions;forming a salicide layer on top of the source/drain regions;depositing a PECVD nitride cap layer directly on top of the layer of the LPCVD nitride film over an entire surface of the semiconductor device;depositing an interlayer dielectric on top of the PECVD nitride cap layer over the entire surface of the semiconductor device;annealing the interlayer dielectric at a temperature of about 800.degree. C. so as to densify and stabilize the interlayer dielectric; andchemical-mechanical polishing of the interlayer dielectric so as to planarize the interlayer dielectric.