Patent ID: 6040524
Filing Date: 2000-03-21
Classification: H05K

Abstract:
In a printed circuit board, the combination of:at least a first dielectric lamina having opposed surfaces;a first layer deposited on one of said surfaces and comprised of a plurality of first layer signal lines on said one of said surfaces connected to a signal source, and a plurality of first ground areas of a defined width connected to ground arranged between said first layer signal lines on said one of said surfaces of the first lamina such that each of said first layer signal lines has one of said first ground areas on a side thereof so that each of said first layer signal lines is not immediately adjacent to another of said first layer signal lines;a second substantially uninterrupted layer on the other of said surfaces of the first lamina and constituting a second ground area connected to ground which is substantially coextensive with said other of said surfaces;at least two holes extending through said first lamina between one of said first ground areas and said second ground area and each of said holes having openings at one of said first ground areas and at said second ground area; andconductive means in said holes electrically connecting said first and second ground areas for shielding said first layer signal lines on said one of said surfaces from each other and wherein the separation between said holes extending between one of said first ground areas and said second ground area is less than the width of said one of said first ground areas.