Patent ID: 7376687
Filing Date: 2008-05-20
Classification: G06F

Abstract:
1. A pseudo-random number generator comprising: a linear feedback register including a plurality of registers connected in series, a first logical operation circuit for taking logical operation of output data from the predetermined registers to deliver the result of the logical operation, and a second logical operation circuit for taking logical operation of input data supplied from the outside and output data of said first logical operation circuit to supply any one of said plurality of registers with the result of the logical operation, said linear feedback register generating pseudo-random numbers from said registers; an oscillator for generating a third clock which is unstable in frequency during a first time period immediately following turn-ON of said pseudo-random number generator; a Pre-SEED generator circuit for supplying, only during the first time period, said linear feedback register with a shift clock which is generated by taking logical operation of said third clock and a fourth clock asynchronous to said third clock and for supplying, only during the first time period, said linear feedback register with said input data which comprises said fourth clock; a signal generator for generating said shift clock for operating said linear feedback register only after the first time period and for generating said input data using a first clock at a constant period and a second clock synchronized to said first clock only after the first time period; and an access controller that extracts the pseudo-random numbers from said linear feedback register and outputs the pseudo-random numbers.