Patent ID: 6611434
Filing Date: 2003-08-26
Classification: H01L,Y10S

Abstract:
A stacked multi-chip package structure, which comprises:(a) a substrate; and (b) a multi-chip module including at least a first semiconductor chip and a second semiconductor chip directly stacked on the first semiconductor chip, the second semiconductor chip being smaller in size than the first semiconductor chip, wherein the first semiconductor chip has a circuit surface and a non-circuit surface opposed to the circuit surface, and the circuit surface is defined with a chip-attach area for accommodating the second semiconductor chip and a component-attach area for allowing at least a passive component to be directly mounted thereon, and wherein the multi-chip module is mounted over the substrate in a manner that the non-circuit surface of the first semiconductor chip is attached to the substrate, and the circuit surface of the first semiconductor chip is electrically coupled to the substrate by means of bonding wire.