Patent ID: 6576939
Filing Date: 2003-06-10
Classification: H01L

Abstract:
A transistor comprising:a semiconductive substrate; a stack of a gate dielectric layer over the semiconductive substrate, a first conductive layer over the gate dielectric layer, a second conductive layer different in composition from the first and received over the first, and an insulative cap over the second conductive layer; the first conductive layer of the stack having opposing outer lateral edges which are spaced less than one micron apart defining a channel length within the semiconductive substrate of less than one micron, the second conductive layer of the gate stack having opposing outer lateral edges which are recessed laterally within the opposing outer lateral edges of the first conductive layer and which are thereby spaced apart less than the opposing outer lateral edges of the first conductive layer are spaced apart, the insulative cap having opposing outer lateral edges in a final circuit construction of the transistor, the insulative cap having a topmost surface; and a continuously extending oxide layer formed over the insulative cap topmost surface and laterally over each of the outer lateral edges of the first conductive layer, over each of the outer lateral edges of the second conductive layer and over each of the outer lateral edges of the insulative cap in the final circuit construction of the transistor; the oxide layer in the final circuit construction of the transistor having opposing substantially continuous straight linear outermost lateral edges extending laterally along and laterally overlapping with all of each of the opposing outer lateral edges of the insulative cap and all of each of the opposing outer lateral edges of the second conductive layer.