Patent ID: 6809004
Filing Date: 2004-10-26
Classification: H01L

Abstract:
A method for forming a shallow trench isolation, the method comprising:i) forming a pad oxide layer on a semiconductor substrate; ii) forming a first stopping layer on the pad oxide layer, the first stopping layer comprising nitride; iii) forming a second stopping layer on the first stopping layer; iv) etching the second stopping layer, the first stopping layer, the pad oxide layer and the semiconductor substrate to thereby form a second stopping layer pattern, a first stopping layer pattern, a pad oxide, layer pattern and a trench; v) forming a trench inner surface oxide layer at an inner surface portion of the trench; vi) forming a nitride layer liner on a resulting structure; vii) forming a field oxide layer in the trench; viii) selectively removing the second stopping layer pattern thereby exposing the first stopping layer pattern; and ix) removing the first stopping layer pattern.