Patent ID: 6235592
Filing Date: 2001-05-22
Classification: H01L

Abstract:
A method for fabricating a new type of Trench Mask ROM cell on a substrate, said method comprises the steps as following:forming plural trenches on said substrate;forming a gate oxide layer on an outer surface of said substrate;forming doped regions on said substrate beneath said gate oxide, wherein said doped regions are on bottoms of each said trench and portions between each two adjacent said trench, and said doped region are bit lines of said Trench Mask ROM cell;forming a nitride layer on said gate oxide layer;forming oxide layer on said nitride layer and each said trench being filled with said oxide layer;removing said oxide layer and said nitride layer of partial said trenches, namely, partial said trenches reserving said oxide and nitride to define coding regions of said Trench Mask ROM cell; anddepositing a polysilicon layer on top surfaces of said substrate wherein said polysilicon being word line of said Trench Mask ROM cell.