Patent ID: 8208540
Filing Date: 2012-06-26
Classification: H04N

Abstract:
1. A video transcoder comprising: a processor configured to (i) generate a plurality of commands and (ii) perform part of at least one of a decoding and a coding; and a video digital signal processor coupled to said processor, said video digital signal processor having (i) a first module configured to generate a first intermediate signal and a second intermediate signal by performing a first operation in said decoding of an input video stream in response to said commands, wherein said input video stream is in a first format, (ii) a memory configured to buffer said first intermediate signal and (iii) a second module configured to perform a second operation in said coding of said first intermediate signal based on decoding information in said second intermediate signal to generate an output video stream, wherein (a) said output video stream is in a second format, (b) said second format is different than said first format, (c) said first intermediate signal conveys a sequence of decoded images, (d) said decoding information in said second intermediate signal is extracted from said input video stream during said decoding, and (e) said first module configured to transfer partially decoded images to said second module before said first module has completed decoding of an entire image, so that said second module operates in parallel with said first module, wherein said first operation and said second operation are performed simultaneously.