Patent ID: 6664600
Filing Date: 2003-12-16
Classification: H01L,Y10S

Abstract:
A MOSFET formed on a substrate having a surface comprising:a source region and a drain region below said surface; a gate structure above said surface, the gate structure having opposing sides, each side abutting one of a first and a second sidewall structure; a first lightly doped region located solely below the first sidewall structure and adjacent to and substantially not extending into and under the source region; a second lightly doped region located solely below the second sidewall structure and adjacent to and substantially not extending into and under the drain region; a first implanted region extending below the source region and the first lightly doped region; a second implanted region extending below the drain region and the second lightly doped region; a third implanted region and a fourth implanted region each extending below the first implanted region and the second implanted region, respectively; a channel region below the gate structure and extending between the first and the second lightly doped regions; a junction between the source region and the first lightly doped region having a first grading of dopant concentration; a junction between the first lightly doped region and the channel region having a second grading of dopant concentration; a junction between the channel region and the second lightly doped region having a third grading of dopant concentration; and a junction between the second lightly doped region and the drain region having a fourth grading of dopant concentration.