Patent ID: 9166005
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: providing a semiconductor body having a main surface and comprising a compensated silicon semiconductor layer extending to the main surface, and a substantially intrinsic compound semiconductor region comprising silicon and germanium and extending at least partially through the compensated silicon semiconductor layer, an integrated concentration of n-type dopants of the compensated silicon semiconductor layer being substantially equal to an integrated concentration of p-type dopants of the compensated silicon semiconductor layer; and diffusing more n-type dopants than p-type dopants from the compensated silicon semiconductor layer into the substantially intrinsic compound semiconductor region to form a compound semiconductor drift region of the semiconductor device, the compound semiconductor drift region having a larger integrated concentration of n-type dopants than p-type dopants, in a cross-section substantially orthogonal to the main surface the compound semiconductor drift region at least substantially filling a vertical trench extending from the main surface at least partially through the compensated silicon semiconductor layer.