Patent ID: 7638397
Filing Date: 2009-12-29
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of forming a structure comprising: forming a plurality of semiconductive channels, each of the plurality of semiconductive channels comprising a channel length and a channel width, the plurality of semiconductive channels being formed by forming a first nitride spacer mask on an semiconductive layer, forming a first oxide spacer mask upon the first nitride mask, forming a second nitride spacer mask upon the first oxide spacer mask, and etching the plurality of semiconductive channels into the semiconductive layer in alignment with the second nitride spacer mask; forming a dielectric layer upon the semiconductive channel length; forming a source at a first terminal end of the plurality of semiconductive channels; forming a second terminal end of the plurality of semiconductive channels; forming a gate layer over the dielectric layer, wherein electron flow in the plurality of semiconductive channels has a mean free path that is greater than the semiconductive channel width, and wherein a first semiconductive channel of the plurality of semiconductive channels is spaced apart from a second semiconductive channel of the plurality of semiconductive channels by a trench that is less than about five times the semiconductive channel width.