Patent ID: 6358824
Filing Date: 2002-03-19
Classification: H01L

Abstract:
A process for making an IC comprising:(a) forming a multiplicity of trench isolation regions in a surface of a semiconductor body, and (b) forming a tub-tie region between at least one pair of adjacent ones of said isolating regions (as viewed in cross-section) including the steps of: (b1) forming a first photolithographic mask that covers and is in registration with said tub-tie region, (b2) implanting ions of a first conductivity type to form a tub region adjacent said tub-tie region, (b3) removing said first mask, (b4) forming a second photolithographic mask that has an opening that exposes most of the underlying tub-tie region but overlaps a first peripheral region on one side of said tub-tie region, (b5) implanting ions to form a pedestal region of a second conductivity-type within said tub-tie region, and (b6) implanting ions of said first conductivity-type at an acute angle âˆ’&agr; to the normal to said surface so as to form a first conductivity-type, highly doped, localized first zone that extends into said first peripheral region.