Patent ID: 6760868
Filing Date: 2004-07-06
Classification: G06F

Abstract:
A method of testing a computer system comprising:interconnecting a plurality of processing nodes; providing a primary system controller and a secondary system controller each for independently configuring said plurality of processing nodes into one or more dynamic system domains; logically isolating a given system domain formed by selected ones of said processing nodes from another system domain formed by other processing nodes; each of said processing nodes communicating with said primary and said secondary system controller via a node interface unit including a plurality of bus interfaces; operating said node interface unit in a caged mode by selectively isolating a given system controller and selected ones of said plurality of bus interfaces; wherein during operation in said caged mode said isolated given system controller performing a self-test and testing of a communication path between said isolated given system controller and said selected ones of said plurality of bus interfaces during operation of said one or more dynamic system domains.