Patent ID: 8179972
Filing Date: 2012-05-15
Classification: H04N

Abstract:
1. An image decoding device for decoding compressed image data by switching between a plurality of transform modes from a frequency domain to a time domain as necessary, the image decoding device comprising: an arithmetic unit for performing arithmetic processing on a plurality of pieces of inputted pixel data; an arithmetic data storage unit for storing an arithmetic result by the arithmetic unit; an input selection unit for selecting whether to read pixel data that is to be inputted to the arithmetic unit from the compressed image data or from pixel data stored in the arithmetic data storage unit, and inputting the read pixel data to the arithmetic unit; and an arithmetic control unit for controlling, based on a transform mode used and the number of arithmetic operations in the arithmetic unit, a destination from which the pixel data that is to be inputted to the arithmetic unit by the input selection unit is read as well as a combination of pieces of pixel data targeted for the arithmetic processing by the arithmetic unit and multiplier coefficients for the arithmetic processing, the arithmetic control unit previously defining an arithmetic procedure in each transform mode for each unit executable in one arithmetic operation in the arithmetic unit in association with the number of arithmetic operations, wherein the arithmetic control unit defines the arithmetic procedure in each transform mode by dividing the arithmetic procedure into basic units of arithmetic processing for each number of arithmetic operations, wherein the arithmetic unit is configured to be able to execute the basic units of arithmetic processing, wherein the arithmetic control unit controls a combination of pieces of pixel data targeted for the arithmetic processing and the multiplier coefficients, such that the basic units of arithmetic processing are repeated by the arithmetic unit, wherein the arithmetic unit includes first to fourth terminals, a first multiplication unit for performing multiplication processing on an input to the first terminal, a second multiplication unit for performing multiplication processing on an input to the third terminal, a third multiplication unit for performing multiplication processing on a input to the second terminal; a fourth multiplication unit for performing multiplication processing on an input to the fourth terminal, a first addition unit for adding an output of the first multiplication unit to an output of the second multiplication unit, and a second addition unit for adding an output of the third multiplication unit to an output of the fourth multiplication unit, wherein the arithmetic data storage unit stores arithmetic results by the first and second addition units, wherein the arithmetic control unit causes the input selection unit to control, based on the transform mode and the number of arithmetic operations, pieces of pixel data that are to be inputted to the first to fourth terminals, and multipliers as the multiplier coefficients for the first to fourth multiplication units, wherein the arithmetic control unit includes a multiplier storage unit for storing the multipliers in association with the transform modes, a multiplier setting unit for setting the multipliers for the first to fourth multiplication units, a transform mode setting unit for managing the transform modes, and an arithmetic order management unit for managing an arithmetic order in the arithmetic unit, wherein based on a current transform mode managed by the transform mode setting unit and the number of arithmetic operations managed by the arithmetic order management unit, the multiplier setting unit reads proper multipliers from the multiplier storage unit and sets the multipliers for the first to fourth multiplication units, and wherein based on the current transform mode and the number of arithmetic operations, the arithmetic order management unit causes the input selection unit to control the pieces of pixel data that are to be inputted to the first to fourth terminals.