Patent ID: 9209214
Filing Date: 2015-12-08
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a substrate including a front side and a back side opposite the front side; first P-type regions located adjacent to the back side and spaced apart from each other in the substrate, the first P-type regions being in contact with the back side; N-type regions located under the first P-type regions and spaced apart from each other in the substrate, the N-type regions being in contact with the first P-type regions; and second P-type regions located adjacent to the back side and located between the first P-type regions, the second P-type regions being in contact with the back side; frontal P-type regions in contact with a lower surface of the N-type regions and the front side of the substrate; and insulating patterns located adjacent to the front side and located between the N-type regions, the insulating patterns being in contact with the front side of the substrate and the frontal P-type regions, wherein: the second P-type regions are spaced apart from the insulating patterns, the second P-type regions are horizontally spaced apart from the N-type regions, and left-side surfaces of the second P-type regions are in contact with right-side surfaces of the first P-type regions, and right-side surfaces of the second P-type regions are in contact with left-side surfaces of the first P-type regions.