Patent ID: 8907416
Filing Date: 2014-12-09
Classification: H01L

Abstract:
1. A semiconductor device comprising: a plurality of gate electrodes over a gate insulator layer formed in active trenches located in an active region of a semiconductor substrate; a first gate runner formed in a first gate runner trench in the semiconductor substrate and electrically connected to the gate electrodes, wherein the first gate runner abuts and surrounds the active region; a second gate runner formed in a second gate runner trench and connected to the first gate runner for making contact to a gate metal; and wherein an insulator layer in the first and second gate runner trenches have respective thicknesses T2 greater than a thickness T1 of the gate insulator layer in the active trenches, wherein the thicknesses T2 are thick enough to support a blocking voltage, wherein each active trench contains a single electrode electrically connected to a gate potential as a gate electrode, wherein the active trench is filled only with the single electrode and the gate insulator layer.