Patent ID: 6376344
Filing Date: 2002-04-23
Classification: H01L

Abstract:
A method of making a semiconductor device, comprising the steps of:fabricating a structure that has laterally spaced first and second sections with respective upwardly facing first and second surface portions thereon, and that has a third section projecting upwardly beyond each of said first and second surface portions from a location therebetween; forming on said structure an insulating layer which has portions disposed over said first and second surface portions, said third section extending into said insulating layer; effecting a patterned etching of an upper side of said insulating layer using an etch pattern, said etch pattern including an etch region which extends from a location disposed over said first surface portion to a location disposed over said second surface portion, wherein etching in said etch region creates first and second recess portions which respectively extend downwardly through said insulating layer toward said first and second surface portions on opposite sides of said third section; depositing a conductive material into said first and second recess portions; and planarizing an upper side of said device at least to a level corresponding to an upper end portion of said third section.