Patent ID: 8216945
Filing Date: 2012-07-10
Classification: G03F,H01L

Abstract:
1. A method for controlling wafer flatness, comprising: performing a first lithography step to a topside semiconductor surface of said wafer, wherein said wafer has a reference curvature other than planar during said first lithography step; after performing the first lithography step, performing at least one process step that results in a changed curvature to said wafer relative to said reference curvature; after performing the at least one process step, modifying a stress on a bottomside surface of said wafer to provide a modified stress distribution across an area of said bottomside surface of said wafer, wherein said modified stress distribution reduces a difference between said changed curvature and said reference curvature, and performing a second lithography step to said topside semiconductor surface while said modified stress distribution is present.