Patent ID: 8971140
Filing Date: 2015-03-03
Classification: G11C

Abstract:
1. A semiconductor device comprising: a first amplifier coupled to a memory cell to sense data stored in the memory cell; a first data line precharged with a first voltage; a first transistor coupled between an output node of the first amplifier and the first data line and supplied with a first control signal at a gate thereof; a second data line precharged with the first voltage; a second transistor coupled between the first and second data lines and supplied with a second control signal at a gate thereof; a second amplifier operating on a second voltage that is greater than the first voltage; and a third transistor coupled between the second data line and an input node of the second amplifier and supplied with a third control signal; wherein the first, second and third transistors are equal in channel type to each other and each of the first, second and third transistors is rendered conductive by an active level of a corresponding one of the first, second and third control signals, the active level of each of the first, second and third control signals being substantially equal to the second voltage.