Patent ID: 8237595
Filing Date: 2012-08-07
Classification: H03F,H03M,H04B,H04L

Abstract:
1. A digital to analog converter (DAC) system comprising: a) a first DAC having a sample input, a clock input and an output, wherein a first stream of samples is provided to the sample input, the first stream of samples being used to set an output level at the output of the first DAC based upon the value of the sample and at a time indicated by a sample clock signal having a sample frequency, fs, the sample clock signal being applied to the clock input, the first stream of samples having a sample time coincident with the timing of the sample clock; b) a first up-converter having a signal input, a local oscillator (LO) input and a radio frequency (RF) output, wherein the same sample clock signal applied to the clock input of the first DAC is applied to the LO input of the up-converter and the output of the DAC is applied to the signal input of the first up-converter; c) a second DAC having a sample input, a clock input and an output, wherein a second stream of samples is provided to the sample input of the second DAC, the second stream of samples having a sample time coincident with the timing of a second sample clock signal having the same sample frequency, fs as the first sample clock signal, the second sample clock signal being applied to the clock input of the second DAC, the second sample clock signal having a quadrature offset in time from the first sample clock signal; and d) a second up-converter having a signal input, an La input and an RF output, wherein the same sample clock signal applied to the clock input of the second DAC is applied to the LO input of the second up-converter and the output of the second DAC is applied to the signal input of the second up-converter.