Patent ID: 6024478
Filing Date: 2000-02-15
Classification: G06F

Abstract:
A design aiding apparatus for designing a semiconductor device having a plurality of cells, comprising:a design cell information library for the designing of said semiconductor device;a logic-circuit information library for the designing of said semiconductor device;a layout information library for the designing of said semiconductor device;a reliability information library indicating the expected lifetime of said design cells; anda processing means for carrying out predetermined design and reliability processing based on information said processing means obtains from said libraries,wherein said processing means calculates an output load for a selected cell based on information obtained by said processing means from at least one of said design cell information library, said logic-circuit information library and said layout information library;wherein said processing means also calculates a hot carrier dependent lifetime for a transistor in said design cell by using said computed output load and information said processing means obtains from said reliability information library; andwherein said processing means verifies reliability of said cell by comparing said calculated hot carrier dependent lifetime with a reference value.