Patent ID: 8034685
Filing Date: 2011-10-11
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor component, comprising: providing a semiconductor material having a major surface, an active area, an inactive area, and a plurality of trenches, wherein each trench of the plurality of trenches has first and second sidewalls and a floor, and wherein the trenches are positioned so that the trenches of the plurality of trenches are not within other trenches of the plurality of trenches; forming a first dielectric material over the first and second sidewalls and the floors of first and second trenches of the plurality of trenches, wherein the first and second trenches are formed in different portions of the semiconductor material; forming a first electrically conductive material over a portion of the first dielectric material in the first trench; forming a second electrically conductive material over a portion of the first dielectric material in the second trench; forming a second dielectric material over the first and second electrically conductive materials; forming a layer of electrically conductive material in contact with the second dielectric material; forming a first electrical conductor from the layer of electrically conductive material that is over a first portion of the second dielectric material; forming a second electrical conductor from the layer of electrically conductive material that is over a second portion of the second dielectric material; forming a gate electrode over a first portion of the major surface; forming a source electrode over a second portion of the major surface; electrically coupling the first electrical conductor to the gate electrode; and electrically coupling the first electrically conductive material to the to the source electrode.