Patent ID: 7636268
Filing Date: 2009-12-22
Classification: G11C,H03K

Abstract:
1. A static random access memory (“SRAM”), comprising: a word line; a plurality of SRAM cells connected to the word line, the word line controlling at least one pass gate in each of the plurality of SRAM cells; a static noise margin (“SNM”) detector configured to produce a first output signal in response to a SNM event and otherwise producing a second output signal; and a pull-down transistor selectively coupling the word line to a ground path in response to the first output signal and de-coupling the word line from the ground path in response to the second output signal, wherein the SNM detector has a reference cell, a replica cell, and a comparator, the replica cell producing a replica voltage connected to a first input of the comparator and the reference cell producing an equalization voltage connected to a second input of the comparator.