Patent ID: 8247294
Filing Date: 2012-08-21
Classification: H01L

Abstract:
1. A process for manufacturing a field effect transistor, comprising the steps of: (a) forming a semiconductor layer protruding from a substrate plane, forming an insulating film on the semiconductor layer, and then laminating a gate structure body material over the whole surface, the gate structure body material consisting of a plurality of layers is laminated as the gate structure body material; (b) processing the gate structure body material to form a gate structure body comprising a gate electrode extending from one side surface through a top surface to another side surface of the semiconductor layer such that the gate electrode strides over the semiconductor layer, in a semiconductor layer side, during forming the gate structure body, forming an eaves structure by extending a protrusion which projects in a source region side and a drain region side in a channel length direction and which has a larger channel length direction width than that of a part adjacent to the insulating film in the gate electrode, at least over the top surface of the semiconductor layer in a gate electrode extending direction, the step (b) is a step etching the plurality of layers at least in the normal line direction and channel length direction of the substrate, where the etching is conducted under the conditions such that the layer adjacent to the insulating film among the plurality of layers are etched at the highest etching rate in the channel length direction; and (c) ion-implanting a dopant into the semiconductor layer using the gate structure body as a mask to form a source/drain region.