Patent ID: 6693640
Filing Date: 2004-02-17
Classification: G06F

Abstract:
A processing apparatus for use with a shared memory, the shared memory being usable as a main memory of a CPU and as an image memory, which comprises a plurality of function processing units for processing information and a data control unit, the data control unit comprising:a priority function selection part for selecting request functions, execution of each of which is required by each of the plurality of function processing units, on the basis of predetermined priorities for the request functions; a data transfer part for preferentially accessing the shared memory on the basis of the predetermined priorities for the request functions in order to process the selected request function by the priority function selection part; and a plurality of data holding parts, provided between the shared memory and the plurality of function processing units, for each holding a predetermined amount of data processing the selected request function required by each function processing unit, a certain one of the plurality of function processing units executing its request function in parallel with the others of the plurality of function processing units; wherein the data control unit and the shared memory are connected to a common CPU bus, all processing conducted in the processing apparatus being performed through the CPU bus.