Patent ID: 6266521
Filing Date: 2001-07-24
Classification: H04L

Abstract:
A receiver comprising:a detector circuit which receives an intermediate frequency signal and converts it to a base band signal;a binary converting circuit which is connected to said detector circuit and converts said base band signal to binary form;a filter circuit which receives output signal from said binary converting circuit and transmits frequency components of said output signal which are odd factors of the fundamental frequency of said output signal; anda decoding circuit which is connected to said filter circuit and decodes output signal in accordance with a clock generated on the basis of the output signal from said filter circuit.wherein said filter circuit comprises delay means which receives output signal from said binary converting circuit as input signal and delays said input signal by an integral number N times a sampling period Ts, and a subtracter which is connected to said delay means and subtracts the output of said delay means from said input signal.