Patent ID: 9019767
Filing Date: 2015-04-28
Classification: G11C,H01L

Abstract:
1. A nonvolatile memory device comprising: a channel vertically extending from a substrate; a plurality of memory cells stacked along the channel; a source region connected to a first end portion of the channel; and a bit line connected to a second end portion of the channel, wherein the first end portion of the channel is formed as an undoped semiconductor layer or a semiconductor layer doped with P-type impurities and is only in contact with the source region over the source region or under the source region, wherein the second end portion of the channel is formed of a semiconductor material of which a conductivity type is different from that of the first end portion, and wherein an intermediate portion of the channel between the first end portion and the second end portion is formed of a semiconductor material of which a conductivity type is same as that of the first end portion.