Patent ID: 9082854
Filing Date: 2015-07-14
Classification: G02F,H01L

Abstract:
1. An electrooptic device substrate comprising: a substrate; a switching element having a semiconductor layer and a gate electrode; a scan line that extends in a first direction, the scan line shielding a light; a first insulating layer that covers the substrate and the scan line, the semiconductor layer covering the first insulating layer and the scan line in a plan view; a second insulating layer that covers the first insulating layer and the semiconductor layer; a first recess that is disposed at one side of the semiconductor layer in the plan view; a second recess that is disposed at another side of the semiconductor layer in the plan view, the first recess and the second recess penetrating through the first insulating layer, the second insulating layer, and a portion of the substrate, the first recess, the semiconductor layer, and the second recess being arranged in a second direction intersecting with the first direction in the plan view, the gate electrode covering the second insulating layer, the scan line, and a channel region of the semiconductor layer in the plan view, the gate electrode being electrically connected to the scan line via the first recess and the second recess; a third insulating layer that covers the second insulating layer, the gate electrode, the first recess, and the second recess; and a data line that covers the third insulating layer so as to extend in the second direction, the data line overlapping with the scan line, the semiconductor layer, the gate electrode, the first recess and the second recess in the plan view, the data line shielding a light, wherein the first recess includes a first part that overlaps with the scan line in the plan view and a second part that is disposed at a first side of the first part, the first side being an opposite side of a semiconductor layer side of the first part, and wherein the second recess includes a third part that overlaps with the scan line in the plan view and a fourth part that is disposed at a second side of the third part, the second side being an opposite side of a semiconductor layer side of the third part.