Patent ID: 7649513
Filing Date: 2010-01-19
Classification: G09G,G11C

Abstract:
1. An organic light emitting diode display device, comprising: a pixel array having a plurality of scan lines and a plurality of data lines that cross each other, a plurality of power voltage supply lines to which a high level power supply voltage is supplied and that are substantially parallel to the data lines, a plurality of reset lines substantially parallel to the scan lines, a plurality of organic light emitting diodes that emit light due to the high level power supply voltage from the power voltage supply line, and a plurality of organic light emitting diode drive circuits that drive the organic light emitting diode with data from the data line in response to a scan signal from the scan line and that is initialized in response to a reset signal from the reset line; a scan drive circuit that supplies the scan signals to the scan lines by plurality of stages that each have a first Q node, a first QB node, a first pull-up transistor that supplies the scan signal to the scan line in response to a voltage of the first Q node and a first pull-down transistor that discharges the scan line in response to a voltage of the first QB node; a reset drive circuit that supplies the reset signals to the reset lines by a plurality of stages that each have a second Q node, a second QB node, a second pull-up transistor that supplies the reset signal to the reset line in response to a voltage of the second Q node and a second pull-down transistor that discharges the reset line in response to the voltage of a second QB node; a first transistor that discharges the first Q node of the scan drive circuit in response to the reset signal, wherein the first transistor has a source electrode connected to the first Q node connected to each of the stages of the scan drive circuit, a gate electrode connected to the reset line and a drain electrode connected to a low level power supply voltage source; and a second transistor that discharges the second Q node of the reset drive circuit in response to the scan signal, wherein the second transistor has a source electrode connected to the second Q node connected to each of the stages of the reset drive circuit, a gate electrode connected to the scan line and a drain electrode connected to the low level power supply voltage source.