Patent ID: 7504889
Filing Date: 2009-03-17
Classification: H03F

Abstract:
1. A post-amplifier stage comprising: a first input node configured to receive a first data signal; a second input node configured to receive a second data signal that is complementary to the first data signal; a first output node; a second output node; a buffer stage having a first node coupled to the first input node, a second node coupled to the second input node, a third node coupled to the first output node, and a fourth node coupled to the second output node, wherein the buffer stage comprises: a programmable boost stage having a fifth node coupled to the first output node, a sixth node coupled to the second output node, a seventh node coupled to the first input node, and an eighth node coupled to the second input node, wherein the programmable boost stage is configured to adjust a signal at the seventh node or to adjust a signal at the eighth node.