Patent ID: 6817870
Filing Date: 2004-11-16
Classification: H01R,H05K,Y10T

Abstract:
A circuit device for interconnecting first and second multilayer circuit boards, the first multilayer circuit board having a first plurality of electrically conductive vias of varying depths and the second multilayer circuit board having a second plurality of electrically conductive vias, the circuit device comprising:a first plurality of pins of varying lengths located on a first side of the circuit device corresponding to the first plurality of electrically conductive vias of the first multilayer circuit board, each of the first plurality of pins having a length compatible with a depth of a respective one of the first plurality of electrically conductive vias of the first multilayer circuit board; and a second plurality of pins located on a second side of the circuit device corresponding to the second plurality of electrically conductive vias of the second multilayer circuit board.