Patent ID: 6501322
Filing Date: 2002-12-31
Classification: G06G

Abstract:
An integrator, comprising:a transconductance amplifier (V), whose output is fed back, via an integration capacitor (Ci), to its inverting input, and at whose non-inverting input a first reference voltage (V2) is present; and a first current source (Q1), which contains a parallel parasitic capacitor (Cp), and one of whose terminals is connected to a reference potential, and whose other terminal is connected, via impedance device, to a second reference voltage (V1), characterized in that the impedance device is a voltage divider with a resistor (R2) and another circuit section (R1) comprising one of a switched capacitor and a switched resistor, and that the connection point of the resistor (R2) and of the circuit section (R1) is connected to the inverting input of the transconductance amplifier (V), wherein the resistor (R2) is replaced by a first MOS transistor (T1), which operates in the region of weak inversion, and a gate electrode of the first MOS transistor (T1) is connected to a gate electrode and a drain electrode of a second MOS transistor (T2), at whose source the first reference voltage (V2) is present, and whose drain is connected, via a second current source (Q2), to a reference potential, and that the output of the transconductance amplifier (V) is connected to the input of a threshold detector (D), whose output is connected to the input of a control circuit (S), whose first output is connected to the input of a counter (Z), and whose second output is connected to the control input of the switched capacitor (C1) or to the switched resistor.