Patent ID: 6187646
Filing Date: 2001-02-13
Classification: H01L

Abstract:
A method of manufacturing of a capacitor in a BICMOS integrated circuit manufacturing technology, including the steps of:depositing, on an oxide region, a gate polysilicon layer corresponding to a MOS transistor gate electrode,successively depositing a base polysilicon layer and a silicon oxide layer,wherein the gate polysilicon layer and the base polysilicon layer form a first electrode of the capacitor,forming an opening in the base polysilicon layer and the silicon oxide layer,performing a thermal anneal in an oxidizing atmosphere, to form a thermal oxide layer,depositing a silicon nitride layer and a spacer polysilicon layer, to completely fill up the opening after an etching,depositing an emitter polysilicon layer to form a second electrode of the capacitor, andmaking a contact with the base polysilicon layer to provide a first contact for the capacitor and a contact with the emitter polysilicon layer to provide a second contact for the capacitor.