Patent ID: 8796081
Filing Date: 2014-08-05
Classification: H01L

Abstract:
1. A semiconductor structure, comprising: a Si substrate; a plurality of isolation structures formed on the Si substrate and spaced apart from each other by a predetermined pattern, wherein a growth region is formed between every two adjacent isolation structures; a porous structure layer formed in the growth region, wherein the porous structure layer has a flat surface and comprises a Si a Ge-containing layer formed on the porous structure layer, wherein the Ge-containing layer comprises a Ge layer or a Si at least one of (i) a Si layer or a SiGe layer with low Ge content formed between the porous structure layer and the Ge-containing layer and (ii) a strontium germanide layer, a barium germanide layer, a stannum germanide layer, a SiGe passivation layer with low Ge content or a Si passivation layer formed on the Ge-containing layer.