Patent ID: 6605489
Filing Date: 2003-08-12
Classification: G11C,H01L,Y10T

Abstract:
A method of assembling an integrated circuit die on a base having a first plurality of pads and a second plurality of pads on a surface of said base, said method comprising:connecting at least one pad of the first plurality of pads to at least one pad of the second plurality of pads; providing a first integrated circuit die having a front-side surface having a plurality of flip-chip bumps thereon and having a back-side surface; positioning the front-side surface of the first integrated circuit die facing the surface of the base; aligning at least one flip-chip bump of the plurality of flip-chip bumps on the front-side surface of the first integrated circuit die with at least one pad of the first plurality of pads on the surface of the base; connecting the at least one flip-chip bump of the plurality of flip-chip bumps on the front-side surface of the first integrated circuit die to the at least one pad of the first plurality of pads on the surface of the base; providing a second integrated circuit die having a front-side surface having a plurality of bond pads thereon and having a back-side surface; positioning the back-side surface of the second integrated circuit die facing the back-side surface of the first integrated circuit die; attaching the back-side surface of the second integrated circuit die to the back-side surface of the first integrated circuit die; connecting at least one bond pad of the plurality of bond pads on the front-side surface of the second integrated circuit die to at least one pad of the second plurality of pads on the surface of the base; and sealing between at least a portion of the front-side surface of the first integrated circuit die and the surface of the base.