Patent ID: 8193050
Filing Date: 2012-06-05
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor structure, comprising: providing a substrate with a first transistor comprising a first dummy gate and a second transistor comprising a second dummy gate, a conductive type of the first transistor being different from a conductive type of the second transistor; removing the first dummy gate and the second dummy gate to form a first opening and a second opening, respectively; forming a high-k dielectric layer, a second type conductive layer and a first low resistance conductive layer on the substrate in sequence, the high-k dielectric layer, the second type conductive layer and the first low resistance conductive layer at least filling in the first opening and the second opening, with the first low resistance conductive layer filling up the first opening and the second opening; removing the first low resistance conductive layer and the second type conductive layer in the first opening; and forming a first type conductive layer and a second low resistance conductive layer in the first opening, with the second low resistance conductive layer filling up the first opening.