Patent ID: 6486056
Filing Date: 2002-11-26
Classification: H01L

Abstract:
In a process for forming an integrated circuit structure on a semiconductor substrate with a local interconnect layer separated from said substrate by a first dielectric layer; and a first metal interconnect layer over said semiconductor substrate, said first metal interconnect layer separated from said local interconnect layer only by a thin dielectric layer, the improvement which comprises:a. forming, between said local interconnect layer and said substrate, a first dielectric layer; and b. forming over said local interconnect layer said thin dielectric layer having a thickness not exceeding about 2000 Ã¥ and a dielectric constant of less than 3.8 to separate said local interconnect layer from said first metal interconnect layer; whereby at least one first conductive region on said substrate is bridged by a local interconnect used to electrically connect second conductive regions in said substrate.