Patent ID: 6564367
Filing Date: 2003-05-13
Classification: G06F

Abstract:
A logic dividing method for dividing an electronic circuit of a logic apparatus into a plurality of groups and assigning said groups to a plurality of programmable logic devices, said logic dividing method comprising:a first step of storing first information describing a relation between at least one connector for receiving and transmitting signals from and to said programmable logic devices and external interface signals input and output by said electronic circuit of said logic apparatus into a memory unit; a second step of storing second information describing a relation between said external interface signals and logic of said electronic circuit of said logic apparatus using said external interface signals into said memory unit; a third step of reading in information on connections between said connectors and said programmable logic devices from an information input unit; and a fourth step of generating division results of said electronic circuit of said logic apparatus assigning first logic using said external interface signal to said programmable logic device directly connected by a wire to one of said connectors assigned to said external interface signal on the basis of said first information, said second information and said information on connections and storing said results into said memory unit.