Patent ID: 8575964
Filing Date: 2013-11-05
Classification: H03K

Abstract:
1. An integrated circuit structure comprising at least one localized region, each said localized region comprising: at least one local voltage circuit electrically connected to a global voltage circuit, said local voltage circuit comprising voltage circuit resistors isolating said local voltage circuit from said global voltage circuit, and said local voltage circuit outputting a local reference voltage; at least one local ground circuit electrically connected to a global ground circuit, said local ground circuit comprising ground circuit resistors isolating said local ground circuit from said global ground circuit; a local capacitor connected to said local voltage circuit and said local ground circuit; local logic devices forming at least one local combinatorial logic structure, said local combinatorial logic structure being electrically connected to said local voltage circuit and to said local ground circuit, and said local combinatorial logic structure drawing said local reference voltage from said local voltage circuit; local storage devices forming at least one local register structure, said local register structure being electrically connected to said local voltage circuit and to said local ground circuit, and said local register structure drawing said local reference voltage from said local voltage circuit; and a local comparator electrically connected to said local voltage circuit, to said local ground circuit, and to said local register structure, said local comparator supplying a clock pulse to said local register structure when said local reference voltage is below a local voltage threshold.