Patent ID: 9003232
Filing Date: 2015-04-07
Classification: G06F

Abstract:
1. A method of sending a message from a source unit to a destination unit, the source unit and destination unit comprised within a plurality of units forming part of a hierarchical debug system on an integrated circuit chip, the units in the hierarchy operating according to a protocol in which each unit has the same internal address as the other units in the hierarch which is the base address, and in which each unit is configured to address other units in the hierarchy using addresses which are derivable relative to that unit's internal address given the positions of other units in the hierarchy, the method comprising: at the source unit in a first level of the hierarchy, sending a message comprising a destination address of the destination unit, the destination address being relative to the source unit's internal address; and at an intermediate unit in a second level of the hierarchy adjacent to the first level of the hierarchy: