Patent ID: 7151041
Filing Date: 2006-12-19
Classification: H01L

Abstract:
1. A method of forming semiconductor circuitry, comprising: providing a first semiconductor structure; the first semiconductor structure comprising a first monocrystalline semiconductor substrate; the first monocrystalline semiconductor substrate being one of p-type or n-type background doped; bonding a second semiconductor structure onto the first semiconductor structure; the second semiconductor structure comprising a second monocrystalline semiconductor substrate; the second monocrystalline semiconductor substrate being the other of p-type or n-type background doped; and forming an electrically conductive interconnect extending through the second monocrystalline semiconductor substrate and to the first monocrystalline semiconductor substrate; the interconnect comprising an n-type doped semiconductor material, a p-type doped semiconductor material, and silicide between the n-type doped semiconductor material and the p-type doped semiconductor material.