Patent ID: 7391837
Filing Date: 2008-06-24
Classification: H04L

Abstract:
1. A Newton's method-based timing recovery circuit comprising: a sampling clock generator for generating a sampling clock; a sampler for sampling a wireless signal input to the timing recovery circuit according to the sampling clock, and for generating a sampling signal; an interpolator for interpolating the sampling signal according to a current timing_offset signal, and for generating an interpolation signal; a timing error detector for detecting timing errors in the interpolation signal, and for generating a current timing error signal, which is a function of the current timing_offset signal; a differentiator for generating a differentiated current timing error signal, which is a differential function of the current timing_offset signal; a first divider for dividing the current timing error signal by the differentiated current timing error signal; a first subtractor for subtracting the current timing error signal divided by the differentiated current timing error signal generated from the first divider from the current timing_offset signal, and for generating a succeeding timing_offset signal, which is right next to the current timing_offset signal; a first delayer for feeding the succeeding timing_offset signal generated from the first subtractor back to the first subtractor after one period of the sampling clock; a second delayer for transferring the succeeding timing_offset signal transferred from the first delayer to the first subtractor to the differentiator after one period of the sampling clock; and an output for outputting the interpolation signal generated by the interpolator according to the current timing_offset signal.