Patent ID: 6020240
Filing Date: 2000-02-01
Classification: H01L

Abstract:
A method to manufacture a self-aligned silicided device and a ESD protection device on a substrate, said method comprising steps of:providing a substrate having a function region and an electrostatic discharge (ESD) protective region, each said region having a gate structure;performing a first ion implantation containing N-type conducting dopants to form light doped drain (LDD) regions in said functional region and said ESD protective region;performing a second ion implantation containing N-type conducting dopants on said ESD protective region to form source/drain regions;forming spacers of said gate structure of said functional region and said ESD protective region;performing a thermal oxidation process to form pad oxide layers on said source/drain and gate regions of said functional region and said ESD protective region;performing a third implantation containing N-type conducting dopants to form source, drain and gate regions of said functional region and said ESD protective region;performing a rapid thermal annealing (RTA) process to activate dopants in said substrate and to recover implant damages;removing said pad oxide layer on said functional region;forming a metal layer over said substrate; andperforming a salicide process to form a salicide layer on said gate, source and drain regions of said functional region.