Patent ID: 7642137
Filing Date: 2010-01-05
Classification: H01L

Abstract:
1. A manufacturing method of a chip package, comprising: providing a patterned metal plate having at least a heat dissipation portion, a plurality of contacting portions, and a plurality of recesses, wherein the recesses separate the heat dissipation portion from the contacting portions, and the heat dissipation portion is disposed among the contacting portions; forming a conductive adhesive layer on the contacting portions; bonding the patterned metal plate to a film-like circuit layer, wherein the film-like circuit layer is electrically connected to the contacting portions through the conductive adhesive layer; disposing at least a chip on the film-like circuit layer, wherein the chip has a plurality of bumps, and the chip and the film-like circuit layer are electrically connected through the bumps; forming a first molding on the patterned metal plate to encapsulate at least a portion of the film-like circuit layer, wherein the first molding fills the recesses; removing a portion of the patterned metal plate to expose the first molding in the recesses and to form at least a thermal enhanced plate and a plurality of contacts separated therefrom; and performing a cutting process to form at least a chip package.