Patent ID: 6574788
Filing Date: 2003-06-03
Classification: G06F

Abstract:
A method of performing physical design operations on an integrated circuit netlist comprising the steps of:a) accessing an input file containing identifications of a plurality of blocks of cells of said integrated circuit netlist, each block having defined therefor a respective set of linked stages representing high level physical design operations to be performed on each block; b) defining for each stage, a group of low level tasks to be performed in order to accomplish the stage, said low level tasks comprising commands, parameters and data to be supplied to physical design tools; c) automatically generating, based on said input file, a separate dependency graph for each block of said plurality of blocks by mapping the associated set of linked stages, for each block, to their corresponding low level tasks and maintaining data dependencies therein; and d) executing said dependency graphs to perform physical design operations on said integrated circuit netlist as defined by said input file.