Patent ID: 8686705
Filing Date: 2014-04-01
Classification: H02M,Y02B

Abstract:
1. A current mode synchronous rectification DC/DC converter comprising: a soft start function unit, for inhibiting a target value of an output voltage to be lower than that at a normal action while starting; an output stabilization function unit, for performing at least one of waiting for start of a switching action and reduction of a drive frequency while starting; an output transistor and a synchronous rectification transistor, for generating the output voltage from an input voltage according to turn-on/turn-off control thereof complementary to each other; a reference voltage generation unit, for generating a reference voltage; an error amplifier, for amplifying a difference between a feedback voltage corresponding to the output voltage and the reference voltage and generating an error voltage; a current detection unit, for generating a current detection voltage corresponding to an output current; an oscillator, for generating a clock signal and a slope voltage with the same oscillation frequency, the oscillator further comprising: an amplification unit, for generating a first voltage acquired by amplifying the reference voltage; an offset setting unit, for enabling the first voltage to produce an offset and thereby generating a second voltage; a band gap voltage generation unit, for generating a band gap voltage; a buffer, for generating a third voltage in the same manner as a lower one of the second voltage and the band gap voltage; a voltage/current conversion unit, for converting the third voltage into a current signal; a ring oscillator, for generating the clock signal through an oscillation frequency corresponding to the current signal; and a slope voltage generation unit, for generating the slope voltage from the clock signal, the current mode synchronous rectification DC/DC converter further comprising: a Pulse Width Modulation (PWM) comparator, for generating a PWM signal according to a comparison result of the error voltage and the slope voltage, and a comparison result of the error voltage and the current detection voltage; a reset-set (RS) trigger, for generating a latch signal set through the clock signal and reset through the PWM signal; a driver, for generating gate voltages of the output transistor and the synchronous rectification transistor according to the latch signal; and wherein the reference voltage generation unit, as the soft start function unit, enables the reference voltage to slowly increase while starting, and wherein the oscillator, as the output stabilization function unit, generates the clock signal and the slope voltage through the oscillation frequency corresponding to the reference voltage.