Patent ID: 6329826
Filing Date: 2001-12-11
Classification: G01R,H01J

Abstract:
A circuit pattern inspection method comprising the steps of:mounting a sample on a sample stage; scanning on said sample with a primary electron beam;registering negative potential values in advance in accordance with material and shape of circuit patterns on samples;applying a zero or one of said registered negative potential values selected in accordance with material and shape of the circuit pattern of said sample to said sample stage or to a vicinity of said sample; controlling said zero or the one of the negative potential values to thereby control energy of the primary electron beam to be radiated onto said sample;detecting secondary charged particles secondarily generated from said sample;forming an image on the basis of a signal from said detector and storing the formed image;comparing the image of a concerned region which is stored in the storage means, with another image of another region in which another same circuit pattern is formed; andjudging a defect in the circuit pattern from a result of the comparison.