Patent ID: 8917887
Filing Date: 2014-12-23
Classification: H03G

Abstract:
1. A signal processor comprising: a band divider configured to calculate an amplitude indicating sound pressure from an acoustic signal for each frequency range of a plurality of frequency ranges; a first correction module configured to correct the amplitude for each frequency range to change a dynamic range of the amplitude for each frequency range to a target dynamic range; a determiner configured to determine whether a maximum amplitude of the amplitudes corrected by the first corrector is equal to or larger than a threshold; an adjuster configured to adjust a first coefficient and a second coefficient if the determiner determines that the maximum amplitude is equal to or larger than the threshold, the adjuster configured to adjust the first coefficient and the second coefficient based on a first condition and a second condition, a sum of a first value and a second value being lower than the threshold in the first condition, the first value obtained by multiplying the first coefficient by the amplitude of the maximum amplitude before being corrected, the second value obtained by multiplying the second coefficient by a correction amount by which the amplitude is corrected to the maximum amplitude, and the second condition specifying a condition that the first coefficient and the second coefficient maintain a change amount of the dynamic range, wherein the adjuster is configured to set the first coefficient to one, and to select the second coefficient satisfying the second condition under the condition that the first coefficient is set to one; and a second correction module configured to add a third value obtained by multiplying the first coefficient by the acoustic signal to a fourth value obtained by multiplying the second coefficient by the correction amount, and to output a resulting value as an output signal, wherein at least one of the band divider, the first correction module, the determiner, the adjuster, and the second correction module is implemented by at least one hardware processor.