Patent ID: 6263304
Filing Date: 2001-07-17
Classification: G06F

Abstract:
An apparatus to emulate an output of an analog-to-digital converter, comprising:an input configured to receive a two-level PC beep input signal from an analog source; andan output connected to a digital summer to sum an output signal of said apparatus with digital signals from at least one other analog source;wherein said apparatus is configured to output a first output bit signal comprising a first plurality of bits at said output in response to input of a first level of said two-level PC beep input signal at said input, said first output bit signal corresponding to a first digital output of said analog-to-digital converter in response to said first level of said two-level PC beep input signal, and said apparatus is configured to output a second output bit signal comprising a second plurality of bits at said output in response to input of a second level of said two-level PC beep input signal at said input, said second output bit signal corresponding to a second digital output of said analog-to-digital converter in response to said second level of said two-level PC beep input signal.