Patent ID: 7278086
Filing Date: 2007-10-02
Classification: H03M

Abstract:
1. A method of identifying uncorrectable codewords in a Reed-Solomon decoder handling errors and erasures, the Reed-Solomon decoder including at least six hardware logic functions, the method comprising the steps of: indicating an uncorrectable codeword when any one or more of the following conditions (a) to (f) is satisfied: (a) no solution to key equation σ(x)T(x)≡(x)modx (b) deg σ(x)≠nerrors is determined by a second one of said at least six hardware logic functions; (c) error and erasure locations coincide is determined by a third one of said at least six hardware logic functions; (d) deg ω(x)≧nerrors+nerasures is determined by a forth one of said at least six hardware logic functions; (e) nerasures+2*nerrors>2T is determined by a fifth one of said at least six hardware logic functions and (f) an error location has a zero correction magnitude is determined by a sixth one of said at least six hardware logic functions; where nerrors and nerasures represent, respectively, a number of errors with reference to an error locator polynomial σ(x) and a number of erasures with reference to an erasure locator polynomial Λ(x), 2T is the strength of a Reed-Solomon code, ω(x) is an errata evaluator polynomial, and T(x) is a modified syndrome polynomial.