Patent ID: 6245624
Filing Date: 2001-06-12
Classification: H01L

Abstract:
A method of fabricating an integrated circuit field effect transistor comprising the steps of:forming an insulated gate electrode comprising polysilicon on an integrated circuit substrate;oxidizing the insulated gate electrode;forming a gate spacer on the oxidized sidewalls of the insulated gate electrode;forming heavily doped source/drain regions in the integrated circuit substrate by first implanting ions into the integrated circuit substrate using the insulated gate electrode and the gate spacer on the oxidized sidewalls of the insulated gate electrode as an implantation mask; thenremoving the gate spacer from the oxidized sidewalls of the insulated gate electrode, after performing the step of forming heavily doped source/drain regions in the integrated circuit substrate; thenforming silicide on the gate electrode comprising polysilicon and on the heavily doped source/drain regions; and thenforming lightly doped source/drain regions in the integrated circuit substrate that are lightly doped relative to the heavily doped source/drain regions, by implanting ions into the integrated circuit substrate using the insulated gate electrode as an implantation mask, after performing the step of removing the gate spacer from the oxidized sidewalls of the insulated gate electrode.