Patent ID: 6812578
Filing Date: 2004-11-02
Classification: H01L

Abstract:
A bonding pad structure of a semiconductor device, said bonding pad structure comprising:a substructure formed on a semiconductor substrate; a first dielectric layer formed on the substructure; a polysilicon film plate formed on the first dielectric layer; a second dielectric layer formed overlying the polysilicon film plate, the second dielectric layer having a first opening that expose a region of the polysilicon film plate, a first metal layer formed on the polysilicon film plate through the first opening; an inter-metal dielectric (IMD) layer formed overlying the first metal layer, the inter-metal dielectric layer having a second opening that exposes a region of the first metal layer; a second metal layer formed on the first metal layer in the second opening; and a passivation layer formed overlying the second metal layer, the passivation layer having a third opening that exposes a region of the second metal layer as a bonding pad, the bonding pad positioned above and overlapping the polysilicon film plate.