Patent ID: 6847557
Filing Date: 2005-01-25
Classification: G11C

Abstract:
1. A method of erasing non-volatile memory data, wherein the non-volatile memory at least includes a control gate, a substrate, a source region and a drain region, the method comprising the steps of: applying a first voltage to the substrate, applying a second voltage to the control gate and setting both the source and the drain region to a floating state in a first time interval so that Fowler-Nordheim tunneling is utilized to carry out the erasing operation; changing the first voltage applied to the control gate to a third voltage in a second time interval; and changing the second voltage applied to the substrate to 0 volt in a third time interval to prevent over-erasure of the non-volatile memory; wherein the second voltage and the first voltage are in reverse bias and the third voltage and the first voltage are in reverse bias.