Patent ID: 6389564
Filing Date: 2002-05-14
Classification: G11C

Abstract:
A memory circuit comprising:a plurality of word lines; a plurality of bit line groups each having two bit lines; a memory unit connected between each of the word lines and one bit line of each of the bit line groups wherein the word line connected to the memory unit is used for initiating the memory unit to input or output a binary data bit through the bit line connected to the memory unit; a plurality of writing units, each of the writing units comprising two output ports separately connected to the two bit lines of one of the bit line groups for simultaneously outputting two opposite binary data bits; a plurality of testing units, each of the testing units comprising at least two input ports separately connected to an output port of one writing unit and the bit line connected to the output port, a test circuit for generating a test signal according to the inputs from the two input ports, and a register connected to the test circuit for storing the test signal; a plurality of bit line switches, each of the bit line switches being connected between one output port of each writing unit and the bit line connected to the output port for controlling the output from the output port to the bit line; and a control circuit for controlling the operations of the memory circuit; a plurality of latch units, each of the latch units being connected between two bit lines of one bit line group for maintaining the voltage level of the first bit line according to the binary data bit outputted from the memory unit and outputting an opposite binary data bit to the second bit line of the bit line group when one memory unit outputting a binary data bit through a first bit line of one bit line group connected to the memory unit; wherein when testing the memory unit, the control circuit first initiates the memory unit by using the word line connected to the memory unit, and then uses the writing unit connected to the memory unit to write a predetermined binary data bit into the memory unit through one output port of the writing unit connected to the memory unit and the bit line switch and bit line connected between the output port of the writing unit and the memory unit, and then switches off the bit line switch to disconnect the bit line connected to the output port of the writing unit, and finally using the testing unit connected to the output port and the disconnected bit line to test if the binary data bit outputted from the memory unit to the disconnected bit line is the same as the binary data bit outputted from the output port.