Patent ID: 6738109
Filing Date: 2004-05-18
Classification: G02F

Abstract:
An LCD panel substrate comprising:a gate pattern including a gate line formed on a pixel region and a peripheral region of a transparent insulating substrate respectively and a gate electrode branched from the gate line; a gate insulating film formed the transparent insulating substrate having the gate pattern; an active pattern formed on the gate insulating film, said active pattern including a first impurity region, a second impurity region, and a channel region formed between the first impurity region and the second impurity region; a data pattern formed on the active pattern and the gate insulating film, said data pattern including a first electrode in contact with the first impurity region, a second electrode in contact with the second impurity region, and a data line coupled to the first electrode; a first insulating interlayer formed on the data pattern and the gate insulating film, the first insulating interlayer having a first contact hole for partially exposing the first electrode, a second contact hole for exposing the gate electrode of a first drive transistor of the peripheral region, and a third contact hole for exposing the first/second electrode of a second drive transistor of the peripheral region; and an electrode pattern part formed on the first insulating interlayer, the electrode pattern part including a first electrode pattern in contact with the first electrode of the pixel region through the first contact hole, and a second electrode pattern connecting the partially exposed gate electrode of the first drive transistor with the exposed first/second electrode of the second drive transistor through the second and third contact holes.