Patent ID: 8866208
Filing Date: 2014-10-21
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first capacitor in a trench of a semiconductor substrate; an active pillar disposed on a top surface of the semiconductor substrate opposite to the first capacitor, the active pillar including a first region, a first channel region, a second region, a second channel region and a third region which are sequentially stacked; a pillar connection pattern disposed on a storage node electrode of the first capacitor, the pillar connection pattern laterally extending to a first source region formed in the first region of the active pillar; a first gate electrode on a sidewall of the first channel region of the active pillar; a common drain region in the second region of the active pillar; a common bit line on a sidewall of the common drain region; a second gate electrode on a sidewall of the second channel region of the active pillar; a second source region in the third region of the active pillar; and a second capacitor on a top surface of the second source region opposite to the second channel region.