Patent ID: 6453402
Filing Date: 2002-09-17
Classification: G06F,G11C

Abstract:
A method for synchronizing a data signal and a data strobe signal received from a random access memory, comprising:initiating a read operation to the random access memory including sending a target address for the read operation to the random access memory; receiving the data signal from the random access memory, the data signal containing data retrieved from the target address; passing the data signal through an input driver into a register by asserting an enable signal to enable the input driver; wherein asserting the enable signal includes passing the enable signal through a first programmable delay circuit that has been programmed with a first delay value, wherein the first programmable delay circuit is included within a core logic chip; receiving a data strobe signal from the random access memory, the data strobe signal being sent by the random access memory to latch the data signal into the register; delaying the data strobe signal by passing the data strobe signal through a second programmable delay circuit that has been programmed with a second delay value, wherein the second programmable delay circuit is included within the core logic chip; using the data strobe signal to latch the data signal into the register, wherein the register includes a first section and a second section; and selecting data alternately from the first section and from the second section to allow overlap between input data and output data.