Patent ID: 6104216
Filing Date: 2000-08-15
Classification: H03F,H03K

Abstract:
A differential circuit comprising:a current mirror including a pair of first transistors of a first conductivity type each having a source connected to a first source line,a pair of second transistors of a second conductivity type each having a drain connected to a drain of a corresponding one of said first transistors,said second transistors having sources connected together and gates for receiving a reference voltage and an input signal voltage, respectively, anda third transistor of said second conductivity type having a drain connected to said sources of said second transistors, a source connected to a second source line and a maintained at a constant voltage which is between voltages of said first and second source lines and substantially constant irrespective of a voltage fluctuation of said first and second source lineswherein each of said second transistors has a gate width/gate (W/L) ratio which is larger that a W/L ratio of each of said first transistors, andwherein said third transistor has a W/L ration which is lower than the W/L ratio of each of said first and second first transistors.