Patent ID: 6407537
Filing Date: 2002-06-18
Classification: G05F

Abstract:
A voltage regulator for converting an input voltage (Vi), which may be affected by a ripple, into an output voltage (Vo) which is substantially not affected by a ripple, comprising an input terminal (1) for receiving the input voltage(Vi), an output terminal (2) for supplying the output voltage (Vo) in response to the input voltage (Vi), and current limiting means for limiting the maximum absolute value of an output current (Io) supplied from the output terminal (2), characterized in that the current limiting means comprise a current limiting transistor (TCL) with a main current path, and in that the current limiting means are designed such that, if the voltage (U) across the main current path is higher than a given threshold voltage of the current limiting transistor(TCL), at which the current limiting transistor (TCL) acts as a current source, the maximum absolute value of the output current (Io) is limited, wherein the gate of the current limiting transistor (TCL) is connected to a current reference terminal (IB).