Patent ID: 7763524
Filing Date: 2010-07-27
Classification: H01L

Abstract:
1. A method for forming an isolation structure in a semiconductor device, wherein the semiconductor device includes a substrate comprising a first region and a second region, the second region having an isolation structure formed to a larger width than a plurality of isolation structures formed in the first region, the method comprising: etching portions of the first and second regions of the substrate to form first and second trenches, respectively, wherein a width of the second trench is larger than that of the first trench; forming a first insulation layer to fill a portion of the first and second trenches; directly after forming the first insulation layer, forming a barrier layer over the first insulation layer; etching portions of the first insulation layer and the barrier layer; removing the barrier layer; and forming a second insulation layer over the first insulation layer to fill the first and second trenches, wherein the barrier layer is foamed to have a smaller thickness in the second region than in the first region, wherein etching portions of the first insulation layer and the barrier layer in the first region comprises: