Patent ID: 9081740
Filing Date: 2015-07-14
Classification: G06F,H04L

Abstract:
1. A signal processing system with a bus node, which is designed for signal conversion between signals of an internal and an external bus system, and in each case comprising at least one interface for coupling to the external bus system and the internal bus system, and with at least one signal conditioning module which is designed for physical conditioning and/or analog-to-digital conversion of signals of an external component and has an interface for the internal bus system and at least one connection for the external component, and is connected to the bus node via the internal bus system, wherein the bus node is designed for internal raw data processing of signals provided by the signal conditioning module, and for output of at least one output signal, dependent on the processed signals, to the internal and/or the external bus system, and wherein the bus node includes an at least partly freely programmable and/or freely allocable memory device for the storage of an algorithm, and a processing device for processing the signals provided by the signal conditioning module and for the output of an output signal by means of the stored algorithm, and wherein the processing device contains several instruction levels for the processing of different instructions, wherein a first instruction level is set up for direct communication with the processing device, and further instruction levels for exclusive communication with in each case adjacent instruction levels, and wherein the processing device is set up in one instruction level, located above the first instruction level, for the operation of one or more instruction modules presettable by the end user, and wherein the algorithm provided for processing the signals supplied from the signal conditioning module and to output an output signal is in the form of an instruction module, and wherein the instruction module is designed for monitoring energy flows and/or volume flows and/or servicing intervals and/or safety functions of the external components connected thereto.