Patent ID: 7308686
Filing Date: 2007-12-11
Classification: G06F

Abstract:
1. A method for implementing a high speed input and output protocol in software as a hard real time thread on a multithreaded processor, comprising the steps of: scheduling instructions of the hard real time thread of the high speed input and output protocol to be executed as a predetermined fraction of all scheduled instructions on the multithreaded processor over a first time period; generating a schedule allocating cycles of an input and output protocol clock signal to a plurality of threads so instructions of the hard real time thread execute during cycles of the input and output protocol clock signal specified by the schedule; generating the input and output protocol clock signal, a selected number of the instructions of the hard real time thread being executed each cycle of the input and output protocol clock signal, each instruction of the selected number of instructions being executed at the same time for each cycle of the input and output protocol clock signal; and executing a first predetermined instruction of the selected number of the instructions at a first predetermined time within the cycle of the input and output protocol clock signal to transfer data.