Patent ID: 7734854
Filing Date: 2010-06-08
Classification: G06F

Abstract:
1. An apparatus to handle transactions in a computing system, the apparatus comprising: a slave unit; a request bus; a read bus for communicating read data from the slave unit; a master unit connected to the read bus and operative to issue read requests, the read requests comprising immediate read requests, and delayed read requests and to issue write requests over the request bus to the slave unit, wherein the immediate read requests have the read data available from the slave unit at relatively short latencies and are performed as a single request and the delayed read requests have read data available from the slave unit at relatively long latencies and are performed by initiating respective first requests over the request bus and thereafter issuing second requests over the request bus to fetch the read data from the slave unit; and an arbiter adapted to select, responsively to a non-ideal utilization of the read bus, one of at least first and second arbitration schemes for issuing the read requests and the write requests, wherein a first ratio between the read requests and the write requests according to the first arbitration scheme is different from a second ratio between the read requests and the write requests according to the second arbitration scheme, the master unit cooperative with the arbiter to obtain a balance between read transactions with the slave unit and write transactions with the slave unit by issuing the delayed read requests in accordance with a selected one of the first arbitration scheme and the second arbitration scheme.