Patent ID: 7427780
Filing Date: 2008-09-23
Classification: H01L

Abstract:
1. A semiconductor device comprising: a channel region provided over a substrate and between a source region and a drain region; a gate electrode provided over said substrate and provided adjacent to said channel region with a gate insulating film between said gate electrode and said channel region; a first insulating film comprising silicon nitride provided over said channel region and said source region and said drain region and said gate electrode and said gate insulating film; a second insulating film provided over said first insulating film and comprising polyamide to provide a first leveled surface over said first insulating film; a drain electrode connected with said drain region and provided over said second insulating film; a source electrode connected with said source region and provided over said second insulating film; a third insulating film provided over said drain electrode and said source electrode and comprising polyimide to provide a second leveled surface over said drain electrode and said source electrode; a black matrix provided over said third insulating film; a fourth insulating film provided over said black matrix and comprising polyimide to provide a third leveled surface over said black matrix; and a pixel electrode connected with one of said drain electrode and said source electrode and provided over said fourth insulating film.