Patent ID: 6166717
Filing Date: 2000-12-26
Classification: G06T,G09G

Abstract:
An image processing apparatus for executing anti-aliasing processing to remove jagged portions of an edge of an output image in rendering processing for a triangular region surrounded with a vector image edge by obtaining an area of the triangular region in units of pixels overlapping the triangular region and performing rendering processing for the triangular region in units of pixels on the basis of the obtained area, comprising:a rendering Y-coordinate generating circuit for outputting a Y-coordinate YD of each pixel, in a range from a Y-coordinate value of a vertex having a minimum Y-coordinate of Y-coordinates of three vertexes of the triangular region to a Y-coordinate value of a vertex having a maximum Y-coordinate, while increasing the coordinate by one every time processing for all pixels having the coordinate YD and overlapping the triangular region is complete;a span start point generating circuit for setting a point having a minimum X-coordinate, of points located on sides of the triangular region and having a minimum Y-coordinate, as a start point of a span P.sub.n which is parallel to an X-axis, has the Y-coordinate YD, and is currently processed, in an interval between the span P.sub.n and a span P.sub.n+1 which has a Y-coordinate YD+1 and is to be processed next, and outputting an X-coordinate XA of the start point;a span end point generating circuit for setting a point having a maximum X-coordinate, of points located on the sides of the triangular region and having a minimum Y-coordinate, as an end point of the span P.sub.n, and outputting an X-coordinate XB of the end point;a sub-span start point generating circuit for obtaining intersections having minimum X-coordinates, of intersections of the sides of the triangular region and a plurality of sub-spans that divide a region between the spans, in units of sub-spans at once, on the basis of the X-coordinate XA of the start point of the span output from said span start point generating circuit, setting the obtained intersections as start points of the respective sub-spans, and outputting X-coordinates of the respective start points;a sub-span end point generating circuit for obtaining intersections having maximum X-coordinates, of intersections of the sides of the triangular region and a plurality of sub-spans that divide a region between the spans, in units of sub-spans at once, on the basis of the X-coordinate XB of the end point of the span output from said span end point generating circuit, setting the obtained intersections as end points of the respective sub-spans, and outputting X-coordinates of the respective end points;a leftmost sub-span start point generating circuit for outputting a minimum X-coordinate XSL of the X-coordinates of the start points of the respective sub-spans output from said sub-span start point generating circuit;a rightmost sub-span end point generating circuit for out-putting a maximum X-coordinate XER of the X-coordinates of the end points of the respective sub-spans output from said sub-span end point generating circuit;a rendering X-coordinate generating circuit for outputting an X-coordinate XD of each pixel, in a range from the X-coordinate XSL to the X-coordinate XER, while increasing the X-coordinate XD by one every time processing for one pixel is complete;a sub-span start point comparison circuit for comparing the X-coordinate XD of the pixel with the X-coordinate of the start point of each sub-span output from said sub-span start point generating circuit, and outputting a larger X-coordinate as the X-coordinate of the start point of each sub-span in the pixel with the coordinate XD;a sub-span end point comparison circuit for comparing a value obtained by adding one to the X-coordinate XD with the X-coordinate of the end point of each sub-span output from said sub-span end point generating circuit, and outputting a smaller X-coordinate as the X-coordinate of the end point of each sub-span in the pixel with the coordinate XD;a sub-span difference calculating circuit for obtaining a valid length of each sub-span in the pixel with the coordinate XD by subtracting the X-coordinate of the start point of each sub-span, output from said sub-span start point comparison circuit, from the X-coordinate of the end point of each sub-span, output from said sub-span end point comparison circuit; anda sub-span adding circuit for obtaining a sum total of the valid lengths of the respective sub-spans output from said sub-span difference calculating circuit, and setting the result as an area of an overlapping portion between the pixel with the coordinate XD and the triangular region.