Patent ID: 8112730
Filing Date: 2012-02-07
Classification: G01R,G06F,G11C

Abstract:
1. A structural primitive verification tool for memory compilers, comprising a non-transitory machine-readable medium having stored therein instructions that, when executed by a processor, cause the processor to: receive a first set of memory structural primitives; compare a first data vector output to second data vector output, the first data vector output generated from a first model of a memory instance derived from the first set of memory structural primitives, the second data vector output generated from a second model of a memory instance derived from a memory layout file of a memory compiler to verify an integrity of the first set of memory structural primitives; test each of a plurality of memory instances to create a verified structural model for each of the memory instances in the memory compiler; produce a set of data verification patterns for each memory instance; program a memory instance layout file for each data verification pattern; and generate a programmed instance layout file of the memory instance, wherein the data verification pattern is programmed into the memory instance layout file for each verification pattern.