Patent ID: 9093317
Filing Date: 2015-07-28
Classification: H01L

Abstract:
1. A method for forming a semiconductor device, comprising: providing a semiconductor substrate including a first region and a second region; forming a gate dielectric material layer to cover the first region of the semiconductor substrate, and forming a floating gate dielectric layer on a surface portion of the second region of the semiconductor substrate, a floating gate on the floating gate dielectric layer, and a control gate dielectric layer on the floating gate, wherein the control gate dielectric layer has a top surface higher than the gate dielectric material layer in the first region; conformally forming a gate material layer to cover the gate dielectric material layer of the first region and to cover the semiconductor substrate, sidewalls of the floating gate dielectric layer and the floating gate and the control gate dielectric layer, a top surface of the control gate dielectric layer of the second region, the gate material layer on the control gate dielectric layer of the second region having a top surface higher than a top surface in the first region; forming a first filling material layer on the gate material layer to provide a first flat surface and forming a first patterned mask layer on the first filling material layer to cover the second region and to perform a patterning in the first region; forming a gate on a gate dielectric layer in the first region by etching the gate material layer and the gate dielectric material layer using the first patterned mask layer as an etch mask, wherein the gate material layer in the second region has the top surface higher than a top surface of the gate of the first region; and forming a control gate on the control gate dielectric layer in the second region by etching the gate material layer in the second region.