Patent ID: 7870400
Filing Date: 2011-01-11
Classification: G06F,Y02D

Abstract:
1. A system comprising: a system communication bus; a data processor having at least one input and at least one output coupled to the system communication bus for communicating via the system communication bus; a peripheral coupled to the system communication bus for communicating via the system communication bus; a system memory coupled to the system communication bus for receiving memory access requests and storing and providing data in response to the memory access requests, the system memory operating at an operating voltage; a voltage controller coupled to the system memory for varying the operating voltage of the system memory based upon whether the data processor or the peripheral is accessing the system memory, wherein the operating voltage is dependent upon the system memory being accessed by the processor or being accessed by the peripheral such that when the data processor is accessing the system memory, the operating voltage has a first value and when the peripheral is accessing the system memory, the operating voltage has a second value, different from the first value.