Patent ID: 7437517
Filing Date: 2008-10-14
Classification: G06F

Abstract:
1. An apparatus for controlling data stored on a chip by a software application, comprising: an on-chip memory comprising a block for allocation to the software application, the on-chip memory sharing the chip with a processor and a cache; an on-chip memory controller to allocate the block of the on-chip memory for the data in response to an instruction, the instruction being associated with the data, wherein allocating the block of the on-chip memory comprises allocating the block of the on-chip memory in response to an explicit instruction from the software application, the explicit instruction being substantially determinative of the occurrence of allocation of the block of the on-chip memory, to access the block of the on-chip memory for the processor to obtain the data in response to a request for the data by the processor, and to de-allocate the block of the on-chip memory in response to a subsequent instruction from an operating system; and a direct memory access controller coupled with the on-chip memory and responsive to the on-chip memory controller to transfer the data from the main memory to store the data in the block of the on-chip memory based upon an indication from the operating system, wherein the direct memory access controller comprises a direct memory access engine responsive to the controller to page out a content of the block of the on-chip memory prior to copying the data into the block of the on-chip memory.