Patent ID: 8334182
Filing Date: 2012-12-18
Classification: H01L

Abstract:
1. A method for manufacturing a non-volatile memory, comprising: providing a substrate; forming a patterned mask layer on the substrate; forming a plurality of first doped regions in the substrate exposed by the patterned mask layer; forming a spacer on the sidewall of the patterned mask layer, wherein the spacer covers a portion of the first doped region; forming a plurality of trenches in the substrate exposed by the patterned mask layer and the spacer; forming the second doped regions under the bottoms of the trenches in the substrate exposed by the patterned mask layer and the spacer; removing the patterned mask layer and the spacer; forming a plurality of second doped regions in a portion of the substrate under the bottoms of the trenches respectively; forming a charge storage layer conformal to a surface of the substrate; and forming a conductive layer over the substrate, wherein the conductive layer covers the charge storage layer and fills in the trenches.