Patent ID: 8207761
Filing Date: 2012-06-26
Classification: G11C,H03K

Abstract:
1. A semiconductor device, comprising: a pull-up circuit connectable to an internal terminal; a pull-down circuit connectable to said internal terminal; an operation mode switch circuit configured to switch an operation mode based on a potential of said internal terminal when said pull-up circuit is connected to said internal terminal and a potential of said internal terminal when said pull-down circuit is connected to said internal terminal, wherein said pull-up circuit and said pull-down circuit are alternately turned ON/OFF in accordance with a clock signal, said pull-up circuit supplies a power-supply potential when turned ON, and said pull-down circuit supplies a ground potential when turned ON; a first clock output circuit configured to output a first clock signal to said operation mode switch circuit; and a second clock output circuit configured to output a second clock signal as said clock signal to said pull-up circuit and said pull-down circuit, wherein said second clock signal is obtained by frequency-dividing said first clock signal, and wherein said operation mode switch circuit comprises: