Patent ID: 7911431
Filing Date: 2011-03-22
Classification: G09G

Abstract:
1. A liquid crystal display device, comprising: a liquid crystal panel including a pixel block including pixels, the pixel including R, G and B sub-pixels; a timing controller that converts an r-bit R external data into an n-bit R input data, converts an r-bit G external data into an n-bit G input data, and converts an r-bit B external data into an n-bit B input data if the r does not equal the n, wherein the timing controller converts the r-bit R, G and B external data into the respective R, G and B n-bit input data by adding a lowermost bit having a value zero to the respective r-bit R, G and B external data; a first FRC portion that converts the n-bit R input data into (n−m)-bit R data having a first FRC pattern for consecutive P frames according to lower m bits of the n-bit R input data, wherein the (n−m)-bit R data for each of the consecutive P frames correspond to the R sub-pixels of the pixels of the pixel block, respectively; a second FRC portion that converts the n-bit G input data into (n−m)-bit G data having a second FRC pattern for the consecutive P frames according to lower m bits of the n-bit G input data, wherein the (n−m)-bit G data for each of the consecutive P frames correspond to the G sub-pixels of the pixels of the pixel block, respectively; and a third FRC portion that converts the n-bit B input data into (n−m)-bit B data having a third FRC pattern for the consecutive P frames according to lower m bits of the n-bit B input data, wherein the (n−m)-bit B data for each of the consecutive P frames correspond to the B sub-pixels of the pixels of the pixel block, respectively, wherein the first, second and third FRC patterns are different and correspond to the R, G and B sub-pixels, respectively, and wherein the P,r,n and m are natural numbers, the r is less than or equal to the n, and the n is greater than the m.