Patent ID: 6564636
Filing Date: 2003-05-20
Classification: E05Y,G01C,H03L,H04L

Abstract:
An apparatus implementing a digital phase locked loop comprising:an automatic gain control arranged to apply gain to an input signal in order to produce a gain controlled signal; a 90Â° phase shifter arranged to provide a 90Â° phase shifted version of the gain controlled signal; a phase detector driven by the gain controlled signal, by the 90Â° phase shifted version of the gain controlled signal, and by sinuscidal and co-sinusoidal signals; a loop filter arranged to integrate an output of the phase detector and to provide servo equalization for the phase-locked loop; and, a digital dual frequency oscillator having a fundamental frequency controlled by an output signal from the loop filter in order to generate the sinusoidal and co-sinusoidal signals.