Patent ID: 9224486
Filing Date: 2015-12-29
Classification: G11C

Abstract:
1. A circuit for driving a control gate of a split-gate nonvolatile memory cell, the circuit comprising: a switched current source having a first node coupled to a first switched voltage source; a first transistor of a first type having a first current electrode coupled to the switched current source and a control electrode coupled to a second switched voltage source; a second transistor of the first type having a first current electrode coupled to a second node of the switched current source, a second current electrode coupled to an address decoder circuit, and a control electrode coupled to a third switched voltage source; a third transistor of the first type having a control electrode coupled to a second current electrode of the second transistor of the first type, and a first current electrode coupled to a second current electrode of the first transistor of the first type and a fourth switched voltage source; and a first transistor of a second type having a first current electrode coupled to the first switched voltage source, a control electrode coupled to the second node of the switched current source, and a second current electrode coupled to a second current electrode of the third transistor of the first type at a driver voltage node, wherein a voltage level at the driver voltage node is operable to drive the control gate of the split-gate nonvolatile memory cell.