Patent ID: 8173545
Filing Date: 2012-05-08
Classification: C23C,G03F,H01L

Abstract:
1. A method for the fabrication of a microelectronic device with one or more transistors, which includes the fabrication of at least one transistor gate on a semi-conducting structure that comprises at least one first semi-conducting block and at least one second semi-conducting block resting on a substrate, with one or more semi-conducting bars connecting the first block and the second block, said semi-conducting bars being suspended above the substrate and not in contact with the substrate, said semi-conducting bars being designed to form one or more transistor channels, the fabrication of said gate comprising the steps of: a) depositing over at least part of said semi-conducting structure of at least one layer based on an organometallic precursor material, wherein said depositing being achieved so as to fill in at least one zone under said suspended bars by means of said precursor material, b) exposing one or more zones of the layer based on the organometallic precursor material to at least one electron beam so as to reach parts of the precursor material located under said suspended bars, c) reducing of the organometallic precursor material so as to form one or more metallic zones on said structure at the level of said zones exposed to the beam or beams, at least one of said metallic zones forming a closed ring or a closed band around said suspended bars.