Patent ID: 7990867
Filing Date: 2011-08-02
Classification: H04L

Abstract:
1. A pipeline for processing network packets, comprising: a look-ahead stage configured to synchronize between at least a first and second one of a plurality of fields of a network packet; an operation stage coupled to the look-ahead stage, the operation stage configured to modify at least one of the fields of the network packet, wherein the first field and state data are each modified as a function of at least one of the state data and at least the second field; wherein the first field is received by the look-ahead stage before the second field, and the first and second fields of the network packet are made concurrently available by the look-ahead stage for processing by the operation stage; an insert/remove stage coupled to the operation stage, the insert/remove stage configured to perform at least one of data insertion and data removal at each of at least one of the fields of the network packet; and an interleave stage coupled to the insert/remove stage, the interleave stage configured to ensure that the network packet follows at least one rule for interleaving network packets, wherein the look-ahead, operation, insert/remove, and interleave stages are implemented in an integrated circuit.