Patent ID: 6483353
Filing Date: 2002-11-19
Classification: G11C,H03K

Abstract:
A current sense amplifier, comprising:first and second sense transistors having cross-coupled gates and drains; first and second load devices having first terminals connected to respective drains of said first and second sense transistors; a latch having first and second inputs connected to respective drains of said first and second sense transistors; an enable device that is responsive to an enable signal and has a first terminal connected to second terminals of said first and second load devices and a first output of said latch; and a bias circuit that generates the bias signal on an output signal line in response to a control signal, wherein the bias circuit comprises: a first PMOS transistor having a source connected to a power supply voltage and a gate and a drain connected together; a first NMOS transistor responsive to the control signal having a drain connected to the gate and drain of the first PMOS transistor and a source connected to the output signal line; second and third NMOS transistors connected in a totem pole arrangement between the output signal line and a ground voltage and having cross coupled gates and drains in a diode structure; and a fourth NMOS transistor having a gate connected to the control signal, a drain connected to the output signal line and a source connected to the ground voltage.