Patent ID: 7215562
Filing Date: 2007-05-08
Classification: G11C,H01L

Abstract:
1. A semiconductor storage device in which a plurality of pairs of wiring lines extending in a first direction are arranged repeatedly with a predetermined pitch, comprising: a group of pair transistors in which a plurality of pair transistors having a same amplifying function is arranged according to a predetermined structural pattern, each of said pair transistors is connected to a respective pair of said plurality of pairs of wiring lines and is composed of a MOS transistor of which a gate is connected to one line of said respective pair of wiring lines and of another MOS transistor of which a gate is connected to the other line of said respective pair of wiring lines, wherein said predetermined structural pattern forms a repetition unit that is repeated for the plurality of pairs of wiring lines, one of said pair transistors of the repetition unit having two MOS transistors that are adjacent to each other in said first direction, and at least one of said pair transistors of the repetition unit having two MOS transistors that are not adjacent to each other and are diagonally opposite to each other.