Patent ID: 6228691
Filing Date: 2001-05-08
Classification: B82Y,H01L

Abstract:
A process of fabricating a silicon-on-insulator(SOI) substrate, comprising:forming a dielectric layer on a surface of a semiconductor wafer;forming a barrier layer having a hardness substantially greater than the dielectric layer, on the dielectric layer;forming a first trench through a portion of the barrier layer;forming a second trench through the barrier layer and the dielectric layer to expose a portion of the semiconductor wafer;growing a silicon layer from the exposed portion of the semiconductor wafer to fill the second trench and the first trench;planarizing the silicon layer using the barrier layer as a polish-stop layer to isolate the silicon within the first trench from the silicon in the second trench; andforming a silicon-on-insulator (SOI) device in the silicon within the first trench.