Patent ID: 7629208
Filing Date: 2009-12-08
Classification: H01L

Abstract:
1. A method of manufacturing a thin film transistor comprising the steps of: forming a gate electrode, a gate insulating film, a first amorphous silicon film, and a first insulating layer over an insulative substrate in this order; forming a photothermal conversion layer on the first insulating layer; forming a crystalline silicon film by crystallizing the first amorphous silicon film by irradiating the photothermal conversion layer with a light beam to provide heat treatment for the first amorphous silicon film through the photothermal conversion layer and the first insulating layer; removing the photothermal conversion layer; forming a second insulating layer on the first insulating layer after said removal of the photothermal conversion layer; forming a channel protective film by patterning the first and second insulating layers to selectively leave only a region thereof corresponding to a channel region of the crystalline silicon film; and forming a source region and a drain region from an n+ silicon film and forming a source electrode and a drain electrode from a metal layer by forming the n+ silicon film and the metal layer on the channel protective film and the crystalline silicon film in this order, patterning the crystalline silicon film and the n+ silicon film to selectively leave only a region thereof corresponding to the gate electrode, and selectively removing a region corresponding to the channel region in the n+ silicon film and the metal layer with the use of the channel protective film as an etching stopper.