Patent ID: 6998683
Filing Date: 2006-02-14
Classification: H01L

Abstract:
1. A CMOS inverter comprising: a PFET device; an NFET device; a transistor gate common to both devices; the PFET device being stacked over the NFET device; a first n-type doped semiconductive material over the gate; the PFET device including p-type doped source/drain regions extending upwardly from adjacent the gate and into the first n-type doped semiconductive material, the p-type doped source/drain regions not extending entirely through the first n-type doped semiconductive material; the NFET device including n-type doped source/drain regions extending downwardly from adjacent the gate; and a second n-type doped semiconductive material extending from one of the n-type source/drain regions to the first n-type doped semiconductive material.