Patent ID: 6228675
Filing Date: 2001-05-08
Classification: B81B,H01L

Abstract:
A method of manufacturing a wafer package comprising:providing a first wafer, a second wafer, and a micro device;forming a bonding pad and a peripheral pad on said first wafer, said peripheral pad encompassing said bonding pad;forming a seal on said second wafer, said seal configured to match said peripheral pad;forming a well in said second wafer;forming a conductor in said well integral with said second wafer;bonding said first and said second wafers together using said seal to form a hermetically sealed volume therebetween, said second wafer positionable with said conductor in conductive contact with said bonding pad, and said micro device disposed in said hermetically sealed volume and connected to said bonding pad; andremoving a portion of said second wafer whereby said conductor is exposed outside said hermetically sealed volume.