Patent ID: 6563201
Filing Date: 2003-05-13
Classification: H01L

Abstract:
A system carrier for a semiconductor chip having contact terminals, the system carrier comprising:a conductor frame divided into a plurality of conductor frame webs including longitudinal webs and transverse webs; said conductor frame including a plurality of signal conductors extending from said plurality of conductor frame webs and having free ends with contact terminal faces; said contact terminal faces configured for connection to the contact terminals on the semiconductor chip; said conductor frame including a plurality of flat conductors with free ends in remaining faces disposed between said plurality of conductor frame webs and said plurality of signal conductors; said remaining faces selected from the group consisting of trapezoidal faces and triangular faces; said plurality of flat conductors being functional elements selected from the group consisting of power supply conductors for supplying power to the semiconductor chip and volumetric balancing pieces; and at least two connecting webs disposed in parallel between one of said plurality of conductor frame webs and each of said plurality of flat conductors, each of said at least two connecting webs including a single bent area, said bent area of one of said at least two connecting webs being disposed at a distance from said one of said plurality of conductor frame webs different from a distance of said bent area of another of said at least two connecting webs from said one of said plurality of conductor frame webs.