Patent ID: 7373484
Filing Date: 2008-05-13
Classification: G06F

Abstract:
1. A method of controlling write operations to a non-renamed register space of an out-of-order execution processor, said method comprising: receiving a write operation to a given register within said non-renamed register space; checking a bit that corresponds to said given register, and that indicates whether a pending write operation to said given register exists; blocking said write operation to said given register from being scheduled in response to said bit indicating that said pending write operation to said given register exists; allowing said write operation to said given register to be scheduled in response to said bit indicating that said pending write operation to said given register does not exist; allowing a subsequent write operation to a different register within said non-renamed register space to be scheduled in response to a different bit indicating that a pending write operation to said different register does not exist; and causing said bit that corresponds to said given register to indicate that said pending write operation to said given register does not exist in response to detecting that said pending write operation to said given register is an oldest operation scheduled for execution but has not issued to an execution unit for execution.