Patent ID: 7689779
Filing Date: 2010-03-30
Classification: G06F

Abstract:
1. A method for controlling access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program, comprising: granting access to the memory area to one of the first processor and the second processor at a time, where access to the memory area by the first processor and the second processor are cyclically uniquely allocated between the first and the second processor by the first and the second processor programs, where access to the memory allocated by the first and the second processor programs is furnished through cyclically uniquely allocated program addresses (ad), where the step of granting comprises providing memory accesses to the memory area at the cyclically uniquely allocated program addresses (ad) for the first processor, which, in comparison with program addresses for memory accesses of the second processor are furnished at a value (o) offset relative to a cycle time (m).