Patent ID: 6380773
Filing Date: 2002-04-30
Classification: H03K

Abstract:
A prescalar using a fractional division theory, comprising:an input amplifier, amplifying a signal to an operable digital level of the prescalar; a divided-by-2 circuit, coupled to the input amplifier to divide the digital level signal by 2, and to output the divided-by-2 signal; a synchronously divided-by {fraction (2/2.5)} two mode frequency divider, coupled to the divided-by-2 circuit to divide the divided-by-2 signal by 2.5, and to output the divided-by-2.5 signal; and a non-synchronously divided-by-{fraction (16/13)} two mode frequency divider, coupled to the synchronously divided-by-{fraction (2/2.5)} two mode frequency divider, to divide the divided-by-{fraction (2/2.5)} signal by {fraction (16/13)}, and to output the divided-by-{fraction (16/13)} signal.