Patent ID: 6103572
Filing Date: 2000-08-15
Classification: H01L

Abstract:
A method of fabricating a semiconductor nonvolatile storage device comprising the steps of:forming an element region and an element isolation region on a semiconductor substrate;forming a memory gate insulation film by sequentially layering a tunnel oxide film, a silicon nitride film and a top oxide film on the element region of the semiconductor substrate;forming a memory gate electrode on the memory gate insulation film;forming heavily doped diffusion regions at element region portions of the semiconductor substrate self-aligned on opposite sides of the memory gate electrode;forming an interlayer insulator over the whole surface of the semiconductor substrate including the memory gate electrode;forming contact holes in the interlayer insulator at positions thereof corresponding to the memory gate electrode and the heavily doped diffusion regions;forming interconnection electrodes passing through the contact holes and connecting with the memory gate electrode and the heavily doped diffusion regions;forming a passivating film over the whole surface of the semiconductor substrate including the interconnection electrodes by a plasma chemical vapor deposition process;forming openings for input/output terminals in the passivating film at positions thereof corresponding to the memory gate electrode and the heavily doped diffusion regions by plasma etching;annealing the passivating film; andannealing the interconnection electrodes following the step of forming interconnection electrodes, and said annealing the passivating film is conducted at a higher temperature than the annealing temperature in the interconnection electrodes annealing.