Patent ID: 7341913
Filing Date: 2008-03-11
Classification: H01L

Abstract:
1. A method for manufacturing a non-volatile memory, comprising: providing a substrate; forming a mask layer on the substrate; forming an isolation structure in the mask layer and the substrate; removing a portion of the isolation structure to form at least one recession between the isolation structure; forming a spacer at the sidewall of the recession; filling up the recession with an isolating layer; removing the mask layer and the spacer to form a first opening exposing a portion of the substrate; forming a tunneling dielectric layer over the substrate; forming a first conductive layer to fill the first opening; removing the isolating layer to form a second opening in the first conductive layer; forming a gate dielectric layer over the substrate; forming a second conductive layer on the gate dielectric layer; and patterning the second conductive layer and the first conductive layer.