Patent ID: 9111871
Filing Date: 2015-08-18
Classification: H01L

Abstract:
1. A method for forming a semiconductor structure, comprising: providing a substrate having a plurality of isolation structures, a top surface of the plurality of isolation structures being higher than a surface of the substrate; forming a device layer on the substrate and on the plurality of isolation structures; polishing the device layer using a polishing process, such that the top surface of the plurality of isolation structures are exposed, with residue remaining on the device layer and on the plurality of isolation structures; and removing the residue from the device layer and from the plurality of isolation structures using a non-polishing-removal process, such that the top surface of the plurality of isolation structures and a top surface of the device layer are substantially leveled and smooth, wherein the non-polishing-removal process reduces a thickness of the device layer and a thickness of the plurality of isolation structures by a thickness amount ranging from about 30 Å to about 80 Å.