Patent ID: 6148437
Filing Date: 2000-11-14
Classification: G06F

Abstract:
A computer system having at least one central processing unit (CPU) and at least one memory unit having stored therein a plurality of original instructions of an executable file, the plurality of original instructions comprising a plurality of target instructions and a plurality of jump instructions, the at least one memory unit also having a set of jump-evaluating-trace-designator instructions for execution by the at least one CPU, the jump-evaluating-trace-designator instructions designating, when so executed, at least one trace in the original instructions, the at least one trace having a start instruction and an end instruction, the set of jump-evaluating-trace-designator instructions comprisinga set of start-end-designator instructions that, when executed by the at least one CPU,(a) designates a target instruction as the start instruction upon at least one start-trace counter corresponding to the target instruction reaching a start-trace threshold, wherein the reaching of the start-trace threshold is determined by control passing to the target instruction, and(b) designates a jump instruction as the end instruction upon at least one jump-type counter corresponding to the jump instruction reaching an end-trace threshold, wherein the reaching of the end-trace threshold is determined by control passing through the jump instruction.