Patent ID: 6629115
Filing Date: 2003-09-30
Classification: G06F

Abstract:
In a RISC-based computer processing core having a general purpose register file, a method of shifting packed data of M N-bit elements comprising steps of:receiving an instruction, the instruction specifying a shift amount and a shift direction; and decoding the instruction to produce control signals; in response to the control signals: selecting one of the general purpose registers; bit-level shifting the data contained therein by a first amount based on the shift amount and by at most seven bit positions to produce a bit-shifted datum; re-ordering the bits of the bit-shifted datum to produce an intermediate result representative of a byte-level shifting of the bit-shifted datum by a second amount based on the shift amount; producing a mask based on the shift amount; and for each bit in the intermediate result, either producing the bit or producing a preselected bit value based on the mask to form a final result.