Patent ID: 7643354
Filing Date: 2010-01-05
Classification: G06N

Abstract:
1. A memory matrix device for storing temporally sequential information in a manner that retains the sequence of information without dependence on multiple memory addresses, and is not a serial sequential access memory, a random access memory or a dynamic random access memory, comprising: sequentially-connected arrays of fixed memory storage units; means for applying the temporally sequential information to the arrays of fixed memory storage units; and means for successively latching and disabling each successive fixed memory storage unit in a sequentially-connected array of said units, each array becoming enabled and then unenabled in temporal sequence, thereby directing the next temporal bit of information to the next memory storage unit in said sequentially-connected array, and wherein, the input to the sequentially-connected array of fixed memory storage units is disabled upon completion of storage of a temporally sequential event to prevent overwriting.