Patent ID: 6346439
Filing Date: 2002-02-12
Classification: H01L

Abstract:
A method for forming graded junction regions operatively adjacent a transistor gate of CMOS circuitry, the method comprising the following steps:providing a semiconductor material wafer, wherein the semiconductor material wafer comprises an overall planar global configuration, the planar global configuration establishing a virtual planar top surface and an axis normal to the virtual planar top surface; defining a PMOS region and an NMOS region of the wafer; providing a PMOS transistor gate over the PMOS region and providing an NMOS transistor gate over the NMOS region, the transistor gates having opposing lateral sidewalls; providing sidewall spacers adjacent the sidewalls of the NMOS and PMOS transistor gates, the sidewall spacers having a lateral thickness and comprising a sidewall spacer material; providing a masking layer over the PMOS region; after providing the masking layer over the PMOS region, implanting an n-type conductivity-enhancing dopant into the semiconductor wafer to form electrically conductive NMOS source/drain regions within the semiconductor material operatively adjacent the NMOS transistor gate; after forming the electrically conductive NMOS source/drain regions, stripping the masking layer from over the PMOS region and etching the sidewall spacer material adjacent the NMOS transistor gate and the PMOS transistor gate to remove only a portion of said spacer material and to thereby decrease the lateral thickness of the sidewall spacers adjacent the NMOS transistor gate and the PMOS transistor gate; and after decreasing the lateral thickness of the sidewall spacers adjacent the NMOS transistor gate and the PMOS transistor gate, blanket implanting the p-type conductivity-enhancing dopant at an angle other than parallel to the axis normal to the virtual planar top surface to form NMOS halo regions operatively adjacent the NMOS transistor gate and to form PMOS LDD regions operatively adjacent the PMOS transistor gate.