Patent ID: 6876072
Filing Date: 2005-04-05
Classification: H01L,H05K

Abstract:
1. A semiconductor chip assembly, comprising: a semiconductor chip that includes first and second opposing major surfaces, wherein the first surface of the chip includes a conductive pad; a substrate that includes first and second opposing major surfaces, wherein the first and second surfaces of the substrate include a conductive terminal and a dielectric base, the conductive terminal extends through the dielectric base to the first and second surfaces of the substrate, a cavity extends from the first surface of the substrate into the substrate, the first surfaces of the chip and the substrate face in a first direction, the second surfaces of the chip and the substrate face in a second direction, and the chip extends into the cavity, a conductive trace in an electrically conductive path between the conductive terminal and the pad, wherein the electrically conductive path extends outside the cavity and is devoid of wire bonds and TAB leads; and an adhesive disposed between the conductive trace and the chip, the conductive trace and the substrate, and the chip and the substrate.