Patent ID: 7053440
Filing Date: 2006-05-30
Classification: H01L

Abstract:
1. A non-volatile semiconductor memory device comprising: a first conductive type well formed within a semiconductor substrate; and a memory cell having a gate insulating film, a floating gate, an insulating film, a control gate and a pair of source/drain region, the gate insulating film, the floating gate, the insulating film, the control gate being layered in this order above the first conductive type well, the pair of source/drain regions being made up of second conductive type diffusion layers and formed within the first conductive type well, wherein the source region is electrically connected to the first conductive type well via at least a high concentration region formed in a trench, and wherein the drain region is shared by two adjacent memory cells in a direction in which an active region extends, and the source region is also shared by two memory cells adjacent to each other in the direction in which the active region extends and is electrically connected to the first conductive well.