Patent ID: 9143089
Filing Date: 2015-09-22
Classification: H03F,H03G

Abstract:
1. An active cascode circuit, comprising: an input and an output; a first transistor having a first terminal, a second terminal, and a gate, the first terminal coupled to the output and the second terminal coupled to the input, where the first terminal comprises a drain and the second terminal comprises a source; a load coupled between the gate and a first node; a second transistor having a backgate and a first, second and third terminal, the first terminal coupled to the gate, the second terminal coupled to the input, and the third terminal coupled to a second node; a control circuit having a control output coupled to the backgate of the second transistor, the control circuit configured to provide a voltage on the backgate of the second transistor to adjust the gate to source voltage (VGS) of the second transistor.