Patent ID: 6937499
Filing Date: 2005-08-30
Classification: G11C

Abstract:
1. A method for determining a logic state of selected memory cells provided in a passive matrix-addressable data storage device containing word and bit lines, wherein a specific logic state is assigned a unique logical value according to a predetermined protocol, wherein said cells store data in the form of an electrical polarization state in capacitor-like structures comprising a polarizable material, particularly a ferroelectric or electret material capable of exhibiting hysteresis, wherein said polarizable material is capable of maintaining a non-vanishing electrical polarization in the absence of an externally impressed voltage across said capacitor-like structures, wherein a selection of memory cells takes place by activating the word line or the bit line or both crossing at a memory cell in question, wherein the activation of a word line or a bit line is effected by externally applied potential differences therebetween, thus subjecting said selected cells to a small-signal probing voltage arising from the applied potential difference, whereby a current response is generated from said cells, wherein said small-signal probing voltage is time-dependent in an arbitrarily selectable fashion and has voltage amplitudes and/or durations less than those required for causing significant permanent change in the polarization states of said cells, wherein said logic state is determined by detecting components in said current response from said selected cell, wherein the components of the current response are temporarily correlated with said small-signal probing voltage or referencing signals derived from same, and wherein a decision on a logic state of a selected cell is performed on the basis of a comparison of said current response with a set of predefined criteria, characterized by applying time-dependent potentials on selected word and bit lines or groups, of word and bit lines, said time-dependent potentials being mutually coordinated in magnitude and time such that the resulting voltages across all or some of the non-addressed cells at the crossing points between inactive word lines and an active bit line or active bit lines and/or between inactive bit lines and at least one active word line are brought to contain only negligible voltage components that are temporally correlated with said small-signal probing voltage or referencing signals derived from the same.