Patent ID: 6200852
Filing Date: 2001-03-13
Classification: H01L

Abstract:
A method for fabricating a DRAM capacitor, said method being enable the pinhole defects in the capacitor dielectric layer unmatch, said method comprising the steps of:providing a semiconductor substrate, said semiconductor substrate having a DRAM transistor thereon and a bottom plate of said DRAM capacitor formed;removing a native oxide layer on said semiconductor substrate using dilute HF solution;performing a first ammonium treatment so as to form a first oxynitride layer;forming a first silicon nitride layer on said first oxynitride layer;forming a first HTO layer on said first silicon nitride layer;performing a second ammonium treatment so as to transform said first HTO layer into a second oxynitride layer;forming a second silicon nitride layer on said second oxynitride layer;forming a second HTO layer on said second silicon nitride layer;performing a third ammonium treatment so as to transform said second HTO layer into a third oxynitride layer; andforming a polysilicon layer on said third oxynitride layer for serving as a top plate of said DRAM capacitor.