Patent ID: 7888992
Filing Date: 2011-02-15
Classification: G11C

Abstract:
1. A circuit for controlling an internal voltage in a semiconductor device having an active period and a precharge period, comprising: a level detector configured to detect a voltage level of a core voltage during a second period of the active period in response to an enable signal, and to generate a core voltage level detection signal; a release controller configured to generate a release control signal according to the core voltage level detection signal; and a core voltage release driver configured to release the core voltage according to the release control signal, wherein the active period comprises a first period for an overdriving operation to a core voltage terminal, and the second period between a finish of the first period and a start of the precharge period, and the level detector generates the core voltage level detection signal, when the voltage level of the core voltage is higher than the reference voltage, wherein a pulse width of the release control signal is determined based on the core voltage level detection signal, and the release controller comprises: a first operation unit configured to perform an operation on the enable signal and the core voltage level detection signal to generate a pull up control signal; second operation unit configured to perform an operation on the enable signal and the core voltage level detection signal to generate a pull down control signal; a pull up/down switch unit configured to be selectively operated by the pull up control signal and the pull down control signal to determine an output voltage level of the release control signal; and a latch unit configured to latch an output signal of the pull up/down switch unit.