Patent ID: 6539535
Filing Date: 2003-03-25
Classification: G06F

Abstract:
A programmable logic integrated circuit comprising:a plurality of logic elements; an integrated logic analyzer, said integrated logic analyzer comprising: a plurality of probe storage elements, each one of the plurality of probe storage elements in electrical communication with a corresponding one of said plurality of logic elements for capturing a data sample output from said corresponding one of said plurality of logic elements, said plurality of probe storage elements arranged into a probe storage element array on the reprogrammable logic integrated circuit, said probe storage element array having a plurality of read ports and a plurality of probe data stream outputs; a probe sequence memory circuit, said probe sequence memory circuit addressing said plurality of read ports to provide for random access through said plurality of probe data stream outputs to any of said plurality of probe storage elements; and a plurality of event detectors, said plurality of event detectors in communication with said plurality of probe data stream outputs from said probe storage element array.