Patent ID: 6438028
Filing Date: 2002-08-20
Classification: G11C,H01L

Abstract:
A semiconductor integrated circuit device having a non-volatile memory, comprising:a well of a first conductivity type formed on a main surface of a semiconductor substrate, a plurality of semiconductor regions of a second conductivity type formed in said well and extending in a first direction and in parallel with one another, a plurality of first gates formed over portions of said well located between said plurality of semiconductor regions through a first insulator film, and arranged in matrix, a plurality of second gates each formed over at least some of said first gates arranged in identical lines through a second insulator film and extending in a second direction crossing said first direction, and a plurality of third gates extending in said first direction, wherein: a plurality of memory cells, each including one of said first gates, are electrically connected in parallel between adjoining pairs of said semiconductor regions, and each of said third gates is buried in a space between two of said first gates adjoining each other as viewed in said second direction in such a manner that an upper surface of said third gate is at a lower level than that of an upper surface of said first gate, and a third insulator film is formed between a side surface of each of said first gates and a side surface of each of said third gates.