Patent ID: 9036197
Filing Date: 2015-05-19
Classification: G06F

Abstract:
1. An apparatus which controls transfer of input data containing a plurality of lines stored across a plurality of memory regions including a first memory region and a second memory region to a processing unit, the apparatus comprising: a specifying unit configured to specify a position of a line of target of output data containing a plurality of lines output from the processing unit; a determining unit configured to determine a number of lines of input data to be transferred from the first memory region and their addresses and determine a number of lines of input data to be transferred from the second memory region and their addresses based on the position of the line of target specified by the specifying unit; and a control unit configured to control based on a determination result from the determining unit such that input data for a number of lines may be transferred from the first memory region and input data for a number of lines may be transferred from the second memory region.