Patent ID: 6035313
Filing Date: 2000-03-07
Classification: G06F

Abstract:
An address generator for a fast Fourier transform device, said address generator comprising:a counter having a counter output;a memory;a series of M stages, where M represents the number of points to be transformed, each stage of said M stages comprising:a coupling to said counter;a first operator having an input coupled to said counter output, said first operator being a reverse-count digit operator;a second operator having an input coupled to an output of a preceding stage, said second operator being a circular-rotate-left-upper-j-digits-by-one-position-operator.;a multiplexer having a first input coupled to an output of said first operator and a second input coupled to said second operator; andan address output, said address output for providing memory addresses to said memory of said fast Fourier transform device, said address output coupled to said the last stage counter.