Patent ID: 8455359
Filing Date: 2013-06-04
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: forming a first insulating interlayer on a substrate; forming a first wiring to pass through the first insulating interlayer; sequentially forming a first etch stop layer and a second insulating interlayer on the first insulating interlayer; partially removing the second insulating interlayer and the first etch stop layer to form therethrough a plurality of contact holes including a first contact hole and a plurality of dummy contact holes including a first dummy contact hole, the first contact hole exposing the first wiring; filling the contact holes and the dummy contact holes with a same conductive material to form a plurality of contact plugs including a first contact plug and a plurality of dummy contact plugs including a first dummy contact plug, respectively, the first contact plug and the first dummy contact plug electrically isolated from each other; sequentially forming a second etch stop layer and a third insulating interlayer on the second insulating interlayer; and forming a first conductive pattern and a first dummy conductive pattern to pass through the third insulating interlayer and the second etch stop layer, the first conductive pattern and the first dummy conductive pattern electrically isolated from each other, the first conductive pattern contacting the first contact plug, wherein the first contact plug contacts the first wiring, and wherein the first dummy conductive pattern is electrically isolated from any dummy contact plug.