Patent ID: 7116583
Filing Date: 2006-10-03
Classification: G11C,H01L

Abstract:
1. An electrically programmable memory cell comprising: a memory transistor having a first and second semiconductor zone of a first conduction type, a first body zone, which has a channel zone arranged between the first and second semiconductor zones, a storage electrode, which is isolated from the first and second semiconductor zones and the first body zone by a first insulation layer and which is formed at least in sections as tunnel insulation layer, and a first control electrode, which is arranged in a manner electrically insulated from the storage electrode; a selection transistor having a third and fourth semiconductor zone of the first conduction type, a second body zone of a second conduction type, which has a channel zone arranged between the third and fourth semiconductor zones, and a second control electrode, which is isolated from the third and fourth semiconductor zones and the second body zone by a second insulation layer; wherein the second semiconductor zone of the memory transistor is electrically conductively connected to the third semiconductor zone of the selection transistor; wherein the third semiconductor zone of the selection transistor has a connection zone and an intermediate zone doped more weakly than the connection zone, the intermediate zone being arranged between the connection zone and the channel zone; and wherein the second body zone is connected to a terminal for a reference potential.