Patent ID: 8265095
Filing Date: 2012-09-11
Classification: G06F

Abstract:
1. A logic circuit-implemented method of a resource management finite state machine (RM FSM) managing one or more resources required by a protocol finite state machine (protocol FSM) in a FSM environment, said method comprising: said RM FSM receiving a resource request vector from said protocol FSM, wherein said resource request vector indicates said one or more resources required by said protocol FSM, wherein said RM FSM is in a first RM FSM state prior to said receiving said resource request vector, and wherein said RM FSM being in said first RM FSM state indicates said one or more resources are available to said protocol FSM; said RM FSM determining not all of said one or more resources are available to said protocol FSM; subsequent to said determining not all of said one or more resources are available, said protocol FSM transitioning from being in a first protocol FSM state (S subsequent to said determining not all of said one or more resources are available, said protocol FSM generating an output vector and loading said output vector into a first register for storing output, wherein said first register is coupled to said protocol FSM; subsequent to said determining not all of said one or more resources are available, said RM FSM transitioning to a second RM FSM state that indicates not all of said one or more resources are available to said protocol FSM; subsequent to said determining not all of said one or more resources are available, a logic circuit that implements said RM FSM freezing an input register coupled to said protocol FSM; subsequent to said determining not all of said one or more resources are available, said logic circuit that implements said RM FSM controlling said FSM environment by freezing said first register, freezing a current state register coupled to said protocol FSM, and forcing said output vector to be seen by said FSM environment as a null token; subsequent to said RM FSM controlling said FSM environment, said RM FSM determining said one or more resources are available to said protocol FSM; subsequent to said determining said one or more resources are available, said RM FSM transitioning to said first RM FSM state; subsequent to said determining said one or more resources are available, said RM FSM enabling said output vector to be seen by said FSM environment as said output vector loaded into said first register by said loading; and subsequent to said determining said one or more resources are available, said logic circuit that implements said RM FSM unfreezing said protocol FSM.