Patent ID: 7451300
Filing Date: 2008-11-11
Classification: G06F

Abstract:
1. In a computer system comprising a microprocessor, a method of providing partial speculative operation in lieu of suspending speculation, said method comprising: operating in a first mode of speculative operation, said first mode permitting speculation of a first set of speculative operations; experiencing an event during said operating; in response to said event, restoring a state of said microprocessor to a state committed to memory prior to said event; subsequent to said restoring, suspending a non-null first subset of said first set of speculative operations, wherein speculative operations in said first subset are not permitted during said suspending; and exiting said first mode and entering a second mode of speculative operation in response to said event, said second mode permitting speculation of a non-null second subset of said first set, wherein said first subset comprises input/output (I/O) writes, main memory reads, and main memory writes, wherein said first mode permits speculation for handling non-architectural faults, wherein said second subset comprises operations that involve memory that is private to said microprocessor, and wherein said second mode permits speculation for handling architectural faults.