Patent ID: 6456131
Filing Date: 2002-09-24
Classification: H03L

Abstract:
A charge pump circuit, comprising:an input node for receiving a clock signal; an inverter having an input coupled to said input node and having an output coupled to a first plate of a first capacitor; a first MOS transistor having its gate coupled to said input node and having its source and drain being coupled between a first polarity terminal of a voltage source and a second plate of said first capacitor; a second MOS transistor having its drain and gate coupled to a common connection node of said first MOS transistor and said first capacitor, and having its source coupled to said first polarity terminal of said voltage source; and a third MOS transistor having its gate coupled to said common connection node of said first MOS transistor and said first capacitor, having its source coupled to said first polarity terminal of said voltage source, and having its drain coupled to a first plate of a second capacitor, a second plate of said second capacitor being coupled to a second polarity terminal of said voltage source, a common connection node of said third MOS transistor and said second capacitor providing a controllable voltage output.