Patent ID: 6773970
Filing Date: 2004-08-10
Classification: H01L

Abstract:
A method of producing a semiconductor device comprising the steps of:forming a gate insulating film as a layer secured to a substrate; forming a gate electrode material layer above the gate insulating film; processing the gate electrode material layer by etching to form a gate electrode; diffusing an impurity into the gate electrode material layer; forming a first insulating film covering a top surface and side surfaces of the gate electrode by a deposition method that controls a film thickness at an atomic layer level; forming a second insulating film over the first insulating film; forming a third insulating film on the second insulating film; etching the third insulating film so as to leave the third insulating film only adjacent the side surfaces of the gate electrode to form a gate side wall spacer made of the third insulating film; introducing an impurity through the first and second insulating films to form source/drain regions by self-alignment with respect to the gate side wall spacer; and removing the first and second insulating films on the source/drain regions and on the gate electrode via a wet etching process.