Patent ID: 6627942
Filing Date: 2003-09-30
Classification: H01L

Abstract:
A semiconductor structure for use in the manufacture of an electrically programmable and erasable memory device, comprising:a substrate of semiconductor material of a first conductivity type; a first layer of insulating material formed on the substrate; a layer of conductive material formed on the first layer of insulating material; a plurality of spaced apart trenches extending through the first layer of insulating material, the layer of conductive material, and into the substrate: a second layer of insulation material formed on sidewall portions of the trenches; and a block of insulation material formed in the trenches; wherein for each of the trenches, an edge portion of the layer of conductive material extends over and overlaps with the second layer of insulating material by a predetermined distance &Dgr;; and wherein for each of the trenches, the edge portion of the layer of conductive material further extends over and overlaps with a portion of the block of insulation material.