Patent ID: 6064080
Filing Date: 2000-05-16
Classification: H01L

Abstract:
A semiconductor device having first and second major surfaces opposite to each other and conducting/cutting off current flowing between said first and second major surfaces, comprising:a semiconductor substrate having said first and second major surfaces;a first impurity region of a first conductivity type formed to extend from said first major surface into said semiconductor substrate;a second impurity region of a second conductivity type selectively formed in said first impurity region;a third impurity region of the first conductivity type selectively formed in said second impurity region;a channel formation region located in said second impurity region and at which a channel is formed;a gate dielectric layer formed along said channel formation region;a gate electrode which is opposed to said channel formation region with said gate dielectric layer therebetween;a first electrode layer formed on said first major surface to be electrically connected to said second impurity region;a second electrode layer formed on said first major surface to be electrically connected to said third impurity region;forward bias means for applying forward bias to a pn junction between said second and third impurity regions;forward bias control means connected to said forward bias means for controlling a value of voltage applied to said pn junction by said forward bias means;a fourth impurity region of the second conductivity type formed to extend from said second major surface into said semiconductor substrate; anda third electrode layer formed on said second major surface to be electrically connected to said fourth impurity region.