Patent ID: 7259708
Filing Date: 2007-08-21
Classification: H03M

Abstract:
1. A cyclic pipeline analog to digital converter, comprising: a sample/hold module, which generates a sample signal according to an analog-input signal and a residual signal; a sub-analog/digital converting module, which generates a first control signal and a second control signal at different time alternately according to a digital converting result of the sample signal; and an alternate digital/analog converting module, which decides to receive a first reference signal and a second reference signal separately according to the first control signal and the second control signal, generates a first transfer signal according to at least the sample signal among the sample signal, the first reference signal and a first feedback signal, generates a second transfer signal according to at least the sample signal among the sample signal, the second reference signal and the first feedback signal, and generates the first feedback signal and the residual signal according to one of the first transfer signal and the second transfer signal.