Patent ID: 6044036
Filing Date: 2000-03-28
Classification: G11C,H03K

Abstract:
A differential buffer circuit comprising:a first differential amplifier having gain elements comprised of transistors of a first conductivity type and having an internal current node, a first input terminal, a second input terminal, a first differential signal terminal, and a second differential signal terminal;a first transistor of the first conductivity type having a control electrode, a first current electrode coupled to the internal current node of the first differential amplifier, and a second current electrode coupled to the first differential signal terminal;a second transistor of the first conductivity type having a control electrode, a first current electrode coupled to the internal current node of the first differential amplifier, and a second current electrode coupled to the second differential signal terminal; anda second differential amplifier having gain elements comprised of transistors of a second conductivity type and having a first input terminal coupled to the first input terminal of the first differential amplifier, a second input terminal coupled to the second input terminal of the first differential amplifier, a first output coupled to the control electrode of the first transistor, and a second output coupled to the control electrode of the second transistor.