Patent ID: 6657888
Filing Date: 2003-12-02
Classification: G11C,Y10S

Abstract:
A method of setting and erasing memory comprising the steps of:a. providing a two terminal bistable memory cell comprising at least two high-spin polarization magnetic material comprising junctions, said junctions being separated from one another by insulator, said two terminal bistable memory cell demonstrating at least two stable hysteretic resistance states; said hysteretic resistance states being set by application of positive or negative D.C. current flow therethrough; b. by applying a D.C. voltage across said at least two high-spin polarization magnetic material comprising junctions, causing a D.C. current to flow therethrough, thereby setting a resistive memory state in said memory cell; c. monitoring the resistance across said series of at least two of said at least two high-spin polarization magnetic material comprising junctions by application of a resistance determining A.C. or D.C. current flow therethrough; d. applying a magnetic field to said at least two high-spin polarization magnetic material junctions to erase the memory state set in step b.