Patent ID: 7760280
Filing Date: 2010-07-20
Classification: G02F

Abstract:
1. A method for manufacturing a thin film transistor (TFT) array substrate, comprising: providing an insulating substrate comprising a TFT area, a display area, and a capacitor area; forming a gate electrode at the TFT area and a capacitor electrode at the capacitor area through a first photolithographic process; forming an insulating layer, an amorphous silicon layer, and a doped amorphous silicon layer in turn on the insulating substrate; etching the doped amorphous silicon, the amorphous silicon and the insulating layer at the display area and the capacitor area through a second photolithographic process; forming a source electrode and a drain electrode at the TFT area through a third photolithographic process; forming a passivation layer at the capacitor area through a fourth photolithographic process; and forming a pixel electrode on the substrate through a five photolithographic process, the pixel electrode covering the display area, the capacitor area, and part of the TFT area, the capacitor electrode, the pixel electrode and the passivation layer between the two electrodes cooperatively defining a capacitor.