Patent ID: 8495241
Filing Date: 2013-07-23
Classification: H04L

Abstract:
1. A communication apparatus, comprising: a bus that transfers data between components; a memory; a data generating unit that generates data and stores the data in the memory via the bus; a checksum processor that calculates a checksum for the data read from the memory via the bus, and writes the checksum into a predetermined position in the data stored in the memory via the bus; and a data sending unit that reads, from the memory via the bus, the data having the checksum written in the memory via the bus, and sends the data to a network, wherein, the data generating unit, the checksum processor, the data sending unit reads, from the memory, the first stream data, in which the inverted values of the checksum for the first IP header and the integrated value of the checksums for the first TCP header, the first TCP pseudo header and the first payload are written, and the second stream data, in which the inverted values of the checksum for the second IP header and the integrated value of the checksums for the second TCP header, the second TCP pseudo header and the first payload are written, and then sends the first stream data and the second stream data to the network.