Patent ID: 6583463
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A semiconductor integrated circuit device including:a memory cell comprising a memory cell selecting MISFET, formed on a main surface of a semiconductor substrate, and an information storage capacitor, said information storage capacitor connected in series to said memory cell selecting MISFET and having a lower electrode, a capacitor insulator on said lower electrode and an upper electrode, wherein said lower electrode is made of a conductive material containing ruthenium dioxide (RuO2) as principal ingredient and has a surface roughness (as expressed in terms of the center line average roughness: Ra), of the surface upon which the capacitor insulator is provided, of 1 nm or less; and wherein said capacitor insulator is made of a first crystallized tantalum pentoxide (Ta2O5) layer annealed at a temperature of 750Â° C.-800Â° C. in a first tantalum pentoxide annealing and a second crystallized tantalum pentoxide (Ta2O5) layer annealed at a temperature of 750Â° C.-800Â° C. after the first tantalum pentoxide layer annealing.