Patent ID: 6632715
Filing Date: 2003-10-14
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device in which a nonvolatile memory cell with a floating gate electrode and a field effect transistor are formed on a semiconductor substrate, comprising:(a) the first step of forming the field effect transistor, and a first conductive layer patterned into a predetermined shape via a tunnel insulating film on the semiconductor substrate; (b) the second step of forming a first interlevel insulating film on the semiconductor substrate so as to cover the first conductive layer and the field effect transistor; (c) the third step of selectively etching the first interlevel insulating film to form a first opening for exposing a surface of the first conductive layer, wherein a width of the first opening exceeds a width of the first conductive layer; (d) the fourth step of forming a structure made up of a second conductive layer which is formed on the first conductive layer inside the first opening and patterned into a predetermined shape, and an internal insulating film which is formed on the second conductive layer and patterned into a predetermined shape; and (e) the fifth step of forming a control gate electrode of the nonvolatile memory cell on the internal insulating film, wherein the first and the second conductive layers constitute the floating gate electrode, and the first conductive layer has a planar shape which can be patterned at the same time as a gate electrode of the field effect transistor.