Patent ID: 6121157
Filing Date: 2000-09-19
Classification: B82Y,H01L,Y10S

Abstract:
A method of manufacture a semiconductor device, comprising the steps of:preparing a laminated substrate including a lower semiconductor layer, an upper semiconductor layer and a first insulating layer interposed between said lower and upper semiconductor layers, on an underlying substrate having an insulating surface;forming a first mask pattern on said upper semiconductor layer, said first mask pattern including a fine wire pattern having a narrow stripe shape extending in a first direction;etching said upper semiconductor layer, said first insulating layer, and said lower semiconductor layer using said first mask pattern as a mask, to form a fine wire shaped laminated structure having a narrow stripe shape including a fine wire region of said lower semiconductor layer, said first insulating layer and upper semiconductor layer corresponding to said fine wire pattern of the first mask pattern;removing said first mask pattern;forming a second mask pattern on the surface of said substrate, said second mask pattern including an elongated pattern having a narrow stripe shape extending in a second direction crossing the first direction and overlapping said wire shaped laminating structure;etching said upper semiconductor having a narrow strip shape by using said second mask pattern as a mask, to form a micro box region of said upper semiconductor layer at an area of said fine wire shaped laminated structure which overlaps said elongated pattern of said second mask pattern; andremoving said second mask pattern.