Patent ID: 6124759
Filing Date: 2000-09-26
Classification: H03K

Abstract:
A BICMOS technology comparator, comprising:an integrated BICMOS circuit comprising a first integrated BICMOS portion and a second integrated BICMOS portion;the first integrated BICMOS portion having a first stage with differential inputs capable of operating with input voltages which are, in a common mode, lower than a positive supply potential minus a first threshold voltage, the first stage controlling a first bipolar output transistor;the second integrated BICMOS portion having a second stage with differential inputs for operating with input voltages which are, in the common mode, higher than a negative supply potential plus a second threshold voltage, the second stage controlling a second bipolar output transistor and the output transistors being connected in series between two terminals at the positive and negative supply potentials, a midpoint of their series connection forming an output terminal of the comparator; andmeans for controlling the differential stages according to the voltages applied on their inputs;wherein said means are formed of two switches connected in series between the supply terminals, the midpoint of the series connection of the switches being connected to the output terminal and each switch including a control terminal connected to the midpoint of a series connection of a first current source with the differential stage with which the switch is associated.