Patent ID: 6333678
Filing Date: 2001-12-25
Classification: H03L

Abstract:
An agile phase noise filter comprising:a first phase difference detector for detecting a first phase difference and generating a signal representative of said first phase difference, where said first phase difference may exist between a reference signal and a first feedback signal;a first loop filter for filtering said signal representative of said first phase difference to obtain a first filtered signal;a variable frequency signal source for generating a low phase noise signal, where a frequency of said low phase noise signal is varied according to changes in said first filtered signal and where said varying tends to reduce said first phase difference;a first synthesizer for generating a synthesized signal, where said synthesized signal is phase locked with said reference signal, is dependent upon said low phase noise signal and where a frequency of said synthesized signal has a first pre-determined relationship with a frequency of said reference signal;a frequency multiplier including a frequency scaling phase locked loop including:a second phase difference detector for detecting a second phase difference and generating a signal representative of said second phase difference, where said second phase difference may exist between a signal input to said frequency scaling phase locked loop and a second feedback signal fed back from the output of said frequency scaling phase locked loop;a second loop filter for filtering said signal representative of said second phase difference to obtain a second filtered signal;a high speed variable frequency signal source for generating a frequency scaling phase locked loop output signal, where a frequency of said output signal is varied according to changes in said second filtered signal and where said varying tends to reduce said second phase difference;a second feedback divider for reducing a frequency of said frequency scaling phase locked loop output signal to obtain a divided output signal; anda second synthesizer for generating said second feedback signal, where said second feedback signal is phase locked with said signal input to said frequency scaling phase locked loop, is synthesized from said divided output signal and where a frequency of said second feedback signal approximates a frequency of said signal input to said frequency scaling phase locked loop.