Patent ID: 7982243
Filing Date: 2011-07-19
Classification: H01L

Abstract:
1. A multiple gate transistor comprising: a source structure having a plurality of source fingers extending from a source bus; a drain structure having a plurality of drain fingers extending from a drain bus and interleaved with the plurality of source fingers wherein a meandering path is formed between the source and drain structures; a plurality of gate structures that are substantially parallel with one another and extend along the meandering path between the source and drain structures; a source-drain structure that extends along the meandering path between adjacent ones of the plurality of gate structures to form a source-drain node, wherein the source-drain structure is continuous along the meandering path; and a source-drain extension that is electrically connected to the source-drain structure and externally accessible to facilitate electrical connections to associated circuitry, wherein at least one signal from the associated circuitry is applied to the source-drain node via the source-drain extension.