Patent ID: 7434077
Filing Date: 2008-10-07
Classification: G06F

Abstract:
1. A power control apparatus comprising: a detector for detecting start of power supply; a timing determining unit for determining at least one of timing of CPU reset release and timing of I/O power supply to the CPU after the start of power supply is detected by the detector; a rewritable non-volatile memory for storing a control values for controlling the timing determined by the timing determining unit; and wherein the non-volatile memory stores as the control values a first count value for controlling the timing of reset release of the CPU and a second count value for controlling the timing of I/O power supply to the CPU; the timing determining unit includes: the timing determining unit determines, as the timing of reset release of the CPU, a timing at which the first comparator detects matching between the first count value of the non-volatile memory and the count value of the counter, and to determine, as the timing of I/O power supply to the CPU, a timing at which the second comparator detects matching between the second count value of the non-volatile memory and the count value of the counter.