Patent ID: 6404009
Filing Date: 2002-06-11
Classification: H01L

Abstract:
A semiconductor device comprising:a first conductivity type semiconductor substrate; a second conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate; a first conductivity type impurity diffusion layer formed in a surface region of the second conductivity type semiconductor layer; a second conductivity type source region formed in a surface region of the first conductivity type impurity diffusion layer; a second conductivity type drain region formed in the surface region of the second conductivity type semiconductor layer at a predetermined distance from the first conductivity type impurity diffusion layer; an element isolating insulation layer formed between the second conductivity type source region and the second conductivity type drain region; a gate insulating film formed between the second conductivity type source region and the second conductivity type drain region; and a gate electrode formed on the gate insulating film, wherein a buried layer containing an impurity of the first conductivity type in a higher concentration than that of the first conductivity type semiconductor substrate is formed at least in part in a surface layer of the first conductivity type semiconductor substrate except just below the second conductivity type drain region; a semiconductor device wherein the buried layer is formed in a pattern surrounding the second conductivity type drain region except just below the second conductivity type drain region.