Patent ID: 6606005
Filing Date: 2003-08-12
Classification: H03C,H03L

Abstract:
A phase-locked loop circuit, comprising:a first voltage-controlled oscillator (VCO) that generates a feedback clock; a phase frequency detector that receives a reference clock and the feedback clock, and in response thereto generates a first control signal that is dependent upon the phase difference and the frequency difference between the reference clock and the feedback clock; a charge pump that receives the first control signal from the phase frequency detector; a loop filter coupled to the charge pump to generate a first voltage signal; a timing generator that generates a second control signal having varying periods; a voltage modulator that receives the first voltage signal and the second control signal, and in response thereto generates a second voltage signal and a third voltage signal, with the second voltage signal provided to the first VCO; and a second VCO that receives the third voltage signal and which outputs a spread spectrum clock.