Patent ID: 6221706
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, which method comprises:forming first and second conductive gates on a main surface of a semiconductor substrate with a gate dielectric layer therebetween;forming aluminum sidewall spacers on side surfaces of the gates and extending onto the main surface;forming a first mask on the first gate and extending onto a first portion of the main surface;ion implanting impurities, using the second gate and sidewall spacers thereon as a mask, to form first moderate or heavy source/drain implants;removing the aluminum sidewall spacers from the side surfaces of the second gate;ion implanting impurities, using the second gate as a mask, to form first lightly or moderately doped source/drain extension implants;removing the first mask;forming a second mask on the second gate and extending onto a second portion of the main surface;ion implanting impurities, using the first gate and sidewall spacers thereon as a mask, to form second moderate or heavy source/drain implants;removing the aluminum sidewall spacers from the side surfaces of the first gate; andion implanting impurities, using the first gate as a mask, to form second lightly or moderately doped source/drain extension implants.