Patent ID: 8084297
Filing Date: 2011-12-27
Classification: H01L

Abstract:
1. A method of implementing at least two capacitors in an integrated circuit package, the method comprising: coupling the capacitors laterally side by side to a first flat surface of a substrate of the integrated circuit package; positioning an integrated circuit die over the capacitors, wherein the integrated circuit die has a first plurality of solder bumps and a second plurality of solder bumps separated by a region having no solder bumps; connecting the integrated circuit die to the first flat surface of the substrate over the capacitors, wherein the region having no solder bumps is positioned directly over the capacitors, and the integrated circuit die is connected to the first flat surface of the substrate by using the first plurality of solder bumps and the second plurality of solder bumps that are physically on the flat surface of the substrate; and attaching a lid to the substrate for encapsulating the integrated circuit die and the capacitors.