Patent ID: 6057710
Filing Date: 2000-05-02
Classification: H03K

Abstract:
A circuit for controlling a voltage provided to a switching transistor in a voltage conversion buffer, said voltage buffer driving a high voltage output with low voltage transistors connected to a low voltage, said circuit comprising:a first pull-up circuit includingat least one pull-up transistor coupling a gate of said switching transistor to said high voltage,at least one pull-up control transistor coupled to said pull-up transistor and having a gate connected to receive a voltage signal of no more than said low voltage; anda pull-down circuit includinga pull-down transistor coupled to said gate of said switching transistor, andat least one pull-down control transistor coupled to said pull-down transistor, and configured to limit a voltage applied to said gate of said switching transistor to an intermediate voltage to limit the voltage across said switching transistor to said low voltage;wherein said pull-down transistor has a gate coupled to a first voltage reference circuit generating a first voltage substantially similar to said low voltage, and said at least one pull-down control transistor includesa first transistor coupled to said pull-down transistor and having its gate coupled to a second voltage reference circuit generating a voltage at least a V.sub.T lower than said first voltage; anda second transistor coupled between said first transistor and a low voltage reference and having a gate coupled to a logic control line;a turn-on circuit, for turning on said first transistor, coupled between said logic control line and said gate of said second transistor;a turn-off circuit, for turning off said first transistor, coupled to said gate of said second transistor; anda delay circuit coupled between said logic control line and said turn-off circuit.