Patent ID: 8946792
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a semiconductor substrate; an insulator layer disposed on the semiconductor substrate; a plurality of fins disposed on the insulator layer; wherein a first subset of the plurality of fins are comprised of a semiconductor material and wherein a second subset of the plurality of fins are comprised of a dielectric material; and wherein the second subset of the plurality of fins is comprised of silicon nitride and interleaved with the first subset of the plurality of fins; and wherein groups of fins from the first subset of the plurality of fins are merged with epitaxially grown silicon, and wherein at least one group of fins from the first subset of the plurality of fins is merged with n-doped epitaxially grown silicon, and wherein at least another one group of fins from the first subset of the plurality of fins is merged with p-type doped epitaxially grown silicon.