Patent ID: 7884409
Filing Date: 2011-02-08
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a first conductive plate; a second conductive plate disposed with a first insulation layer interposed on the first conductive plate; a third conductive plate disposed with a second insulation layer interposed on the second conductive plate; a fourth conductive plate disposed with a third insulation layer interposed on the third conductive plate, a bottom interconnection disposed on one side of the first conductive plate, the bottom interconnection being insulated from the first conductive plate; a top interconnection disposed on one side of the fourth conductive plate, the top interconnection being insulated from the second conductive plate; and a first contact electrically connecting the bottom interconnection and the top interconnection; and a second contact electrically connecting the first conductive plate and the fourth conductive plate, wherein the first conductive plate, the third conductive plate, and the fourth conductive plate are electrically connected, the first conductive plate and the second conductive plate constitute a first capacitor, and the second conductive plate and the third conductive plate constitute a second capacitor; and wherein the second conductive plate is electrically connected to the first contact, and the third conductive plate is electrically connected to the second contact, the first conductive plate and the bottom interconnection are placed at the same level in the semiconductor substrate, and the fourth conductive plate and the top interconnection are placed at the same level on the semiconductor substrate.