Patent ID: 8031772
Filing Date: 2011-10-04
Classification: H04N

Abstract:
1. A video decoding system for decoding a compression-coded video signal, the video decoding system comprising: at least one buffer memory configured to store reference image data and residual image data required for an intra prediction process used during decoding of the compression-coded video signal, wherein the residual image data is stored in a first buffer memory of the at least one buffer memory and the reference image data is stored in a second buffer memory of the at least one buffer memory; a plurality of coprocessors configured to perform at least the intra prediction process using the reference image data and the residual image data, and to store a resulting intra predicted data in the at least one buffer memory, wherein the plurality of coprocessors are coupled to the at least one buffer memory; a DMA (Direct Memory Access) coprocessor configured to perform a direct access operation to an external memory to load the reference image data from the external memory, and to store the reference image data in the at least one buffer memory, wherein, the at least one buffer memory, the plurality of coprocessors and the DMA coprocessor take the form of hardware, and a processor interface configured to receive operational commands from a software implementation of a processor, wherein the processor transmits the operational commands to the processor interface through a processor interface bus to control the plurality of coprocessors to perform the intra prediction process using the reference image data and the residual image data, to control the DMA coprocessor to load the reference image data from the external memory, and to store the reference image data in the at least one buffer memory.