Patent ID: 6307857
Filing Date: 2001-10-23
Classification: H04L

Abstract:
An asynchronous transfer mode (""ATM"") controller adapted to be connected between an ATM network data transfer path and a terminal unit for performing processing of an ATM layer and an ATM Adaptation Layer of a selected ATM protocol, said ATM controller comprising:a transfer circuit, connected with a buffer memory which stores packet data with at least one de-assembled predetermined length data block, for transferring the packet data according to the extent of the predetermined length data block between said buffer memory and a memory in said terminal;a cell transmit control circuit de-assembling the predetermined length data block sent from the terminal memory to said buffer memory into data cells, for transmitting the data cells to the ATM network;a cell receive control circuit re-assembling the data cells received from said ATM network over said transfer path into at least one predetermined length data block in said buffer memory; anda transfer control circuit for instructing said transfer circuit to transfer said predetermined length data block between said buffer memory and said terminal memory and for instructing said cell transmit control circuitry and said cell receive control circuit to transfer said data cells between said buffer memory and said ATM network via said transfer path.