Patent ID: 6235542
Filing Date: 2001-05-22
Classification: H01L

Abstract:
A method for fabricating a ferroelectric memory device, comprising the steps of:providing a semiconductor substrate where a transistor having an impurity region is formed;forming a conduction layer for a storage node over the substrate;furnace-annealing the conduction layer;forming a first ferroelectric film on the conduction layer;rapid-thermally annealing the first ferroelectric film;forming a second ferroelectric film on the first ferroelectric film;rapid-thermally annealing the second film on the first ferroelectric film;furnace-annealing the first and second ferroelectric films;patterning the conduction layer and the ferroelectric films to form a storage node and a dielectric film;forming a protection film for protecting the dielectric film over the semiconductor substrate to cover the storage node and the dielectric film;patterning the protection film to expose a selected portion of the dielectric film; andforming a plate node on the dielectric film.