Patent ID: 8520438
Filing Date: 2013-08-27
Classification: G11C

Abstract:
1. A program method of a nonvolatile memory device including a memory cell array with a plurality of word lines located between a drain selection line and a source selection line, the program method comprising: applying a program voltage to a selected word line; applying a first pass voltage to at least one word line adjacent to the selected word line; applying at least one first middle voltage lower than the first pass voltage but higher than an isolation voltage to at least one word line adjacent to the word line receiving the first pass voltage; applying the isolation voltage to a word line adjacent to the word line receiving the first middle voltage; applying at least one second middle voltage higher than the isolation voltage but lower than a second pass voltage to at least one word line adjacent to the word line receiving the isolation voltage; and applying the second pass voltage to at least one word line adjacent to the word line receiving the second middle voltage.