Patent ID: 6385749
Filing Date: 2002-05-07
Classification: G01R

Abstract:
For use in a multi-core IC having a limited number of access pins for selecting functions internal to the IC, a circuit control arrangement, comprising:multiple test-access port (TAP) controllers, each TAP controller configured and arranged to couple to a common interface, to receive input signals indicating if the TAP controller is enabled, and to generate status and test signals; and an output control circuit including a TAP link module, the output circuit being configured and arranged to output one of the test signals respectively provided by the multiple TAP controllers in response to each of the multiple TAP controllers and the TAP link module; wherein the TAP link module includes an output coupled to the input of each multiple TAP controller, and is configured and arranged to provide the input signals and to maintain one of the TAP controllers enabled at a given time.