Patent ID: 7462497
Filing Date: 2008-12-09
Classification: G01R

Abstract:
1. A method for manufacturing one or more semiconductor wafers using an in-line process control, the method comprising: transferring an in-process semiconductor wafer to a test station; applying a selected operating voltage on a gate of a test pattern with an associated device on a semiconductor wafer using one or more probing devices; measuring a first leakage current associated with the selected operating voltage; if the measured first leakage current is higher than a first predetermined amount, categorizing the device as an initial failure; if the measured first leakage current is below the first predetermined amount, categorizing the device for a second voltage test process; applying second voltage using the second voltage test process on the gate of the test pattern on the semiconductor wafer; measuring a second leakage current associated with the second voltage; if the second measured leakage current is higher than a second predetermined amount, categorizing the device as an extrinsic failure; if the second measured leakage current is below the second predetermined amount, categorizing the device as a good device; determining a breakdown voltage associated with the second measured current value; determining if the breakdown voltage is within a breakdown voltage predetermined value; and determining if the second measure current value is within a predetermined range to indicate if one or more processes is stable.