Patent ID: 6596571
Filing Date: 2003-07-22
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising:forming a semiconductor layer on an insulating surface; forming an insulating film on said semiconductor layer; forming a first electrode comprising a first conductive layer having a first width and a second conductive layer on said insulating film; forming a second electrode comprising said first conductive layer having said first width and said second conductive layer having a second width by etching said second conductive layer of said first electrode; forming a high concentration impurity region in said semiconductor layer by adding an impurity element using said second electrode as a mask; forming a third electrode comprising said first conductive layer having a third width and said second conductive layer having said second width by etching said first conductive layer of said second electrode; and forming a low concentration impurity region in said semiconductor layer by adding an impurity element through at least one of said first conductive layer and said insulating film using said second conductive layer as a mask.