Patent ID: 6054760
Filing Date: 2000-04-25
Classification: F42B,H01L

Abstract:
A surface-connectable semiconductor element comprising:(a) a substrate made from silicon semiconductor material having a top surface, a bottom surface and side surfaces;(b) a dielectric layer disposed on at least one surface of the substrate;(c) a polysilicon film disposed on the dielectric layer;(d) a metal layer mounted on the polysilicon layer and extending from the top surface, along the side surfaces, to the bottom surface with the metal layer configured to form contacts on the bottom surface which contacts are configured for surface mounting directly on a header; andwherein the substrate is selected from the class consisting of p-type substrates and n-type substrates and the polysilicon film and the side surfaces of the substrate are doped with a dopant selected from the class consisting of a p-dopant and an n-dopant, provided that when the substrate comprises a p-dopant the polysilicon film and the side surfaces are doped with an n-dopant, and when the substrate comprises an n-dopant the polysilicon film and the side surfaces are doped with a p-dopant, whereby back-to-back diode means are formed between different ones of the side surfaces to provide the semiconductor element with unbiased protection against electrostatic discharge.