Patent ID: 6706577
Filing Date: 2004-03-16
Classification: H01L

Abstract:
The method of simultaneously forming both a high voltage and a low voltage transistor in the manufacture of an integrated circuit comprising:providing a semiconductor substrate wherein active areas of said substrate are isolated from other active areas and wherein there is at least one low voltage area in which said low voltage transistor will be formed and at least one high voltage area in which said high voltage transistor will be formed wherein said high voltage transistor has a voltage higher than said low voltage transistor; first wet oxidizing the surface of said semiconductor substrate to form a first layer of gate oxide on the surface of said semiconductor substrate in said active areas; covering said low voltage active area with a mask; second wet oxidizing the surface of said semiconductor substrate where it is not covered by said mask to form a second layer of gate oxide underlying said first gate oxide layer in said high voltage active area wherein said second wet oxidizing comprises H2 and O2 in a N2 atmosphere in the ratio of H2:O2:N2 of 1:2:more than 20; thereafter removing said mask; depositing a layer of polysilicon overlying said first gate oxide layer in said low voltage active area and overlying said first and second gate oxide layers in said high voltage active area; and patterning said polysilicon layer to form gate electrodes for said low voltage and said high voltage transistors in the fabrication of said integrated circuit.