Patent ID: 8716088
Filing Date: 2014-05-06
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure, comprising: forming a gate dielectric on a semiconductor substrate of a semiconductor material, the gate dielectric comprising a high dielectric constant dielectric layer having a dielectric constant greater than silicon and located on the semiconductor substrate; and forming a gate electrode abutting the gate dielectric, the gate electrode including a lower metal layer abutting the gate dielectric, a scavenging metal layer abutting the lower metal layer, an upper metal layer abutting the scavenging metal layer, and a silicon layer abutting the upper metal layer; the scavenging metal layer reducing an oxidized layer at an interface between the upper metal layer and the silicon layer in response to elevated temperature annealing; wherein the oxidized layer at the interface between the upper metal layer and the silicon layer comprises a metal oxide layer and a silicon dioxide layer; and wherein the scavenging metal layer attracts oxygen atoms from both the metal oxide layer and the silicon dioxide layer.