Patent ID: 8605497
Filing Date: 2013-12-10
Classification: G11C

Abstract:
1. A method for parallel programming each of a plurality of phase change memory (PCM) cells of an array of PCM cells, each said memory cell of said plurality of cells being programmed having a respective first and second terminal, said array of PCM cells including a plurality of rows of conductors and plurality of columns of conductors, each row conductor of said plurality connecting a respective plurality of PCM cells at a respective first terminal, and each respective column conductor of said plurality connecting a respective PCM cell of said plurality at a respective second terminal, the method comprising: simultaneously applying, at two or more row conductors of said array, a first signal of a defined time duration, to the first terminal of each respective memory cell of the plurality of memory cells being parallel programmed; and, iteratively applying, at two or more column conductors of said array during said defined time duration, second pulse signals at each respective second terminal of each respective memory cell of the plurality of memory cells being parallel programmed, wherein at each iteration, adaptively controlling an attribute of each said second pulse signals applied at each respective second terminal, said adaptively controlled attribute of applied second pulse signals comprises: a pulse amplitude, a pulse duration, a length of rising or trailing edges of one or more said second pulse signals and a time delay between one or more said second pulse signals; wherein at each said programmed cell of said array, said simultaneous application of said first signal and said iteratively applied second pulse signals at respective said first and second memory cell terminals during said defined time duration configuring a target characteristic parameter to achieve one or more programmed states at the respective memory cell.