Patent ID: 6782447
Filing Date: 2004-08-24
Classification: G06F

Abstract:
A processing system comprising:a processor that is configured to execute program instructions, a circular-address-register having a command processor and an address register containing an address and an index register containing a count representing a displacement from a base-address loaded into a content of the circular-address-register, the circular-address-register being configured to determine an associated upper and lower bound and to receive commands from the processor, the commands comprising at least one of: a circular increment command that is configured to increment said content and said count, and, after said content reaches the upper bound, to reset both said content to the lower bound and said count, and a circular decrement command that is configured to decrement said content and said count, and, after said content reaches the lower bound, to reset both said content to the upper bound and said count; wherein the command processor is configured to update the address register and the index register according in dependence upon the commands and in dependence upon said count.