Patent ID: 6329938
Filing Date: 2001-12-11
Classification: H03M

Abstract:
A programmable analog-to-digital converter with bit conversion optimization, comprising:an amplifier for sampling and holding an input analog signal to be converted into N digital data bits;a programmable clock generator for generating a clock signal for each of the N-bits to trigger setting of one of the N-bit digital data bits such that each of the N bits is set during a time optimized for each bit;a comparator coupled to receive and compare the input analog signal with a successively approximated analog signal to generate a digital output signal;a successive approximation logic for successively setting each of the N-bits in response to the digital output signal and the clock signal to generate a successively approximated N-bit digital data;a digital-to-analog converter for converting the successively approximated N-bit digital data into a successively approximated analog current signal; anda voltage converter having a resistance value for converting the successively approximated analog current signals into the successively approximated analog signal for input to the comparator, the voltage converter being configured to optimize a time constant defined by the resistance and an output capacitance of the digital-to-analog converter.