Patent ID: 8410592
Filing Date: 2013-04-02
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a vertical transistor with a first side and an opposite second side, the vertical transistor comprising: a first load electrode and a control electrode disposed on the first side and a second load electrode disposed on the opposite second side; a first load terminal, a second load terminal, and a control terminal each disposed along an external contact plane of the semiconductor device, wherein the first side of the vertical transistor faces the external contact plane; a dielectric layer surrounding the vertical transistor and having formed therein a cutout to expose a contact area of the second load terminal that faces away from the external contact plane; and an electrically conductive deposited layer plated onto both the second load electrode of the vertical transistor and the contact area of the second load terminal of the device to form an electrically continuous solder-free connection between the second load electrode and the second load terminal through the cutout in the dielectric layer.