Patent ID: 6372673
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, the method comprising the steps of:forming a silicon gate electrode, having an upper surface and side surfaces, overlying a silicon substrate with a gate dielectric layer therebetween, a spacer oxide liner disposed on the side surfaces, and source/drain regions in the substrate: depositing a silicon nitride layer at: a SiH4 flow rate of approximately 100 sccm to approximately 250 sccm; a N2 flow rate of approximately 3,000 sccm to approximately 6,000 sccm; a NH3 flow rate of approximately 2,000 sccm to approximately 4,000 sccm; a radio frequency power of approximately 200 watts to approximately 350 watts; a pressure of approximately 1.6 torr to approximately 2.2 torr; and a temperature maintained at about 360Â° C. to approximately 380Â° C.; anisotropically etching the silicon nitride layer to form silicon nitride sidewall spacers on the spacer oxide liner; depositing a refractory metal layer; heating to react the refractory metal with underlying Si to form a metal silicide layer on the gate electrode and a metal silicide layer on the source/drain regions; and removing unreacted refractory metal from the silicon nitride sidewall spacers.