Patent ID: 8149046
Filing Date: 2012-04-03
Classification: H01L,H03K

Abstract:
1. An apparatus in a semiconductor body comprising: a first transistor component having at least one gate terminal configured to receive an “on” gate signal to increase current flow through the first transistor component or an “off” gate signal to decrease the current flow through the first transistor component; and a second transistor component having at least one gate terminal configured to receive an “on” gate signal to increase current flow through the second transistor component or an “off” gate signal to decrease the current flow through the second transistor component, wherein the first transistor component and the second transistor component are connected in parallel to form a switching pair device, wherein the transistor components are configured to operate together to equalize the current change per time through the switching pair device such that the total current through, or the transconductance of, the switching pair device approaches a constant value when the first and second transistor components are alternated between receiving the “on” and “off” gate signals, wherein the first transistor component and the second transistor component each have a gate length attribute and a gate width attribute and at least one of the first or second transistor components includes a plurality of transistors connected in parallel, each transistor of the plurality of transistors having a gate width attribute and a gate, source, drain, and bulk terminal, and wherein at least one of the plurality of transistors connected in parallel is “off” when another of the plurality of transistors connected in parallel is “on” and at least one of the plurality of transistors connected in parallel is “on” when another of the plurality of transistors connected in parallel is “off”.