Patent ID: 7906776
Filing Date: 2011-03-15
Classification: H01L,H03B,H03K,H03L

Abstract:
1. A voltage controlled oscillator circuit, comprising: an output terminal for outputting an oscillating signal of a radio frequency proportional to a bias voltage; a tuned inductor capacitor (LC) circuit coupled to the output terminal; a first FET having a drain coupled to the tuned LC circuit, a gate coupled to a positive supply voltage, and a source coupled to a common source node; a second FET having a gate coupled to the drain of the first FET and the tuned LC circuit, a drain coupled to a positive supply voltage and a source coupled to the common source node; and a third FET and a fourth FET coupled to provide a bias voltage at the common source node, responsive to the bias voltage; wherein at least one of the first, second, third and fourth FETs comprises: