Patent ID: 9052446
Filing Date: 2015-06-09
Classification: G02B,H01L

Abstract:
1. A package structure, comprising: a chip carrier, wherein the chip carrier comprises: a base portion, having a first surface and a second surface opposite to the first surface and having at least one first contact pad on the first surface; a connecting portion, located on the second surface of the base portion and having at least one second contact pad on a third surface of the connecting portion, wherein the at least one first contact pad is electrically connected to the at least one second contact pad, the third surface is parallel to the second surface and the second surface has an area larger than that of the third surface; and at least one chip, located on the third surface of the connecting portion, wherein the at least one chip is electrically connected to the connecting portion through the at least one second contact pad; and a substrate, having at least one slot for accommodating the chip carrier, wherein the at least one slot exposes at least a portion of an optical waveguide embedded in the substrate, and wherein the chip carrier is inserted into the at least one slot of the substrate, the connecting portion and the at least one chip mounted thereon are buried in the at least one slot, and the third surface faces the optical waveguide, the at least one chip is self-aligned to the optical waveguide without touching the optical waveguide.