Patent ID: 7269770
Filing Date: 2007-09-11
Classification: G01R

Abstract:
1. An AC boundary scan cell comprising: a first multiplexer having a system input connected to an SDI line, an output connected to an SDO line, and a select input connected to a first signal input line; a second multiplexer having a system input also connected to the SDI line, an update input connected to a TDI line, and a select input connected to a ShiftDR signal input line; a first data shift register having a data input connected to an output of the second multiplexer and a clock input connected to a second signal input line; a second data register having a data input connected to both an output of the first data shift register and a TDO line and a clock input connected to an UpdateDR signal input line; an XOR logic gate having a first input connected to an inverted output of the second data register and a second input connected to a third signal input line; and a third multiplexer having a system input connected to an output of the second data register, an update input connected to an output of the XOR logic gate, a select input connected to a fourth signal input line, and an output connected to an update input of the first multiplexer.