Patent ID: 6205171
Filing Date: 2001-03-20
Classification: H03F,H04B

Abstract:
A wireless transmitter/receiver circuit disposed on a PC board assembly, comprising:a transmitting antenna and a receiving antenna, for transmitting and receiving, respectively, a digitally modulated carrier signal,a transmit/receive switching control circuit for selecting said transmitting and receiving antennas,a Power Amplifier assembly connected to said transmitting antenna via said transmit/receive switching control circuit, having a power amplifier circuit for amplifying said digitally modulated carrier signal prior to its being transmitted by said transmitting antenna,said power amplifier circuit comprising at least one gallium arsenide MESFET having a gate connected to a switchable voltage divider, said switchable voltage divider for rapidly switching said power amplifier MESFET on and off, by applying a first bias voltage to said gate for on, and by applying a second bias voltage to said gate for off,a Low Noise Amplifier circuit connected to said receiving antenna via said transmit/receive switching control circuit, for amplifying said digitally modulated carrier signal after being received by said receiving antenna,a down converter circuit connected to an output of said Low Noise Amplifier for converting said received digitally modulated carrier signal from RF to IF,a quadrature demodulator/modulator circuit connected to an output of said down converter circuit for demodulating said received digitally modulated IF carrier signal to a digitally encoded baseband receive signal,said quadrature demodulator/modulator circuit for modulating a transmit IF carrier frequency with a digitally encoded baseband transmit signal,an up converter circuit for receiving said modulated IF transmit signal from said quadrature demodulator/modulator circuit, and for converting said modulated IF transmit signal from IF to RF,wherein said up converter circuit outputs said modulated RF transmit signal to said power amplifier circuit in said Power Amplifier assembly,a synthesizer circuit comprising a first local oscillator circuit and a second local oscillator circuit, wherein said synthesizer circuit outputs a first local oscillator signal to an input of said up converter circuit and said down converter circuit, andwherein said synthesizer circuit outputs a second local oscillator signal to an input of said quadrature demodulator/modulator circuit.