Patent ID: 6177699
Filing Date: 2001-01-23
Classification: H01L

Abstract:
A DRAM cell formed on an active region of an semiconductor substrate, the DRAM cell comprising:an isolation trench in the semiconductor substrate, wherein said isolation trench electrically isolates said DRAM cell from one or more adjacent DRAM cells;at least two capacitors disposed on a sidewall of the isolation trench and each capacitor including first and second capacitor plates separated by a dielectric layer; anda vertically oriented access transistor disposed over and electrically coupled with the capacitor,whereby said isolation trench is substantially filled with an isolation dielectric, such that said isolation trench includes (i) the dielectric layer forming part of at least one of the capacitors and (ii) the isolation dielectric which occupies a portion of the isolation trench which is not occupied by the at least two capacitors.