Patent ID: 7119002
Filing Date: 2006-10-10
Classification: H01L

Abstract:
1. A method for improving a solder bump composition for a flip chip, comprising the steps of: providing at least two UBM layers overlying a chip bonding pad including an uppermost UBM layer forming a contact layer for forming a solder bump thereon; depositing a solder bump precursor material overlying the contact layer to form a solder column, wherein said solder bump precursor material contains a combination of high lead and eutectic solder regions; exposing the sidewalls of the solder column to include the contact layer sidewalls; oxidizing the contact layer sidewalls to form a contact layer sidewall oxide at a temperature lower than the melting point of the solder bump precursor material to make the contact layer sidewalls unwettable in a subsequent reflow process; and, forming a solder bump by reflowing the precursor material to wet the contact layer surface to exclude the contact layer sidewalls, whereby the solder bump contains a combination of a layer of high lead solder, with a layer of eutectic solder encompassing the high lead region of the bump, wherein the melting point of the high lead solder is about 300° C. or greater, and the melting point of the eutectic solder is about 180° C.