Patent ID: 6579772
Filing Date: 2003-06-17
Classification: H01L

Abstract:
A discrete semiconductor device merging only one vertical semiconductor element in a semiconductor chip, comprisinga first semiconductor region of a first conductivity-type, defined by a first end surface, a second end surface opposing to the first end surface and a first outer surface connecting the first and second end surfaces; a second semiconductor region of the first conductivity-type serving as a main electrode region of the vertical semiconductor element, being defined by a third end surface, a fourth end surface opposing to the third end surface and a second outer surface connecting the third and fourth end surfaces, the fourth end surface is in contact with the first end surface; a third semiconductor region of a second conductivity-type serving as another main electrode region of the vertical semiconductor element, being contacted with the first semiconductor region at the second end surface, the second conductivity-type is opposite to the first conductivity type, outer surface of the third semiconductor region serving as a first part of a chip outer surface of the semiconductor chip; and a fourth semiconductor region having an inner surface in contact with the first and second outer surfaces and an impurity concentration lower than the first semiconductor region, configured such that the fourth semiconductor region surrounds the first and second semiconductor regions, the fourth semiconductor region is in contact with the third semiconductor region, the outer surface of the fourth semiconductor region serving as a second part of the chip outer surface of the semiconductor chip, and the second part being continuous to the first part of the chip outer surface.