Patent ID: 7154781
Filing Date: 2006-12-26
Classification: G06F,G11C

Abstract:
1. A method of operating a Flash memory device, comprising: receiving an access to an erase block of a plurality of memory array segments each containing a plurality of general use erase blocks and a plurality of replacement erase blocks, wherein the memory array of the Flash memory device has a specified size corresponding to an address range of the plurality of general use erase blocks; redirecting the received access if it addresses a damaged erase block to a replacement erase block utilized to repair the damaged erase block from the plurality of replacement erase blocks of the plurality of memory array segments; accessing a general use erase block in a general use erase block address range if the received access addresses a general use erase block address; and accessing a replacement erase block in an extended address range if the received access addresses an erase block in the extended address range, wherein the replacement erase block is not utilized to repair a damaged erase block, where the extended address range of replacement erase blocks and the address range of general use erase blocks are from two or more mutually exclusive ranges of user accessible addresses, and where the sum of the two or more mutually exclusive ranges of user accessible general use addresses are larger than the specified size of the Flash memory device.