Patent ID: 6211028
Filing Date: 2001-04-03
Classification: H01L

Abstract:
A process for manufacturing a twin gain bipolar transistor, comprising:providing a P type silicon wafer having an upper surface;implanting first donor ions through said upper surface;performing a first drive-in diffusion thereby forming an N+ buried collector that is between about 3 and 4 microns thick and having an upper N-to-N+ interface that is between about 0.8 and 1 microns below said wafer upper surface;depositing a layer of boron doped silicon by means of epitaxial growth on said wafer upper surface, thereby forming a P type secondary base layer that contains a uniform distribution of acceptors and has an upper surface;forming a first oxide layer on said it epitaxial layer upper surface;patterning the first oxide layer by photolithography to form a first mask;through said first mask, implanting boron ions;performing a second drive-in diffusion whereby a primary base layer is formed within the secondary base layer;removing the first mask;forming a second mask by photolithography on said epitaxial layer upper surface;patterning to form an emitter mask;through said emitter mask, implanting second donor ions; andperforming a third drive-in diffusion whereby an N+ emitter is formed within the primary base layer.