Patent ID: 9219041
Filing Date: 2015-12-22
Classification: H01L

Abstract:
1. An electronic package for semiconductor dies, comprising: a multilayer circuit board constructed from a dielectric material and having at least two layers surrounding a cavity, a top surface and a bottom surface; a high frequency circuit board having a bottom face and constructed from a dielectric material and affixed to said multilayer board by electrically conductive glue, wherein the high frequency circuit board comprises a ground plane; at least one plated through hole connecting the at least two layers, for electronic signal connection; and a semiconductor die comprising at least one pad for high frequency signal, at least one pad for high frequency ground and a multiplicity of pads for direct current (DC) or control, wherein a top face of said semiconductor die is electrically attached to a bottom face of said high frequency circuit board by at least two conductive bumps, such that each conductive bump is attached to one pad, and wherein a bottom face of said semiconductor die is thermally connected to at least one of the at least two layers by thermal interface material.