Patent ID: 6437597
Filing Date: 2002-08-20
Classification: G01R

Abstract:
A method of comparing a first propagation delay of a first path of interest programmably defined on a programmable logic device with a second propagation delay of a second path of interest on the programmable logic device, the method comprising:a. programming a first programmable resource to function as a multiplexer, the multiplexer having a first multiplexer input terminal, a second multiplexer input terminal, a multiplexer output terminal, and a select terminal, wherein a first logic level on the select terminal connects the first multiplexer input terminal to the multiplexer output terminal and a second logic level on the select terminal connects the second multiplexer input terminal to the multiplexer output terminal; b. connecting the multiplexer output terminal to the first multiplexer input terminal via the first path of interest; c. connecting the multiplexer output terminal to the second multiplexer input terminal via the second path of interest; d. providing the first logic level on the select terminal; e. propagating a first signal transition through the first path of interest to the first multiplexer input terminal, through the multiplexer, and back to the first path of interest, thereby generating a first periodic signal having a first period; f. providing the second logic level on the select terminal; g. propagating a second signal transition through the second path of interest to the second multiplexer input terminal, through the multiplexer, and back to the second path of interest, thereby generating a second periodic signal having a second period; and h. subtracting the second delay period from the first delay period to obtain a propagation-delay difference.