Patent ID: 8537956
Filing Date: 2013-09-17
Classification: H03L,H04J

Abstract:
1. A circuit comprising: a fractional phase-locked loop circuit comprising phase detection circuitry, an oscillator circuit that generates a first periodic signal, and a frequency divider circuit that divides a frequency of the first periodic signal by a frequency division value to generate a frequency of a second periodic signal, wherein the second periodic signal is provided to the phase detection circuitry; and a delta sigma modulator circuit comprising a first accumulator that performs a first addition, first storage circuits that store signals based on the first addition received from the first accumulator, a first multiplexer that receives the signals based on the first addition from the first storage circuits and that provides one of the signals based on the first addition as a first selected signal, and a logic circuit that controls the frequency division value based on the first selected signal.