Patent ID: 8012803
Filing Date: 2011-09-06
Classification: H01L,Y10T

Abstract:
1. A method comprising: providing a plurality of prepackaged integrated circuits (ICs), each including an interior wire having a length that extends between a contact within the prepackaged IC and a lateral surface of the prepackaged IC, wherein each interior wire is entirely enclosed by a passivating package of the prepackaged IC along the length of the interior wire; stacking the plurality of prepackaged ICs to align corresponding lateral surfaces of the plurality of prepackaged ICs; modifying the plurality of prepackaged ICs to expose at least some of the interior wires such that the at least some of the interior wires terminate at a lateral surface of the stacked plurality of prepackaged ICs; and disposing a plurality of metallization structures on the lateral surfaces of the plurality of prepackaged ICs, wherein the metallization structures are configured to electrically connect the respective prepackaged ICs.