Patent ID: 6088523
Filing Date: 2000-07-11
Classification: G06F

Abstract:
A method of simulating an electrical circuit design, the method comprising the steps of:providing design specifications for an electrical circuit design including timing specifications;describing on a computer circuit element quantities and circuit connections for said electrical circuit design such that said computer description contains a description of an RLCG line within said electrical circuit design; andverifying said timing specifications for said electrical circuit design by circuit-to-circuit reduction having the steps of:depicting a circuit element taper of a selected element type as dependent upon an accumulated circuit element quantity; andmatching projections of said circuit element taper with projections of an approximate taper, said approximate taper dependent upon said accumulated circuit element quantity, to obtain on said computer at least one reduced quantity for circuit element quantities of said selected element type such that said at least one reduced quantity can be arranged in a reduced RLCG line having approximately the same performance as said RLCG line; andsimulating on said computer performance of a reduced circuit containing said reduced RLCG line to obtain timing information about said electrical circuit design.