Patent ID: 8139628
Filing Date: 2012-03-20
Classification: H04L

Abstract:
1. A compensation circuit comprising: an input configured to receive an analog signal; a high pass filter configured to receive said analog signal; analog to digital conversion circuitry configured to receive an output of said high pass filter; a finite impulse response filter configure to receive an output of said analog to digital conversion circuitry; a baseline wander equalization filter configured to receive an output of said finite impulse response filter, and operative to compensate for baseline wander in said output of said finite impulse response filter to produce an output having a measure of compensation for said baseline wander; a combiner responsive to said output of said baseline wander equalization filter; a sequence detector directly responsive to said combiner, wherein said sequence detector is a Viterbi detector; a decision feedback equalization filter responsive to an output of said sequence detector, wherein said combiner is further responsive to an output of said decision feedback equalizer; and an error feedback circuit comprising a first input responsive to the output of said sequence detector and a second input directly responsive to an output of said combiner, wherein said combiner is further responsive to an output of said error feedback circuit.