Patent ID: 6580632
Filing Date: 2003-06-17
Classification: G11C,H01L

Abstract:
A semiconductor memory device comprising a field effect transistor, the transistor including:a semiconductor substrate; a ferroelectric film and a gate electrode stacked in this order over the substrate; and source/drain regions defined in the substrate and located on right- and left-hand sides of the gate electrode, wherein the ferroelectric film exhibits a first or second type of polarization, the first type of polarization being created when a voltage is applied to the gate electrode so that the electrode has a positive potential level with respect to the substrate, the second type of polarization being created when another voltage is applied to the gate electrode so that the electrode has a negative potential level with respect to the substrate, and wherein data in a first or second logical state is stored in the ferroelectric film, the first logical state being defined as a state in which one of the first and second types of polarization remains in the ferroelectric film to which zero voltage is being applied, the second logical state being defined as a state in which a polarization from less than the opposite polarization to the one type of polarization defined to be the first logical state to zero or almost zero remnant polarization remaining in the ferroelectric film to which the zero voltage is being applied.