Patent ID: 8455950
Filing Date: 2013-06-04
Classification: H01L

Abstract:
1. An electrostatic discharge diode structure in an integrated circuit comprising: A. an N-type buried layer in a semiconductor substrate; B. a deep N-type inplant region in the substrate extending down from a first level of the substrate to the N-type buried layer; C. a first N well region formed in the substrate and extending down to the N-type buried layer; D. a second N well region formed in the substrate and extending down from the first level of the substrate to the N-type buried layer, the second N well region being formed next to the deep N-type inplant region; E. a P-type epitaxial region formed in the substrate and extending down from the first level of the substrate to the N-type buried layer between the first N well region and the second N well region; and F. a P-type source/drain region formed in the substrate over the first N well region and a portion of the P-type epitaxial region.