Patent ID: 6653165
Filing Date: 2003-11-25
Classification: H01L,Y02E,Y02P

Abstract:
A method of forming a semiconductor element having a plurality of pin junctions comprised of a silicon-based material, the method comprising:a step of forming a p-layer, an i-Layer, and a first portion of an n-layer of a first pin junction of the pin junctions or forming an n-layer, an i-layer, and a first portion of a p-layer of a first pin junction of the pin junctions, and thereafter exposing a surface of the first portion of the p-layer or the first portion of the n-layer to an oxygen-containing atmosphere; a step of forming a second portion of the p-layer on the first portion of the p-layer which was exposed to the oxygen-containing atmosphere or forming a second portion of the n-layer on the first portion of the n-layer which was exposed to the oxygen-containing atmosphere, to complete the first pin junction; and a step of forming an n-layer or a p-layer of a second pin junction adjacent to the first pin junction to form a pn interface, wherein the plurality of pin junctions is formed on a substrate by a high-frequency plasma CVD process under a pressure of not more than atmospheric pressure.