Patent ID: 6442734
Filing Date: 2002-08-27
Classification: G06F

Abstract:
A peripheral device connectable to a computer having one of a first interface and a second interface, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor connected to a first voltage potential with first and second resistive elements, respectively, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor and a clock conductor pulled to a second voltage potential by third and fourth resistive elements, respectively, the peripheral device comprising:first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface, and configured for connection to the first data conductor in the single ended data connection and the clock conductor when the computer includes the second interface; an interface detection component, coupled to the first and second communication conductors, including connection elements selectable connecting the first and second communication conductors to a predetermined voltage potential and a signal detector configured to detect signal levels on the first and second communication conductors to detect which of the first and second interfaces the peripheral device is connected to when the connection elements are deselected to selectively disconnect the first and second communication conductors from the predetermined voltage potential and to provide a connection output indicative of the detected interface; and a controller component, coupled to the interface detection component, configured to communicate between the peripheral device and the computer over the first and second communication conductors according to a protocol corresponding to the detected interface based on the connection output.