Patent ID: 8296349
Filing Date: 2012-10-23
Classification: G06F

Abstract:
1. A discrete cosine transform (DCT) and inverse discrete cosine transform (IDCT) circuit configured and structured to perform DCT/IDCT operations, wherein each of the DCT/IDCT operations comprises a series of butterfly operations each employing multiple coefficients, the DCT and IDCT circuit comprising: a microcode memory configured and structured to store multiple microcode groups corresponding to the DCT/IDCT operations, wherein each of the microcode groups comprises a series of microcodes; a processor configured and structured to obtain one of the microcode groups corresponding to one of the DCT/IDCT operations, and retrieve microcodes in the obtained one of the microcode groups in sequence; a butterfly operation circuit configured and structured to perform butterfly operations according to the retrieved microcodes to execute one of the DCT/IDCT operations, wherein the butterfly operation circuit comprises: