Patent ID: 6789250
Filing Date: 2004-09-07
Classification: G03F

Abstract:
A system for pattern data generation, comprising:a chip division information storage unit configured to register chip division information of a chip sub-pattern so that pattern data of enlarged reticle chip pattern data fit into a master mask pattern region; a chip layout generation unit configured to generate master mask chip layout information by sequentially allotting sub-patterns to a master mask in an order beginning with the largest from the plurality of sub-patterns configuring the chip division information; a master mask chip layout information storage unit configured to register the master mask chip layout information; a chip pattern data generation unit configured to generate master mask chip pattern data by referencing the reticle chip pattern data and divide each chip in accordance with the master mask chip layout information; a master mask pattern data information storage unit configured to register the master mask chip pattern data; and a pattern data generation unit configured to generate master mask pattern data by referencing the master mask chip layout information and the master mask chip pattern data.