Patent ID: 6337293
Filing Date: 2002-01-08
Classification: H01L,Y10S

Abstract:
A method of forming a quantum memory element comprising the steps of:forming a first insulating layer on a substrate; depositing a second insulating layer over the first insulating layer; depositing a first conductive layer over the second insulating layer to form a first region and a second region; depositing a layer of amorphous silicon to form a film which covers the surface of the first and the second regions and the surface of a portion of the second insulating layer and which is connected with the first and the second regions; depositing a layer of silicon dioxide over the film; crystallizing the amorphous silicon to a polycrystalline silicon film in which a channel region is formed; depositing semiconductor grains which form charge trapping and storage regions; depositing a fourth insulating layer over the grains; and depositing a second conductive layer over the layer of silicon dioxide to form a control electrode of the memory element.