Patent ID: 9070546
Filing Date: 2015-06-30
Classification: G02F,G09G,G11C,H01L

Abstract:
1. A semiconductor device comprising: a first transistor; a second transistor: a first switch; a second switch; a third switch; and a fourth switch, wherein one of a source and a drain of the first transistor is electrically connected to a first wiring, wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring, wherein one of a source and a drain of the second transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the second transistor is electrically connected to the second wiring, wherein a first terminal of the first switch is electrically connected to a gate of the first transistor, wherein a first terminal of the second switch is electrically connected to a gate of the second transistor, wherein a second terminal of the second switch is electrically connected to a second terminal of the first switch, wherein a first terminal of the third switch is electrically connected to the gate of the first transistor, wherein a second terminal of the third switch is electrically connected to a third wiring, wherein a first terminal of the fourth switch is electrically connected to the gate of the second transistor, wherein a second terminal of the fourth switch is electrically connected to the third wiring, wherein a channel width of the first transistor is more than or equal to 90% and less than or equal to 110% of a channel width of the second transistor, wherein a gate of the first switch and a gate of the fourth switch are electrically connected with each other, and wherein a gate of the second switch and a gate of the third switch are electrically connected with each other.