Patent ID: 8089307
Filing Date: 2012-01-03
Classification: H03L

Abstract:
1. A phase-locked loop arranged to generate an output signal having a first frequency that is a static value times the frequency of a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a divider arranged to receive the output signal and divide the output signal to form a feedback signal, the divider being arranged to vary the divisor by which the output signal is divided to cause the output signal to have a frequency that is said static value times the frequency of the reference signal, a comparison unit arranged to compare the feedback signal with the reference signal, one or more current generators arranged to output current pulses in dependence on said comparison, a summation unit arranged to receive the current pulses output by the current generator(s) and form a single current pulse therefrom and a loop filter arranged to filter the single current pulse to form a control signal for controlling the signal generator, the phase-locked loop being arranged such that: during the first time period, the current generator(s) generate(s) a first current pulse dependent on a phase-difference between the feedback signal and the reference signal and a second current pulse dependent on an error in the feedback signal that is caused by the variation of the divisor, and the summation unit receives the first and second current pulses and stores an electrical charge representative of those current pulses; and during a second time period that does not overlap with the first time period, the summation unit causes the single current pulse to flow either into or out of the loop filter in dependence on the first and second current pulses; the summation unit comprising: two current paths, the first current path being for generating a current in one direction at an input node of the loop filter and the second current path being for generating a current in the opposite direction at the input node of the loop filter; a capacitive element having first and second capacitive plates; and a switching arrangement arranged such that, during a first time period, the first and second capacitive plates are each in communication with a respective one of the current paths, whereby a current output by the first current path causes an electrical charge to be formed on the first capacitive plate and a current output by the second current path causes an electrical charge to be formed on the second capacitive plate, and during a second time period, the first and second capacitive plates are connected to a reference voltage and the input node of the loop filter respectively, the electrical charge formed on the first and second capacitive plates during the first time period thereby being discharged to form the single current pulse, said single current pulse being representative of a phase-difference that would have existed between the reference signal and the feedback signal if the feedback signal had been formed by dividing the output signal by said static value and not by the varied divisor.