Patent ID: 8786320
Filing Date: 2014-07-22
Classification: H03K

Abstract:
1. A signal input circuit, comprising: an input unit comprising a plurality of transistors and configured to receive a first input signal to output an output signal to an output node; a first compensation circuit connected to the output node, and configured to discharge the output node in response to a second input signal; a second compensation circuit connected to the output node, and configured to supply a current to the output node in response to the second input signal; and an enable circuit coupled between a ground voltage and each the input unit and the first and second compensation circuits and configured to enable the input unit and the first and second compensation circuits, wherein in a differential mode, the first and second compensation circuits are responsive to state changes in the second input signal to selectively discharge the output node or supply the current to the output node to compensate for differences in response times of the transistors of the input unit and reduce a shift difference of the output signal.