Patent ID: 8970637
Filing Date: 2015-03-03
Classification: G09G

Abstract:
1. A frame rate control unit comprising: a basic frame rate control pattern establisher configured to include basic red, green, and blue frame rate control patterns established to perform a frame rate control for a plurality of continuous frames; a frame rate control pattern generator configured to modify the basic red, green, and blue frame rate control patterns to generate new red, green, and blue frame rate control patterns from the basic red, green, and blue frame rate control patterns which are established for the plurality of continuous frames; a data bit extractor configured to extract higher-bit red, green, and blue data and lower-bit red, green, and blue data from each of input red, green, and blue data; and a frame rate modulator configured to generate red, green, and blue frame rate control signals to drive corresponding red, green, and blue sub-pixels by frame-rate-modulating the new red, green, and blue frame rate control patterns on the basis of the respective lower-bit red, green, and blue data and the new red, green, and blue frame rate control patterns, wherein the new green and blue frame rate control patterns are obtained through a process of shifting the basic green and blue frame rate control patterns to different sub-pixels in a shift direction and driving the green sub-pixels and the blue sub-pixels such that each frame has a same number of positive and negative voltage polarities.