Patent ID: 6121128
Filing Date: 2000-09-19
Classification: H01L,Y10S

Abstract:
A method of forming a semiconductor structure comprising the steps of:providing a single crystal semiconductor substrate;forming a transistor device having a source/drain region and a gate electrode mounted on a thin film dielectric on said substrate;forming a dielectric coating on said gate electrode;forming an active wordline on said gate electrode in contact with said gate electrode having a terminating end portion and side portions extending from said terminating end portion;forming an insulating material on said active wordline, said insulating material including silicon nitride overlying said terminating end portion and a part of the side portions of said active wordline adjacent the terminating end portion, and silicon dioxide surrounding the remainder of the side portions of said active wordline;forming a bitline contact contacting said source/drain region and the insulating material surrounding said active wordline to thereby form said bitline contact borderless to said active wordline.