Patent ID: 9166878
Filing Date: 2015-10-20
Classification: H04L

Abstract:
1. An apparatus, comprising: a processor; a memory; and a network management module configured to be operatively coupled to a switch fabric having a distributed data plane and a distributed control plane and configured to be operatively coupled to a plurality of network resources including a first set of network resources and a second set of network resources each including resource elements distributed across the distributed data plane and each resource element being associated with at least one control plane element of the distributed control plane, the first set of network resources is a subset of the second set of network resources, each network resource from the second set of network resources being configured to send data units; the network management module configured to receive a request for information regarding the first set of network resources; the network management module configured to query each resource of the second set of network resources through the distributed control plane based on the received request; the network management module configured to receive an output descriptor language (ODL) result stream about the second set of network resources in response to the query, the ODL result stream including data about the second set of network resources in a data descriptor language (DDL) format, the ODL result stream including data for a requesting entity and data for at least one non-requesting entity; the network management module configured to parse the ODL result stream to select data applicable to the first set of network resources and not the second set of network resources, the data about the first set of network resources being for the requesting entity; and the network management module configured to define a response to the request for information regarding the first set of network resources, the response not including the data for the at least one non-requesting entity, the network management module being implemented in at least one of the processor or the memory.