Patent ID: 8954720
Filing Date: 2015-02-10
Classification: G06F,G06K,H04L,H04W

Abstract:
1. An IC chip comprising: a storage section configured to store map information about a plurality of operating system software modules for processing information exchanged in accordance with a plurality of different noncontact communication principles including at least a Java Card principle and a FeliCa principle, wherein the map information includes a plurality of mapping states, and for each one of the plurality of operating system software modules, the map information indicates which of the plurality of operating system software modules are permitted to operate and which of the plurality of operating system software modules are inhibited from operating in each of the plurality of mapping states; a mapping software module including a mapping section that performs mapping of said map information and controls timing such that the plurality of operating system software modules are inhibited from operating simultaneously based on said map information, wherein the mapping section is configured to perform transitions between the plurality of mapping states for permitting or inhibiting the operations of said plurality of operating system software modules based on the destinations of received packets, and wherein a direct transition from a first mapping state in which a first operating system software module is permitted to operate to a second mapping state in which a second operating system software module is permitted to operate is inhibited; and a memory access management module including a management section configured to manage the operations of said operating system software modules, including permitting or inhibiting operations of each of the plurality of operating system software modules based on said map information, wherein if one of said operating system software modules of which the operations are inhibited based on the map information operates, then the management section performs a hardware reset.