Patent ID: 6509593
Filing Date: 2003-01-21
Classification: H01L

Abstract:
A semiconductor device comprising:a transistor having a first impurity region and a second impurity region formed in a semiconductor substrate and a gate electrode formed above the semiconductor substrate; a first insulating film for covering the transistor; a capacitor having a dielectric film formed on the first insulating film and made of one of ferroelectric material and high-dielectric material and an upper electrode and a lower electrode formed to put the dielectric film therebetween; a second insulating film formed above the capacitor and the first insulating film, and a surface of which is planarized; a first hole and a second hole formed in the first insulating film and the second insulating film on the first impurity region and the lower electrode, respectively; a first conductive plug and a second conductive plug formed of same material in the first hole and the second hole, respectively; a third hole formed in the second insulating film above the upper electrode of the capacitor; a first conductive pattern consisting of a conductive film formed on the second insulating film and connected to the upper electrode via the third hole and connected to the first conductive plug; and a second conductive pattern consisting of the conductive film and connected to an upper surface of the second conductive plug, wherein the first conductive plug and the second conductive plug are projected upwardly from a surface of the second insulating film.