Patent ID: 6522115
Filing Date: 2003-02-18
Classification: G05F

Abstract:
A pulse-width-modulated DC-DC converter comprising a series combination of a switching transistor and an inductor, with the switching transistor shunted by a smoothing capacitor in series with a switching element, so that an input voltage (Vin) applied to the series combination of the switching transistor and the inductor is converted into a higher output voltage (Vout) appearing across the smoothing capacitor, an error amplifier having its first input connected to a voltage divider, to which the output voltage can be applied, and having its second input connected to a reference voltage source (Vref), and a comparator having its first and second inputs connected, respectively, to the output of the error amplifier and to a ramp generator compensated by means of a signal proportional to the current (IDrossel) through the inductor, and having its output coupled to the gate electrode of the switching transistor,characterized in that the compensated ramp generator is so designed that the signal proportional to the current (IDrossel) through the inductor is superimposable on the ramp voltage such that an output voltage having a sawtooth waveform with a concave voltage rise is generable, and the ramp generator is designed so that the sum of a correction current (Icorr), which is proportional to the inductor current (IDrossel), and a constant reference current (Iref) is integrable in the ramp generator so that the output voltage (Vramp) of the ramp generator rises quadratically, wherein for the generation of the correction current (Icorr), a first amplifier is provided, to whose input a voltage (VD) proportional to the inductor current (IDrossel) can be applied, and whose output is connected through a resistor to a first node (K1) of constant potential, to which the correction current (Icorr) is feedable, further characterized in that the constant node potential in the first node (K1) is generated by a second operational amplifier and a reference voltage source (Vref1).