Patent ID: 8487422
Filing Date: 2013-07-16
Classification: H01L

Abstract:
1. A device, comprising: first and second substrates positioned on top of one another; first and second integrated circuits formed at least partially in the first and second substrates, respectively; first and second conductive areas each coupled to the first and second integrated circuits; first and second electrically insulated semiconductor regions formed within the first and second substrates, respectively; first and second insulators laterally surrounding the first and second electrically insulated semiconductor regions, respectively, each of the first and second insulators forming a closed perimeter; a first conductive column passing at least partially through the first and second conductive areas and in lateral electrical contact with the first and second conductive areas, the first conductive column also passing at least partially through the first and second electrically insulated semiconductor regions; a first dielectric layer positioned between the first substrate and the first conductive area, the first conductive column extending completely through the first dielectric area; and a second dielectric layer positioned on the first dielectric layer and on the first conductive area, wherein: the second conductive area is positioned on the second dielectric layer and a portion of the second dielectric layer is positioned between the first and second conductive areas.