Patent ID: 7115441
Filing Date: 2006-10-03
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor package, comprising: preparing a first semiconductor chip, wherein a plurality of first central electrode pads are formed along a center of an active surface of the first semiconductor chip; preparing a second semiconductor chip, wherein a plurality of second central electrode pads are formed along a center region of an active surface of the second semiconductor chip, and a plurality of edge electrode pads are formed along an edge of the second semiconductor chip; attaching the second semiconductor chip to a substrate; connecting electrically the edge electrode pads of the second semiconductor chip to the substrate; providing an encapsulant to form a protective structure that encapsulates the connection between the edge electrode pads and a portion of the substrate; forming a plurality of metal bumps on the central electrode pads of the second semiconductor chip; stacking the first semiconductor chip on the second semiconductor chip so that the first central electrode pads of the first semiconductor chip attach to the respective second central electrode pads of the second semiconductor chip via the metal bumps; and forming a package body to encapsulate the first semiconductor chip, the second semiconductor chip, and the encapsulant.