Patent ID: 6251696
Filing Date: 2001-06-26
Classification: H01L

Abstract:
A method of fabricating an integrated circuit including a semiconductor chip having active elements on a main face, and a substrate having an electrode on a main face; said method comprising the steps of:forming at least two surface electrodes on the main face of the semiconductor chip;forming connection wiring portions by making holes penetrating the semiconductor chip from a rear face opposite to the main face, to the surface electrodes on the main surface and filling the holes with conductive materials;forming two separated conductive members on the rear face of the semiconductor chip to provide electrical contact to the respective connection wiring portion; andbonding the semiconductor chip with the substrate by placing the semiconductor chip on the substrate such the respective conductive members on the rear face of the semiconductor chip are opposite and in contact with the electrode on the main face of the substrate, and,then heating the semiconductor chip, and the substrate to electrically and mechanically connect one of the surface electrodes of the chip to the other surface electrode of the chip via the respective conductive members, the respective wiring portions and the surface electrode of the substrate.