Patent ID: 6583020
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A method for fabricating a trench isolation for electrically active components in a semiconductor component, which comprises:providing a silicon substrate with at least one trench capacitor formed therein, the capacitor having a collar; applying a mask to the silicon substrate; providing an etching gas including CHF3, NF3, and N2, with a predominant portion of CHF3, and with less NF3 than N2 and CHF3; subsequently forming a trench having side walls, the trench being formed in the silicon substrate and partially in the trench capacitor by performing a dry etching process using at least one etching gas such that during the dry etching process, polymers are produced that at least partly cover the side walls of the trench and thereby at least partially protect the side walls against an etching attack from the etching gas, whereby the silicon substrate and the collar being etched at the same etching rate; and filling the trench with an insulating oxide.