Patent ID: 6039577
Filing Date: 2000-03-21
Classification: H01L,Y10S

Abstract:
A semiconductor processing method of forming a back-to-back diode construction, comprising:providing a circuit node;forming a first electrically insulative material outwardly of the node;forming an opening in the first electrically insulative material over the node, the opening having an opening width and sidewalls;forming a second electrically insulative material outwardly of the first material and within the opening to a thickness which is less than one-half the opening width to less than completely fill the opening with second electrically insulative material, the first and second materials being selectively etchable relative to one another;anisotropically etching the second material to form a substantially vertically extending sidewall spacer within the opening and to outwardly expose an upper surface of the first material adjacent the sidewall spacer, the sidewall spacer having an inner lateral surface and an outer lateral surface;removing a portion of the first material to outwardly expose at least a portion of the sidewall spacer outer lateral surface;providing a conformal layer of a semiconductive material over the exposed outer lateral sidewall spacer surface and over the inner lateral sidewall spacer surface within the opening to define a container shape of semiconductive material within the opening, the container shape making electrical connection with the circuit node; anddoping the conformal layer to define two discrete doped regions separated by an intervening region, the doped conformal layer comprising back-to-back diodes.