Patent ID: 9196562
Filing Date: 2015-11-24
Classification: H01L

Abstract:
1. A semiconductor arrangement comprising: a silicon body having a top surface and a bottom surface; a thin electrically conductive adhesion layer deposited on the top surface of said silicon body; a thick metal layer arranged on the thin electrically conductive adhesion layer, said thick metal layer having a bonding surface facing away from the top surface of said silicon body; a bonding wire having a diameter of at least 300 micrometers (μm) or a bonding ribbon having a thickness of at least 200 micrometers (μm) bonded to said thick metal layer at the bonding surface of said thick metal layer; and wherein the thickness of said thick metal layer is at least 10 micrometers (μm), said thick metal layer comprises copper or a copper alloy, and said bonding wire or bonding ribbon comprises copper or a copper-based material.