Patent ID: 7212418
Filing Date: 2007-05-01
Classification: H02M,Y02B

Abstract:
1. A synchronous rectifier control circuit comprising: an input unit, for inputting a first input signal and a second input signal from a first input terminal and a second input terminal and producing a first trigger signal and a second trigger signal respectively; a delay unit, for producing a first delay signal and a second delay signal according to said first trigger signal and said second trigger signal respectively; a switch signal unit, for producing at least one switch signal to control said current switch, and a cycle of said each switch signal including a pause period, and said pause period starts when an instant pulse of said first trigger signal or said second trigger signal is sent to said switch signal unit and ends when the next instant pulse of said first delay signal or said second delay signal is sent to said switch signal unit, and said each switch signal turns off its controlled current switch in said pause period; a power supply unit, for supplying an electric power for the operations of said switch signal unit and outputting at least one reference voltage; a first limit voltage comparator of said first input terminal, a second limit voltage comparator of said second input terminal, a first trigger, and a second trigger, and said first trigger and said second trigger respectively use the signals of said first limit voltage comparator and said second limit voltage comparator to produce said first trigger signal and said second trigger signal; and a first switch section and a second switch section, and said first switch section includes a first flip-flop and a first gate driver, and said second switch section includes a second flip-flop and a second gate driver, and the first flip-flop outputs said first trigger signal and said second delay signal, and said first gate driver outputs a first switch signal of said at least one switch signal, and said second flip-flop outputs said second trigger signal and said first delay signal, and said second gate driver outputs a second switch signal of said at least one switch signal.