Patent ID: 6275109
Filing Date: 2001-08-14
Classification: H03F

Abstract:
An integrated circuit comprising a preamplifier for amplifying an input signal comprising first and second non-amplified differential input signals to provide an amplified output signal comprising first and second differential output signals, the preamplifier comprising:(a) a biasing circuit for providing a bias current, said biasing circuit comprising:a bias resistor and first current mirror transistor for producing a preliminary bias current which is proportional to the value of the bias resistor; anda second current mirror transistor coupled to the first current mirror transistor to form a current mirror which generates with the second current mirror transistor the bias current, wherein the bias current is proportional to the preliminary biasing current; and(b) an open-loop differential amplifier, coupled to the biasing circuit, comprising a differential amplifier pair comprising first and second differential amplifying transistors coupled at respective gate terminals to the first and second differential input signals, wherein the first and second amplifying transistors are coupled in open-loop configuration at respective drain terminals to first and second load resistors coupled to ground, respectively, wherein respective source terminals of the amplifying transistors are coupled together to receive the bias current, wherein the first and second differential output signals are formed across the first and second load resistors, respectively, wherein the preamplifier has a gain that depends at least in part on the ratio between the resistance value of the first and second load resistors and the resistance value of the bias resistor.