Patent ID: 6555434
Filing Date: 2003-04-29
Classification: H01L

Abstract:
A method for forming a nonvolatile memory device, comprising the steps of:forming a gate oxide layer on a silicon substrate; forming a first polysilicon layer on said gate oxide layer for serving as a floating gate of said memory device; patterning said first polysilicon layer, said gate oxide layer, and said substrate to form trenches in said substrate and to form a floating gate on an active region separated by said trenches with a patterned gate oxide layer interposed; thermally oxidizing surfaces of said first polysilicon layer and said trenches to form a liner oxide layer, thereby narrowing the width of said floating gate relative to said active region; forming isolation oxide in said trenches to form shallow trench isolation (STI); forming a lightly doped region in said substrate at positions which are not covered by said floating gate; and sequentially forming an interpoly oxide layer and a second polysilicon layer for serving as a control gate of said memory device over said substrate.