Patent ID: 6078524
Filing Date: 2000-06-20
Classification: G11C

Abstract:
A sensing circuit for sensing the binary state of a memory cell in a non-volatile memory device, comprising:a first transistor having first and second spaced-apart regions and a gate, said first spaced-apart region connected to a first voltage source, and said gate connected to a second voltage source;a second transistor having first and second spaced-apart regions and a gate, said first spaced-apart region of said second transistor connected to said second spaced-apart region of said first transistor;a third transistor having first and second spaced-apart regions and a gate, said first spaced-apart region connected to said second spaced-apart region of said second transistor, said gate being electrically connected to the memory cell, and said second spaced-apart region connected to a ground potential;current generation means for generating a first current in response to one binary state of the memory cell and a second current in response to another binary state of the memory cell, said current generation means connected to said first spaced-apart region and said gate of said second transistor wherein a feedback circuit is created between said current generation means and said second transistor; andmeans, connected to said current generation means, for producing a first output signal in response to said first current and a second output signal in response to said second current.