Patent ID: 7709279
Filing Date: 2010-05-04
Classification: G01R,H01L

Abstract:
1. A method for protecting a separate semiconductor device from at least one electrostatic discharge event during testing of the separate semiconductor device, the method comprising: electrically connecting testing circuitry to an insert of configured to establish electrical communication with the separate semiconductor device, the insert consisting of: assembling the separate semiconductor device in superimposed relation over the insert with at least one bond pad of the separate semiconductor device aligned with a corresponding contact structure of the insert and electrically connecting the at least one bond pad of the separate semiconductor device to the corresponding contact structure of the insert; applying at least one test signal through the insert, including through an electrostatic discharge structure carried by the insert, to the separate semiconductor device; and shunting at least one electrostatic discharge event: conveying current within a range defined by the predetermined maximum positive voltage threshold and the predetermined maximum negative voltage threshold through the first resistive element, to the second resistive element, and through the second resistive element for application to a circuit of the separate semiconductor device.