Patent ID: 6229732
Filing Date: 2001-05-08
Classification: G11C

Abstract:
For a non-volatile memory cell having a control gate, a floating gate, a source, a drain and a channel, a circuit coupled to a power supply providing a supply voltage for applying a negative voltage to the control gate and a positive voltage to a complementary node comprising one of the drain, the source and the channel, comprising:a positive voltage source responsive to the supply voltage providing a positive voltage to the complementary node;a negative voltage source responsive to the supply voltage providing a negative voltage to the control gate;a voltage regulator coupled to the negative voltage source and the positive voltage source to maintain the negative voltage at a level responsive to the positive voltage; and whereinthe regulator comprises an amplifier having a first input, a second input, and an output, the first input coupled to the positive voltage, the second input coupled to a reference potential, and the output coupled to the negative voltage source, and including feedback connected between the output and the input.