Patent ID: 6690605
Filing Date: 2004-02-10
Classification: G11C,H03K

Abstract:
A circuit configuration for converting logic signal levels, comprising:an input terminal for receiving an input signal to be converted; level converters, including a first level converter and a second level converter each having an input receiving the input signal in a complementarily fashion with respect to each other, each of said level converters further containing: an output; and two current paths, including a first current path and a second current path, said current paths each having two series-connected transistors of complementary conductivity types and said transistors having control terminals, said transistors of a same conductivity type of different one of said current paths being controlled complementarily with respect to one another and said transistors of a respective same one of said current paths being controlled complementarily with respect to one another; a logic combination element having an output and inputs coupled to said output of each of said level converters; a togglable storage element having an output and an input connected to said output of said logic combination element; and an output terminal connected to said output of said togglable storage element.