Patent ID: 8653672
Filing Date: 2014-02-18
Classification: G11C,H01L,Y10S

Abstract:
1. An integrated circuit structure comprising: a first substrate comprising a first surface supporting interconnect contacts; a substantially flexible semiconductor second substrate comprising a first surface and a second surface at least one of which supports interconnect contacts, wherein the second surface is opposite the first surface, is formed by removing semiconductor material from the second substrate, and is smoothed or polished after removal of the semiconductor material; conductive paths between the interconnect contacts supported by the first surface of the first substrate and the interconnect contacts supported by the second substrate; wherein the first substrate and the second substrate overlap fully or partially in a stacked relationship; and wherein at least one of: i.) the first and second substrates are bonded together in fixed relationship to one another at least predominantly with metal, or at least predominantly with silicon- based dielectric material and metal; and ii.) the integrated circuit structure further comprises a low-stress silicon-based dielectric material having a stress of 5×10