Patent ID: 7673104
Filing Date: 2010-03-02
Classification: G06F

Abstract:
1. An information processing apparatus, comprising: a plurality of storage units; a plurality of hosts each of which issues, to one of said plurality of storage units, a memory access request; and a plurality of system controllers each of which is exclusively connected to at least one of said plurality of storage units and one of said plurality of hosts, each of said plurality of system controllers including: a first canceling unit for, when the timing of fulfilling said memory access request by said memory access control unit is before said broadcast transmitting/receiving unit carries out transmission/reception of said retrieval instruction, canceling said transmission/reception processing on said retrieval instruction in said broadcast transmitting/receiving unit in the system controller to which said memory access control unit, which fulfills said memory access request, belongs; and a second canceling unit for, when the timing of fulfilling said memory access request by said memory access control unit is after said broadcast transmitting/receiving unit carries out said transmission/reception processing on said retrieval instruction, canceling all the processing in the global snoop control units performed in a synchronized state between said plurality of system controllers.