Patent ID: 6628262
Filing Date: 2003-09-30
Classification: G09G

Abstract:
An active matrix display apparatus, comprising:a display panel; a controller; and a drive circuit, the controller having a data input, M (M being an integer larger than 1) clock outputs, and M data outputs, the controller comprising a sampling section connected to the data input and synchronized with a reference clock signal, a memory section connected to the sampling section, a data output section connected to the memory section to supply output display data via the M data outputs, and a clock generating section connected to the reference clock signal, the data output section and to the M clock outputs, the drive circuit comprising N (N being an integer multiple of M) horizontal drivers connected to the M clock outputs to receive clock signals, to the M data outputs to receive the output display data and to the display panel to drive the display panel, each of the horizontal drivers comprises a two-port driver with a port A and a port B, wherein of a group of output display data supplied by the data output section to one driver, odd-numbered data are supplied only to the port A and even-numbered data are supplied only to the port B.