Patent ID: 9065472
Filing Date: 2015-06-23
Classification: H03M

Abstract:
1. An interleaved digital to analog converter (DAC), the DAC comprising: at least a first signal path and a second signal path; at least a first high speed DAC and a second high speed DAC each having an input and an output, wherein the first signal path and the second signal path are electrically coupled to the first high speed DAC input and the second high speed DAC input, respectively; a zero phase clock signal supplied to the first high speed DAC and a 180° phase shifted clock signal supplied to the second high speed DAC; a summation circuit, having at least two inputs and one output, coupled to the outputs of the first high speed DAC and the second high speed DAC; a high-pass delta sigma modulator, a low-pass delta sigma modulator, a band pass delta sigma modulator, or notch filter delta sigma modulator coupled between the first signal path and the first high speed DAC; and a second a high-pass delta sigma modulator, a second low-pass delta sigma modulator, a second band pass delta sigma modulator, or a second notch filter delta sigma modulator electrically coupled between the second signal path and the second high speed DAC.