Patent ID: 6682983
Filing Date: 2004-01-27
Classification: H01L

Abstract:
A method of forming a bottom electrode of a capacitor in a memory device, comprising:providing a semiconductor substrate; defining an active area and a peripheral area on the semiconductor substrate; forming a pad layer on the semiconductor substrate; forming a shielding layer on the pad layer; removing parts of the shielding layer, the pad layer and the semiconductor substrate to form a plurality of first deep trenches within the active area and a plurality of second deep trenches within the peripheral area, wherein the number of the first deep trenches is higher than the number of the second deep trenches; forming a doped oxide layer on the entire surface of the semiconductor substrate to cover the surfaces of the pad layer, the sidewall and bottom of the first deep trenches and the second deep trenches; forming a photoresist layer on the doped oxide layer to fill the first deep trenches and the second deep trenches; performing an exposure process on the photoresist layer with a predetermined incident angle of light source, wherein the photoresist layer outside the level of the deep trenches is exposed, and the photoresist layer inside the deep trenches is not exposed; removing the photoresist layer exposed and outside the level of the deep trenches, wherein the photoresist layer that is not exposed and inside the deep trenches is retained; removing a part of the photoresist layer inside the first deep trenches and the second deep trenches; removing the doped oxide layer outside the level of the photoresist layer to expose the semiconductor substrate on parts of the sidewalls of the first deep trenches and the second deep trenches; removing the photoresist layer remaining in the first deep trenches and the second deep trenches; performing a drive-in process to diffuse the dopants of the doped oxide layer into the exposed semiconductor substrate to form a bottom electrode surrounding the doped oxide layer; and removing the doped oxide layer and the pad layer.