Patent ID: 7632729
Filing Date: 2009-12-15
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: providing a semiconductor substrate with at least a PMOS device and at least an NMOS device; forming conformally a first insulating layer overlying the NMOS and PMOS devices; forming conformally a second insulating layer overlying the first insulating layer; thinning the second insulating layer overlying the PMOS device to leave a remaining portion above the PMOS device, wherein the second insulating layer is remained above the NMOS device; performing a first thermal treatment on the NMOS and PMOS devices; and removing the second insulating layer overlying the NMOS device and the remaining portion of the second insulating layer overlying the PMOS device and thinning the first insulating layer overlying the NMOS and PMOS devices to leave a remaining portion on the NMOS and PMOS devices.