Patent ID: 6046490
Filing Date: 2000-04-04
Classification: H01L

Abstract:
A semiconductor device, comprising:a substrate, the substrate including a semiconductor integrated circuit element;a first insulating layer on the substrate;a capacitor dielectric element on the first insulating layer, the capacitor dielectric element including a bottom electrode, a capacitor dielectric layer and a top electrode;a second insulating layer covering the capacitor element;first contact holes formed through at least one layer selected from the first insulating layer and the second insulating layer;a first wiring layer on at least one layer selected from the first insulating layer and the second insulating layer, the first wiring layer having electrical contact with at least one element selected from the semiconductor element and the capacitor element through the first contact holes;a third insulating layer covering the first wiring layer;second contact holes formed through at least the third insulating layer;a second wiring layer on the third insulating layer, the second wiring layer having electrical contact with the first wiring layer through the second contact holes; anda fourth insulating layer formed on at least one layer selected from the first wiring layer and the third insulating layer and covering at least a part of the area above the semiconductor integrated circuit element and not covering the area above the capacitor dielectric element.