Patent ID: 8850248
Filing Date: 2014-09-30
Classification: G06F,Y02D

Abstract:
1. A multi-core electronic system, configured to access a data storage device, the multi-core electronic system comprising: a plurality of processors each configured to provide a bandwidth requirement, wherein each bandwidth requirement is associated with a bandwidth value; a shared data transmission interface, via which the processors are configured to communicate with the data storage device, wherein the shared data transmission interface supports multiple transmission rates, each associated with one of a plurality of intervals of transmission rates; and a rate adjustment module, configured to receive the bandwidth requirements, generate a total bandwidth requirement from addition of the bandwidth values of the bandwidth requirements, select a minimum transmission rate that is capable of meeting the total bandwidth requirement, and provide the minimum transmission rate to the shared data transmission interface, wherein the rate adjustment module is further configured to select a group of settings associated with the minimum transmission rate from predetermined reference information according to the interval into which the minimum transmission rate falls.