Patent ID: 7829987
Filing Date: 2010-11-09
Classification: H01L

Abstract:
1. A carrier structure embedded with semiconductor chips comprising: a metal plate having a first surface, an opposite second surface, and a plurality of etching grooves penetrating therethrough; an adhesive material is disposed on the first and second surfaces of the metal plate, wherein the etching grooves of the metal plate are filled with the adhesive material; a first thin metal layer and a second thin metal layer arranged respectively on the adhesive material disposed on the first and second surfaces of the metal plate; a plurality of cavities penetrating through the metal plate, the first and second thin metal layers, and the adhesive material, wherein each of the etching grooves of the metal layer locates between two neighboring cavities; a plurality of semiconductor chips embedded in the cavities, mounted in the metal plate, and each having an active surface on which a plurality of electrode pads are disposed, wherein a gap between one semiconductor chip and one cavity is filled with the adhesive material; and a built-up structure formed on the surface of the carrier structure and on the active surfaces of the semiconductor chips, wherein the built-up structure has a plurality of conductive vias therein so as to conduct the semiconductor chips, and has pads formed on the surface thereof.