Patent ID: 6617221
Filing Date: 2003-09-09
Classification: H01L

Abstract:
A method for manufacturing capacitors with an upper electrode smaller than its lower electrode in area, the method comprising the steps of:providing a substrate; forming a lower electrode polysilicon to cover part of the substrate, the lower electrode polysilicon spanning the lower electrode area; forming a dielectric layer to cover the lower electrode polysilicon and part of the substrate; forming an inter layer dielectric (ILD) to cover the dielectric layer, except for the part that covers the lower electrode polysilicon; forming an upper electrode metal to cover the ILD and part of the dielectric layer that covers the lower electrode polysilicon, the upper electrode metal having an opening above the lower electrode polysilicon and spanning the upper electrode area; forming a hard mask to cover the upper electrode metal; forming a photo resist layer to cover the hard mask in the first opening; using the photo resist layer as a mask to dry etch part of the hard mask, part of the upper electrode metal, and part of the dielectric layer, forming a second opening and a plurality of metal blocks, and exposing part of the lower electrode polysilicon, the metal blocks being formed at the bottom of the second opening; removing the photo resist layer and forming an oxide layer on the exposed part of the lower electrode polysilicon; using the hard mask as a mask and performing wet etching to remove the metal blocks; and removing the hard mask.