Patent ID: 6643834
Filing Date: 2003-11-04
Classification: G06F

Abstract:
An analog cell layout designing apparatus comprising:a circuit diagram generating unit which generates an analog circuit diagram; a circuit diagram storing unit which stores circuit diagram data corresponding to the analog circuit diagram generated by said circuit diagram generating unit; a circuit connection information extracting unit which extracts circuit connection information from the analog circuit diagram data stored in said circuit diagram storing unit; a first circuit connection information storing unit which stores circuit connection information extracted by said circuit connection information extracting unit; a design constraint predicting and extracting unit which predicts and extracts devices to be paired from the circuit connection information stored in said first circuit connection information storing unit and adding the devices extracted as design constraints to the circuit connection information; a second circuit connection information storing unit which stores the circuit connection information to which the design constraints are added by said design constraint predicting and extracting unit; an automatic placing unit which places layout cells selected based on the circuit connection information including the design constraints, stored in said second circuit connection information storing unit in accordance with a process design rule; and an automatic routing unit which conducts routing of the layout cells placed by said automatic placing unit in accordance with the process design rule.