Patent ID: 8207952
Filing Date: 2012-06-26
Classification: G09G

Abstract:
1. A pixel array, comprising a plurality of pixel sets disposed on a substrate, each of the pixel sets comprising: a first scan line and a second scan line arranged in parallel; a data line perpendicular to the first scan line and the second scan line; a first active device electrically connected to the first scan line and the data line; a second active device electrically connected to the second scan line and the first active device; a first pixel electrode electrically connected to the first active device; a second pixel electrode electrically connected to the second active device; a first common electrode line disposed under the first pixel electrode and electrically connected to a direct current, a first storage capacitance being generated between the first common electrode line and the first pixel electrode; a second common electrode line disposed under the second pixel electrode and electrically connected to an alternating current, a second storage capacitance being generated between the second common electrode line and the second pixel electrode; at least a first main line disposed at an edge of the substrate, wherein the first common electrode line is electrically connected to the at least a first main line, and the at least a first main line is electrically connected to the direct current; and at least a second main line disposed at another edge of the substrate, wherein the second common electrode line is electrically connected to the at least a second main line, and the at least a second main line is electrically connected to the alternating current, wherein the at least a first main line and the at least a second main line are formed in a film layer, and the first common electrode lines and the second common electrode lines are formed in another film layer.