Patent ID: 6194667
Filing Date: 2001-02-27
Classification: H05K

Abstract:
A receptor pad structure for chip carriers; comprising, in combination:(a) a substrate having a plurality of receptor sites each comprising a controlled collapse chip connector locale defining a specific perimeter, said substrate including a surface with said receptor sites being located on said surface;(b) a circuitized conductive layer being arranged on said substrate surface, conductive lines of said circuit crossing the perimeters of said receptor sites, each of said conductive lines including a bulge pattern located approximately centered at respectively said receptor sites; and(c) a solder mask of an insulating material on said substrate surface substantially covering said conductive layer, said receptor sites being each formed by an intersection of a copper trace of said conductive circuit line and the solder mask, openings formed in said solder mask which are larger in area than said bulge patterns, each of said openings being approximately centered over the center of each of said receptor sites; said openings in said solder mask being of selectively varying shapes so as to facilitate the formation of substantially equal solder areas on all of the receptor sites.