Patent ID: 8872267
Filing Date: 2014-10-28
Classification: H01L

Abstract:
1. A semiconductor device, comprising: (a1) a first transistor coupled between a first potential and a first node; (a2) a second transistor coupled between the first node and a second potential lower than the first potential; (a3) a third transistor coupled between the first potential and a second node; (a4) a fourth transistor coupled between the second node and the second potential; (a5) a fifth transistor coupled between the first node and a first bit line; (a6) a sixth transistor coupled between the second node and a second bit line; (b1) a first active region which is surrounded by an isolation region and in which the fifth transistor is disposed; (b2) a second active region which is surrounded by the isolation region and in which the sixth transistor is disposed; (c) an insulating layer disposed under the first active region and the second active region; (d1) a first semiconductor region of a first conductivity type disposed under the first active region via the insulating layer; and (d2) a second semiconductor region of a second conductivity type opposite to the first conductivity type disposed under the first semiconductor region, wherein a bottom portion and a side portion of the first semiconductor region are disposed so as to come in contact with the second semiconductor region, and wherein the first semiconductor region is coupled to a gate electrode of the fifth transistor.