Patent ID: 8138571
Filing Date: 2012-03-20
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first active semiconductor region having at least one border formed by a first trench isolation structure including a first dielectric fill material having a first type of intrinsic stress, wherein said first trench isolation structure has a first trench width and said first type of intrinsic stress is one of a tensile type stress and a compressive type stress; a second active semiconductor region having at least one border formed by a second trench isolation structure including a second dielectric fill material, said second dielectric fill material having a second type of intrinsic stress, wherein said second trench isolation structure has a second trench width, said first width is less than said second trench width, and said second type of intrinsic stress is of an opposite type from said first type of intrinsic stress; and a third trench isolation structure having a third trench width that is greater than said first trench width, said third isolation structure comprising a third dielectric fill material having a third type of intrinsic stress.