Patent ID: 7120780
Filing Date: 2006-10-10
Classification: G06F

Abstract:
1. A microprocessor for processing instructions, comprising: a plurality of clusters for receiving the instructions, each of the clusters having a plurality of functional units for executing the instructions; and a plurality of register sub-files each having a plurality of registers for storing data for executing the instructions, wherein the register sub-files each have a same number of registers; wherein each of the clusters is associated with corresponding one of the register sub-files, and each of the register sub-files is associated with a corresponding one of the clusters, so that an instruction dispatched to a cluster is executed by accessing registers in a register sub-file associated with the cluster to which the instruction is dispatched, and wherein each of the register sub-files has one write port to which a corresponding cluster sends data to be written into registers in a register sub-file associated with the corresponding cluster.