Patent ID: 6346445
Filing Date: 2002-02-12
Classification: H01L,Y10S

Abstract:
A method for fabricating semiconductor devices with dual gate oxides, said method comprising:providing a semiconductor substrate; forming a first gate oxide on said semiconductor substrate; forming a first conductive layer on said first gate oxide; forming a photoresist on said first conductive layer while exposing a portion of said first conductive layer; removing said exposed portion of said first conductive layer and said first gate oxide thereunder; forming a second gate oxide on said first conductive layer on said first gate oxide and on said semiconductor substrate; forming a second conductive layer on said second gate oxide; forming a protecting layer on said second conductive layer; defining a first active area over said second gate oxide above said first gate oxide and a second active area over said second gate oxide on said semiconductor substrate; respectively forming a trench between said first active area and said second active area and beside another respective side of said first active area and said second active area; forming a dielectric layer over said first active area and said second active area to fill said trench; planarizing said dielectric layer until exposing said second conductive layer over said first active area while a rest of said protecting layer left on said second conductive layer of said second active area; sequentially removing said exposed second conductive layer and said second gate oxide thereunder over said first active area; removing said rest of said protecting layer over said second active area; forming a third conductive layer over said semiconductor substrate; and patterning said third conductive layer to respectively form a conductive gate on said first gate oxide of said first active area and a conductive gate on said second gate oxide of said second active area.