Patent ID: 7381999
Filing Date: 2008-06-03
Classification: H01L

Abstract:
1. A memory device, comprising: a thyristor-based storage element; and an access device coupled to the thyristor-based storage element at a common storage node; the thyristor-based storage element having a first gate stack, the first gate stack having a first workfunction configured to a base region of the thyristor-based storage element; the access device having a second gate stack, the second gate stack having a second workfunction; the first gate stack includes a first conductive layer formed over a gate dielectric and a second conductive layer formed over the first conductive layer; the second gate stack includes the second conductive layer formed over the gate dielectric; wherein the first workfunction is operationally distinct from the second workfunction, the first workfunction associated with a bulk workfunction of the first conductive layer.