Patent ID: 6287886
Filing Date: 2001-09-11
Classification: H01L

Abstract:
A method of forming a negative-type metal oxide-semiconductor (NMOS) in a complimentary metal oxide-semiconductor (CMOS) image sensor, the image sensor being formed in a predetermined region of a semiconductor wafer which is covered with a positive-type (P-type) substrate and comprises at least one negative-channel (N-channel) area for forming one negative-channel (N-channel) for forming one negative-type MOS (NMOS) transistor and a sensor area for forming a photo-diode sensor, the method comprising the following steps:forming at least one gate electrode in the N-channel area;performing a first ion-implantation process to form a lightly doped drain (LDD) layer in predetermined areas on the surface of the P-type substrate in the N-channel area next to the gate electrode;performing a second ion-implantation process to form a heavy doped drain (HDD) layer in another predetermined area on the surface of the substrate in the N-channel area next to the LDD; andperforming a third ion-implantation process to form a doped layer with phosphorus as the major dopant on the surface of the substrate in the sensor area;wherein the dopant concentration of the HDD layer is heavier than that of the LDD layer, and the doped layer in the sensor area and the P-type substrate under the doped layer form a PN junction that functions as a photo-diode.