Patent ID: 6153454
Filing Date: 2000-11-28
Classification: H01L

Abstract:
A method for forming a transistor on a substrate, said method comprising the steps of:(a) forming a doping mask comprising at least a first element over a first region of substrate and a second element over a second region of substrate, each element having a first maximum thickness, so that said first region of the substrate and said second region of the substrate are substantially shielded from doping impurities and a gate structure region of the substrate is not shielded from doping impurities, wherein said first region is to have a source for the transistor formed therein and said second region is to have a drain for the transistor formed therein, and wherein said gate structure region is to underlie a gate for the transistor;(b) introducing ions into said gate structure region of the substrate between said elements of said doping mask; and(c) reducing the thickness of each of said first and second elements to a second thickness about 0.5 to about 0.66 of the first thickness, thereby exposing a convex portion of said substrate to a degree enabling avalanche breakdown voltage to be greater than about 5 volts.