Patent ID: 8072248
Filing Date: 2011-12-06
Classification: H03K,H03L

Abstract:
1. A delay module, comprising: a first delay unit, a second delay unit, and an inverter, each of the first delay unit and the second delay unit comprising two logic gates adapted to invert a phase: a logic gate for gating and a logic gate for delaying, an output port of the logic gate for gating electrically connected to an input port of the logic gate for delaying, wherein: an input port of the logic gate for gating of the first delay unit is electrically connected to an output port of the inverter; an output port of the logic gate for delaying of the first delay unit is electrically connect to an input port of the logic gate for delaying of the second delay unit; an input port of the inverter is electrically connected to an input port of the logic gate for gating of the second delay unit; and the input port of the inverter is adapted to input a clock signal to be delayed, and the logic gate for delaying of the second delay unit is adapted to output a delayed clock signal.