Patent ID: 8010720
Filing Date: 2011-08-30
Classification: G06F,H04L

Abstract:
1. A storage system that is connected to a higher-level device, the storage system comprising: a plurality of storage devices; and a controller that receives an access request from the higher-level device and accesses any one or more storage devices of the plurality of storage devices in accordance with the access request, wherein the controller includes plural integrated circuits that include a transmission side integrated circuit component and a reception side integrated circuit component, wherein the transmission side integrated circuit component includes: wherein the reception side integrated circuit component includes; wherein the first packet includes a parameter value that represents, of a plurality of first packet types that respectively correspond to a plurality of second packet types, a first packet type that follows the request, wherein the second packet includes a second header portion and a second data portion, wherein the second data portion that is included in the second packet that is transmitted from the transmission side second circuit component includes the first packet, and the second header portion includes a predetermined value as a parameter value that represents the type of the second packet, wherein the predetermined value is a value that represents a predetermined one second packet type of the plurality of second packet types, wherein the controller includes a microprocessor that processes the access request, a cache memory that temporarily stores data that is to be written in the one or more storage devices or has been read from the one or more storage devices in accordance with the access request, one or more higher-level adapters that are one or more interface circuits that are connected to the higher-level device, and one or more lower-level adapters that are connected to the one or more storage devices of the plurality of storage devices, wherein the one or more higher-level adapters and the one or more lower-level adapters are the integrated circuits, wherein each of the integrated circuits includes the transmission side integrated circuit component and the reception side integrated circuit component, wherein the transmission side first circuit component and the reception side first circuit component are application layer circuit components, wherein the transmission side second circuit component and the reception side second circuit component are the transaction layer circuit components of transaction layer circuit components, data link layer circuit components and physical layer circuit components that are included in a PCI-Express interface circuit component, wherein the plurality of second packet types are Posted, Non-Posted and Completion, and wherein the predetermined value is a value that represents Posted.