Patent ID: 7301492
Filing Date: 2007-11-27
Classification: H03M

Abstract:
1. A method for sampling an input signal from an input device, and a reference signal, the input signal having a positive component and a negative component and the reference signal having a positive component and a negative component, the method comprising the steps of: establishing a first integrate configuration during a first integrate phase, so that a first end of each of a first plurality of sample capacitors is coupled to the positive component of the reference signal and a second end of each of the first plurality of sample capacitors is coupled to an amplifier, and a first end of each of a second plurality of capacitors is coupled to the negative component of the reference signal and a second end of each of the second plurality of sample capacitors is coupled to the amplifier; and establishing a first sample configuration during a first sample phase, wherein at least one capacitor from the first plurality of sample capacitors and at least one capacitor from the second plurality of sample capacitors are connected to a common component of the input signal; wherein a charge, remaining at an end of the first integrate phase, of the at least one capacitor from the first plurality of sample capacitors is cancelled by the charge from the at least one capacitor from the second plurality of sample capacitors.