Patent ID: 8124479
Filing Date: 2012-02-28
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, the method comprising: forming pillar patterns, each including a sidewall contact hole in a first diffusion barrier layer, over a semiconductor substrate, the pillar patterns including first and second pillar patterns; forming a silicon layer between the first and second pillar patterns, wherein the silicon layer is an epitaxially grown silicon layer formed using a Silicon Epitaxial Growth (SEG) method; implanting impurity ions into the silicon layer; diffusing the implanted impurity ions from the silicon layer through the sidewall contact holes into the pillar patterns to form ion implanted regions; removing substantially all of the silicon layer after forming the ion implanted regions; and forming a conductive pattern between the first and second pillar patterns, the conductive pattern coupled to the ion implanted region, wherein the conductive pattern is formed of material other than the silicon layer.