Patent ID: 9123775
Filing Date: 2015-09-01
Classification: G02F,H01L

Abstract:
1. A method for manufacturing a thin film transistor array substrate, comprising: forming a passivation layer and a resin layer on a substrate in sequence, wherein, the resin layer adopts a photosensitive resin material; removing a part of the resin layer through a patterning process, so as to form a resin-layer via hole passing through the resin layer, the formation of the resin-layer via hole includes: etching the passivation layer under the resin-layer via hole, so as to form a via hole passing through the resin layer and the passivation layer; treating the via hole with an etching process, so that a sidewall at the resin layer and a sidewall at the passivation layer for the via hole smoothly adjoin, wherein, a dry etching with an etch gas including a fluorine containing gas and an oxygen gas is used for the etching of the passivation layer under the resin-layer via hole, and mass of the oxygen gas is smaller than or equal to mass of the fluorine containing gas, wherein, an ashing process with an etch gas including a fluorine containing gas and an oxygen gas is used for the treatment of the via hole with the etching process, and mass of the oxygen gas is larger than mass of the fluorine containing gas,