Patent ID: 8623719
Filing Date: 2014-01-07
Classification: H01L

Abstract:
1. A method of creating a semiconductor structure comprising: providing an insulator layer on a substrate; patterning said insulator layer to form at least one recess in said insulator layer; forming at least one conductive strap within said at least one recess in said insulator layer; patterning a plurality of fins above said insulator layer, relative to a bottom of said semiconductor structure, each of said fins comprising a central semiconductor portion and conductive end portions, said at least one conductive strap being positioned within said insulator layer below said plurality of fins, relative to said bottom of said semiconductor structure, said plurality of fins being parallel to each other, and said at least one conductive strap being perpendicular to said fins and contacting said fins, and said at least one conductive strap comprising projected portions extending into said fins, collinear with each of said plurality of fins, relative to said bottom of said semiconductor structure; forming a gate dielectric contacting and covering said central semiconductor portion of said plurality of fins; and forming a gate conductor contacting and covering said gate dielectric, said at least one conductive strap being disposed in at least one of a source region and a drain region of said semiconductor structure.