Patent ID: 6249166
Filing Date: 2001-06-19
Classification: H03K,H04L

Abstract:
A programmable pulse delay system for providing predetermined amounts of delay to each of successive pulses, comprising:first conductive means providing the successive pulses;second conductive means providing delay control information having delay control values corresponding to each of the successive pulses;a plurality of pulse delay units coupled to said first conductive means and connected in series so that each pulse of the successive pulses injected into a first pulse delay unit in said plurality of pulse delay units propagates through each of said plurality of pulse delay units before being output by a last pulse delay unit in said plurality of pulse delay units, each of said plurality of pulse delay units including a switch; said switch being adapted to change a pulse delay of said pulse delay unit in response to said delay control value;a plurality of memory units coupled to said plurality of pulse delay units and to said second conductive means, each of said plurality of memory units for storing said delay control values corresponding to each of the successive pulses propagating through said plurality of pulse delay units; andcommutator means coupled to said memory units and to said pulse delay units for selectively coupling each successive pulse delay unit in said plurality of pulse delay units to the memory unit in said plurality of memory units which includes a delay control value corresponding to each of the successive pulses propagating through said plurality of pulse delay units.