Patent ID: 6710590
Filing Date: 2004-03-23
Classification: G01R

Abstract:
An apparatus for testing a semiconductor device comprising:a tester for generating and receiving test signals; a plurality of cables connected to the tester for transmitting the test signals; a test head; a plurality of pin cards housed in the test head and connected to the plurality of cables; a plurality of contact pins connected to the plurality of pin cards; a plate comprising a plurality of apertures; means for coupling the plate to the test head to provide pivotal movement between an open position and a closed position wherein, in the closed position, the plate forms a closure with the test head; a circuit board for mounting said semiconductor device thereon; and an assembly secured to the plate and interconnected with the circuit board such that the plurality of contact pins extending through said plurality of apertures contact said circuit board to establish electrical contact between the tester and the semiconductor device.