Patent ID: 8853665
Filing Date: 2014-10-07
Classification: H01L

Abstract:
1. A method of forming memory cells, comprising: forming a pair of spaced-apart electrical nodes supported by a semiconductor substrate; the nodes being a first node and a second node; forming a patterning structure over the nodes, the patterning structure spanning the space between the nodes and having a first sidewall in opposing relation to a second sidewall; the first sidewall being directly over the first node and the second sidewall being directly over the second node; the patterning structure comprising a first non-oxygen-containing material; forming oxygen-sensitive material along an exterior surface of the patterning structure; the oxygen-sensitive material being configured as a bridge extending from an upper surface of the first node to an upper surface of the second node; said bridge having a first segment along the first sidewall, a second segment along the second sidewall, and a third segment across a top of the patterning structure; forming second non-oxygen-containing material along the first, second and third segments of the oxygen-sensitive material bridge; removing at least some of the third segment of the oxygen-sensitive material bridge to separate the first segment from the second segment; incorporating the first segment and first node into a first memory cell; and incorporating the second segment and second node into a second memory cell which is adjacent to the first memory cell.