Patent ID: 7451387
Filing Date: 2008-11-11
Classification: G06F

Abstract:
1. An apparatus for detecting the occurrence of and for mitigating a soft-error affecting an integrated circuit memory storage device associated with a peripheral component of the apparatus and provisioned services, the apparatus comprising: an augmented memory allocation lookup table corresponding to the integrated circuit memory storage device tracking memory allocation, each of a plurality of memory allocation entries of the augmented memory allocation lookup table storing an indication specifying a level of impact one of the apparatus, the peripheral component, and the provisioned services would experience if the memory region of the integrated circuit memory storage device corresponding to the memory allocation entry was reinitialized; persistent storage means for persistently storing alarm information regarding raised parity error alarms; parity error detection means for periodically ascertaining whether the integrated circuit memory storage device is affected by a parity error and for raising a parity error alarm; soft-error mitigation means responsive to a raised parity error alarm for selectively inspecting the augmented memory allocation lookup table to select memory regions of the integrated circuit memory storage device in an order of increasing level of impact and for reinitializing the selected memory regions in increasing level of impact order.