Patent ID: 6727541
Filing Date: 2004-04-27
Classification: H01L,Y10S

Abstract:
A semiconductor memory device having a trench capacitor, comprising:a semiconductor substrate of a first conductivity type, having a trench which is formed from an upper surface of the semiconductor substrate to a predetermined depth; a capacitor formed in a lower portion of the trench and the semiconductor substrate of the first conductivity type which is adjacent to the lower portion of the trench; a first conductive layer formed in the first trench and right above the first capacitor to which the first conductive layer is electrically connected; a first insulation film formed in the trench and right above the first conductive layer; a first diffusion layer formed in the semiconductor substrate of the first conductivity type which is adjacent to the first conductive layer and the first insulation film, the first diffusion layer served as a source/drain electrode; a gate insulation film formed on a predetermined portion of the trench, the predetermined portion being located above the first insulation film; a second diffusion film formed in an upper portion of the semiconductor substrate of the first conductivity type, the second diffusion layer being adjacent to the gate insulation film and served as a source/drain electrode; a second conductive layer having a first portion formed on the gate insulation film in the trench and a second portion formed right above the first portion and extended up to a higher position than an upper surface of the semiconductor substrate of the first conductivity type, the first and the second portions served as a gate electrode and a word line respectively; and a second insulation film covered with an upper and side surface of the second portion of the gate electrode.