Patent ID: 7989852
Filing Date: 2011-08-02
Classification: H01L

Abstract:
1. An integrated circuit, comprising: N plane-like metal layers, where N is an integer greater than one; a first plane-like metal layer to include M contact portions, the M contact portions to communicate with the N plane-like metal layers in, respectively, where M is an integer greater than one, and wherein the first plane-like metal layer and the N plane-like metal layers are located in separate planes; a first drain region having a symmetric shape across at least one of horizontal and vertical centerlines; a first gate region having a first shape, the first gate region surrounding the first drain region; a second drain region having the symmetric shape; a second gate region having the first shape, the second gate region surrounding the second drain region; a connecting region connecting the first and second gate regions; a first source region arranged adjacent to and on one side of the first gate region, the second gate region, and the connecting region; a second source region arranged adjacent to and on one side of side of the first gate region, the second gate region and the connecting region; wherein the first source region, the second source region, the first drain region and the second drain region communicate with at least two of the N plane-like metal layers; and first and second substrate contacts arranged in and surrounded by the first and second source regions, the first and second substrate contacts being aligned with the connecting region.