Patent ID: 6323715
Filing Date: 2001-11-27
Classification: G06F,H03K

Abstract:
A method of switching between asynchronous data inputs in a digital system without causing a glitch in the output comprising the steps of:generating a first clock input signal;generating a second clock input signal;synchronizing a select input signal with the first clock input signal, the select input signal deselecting the first clock signal and delaying selection of the second clock signal;multiplexing the first and second clock signals with the select input signal to generate a multiplexed clock output signal corresponding to one of the clock input signals; andresponsive to the select input signal, switching between the first and second clock input signals, the multiplexed output producing a momentary, pulse before producing an output signal corresponding to the second clock input clock signal, a width of the momentary pulse being a function of the selection delay of the select input signal.