Patent ID: 6198421
Filing Date: 2001-03-06
Classification: H03M

Abstract:
A flash analog-to-digital converter (ADC) comprising:a plurality of N stages, to provide N digital signals, including first stage to provide a sum of an input current, related to a voltage to be converted, and of a reference current and to provide a first digital signal in one of first and second states if said first sum has one of first and second signs respectively, andi stages, with i=2 . . . N, each stage i including an output circuit and 2.sup.(i-2) sub-stages coupled to said output circuit, each sub-stage including input and hidden circuit coupled therebetween, said input circuit configured to provide a first sum of said input current and of a first reference current, each hidden circuit providing to said output to circuit a second reference current when said first sum has a first sign, said output circuit generating an i-th digital signal in one of a first and second states when a second sum of said input current and of said second reference current has one of first and second signs respectively.