Patent ID: 8994141
Filing Date: 2015-03-31
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate having a main surface; a first impurity region of a first conductivity type provided in said substrate; at least one RESURF (Reduced Surface Field) layer of a second conductivity type provided at said main surface in said first impurity region; a second impurity region in contact with said RESURF layer and arranged at said main surface in said first impurity region, the second impurity region being of the second conductivity type and having an impurity concentration higher than the impurity concentration of said RESURF layer; a plurality of field plates, at least one of said plurality of field plates being electrically connected to said first impurity region, at least another one of said plurality of field plates being electrically connected to said second impurity region; a stopper region arranged at said main surface, the stopper region being of the first conductivity type; a first electrode abutting the stopper region and said at least one of said plurality of field plates and adjacent to the stopper region and said at least one of said plurality of field plates; a second electrode abutting the second impurity region and said at least another one of said plurality of field plates and adjacent to the second impurity region and said at least another one of said plurality of field plates; and wherein the first conductivity type is different than the second conductivity type, and said plurality of field plates including a lower field plate and an upper field plate, said lower field plate being capable of generating a lower capacitive coupling with said substrate, said upper field plate being located at a first position farther from said substrate than said lower field plate and being capable of generating an upper capacitive coupling with said lower field plate, said upper capacitive coupling having a capacitance greater than the capacitance of said lower capacitive coupling.