Patent ID: 9170966
Filing Date: 2015-10-27
Classification: G06F

Abstract:
1. A method of deterministic message processing in a direct memory access (DMA) adapter, the DMA adapter utilizing a first-in-first-out (FIFO) message queue for processing packets received by the DMA adapter, the DMA adapter using a head pointer, a tail pointer, a sub-head pointer, and a sub-tail pointer to point to particular packets within the FIFO message queue, the method comprising iteratively performing the following steps by a DMA adapter: incrementing from the sub-head pointer, the sub-tail pointer until encountering an out-of-sequence packet; consuming packets between the sub-head pointer and the sub-tail pointer including incrementing with the consumption of each packet, the sub-head pointer until determining that the sub-head pointer is equal to the sub-tail pointer; in response to determining that the sub-head pointer is equal to the sub-tail pointer, determining whether the head pointer is pointing to the next in-sequence packet; if the head pointer is pointing to the next in-sequence packet, resetting the sub-head pointer and the sub-tail pointer to the head pointer; and if the head pointer is not pointing to the next in-sequence packet, resetting the sub-head pointer and the sub-tail pointer to the next in-sequence packet.