Patent ID: 8330924
Filing Date: 2012-12-11
Classification: G02F

Abstract:
1. A manufacturing method of an array substrate for a liquid crystal display device, comprising: forming a gate line on a transparent substrate, the gate line includes a gate electrode; forming a gate insulating layer and a semiconductor layer over the gate line; forming a first data line having a first width, a first source electrode and a drain electrode on the gate insulating layer and on the semiconductor layer, the first data line connected to the first source electrode and crossing the gate line, the first source electrode protruding from the first data line, and the drain electrode spaced apart from the first source electrode; forming a passivation layer on the first source electrode, the first data line and the drain electrode, the passivation layer includes a drain contact hole and a data contact hole; and forming a pixel electrode, a second data line having a second width and a second source electrode, the pixel electrode connected to the drain electrode through the drain contact hole and overlapping an adjacent gate line, the second data line connected to the first data line and the first source electrode through the data contact hole, and the second source electrode protruding from the second data line, wherein the passivation layer is disposed between the first and second source electrodes, wherein the second source electrode is connected to the second data line, wherein the second source electrode has a width greater than the first source electrode, wherein the second width of the second data line is larger than the first width of the first data line, wherein the first source electrode has the same shape as the second source electrode, and wherein the second source electrode partially blocks a portion of the semiconductor layer exposed between the first source electrode and the drain electrode.