Patent ID: 6448607
Filing Date: 2002-09-10
Classification: G11C,H01L

Abstract:
A nonvolatile memory having embedded word lines, comprising:rows of word lines, each word line comprising a conductive layer embedded in a trench having a predetermined trench depth formed in a semiconductor substrate, wherein said conductive layer is isolated from said semiconductor substrate by an ONO film deposited on an interior surface of said trench; a diffusion drain of a first conductivity type formed in said semiconductor substrate between two adjacent said word lines; a first well of a second conductivity type formed in said semiconductor substrate between two adjacent said word lines and beneath said diffusion drain, wherein said first well has a well depth less than said predetermined trench depth; a second well of said first conductivity type formed beneath said first well and said trench in said semiconductor substrate, wherein said second well and said diffusion drain defines a vertical channel in said first well; and columns of bit lines laid on said semiconductor substrate, wherein said bit lines are isolated from said word lines with an insulating layer and said diffusion drain electrically connects with one of said bit lines.