Patent ID: 6564355
Filing Date: 2003-05-13
Classification: G06F

Abstract:
A method for analyzing simultaneous switching noise in an electronic circuit, the method comprising:providing a model of an electronic circuit, said electronic circuit including: a plurality of drivers, each of said drivers coupled to a power plane, a ground plane, and a transmission line; a voltage source coupled to said power plane and said ground plane, wherein said voltage source is configured to provide a specified voltage between said power plane and said ground plane; and a plurality of decoupling capacitors; simulating simultaneous switching of a two or more of said drivers from a first voltage level to a second voltage level; calculating a transmission line solution; calculating a power plane solution; superimposing said transmission line solution and said power plane solution; and analyzing plane bounce, wherein said plane bounce comprises one or more voltage fluctuations between said power plane and said ground plane.