Patent ID: 7799674
Filing Date: 2010-09-21
Classification: C23C,H01L

Abstract:
1. A method for forming interconnect wiring, comprising: (i) covering a surface of a connection hole penetrating through interconnect dielectric layers formed on a substrate for interconnect wiring, with an underlying alloy layer selected from the group consisting of a film of an alloy containing ruthenium (Ru) and at least one other metal atom (M) wherein M is Ti or Ta, a nitride film of the alloy, a carbide film of the alloy, and a nitride-carbide film of the alloy, by atomic layer deposition comprising supplying a Ru precursor and an M precursor alternately in cycles wherein the Ru precursor is supplied in two pulses per one pulse of the M precursor supplied in one cycle; and (ii) filling copper or a copper compound by CVD into at least a part of the connection hole covered with the underlying alloy layer.