Patent ID: 6084432
Filing Date: 2000-07-04
Classification: H03K

Abstract:
A driver circuit comprising:an output node;a first PFET and a first resistor connected between a power supply and the node, wherein the first resistor is connected between the first PFET and the node;a first NFET and a second resistor connected between a ground potential and the node, wherein the second resistor is connected between the first NFET and the node;a third resistor connected between an input to the driver circuit and a gate electrode of the first PFET;a fourth resistor connected between the input to the driver circuit and a gate electrode of the first NFET;a second PFET and a fifth resistor connected between the power supply and the node, wherein the fifth resistor is connected between the second PFET and the node;a second NFET and a sixth resistor connected between the ground potential and the node, wherein the sixth resistor is connected between the second NFET and the node;a seventh resistor connected between the gate electrode of the first PFET and a gate electrode of the second PFET; andan eighth resistor connected between the gate electrode of the first NFET and a gate electrode of the second NFET.