Patent ID: 6308306
Filing Date: 2001-10-23
Classification: G06F

Abstract:
A delay route searching method for logical circuits comprising:a fan-out direction delay time calculating step to calculate the transit time from at least one component as a starting component, which is a starting point in a group of components constituting a logical circuit to be subjected to delay route searching, to the other components as target components, and to store the name of each of the target components and the worst one of all the calculated transit times with respect to that target component;a fan-in direction delay time calculating step to calculate the remaining time to at least one component as a ending component, which is an end point in the group of components constituting the logical circuit to be subjected to delay route searching, from the other components as target components, and to store the name of each of the target components and the worst one of all the calculated remaining times with respect to that target component;a delay analysis non-needing component identifying step to add the worst transit time stored at said fan-out direction delay time calculating step to the worst remaining time stored at said fan-in direction delay time calculating step with respect to each target component, to compare the result of each such addition with a design standard delay time, and to, if the addition result is not larger than the design standard delay time, determine as a free-of-delay-analysis component the target component on which that addition result has been obtained; anda delay analysis non-needing component-reflecting delay route searching step to perform delay route searching on the routes except for all the routes involving the free-of-delay-analysis component.