Patent ID: 8878583
Filing Date: 2014-11-04
Classification: H03K

Abstract:
1. A pulse width modulation (PWM) duty cycle converter comprising: a PWM signal generator configured to generate a first PWM signal by comparing a triangular carrier wave with at least one duty command from at least one signal source; a timing signal generator configured to generate a timing signal synchronously with at least one of a maximum value and a minimum value of an amplitude of the carrier wave; a limit signal generator configured to generate a limit signal in response to the timing signal, the limit signal setting both an upper limit and a lower limit on a duty cycle of the first PWM signal, and a duty cycle limiter configured to combine the first PWM signal and the limit signal to output a second PWM signal having a limited duty cycle, wherein the limit signal comprises an upper limit signal and a lower limit signal, the upper limit signal sets the upper limit on the duty cycle of the first PWM signal, and the lower limit signal sets the lower limit on the duty cycle of the first PWM signal.