Patent ID: 7679584
Filing Date: 2010-03-16
Classification: G09G

Abstract:
1. An Electron Emission Display (EED) comprising: a high voltage terminal for a high voltage element; a low voltage terminal for a low voltage element; a ferrite bead, connected between the high voltage terminal and the low voltage terminal, to separate the high voltage terminal and the low voltage terminal into a high voltage ground and a low voltage ground, to block RF noise from the high voltage ground; and a plurality of capacitors respectively connected between a digital logic power source and the low voltage terminal and between an analog logic power source and the low voltage terminal, the ferrite bead and the capacitors adapted to function as a n-type noise reduction circuit; the low voltage terminal is commonly connected to the digital logic power source for a digital logic element and analog logic power source for an analog logic element, and the ferrite bead is connected between the digital logic power source and the analog logic power source to mutually block noise from each other.