Patent ID: 8750014
Filing Date: 2014-06-10
Classification: G11C,H03K

Abstract:
1. A signal driver comprising: an input stage configured to receive an input signal and configured to provide a delayed input signal having a delay relative to the input signal; and an output stage coupled to the input stage to receive the delayed input signal and configured to receive a complement of the input signal, the output stage further configured to provide a first voltage at an output in response to the complement of the input signal transitioning from a first logic level to a second logic level and to provide a second voltage at the output in response to the complement of the input signal transitioning from the second logic level to the first logic level, the output stage further configured to place the output in a tri-state condition in response to receiving the delayed input signal and wherein the second voltage at the output is maintained by a current source responsive to the tri-state condition of the output; wherein the output stage does not comprise a latch.