Patent ID: 9043675
Filing Date: 2015-05-26
Classification: G06F,H03M

Abstract:
1. A storage device comprising: a nonvolatile memory having multiple blocks, each block including multiple pages; an error correcting circuit that is configured to detect and correct an error in data read out from a block of the nonvolatile memory at a location referenced by a logical address and issue a notification of an error occurrence when the error cannot be corrected; and a processing circuit for controlling the operations of the error correcting circuit and the nonvolatile memory, wherein when the notification of the error occurrence is received from the error correcting circuit for the data read out of a page in a first block of the nonvolatile memory, the processing circuit records a physical address of the page in the first block in a free part of a page in a second block of the nonvolatile memory into which the read data are to be written.