Patent ID: 6723616
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device using shallow trench isolation, comprising:forming a dielectric stack outwardly from a semiconductor substrate, the dielectric stack comprising: a first sacrificial dielectric layer disposed outwardly from the semiconductor substrate; and a second sacrificial dielectric layer disposed outwardly from the first sacrificial dielectric layer; wherein the first sacrificial dielectric layer is selectively etchable from the second sacrificial dielectric layer; removing a portion of the first sacrificial dielectric layer, a portion of the second sacrificial dielectric layer, and a portion of the substrate to form a trench within the semiconductor substrate and the dielectric stack; forming a first isolation dielectric region within the trench using thermal oxidation; forming a second isolation dielectric region on said first isolation dielectric region within the trench; removing the second sacrificial dielectric layer; and after removing the second sacrificial dielectric layer, depositing a dielectric material to form a third sacrificial dielectric layer outwardly from the first sacrificial dielectric layer, wherein a combined thickness of the first sacrificial dielectric layer and the third sacrificial dielectric layer comprises at least 100 Angstroms.