Patent ID: 7535251
Filing Date: 2009-05-19
Classification: G11C,H03K

Abstract:
1. A semiconductor device comprising: an output buffer circuit having a plurality of transistors coupled in parallel with each other to an output terminal and having respective impedances thereof, the transistors being controlled based on output buffer codes; and an impedance adjusting circuit to adjust an impedance value of the output buffer circuit, wherein the impedance adjusting circuit includes: an output buffer code generating circuit to generate the output buffer codes to set the impedance of the output buffer circuit to a desired value; an impedance measuring circuit to measure impedance values of reference transistor portions including reference transistors provided in association with respective transistor groups, the reference transistors being the same transistor size as associated transistors of the output buffer circuit; and an impedance code generating circuit to generate impedance codes corresponding to impedance values of the reference transistor portions, each said impedance code serving as a reference for the generation of the output buffer codes based on a result of impedance value measurements from the impedance measuring circuit, and the impedance code generating circuit outputting the generated impedance codes to the output buffer code generating circuit, wherein the impedance measuring circuit includes: a plurality of impedance measuring units, each including a plurality of constant current portions, with each said constant current portion having a control node, being coupled to an associated one of the reference transistor portions, and being coupled to an associated first voltage via a corresponding connection node of a group of connection nodes, the constant current portions being provided in parallel with each other and being coupled to an associated second voltage in response to a corresponding instruction to allow constant current to flow; a control voltage generating portion to generate control voltages for supply to control nodes of associated constant current portions; and a comparator portion to compare voltage at each connection node with an associated reference voltage and to output results of the comparisons.