Patent ID: 8355276
Filing Date: 2013-01-15
Classification: G11C

Abstract:
1. A semiconductor memory storage device comprising: a plurality of storage cells for storing data; a plurality of access devices for allowing access to said corresponding plurality of storage cells, said plurality of access devices being arranged in at least two groups, access to each of said at least two groups being controlled by an access control line; access control circuitry configured to control a voltage level supplied to a selected one of at least two of said access control lines during access to said storage cell, said access control circuitry comprising a capacitor and switching circuitry; and control circuitry responsive to a data access request to access a selected storage cell to: connect a selected one of said access control lines to a voltage level to allow access via one of said access devices to said selected storage cell; and control said switching circuitry of said access control circuitry to connect said capacitor of said access control circuitry to said selected access control line and thereby change said voltage level supplied to said selected access control line.