Patent ID: 8334708
Filing Date: 2012-12-18
Classification: H03K

Abstract:
1. A CMOS driver circuit, comprising: a first tristate inverter that provides a first clock signal along a first signal path; a second tristate inverter that provides a second clock signal along a second signal path, the first clock signal and the second clock signal being out of phase; at least one first capacitor that receives the first clock signal in the first signal path; at least one second capacitor that receives the second clock signal in the second signal path; a switch configured between the first signal path and the second signal path, wherein the switch is closed to connect the first and second signal paths, and opened to isolate the first and second signal paths, wherein during a stored-charge recycling process, the first and second tristate inverters are disabled and the switch is closed, thereby allowing stored charges to be transferred either (i) from the at least one first capacitor to the at least one second capacitor, or (ii) from the at least one second capacitor to the at least one first capacitor.