Patent ID: 6657226
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A method for manufacturing a thin-film compromising:patterning a gate electrode and a storage electrode on a transparent glass substrate; sequentially forming a gate insulating film, a channel layer formed of an amorphous silicon of an intrinsic semiconductor and a contact layer of amorphous silicon of a n-type semiconductor, wherein said channel layer and said contact layer cover a partial area of said gate insulating film; patterning said amorphous silicon layers to have a shape of an island; forming in an area of the gate insulating film not covered by said channel layer or said contact layer a through-hole serving for interconnecting a metal film forming the gate electrode and a metal film formed in said through-hole and forming a drain electrode, a source electrode, and a video signal line; and providing a passivation film and forming in the passivation film a through-hole for interconnecting a pixel electrode formed thereon and the source electrode, wherein a patterning process for removing an area along a drain bus line of the gate insulating film made up of the gate insulating film and the passivation film is the same as the patterning process used for forming the through-hole serving for interconnecting the metal film forming the gate electrode and the metal film forming the drain electrode, source electrode and the video signal line.