Patent ID: 7885497
Filing Date: 2011-02-08
Classification: G02F

Abstract:
1. A thin film transistor array substrate, comprising: a transparent substrate; and a plurality of gate lines and a plurality of data lines formed at the transparent substrate, the gate lines and the data lines crossing each other thereby defining a plurality of pixel regions; wherein each of the pixel regions comprises a storage capacitor, the storage capacitor comprises a first capacitor and a second capacitor aligned along a direction generally perpendicular to the transparent substrate, the first capacitor and the second capacitor are electrically connected in parallel, the first capacitor comprises a capacitor electrode, a common electrode line parallel to the capacitor electrode, and a first insulating layer sandwiched between the capacitor electrode and the common electrode line, and the second capacitor comprises the common electrode line, a pixel electrode parallel to the common electrode line, and a second insulating layer sandwiched between the common electrode line and the pixel electrode.