Patent ID: 8822332
Filing Date: 2014-09-02
Classification: H01L

Abstract:
1. A method for forming a structure including gate, source, and drain contacts on a MOS transistor having an insulated gate comprising polysilicon covered with a metal gate silicide, this gate being surrounded with at least one spacer made of a first insulating material, the method comprising the steps of: a) covering the structure with a second insulating material and leveling the second insulating material to reach the gate silicide; b) oxidizing the gate so that the gate silicide buries and is covered with a silicon oxide; c) selectively removing the second insulating material; and d) covering the structure with a first conductive material and leveling the first conductive material all the way to a level lower at the top of said spacer; wherein, at step a), the second insulating material covering the structure is a silicon oxide, and wherein, at step c), the silicon oxide formed at step b) is also removed.