Patent ID: 8483428
Filing Date: 2013-07-09
Classification: H04N

Abstract:
1. A digital image processing apparatus to process video data information of a captured input digital image comprising: a first programmable register to store a first value that corresponds to a first width of a first quadrangle digital image, wherein the first quadrangle digital image comprises a first portion of the captured input digital image; a second programmable register to store a second value that corresponds to a first height of the first quadrangle digital image, wherein the first width corresponds to a first number of pixels in the horizontal direction and the first height corresponds to a first number of lines in the vertical direction; a third programmable register to store a third value that corresponds to a first location information of the first quadrangle digital image, wherein the first location information comprises information that corresponds to a first memory location of a memory device; a first logic circuitry coupled to the memory device, a first buffer, and to the first, second, and third programmable registers, and is configured to: a second logic circuitry coupled to the first buffer and a second buffer, and is configured to (i) process in the vertical direction the first and second video data information, and (ii) output the vertically processed video data information to the second buffer; a third logic circuitry coupled to the second buffer and a fourth logic circuitry, and is configured to: the fourth logic circuitry coupled to a fifth logic circuitry, the first and second programmable registers, and is configured to: