Patent ID: 7957202
Filing Date: 2011-06-07
Classification: G11C,H01L

Abstract:
1. A method of controlling a semiconductor device having first and second semiconductor storage devices comprising: initializing an address signal; setting a first address of the first semiconductor storage device in the address signal to read data from the memory cell array of the first semiconductor storage device; issuing a write command to the second semiconductor storage device; writing the data into the second semiconductor storage device; making a decision of whether or not the data has been written into the second semiconductor storage device; if the result of the decision is that the data has not been written into the second semiconductor storage device, carrying out writing of data again; if the result of the decision is that the data has been written into the second semiconductor storage device, making a decision of whether or not the first address has reached a predetermined value; and if the first address has not reached the predetermined value, setting a second address different from the first address by the second semiconductor storage device.