Patent ID: 7248979
Filing Date: 2007-07-24
Classification: G06F

Abstract:
1. Apparatus comprising: a processor having access to a non-volatile memory; a semiconductor having a measurable on-resistance while sourcing/sinking current to/from components of the apparatus; and a sensor which is coupled to said processor and said semiconductor and which measures the on-resistance of said semiconductor during normal operations of the apparatus; wherein, the processor is effective to: monitor the on-resistance of said semiconductor over a predetermined portion of the life of the semiconductor; predict that the semiconductor is likely to fail based on the monitoring; and report a predictive failure to the apparatus based on the prediction, wherein the prediction is made by comparing a recent on-resistance value to a stored on-resistance value and determining that the recent on-resistance value exceeds an allowable deviation from the stored on-resistance value which is stored in the non-volatile memory, wherein the recent, and stored, on-resistance values are produced by the monitoring.