Patent ID: 6373782
Filing Date: 2002-04-16
Classification: G11C,H03K

Abstract:
A semiconductor device comprising:an input buffer circuit that receives a first input signal, said input buffer circuit including: a first differential amplification circuit comparing a voltage given by said first input signal with a reference voltage and outputting complementary first and second output signals in which a high level of an output voltage is a power supply voltage and a low level is a first intermediate voltage between said power supply voltage and a ground voltage, a second differential amplification circuit comparing the voltage given by said first input signal with said reference voltage and outputting complementary third and fourth output signals in which a low level of an output voltage is said ground voltage and a high level is a second intermediate voltage between said power supply voltage and said ground voltage, an output circuit outputting complementary fifth and sixth output signals in accordance with said first to fourth output signals; and an internal circuit operating in accordance with said fifth and sixth output signals.