Patent ID: 9214451
Filing Date: 2015-12-15
Classification: G11C,H01L

Abstract:
1. A semiconductor chip, comprising: a semiconductor substrate; a circuit layer formed over the semiconductor substrate; a bump formed over the circuit layer; a spare bump formed correspondingly to the bump and over the circuit layer, and configured for replacing the bump with the spare bump; a through electrode configured to pass through the semiconductor substrate on a same line as the bump and electrically couple with the bump or the spare bump in response to a selection signal; a spare through electrode configured to pass through the semiconductor substrate on a same line as the spare bump and electrically couple with the spare bump or the bump in response to the selection signal; a selection signal storage part configured for providing the selection signal; and a memory configured to store information on a fail bump, wherein the selection signal storage part sets the selection signals based on the stored fail bump information.