Patent ID: 6538290
Filing Date: 2003-03-25
Classification: H01L

Abstract:
A static protection device for an integrated semiconductor device comprising:an input/output terminal for the integrated semiconductor device; a ground terminal for the integrated semiconductor device; and a PNP transistor formed in the integrated semiconductor device and connected between the input/output terminal and the ground terminal, wherein the PNP transistor is formed in an N-type conductivity layer on a P-type substrate between first and second isolation regions and comprises a first P-type diffusion region formed in the N-type conductivity layer between the first and second isolation regions and forming an emitter terminal of the PNP) transistor connected to the input/output terminal, and a second P-type diffusion region formed on the second isolation region and contacting the N-type conductivity layer between the first and second isolation regions and forming a collector terminal of the PNP transistor connected to the ground terminal.