Patent ID: 6094702
Filing Date: 2000-07-25
Classification: G06F

Abstract:
An application-specific integrated circuit (ASIC) apparatus for enabling access, including any reading access, to a portion of memory having no access enabled, including having no reading access enabled, the ASIC apparatus comprising:a decryptor that inputs an encrypted authorization code and outputs a decrypted authorization code;a valid authorization storage component for storing and outputting a valid authorization code;an upgrade verifier that inputs the decrypted authorization code and the valid authorization code, that compares the decrypted authorization to the valid authorization code to determine whether access to the portion of memory is authorized, and that outputs a signal to enable access including any reading access to the portion of memory, the portion of memory being in an inoperable state in which the portion of memory is unable to provide memory storage capacity based on having no access enabled including having no reading access;an upgrade storage component that stores the signal output from the upgrade verifier; andan enabling component that inputs a memory access signal and a signal stored in the upgrade storage component and outputs a signal indicating whether the portion of memory is in an operable state in which the portion of memory has memory storage capacity based on having access enabled for reading from the portion of memory.