Patent ID: 8080439
Filing Date: 2011-12-20
Classification: G11C,H01L,Y10T

Abstract:
1. A method of making a phase change random access memory (PCM) device comprising: forming active circuitry; forming an insulating layer over the active circuitry; forming a conductive layer in a top portion of the insulating layer; forming a PCM stack on the conductive layer, wherein forming the PCM stack includes: forming at least a heater layer, forming a layer of phase change material overlying the heater layer, and forming a top electrode layer overlying the layer of phase change material, forming a top protection layer overlying the PCM stack; patterning the top protection layer to form a patterned top protection layer and patterning a first portion of the PCM stack, wherein the first portion of the PCM stack excludes the heater layer; forming a sidewall protection feature along a sidewall of the patterned top protection layer and first portion of the PCM stack, wherein the sidewall protection feature is in direct contact with the layer of phase change material, top electrode layer and the top protection layer, and wherein the sidewall spacer protection feature comprises a dielectric sidewall spacer; and etching the heater layer using (i) the sidewall protection feature and (ii) the patterned top protection layer and the first portion of the PCM stack collectively as a mask to form a self-aligned heater layer bottom electrode of the PCM stack and thereby forming a completed memory bit of the PCM device, wherein the top protection layer and the sidewall protection feature prevent any undesired back sputtering of the heater layer during the heater layer etch from creating an electrical short between the heater layer and the top electrode layer; forming an interlevel dielectric layer (ILD) overlying the completed memory bit after the step of removing portions of the heater layer; planarizing the ILD down to the top protection layer which acts as a planarization etch stop layer via chemical mechanical polishing and exposing the patterned top protection layer; forming a contact opening by removal of the exposed patterned top protection layer; and forming a contact metallization within the contact opening which is electrically coupled to the active circuitry by copper plating and subsequent chemical mechanical polishing (CMP).