Patent ID: 7840623
Filing Date: 2010-11-23
Classification: G06F

Abstract:
1. A linear interpolator which performs operations to calculate a linear interpolated value C expressed by an expression of C=(1−D)*A+D*B based on two signed interpolation target values A and B and an interpolation rate D (0≦D<1), comprising: first interpolation target value input means for inputting an interpolation target value A including bits a second interpolation target value input means for inputting an interpolation target value B including bits b interpolation rate input means for inputting an interpolation rate D including bits d unsigned part arithmetic means for generating digital data of (2n−1) bits in total including bits c signed part arithmetic means which calculates a binary number obtained by summing up a result of operation of a calculated value output means for outputting “digital data of 2n bits in total obtained by arranging the bits c wherein the unsigned part arithmetic means comprises: a selector which selects and outputs either one of the bit a a counter which inputs the bit a