Patent ID: 6476680
Filing Date: 2002-11-05
Classification: H03F

Abstract:
A cascode amplifying circuit comprising:a first, a second and a third MOS transistor having a same conductive type; and a fourth MOS transistor having a conductive type reverse thereto; wherein a source of the second MOS transistor is connected to a drain of the first MOS transistor and a drain of the second MOS transistor is connected to an output terminal; wherein there is provided a differential amplifying circuit a first differential input terminal of which is constituted by a gate of the third MOS transistor, a second differential input terminal of which is constituted by a source thereof and a differential output terminal of which is constituted by a drain thereof; wherein there is provided a load circuit constituted by connecting a source of the fourth MOS transistor to the differential output terminal; wherein there is provided an inverted amplifying circuit for invertedly amplifying an output from the differential output terminal via the load circuit; and wherein there is provided a negative feedback circuit from the source of the second MOS transistor to a gate thereof by applying a predetermined fixed bias voltage to the first differential input terminal, connecting the second differential input terminal to the source of the second MOS transistor and connecting the output terminal of the inverted amplifying circuit to the gate of the second MOS transistor.