Patent ID: 6427219
Filing Date: 2002-07-30
Classification: H03M,H04L

Abstract:
An apparatus for detecting and selectively correcting transmission errors using cyclic redundancy check bits in a communication system that has little or no error correction capability and uses differential coding, said apparatus comprising:a buffer unit for holding the bits of a received code word which comprises of information bits and the cyclic redundancy check bits; a plurality of gates for deriving a syndrome from the received code word using a generator polynomial associated with said cyclic redundancy check bits; a syndrome register for holding the derived syndrome and cyclically shifting the derived syndrome one bit as each bit is read out of the buffer unit; an error detection module for detecting errors in the received code word using the cyclically shifted syndrome; an error correction module that selectively corrects double-adjacent symbol errors corresponding to a limited number of four-bit error patterns in the cyclically shifted syndrome as part of a decoding process when channel quality is above a programmable threshold; and a correction validation module for examining the syndrome register at the end of the decoding process and indicating whether the received code word contains an uncorrectable error.