Patent ID: 7600180
Filing Date: 2009-10-06
Classification: H03M,H04L

Abstract:
1. A method for operating a decoder to decode an LDPC (Low Density Parity Check) coded signal, the method comprising: employing a bit node processing module and a check node processing module to perform bit node processing and check node processing, respectively, during a first decoding iteration in which the bit node processing employs a first plurality of bit metrics and the decoder generates a first soft estimate of a bit within the LDPC coded signal, wherein the plurality of bit metrics corresponds to a bit within the LDPC coded signal; updating the first plurality of bit metrics using the first soft estimate thereby generating a second plurality of bit metrics; and employing the bit node processing module and the check node processing module to perform bit node processing and check node processing, respectively, during a second decoding iteration in which the bit node processing employs the second plurality of bit metrics and the decoder generates a second soft estimate of the bit within the LDPC coded signal.