Patent ID: 9048354
Filing Date: 2015-06-02
Classification: H01L

Abstract:
1. A method of forming a through silicon via structure, comprising: forming an insulating interlayer structure including an insulating interlayer on a first side of a semiconductor layer and an internal wiring on the insulating interlayer; forming an outer semiconductor pattern and an inner semiconductor pattern isolated from the outer semiconductor pattern by forming an isolation trench through the semiconductor layer, the isolation trench enclosing the inner semiconductor pattern and exposing the insulating interlayer; forming an insulating pattern covering a second side of the semiconductor layer opposite to the first side of the semiconductor layer and an inner surface of the isolation trench; forming a via hole, which is spaced apart from the isolation trench and passes through the inner semiconductor pattern, wherein an upper portion of the via hole is surrounded by a portion of the insulating pattern covering the second side of the semiconductor layer; and forming a through silicon via contact in the via hole contacting the internal wiring.