Patent ID: 9059516
Filing Date: 2015-06-16
Classification: G02F,H01L,H01P,H01Q

Abstract:
1. A 3D package device of a photonic integrated chip matching circuit, characterized in that it comprises: a first carrier substrate; a first microwave transmission line array formed by evaporation on a top surface of the first carrier substrate to provide bias voltages and high-frequency modulation signals to a photonic integrated chip; a second carrier substrate formed to be perpendicular to a main surface of the first carrier substrate or to have a certain angle with respect to the main surface of the first carrier substrate, so as to constitute a 3D impedance-matching structure; a second microwave transmission line array formed by evaporation on a bottom surface of the second carrier substrate to match an impedance of electrodes of the first microwave transmission line array, the second microwave transmission line array being soldered or sintered with the electrodes of the first microwave transmission line array; an electrode array formed by evaporation on a side surface or two opposite side surfaces of the second carrier substrate; and a microwave circuit.