Patent ID: 6072340
Filing Date: 2000-06-06
Classification: H03K,H03M,H04L

Abstract:
A signal shaping circuit for shaping amplitude shift keyed digital pulses of a plurality of digital data streams each comprised of a plurality of symbols, each symbol having a symbol period, the signal shaping circuit generating an output signal amplitude having a smooth transition region between logic level transitions of an output digital data stream generated from the plurality of digital data streams, said circuit comprising:plurality of input leads each receiving data pulses from a respective one of the plurality of digital data streams;delay circuit having a predefined time delay comprising a plurality of input lines, each input line receiving data pulses from a respective one of the plurality of digital data streams and, after a predefined time delay, outputting delayed digital pulses corresponding to each of the digital pulses received at the input leads on respective corresponding output lines;ringing filter circuit having a linear response, the ringing filter circuit receiving each of the digital pulses provided at the input leads and each of the digital pulses provided at the outputs of the delay circuit, the ringing filter circuit having a ringing period about equal to or less than twice the symbol period of the symbols of the digital data streams, said predefined delay of the delay circuit being about equal to half of the ringing period, the ringing filter circuit generating an output amplitude shift keyed digital data stream directly corresponding to the digital data streams provided at the input leads wherein the output digital data stream has smooth transition regions between logic level transitions thereof.