Patent ID: 7764281
Filing Date: 2010-07-27
Classification: G09G

Abstract:
1. An addressing mechanism, comprising: a first set of parallel co-planar conductive control lines, wherein each conductive control line of said first set of conductive control lines has an adjustable in-line impedance configured to exhibit either a low in-line impedance state or a high in-line impedance state; a second set of parallel co-planar conductive control lines, wherein said second set of conductive control lines are spaced apart in relation to said first set of conductive control lines, wherein a plane of said second set of conductive control lines is parallel to a plane of said first set of conductive control lines, wherein conductive control lines of said second set of conductive control lines cross over the conductive control lines of said first set of conductive control lines thereby forming a plurality of crossover points in an inactivated state, each of the plurality of crossover points constituting a threshold device; a first select mechanism configured to selectively adjust the in-line impedance of a selected control line of said first set of conductive control lines from the high in-line impedance to the low in-line impedance state for a duration of a time cycle, whereas the in-line impedance of the remaining non-selected conductive control lines of said first set of conductive control lines have the high in-line impedance state; and a second select mechanism configured to encode activation data and selectively apply a high or low drive voltage to each conductive control line of said second set of conductive control lines, wherein the second select mechanism is configured to apply said drive voltages simultaneously, in parallel and in synchronization with the first select mechanism, such that: