Patent ID: 7283038
Filing Date: 2007-10-16
Classification: G06F

Abstract:
1. An electrical circuit, comprising: a first counter circuit A for receiving a first enable signal INC_A and generating a first output signal SIG_A; a second counter circuit B for receiving a second enable signal INC_B and generating a second output signal SIG_B, wherein the first enable signal INC_A and the second enable signal INC_B are for comparing the first output signal SIG_A to the second output signal SIG_B; a flip-flop circuit for generating a first status signal defining a first relationship between said first output signal SIG_A and said second output signal SIG_B; and a logic circuit for generating a second status signal defining a second relationship between said first output signal SIG_A and said second output signal SIG_B, wherein the logic circuit electrically connects said first counter circuit A and said second counter circuit B to said flip-flop circuit, wherein an output of said first counter circuit A is electrically connected to a first input of said logic circuit, wherein an output of said second counter circuit B is electrically connected to a second input of said logic circuit, and wherein an output of said logic circuit is electrically connected to an enable input E on said flip-flop circuit.