Patent ID: 6760209
Filing Date: 2004-07-06
Classification: H01L

Abstract:
An electrostatic discharge (ESD) protection circuit provided on an integrated circuit comprising:a lateral NPN bipolar junction transistor (BJT) having a base, and having an emitter-collector path coupling a pad to a low power supply terminal; a second BJT having an emitter to collector path coupling the pad to the base of the lateral NPN BJT; a third BJT having an emitter connected to a base of the second BJT, and a collector connected to the collector of the second BJT, and having a base; a first MOS transistor having a source-drain path coupling the base of the third BJT to the low power supply terminal, and having a gate; a second MOS transistor having a source and drain tied together to the base of the second BJT (1107) and having a gate coupled to the gate of the first MOS transistor; and a resistor having a first terminal coupled to the gate of the first NMOS transistor and a second terminal coupled to the low power supply terminal.