Patent ID: 6310487
Filing Date: 2001-10-30
Classification: G01R

Abstract:
A semiconductor integrated circuit having a plurality of first conduction type MOS transistors and a plurality of second conduction type MOS transistors, said semiconductor integrated circuit comprising:a first power supply line for supplying a first power source voltage;a first MOS transistor included among the plurality of the first conduction type MOS transistors, having a gate electrode, a first electrode, and a second electrode, the first MOS transistor having a first threshold voltage and the first electrode being electrically connected to the first power supply line;a first pseudo power supply line electrically connected to the second electrode of the first MOS transistor;an internal logic circuit having at least a second MOS transistor included among the plurality of the first conduction type MOS transistors, having a substrate terminal, the internal logic circuit supplied with the first power source voltage via the first pseudo power supply line and the second MOS transistor having a second threshold voltage lower than the first threshold voltage, the second threshold voltage controlled according to a voltage inputted to the substrate terminal; anda first terminal electrically connected to the substrate terminal of the second MOS transistor,wherein the substrate terminal of the second MOS transistor is capable of supplying a voltage which changes the second threshold voltage of the second MOS transistor to a higher voltage when the first MOS transistor is in a conductive state.