Patent ID: 6240489
Filing Date: 2001-05-29
Classification: G06F

Abstract:
A method of implementing a pseudo least recently used (LRU) cache line replacement scheme in a cache memory, said method comprising the steps of:associating an LRU field with a congruence class within said cache memory, wherein said congruence class contains four cache lines, wherein said LRU field includes no more than four bits;assigning each of said four cache lines within said congruence class a respective set number;storing a set number of a first set among said four cache lines in two bits of said LRU field;storing a set number of a second set among said four cache lines in another two bits of said LRU field; andalloting one of two remaining cache lines having a higher set number to be a third set in response to a determination that said set number of said first set is higher than said set number of said second set.