Patent ID: 9135391
Filing Date: 2015-09-15
Classification: G06F

Abstract:
1. One or more processor-readable storage device storing computer-executable instructions for causing one or more processors to perform a method, the method comprising: analyzing a circuit design to determine voltages of nodes in an interconnect tree, the interconnect tree comprising continuously connected geometric elements of a conductive material confined by diffusion blocking ends to one layer of a layout design for the circuit design, the nodes comprising locations where electron flows change directions, diverge, converge or reach diffusion blocking ends such as vias, the circuit design containing parasitic resistance information for the interconnect tree; determining, based on the voltages of the nodes, current density values and current directions for segments of the interconnect tree, each of the segments being a part of the interconnect tree confined by a pair of neighboring nodes in the nodes; computing, based on the current density values and the current directions, hydrostatic stress values for the nodes under a state that assumes a steady-state condition, no voids being nucleated and conservation of the conductive material within the interconnect tree, the steady-state condition being a condition of no atomic fluxes in the interconnect tree; and determining electromigration susceptibility of the interconnect tree based on the hydrostatic stress values.