Patent ID: 8513735
Filing Date: 2013-08-20
Classification: H01L

Abstract:
1. A power semiconductor device, comprising: a first-conductivity-type semiconductor substrate including a first main surface and a second main surface opposed to each other; a second-conductivity-type first well region located in a part of a surface of the first main surface of said first-conductivity-type semiconductor substrate; a second-conductivity-type second well region located in a part of the surface of the first main surface of said first-conductivity-type semiconductor substrate and having a smaller area compared with said first well region when viewed from an upper surface; a gate insulating film located on a surface of said second well region; a field oxide film located in a part of a surface of said first well region and having a larger film thickness compared with said gate insulating film; a source electrode electrically connecting said first well region and said second well region; a gate electrode located on said gate insulating film and said field oxide film so as to be in contact therewith in a continuous manner; a gate pad located above said first well region and electrically connected to said gate electrode; and a drain electrode located on the second main surface of said semiconductor substrate, wherein an outer boundary of said first well region is located inside an outer perimeter of said field oxide film in a vicinity of a bonding portion between said gate insulating film and said field oxide film in all locations in which said gate electrode located on an upper surface of said field oxide film while being in contact with said field oxide film extends beyond said field oxide film.