Patent ID: 7803712
Filing Date: 2010-09-28
Classification: B81C,B82Y,G03F,H01L

Abstract:
1. A method of fabricating a pattern of approximately parallel nanowires which have (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in the Y direction, and at least three distinct heights in the Z direction, wherein said nanowires are formed by a lift-off process, said method comprising: providing a substrate comprising an insulating portion and a layer of an array of microwires thereon, providing a polymer film supported on said substrate, with said polymer film formed on said layer of microwires; forming a lithographic resist on said polymer film; providing a mold having at least three levels of protruding patterns; stamping said mold into said polymer film to form a multi-level relief, whereby portions of said protruding patterns penetrate to said layer of array of microwires, thereby exposing said layer, and whereby other portions of said protruding patterns penetrate below said lithographic resist into said polymer film to thereby expose portions of said polymer film, and whereby still other portions of said protruding patterns do not penetrate said lithographic resist; blanket-depositing conductive material on said exposed portions of said layer of array of microwires, on said exposed portions of said polymer film, and on said lithographic resist not otherwise penetrated; and dissolving portions of said resist to remove conductive material thereon, leaving conductive material, comprising one set of said nanowires in contact with said exposed portions of said layer of array of nanowires and at least one additional set of nanowires supported above said layer of array of microwires by said polymer film to form conductive traces.