Patent ID: 7451265
Filing Date: 2008-11-11
Classification: G06F

Abstract:
1. A non-volatile memory storage system, comprising: a memory configured to store a storage system firmware; a non-volatile memory cell array configured to maintain a write buffer block, the write buffer block being configured to span a plurality of logical addresses; and a processor in communication with the memory and the non-volatile memory cell array, the processor being configured to execute the storage system firmware stored in the memory, the storage system firmware comprising program instructions for, receiving a write command to write a plurality of data to the non-volatile memory cell array, the write command being allocated a timeout period to complete an execution of the write command, asserting a busy signal, performing a portion of a garbage collection operation for a garbage collection time period, writing the plurality of data to the write buffer block, releasing the busy signal before the timeout period wherein the program instructions for performing the portion of the garbage collection operation or the garbage collection time period comprises program instructions for copying a portion of a plurality of valid data from one or more first blocks of the non-volatile memory cell array to a second block of the non-volatile memory cell array for the garbage collection time period.