Patent ID: 8949809
Filing Date: 2015-02-03
Classification: G06F

Abstract:
1. A method for automatically pipeline parallelizing a nested loop L in sequential code over K number of threads, said method comprising: discovering, by a processor of a computer system, all thread allocations that map each subloop of the nested loop L to a subset of said K number of threads; said processor configuring all combinations of stage partitions executing the nested loop L by parallelly running said each subloop by said K number of threads pursuant to task dependencies of the nested loop L, wherein each stage partition of said all combinations is associated with each thread allocation from said discovering; said processor calculating a respective bottleneck of each combination from said configuring, wherein the respective bottleneck represents a respective highest fraction in percentage of workload of the nested loop L allocated to a Central Processing Unit (CPU)among said K number of threads; and said processor selecting a smallest bottleneck from said calculating, wherein a first combination associated with the smallest bottleneck is utilized in parallelizing the nested loop L for a most uniformly distributed workload over said K number of threads.