Patent ID: 8237292
Filing Date: 2012-08-07
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate having connecting pads which are formed on a first main surface thereof and input/output pads which are formed on a second main surface thereof, the input/output pads being connected to the connecting pads; a semiconductor chip disposed to oppose the first main surface of the substrate, input/output terminals thereof being connected to the connecting pads; an underfill material that is injected into a space between the substrate and the semiconductor chip; a molding material that encapsulates the first main surface of the substrate, which is not covered with the underfill material, and side surfaces of the semiconductor chip; a plurality of penetrating electrodes that penetrate the substrate; a capacitor that is disposed between the substrate and the semiconductor chip, wherein each of the penetrating electrodes is aligned with each of the input/output terminals so as to oppose the input/output terminals.