Patent ID: 6536653
Filing Date: 2003-03-25
Classification: B23K,H01L,H05K

Abstract:
A one-step bumping/bonding process for forming semiconductor packaging comprising the steps of:providing a first electronic substrate having a first plurality of apertures therethrough, said substrate being formed of a first insulating material with a recess in a top surface of said substrate surrounding an opening forming a recessed opening for each of said first plurality of apertures; providing a second electronic substrate having a first plurality of conductive pads formed on a top surface insulated from each other by an insulating material, one of said first and second electronic substrates being a silicon wafer while the other being a printed circuit board (PCB); positioning said first electronic substrate juxtaposed to said second electronic substrate such that each opening of said first plurality of apertures faces each of said first plurality of conductive pads; depositing onto each of said recessed openings or said first plurality of apertures a solder ball; and reflowing said solder ball forming a first plurality of solder bumps filling said apertures and a space in-between said first and second electronic substrates forming an electrical passageway between each of said recessed openings and each of said first plurality of conductive pads.