Patent ID: 6088817
Filing Date: 2000-07-11
Classification: G06F,G11C

Abstract:
A memory management system for selection of storage locations in a memory for performing write operations on these from an on-line maintained idle list of addresses to free storage locations in the memory, and calculation of addresses for collection data earlier stored in the memory,wherein the storage locations are exposed to a testing procedure having two modes of operation including:a first mode in which all operation of all storage locations is tested in an off-line test, controlled by test logic having exclusive control over the entire memory, anda second mode on-line during which the memory testing logic has exclusive control over one storage location at a time, said storage location being exposed to writing of a test pattern and subsequent read back of said test pattern only after all other storage locations, not barred from use, have been written to by other processes in the system or by the memory testing procedure,the testing procedure being performed periodically on each storage location in idle memory cycles during performance of normal operation of the system, and the result of which is used for maintenance of the idle list, the addresses selected for test being released from system use as controlled by the system.