Patent ID: 9128406
Filing Date: 2015-09-08
Classification: B41J,G03G,G06K,H05B

Abstract:
1. A linear array of light emitting semiconductor components for use in a digital printing apparatus, each light emitting semiconductor components comprising a driver and at least one light emitting device, said array comprising a plurality of data buses respectively connecting to a first plurality of subsets of said light emitting semiconductor components, said first plurality of subsets forming a first partition of said light emitting semiconductor components; said array further comprising a plurality of auxiliary buses respectively connecting to a second plurality of subsets of said light emitting semiconductor components, said second plurality of subsets forming a second partition of said light emitting semiconductor components; wherein said first partition and said second partition are chosen such that each one of said light emitting semiconductor components can be uniquely identified by the subset of the first partition and the subset of the second partition to which it belongs; wherein said plurality of data buses is configured to supply instructions to said first plurality of subsets of said light emitting semiconductor components; and wherein each of said light emitting semiconductor components is configured to extract instructions on the basis of its membership of a particular subset according to said second partition; wherein said plurality of auxiliary buses is configured to signal an active state or an inactive state; wherein said plurality of data buses is further configured to supply respective address allocation instructions to said light emitting semiconductor components in synchronization with the active state signal of the respective auxiliary bus to which said light emitting semiconductor components are connected; wherein said light emitting semiconductor components are configured to retain an address allocated by said respective address allocation instructions; and wherein instructions subsequent to said address allocation instructions include an address and are transmitted independently of said active state signal, each of said light emitting semiconductor components being configured to extract instructions by comparing said included address to said retained address.