Patent ID: 6911712
Filing Date: 2005-06-28
Classification: H01L

Abstract:
1. A pixel structure, comprising: a substrate of a first conductivity type silicon; a first well of a second conductivity type silicon formed in said substrate, wherein said first well is a distance below the top surface of said substrate, and the polarity of said second conductivity type is opposite to the polarity of said first conductivity type; a second well of said second conductivity type silicon formed in said substrate, wherein the top surface of said second well is the top surface of said substrate and said second well has an inner periphery and an outer periphery; an overlap region of said second conductivity type silicon between said first well and said second well, wherein the size of said overlap region is such that said overlap region can be depleted to electrically isolate said first well from said second well or not depleted to electrically connect said first well and said second well as desired; a third well of said first conductivity type silicon in the region within said inner periphery of said second well and between the top surface of said substrate and said first well, wherein said first well and said second well isolate said third well from said substrate; a first region of said second conductivity type silicon formed in said third well, wherein the top surface of said substrate forms the top surface of said first region; a second region of said second conductivity type silicon formed in said third well, wherein the top surface of said substrate forms the top surface of said second region; and a third region of said first conductivity type silicon formed in said second well, wherein the top surface of said substrate forms the top surface of said third region.