Patent ID: 7369449
Filing Date: 2008-05-06
Classification: G11C

Abstract:
1. A semiconductor integrated circuit comprising: an output circuit for sequentially outputting plural pieces of output data including first output data and second output data, which follows the first output data, with each of the plural pieces of the output data including a plurality of bits, wherein the first output data is generated from first original data, and the second output data is generated from second original data; a comparison circuit for comparing the first original data and the second original data to generate a determination signal indicating whether or not the number of changed bits of the second original data from the first original data is greater than a predetermined number of bits; a complement generation circuit for generating complement data related to the second original data; and a selection circuit, connected to the comparison circuit, the complement generation circuit, and the output circuit, for selecting, in accordance with the determination signal, either one of data including the second original data in a first expression format or data including the complement data in a second expression format and providing the output circuit with the selected data as the second output data.