Patent ID: 6560756
Filing Date: 2003-05-06
Classification: G01R

Abstract:
A method, comprising:a) writing into a first memory at least a section of a first test pattern and writing into a second memory at least a section of a second test pattern, said at least a section of a first test pattern within a compressed format and said at least a section of a second test pattern within a compressed format; b) decompressing said at least a section of a first test pattern within a first decompression engine while simultaneously decompressing said at least a section of a second test pattern within a second decompression engine; c) writing into said first memory said at least a section of a first test pattern and writing into said second memory said at least a section of a second test pattern, said at least a section of a first test pattern within a decompressed format as a consequence of said decompressing and said at least a section of a second test pattern within a decompressed format as a consequence of said decompressing; and d) applying said first test pattern relative to a first device under test (DUT) connection and applying said second test pattern relative to a second DUT connection.