Patent ID: 6285246
Filing Date: 2001-09-04
Classification: G05F

Abstract:
A low drop-out regulator, comprising:a driver transistor adapted for connecting to an input supply voltage and producing an output voltage;a mirroring transistor coupled to the driver transistor, the driver transistor and the mirroring transistor being implemented in a CMOS process and each having a gate, a source, and a drain, wherein a voltage differential between the drain and the source of the driver transistor is mirrored in the mirroring transistor, wherein the drain of the driver transistor is coupled to the output voltage, and wherein the driver transistor and the mirroring transistor are each implemented as a P-channel MOS transistor; anda mirroring circuit adapted for sensing a voltage at the drain of the driver transistor and forcing a voltage at the drain of the mirroring transistor equal to the sensed voltage that includes,a first CMOS transistor having a source coupled to the drain of the driver transistor, a drain, and a gate coupled to the drain of the first transistor,a second CMOS transistor having a drain coupled to the drain of the first transistor, a source coupled to ground, and a gate,a third CMOS transistor having a gate coupled to the gate of the second transistor, a source coupled to the ground, and a drain coupled to the gate of the third transistor,a fourth CMOS transistor having a drain coupled to the drain of the third transistor, a source coupled to the drain of the mirroring transistor, and a gate coupled to the gate of the first transistor, anda fifth CMOS transistor having a source connected to the ground, a gate connected to the gate of the third transistor, and a drain, wherein the second, third, and fifth transistors are N-channel MOS transistors and the first and fourth transistors are P-channel MOS transistors.