Patent ID: 8809121
Filing Date: 2014-08-19
Classification: H01L

Abstract:
1. A method of dividing a two dimensional array of encapsulated integrated circuits into individual integrated circuit packages, wherein the array comprises a leadframe and an encapsulation layer over the leadframe in which the integrated circuits are encapsulated, wherein the method comprises: performing a first series of parallel cuts, the cuts extending fully through the leadframe and encapsulation layer, and defining rows of the array, wherein the cuts terminate before the beginning and end of the rows such that the integrity of the array is maintained by edge portions at the ends of the rows; plating contact pads of the leadframe, and including contact pad edge regions formed by the first series of cuts; and performing a second series of parallel cuts, angled with respect to the first series of parallel cuts, the cuts extending fully through the leadframe and encapsulation layer, and separating the array into columns thereby providing singulation of packages between the edge portions.