Patent ID: 8683115
Filing Date: 2014-03-25
Classification: G06F,H03K,H03M,Y02D

Abstract:
1. A memory management system comprising: a memory organizes as a plurality of memory segments, each memory segment including a corresponding address range of a logical address space of the memory; a plurality of segment registers, each segment register corresponding to one of the memory segments, each segment register storing an indication of said address range of said corresponding memory segment and an indication of each allowable ID (AID) permitted to access the corresponding memory segment; a plurality of mapping registers equal in number to a number of privilege IDs, each mapping register storing an indication of an AID associated with a corresponding privilege ID; and an extended memory controller connected to said memory, said plurality of memory segments and said plurality of mapping registers, said memory controller, said memory controller receiving requests for memory access from requestors specifying a memory address to be accessed and a privilege ID of said requestor, said memory controller operable to