Patent ID: 8085240
Filing Date: 2011-12-27
Classification: G09G

Abstract:
1. A display apparatus including a panel substrate on which a display panel and signal line selecting means are disposed, the display panel having x×y pixels arranged in a matrix at intersections of x (x is a natural number) signal lines disposed in a column direction and y (y is a natural number) gate lines disposed in a row direction, the signal line selecting means sequentially selecting k signal lines included in each of x/k signal line groups obtained by dividing the x signal lines into the x/k signal line groups each including the k signal lines that are adjacent to each other without overlapping each other so that the sequential selection of the k signal lines is simultaneously performed in the x/k signal line groups and supplying drive voltage signals to a total of x/k selected signal lines, the display apparatus comprising: input means for receiving a digital video signal composed of pixel data arranged in a predetermined scanning direction; a digital signal processing section including data arrangement converting means for converting the digital video signal received by the input means into a total of x/k pixel data strings, and output means for outputting digital video signals corresponding to the pixel data strings converted by the data arrangement converting means as a total of p-phase pieces of digital data; and a wiring board including a first wiring portion in which p signal lines used to transmit a digital video signal composed of the p-phase pieces of digital data output from the digital signal processing section are disposed in parallel with each other, a signal generation circuit for generating x/k-phase drive voltage signals from the digital video signal transmitted from the first wiring portion, and a second wiring portion in which x/k signal lines used to transmit the x/k-phase drive voltage signals generated by the signal generation circuit to the signal line selecting means disposed on the display panel are disposed in parallel with each other, wherein the first wiring portion in the wiring board includes a detection signal line used to transmit the drive voltage signals generated by the signal generation circuit to the digital signal processing section, wherein the signal generation circuit includes an output wiring portion in which x/k output lines used to individually transmit the drive voltage signals to the signal lines disposed in the second wiring portion are disposed in parallel with each other, and a detection line having one end connected to the detection signal line disposed in the first wiring portion and the other end connected to the output lines in the output wiring portion via switches, and wherein the output lines are individually provided with the switches used to individually connect or disconnect the output lines to or from the signal lines disposed in the second wiring portion and further wherein the detection line is composed of a first detection line and a second detection line which are individually connected to two output lines optionally selected from among the x/k output lines disposed in the output wiring portion, wherein the detection signal line is composed of a first detection signal line connected to the first detection line and a second detection signal line connected to the second detection line, and wherein the digital signal processing section includes comparing means for comparing the drive voltage signal transmitted from the first detection signal line and the drive voltage signal transmitted from the second detection signal line with each other, and correcting means for correcting each of the pieces of pixel data included in each of the data strings converted by the data arrangement converting means on the basis of a result of comparison performed by the comparing means.