Patent ID: 7721169
Filing Date: 2010-05-18
Classification: G11C,H04N

Abstract:
1. A scan circuit having a plurality of scan circuit blocks, each of the scan circuit blocks comprising: a reset circuit block comprised of a reset circuit for receiving a start signal that starts an operation of the scan circuit and for receiving a mode changeover signal for data read-skipping; a flip-flop circuit block comprising a first flip-flop circuit for receiving a reset signal from the reset circuit block to reset the first flip-flop circuit in accordance with the mode changeover signal, and for outputting a control signal in accordance with the reset signal and in synchronism with a clock signal; and a second flip-flop circuit for outputting a scan signal in accordance with the control signal from the first flip-flop circuit and in synchronism with a clock signal; and a switch circuit block comprised of a switch circuit for outputting a start signal that starts an operation of post-stage scan circuit blocks of the plurality of scan circuit blocks in accordance with the control signal from the first flip-flop circuit and with the mode changeover signal.