Patent ID: 7759188
Filing Date: 2010-07-20
Classification: H01L

Abstract:
1. A method of fabricating a body contacted vertical SOI field effect transistor (“FET”), comprising: forming a trench in a substrate, said substrate including a single-crystal semiconductor-on-insulator (“SOI”) region overlying a buried insulator layer, said buried insulator layer overlying a bulk region of said substrate; forming a buried strap conductively connecting said SOI region to a lower node disposed below said SOI region; and forming a body contact extending along a sidewall of said trench within said trench from said SOI region to said bulk region of said substrate, said body contact insulated from said buried strap, said body contact being formed by depositing polysilicon to cover a first portion of said sidewall and a second portion of said sidewall opposite said first portion, and establishing a dopant concentration within only a first portion of said deposited polysilicon overlying said first portion of said sidewall to provide a conduction path between said SOI region and said bulk region while not establishing said dopant concentration in a second portion of said deposited polysilicon overlying said second portion of said sidewall, and thereafter removing said second portion of deposited polysilicon from said trench; and forming a field effect transistor (“FET”) along a sidewall of said trench above said buried insulator layer, said FET including a transistor body and source and drain regions disposed in said SOI region, said transistor body conductively connected to said body contact.