Patent ID: 7924258
Filing Date: 2011-04-12
Classification: G09G

Abstract:
1. A gate driving apparatus, comprising: a start pulse generator which generates a second gate start pulse by a logic operation of a first gate start pulse and a gate output enable signal, wherein the second gate start pulse synchronizes with a first pulse of the gate output enable signal, the first pulse overlapping the first gate start pulse; a shift register including a plurality of flip-flops which generates a shift signal by sequentially shifting the second gate start pulse in accordance with a gate shift clock, wherein the second gate start pulse output from the start pulse generator is supplied to a first flip-flop among the plurality of flip-flops; and an output unit which outputs the shift signal in accordance with the gate output enable signal, wherein the second gate start pulse is high state only when both the first gate start pulse and the gate output enable signal are in the high state, a pulse width of the gate output enable signal is the same as a pulse width of the second gate start pulse, and each pulse width of the gate output enable signal and the second gate start pulse is smaller than a pulse width of the first gate start pulse.