Patent ID: 7041554
Filing Date: 2006-05-09
Classification: H01L

Abstract:
1. A method of forming a flash memory device comprising: forming a stack gate structure on an integrated circuit substrate; forming a trench isolation region on the integrated circuit substrate adjacent the stack gate structure, wherein the trench isolation region comprises a trench floor; forming a first nitrogen doped layer on a portion of the stack gate structure adjacent a trench sidewall of the trench isolation region; forming a trench insulating layer on the trench floor and a lower portion of the trench sidewall, wherein forming the first nitrogen doped layer comprises forming the first nitrogen doped layer such that it extends on an upper portion of the trench sidewall; and forming a tunnel insulating pattern between the integrated circuit substrate and the stack gate structure, wherein forming the stack gate structure comprises forming a floating gate, wherein forming the floating gate comprises forming a lower gate pattern on the tunnel insulating layer and forming an upper gate pattern on the lower gate pattern, wherein forming the first nitrogen doped layer comprises forming the first nitrogen doped layer such that it extends on a sidewall of the lower gate pattern and/or a sidewall of the tunnel insulating layer.