Patent ID: 8035449
Filing Date: 2011-10-11
Classification: H03F

Abstract:
1. A distributed amplifier (DA) comprising: a plurality of amplifier segments, such that each of the plurality of amplifier segments has an input gate and an output drain; a first plurality of inductive elements coupled in series between a DA input and a first output to form a first plurality of connection nodes, such that each of the first plurality of connection nodes is coupled to a corresponding adjacent pair of the first plurality of inductive elements; a broadband interface network comprising a plurality of capacitive elements, a first plurality of resistive elements, and a second plurality of resistive elements, such that: a second plurality of inductive elements coupled in series between a first input and a DA output to form a second plurality of connection nodes, such that each of the second plurality of connection nodes is coupled to a corresponding adjacent pair of the second plurality of inductive elements and to a corresponding output drain of the plurality of amplifier segments, wherein the DA input is adapted to receive a first input signal and the DA output is adapted to provide a first output signal based on amplifying the first input signal; and wherein the plurality of amplifier segments has a plurality of input gate-to-source capacitances; the plurality of input gate-to-source capacitances, the plurality of capacitive elements, the first plurality of resistive elements, and the second plurality of resistive elements forms a plurality of network segments; each of the plurality of network segments has a corresponding one of the plurality of input gate-to-source capacitances, a corresponding one of the plurality of capacitive elements, a corresponding one of the first plurality of resistive elements, and a corresponding one of the second plurality of resistive elements; the each of the plurality of network segments has a first ratio and a second ratio; the first ratio is about equal to a capacitance of the corresponding one of the plurality of capacitive elements divided by a sum of the capacitance of the corresponding one of the plurality of capacitive elements and a capacitance of the corresponding one of the plurality of input gate-to-source capacitances; the second ratio is about equal to a resistance of the corresponding one of the second plurality of resistive elements divided by a sum of the resistance of the corresponding one of the second plurality of resistive elements and a resistance of the corresponding one of the first plurality of resistive elements; and the first ratio is about equal to the second ratio.