Patent ID: 6295588
Filing Date: 2001-09-25
Classification: G06F

Abstract:
A circuit arrangement for a memory access controller for converting memory access requests into memory access commands comprising:a request input for inputting sequences of said memory access requests;a command output for outputting sequences of said memory access commands;an input logic for accepting said memory access requests from said request input, said input logic used to demultiplex said memory access requests into one or more requests;one or more need-makers used for determining needs, said needs indicating what memory access command is needed for each of said requests;a prioritizer for making prioritized needs, said prioritized needs being said needs ordered by priority;a need selector for selecting and deriving from said prioritized needs said memory access command,wherein said prioritizer comprises:one or more multiplexers corresponding to each of said prioritized needs, where said multiplexer selects a prioritized need from said needs;a priority determiner for determining which of said needs should be selected as said prioritized needs for each of said multiplexers.