Patent ID: 7428565
Filing Date: 2008-09-23
Classification: H03K

Abstract:
1. A logical operation circuit comprising: a first ferroelectric capacitor which can retain a polarization state corresponding to a specified logical operator and which has first and second terminals; first and second signal lines which can provide first and second operation target data to the first and second terminals, respectively, of the first ferroelectric capacitor retaining the polarization state corresponding to the specified logical operator and which are connected to the first and second terminals, respectively; and an operation result output section which, when a residual polarization state of the first ferroelectric capacitor determined by the provision of the two operation target data is either a first residual polarization state or a second residual polarization state having a polarization direction opposite that of the first residual polarization state, outputs the result of a logical operation performed on the first and second operation target data according to the logical operator based on the residual polarization state of the first ferroelectric capacitor, which has a second ferroelectric capacitor having a third terminal connected to the first signal line and a fourth terminal connected to a first reference potential, and which, when outputting the logical operation result, connects the first and second signal lines to the first reference potential and releases the connection, then connects the second signal line to a second reference potential, and outputs the logical operation result based on a potential generated in the first signal line when the second signal line is connected to the second reference potential, wherein the area ratio Ra of the area of the second ferroelectric capacitor to the area of the first ferroelectric capacitor satisfies the following relation: wherein C C