Patent ID: 6490649
Filing Date: 2002-12-03
Classification: G06F

Abstract:
An addressable electronic memory device for storing data which is arranged in data groups, said data groups not being of a fixed length, said data groups being delivered to the memory device by a host, the memory device comprising:a plurality of memory blocks, each memory block having a plurality of addressable data-storage locations, each of said plurality of data-storage locations being individually addressable for storage of data therein, and all data-storage locations within any one of the memory blocks being erasable together to form an erased block; an erase pointer operative to indicate a first location address within a first block to be erased, and when erasure of said first block has been completed, to indicate a first location address within a next block to be erased; and a write pointer which is separated from the erase pointer by at least one block in an erased state, with every data-storage location between the write pointer and the erase pointer being in an erased state prior to a write operation; wherein data is written as a data group to a set of contiguous locations, the first of said set being indicated by the write pointer and after the write operation, the write pointer is incremented through the set of contiguous locations to a next free location to await the next write operation, each data group being written with a sector header which stores control information for the data group, the length of the data group and an origination address for the data group as determined by the host.