Patent ID: 7868412
Filing Date: 2011-01-11
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: simultaneously forming first, second and third trenches in a region between a first element region on a first well and a first well contact connection region, and a region between a second element region on a second well and a second well contact connection region, and a region between the first element region and the second element region, respectively, in a semiconductor substrate, the semiconductor substrate comprising the first and second wells and the first and second element regions, the first and second wells having different conductivity types and having the first and second well contact connection regions, respectively, the first and second element regions being regions in which first and second transistors having different conductivity types are intended to be formed on the first and second wells, respectively; simultaneously forming silicide layer on bottom surfaces of the first and second trenches; and simultaneously filling insulating films in the first, second and third trenches after formation of the silicide layers, thereby forming isolation regions, respectively, wherein the silicide layers are formed on only the bottom surfaces of the first and second trenches among the bottom surfaces of the first and second trenches and a bottom surface of the third trench.