Patent ID: 6151260
Filing Date: 2000-11-21
Classification: G11C

Abstract:
A sense amplifier circuit for differentially amplifying potentials on a first bitline and a second bitline paired with said first bitline said first and second bitlines being precharged to respective predetermined potentials, said sense amplifier circuit comprising:(a) a first sense transistor coupled between said first bitline and a restore signal node and having a gate coupled to said second bitline;(b) a second sense transistor coupled between said second bitline and said restore signal node and having a gate coupled to said first bitline;(c) first threshold means coupled to said first bitline for setting the switching threshold voltage of said first sense transistor and including selection elements for selectively switching between one of a plurality of threshold voltages in response to a control selection signal and a first and second series connected N channel transistors, the gate of said first N channel transistor being coupled to the gate of said first sense transistor and the gate of said second N channel transistor being responsive to said control selection signal; and(d) second threshold means coupled to said second bitline for setting the switching threshold voltage of said second sensing transistor, said first and second threshold means being responsive to a sensing signal, whereby said switching threshold of said sense amplifier circuit may be modified during a sensing operation.