Patent ID: 9076691
Filing Date: 2015-07-07
Classification: H01L

Abstract:
1. A method of manufacturing a thin film transistor array panel, the method comprising: providing a gate line comprising a gate electrode on a substrate; providing a gate insulating layer on the gate line; providing a semiconductor on the gate insulating layer; providing a data line including a source electrode on the semiconductor; providing a drain electrode on the semiconductor; providing a color filter on the gate insulating layer, the data line and the drain electrode; providing an overcoat comprising an inorganic material on the color filter; providing a photosensitive film pattern on the overcoat; performing a first dry etching to etch the overcoat and provide a preliminary contact hole exposing the color filter by using the photosensitive film pattern as a mask; removing the photosensitive film pattern; performing a second dry etching to etch the color filter through the preliminary contact hole and provide a contact hole by exposing the drain electrode by using the overcoat as a mask; and providing a pixel electrode, which is connected to the drain electrode through the contact hole, on the overcoat.