Patent ID: 6182202
Filing Date: 2001-01-30
Classification: G06F

Abstract:
A method for generating computer instructions having a variable length operand offset, the method comprising the computer implemented steps of:for each computer instruction that includes one or more variable length operand offsets, generating one or more operand bases for the computer instruction; andperforming the following steps for each variable length operand offset of said one or more variable length operand offsets in said computer instruction,generating the variable length operand offset for the computer instruction, wherein the variable length operand offset is associated with an operand base;generating an operand offset length for the computer instruction, wherein the operand offset length is a value that equals the number of bytes used to store the variable length operand offset; andgenerating the computer instruction to include said operand base, said operand offset length, and said variable length operand offset, wherein said computer instruction has an order and wherein said operand offset length precedes said variable length operand offset in said order;wherein each computer instruction includes a first field and a second field;wherein said second field is used to store variable length operand offsets; andwherein said first field is used to only store operand offset lengths that are values that equal the number of bytes used to store the variable length operand offset.