Patent ID: 8890731
Filing Date: 2014-11-18
Classification: H03M

Abstract:
1. A conversion circuit, wherein the conversion circuit comprises an inputting unit, a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), a comparing unit, a correcting unit, and a test data collecting unit, wherein: the inputting unit is configured to input standard test codes in a first standard test code set to an input end of the DAC; the DAC is configured to receive the standard test codes input by the inputting unit, perform digital-to-analog conversion processing for the received standard test codes, and output, through an output end of the DAC, an analog signal obtained after the digital-to-analog conversion; the ADC is configured to receive, through an input end of the ADC, the analog signal output by the DAC, perform analog-to-digital conversion processing for the analog signal, and generate a test code set formed by digital signals obtained after the analog-to-digital conversion; the comparing unit is configured to compare the test code set output by the ADC with a second standard test code set, and if a comparison result is in a preset error range, notify the test data collecting unit, or if the comparison result is beyond the preset error range, output the comparison result to the correcting unit; the correcting unit is configured to obtain a complementary code set according to the comparison result when the comparison result in the comparing unit is beyond the preset error range, and input the complementary code set to the inputting unit, so that the inputting unit updates the first standard test code set according to the complementary code set; the test data collecting unit is configured to obtain a voltage value of the input end of the ADC when the comparison result in the comparing unit is in the preset error range; and the inputting unit is further configured to receive the complementary code set output by the correcting unit, update the first standard test code set according to the complementary code set, obtain the updated first standard test code set, and input the test codes in the updated first standard test code set to the input end of the DAC.