Patent ID: 8298859
Filing Date: 2012-10-30
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: (a) preparing a lead frame having a plurality of leads; (b) mounting a semiconductor chip over the lead frame, the semiconductor chip has a plurality of bonding pads arranged over an obverse surface of the semiconductor chip; (c) electrically connecting the plurality of bonding pads and the plurality of leads respectively; (d) sealing the semiconductor chip and parts of the plurality of leads by using a sealing body; and (e) forming the plurality of leads exposed from the sealing body to a plurality of terminals; wherein a power transistor and a control integrated circuit controlling the power transistor are formed in the semiconductor chip, wherein the plurality of bonding pads include a first bonding pad and a second bonding pad, the first bonding pad connects with the power transistor, and the second bonding pad connects with the control integrated circuit, wherein the plurality of leads include a first lead and a second lead, wherein the step (c) comprising: (c1) electrically connecting the first bonding pad and the first lead by using a first conductive material; and (c2) electrically connecting the second bonding pad and the second lead by using a second conductive material, a cross-section area of the second conductive material is smaller than a cross-section area of the first conductive material; and wherein the control integrated circuit is disposed such that the control integrated circuit does not overlap the first bonding pad and the second bonding pad in plan view, and the power transistor is disposed under the first bonding pad such that the power transistor overlaps with the first bonding pad in plan view.