Patent ID: 7940542
Filing Date: 2011-05-10
Classification: G11C,H01L

Abstract:
1. A semiconductor device comprising: a plurality of word line groups respectively including a first word line for a first port and a second word line for a second port and the first word line and the second word line being disposed in juxtaposition with one another; a plurality of bit line groups respectively extending in a direction orthogonal to an extension direction of the word line groups and including a first bit line for the first port and a second bit line for the second port and the first word line and the second word line being disposed in juxtaposition with one another; and a plurality of memory cells disposed at respective intersections between the word line groups and the bit line groups, wherein the first word line and the second word line included in one of the word line groups are disposed at a first pitch; wherein the first word line included in one of the word line groups is disposed adjacent to the first word line included in a word line group disposed on one neighboring side of the one word line group concerned at a second pitch; wherein the second word line included in one of the word line groups is disposed adjacent to the second word line included in a word line group disposed on the other neighboring side of the one word line group concerned at the second pitch; wherein the first pitch is larger than the second pitch; and wherein a first shield line extending in juxtaposition with the first word line and the second word line is further disposed between the first word line and the second word line.