Patent ID: 8458415
Filing Date: 2013-06-04
Classification: G06F

Abstract:
1. An apparatus, comprising: logic to be coupled to multiple memory devices; the logic to select, in response, at least in part, to at least one received command, at least one memory device set that is comprised in the multiple memory devices for an operation that is to involve the at least one memory device set; the at least one received command to include one or more fields that permit the at least one memory device set to be indicated in the at least one received command in terms of one or more of the following: one or more individual memory devices in the multiple memory devices, one or more multiple memory device groups in the multiple memory devices, one or more memory modules in the multiple memory devices, and all of the multiple memory devices; and the one or more fields also permitting a configuration setting to be selected for the at least one memory device set, the configuration setting selecting via a single respective command a bit width that all individual memory devices in the at least one memory device set in the one or more memory modules are to use for data transfer, the single respective command including at least one bit field that selects the at least one memory device set that is to be involved in the operation, the single respective command also including another bit field that selects the bit width.