Patent ID: 6438017
Filing Date: 2002-08-20
Classification: G11C

Abstract:
A system for writing to and reading from a memory device comprising:a memory device containing a plurality M of memory registers, each of said M memory registers configured to accommodate X bits of information; a staging register having a serial data input port and a serial data output port connected in series with N consecutive memory elements such that N is greater than the product of M and X, wherein M, N, and X are each positive integers, each such memory element configured to accommodate a data bit, said staging register configured to shift said data bits serially into said staging register through said serial data input port, through each of said consecutive memory elements, and out through said serial data output port; and said staging register being interconnected with an input port of said memory device, such that a first set of X non-adjacent memory elements of said staging register separated from one another by equal spacings of M said consecutive memory elements are interconnected with said input port of said memory device.