Patent ID: 7030652
Filing Date: 2006-04-18
Classification: H03K

Abstract:
1. A logic circuit comprising: a plurality of logic elements; wherein at least one logic element includes, first and second LUT blocks that include respective first and second outputs; an output multiplexer that includes first and second inputs, an output that includes a control input; a control input multiplexer circuit including a control input and including first and second data inputs that can be coupled to receive first and second data outputs provided by one or more other logic elements of the plurality of logic elements and that includes a data output that can be connected to the control input of the output multiplexer; multiple control inputs that can be shared by the first and second LUT blocks; a critical path signal x provided to the control input of the output multiplexor; respective x-cofactors of control signal y as respective data inputs provided to the control input multiplexer circuit; non-critical path dependent control signals provided to the multiple respective control inputs; and the first and the second LUT blocks programmed to provide respective y-co-factors of an output signal z in response to provision of the non-critical path control signals.