Patent ID: 6096573
Filing Date: 2000-08-01
Classification: H01L

Abstract:
A method of manufacturing a CMOS sensor, comprising the steps of:providing a substrate having a first conductive type;forming an oxide layer and a reflection layer on the substrate;forming a conductive layer having a second conductive type with a first concentration on the reflection layer and the substrate;forming a doped region having the first conductive type to cover the reflection layer in the conductive layer;forming an isolation structure on portions of the conductive layer adjacent to the doped region;forming a gate on the doped region;forming a doped drain region having the second conductive type with the first concentration in the doped region adjacent with the gate as a mask;forming a well having the second conductive type with a second concentration in the doped region above the reflection layer;forming a spacer on a sidewall of the gate;performing an ion implantation step to form a source/drain region having the second conductive type with a third concentration on one side of the gate in the doped region and a sensor region having the second conductive type with a fourth concentration aligned over the reflection layer at the other side of the gate in the doped region; andforming a dielectric layer on the substrate.