Patent ID: 9082813
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor body comprising a base region of a first conductivity type and a main horizontal surface; a first electrode arranged on the main horizontal surface; the semiconductor body further comprising, in a vertical cross-section: a first vertical trench comprising a first gate electrode insulated by a gate dielectric region from the base region; a second vertical trench comprising a second gate electrode insulated by a gate dielectric region from the base region; a third vertical trench comprising a third gate electrode insulated by a gate dielectric region from the base region; a body region of a second conductivity type forming a first pn-junction with the base region and extending between the first vertical trench and the second vertical trench; at least one source region of the first conductivity type in ohmic contact with the first electrode and arranged between the first vertical trench and the second vertical trench; at least one anti-latch-up region of the second conductivity type arranged between the first vertical trench and the second vertical trench and in ohmic contact with the first electrode and having a maximum doping concentration which is higher than a maximum doping concentration of the body region; an anode region of the second conductivity type forming a rectifying pn-junction with the base region only and adjoining the third vertical trench, wherein the anode region is in ohmic contact with the first electrode; a second electrode arranged opposite the first electrode and in ohmic contact with the base region; a collector region of the second conductivity type in ohmic contact with the second electrode; and at least two floating semiconductor regions of the second conductivity type arranged between the second vertical trench and the third vertical trench and at least one fifth vertical trench arranged between two of the at least two floating semiconductor regions of the second conductivity type, the at least one fifth vertical trench comprising a fifth gate electrode insulated by a gate dielectric region from the semiconductor body, wherein the anode region is arranged between the third vertical trench and a fourth vertical trench, the fourth vertical trench comprising a fourth gate electrode insulated by a gate dielectric region from the anode region.