Patent ID: 7772930
Filing Date: 2010-08-10
Classification: H03L

Abstract:
1. An apparatus comprising: a phase-locked loop (PLL) circuit, including: a phase frequency detector/charge pump (PFD/CP) circuit adapted to provide a charge pump current; a voltage controlled oscillator (VCO) having an input voltage coupled to an output of the PFD/CP circuit, the VCO adapted to generate a VCO output frequency based on the input voltage; a comparator adapted to compare the input voltage of the VCO to a reference voltage; and a control circuit coupled to the PLL circuit and configured to: output, based on an output of the comparator, both a VCO setting to the VCO and a corresponding charge pump current setting to the PFD/CP circuit, to set the input voltage of the VCO substantially equal to the reference voltage and to maintain a substantially constant PLL bandwidth.