Patent ID: 6605867
Filing Date: 2003-08-12
Classification: H01L

Abstract:
A surface mount type semiconductor, comprising:a semiconductor chip having a connection terminal; a dielectric substrate with the semiconductor chip mounted on a top surface thereof, said top surface of said dielectric substrate being provided with a conductive pattern that is connected to said connection terminal of said semiconductor chip, said dielectric substrate also having a through-hole passing through it from said top surface to a bottom surface of said dielectric substrate; and a conductor extending through said through-hole and filling up said through-hole, with a top end of said conductor being connected to said conductive pattern and a bottom end of said conductor serving as a connection end to a mother board disposed under said bottom surface of said dielectric substrate, said semiconductor chip and said conductive pattern being encapsulated by a resin on said dielectric substrate, wherein said conductive pattern has a hole with an inner surface, wherein said top end of said conductor has a portion that extends through said hole in said conductive pattern and is electrically connected to said inner surface thereof, wherein said top end of said conductor has another portion that overlaps an annular region of a top side of said conductive pattern around said hole in said conductive pattern, providing a flange that is electrically connected to said top side of said conductor pattern, and wherein said hole in said conductive pattern has a smaller diameter than at least a portion of said through-hole in said dielectric substrate.