Patent ID: 7834681
Filing Date: 2010-11-16
Classification: H01G,H02M

Abstract:
1. A semiconductor integrated circuit comprising: a first booster circuit configured to boost a power supply voltage to a first voltage; a second booster circuit configured to boost a power supply voltage to a second voltage; a first transistor having one end connected to a first node where the first voltage is output, the first transistor being configured to transfer the first voltage to an output terminal; a second transistor having one end connected to a second node where the second voltage is output, the second transistor being configured to transfer the second voltage to the output terminal; a third booster circuit configured to supply a third voltage obtained by further boosting the first voltage to a control terminal of the first transistor to turn on the first transistor; a fourth booster circuit configured to supply a fourth voltage obtained by further boosting the second voltage to a control terminal of the second transistor to turn on the second transistor; a first discharging circuit configured to discharge a voltage at the first node to a predetermined voltage; and a second discharging circuit configured to discharge a voltage at the output terminal to a predetermined voltage, and the third booster circuit being further configured to lower a voltage supplied to the control terminal of the first transistor to turn off the first transistor at a time after discharging of the first node is started, and the fourth booster circuit being further configured to increase, in accordance with a signal from the third booster circuit, a voltage supplied to the control terminal of the second transistor to turn on the second transistor after the first transistor is turned off.