Patent ID: 8415221
Filing Date: 2013-04-09
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device structure on a semiconductor substrate comprising a silicon material, the method comprising: forming a gate structure overlying the semiconductor substrate; forming recesses in the semiconductor substrate about the gate structure; forming a stress-inducing semiconductor material in the recesses; and forming a layer of the silicon material in the recesses overlying the stress-inducing semiconductor material, wherein forming the stress-inducing semiconductor material in the recesses comprises: wherein depositing the layer of the stress-inducing semiconductor material comprises depositing the layer of the stress-inducing semiconductor material to a first thickness greater than or equal to a depth of the recesses, and wherein removing the stress-inducing semiconductor material comprises anisotropically etching the layer of the stress-inducing semiconductor material to expose the gate structure; and anisotropically etching the layer of the stress-inducing semiconductor material results in stressor regions comprised of the stress-inducing semiconductor material adjacent to sidewalls of the recess proximate the gate structure.