Patent ID: 7479430
Filing Date: 2009-01-20
Classification: H01L

Abstract:
1. A method of manufacturing a non-volatile semiconductor memory device, comprising: forming a tunnel insulating layer on a semiconductor substrate; forming a floating gate electrode on the tunnel insulating layer; forming an inter-layer insulating layer on the floating gate electrode, the inter-layer insulating layer including a first silicon nitride film layer formed on the floating gate electrode by a Jet Vapor Deposition (JVD) method, a first silicon oxide film layer formed on the first silicon nitride film layer, a second silicon nitride film layer formed on the first silicon oxide film layer by a Low Pressure Chemical Vapor Deposition (LPCVD) method and a second silicon oxide film layer formed on the second silicon nitride film layer; and forming a control gate electrode on the inter-layer insulating layer.