Patent ID: 6341337
Filing Date: 2002-01-22
Classification: G06F

Abstract:
A computer system comprising:a snoop bus; a plurality of nodes connected to the snoop bus, each node comprising: a processor; a main memory unit including a shared memory region associated with a respective node, the shared memory region including a multiplicity of shared memory datums that may be exported to one or more other nodes; a cache memory including a portion of the shared memory associated with the node and a portion of the shared memory associated with another node; a tag memory associated with the cache memory of the node, the tag memory storing one or more cache memory identifiers, each cache memory identifier identifying a cache memory datum stored in the cache memory of the node; and a memory access unit associated with the main memory unit of the node, the memory access unit storing one or more main memory identifiers, each main memory identifier identifying a shared memory datum associated with the respective node that was exported to the cache memory of another node that modified the shared memory datum; wherein when a read miss occurs an address is broadcasted on the snoop bus from an initiator node, the node associated with the broadcasted address fetches data stored in the associated main memory unit and transmits the fetched data to the initiator node when a main memory identifier associated with the broadcasted address is not found in the memory access unit.