Patent ID: 7902015
Filing Date: 2011-03-08
Classification: H01L

Abstract:
1. A method, comprising: forming a first oxide on a semiconductor substrate having a first conductivity type and covering the first oxide with a first gate electrode material; forming a first resist over the first gate electrode material and imprinting a first pattern on the first resist to expose areas of the first gate electrode material aligned along a first direction; forming a first hard mask over the exposed areas of the first gate electrode material and removing the first resist; removing first gate electrode material not covered by the first hard mask to form first gate electrodes aligned along the first direction; removing the first hard mask; implanting a first dopant having the first conductivity type into first regions in the semiconductor substrate adjacent to the first gate electrodes; forming a second oxide over the first gate electrodes and covering the second oxide with a second gate electrode material; forming a second resist over the second gate electrode material and imprinting a second pattern on the second resist to expose areas of the second gate electrode material aligned along a second direction substantially perpendicular to the first direction; forming a second hard mask over the exposed areas of the second gate electrode material and removing the second resist; removing second gate electrode material not covered by the second hard mask to form second gate electrodes aligned along the second direction; and implanting a second dopant having a second conductivity type opposite the first conductivity type into second regions of the semiconductor substrate adjacent to the second gate electrodes, each of the second regions overlapping parts of the first regions of the semiconductor substrate.