Patent ID: 6649475
Filing Date: 2003-11-18
Classification: H01L

Abstract:
A method for forming a FLASH device comprising:forming a pad oxide layer on a substrate; forming a first dielectric layer on said pad oxide layer; patterning said first dielectric layer; forming a first conductive layer over said patterned first dielectric layer; etching said first conductive layer to form a conductive spacer on sidewalls of said patterned first dielectric layer to act as a floating gate; forming a dielectric spacer over said floating gate; performing an ion implantation to form a first doped region in said substrate using said dielectric spacer as a masking; forming a second dielectric layer on said first dielectric layer and said dielectric spacer; etching said second dielectric layer to remain a residual portion on said dielectric spacer; removing said first dielectric layer and said pad oxide layer; forming an inter-gate dielectric layer over said substrate, said floating gate and said dielectric spacer; forming a second conductive layer on said inter-gate dielectric layer; and etching said second conductive layer to form a control gate, wherein said control gate is self-aligned to said floating gate, thereby forming a cell unit.