Patent ID: 6466958
Filing Date: 2002-10-15
Classification: G01S,G06F

Abstract:
A correlation circuit for acquiring a pseudorandom noise (PN) code signal, the correlation circuit comprising:a digital matched filter adapted to receive a reference code, a first detected code, and a second detected code, the digital matched filter shifting the first and second detected codes along a first and a second shift register, the first and second shift registers containing taps such that a comparison circuit compares the reference code to the first and second code as accessed through the taps, the comparison circuit generating a first output and a second output where the first output peaks when the first detected code substantially matches the reference code and where the second output peaks when the second detected code substantially matches the reference code; a Coordinate Rotation Digital Computer (CORDIC) phase rotator circuit adapted to receive the first and second outputs of the digital matched filter, where the first and second outputs of the digital matched filter are represented as x and y components of a sequence of vectors in a complex plane, the CORDIC phase rotator circuit performing a rotation to the sequence of vectors such that the rotation results in a complex multiplication to the sequence of vectors in a Discrete Fourier Transform (DFT); a first coherent memory adapted to receive a real part of the complex multiplication result from the CORDIC phase rotator circuit, the first coherent memory further adapted to relate the complex multiplication result to an address in the first coherent memory where the address corresponds to a position of a tap in the digital matched filter where the tap position indicates a relative position of the first detected code within the digital matched filter; and a second coherent memory adapted to receive an imaginary part of the complex multiplication result from the CORDIC phase rotator circuit, the second coherent memory relating the complex multiplication result to an address in the second coherent memory where the address corresponds to a position of a tap in the digital matched filter where the tap position indicates a relative position of the second detected code within the digital matched filter.