Patent ID: 6523071
Filing Date: 2003-02-18
Classification: G06F

Abstract:
Process for configuring a motherboard or host computer (3) to communicate with at least one device or peripheral storage at a first speed or at a second higher speed, said motherboard or host computer (3) comprising processing means (32), storage means (33, 34), and at least one host connector (37, 38) for receiving attachment to said device or peripheral storage (1, 2), said attachment being made by either a first cable of medium quality allowing said first speed communication without data corruption, or a second cable of high-quality permitting said second speed communication without data corruption,said medium quality cable having one particular conductor which is released by said at least one device or peripheral storage (1, 2) upon reception of a reset pulse; said high-quality cable having said particular conductor being cut and the corresponding terminal which is located on the host side being internally wired in the enclosure of said high-quality cable in order to received a first voltage; and said particular terminal being pulled-up on the motherboard or said host computer to a second voltage; characterized in that said process involves the steps of: sampling the logical state carried by said particular terminal during a reset pulse which is transmitted to said at least one device or peripheral storage (1, 2); configuring said motherboard or host computer (3) in accordance with the logical state sampled.