Patent ID: 6706589
Filing Date: 2004-03-16
Classification: H01L

Abstract:
A method for forming a capacitor with metal armatures in metallization levels above an integrated circuit, including the steps of:a) depositing over the surface of an integrated circuit an insulating layer having a thickness ranging between 0.5 and 1.5 &mgr;m; b) digging into the insulating layer to form trenches, of which at least a portion in top view is parallel and separate from one trench to the other; c) depositing and leveling a metallic material to form conductive lines in the trenches separated by intervals; d) locally removing the insulating layer to remove at least from all the insulating layer the intervals separating two conductive lines; e) conformally depositing a dielectric; and f) depositing and etching a second metallic material to at least completely fill the intervals between conductive lines.