Patent ID: 6218713
Filing Date: 2001-04-17
Classification: H01L,H03K

Abstract:
A flip-flop circuit device comprising:first and second inverter circuits each formed by a three-terminal semiconductor circuit device having one control terminal and two current terminals, current flowing through the two current terminals being controlled by an electric signal applied to the control terminal;each of the first and second circuit including a series circuit of load element and a MOS transistor, two ends of the series circuit corresponding to the two current terminals, and the MOS transistor having a source region, a drain region, a channel region defined between the source region and the drain region, and a gate electrode formed above the channel region, the gate electrode connected to the control terminal, the impurity concentration of the channel region being higher near at the central portion of the channel region in the width direction and lower on both sides of the central portion; andfirst and second interconnections for inputting output signals from the first and second inverter circuits to the second and first inverter circuits respectively;wherein distribution of the impurity concentration of the channel region of each MOS transistor has a shape so that a first graph representing the input/output characteristics of the first inverter circuit and a second graph representing an inverse function of the input/output characteristics of the second inverter circuit intersect each other at least 5 times when the first graph is superimposed with the second graph.