Patent ID: 6043127
Filing Date: 2000-03-28
Classification: H01L

Abstract:
A method for manufacturing a ROM, comprising:(a) forming an insulating layer on top of a semiconductor substrate;(b) forming a gate structure above the insulating layer;(c) forming source/drain regions on opposite sides of the gate structure and located at a level below the gate structure on the semiconductor substrate;(d) forming a channel region beneath the gate structure and located between the source and drain terminals;(e) forming a cap above the gate structure, to divide the channel region into a first channel region and a second channel region;(f) after formation of the cap, forming a coding mask from among a set of selectable coding masks of photoresist having patterns imprinted therein, the masks including one mask which is selectable to cover the first channel region, a second mask which is selectable to cover the second channel region, a third mask which is selectable to cover both the first channel region and the second channel region and a fourth mask which is selectable to expose both the first channel region and the second channel region; and(g) performing a coding implantation operation.