Patent ID: 8754442
Filing Date: 2014-06-17
Classification: H01L

Abstract:
1. A SOI integratable high-current N-type combined semiconductor device, comprising: a P-type silicon substrate ( 1 ); a buried oxide layer ( 2 ) arranged on the P-type silicon substrate ( 1 ); characterized in that a P-type deep trench ( 16 ) arranged above the center of the buried oxide layer ( 2 ); an N-type annular source region ( 11 ) and a P-type body contact region ( 12 ) arranged on the P-type deep trench ( 16 ), wherein, the N-type annular source region ( 11 ) surrounds outside of the P-type body contact region ( 12 ), and a piece of source electrode metal ( 72 ) is arranged on the N-type source region ( 11 ) and the P-type body contact region ( 12 ), designed to interconnect the N-type source region ( 11 ) and the P-type body contact region ( 12 ); a first isolation region ( 101 ) and a second isolation region ( 102 ) are arranged on the buried oxide layer ( 2 ), and the first isolation region ( 101 ) and second isolation region ( 102 ) extend towards the center of the buried oxide layer ( 2 ) and thereby define a first region (I) and a second region (II); an N-type lateral insulated-gate bipolar transistor is arranged in the first region (I), and a PNP-type high-voltage bipolar transistor and an N-type lateral double-diffused metal oxide layer field-effect transistor are arranged in the second region (II), wherein, the source region of the N-type lateral insulated-gate bipolar transistor employs the N-type annular source region ( 11 ), the collector region of the PNP -type high-voltage bipolar transistor employs the P-type body contact region ( 12 ), the source region of the N-type lateral double-diffused metal oxide layer field-effect transistor employs the N-type annular source region ( 11 ), and the P-type body contact region ( 12 ) is also used as the body contact region of the N-type lateral insulated-gate bipolar transistor; a piece of drain electrode metal ( 70 ) connected to the drain electrode of the N-type lateral insulated-gate bipolar transistor is connected with a piece of base electrode metal ( 70 ′) connected to the base electrode of the PNP-type high-voltage bipolar transistor by a metal layer.