Patent ID: 6792440
Filing Date: 2004-09-14
Classification: H03H

Abstract:
A digital element, comprising:a. an input data path having a plurality of input bit locations arranged in a predetermined input bit-order sequence; b. an output data path having a plurality of output bit locations arranged in a predetermined output bit-order sequence; c. a first functional element adapted to perform a first preselected function, and coupled to the input data path; d. a second functional element adapted to perform a second preselected function, and coupled to the output data path; and e. an intermediate interconnect coupling the first functional element to the second functional element, the first functional element being adapted to provide output bit locations having a permuted bit-order sequence, such that the intermediate interconnect between the first functional element and the second functional element is rendered substantially direct and of minimized length, wherein one of the first and second functional elements comprises one of an accumulator, a multiplier, a divider, an adder, a counter, a shifter a decoder a controller, a multiplexer, a logic array, a storage element, and a combination thereof, and wherein another one of the first and second functional elements comprises a digital filter tap.