Patent ID: 6440842
Filing Date: 2002-08-27
Classification: H01L

Abstract:
A method of forming a dual damascene structure on a semiconductor wafer, the semiconductor wafer comprising a substrate, a conductive area positioned on a predetermined area of the substrate, and a patterned first photoresist layer positioned on the substrate above the conductive area, the method comprising:forming a dielectric layer that covers the patterned first photoresist layer, and forming a second photoresist layer positioned on the dielectric layer; performing a lithography process to form a line-shaped opening in the second photoresist layer positioned above the patterned first photoresist layer; performing a dry-etching process to etch portions of the dielectric layer through the line-shaped opening to form a line-shaped recess, the patterned first photoresist layer protruding from a bottom surface of the line-shaped recess; simultaneously removing the second photoresist layer and the patterned first photoresist layer to form a plug hole in the bottom of the line-shaped recess; forming a metal layer on the surface of the semiconductor wafer that fills the line-shaped recess and the plug hole for respectively forming a metal conductive wire and a conductive plug, the metal conductive wire coupled with the conductive plug defining a dual damascene structure; and removing the metal layer positioned on a top surface of the dielectric layer.