Patent ID: 9000539
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: forming a gate structure that touches a semiconductor region, the gate structure having a sacrificial gate dielectric and a sacrificial gate, the sacrificial gate dielectric touching the semiconductor region, the sacrificial gate touching the sacrificial gate dielectric, the semiconductor region having a conductivity type; etching away a portion of the sacrificial gate dielectric to form a sacrificial dielectric structure and a cavity, the sacrificial dielectric structure touching the sacrificial gate and the semiconductor region, the cavity lying directly vertically below a portion of the sacrificial gate; forming a source and a drain that touch the semiconductor region after the sacrificial dielectric structure has been formed, the source and the drain each having a conductivity type that is opposite the conductivity type of the semiconductor region; forming a conformal etch resistant layer on exposed surfaces of the sacrificial gate and sacrificial dielectric structure including within the cavity; forming a non-conductive layer over the conformal etch resistant layer, the non-conductive layer filling the cavity; and forming a sidewall spacer from the conformal etch resistant layer and the non-conductive layer.