Patent ID: 7511539
Filing Date: 2009-03-31
Classification: H03K

Abstract:
1. A driver circuit comprising: first and second series-connected three-terminal active elements, each of said first and second three-terminal active elements having an amplification function and first, second, and third electrodes, the second and third electrodes of each three-terminal active element being series-connected between first and second potentials; first and second delay means which receive the same input signal; and an output load coupled to an end of the series-connected first and second three-terminal active elements, where the end is spaced apart from a node between the first and second series-connected three-terminal active elements, wherein outputs of said first and second delay means are respectively connected to the first electrodes of said first and second three-terminal active elements, the output from said first delay means has a phase that is inverse of a phase of the output from said second delay means, a delay amount of said second delay means is larger than a delay amount of said first delay means, the delay amount of said first delay means is a finite value including zero, and the difference of the delay amount of the first delay means and the second delay means is a fixed value, and wherein a temporal response of a potential difference between the second and third electrodes of the first three-terminal active element has a phase that is the same as a phase of the temporal response of the potential difference between the second and third electrodes of the second three-terminal active element.