Patent ID: 6323065
Filing Date: 2001-11-27
Classification: H01L

Abstract:
A method for manufacturing a ball grid array semiconductor package, comprising:providing a heat spreader strip for a plurality of package sites configured to receive semiconductor dies;providing a metal ground plane strip for the plurality of package sites;stamping a first aperture through the metal ground plane strip for each of the plurality of package sites;providing an interconnect substrate having only one metal layer;stamping a second aperture that is larger than the first aperture through the interconnect substrate, such that the second aperture is substantially aligned with the first aperture;joining the metal ground plane strip to the heat spreader strip;attaching the stamped interconnect substrate to at least one of the plurality of package sites on the metal ground plane strip; andstamping at least one via hole through the interconnect substrate at the same time the second aperture in the interconnect substrate is stamped, wherein the one metal layer of the interconnect substrate does not function as the metal ground plane strip.