Patent ID: 7237152
Filing Date: 2007-06-26
Classification: G06F

Abstract:
1. An apparatus for providing a fail-operational global time reference for a redundant synchronous data bus system including a first primary data bus, a second primary data bus, a first redundant data bus, and a second redundant data bus, the apparatus comprising: a first plurality of timing servers cross-coupled to said first data buses and configured to receive timing synchronization signals from said second primary data bus; a second plurality of timing servers cross-coupled to said second data buses and configured to receive timing synchronization signals from said first primary data bus, each of the first and second plurality of timing servers including a counter; and a unique constant stored in each timing server, wherein each said timing server of said first and second pluralities of timing servers is configured to independently and automatically execute a selection protocol responsive to a failure of a timing master to select one timing server from among the first and second pluralities of timing servers to be a replacement timing master based upon synchronization signals received from at least one timing server of said first and second pluralities of timing servers and upon a relationship among said unique constants stored in said timing servers, wherein each said timing server is configured to transmit, receive, and monitor synchronization signals from each of said first and second pluralities of timing servers, each said counter is responsive to the failure of the timing master to initiate counting from a starting point to count toward each respective stored unique constant, and each said timing server is further configured to transmit a master timing synchronization signal when said counter in said timing server has completed counting to said unique constant stored in said timing server.