Patent ID: 6255195
Filing Date: 2001-07-03
Classification: H01L,Y10S

Abstract:
A method for forming a bonded semiconductor-on-insulator substrate for semiconductor devices and integrated circuits, said method comprising:providing a wafer comprising a monocrystalline semiconductor material;implanting ions of the semiconductor material through a surface of the monocrystalline semiconductor wafer to a selected depth in said wafer, thereby forming adjacent to said surface an amorphous layer of the semiconductor material, said amorphous semiconductor layer extending to a substantially planar zone disposed at substantially said selected depth and comprising monocrystalline semiconductor material damaged by lattice defects, undamaged monocrystalline semiconductor material below said selected depth comprising a first layer of the monocrystalline semiconductor material;heating said wafer under conditions effective to convert said amorphous semiconductor layer to a second layer of the monocrystalline semiconductor material;heating the wafer under conditions effective to coalesce said zone of monocrystalline semiconductor material damaged by lattice defects, thereby forming a substantially planar intrinsic gettering zone comprising substantially pure semiconductor material and including active gettering sites, said gettering zone being disposed substantially at said selected depth;providing a handle wafer comprising on one surface an insulating bond layer; andbonding said insulating bond layer to said surface of said wafer, thereby forming a bonded semiconductor-on-insulator substrate comprising a handle wafer, an insulating bond layer, and a monocrystalline semiconductor device wafer, said device wafer containing said first layer of undamaged monocrystalline semiconductor material and a substantially planar intrinsic gettering zone that comprises substantially pure semiconductor material and includes active gettering sites.