Patent ID: 9105741
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: providing a buried oxide layer having a surface; forming, on the surface of the buried oxide layer, at least one fin having sidewalls; forming, over a first portion of the at least one fin structure, a gate structure having sidewalls, wherein a channel region is located under the gate structure within the first portion of the at least one fin; forming gate spacers on the sidewalls of the gate structure by etching a deposited dielectric from over the at least one fin, wherein the etching of the dielectric undercuts the surface of the buried oxide layer and creates recessed regions within the surface of the buried oxide layer along a location adjacent the sidewalls of a second portion of the at least one fin that extends outwardly from one of the gate spacers; forming a first epitaxial region that covers both one of the recessed regions and the second portion of the at least one fin that extends outwardly from one of the gate spacers; forming a first epitaxial layer within the one of the recessed regions by etching the first epitaxial region and the second portion of the at least one fin down to the surface of the buried oxide layer; and forming a second epitaxial region over both the surface of the buried oxide layer at a location adjacent the one of the gate spacers and the first epitaxial layer within the one of the recessed regions.