Patent ID: 8212293
Filing Date: 2012-07-03
Classification: H01L

Abstract:
1. A transistor of a semiconductor device, the transistor comprising: a semiconductor substrate comprising a plurality of active regions defined by an isolation layer, wherein each of the active regions is completely surrounded by the isolation layer; a first recess trench formed in one of the active regions and disposed to cross the semiconductor substrate within the one of the active regions; a second recess trench formed in the one of the active regions and disposed parallel to the first recess trench; a gate line formed as a substantially straight line pattern, wherein the gate line crosses each of the first recess trench and the second recess trench at a right angle and extends from the first recess trench to the second recess trench while filling the first and second trenches; and a gate dummy pattern disposed between the active regions while being spaced apart from the gate line, wherein the gate dummy pattern is formed simultaneously with the gate line.