Patent ID: 7124279
Filing Date: 2006-10-17
Classification: G06F

Abstract:
1. A method of compressing a program to be executed by a processor which at execution time reads compressed-form instructions stored in a program memory outside the processor, decompresses the compressed-form instructions and caches them in an instruction cache inside the processor prior to issuing the instructions, the processor having a program counter which points directly to addresses in the program memory from which the compressed-form instructions are to be read, the method comprising: converting a sequence of original instructions of the program into a corresponding sequence of such compressed-form instructions; assigning such original instructions imaginary addresses according to said sequence thereof, the assigned imaginary addresses determining at said execution time respective locations in said instruction cache into which the instructions read from the program memory are to be loaded after decompression; and outputting a compressed program comprising the compressed-form instructions together with imaginary address information specifying said assigned imaginary address of at least one said original instruction and storing the compressed program in said program memory so that at said execution time the processor reads both said compressed-form instructions and said imaginary address information from program-memory addresses pointed to directly by the program counter and allocates the assigned imaginary addresses to the decompressed instructions based on said imaginary address information and loads the decompressed instructions into instruction-cache locations determined by the allocated imaginary addresses.