Patent ID: 6515465
Filing Date: 2003-02-04
Classification: G01R

Abstract:
A method for measuring harmonic load-pull for frequency multiplication to obtain a load impedance and a source impedance for which frequency multiplication performance of a frequency multiplication device is optimized, said method comprising:supplying a fundamental frequency signal to a frequency multiplication device under test from a source measurement system that includes a source mechanical tuner for adjusting a fundamental source impedance of an input signal, and obtaining a target even-order multiplied frequency at which multiplication performance of the frequency multiplication device is optimum from a load measurement system that includes a load mechanical tuner for adjusting a device load impedance at the target even-order multiplied signal that is among a signal output of the frequency multiplication device; independently controlling fundamental load impedance and even-harmonic load impedance by means of a load mechanical tuner that includes a control means that functions as an open-ended stub that is one-quarter wavelength long at the fundamental frequency and which at that position satisfies a short-circuit condition with respect to the fundamental signal, for controlling a fundamental load that depends on a position at which the stub is set and that is represented by an electrical angle from an output section of a device under test to a short-circuit point; independently controlling fundamental source impedance and even-harmonic source impedance by means of a source mechanical tuner that includes control means that functions as a short-circuit stub that is one-quarter wavelength long at the fundamental frequency, and therefore a half wavelength long at the second harmonic frequency, and which at that position satisfies a short-circuit condition with respect to even-harmonics that include a second harmonic signal, for controlling an even-harmonic source impedance that depends on a position at which the stub is set and that is represented by an electrical angle from an input section of a device under test to the short-circuit point.