Patent ID: 6515330
Filing Date: 2003-02-04
Classification: H01L

Abstract:
A semiconductor current limiting device comprising:a) a semiconductor substrate of one conductivity type, b) at least one gate electrode overlying a gate insulator on a first surface of the substrate, c) a channel region of a second conductivity type in the first surface of the substrate underlying a first peripheral region of the gate electrode, d) a first doped region of the second conductivity type contiguous with the channel region, and underlying the first peripheral region of the gate electrode, and positioned deeper in the substrate than the channel region extending further and under a second peripheral region of the gate electrode, e) a second doped region of the first conductivity type in the first surface of the substrate and within an extension of the channel region and adjacent to the gate electrode, f) a first electrode on the first surface in ohmic contact with the second doped region and the gate electrode, and g) a second electrode on a second surface of the substrate opposite from the first surface, whereby the first doped region tends to pinch off a conduction channel from the second electrode through the substrate to other first electrode when a forward bias is applied between the second electrode and the first electrode.