Patent ID: 6222244
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A semiconductor device having a plurality of wiring lines, said device comprising:a plurality of conductors, each of said conductors having a conductive layer and an insulating layer above said conductive layer, wherein a first width between said conductive layer of adjacent ones of said conductors is greater than a second width between said insulating layer of adjacent ones of said conductors;first spacers positioned on said insulating layer and said conductive layer of adjacent ones of said conductors;a fuse element positioned between said first spacers of adjacent ones of said conductors and connected to said wiring lines; andsecond spacers positioned between said fuse element and said first spacers, said second spacers being on a same layer level as said conductive layer, wherein a difference between said first width and said second width is filled by said second spacers.