Patent ID: 6756928
Filing Date: 2004-06-29
Classification: H03F,H03M

Abstract:
A pseudo-differential amplifier circuit comprising:a first amplifier that amplifies a first input signal; a second amplifier that amplifies a second input signal that has the opposite signal level of said first input signal, said first and second amplifiers being of the same circuit configuration and having the same characteristics, and capable of performing pseudo differential amplification for said first and second input signals to output the obtained signals; first and second capacitors connected in series between the output terminals of said first and second amplifiers; third and fourth capacitors connected in series between the input terminals of said first and second amplifiers; a buffer section that conveys the voltage at the junction between said first and second capacitors to the junction between said third and fourth capacitors; and a switch section that applies a predetermined voltage to the junction between said first and second capacitors and controls the voltage, depending on input control signals, wherein when a predetermined voltage is applied to said first and second capacitors from said switch section, said first and second capacitors memorize the difference between said voltage and the average value of the voltages output from said first and second amplifiers, and the voltage difference is applied to said third and fourth capacitors through said buffer section.