Patent ID: 6468898
Filing Date: 2002-10-22
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising:forming an underlying wiring line comprising copper in a semiconductor substrate; forming an interlayer insulation film including a low dielectric constant film on said semiconductor substrate; forming a metal mask on said interlayer insulation film; subsequently forming a first photoresist film on said metal mask, wherein said first photoresist film is patterned to form a via hole; forming a second photoresist film on said metal mask, wherein said second photoresist film is patterned to form an overlying wiring trench; patterning said metal mask according to a pattern of each of said first photoresist film and said second photoresist film; removing said first photoresist film and said second photoresist film prior to patterning of said interlayer insulation film, wherein said patterning is performed using said metal mask to form said via hole and said overlying wiring trench in said interlayer insulation film; and filling said overlying wiring trench and said via hole with a conductive material comprising copper to form an overlying wiring line and a via contact.