Patent ID: 7148115
Filing Date: 2006-12-12
Classification: H01L

Abstract:
1. A method for forming semiconductor device, the method comprising the steps of: (a) sequentially forming a SiGe epitaxial layer and a Si epitaxial layer on a semiconductor substrate; (b) forming a device isolation film defining an active region on the semiconductor substrate; (c) implanting an impurity into the Si epitaxial layer to form a channel region; (d) etching the Si epitaxial layer and a predetermined depth of the SiGe epitaxial layer on the channel region to form an opening; (e) forming a channel stop ion implant region in the semiconductor substrate under a portion of SiGe epitaxial layer exposed through the opening; (f) forming and patterning a gate dielectric film, a conductive layer for gate electrode and a hard mask insulating film on the semiconductor substrate including a sidewall and a lower portion of the opening to form a stacked structure of gate dielectric film pattern, a gate electrode and a hard mask insulating film pattern; (g) forming LDD regions in the Si epitaxial layer at both sides of the stacked structure; (h) forming a sidewall spacer on a sidewall of the stacked structure; (i) etching the Si epitaxial layer, the SiGe epitaxial layer and a predetermined depth of the semiconductor substrate at both side of the sidewall spacer; (j) removing the SiGe epitaxial layer under the Si epitaxial layer below the stacked structure to form a space; (k) forming a buried insulating film filling the space; (l) forming a silicon layer in the active region at both sides of the sidewall spacer; and (m) forming source/drain regions in the silicon layer.