Patent ID: 8935589
Filing Date: 2015-01-13
Classification: G06F,H03M

Abstract:
1. A controller, coupled to a flash memory, comprising: a selective mapper, receiving prior data and first source data, scrambling the first source data-using a plurality of pseudo random sequences to obtain a plurality of first mapped data segments, calculating a plurality of cross correlation values between prior data and the first mapped data segments, selecting an optimal mapped data segment from the first mapped data segments according to the cross correlation values, and generating output mapped data according to the optimal mapped data segment and a type of the flash memory, wherein the first mapped data segments are not read from the flash memory and are generated by the selective mapper; and an error correction code encoder, encoding a first error correction code to be stored in the flash memory according to the output mapped data, wherein the bits of the prior data are stored in the same memory cell or the neighboring cell as those storing bits of the first error correction code.