Patent ID: 6990624
Filing Date: 2006-01-24
Classification: H03M

Abstract:
1. A decoder comprising: a plurality of N-parallel syndrome generators, each of the N-parallel syndrome generators coupled to a parallel data stream and being adapted to perform a calculation each cycle with N symbols from the parallel data stream, each N-parallel syndrome generator adapted to determine, after a predetermined number of cycles, a plurality of syndromes; a plurality of key equation determination devices, each key equation determination device coupled to at least one of the N-parallel syndrome generators and being adapted to determine at least one error polynomial by using a corresponding plurality of syndromes from the at least one N-parallel syndrome generator; and a plurality of N-parallel error determination and correcting devices, one for each of the N-parallel syndrome generators, each N-parallel error correction and determination device coupled to one of the key equation determination devices and being adapted to use the at least one error polynomial produced by the one key equation determination device to correct errors in the parallel data stream.