Patent ID: 6159844
Filing Date: 2000-12-12
Classification: H01L

Abstract:
A method for manufacturing reliable conductive contacts in semiconductor devices fabricated throughout a semiconductor wafer, the semiconductor devices having a multiplicity of transistor devices, each of the transistor devices having a pair of diffusion regions and a polysilicon gate structure; the method comprising:forming an oxide layer over a top surface and sidewalls of the polysilicon gate structure of each of the transistor devices;forming a photoresist mask that exposes gate contact locations over the polysilicon gate structure of each of the transistor devices, the gate contact locations being defined over shallow trench isolation regions;etching the oxide layer over the top surface of the polysilicon gate structure of each of the transistor devices, the etching being configured to remove the oxide layer that is exposed by the photoresist mask;depositing a silicon nitride layer over the transistor devices that are defined throughout the semiconductor wafer;depositing a dielectric layer over the silicon nitride layer; andetching via holes through the dielectric layer and the silicon nitride layer for conductive contacts down to selected ones of the pair of diffusion regions and the polysilicon gate structure of selected transistor devices.