Patent ID: 6724085
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A semiconductor device comprising:an active region included in a transistor formed on a semiconductor substrate; a wire formed on said semiconductor substrate; an interlayer isolation film covering said active region and said wire; and a plug wire having a shape overlapping with both of said wire and said active region in plane through said interlayer isolation film, for electrically connecting said wire and said active region with each other, wherein: said wire has side surfaces which are covered with an insulating layer continuously covering the side surfaces of said wire and a surface part of said semiconductor substrate located on the base of said side surfaces in a cross section of said wire; said insulating layer is located between said wire and said plug wire, and is in contact with said wire; said insulating layer is not a side wall spacer; and said insulating layer covers said semiconductor substrate such that it extends outward from said wire.