Patent ID: 8730716
Filing Date: 2014-05-20
Classification: G06F,H01L

Abstract:
1. A method of manufacturing a magnetic random access memory (MRAM) cell comprising: forming a plurality of diffusion regions and a transistor gate, collectively defining an access transistor, in a silicon substrate; forming a plurality of metal-interposed-in-interlayer dielectric (ILD) layers on top of a first ILD layer with each of the plurality of ILD layers being formed on top of a previous layer of the plurality of ILD layer, each of the plurality of ILD layers having metal dispersed therethrough, on top of the access transistor, the first ILD positioned on top of the diffusion regions; forming a magneto tunnel junction (MTJ) substantially on top of the plurality of ILD layers, each of the plurality of ILD layers having the metal dispersed therethrough, a bit line positioned in close proximity to the MTJ; forming a spacer on top of and around the MTJ; and depositing a metal on top of the bit line and over a portion of the top most one of the plurality of ILD layers and extending over the top of the MTJ.