Patent ID: 7936299
Filing Date: 2011-05-03
Classification: H03M

Abstract:
1. A charge to digital converter comprising: an integration circuit comprising an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between said inverting input terminal and said output terminal, said integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, said fold capacitor switchably coupled to a fold voltage source via a fold buffer for charging said fold capacitor to a predetermined fold charge value when said integrating capacitor stores said charge input selectively provided by the sensor diode, and said fold capacitor switchably decoupled from the fold voltage source and coupled to said integrating capacitor for selectively removing at least a portion of said stored charge input when said stored charge input exceeds a predetermined integration charge value.