Patent ID: 7291439
Filing Date: 2007-11-06
Classification: G03F

Abstract:
1. A manufacturing method of a thin film transistor array panel, the method comprising: forming a gate line on a substrate; depositing a gate insulating layer, a semiconductor layer, and a data layer on the gate line; depositing a photoresist film on the data layer, the photoresist film comprising an alkali-soluble resin and a photosensitive compound having a ballast structure expressed by Chemical Formula (I), where R patterning the photoresist film to form a first photoresist; etching the data layer using the photoresist pattern as an etching mask to form a data conductor; etching the semiconductor layer using the data conductor as an etching mask; applying heat-treatment for reflow to the photoresist pattern to form a second photoresist; and etching the data conductor using the second photoresist as an etching mask.