Patent ID: 7285987
Filing Date: 2007-10-23
Classification: H03K

Abstract:
1. A self DC-bias high frequency logic gate comprising at least an input terminal and an output terminal for performing a Boolean operation on the high frequency input signals and outputting an operation result, and the logic gate is characterized in: wherein, each transistor is electrically coupled to an impedance matching network, and the impedance matching network comprises a first terminal and a second terminal, a matching inductance element, a matching capacitance element, and a matching resistance element, the matching inductance element and the matching resistance element are connected in series between the first and second terminals, the matching capacitance element has a first terminal connected to a connection point of the matching inductance element and the matching resistance element, and a second terminal connected to a ground, the first terminal of the impedance matching network is electrically coupled to a gate of the transistor, the second terminal of the impedance matching network is electrically coupled to a drain of the transistor for providing an operation voltage to the transistor.