Patent ID: 8304885
Filing Date: 2012-11-06
Classification: G11C,H01L

Abstract:
1. A semiconductor device comprising: an IC chip body including a rewiring layer including said noisy signal lines are respectively connected to, among said multiplicity of IC-side pads, a first group of IC-side pads, and said noise-susceptible signal lines are respectively connected to, among said multiplicity of IC-side pads, a second group of IC-side pads, said first group of IC-side pads are respectively connected to, among said multiplicity of external electrodes, a first group of external electrodes, and said second group of IC-side pads are respectively connected to, among said multiplicity of external electrodes, a second group of external electrodes, and said first group of IC-side pads are separated and spaced apart from said second group of IC-side pads, and said first group of external electrodes are separated and spaced apart from said second group of said external electrodes.