Patent ID: 7256662
Filing Date: 2007-08-14
Classification: H03H,H04B

Abstract:
1. A common mode signal suppressing circuit for suppressing common mode signals propagating with identical phases through two conductor lines, the common mode signal suppressing circuit comprising: a first winding inserted to one of the conductor lines at a specific first point: a second winding that is inserted to the other of the conductor lines at a second point corresponding to the first point and is coupled to the first winding, the second winding suppressing the common mode signals in cooperation with the first winding; a third winding coupled to the first and second windings such that a mutual inductance is generated between the third winding and the first and second windings; and a phase-inverted signal transmitting means connected to the third winding and to the one of the conductor lines at a third point different from the first point, the transmitting means being further connected to the other of the conductor lines at a fourth point corresponding to the third point and different from the second point, the transmitting means transmitting a phase-inverted signal for suppressing the common mode signals, wherein: when a source of the common mode signals is located at a point closer to the third and fourth points than the first and second points except a point between the first and third points and a point between the second and fourth points, the transmitting means detects a common mode signal and supplies the phase-inverted signal to the third winding, the phase-inverted signal having a phase opposite to a phase of the common mode signal detected, and the third winding injects the phase-inverted signal to the two conductor lines through the first and second windings; and when the source of the common mode signals is located at a point closer to the first and second points than the third and fourth points except a point between the first and third points and a point between the second and fourth points, the third winding detects a common mode signal, and the transmitting means injects the phase-inverted signal to the two conductor lines, the phase-inverted signal having a phase opposite to a phase of the common mode signal detected by the third winding, the common mode signal suppressing circuit, further comprising an impedance element provided on the two conductor lines at a point between the first and third points and a point between the second and fourth points, the impedance element reducing a peak value of a common mode signal passing therethrough.