Patent ID: 9000351
Filing Date: 2015-04-07
Classification: G01J,G11C,H01H

Abstract:
1. A semiconductor integrated circuit comprising: an operation circuit having a circuit constant and performing an operation corresponding to the circuit constant; an element array which contains a plurality of arrayed elements and which selectively turns off part of the elements according to element selection information to correct the circuit constant of the operation circuit based on an output of the plurality of elements; a trimming information generation circuit which contains a plurality of fuses and which generates and outputs trimming information in which whether or not each of the plurality of fuses has been melted and cut is represented by a bit string associated with the individual fuses; and a conversion circuit for converting a bit string of the trimming information outputted from the trimming information generation circuit into the element selection information in which whether or not each of the plurality of fuses is turned off is represented by a bit string associated with the individual elements, wherein as the trimming information for a case where a characteristic value of the operation circuit is a mean value in an appearance frequency distribution of the characteristic value, trimming information representing that a number of melted-and-cut fuses contained in the trimming information generation circuit is a least possible number is assigned, and as the trimming information for cases where the characteristic value falls within a range of {mean value±2×(standard deviation)} in the appearance frequency distribution, trimming information representing that the number of melted-and-cut fuses contained in the trimming information generation circuit is a second least number next to the least number is assigned.