Patent ID: 6436793
Filing Date: 2002-08-20
Classification: B41J,H01L

Abstract:
A method of forming a semiconductor structure from a set of bonded semiconductor wafers comprising at least a first wafer and a second wafer, the first wafer having an upper surface and a lower surface opposite the upper surface, the second wafer having a surface and at least one alignment reference target arranged on the surface of the second wafer, the method comprising:removing a first portion of the first water from the lower surface of the first wafer, the first portion of the first wafer located in a non-die area of the first wafer; bonding the lower surface of the first wafer to the surface of the second wafer; removing a second portion of the first wafer from the upper surface of the first wafer, the second portion of the first wafer located in the non-die area of the first wafer, such that an opening is formed in the first wafer that exposes at least one of the at least one alignment reference target on the surface of the second wafer; and dicing the bonded first wafer and second wafer using the exposed at least one alignment reference target to form the semiconductor structure.