Patent ID: 6885583
Filing Date: 2005-04-26
Classification: G11C

Abstract:
1. A nonvolatile semiconductor device comprising: at least one memory cell; a bit line connected to the memory cell; and a bit line control circuit including a capacitor, a MOS transistor, a flip-flop circuit, a first transfer gate connected between the capacitor and the bit line, a second transfer gate between the capacitor and the flip-flop circuit, and a third transfer gate connected between the flip-flop circuit and a gate electrode of the MOS transistor, wherein a source electrode of the MOS transistor is coupled to the capacitor, a drain electrode of the MOS transistor is coupled to a voltage source, and the MOS transistor selectively changes a value of a first data stored in the capacitor according to a voltage level of the gate electrode selectively boosted by a change of the voltage source.