Patent ID: 6034897
Filing Date: 2000-03-07
Classification: G06F,G11C

Abstract:
A method for use in a digital system having a controller device coupled to a host and at least two nonvolatile memory devices, the host for storing digital information in the nonvolatile memory unit and reading the stored digital information from the nonvolatile memory unit under the direction of the controller, the memory unit being organized into blocks of sectors of information, the method for erasing digital information stored in the blocks of the nonvolatile memory devices inparallel and comprising:(a) assigning a predetermined number of blocks, in sequential order, to each of the nonvolatile memory devices, each block having a predetermined number of sectors;(b) forming `super` blocks, each `super` block having blocks arranged in parallel wherein blocks of the same sequential number in each of the nonvolatile memory devices in like position relative to each other;(c) identifying a particular `super` block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device, for erasure of the particular `super` block by the controller;(d) first selecting the first block within the first nonvolatile memory device from the particular `super` block for erasure thereof;(e) initiating an erase operation to be performed on the selected first block;(f) second selecting a second block within the second nonvolatile memory device from the particular `super` block for erasure thereof;(g) initiating an erase operation to be performed on the selected second block;(h) erasing the first and second block of the particular `super` block so that erasure of the second block is performed without waiting for completion of the erasure of the first block; and(h) indicating the status of the first and second nonvolatile memory devices to be busy during erasure of the first and second blocks,wherein the speed of erase operations in the digital system is substantially increased due to the blocks of the `super` block being arranged in-parallel and overlapping of the erase operations of the blocks within the `super` blocks thereby increasing the overall performance of the digital system.