Patent ID: 7656221
Filing Date: 2010-02-02
Classification: H02M

Abstract:
1. A booster circuit comprising: a pump circuit having a plurality of charge pump circuits that boost a voltage supplied from a power supply and output the boosted voltage to a first output terminal and having a clock adjusting circuit that generates a second clock signal for operating said charge pump circuits from a first clock signal; a pump controlling circuit that outputs the first clock signal for operating said pump circuit to control the operation of said pump circuit; a first variable resistor connected to said first output terminal at one end thereof; a second variable resistor connected to the other end of said first variable resistor at one end thereof; a third variable resistor connected to the other end of said second variable resistor at one end thereof; a limiter circuit that is connected between the other end of said third variable resistor and a ground potential, composed of a variable resistor, and capable of adjusting a current flowing through said first variable resistor, said second variable resistor and said third variable resistor; a first comparator that receives a first monitor voltage at said the other end of said first variable resistor at the inverting input terminal thereof and a reference voltage at the non-inverting input terminal thereof, and outputs a first output signal; a second comparator that receives a second monitor voltage at said the other end of said second variable resistor at the inverting input terminal thereof and said reference voltage at the non-inverting input terminal thereof, and outputs a second output signal; and a third comparator that receives a third monitor voltage at said the other end of said third variable resistor at the inverting input terminal thereof and said reference voltage at the non-inverting input terminal thereof, and outputs a third output signal; wherein said pump controlling circuit: