Patent ID: 6204136
Filing Date: 2001-03-20
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, which method comprises the sequential steps of:(a) providing a semiconductor substrate having a surface;(b) forming a thin gate insulator layer in contact with said substrate surface;(c) forming a gate electrode on a portion of said gate insulator layer, said gate electrode comprising first and second opposing side surfaces and a top surface;(d) forming a blanket layer of an insulative material on the exposed portions of said thin gate insulator layer on said substrate surface and on said first and second opposing side surfaces and said top surface of said gate electrode;(e) selectively removing, by anisotropically etching, (1) said blanket layer of insulative material and underlying portions of said thin gate insulator layer from said substrate surface, and (2) said blanket layer of insulative material from said top surface of said gate electrode, thereby forming am insulative sidewall spacer on each of said first and second opposing side surfaces of said gate electrode and exposing portions of said substrate surface adjacent said sidewall spacers; and(f) removing residue and/or contaminants resulting from said anisotropically etching from at least said exposed portions of substrate surface adjacent said sidewall spacers.