Patent ID: 9161437
Filing Date: 2015-10-13
Classification: H05K

Abstract:
1. A circuit board, comprising: a signal routing layer, comprising a plurality of connector traces, a plurality of chip traces, and a plurality of signal traces connected with the connector traces and the chip traces; a first dielectric layer supporting the signal routing layer; a second dielectric layer separated from the signal routing layer by the first dielectric layer; a first ground layer sandwiched between the first dielectric layer and the second dielectric layer, the first ground layer having an area no larger than an area of the chip traces, the first ground layer positioned within a projection of the area of the chip traces on the second dielectric layer; a third dielectric layer separated from the signal routing layer by the first dielectric layer and the second dielectric layer; a second ground layer sandwiched between the second dielectric layer and the third dielectric layer, the second ground layer having an area no larger than a total area of the signal traces and the chip traces, the second ground layer positioned within a projection of the areas of the signal traces and the chip traces on the third dielectric layer; and a third ground layer located on a surface of the third dielectric layer far away from the second dielectric layer.