Patent ID: 8138802
Filing Date: 2012-03-20
Classification: H03F

Abstract:
1. A detection circuit comprising: a differential input comprising a first input and a second input; an output configured to provide a first output signal of the detection circuit, wherein the first output signal is indicative of differential signal activity on the differential input; a first buffer having an input coupled to the first input of the detection circuit, and comprising an output stage configured to provide an output of the first buffer; and a second buffer having an input coupled to the second input of the detection circuit, and comprising an output stage configured to provide an output of the second buffer; and a load circuit; wherein the output of the first buffer and the output of the second buffer are coupled to a first node; wherein the output stage of the first buffer and the output stage of the second buffer are configured to fully rectify a differential input signal present at the differential input, to generate a fully rectified first signal; and wherein the load circuit is configured to filter the fully rectified first signal to generate the first output signal of the detector.