Patent ID: 6440804
Filing Date: 2002-08-27
Classification: H01L

Abstract:
A static random access memory (SRAM) manufacturing method, comprising:providing a substrate; successively forming a gate oxide and a first conducting layer upon the substrate; defining the first conducting layer and the gate oxide layer, thereby forming a buried contact window opening and the buried contact window opening exposing the substrate; forming a second conducting layer upon the substrate and covering the buried contact window opening, causing the second conducting layer to have a recess on the buried contact window opening; forming a buried contact window within the substrate corresponding to the buried contact window; forming a protective layer in the recess; forming a patterned photoresist layer over the substrate, wherein the patterned photoresist layer has an opening; etching a portion of the second conducting layer exposed by the opening, using the patterned photoresist layer and the protective layer as a mask layer, and continuously etching the first conductive layer to form a gate electrode and an interconnect; removing the patterned photoresist; and performing an implantation process, whereby a source/drain region is formed in the substrate.