Patent ID: 6278325
Filing Date: 2001-08-21
Classification: H03F,H03G

Abstract:
A programmable gain amplifier with a large extent for the variation of gains made by a manufacturing process of complementary metal oxide semiconductor (CMOS); wherein the structure is divided into two stages, a first stage and a second stage; the first stage is made by connecting PMOSs group, P.sub.0 and P.sub.1 to P.sub.N in parallel, wherein P.sub.1 to P.sub.N are PMOS of different sizes; the second stage is installed by connecting NMOS N.sub.0 and N.sub.1 to N.sub.M in parallel, wherein N.sub.1 to N.sub.N are NMOSs of different sizes; widths of CMOSs are Wi to W'i, respectively and the lengths are Li and L', respectively, wherein i is equal to 0 to N, in the first stage, each transistor is biased by a bias current I.sub.bais.; then bias current I.sub.t flowing through amplifier stage of the programmable gain amplifier is: ##EQU5##where Wi and W'i are the width of CMOS, while Li and L'i are the length of the CMOS; and I.sub.bias is the bias current source for voltage stability.