Patent ID: 7187064
Filing Date: 2007-03-06
Classification: H01L

Abstract:
1. An electrical-interference-isolated transistor structure, comprising at least one chip having one side provided with a plurality of electrical contacts; a first adhesive layer, a conducting layer, and a second adhesive layer sequentially provided on said side of said at least one chip with said electrical contacts from inner to outer side with said conducting layer firmly bonded between said first and said second adhesive layer; and a leadframe bonded to an outer side of said second adhesive layer for said conducting layer to locate between said chip and said leadframe; said leadframe having a plurality of terminal legs, each of which is electrically connected to a corresponding one of said electrical contacts on said chip via a lead wire; and at least one of said electrical contacts on said chip being electrically connected to said conducting layer and a selected one of said terminal legs of said leadframe via a conductor.