Patent ID: 6876553
Filing Date: 2005-04-05
Classification: H01L

Abstract:
1. An integrated circuit (IC) package, comprising: an IC die: a first substrate having opposing first and second surfaces, and a plurality of electrically conductive vias formed through said first substrate; a second substrate having opposing first and second surfaces, and a first plurality of openings formed through said second substrate that are each open at said first and second surfaces of said second substrate; a stiffener having opposing first and second surfaces, and a second plurality of openings formed through said stiffener that are each open at said first and second surfaces of said stiffener, wherein said first surface of said first substrate is attached to the first surface of said stiffener, and said first surface of said second substrate is attached to the second surface of said stiffener; and a wire bond that couples a pad on said IC die to said first surface of said first substrate through an opening of said first plurality of openings formed through said second substrate and an opening of said second plurality of openings formed through said stiffener.