Patent ID: 9128624
Filing Date: 2015-09-08
Classification: G06F

Abstract:
1. A flash memory storage system, comprising: a flash memory chip, having a plurality of physical blocks; a connector, configured to couple to a host system; and a controller, coupled to the flash memory chip and the connector and configured to configure a plurality of logical blocks and map the logical blocks to a portion of the physical blocks, wherein the controller is further configured to identify at least one rewritable disc command from the host system and to write data from the host system into the physical blocks mapped to at least a portion of the logical blocks according to the at least one rewritable disc command, wherein the controller is further configured to establish at least one management information of a rewritable disc device, wherein the at least one management information of the rewritable disc device comprises a written capacity parameter, and the written capacity parameter records a written capacity of the at least a portion of the logical blocks, wherein the written capacity parameter is updated according to a capacity of the data after the data is written, wherein the written capacity parameter is also updated according to a size of a close section without the data being written, wherein the controller is further configured to obtain a next writable address according to the written capacity parameter, and to write the data from the host system into the physical blocks starting from the physical block mapped to the logical block corresponding to the next writable address.