Patent ID: 9136179
Filing Date: 2015-09-15
Classification: H01L

Abstract:
1. A method of forming a device comprising: providing a substrate having a core device region and a high gain (HG) device region for a HG transistor; forming a core gate on the substrate in the core device region and a HG gate on the substrate in the HG device region, wherein the HG gate includes sidewall spacers on its sidewalls, wherein performing a lightly doped drain (LDD) implant, the LDD implant implants first polarity type dopants to form first polarity type LDD regions adjacent to the core gate, the first polarity type comprises n-type; and performing a source/drain (S/D) implant, the S/D implant implants first polarity type dopants to form heavily doped first polarity type core S/D regions adjacent to the core gate and heavily doped first polarity type HG S/D regions adjacent to the HG gate, the core device region includes core S/D regions with LDD regions while the HG device region includes HG S/D regions without LDD regions.