Patent ID: 6381691
Filing Date: 2002-04-30
Classification: G06F

Abstract:
A method for scheduling instructions for execution along multiple paths in a computer processing system implementing out-of-order execution, the method comprising the steps of:selecting and moving a next instruction from its current position in a sequence of instructions to an earlier position; determining whether the selected instruction may reference a memory location for read-access; determining whether the selected instruction was previously moved over a non-selected instruction which may ambiguously reference the memory location, when the selected instruction may reference the memory location for read-access; determining whether the selected instruction was previously moved over a branch instruction, when the selected instruction was previously moved over the non-selected instruction; and storing a record of the selected instruction for future reference, when the selected instruction was previously moved over the branch instruction, the record comprising a path specifier for indicating a path from a current locus of execution to a basic block corresponding to an in-order position of the selected instruction.