Patent ID: 6153482
Filing Date: 2000-11-28
Classification: H01L

Abstract:
A method for fabricating LOCOS isolation having a planar surface, comprising the steps of:(a) forming a masking layer on the active region of a silicon substrate;(b) anisotropically etching said silicon substrate by using said masking layer as an etching mask, thereby forming a recess;(c) forming a polysilicon spacer on the side walls of said masking layer, said polysilicon spacer further extending said recess;(d) growing a local oxide having an edge-protrusion portion above said recess by thermal oxidation;(e) selectively removing said masking layer to leave a portion of said masking layer serving as a polishing stop layer, and to leave said local oxide having said edge-protrusion portion; and(f) removing said edge-protrusion portion of the local oxide by chemical mechanical polishing, thereby leaving a LOCOS isolation having a planar surface,wherein said edge-protrusion portion of said local oxide is not removed before said removing step (step (f)).