Patent ID: 6090704
Filing Date: 2000-07-18
Classification: H01L

Abstract:
A method for fabricating a semiconductor device comprising the steps of;forming a first interlayer insulating film over a semiconductor substrate;forming a first contact hole by etching said first interlayer insulating film to expose an upper surface of said semiconductor substrate;forming a conductive plug by filling said first contact hole with a conductive layer;sequentially forming a lower adhesion metal layer and a lower electrode over said first interlayer insulating film and said conductive plug;sequentially forming a dielectric film, an upper electrode, an upper adhesion metal layer, and an etch stopping layer over said first interlayer insulating film and said lower electrode;forming a second interlayer insulating film over said first interlayer insulating film and said etch stopping layer;forming second and third contact holes by etching said second interlayer insulating film and said first interlayer insulating film, said second and third contact holes respectively exposing an upper surface of said etch stopping layer and an upper surface of said semiconductor substrate and being spaced from each other; andetching said etch stopping layer beneath said second contact hole to expose an upper surface of said upper adhesion metal layer.