Patent ID: 8112618
Filing Date: 2012-02-07
Classification: G06F,H01L,H04L

Abstract:
1. An integrated circuit comprising: an on-chip boot ROM holding boot code; circuitry designed to perform a function and determined to be inoperable to perform the function; a non-volatile security identification element having non-volatile information that is set in response to determining that the circuitry designed to perform the function is inoperable to perform the function and for determining a less secure type or more secure type; and a processor coupled to the on-chip boot ROM and to the non-volatile security identification element to selectively execute the boot code to disable an attempt to operate the circuitry designed to perform the function depending on the set non-volatile information of the non-volatile security identification element; wherein the information determines a less secure type, and the integrated circuit further comprises a power-on reset input; and the processor responsive to a signal at the power-on reset input to enter secure mode and perform a secure-to-less-secure conversion.