Patent ID: 6579784
Filing Date: 2003-06-17
Classification: H01L

Abstract:
A method for forming a polysilicon/titanium silicon/tungsten gate integrated with a salicide process, comprising the steps of:a. providing a substrate structure having an isolation structure and an active area thereon; b. forming a gate dielectric layer on said substrate structure; c. forming dummy structures, with sidewalls, over said active area by sequentially forming a polysilicon layer, a silicon dioxide layer, and a silicon nitride layer then patterning said silicon nitride layer, said silicon dioxide layer, said polysilicon layer, and said gate dielectric layer; d. implanting impurity ions into said substrate structure to form lightly doped source and drain regions; e. forming silicon oxynitride spacers on said sidewalls of said dummy structures; f. implanting impurity ions into said substrate structure to form source and drain regions; g. forming a silicide layer on said source and drain regions; h. forming a second dielectric layer over said dummy structures; i. planarizing said second dielectric layer, spacers and silicon nitride layer of said dummy structures; j. removing said silicon nitride layer and said silicon dioxide layer of said dummy structures wherein said nitride and silicon dioxide layers are etched selectively to said oxynitride spacers; k. forming a titanium nitride layer over said polysilicon layer of said dummy structure; l. forming a tungsten layer on said titanium nitride layer; and m. planarizing said tungsten layer, said titanium nitride layer, and said spacers to form polysilicon/titanium nitride/tungsten structures.