Patent ID: 6110822
Filing Date: 2000-08-29
Classification: H01L

Abstract:
A method of forming a contact in a thin film transistor with a gate electrode and an interconnect formed on a substrate, in an SRAM device comprising the steps as follows:forming an interconnect and a gate electrode on said substrate said interconnect having a top surface,form a gate oxide layer covering exposed surfaces of said interconnect, said gate electrode and said substrate,forming a first amorphous silicon layer over said gate oxide layer,forming a cap layer over said amorphous silicon layer,forming a contact opening through said cap layer, said first amorphous silicon layer, and said gate oxide layer down to said top surface of said interconnect,said contact opening exposing as follows:a) walls of said cap layer,b) walls of said gate oxide layer, andc) walls of said amorphous silicon layer,selectively forming a contact metal structure filling said contact opening and in contact with said top surface of said interconnect, and said contact metallization being in contact with said walls of said gate oxide layer, said walls of said first amorphous silicon layer and said walls of said cap layer,removing said cap layer from said first amorphous silicon layer in a subtractive process,forming a second amorphous silicon layer on said exposed surfaces of said first amorphous silicon layer and on exposed surfaces of said contact metal structure,recrystallizing said first and said second amorphous silicon layers to form a polysilicon channel layer from said first amorphous silicon layer and said second amorphous silicon layer, anddoping regions of said polysilicon channel layer aside from a channel region above said gate electrode.