Patent ID: 6968305
Filing Date: 2005-11-22
Classification: G06F

Abstract:
1. A method for modeling a physical memory for use in an electronic circuit design, the method comprising: accessing a description of the electronic circuit design; replacing a portion of the description of the electronic circuit design with a lookup table, wherein the portion of the description relates to the physical memory, and wherein the lookup table in the description represents the physical memory, the lookup table including a total number of entries greater than or equal to a total number of memory operations that can occur over a given number of clock cycles, the total number of memory operations being computed by computing a total number of memory operations that can be performed per clock cycle and multiplying the total number of memory operations that can be performed per clock cycle by the given number of clock cycles; and simulating the electronic circuit design using the description, wherein simulating includes modeling a memory write operation of the electronic circuit design using the lookup table and modeling a memory read operation of the electronic circuit design using the lookup table.