Patent ID: 6410462
Filing Date: 2002-06-25
Classification: C23C,H01L

Abstract:
A method of forming a low dielectric constant carbonaceous silicon oxide on a substrate for use in interconnect structures of integrated circuits comprising the steps of:a) positioning a substrate within a plasma enhanced chemical vapor deposition (PECVD) chamber; b) introducing a source of silicon, a source of oxygen, and a source of carbon into the plasma enhanced chemical vapor deposition (PECVD) chamber containing the substrate; c) applying sufficient energy within the plasma enhanced chemical vapor deposition (PECVD) chamber to form plasmas of silicon containing free radicals, oxygen containing free radicals, and carbon containing free radicals within the plasma enhanced chemical vapor deposition (PECVD) chamber; and d) forming the low dielectric constant carbonaceous silicon oxide on the substrate within the deposition chamber, wherein the low dielectric constant carbonaceous silicon oxide has a dielectric constant of less than 4.