Patent ID: 6103564
Filing Date: 2000-08-15
Classification: H01L

Abstract:
A method of fabricating a semiconductor device, wherein a diode is formed in a surface silicon layer of an SOI substrate having a plurality of surface silicon layers isolated by a buried oxide film on a silicon substrate,the forming of said diode comprising the steps of:forming a first conduction type lightly doped region by selectively ion-implanting first conduction type impurity atoms into one end side of said surface silicon layer of said SOI substrate;forming a second conduction type lightly doped region by selectively ion-implanting second conduction type impurity atoms into an other end side of said surface silicon layer;diffusing the impurity atoms in said first conduction type lightly doped region and said second conduction type lightly doped region by heat-treating;forming a first conduction type region by selectively ion-implanting the first conduction type impurity atoms into said surface silicon layer between said first conduction type lightly doped region and said second conduction type lightly doped region;forming a PN junction region by selectively ion-implanting the second conduction type impurity atoms into said first conduction type region to a midpoint thereof in the thickness direction and then heat-treating to provide a second conduction type region on said first conduction type region;forming a silicon oxide film on the whole surface of said surface silicon layer by oxidizing in an oxidizing atmosphere;forming a first conduction type heavily doped region by selectively ion-implanting the first conduction type impurity atoms into a portion of said first conduction type lightly doped region which does not contact said second conduction type region;forming a second conduction type heavily doped region by selectively ion-implanting the second conduction type impurity atoms into a portion of said second conduction type lightly doped region which does not contact said second conduction type region;forming contact holes respectively at locations corresponding to said first conduction type heavily doped region and said second conduction type heavily doped region by photo-etching after forming an insulating film on the whole surface of said surface silicon layer; andforming a metal plate contacting said first conduction type heavily doped region and a metal plate contacting said second conduction type heavily doped region through the respective contact holes.