Patent ID: 6975652
Filing Date: 2005-12-13
Classification: H04J,H04L

Abstract:
1. A system for synchronizing the operation of a transmitter clock and a local reference clock, said system comprising: a transmitter block, said transmitter block for transmitting consecutive synchronization messages, each of said messages having a timestamp, said transmitter block maintaining a transmitter counter having a value, wherein each of said timestamps indicates said value of said counter at successive moments of time; a receiver, coupled to said transmitter block, for receiving said synchronization messages; first and second synchronization registers, coupled to said receiver, said synchronization registers storing said timestamps of said consecutive synchronization messages; a first comparator for comparing values of said first and second synchronization registers to produce a synchronization time period; first and second local reference registers, coupled to a local counter, each of said first and second local reference registers having a value indicative of a local reference counter at successive moments of time; a second comparator, coupled to said first and second local reference registers, said comparator comparing the values of said first and second local registers and determining a local reference time period; and a comparison and clock adjustment block, coupled to said first and second comparators and said local refererence clock, said block comparing said synchronization time period with said local reference time period and then adjusting said local reference clock based upon said comparison.