Patent ID: 6205066
Filing Date: 2001-03-20
Classification: G11C

Abstract:
A method of correcting for a short circuit in a memory device, said method comprising:providing a sense amplifier circuit connected to a column of the memory device for latching a logic state of an addressed memory cell;providing a switchable voltage source circuit having a first output;providing a first conductor line connected between said first output and said sense amplifier circuit; andselectively switching said voltage source circuit between a first voltage and a second voltage, wherein said first voltage is selected when said column is operational and said second voltage is selected when said column has been repaired out,wherein when said first voltage is selected, said first voltage is applied to said sense amplifier circuit and causes said sense amplifier circuit to properly latch said logic state of said addressed memory cell through said column, and wherein when said second voltage is selected, said second voltage is applied to said sense amplifier circuit and prevents said sense amplifier circuit from latching said logic state of said addressed memory cell through said column.