Patent ID: 7859594
Filing Date: 2010-12-28
Classification: G09G

Abstract:
1. A display driving signal processor, comprising: input means for inputting video signal data having a predetermined number of first horizontal pixels, and a first clock having a given period and a predetermined frequency corresponding to the predetermined number of first horizontal pixels, the first clock being synchronized with the video signal data; number-of-horizontal pixels converting means for converting the video signal data inputted by said input means from the number of first horizontal pixels to the number of second horizontal pixels adapted to the number of horizontal pixels which an image displaying portion has; second clock generating means for generating a second clock in accordance with which an inversion interval is variably set based on a ratio of the number of first horizontal pixels to the number of second horizontal pixels, the second clock being to be synchronized with the video signal data after the number of first horizontal pixels is converted into the number of second horizontal pixels and having the inversion interval having a length which is an integral multiple of one period of the first clock; and output means for outputting data signals in accordance with the second clock and the video signal data after the number of first horizontal pixels is converted into the number of second horizontal pixels to said image displaying portion for displaying thereon an image by performing driving so as to scan pixels disposed in matrix at predetermined timing in horizontal and vertical directions, and writing data signals to the corresponding pixels at timing based on the second clock with respect to the horizontal pixel driving.