Patent ID: 7381604
Filing Date: 2008-06-03
Classification: H01L

Abstract:
1. A method of fabricating a strained-channel semiconductor structure, comprising: providing a substrate with an active area thereon, wherein the substrate composed of a first semiconductor material with a first natural lattice constant and the active area is defined by at least one isolation region formed in the substrate; forming at least one first gate stack over the active area, wherein each first gate stack comprises a gate dielectric layer, a gate electrode layer, and a mask layer sequentially stacked over a portion of the substrate therein; etching the substrate to form a plurality of recesses in the substrate adjacent to the first gate stack; filling each recess with a second semiconductor material comprising a second natural lattice constant rather than the first natural lattice constant as a lattice-mismatched zone; and removing the mask layer of each first gate stack to leave at least one second gate stack over the substrate and a pair of adjacent lattice-mismatched zones thereof in the substrate in the active area, wherein each lattice-mismatched zone has an inner side and an outer side corresponding to the adjacent second gate stack and the outer side of one of the lattice-mismatched zones on each end of the active area is spaced substantially apart from the isolation region by the first semiconductor material of the substrate.