Patent ID: 6989600
Filing Date: 2006-01-24
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device, comprising: a semiconductor substrate which has a main surface, a back surface opposing the main surface, an integrated circuit formed on the main surface, a plurality of first wirings formed over the main surface, the plurality of first wirings being electrically connected to the integrated circuit through a plurality of first through holes, a plurality of first connection terminals formed over the plurality of first wirings, the plurality of first connection terminals being electrically connected to the integrated circuit through the plurality of first through holes and the plurality of first wirings, and a first alignment mark consisting of part of the first wirings; and a glass substrate which has a main surface, a back surface opposing the main surface, a plurality of second wirings formed over the main surface, a plurality of second connection terminals formed over the first wirings, and a plurality of external connection terminals formed over the back surface, the plurality of second connection terminals being electrically connected to the plurality of external connection terminals through a plurality of second through holes and the plurality of second wirings, a second alignment mark consisting of part of the second wirings, and the second alignment mark overlapping with the first alignment mark in a plane view, wherein the semiconductor substrate and the glass substrate are arranged so that the main surface of the semiconductor substrate and the main surface of the glass substrate are in face-to-face relation, the integrated circuit of the semiconductor substrate is electrically connected to the plurality of external connection terminals through the plurality of first connection terminals and the plurality of second connection terminals, a width of the second wirings is wider than a width of the first wirings, a diameter of the second through holes is larger than a diameter of the first through holes, and a sealing resin is filled in the space between the main surface of the semiconductor substrate and the main surface of the glass substrate.