Patent ID: 6495896
Filing Date: 2002-12-17
Classification: H01L

Abstract:
A semiconductor integrated circuit device comprising:a semiconductor substrate of a first conductive type; a first semiconductor region which is formed on said semiconductor substrate and which includes an impurity of a second conductive type; a second annular semiconductor region which is formed on said semiconductor substrate and which includes an impurity of the second conductive type; a third embedded semiconductor region which is formed in a region surrounded by said second annular semiconductor region and which includes an impurity of the second conductive type; a fourth embedded semiconductor region which is formed on said semiconductor substrate and which includes an impurity of the second conductive type; a fifth semiconductor region which is formed above said third embedded semiconductor region and which includes an impurity of the first conductive type; a sixth semiconductor region which is formed above said fourth embedded semiconductor region and which includes an impurity of the first conductive type; and a transistor formed in said first, fifth and sixth semiconductor regions.