Patent ID: 8970639
Filing Date: 2015-03-03
Classification: G09G,H03M

Abstract:
1. A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code, comprising: a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage, the one-bit serial charge redistribution digital-to-analog converter including: a first capacitor coupled between a first capacitor charging node and the low reference voltage input node; a termination capacitor coupled between a charge collection node and the low reference voltage input node; a first switching circuit for selectively coupling the first capacitor charging node to one of the low reference voltage input node and the high reference voltage input node during first capacitor charge cycles in response to instances of a one-bit control code from a sequence of one-bit control codes derived from the M-bit digital input code; and a second switching circuit for coupling the first capacitor charging node to the charge collection node during charge redistribution cycles that follow the first capacitor charge cycles for charge redistribution with the termination capacitor; and a voltage selector, the voltage selector setting the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.