Patent ID: 6609177
Filing Date: 2003-08-19
Classification: G06F

Abstract:
An apparatus comprising:a cache comprising a number n of cache entries, each of the cache entries having cache entry address information; and a cache extender comprising a number m of extender entries, each extender entry comprising an extender address portion and an extender auxiliary portion, wherein each extender address portion has extender entry address information, and wherein the cache entry address information of each of the n cache entries relates to the extender entry address information of one among the m extender address portion, and wherein a storage area of an underlying level of a memory hierarchy is related to the extender entry address information of each of the m extender address portions, wherein each of the m extender auxiliary portions has historical information, the historical information relating at least in part to requests for access to locations within the storage area related to the extender entry address information of the corresponding extender address portion, and wherein the m extender auxiliary portions comprise historical information relating to requests for access to locations within the storage area no longer having corresponding entries in the cache.