Patent ID: 9099956
Filing Date: 2015-08-04
Classification: H03B,H03C,H03F

Abstract:
1. A method comprising: inputting a reference signal through an injection circuit of an oscillator circuit that generates an output signal configured to oscillate at an inherent frequency of oscillation thereof, a power of the output signal being higher than a power of the reference signal; dividing a frequency of the reference signal through a differential transistor pair coupled to the injection circuit of the oscillator circuit; providing a capability to decrease an area of a circuit comprising the oscillator circuit through doubling an operating frequency of a previous stage of the oscillator circuit in accordance with the division of the frequency of the reference signal; locking, through a tuning circuit of the oscillator circuit coupled to the differential transistor pair, a frequency of the output signal to the divided frequency of the reference signal based on the power of the reference signal to amplify the power of the reference signal through the oscillator circuit, the frequency of the reference signal being higher than the frequency of the output signal, and the locking being based on superharmonic injection-locking, thereby enabling use of the frequency division based superharmonic injection-locked oscillator circuit as a power amplifier outputting a power of less than 10 dBm and providing a gain of around 30 dB; choosing sizes of transistors of the differential transistor pair based on a tradeoff between requirements for an output power of the power amplifier, an operating frequency thereof and an achievable power efficiency; designing transconductances of the transistors to overcome losses in at least one of: the tuning circuit and a load in parallel therewith that is coupled to an output of the oscillator circuit; and fully integrating components of the frequency division based superharmonic injection-locked oscillator circuit within a circuit chip.