Patent ID: 8026543
Filing Date: 2011-09-27
Classification: H01L

Abstract:
1. A semiconductor memory device comprising: a semiconductor substrate; a molding layer disposed over the semiconductor substrate, the molding layer having a top surface, and a protrusion extending vertically from the top surface; a phase-changeable material pattern having one portion thereof overlying the protrusion of the molding layer, and another portion thereof extending through the protrusion of the molding layer; and an oxidation barrier comprising electrically insulative material covering the phase-changeable material pattern and the protrusion of the molding layer, wherein the oxidation barrier comprises a lower oxidation barrier spacer of electrically insulative material that extends along and covers a sidewall of the phase-change material pattern and a sidewall of the protrusion portion, an upper oxidation barrier layer of electrically insulative material, and a stress-alleviating buffer layer sandwiched between opposing surfaces of the lower oxidation barrier spacer and the upper oxidation barrier layer.