Patent ID: 6221783
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A method of manufacturing a heterojunction dipole device, comprising the steps of:forming sequentially a buffer layer, a subcollector layer, a collector layer, a base layer, an emitter layer and an emitter cap layer on a semiconductor substrate;forming an emitter electrode on a selected region of said emitter cap layer;performing etching process for forming a pattern by exposing said selected region of said base layer, and forming a polyimide layer on both side walls of the patternized emitter cap layer and said emitter layer;forming a base electrode on a selected region of said exposed base layer;performing etching process for forming a pattern by exposing some portions of said collector layer, and then forming a p-SiN film on both side walls of said patterned base layer and some portions of the collector layer;exposing some portions of said collector layer, etching the remaining collector layer and some portions of said subcollector layer with a inward slope, and then forming a collector electrode at a selected region of the remaining subcollector layer; andperforming a thermal treatment process to make some of said collector layer and said subcollector layer into an insulating region.