Patent ID: 6720605
Filing Date: 2004-04-13
Classification: H01L

Abstract:
A semiconductor device structure, comprising:a semiconductor substrate including at least one active device region; a stacked capacitor structure disposed above said semiconductor substrate, including a portion that extends substantially over at least one transistor gate and includes at least one oxidized lateral edge that extends substantially to an edge of an interconnect location and is in electrical isolation from said interconnect location; and a first interconnect element comprising aluminum extending adjacent said at least one lateral edge of said stacked capacitor structure and in electrical communication with said at least one active device region through a second interconnect element comprising a metal silicide, said at least one active device region being substantially covered by said second interconnect element and at least a side wall spacer of said transistor gate; and at least one bit line formed from the same aluminum-comprising material as said first interconnect element and extending over said stacked capacitor structure, said at least one bit line and said first interconnect element comprising a unitary structure with no discernable boundary being located between said first interconnect element and said at least one bit line.