Patent ID: 6391683
Filing Date: 2002-05-21
Classification: H01L

Abstract:
A semiconductor package fabrication process, comprising the steps of:(1) preparing a substrate having a center area predefined as a die-bonding area; (2) forming a metal dam around the die-bonding area over the substrate, the metal dam being dimensioned to a predetermined thickness of from 5 &mgr;m to 70 &mgr;m and separated from the die-bonding area by a fillet area of a predetermined fillet width of from 0.5 mm to 2.5 mm; (3) mounting a semiconductor chip onto the die-bonding area over the substrate through flip-chip technology, and in which process a gap is undesirably left between the semiconductor chip and the substrate; and (4) dispensing an underfill material onto the fillet area, the dispensed underfill material subsequently filling into the gap between the semiconductor chip and the substrate through capillary action, thereby forming an underfill layer having a fillet part over the fillet area, with the width of the fillet part being substantially equal to the predetermined width of the fillet area.