Patent ID: 8120948
Filing Date: 2012-02-21
Classification: G11C,H01L

Abstract:
1. A magnetic memory comprising: a plurality of memory cells each including a magnetoresistive effect element which comprises a first magnetic layer having an invariable magnetizing direction, a second magnetic layer having a variable magnetizing direction, and a tunnel barrier layer provided between the first magnetic layer and the second magnetic layer; and a write circuit which includes a write current generation circuit that generates a write current to change the magnetizing direction of the second magnetic layer, which includes a control circuit which controls an operation of the write current generation circuit, the control circuit comprising an inverter comprising a p-channel field-effect transistor and an n-channel field-effect transistor, the p-channel field-effect transistor having a driving force smaller than a driving force of the n-channel field-effect transistor, and which flows the write current through the magnetoresistive effect element bidirectionally, wherein the write circuit flows the write current in which a falling period from the start of a falling edge to the end of the falling edge is longer than a rising period from the start of a rising edge to the end of the rising edge, wherein the rising period of the write current is controlled based on a response speed associated with the driving force of the n-channel field-effect transistor, and the falling period of the write current is controlled based on a response speed associated with the driving force of the p-channel field-effect transistor.