Patent ID: 8946016
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A method comprising: forming a substrate; forming a PMOS transistor on the substrate, wherein the PMOS transistor comprises a first gate structure disposed on a first channel and first stressor, wherein the first stressor comprises an epitaxial source and drain film, and first sidewall spacers disposed adjacent the first gate structure; forming an NMOS transistor on the substrate, wherein the NMOS transistor comprises a second gate structure disposed on a second channel, a second stressor disposed on the second gate and second sidewall spacers adjacent the second gate structure; forming a first trench in the first gate structure of the PMOS transistor; forming a second trench in the second gate structure of the NMOS transitor; forming a high-k gate dielectric in the first trench and the second trench; forming an n-type work function material on the high-k gate dielectric disposed in the first trench and the second trench; and forming a second metal gate in the second trench.