Patent ID: 6532560
Filing Date: 2003-03-11
Classification: G01R

Abstract:
Internal clock generating circuitry comprising:a phase comparator for comparing the phase of a clock signal applied thereto from outside the circuitry with that of a feedback signal fed back thereto, and for generating a voltage corresponding to the difference between the phases of those clock signals; a voltage-controlled oscillator or VCO for generating a clock signal having a frequency corresponding to the voltage from said phase comparator; a normal clock signal generating circuit for generating at least one normal clock signal used for making an internal circuit operate under normal conditions from the clock signal from said VCO, and for generating and feeding the feedback signal back to said phase comparator; a test VCO for generating a clock signal having a frequency corresponding to the voltage from said phase comparator; a test clock signal generating circuit for generating at least one test clock signal used for testing said internal circuit from the clock signal from said test VCO; a selector for selecting either said normal clock signal generated by said normal clock signal generating circuit or said test clock signal generated by said test clock signal generating circuit, and for furnishing the selected clock signal to said internal circuit; and a control signal generating circuit for generating a control signal to stop said test VCO according to an input signal applied thereto from outside the circuitry.