Patent ID: 7414312
Filing Date: 2008-08-19
Classification: G11C,H01L,H05K,Y02P

Abstract:
1. A multi-type memory module substrate board comprising: a substrate board, the substrate board being a multi-layer printed-circuit board (PCB) substrate; an edge connector having connector pads for mating with metal connectors in a memory module socket on a motherboard, the connector pads including data pads; a plurality of chip pairings on the substrate board that each drive different data groups of data pads in the edge connector, each chip pairing comprising: a first multi-type footprint on a front side of the substrate board, the first multi-type footprint having a size to accept a first memory chip; wherein the first memory chip has a first data width when a first type of memory module is being assembled from the multi-type memory module substrate board, and has a second data width when a second type of memory module is being assembled from the multi-type memory module substrate board; wherein the second data width is larger than the first data width; first solder pads surrounding the first multi-type footprint, the first solder pads for forming solder connections to metal leads of the first memory chip during assembly; first wiring traces formed on or within the substrate board, the first wiring traces connecting a first data group of the first solder pads to a first data group of the connector pads in the edge connector; second wiring traces formed on or within the substrate board, the second wiring traces connecting a second data group of the first solder pads to a second data group of the connector pads in the edge connector; a second multi-type footprint on a back side of the substrate board, the second multi-type footprint having a size to accept a second memory chip; second solder pads surrounding the second multi-type footprint, the second solder pads for forming solder connections to metal leads of the second memory chip during assembly; first cross-over wiring traces formed on or within the substrate board, the first cross-over wiring traces connecting a first data group of the second solder pads to the second data group of the connector pads in the edge connector; and second cross-over wiring traces formed on or within the substrate board, the second cross-over wiring traces connecting a second data group of the second solder pads to the first data group of the connector pads in the edge connector; wherein when the first and second memory chips each have the first data width, the first memory chip drives data onto the first data group in the edge connector but does not drive data onto the second data group in the edge connector, and the second memory chip drives data onto the second data group in the edge connector but does not drive data onto the first data group of in the edge connector; wherein when the first and second memory chips each have the second data width, the first memory chip drives data onto the first data group in the edge connector and drives data onto the second data group of in the edge connector in response to a first chip-select signal, and the second memory chip drives data onto the first data group in the edge connector and drives data onto the second data group of in the edge connector in response to a second chip-select signal; wherein the first and second chip-select signals are activated on different access cycles for memory chips having the second data width, whereby the multi-type memory module substrate board is assembled into the first type of memory module when the first and second memory chips have the first data width, and into the second type of memory module when the first and second memory chips have the second data width.