Patent ID: 6569770
Filing Date: 2003-05-27
Classification: H01L

Abstract:
A method of forming a metal plug in the fabrication of an integrated circuit device comprising:depositing an oxide layer overlying a semiconductor substrate and planarizing said oxide layer; depositing a silicon nitride layer overlying said oxide layer; etching a plug opening through said silicon nitride layer and said oxide layer; depositing a barrier metal layer overlying said silicon nitride layer and within said plug opening; depositing a metal layer overlying said barrier metal layer wherein said metal layer is tungsten or aluminum; and polishing away said metal layer and said barrier metal layer with a polish stop at said silicon nitride layer whereby said metal layer forms said metal plug within said plug opening and wherein said silicon nitride layer prevents erosion of said oxide layer during said polishing step to complete said formation of said metal plug in the fabrication of said integrated circuit device.