Patent ID: 6042887
Filing Date: 2000-03-28
Classification: C23C,H01L,Y10S

Abstract:
A method of fabricating an insulating layer over a semiconductor structure comprising the sequential steps:a) cleaning said chamber walls of said reactor and depositing a coating film composed of silicon oxide on chamber walls of a reactor;b) loading the semiconductor structure into said reactor;c) depositing a first insulating layer composed of silicon oxide oversaid semiconductor structure; said first insulating layer is formed by a SAUSG O.sub.3 -TEOS process comprising: a ratio of O.sub.3 to TEOS between about 1:10 and 5:10; flow rate of reactant-TEOS between 2000 and 4000 sccm; a O.sub.2 flow rate between 3000 and 5000 sccm; a pressure between 100 and 600 torr; a O.sub.3 concentration between 9% and 15%; a temperature between 300 and 500.degree. C.; andsaid first insulating layer has a refractive index (Ri) between 1.43 and 1.47 and film tensile stress between about +1.5E9 and 3.85E9 dyne/cm.sup.2 ;d) removing said semiconductor structure from said reactor; ande) etching an opening through at least said first insulating layer whereby said coating film improves the etch uniformity of said first insulating layer.