Patent ID: 8604851
Filing Date: 2013-12-10
Classification: H03L

Abstract:
1. An apparatus of a digital Phase Locked Loop (PLL) in a wireless communication system, the apparatus comprising: a Digitally Controlled Oscillator (DCO) configured to generate a frequency signal based on an input Digital Tuning Word (DTW); a divider configured to divide the frequency signal at an integer ratio; a Phase Frequency Detector (PFD) configured to generate a signal representing a phase difference between a divided frequency signal and a reference signal; a Time to Digital Converter (TDC) configured to measure a time interval of the phase difference using the signal representing the phase difference; a delay comparator configured to calculate a time interval when rising edges coincide from values measured by the TDC; and a level scaler configured to generate a DTW that operates the DCO using a digital code representing the time interval.