Patent ID: 8815659
Filing Date: 2014-08-26
Classification: H01L

Abstract:
1. A method of forming a FinFET device comprised of at least one fin structure and a plurality of source/drain structures, the method comprising: forming a masking layer having an initial thickness above a semiconducting substrate, said masking layer exposing a first exposed region of said semiconducting substrate where said at least one fin structure will be formed and a plurality of second exposed regions where said plurality of source/drain structures will be formed; with said masking layer in position, performing an epitaxial growth process to form a layer of semiconducting material on said first and second exposed regions of said semiconducting substrate to thereby form said at least one fin structure and said plurality of source/drain structures; performing a chemical mechanical planarization process to planarize an upper surface of said layer of semiconducting material with an upper surface of said masking layer; after performing said chemical mechanical planarization process, performing a process operation to reduce said initial thickness of said masking layer; forming a gate insulation layer around at least a portion of said at least one fin structure; and forming a gate electrode above said gate insulation layer.