Patent ID: 8415663
Filing Date: 2013-04-09
Classification: G01R,H01L

Abstract:
1. A test structure for testing an integrated circuit, wherein the test structure and the integrated circuit are manufactured on a same substrate material and the testing being conducted is in a temperature-controlled environment, the test structure comprising: a top structure positioned above the integrated circuit, the top structure being characterized by a first surface area, the top structure including a first metal material occupying less than 60% of the first surface area; a bottom structure positioned below the integrated circuit, the bottom structure being characterized by a second surface area, the bottom structure including a first silicon material, the first silicon material occupying substantially all of the second surface area; a first side structure positioned between the top structure and the bottom structure and located next to a first side of the integrated circuit, the first side structure being characterized by a first height, the first side structure including a second metal material; and a second side structure positioned between the top structure and the bottom structure and located next to a second side of the integrated circuit, the second side structure being characterized by a second height, the second side structure including a third metal material; wherein the top structure and the bottom structure are not physically and electrically connected to each other.