Patent ID: 8117497
Filing Date: 2012-02-14
Classification: G06F

Abstract:
1. A method of detecting and correcting soft-error upsets within an integrated circuit, the method comprising: installing a plurality of check stops into a source code definition of a processor executable application; executing the processor executable application, the plurality of check stops of the processor executable application being executed at programmable time intervals; collecting state information related to the integrated circuit in response to execution of each of the plurality of check stops; wherein collecting state information includes collecting configuration data that defines functionality in programmable resources and that defines circuit connections in programmable interconnect of the integrated circuit; halting the processor executable application in response to an interrupt, the interrupt being generated in response to detecting a soft-error upset; correcting the soft-error upset; and reinstating execution of the processor executable application, wherein execution is reinstated with state information collected during one of the executed plurality of check stops.