Patent ID: 9129857
Filing Date: 2015-09-08
Classification: H01L

Abstract:
1. A semiconductor device comprising: horizontal patterns stacked on a substrate, a first core pattern in the at least one opening; a second core pattern in the at least one opening on the first core pattern; a first active pattern between the first core pattern and the first conductive pattern; a first gate dielectric pattern between the first active pattern and the first conductive pattern; a second active pattern between the second core pattern and the second conductive pattern; and a second gate dielectric pattern between the second active pattern and the second conductive pattern, the second active pattern containing a first element at a higher concentration than a concentration of the first element in the first active pattern, wherein each of the first and second gate dielectric patterns includes a first dielectric layer, a second dielectric layer and a third dielectric layer, wherein the first and second core patterns are formed of an insulating material.