Patent ID: 7176530
Filing Date: 2007-02-13
Classification: H01L

Abstract:
1. A structure comprising: an n-channel surface-channel insulated-gate field-effect transistor (“SCIGFET”) comprising a pair of laterally separated n-type source/drain zones situated in a semiconductor body along a major surface thereof, a p-type channel zone situated between the n-channel SCIGFET's source/drain zones in the semiconductor body along its major surface, a gate electrode situated over the channel zone of the n-channel SCIGFET and extending partially over its source/drain zones, and a gate dielectric layer separating the gate electrode of the n-channel SCIGFET from its source/drain and channel zones; and a normally off n-channel channel-junction insulated-gate field-effect transistor (“CJIGFET”) comprising a pair of laterally separated n-type source/drain zones situated in the semiconductor body along its major surface, an n-type channel zone extending between the n-channel CJIGFET's source/drain zones in the semiconductor body along its major surface and more lightly doped than the n-channel CJIGFET's source/drain zones, a gate electrode situated over the channel zone of the n-channel CJIGFET and extending partially over its source/drain zones, and a gate dielectric layer separating the gate electrode of the n-channel CJIGFET from its source/drain and channel zones, the gate dielectric layer of the n-channel CJIGFET being materially thicker than the gate dielectric layer of the n-channel SCIGFET.