Patent ID: 6017816
Filing Date: 2000-01-25
Classification: H01L,Y10S

Abstract:
A method of fabricating notching-free metal interconnection line, said method comprising the steps of:(a) forming field oxide regions on a semiconductor silicon wafer;(b) forming electrical elements on the predetermined area of said semiconductor silicon wafer;(c) forming a barrier layer overlaying entire silicon wafer;(d) sequentially forming a metal layer and an anti-reflection layer overlaying said barrier layer in a single chamber, wherein said metal layer is selected from the group consisting of Al--Cu and Al--Si--Cu alloys, and said anti-reflection layer is aluminum nitride (AlN);(e) forming a photoresist pattern by lithography technique;(f) partially etching said barrier layer, said metal layer and said anti-reflection layer to form the metal interconnection lines; and(g) stripping said photoresist pattern.