Patent ID: 8935485
Filing Date: 2015-01-13
Classification: G06F

Abstract:
1. An apparatus for processing data comprising: a plurality of transaction sources, each of said plurality of transaction sources having a local cache memory; a shared cache memory coupled to said plurality of transaction sources and configured to operate in a non-inclusive mode, said shared cache memory storing shared cache tag values tracking which cache lines of data are stored in said shared cache memory; and snoop filter circuitry configured to store snoop filter tag values for tracking which cache lines of data are stored in said local cache memories; wherein in response to a transaction request to a target cache line of data having a target tag value: (i) said shared cache memory is configured to compare said target tag value with said shared cache tag values to detect if said target cache line of data is stored in said shared cache memory; and (ii) said snoop filter circuitry is configured to compare said target tag value with said snoop filter tag values to detect if said target cache line of data is stored in any of said local cache memories, wherein said shared cache memory and said snoop filter circuit are configured to atomically change a tag value between being stored as a snoop filter tag value in said snoop filter circuitry and being stored as a shared cache tag value in said shared cache memory to follow a change in storage location of a corresponding cache line of data between said local cache memories and said shared cache memory.