Patent ID: 6420226
Filing Date: 2002-07-16
Classification: H01L

Abstract:
A method of fabricating a buried stack capacitor structure on a semiconductor substrate, comprising the steps of:forming a composite insulator layer on said semiconductor substrate; forming a shallow trench shape in said composite insulator layer and in a top portion of said semiconductor substrate; filling said shallow trench shape with an insulator layer, resulting in a shallow trench isolation (STI) region; performing a dry etch patterning procedure removing a top portion of said insulator layer from a peripheral area in said STI region exposing bare semiconductor sidewalls in a top portion of said STI region, while said insulator layer residing in center of said STI region remains unetched, resulting in a ring shaped storage node opening in said STI region comprised of unetched insulator layer in center of STI region, and a partially etched insulator layer residing at the periphery in said STI region; laterally removing portions of said composite insulator layer located adjacent to said ring shaped storage node opening exposing a portion of said semiconductor substrate, and creating a bare semiconductor substrate region at a junction formed by the bare semiconductor sidewalls in a top portion of said STI region, and by the region of bare semiconductor substrate created after lateral removal of portions of said composite insulator layer; forming heavily doped regions in said bare semiconductor substrate region; forming a storage node structure in said ring shaped storage node opening, with first portions of said storage node structure horizontally overlying unetched bottom portions of said STI region as well as vertically overlying sides of said unetched portion of said STI region, and with second portions of said storage node structure vertically and horizontally overlying said heavily doped regions in said semiconductor substrate; forming a capacitor dielectric layer on said storage node structure; forming an upper plate structure resulting in said buried stacked capacitor structure comprised of said upper plate structure, said capacitor dielectric layer, and said storage node structure; and forming a composite insulator spacer on the sides of said buried stack capacitor structure.