Patent ID: 6549460
Filing Date: 2003-04-15
Classification: G06F

Abstract:
A nonvolatile memory system comprising:a controller; and a nonvolatile memory comprising an error correcting circuit and a data storage portion including a plurality of nonvolatile memory cells, wherein said controller supplies a first request for outputting data stored in said data storage portion to said nonvolatile memory, wherein said nonvolatile memory receives said first request from said controller and reads out data corresponding to said first request from said data storage portion, and wherein said nonvolatile memory enables outputting of said read out data and checking, in parallel thereto, whether said read out data is correct or not using said error correcting circuit, and when an error in said read out data is detected by said error correcting circuit, said nonvolatile memory outputs a first status signal to said controller indicative of said read out data already sent from said nonvolatile memory including said error.