Patent ID: 7897441
Filing Date: 2011-03-01
Classification: H01L

Abstract:
1. A method of fabricating a CMOS image sensor, comprising: forming an epitaxial layer on a semiconductor substrate, the epitaxial layer comprising a pixel area including a plurality of photodiodes and a logic area including a plurality of devices capable of performing signal processing; forming a shallow trench isolation (STI) layer in the epitaxial layer; forming a plurality of wells in the epitaxial layer having the STI layer and forming a gate pattern having a spacer on the epitaxial layer having the STI layer; forming a plurality of source and drain regions in the epitaxial layer using an ion implantation process; forming a salicide blocking layer on the epitaxial layer and gate pattern in the pixel area in order to prevent salicidation in the pixel area; forming a plurality of silicide layers in the logic area by performing a silicidation process on the logic area; sequentially forming a pre-metal dielectric (PMD) liner nitride layer and a phosphosilicate glass (PSG) layer on the salicide blocking layer in the pixel area and the epitaxial layer and the gate pattern in the logic area; and forming a plurality of contacts from a surface of the PSG layer to the plurality of source and drain regions.