Patent ID: 6509229
Filing Date: 2003-01-21
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device on a semiconductor substrate, comprising:forming a multi-layer structure on a gate dielectric layer on the semiconductor substrate; forming a first sidewall spacer around said multi-layer structure and on the gate dielectric layer; forming a source and a drain in the semiconduct substrate; forming a second sidewall spacer around said first sidewall spacer and said gate dielectric layer over said formed source and said formed drain in the semiconductor substrate; forming a dielectric layer over the semiconductor substrate, including said multi-layer structure and said second sidewall spacer, said dielectric layer in contact with said multi-layer structure and said second sidewall spacer; forming an opening in said dielectric layer to expose a portion of a region on the semiconductor substrate adjacent said multi-layer structure; and filling said opening with a conductive material.