Patent ID: 8274808
Filing Date: 2012-09-25
Classification: G11C

Abstract:
1. A semiconductor signal processing apparatus, comprising: an operator cell array including a plurality of operator cells arranged in rows and columns, each including first and second SOI transistors coupled in series to each other, and supplying currents each showing a result of an arithmetic operation between data items stored in the first and second transistors, wherein the operator cells are arranged such that the first and second cells disposed to be aligned in a row direction form a storage unit, wherein the operator cell array includes a plurality of data entries capable of storing therein respective data patterns having different pattern lengths, and wherein mutually complementary to-be-retrieved data is stored in the first and second transistors of the storage unit, the semiconductor signal processing apparatus further comprising: a plurality of bit lines disposed correspondingly to the individual columns of the operator cells to receive the respective currents supplied from the operator cells in the corresponding columns; a row select/drive circuit for writing, during a retrieving operation, retrieval data to the second transistors of a selected one of the data entries, and selecting the first and second transistors of the selected data entry to allow currents according to data items stored in the selected first and second transistors to flow to the corresponding bit lines; a plurality of sense amplifier circuits provided correspondingly to the individual bit lines to supply currents according to the respective currents on the corresponding bit lines; and current detection/match determination circuits each disposed according to a pattern length that can be stored in the selected data entry to determine a match/mismatch between data stored in the selected data entry and the retrieval data based on the currents supplied from the sense amplifier circuits for the corresponding data pattern length on a per pattern-length basis, and generate a signal showing a pattern match/mismatch between the data stored in the selected data entry and the retrieval data based on a result of the determination.