Patent ID: 6043532
Filing Date: 2000-03-28
Classification: H01L

Abstract:
A DMOS transistor formed in a substrate and comprising:a first region having a first type of conductivity and delimited by a major surface of the substrate;a second region forming a body region having a second type of conductivity extending into the first region from the major surface and forming with the first region a junction having at least one edge portion with a relatively small radius of curvature in top, plan section;a third region having the first type of conductivity extending from the major surface into the second region and delimiting a channel with the at least one edge portion of the second region;a fourth region having the second type of conductivity and extending from the major surface to contact the second region;a first electrode which is electrically insulated from the major surface and which overlies the channel;a second electrode forming a source electrode which is in electrical contact with the third region and with the fourth region on the major surface;a third electrode which is in electrical contact with the first region; anda fifth region having the second type of conductivity and extending from the major surface into the second region in a position such as to be closer to an associated at least one edge portion with the relatively small radius of curvature formed by the junction of the second region and extending into the body region than any part of the third region, wherein said second electrode is in electrical contact with the fifth region on the major surface, such that no portion of the third region between the fifth region is connected to the second electrode and first electrode in the region of the edge portion having the relatively small radius of curvature.