Patent ID: 6326671
Filing Date: 2001-12-04
Classification: H01L

Abstract:
A semiconductor memory device, comprising:a semiconductor substrate including a transistor;a first protective insulating film for covering the semiconductor substrate;at least one data storage capacitor element formed on the first protective insulating film;a second protective insulating film for covering the first protective insulating film and the capacitor element;a hydrogen barrier layer; andan interconnection layer for electrically connecting the transistor and the capacitor element,wherein:the capacitor element includes a lower electrode formed on the first protective insulating film, a capacitor film formed on the lower electrode, and an upper electrode formed on the capacitor film,the capacitor film includes an insulating metal oxide,the second protective insulating film has a first contact hole reaching the upper electrode, a second contact hole reaching the lower electrode and a third contact hole reaching the transistor via the first protective insulating film, andthe hydrogen barrier layer is provided in the first and second contact holes, so as not to expose the upper and the lower electrodes, whereas the hydrogen barrier layer is not provided in the third contact hole, such that the transistor is exposed.