Patent ID: 8653633
Filing Date: 2014-02-18
Classification: H01L,Y10T

Abstract:
1. A semiconductor device package, comprising: a substrate including an upper surface, a lower surface, a lateral surface disposed adjacent a periphery of the substrate and extending between the upper surface and the lower surface of the substrate, and a grounding element being a via disposed adjacent the periphery of the substrate, the grounding element being electrically connected to a grounding electrical interconnect in the substrate, being electrically exposed adjacent the lateral surface of the substrate, and partially extending between the upper surface and the lower surface of the substrate, such that a height of the grounding element is less than a thickness of the substrate; a package body disposed adjacent the upper surface of the substrate, the package body including exterior surfaces that include a lateral surface, the lateral surface of the package body being substantially coplanar with the lateral surface of the substrate; and an electromagnetic interference shield disposed adjacent the exterior surfaces of the package body and electrically connected to the grounding element.