Patent ID: 6038635
Filing Date: 2000-03-14
Classification: G06F

Abstract:
A microcomputer containing a flash EEPROM therein, said microcomputer comprisingan electrically erasable and programmable read-only memory (called an ""EEPROM""),a read-only memory (called a ""ROM"") storing a program indicating an erase and write procedure for said EEPROM, anda central processing unit (called a ""CPU""),said CPU executing an erase and write control program stored in said EEPROM (called a ""boot program"") and a program stored in said ROM to enable it to erase and write said EEPROM, whereinsaid microcomputer further comprises a switching means for switching under control of said CPU between placing either one of said EEPROM or said ROM on a memory space and placing both said EEPROM and said ROM on the same memory space, andan arrangement in which the address for a region for storing said boot program does not overlap an address for a region of said ROM,said CPU being switched among a state where it executes only a program in said EEPROM, a state where it can directly and bidirectionally moves between said boot program and a program stored in said ROM, and a state where it executes only the program stored in said ROM, thereby erasing and writing the EEPROM.