Patent ID: 7618885
Filing Date: 2009-11-17
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device having recess gates, comprising: providing a semiconductor substrate having an isolation region and an active region defined by the isolation region; forming a mask film pattern on the semiconductor substrate, the mask film pattern comprising (a) a first mask region extending partially across the active region and across a first edge of the active region, thereby overlapping a portion of the active region and a portion of the isolation region, and (b) a second mask region extending partially across the active region and across a second edge of the active region, thereby overlapping a portion of the active region and a portion of the isolation region; performing an etching process using the mask film pattern as a mask, thereby forming a first trench in the first mask region and a second trench in the second mask region, the first trench extending partially across the active region and across the first edge of the active region, thereby overlapping a portion of the active region and a portion of the isolation region and the second trench extending partially across the active region and across the second edge of the active region, thereby overlapping a portion of the active region and a portion of the isolation region; forming a gate insulation film on the semiconductor substrate of the active region, including the first and second trenches; forming a first gate line disposed on the gate insulation film, the first gate line extending across the active region and overlapping the first trench; and forming a second gate line disposed on the gate insulation film, the second gate line extending across the active region and overlapping the second trench; wherein: