Patent ID: 7822916
Filing Date: 2010-10-26
Classification: G11C

Abstract:
1. An integrated circuit device, comprising: a lookup circuit configured to generate multiple active match signals in response to detecting multiple matches between a search operand applied to said lookup circuit during a search operation and entries stored within said lookup circuit; and a priority sequencer circuit electrically coupled to said lookup circuit, said priority sequencer circuit configured to sequentially encode each of the multiple active match signals according to priority, wherein said priority sequencer circuit comprises: a match signal register configured to generate a plurality of pre-encoded match vectors in response to the multiple active match signals generated by said lookup circuit, wherein each of the plurality of pre-encoded match vectors indicates one or more matches between the search operand and the entries stored within said lookup circuit; a priority encoder configured to generate a first plurality of encoded match vectors by selectively filtering the plurality of pre-encoded match vectors based on a priority associated with each of the one or more matches; and an output register configured to sequentially latch a second plurality of encoded match vectors at first outputs thereof in response to the first plurality of encoded match vectors, wherein each of the second plurality of encoded match vectors indicates a match between the search operand and a respective one of the entries stored within said lookup circuit.