Patent ID: 7633147
Filing Date: 2009-12-15
Classification: H01L,H05K,Y02P

Abstract:
1. A semiconductor module comprising: a module substrate comprising a connector and intra-module wires connected to said connector, said module substrate having a main surface and a back surface; and a plurality of semiconductor units being mounted on the main surface and the back surface of said module substrate, respectively, said plurality of semiconductor units being connected to said intra-module wires, each of said semiconductor units having two device terminals every one input/output signal, each of said semiconductor units comprising: a laminated substrate comprising at least two wiring layers which include a signal wiring layer and a power-supply or ground wiring layer, said laminated substrate having a main surface; and a semiconductor chip having an input/output pad and being mounted on the main surface of said laminated substrate through said input/output pad, said two device terminals being mounted on said laminated substrate and being connected to both ends of a signal wire in said signal wiring layer, said signal wire being connected to the input/output pad of said semiconductor chip through a via hole, one pair of said two device terminals in two semiconductor units disposed on the main surface and the back surface of said module substrate opposite to each other being connected to each other through a via hole, another pair of said two device terminals in the two semiconductor units disposed on the main surface and the back surface of said module substrate opposite to each other being connected to said connector through intra-module wires disposed in the main surface and the back surface of said module substrate, respectively.