Patent ID: 7323386
Filing Date: 2008-01-29
Classification: H01L

Abstract:
1. A method of fabricating a trench-gate semiconductor device comprising: providing a semiconductor substrate of a first conductivity type; forming an epitaxial layer of the first conductivity type on the substrate; forming first and second trenches in the epitaxial layer, the first and second trenches being separated by a mesa; forming dielectric spacers on the sidewalls of the trenches while leaving the bottoms of the trenches exposed; filling bottom portions of the trenches with a semiconductor material of a second conductivity type, the semiconductor material of the second conductivity type forming PN junctions with the epitaxial layer of the first conductivity type at the bottoms of the trenches; removing portions of the dielectric spacers above the semiconductor material of the second conductivity type; forming a dielectric layer on the walls of the trenches above the semiconductor material of the second conductivity type and on the top surface of the semiconductor material of the second conductivity type; and filling an upper portion of the trenches with a conductive gate material.