Patent ID: 6501149
Filing Date: 2002-12-31
Classification: H01L

Abstract:
A semiconductor device comprising:a silicon substrate; a trench isolation region formed in the silicon substrate to isolate two adjacent active areas, the trench isolation region having a bottom surface and sidewalls; a silicon epitaxial growth layer filling a lower portion of the trench isolation region and contacting the silicon substrate at the bottom surface of the trench isolation region; a first oxide layer having an L-shaped cross-section and extending along the sidewall of the trench isolation region to a portion of the bottom surface of the trench isolation region; an anti-oxidative liner having an L-shaped cross-section, interposed between the first oxide layer and the silicon epitaxial growth layer, and having an inner surface contacting the silicon epitaxial growth layer; and a second oxide layer formed on the silicon epitaxial growth layer and filling an upper portion of the trench isolation region.