Patent ID: 6784502
Filing Date: 2004-08-31
Classification: H01L

Abstract:
An integrated circuit comprising:a semiconductive substrate; a diffusion region formed within the substrate, the diffusion region and substrate forming a junction; a conductive line formed over the substrate and the diffusion region; a conductive material interconnecting the conductive line and the diffusion region, a first portion of the conductive material received directly over the conductive line, and an entirety of the first portion of the conductive material received directly over the diffusion region; wherein the diffusion region is configured to be reverse biased to preclude electrical shorting between the conductive line and the substrate through the conductive material for selected magnitudes of current provided through the conductive line; and wherein the diffusion region comprises at least two portions disposed outwardly from directly beneath the combined cross-sectional area of the conductive material and the conductive line, and wherein a second portion of the conductive material contacts the diffusion region at only one location.