Patent ID: 8753922
Filing Date: 2014-06-17
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: face-up mounting a first semiconductor chip including a first multilayer interconnect layer, a first inductor formed in said first multilayer interconnect layer, and a first external connection terminal formed in said first multilayer interconnect layer, over a die pad of a first lead frame; and overlapping a second semiconductor chip including a second multilayer interconnect layer, a second inductor formed in said second multilayer interconnect layer, and a second external connection terminal formed in said second multilayer interconnect layer, over said first semiconductor chip in a direction in which said first multilayer interconnect layer and said second multilayer interconnect layer are opposed to each other such that the first inductor and the second inductor overlap each other in a planar view, wherein in said step of overlapping of said first semiconductor chip and said second semiconductor chip with each other, said first semiconductor chip and said second semiconductor chip are provided with non-overlapping areas which are not opposed to each other, and said first external connection terminal and said second external connection terminal are located in the non-overlapping areas.