Patent ID: 6800900
Filing Date: 2004-10-05
Classification: H01L

Abstract:
A cellular trench-gate semiconductor device comprising active device cells in a cellular area of a semiconductor body, wherein each active device cell has a channel-accommodating region of a second conductivity type between a surface-adjacent source region and an underlying drain region that are of a first conductivity type, an insulated gate trench accommodating the trench-gate extends from the source region through the channel-accommodating region and into the underlying drain region, the trench-gate being dielectrically coupled to the channel-accommodating region by an intermediate gate dielectric layer at sidewalls of the gate trench, and at least one group of the cells end in a respective end structure including:an end region of the second conductivity type having a higher doping concentration than the channel-accommodating region, an end trench that is an extension of the insulated gate trench into the end region and that accommodates an extension of the trench-gate, and a conductive layer that is connected to the extension of the trench-gate and extends over an intermediate insulating layer over the end region, which device is characterised in that the intermediate insulating layer comprises an area of a trench-etch mask that is of greater thickness than the gate dielectric layer, a window extends through the trench-etch mask at a location where the end trench extends into the body and where the conductive layer is connected to the trench-gate extension, and the conductive layer has a lateral extent that terminates in an edge on the trench-etch mask.