Patent ID: 6833624
Filing Date: 2004-12-21
Classification: G11C

Abstract:
A method for making a row decode in a multiport memory, comprising the operations of:forming a first plurality of predecode wires on a first metalization layer, the first plurality of predecode wires configured to address wordline drivers of a first port; forming a plurality of wordline connections on a second metalization layer above the first metalization layer, a first portion of the plurality of the wordline connections in communication with the wordline drivers of the first port and the first plurality of predecode wires; and forming a second plurality of predecode wires on a third metalization layer above the second metalization layer, the second plurality of predecode wires configured to address wordline drivers of a second port, wherein the second plurality of predecode wires is in communication with a second portion of the plurality of wordline connections that are further in communication with the wordline drivers of the second port.