Patent ID: 9059291
Filing Date: 2015-06-16
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor-on-insulator (SOI) substrate including a bulk substrate layer, an active semiconductor layer, and a buried insulator layer interposed between the bulk substrate layer and the active semiconductor layer; a first source/drain (S/D) region including a first stand-alone butting implant formed therein and directly on the buried insulator layer, the first stand-alone butting implant having a first butting width; a second S/D region including a second stand-alone butting implant formed therein and directly on the buried insulator layer, the second stand-alone butting implant having a second butting width; and a gate well-region interposed between the first and second S/D regions such that the first and second stand-alone butting implants are directly against the gate well-region, the gate well-region having a gate width that is greater than the first and second butting widths.