Patent ID: 8564967
Filing Date: 2013-10-22
Classification: H01L,H05K

Abstract:
1. A method of making a printed wiring board semiconductor package, the method comprising, providing a first inner layer panel including a first inner layer panel capacitor; providing a second inner layer panel including a second inner layer panel capacitor, wherein the first inner layer panel capacitor comprises an area that differs from that of the second inner layer panel capacitor; laminating the first and second inner layer panels together in overlying succession such that the first and second inner layer capacitors are at differing vertical positions within the printed wiring board semiconductor package, wherein the first inner layer panel is stacked on and adjacent to the second inner layer panel; providing a semiconductor that projects a die shadow onto the printed wiring board semiconductor package, wherein at least a part of each of the first and second inner layer panel capacitors lies within the die shadow; and interconnecting the first and second inner layer capacitors to a semiconductor through a conductive via.