Patent ID: 7474167
Filing Date: 2009-01-06
Classification: H03J

Abstract:
1. Variable capacitance circuitry comprising: first and second varactor sets each including a plurality of varactors connected in parallel, each of the varactors in the first varactor set being of a different size by a width step which gives each varactor a different capacitance, and each of the varactors in the second varactor set being of approximately the same size as each other varactor in the second varactor set and approximately equal to a size of a largest varactor in the first varactor set plus the width step; and decoder logic circuitry having outputs connected to each of the plurality of varactors in the first and second varactor sets, the decoder logic circuitry selectively enabling each of the varactors in the first and second varactor sets, wherein the decoder logic circuitry: