Patent ID: 6864165
Filing Date: 2005-03-08
Classification: H01L

Abstract:
1. A method for fabricating an integrated structure including a semiconductor device and connector structures for connecting the semiconductor device to a motherboard, the method comprising the steps of: forming a first layer on a plate transparent to ablating radiation, the first layer having a first set of conductors disposed therein, the first set of conductors connecting to bonding pads, the bonding pads being spaced with a first spacing distance in accordance with a required spacing of connections to the motherboard; forming a second layer on the semiconductor device, the second layer having a second set of conductors disposed therein connecting to the semiconductor device; forming studs on one of the first layer and the second layer, the studs being spaced with a second spacing distance less than the first spacing distance; forming a third layer on the one of the first layer and the second layer not having studs thereon; forming vias in the third layer, the vias being spaced in accordance with the second spacing distance; aligning the studs to the vias; attaching the semiconductor device to the first layer, so that the first set of conductors and the second set of conductors are connected through the studs; attaching a support structure to the first layer, so that the support structure surrounds the semiconductor device, the support structure having an area corresponding to an area occupied by the bonding pads; ablating an interface between the first layer and the plate using ablating radiation transmitted through the plate, thereby detaching the plate; and attaching the connector structures to the bonding pads.