Patent ID: 6707339
Filing Date: 2004-03-16
Classification: H03F

Abstract:
A bias current buffer comprising:a first device for receiving an input signal; a first operational amplifier having a first input coupled to the first device, a second input coupled to a reference terminal for receiving a reference voltage, a signal output, and a current drive output, the current drive output providing a boost current in response to detecting a transition of signal value of the input signal and removing the boost current when the first input has a substantially same voltage potential as the second input; a second device having a first terminal coupled to the signal output of the first operational amplifier and a second terminal coupled to the first input of the first operational amplifier, the second device providing a feedback path for the first operational amplifier; a third device having a first terminal coupled to the signal output of the first operational amplifier and having a second terminal; a second operational amplifier having a first input coupled to the second terminal of the third device, a second input coupled to the reference terminal for receiving the reference voltage, a third input for receiving the boost current, and an output for providing an output voltage having an increased current drive during the transition of signal value of the input signal, the increased current drive being reduced to a smaller current drive during a time when the input signal has no signal transitions; and a fourth device having a first terminal coupled to the output of the second operational amplifier and a second terminal coupled to the first input of the second operational amplifier, the fourth device providing a feedback path for the second operational amplifier.