Patent ID: 9209154
Filing Date: 2015-12-08
Classification: H01L,H05K

Abstract:
1. A method of making a semiconductor package with package-on-package stacking capability, comprising the steps of: providing a semiconductor device; providing an interposer that includes a first surface, a second surface opposite to the first surface, first contact pads on the first surface, second contact pads on the second surface, and through vias that electrically couple the first contact pads and the second contact pads; electrically coupling the semiconductor device to the second contact pads of the interposer by a plurality of bumps to form a chip-on-interposer subassembly; providing a base carrier having a first surface, an opposite second surface, and a through opening that extends through the base carrier between the first surface and the second surface thereof; attaching the chip-on-interposer subassembly to the base carrier using an adhesive with the semiconductor device inserted into the through opening and the interposer laterally extending beyond the through opening; with the chip-on-interposer subassembly attached to the base carrier, forming a first buildup circuitry on the first surface of the interposer and the first surface of the base carrier, wherein the first buildup circuitry is electrically coupled to the first contact pads of the interposer through first conductive vias of the first buildup circuitry; forming a second buildup circuitry on the semiconductor device and the second surface of the base carrier; and forming plated through holes that extend through the base carrier to provide electrical and thermal connections between the first buildup circuitry and the second buildup circuitry.