Patent ID: 8395424
Filing Date: 2013-03-12
Classification: G11C,H03K

Abstract:
1. A semiconductor device, comprising: an internal terminal; a first transistor of a first conductivity type that is coupled between a first reference potential and the internal terminal, and that includes a first control terminal; a second transistor of a second conductivity type that is coupled between a second reference potential and the internal terminal, and that includes a second control terminal; an oscillator that includes an output terminal to output a clock signal; and a comparator that is coupled to the internal terminal, and that compares a potential of the internal terminal when the internal terminal is coupled to the first reference potential with a potential of the internal terminal when the internal terminal is coupled to the second reference potential, wherein each of the first and second control terminals is coupled to the output terminal to commonly receive the clock signal, and wherein the first and second transistors exclusively operate in response to the clock signal, wherein the internal terminal comprises a first internal terminal, wherein the comparator comprises a first comparator, wherein the semiconductor device further comprises: wherein each of the third and fourth control terminals is coupled to the output terminal to commonly receive the clock signal, wherein the third and fourth transistors exclusively operate in response to the clock signal, and wherein the internal circuit determines an operation mode based on an output of the first comparator and an output of the second comparator.