Patent ID: 8125033
Filing Date: 2012-02-28
Classification: H01L

Abstract:
1. A polycrystalline silicon layer, comprising: a seed region formed on a surface of a substrate, the seed region having a width of 3.5 μm or more and including a plurality of polygonal grains; and a crystallization region grown by the seed region and formed on the surface of the substrate, wherein a major direction of grain boundaries of the crystallization region is substantially perpendicular to a longitudinal direction of the seed region, the major direction of the grain boundaries of the crystallization region being substantially parallel to the surface of the substrate, wherein a growth length of the crystallization region is about 20 μm or more, and a semiconductor layer of a thin film transistor is formed within the crystallization region, the seed region including at least one seed that includes at least one metal catalyst, the at least one metal catalyst having a concentration less than 1×10