Patent ID: 6656830
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, the method comprising sequentially:forming a first dielectric layer on a capping layer overlaying a lower metal feature of a lower metal level; forming a silicon carbide etch stop layer/anti-reflective coating (ARC) on the first dielectric layer; forming a second dielectric layer on the silicon carbide etch stop layer/ARC; etching to form a first opening, having a cross-sectional width, through the second dialectic layer, through the silicon carbide etch stop layer/ARC and through the first dielectric layer exposing a portion of the capping layer; forming a photoresist mask on the second dielectric layer; and etching to form a second opening, having a width greater than the cross-sectional width of the first opening, through the second dielectric layer stopping on the silicon carbide etch stop layer/ARC, and etching through the exposed portion of the capping layer exposing a portion of the lower metal feature; wherein the first opening constitutes a via opening and the second opening constitutes a trench.