Patent ID: 6689653
Filing Date: 2004-02-10
Classification: H01L

Abstract:
A method of forming semiconductor devices on a semiconductor substrate, comprising the steps of:providing a first gate insulator layer in a first region of said semiconductor substrate, with a first conductive gate structure located on said first gate insulator layer; forming a dielectric layer on said first conductive gate structure; forming a capping layer on said dielectric layer; performing a first pre-clean treatment on a second region, and on a third region of said semiconductor substrate; forming a second gate insulator layer on said semiconductor substrate in said second, region and in said third region of said semiconductor substrate; removing said second gate insulator layer from said second region of said semiconductor substrate; removing said capping layer; performing a second pre-clean treatment to a second region of said semiconductor substrate; forming a third gate insulator layer on said second region of said semiconductor substrate; and forming a second conductive gate structure on said dielectric layer, a third conductive gate structure on said second gate insulator layer, and a fourth conductive gate structure on said third gate insulator layer.