Patent ID: 6674824
Filing Date: 2004-01-06
Classification: H03K,H03L

Abstract:
A mixed-signal-controlled phase-locked loop comprising:a mixed-signal-controlled oscillator circuit for generating an oscillating signal having an oscillating frequency and a phase in response to a digital control signal and an analog control signal, wherein said digital control signal is a digital control word and said analog control signal is an offset current; a phase-frequency detector circuit electrically connected to said mixed-signal-controlled oscillator circuit, detecting said phase and said oscillating frequency of said oscillating signal and comparing said phase and said oscillating frequency with that of a reference signal to generate an error signal after said phase and oscillating frequency are detected; and a mixed-control-signal-producing circuit electrically connected to said mixed-signal-controlled oscillator circuit and said phase-frequency detector circuit for receiving a number of said error signal and a length of said error signal to output said analog control signal and said digital control signal to said mixed-signal-controlled oscillator circuit, wherein said mixed-control-signal-producing circuit comprises: an analog-control-signal-producing circuit electrically connected to said mixed-signal-controlled oscillator circuit and said phase-frequency detector circuit for receiving said error signal to output said analog control signal to said mixed-signal-controlled oscillator circuit; and a digital control-signal-producing circuit electrically connected to said mixed-signal-controlled oscillator circuit and said phase-frequency detector circuit for receiving said error signal to output said digital control signal to said mixed-signal-controlled oscillator circuit, wherein said digital-control-signal-producing circuit comprises: a digital control signal generator electrically connected to said phase-frequency detector circuit for receiving said error signal to generate two specific digital signals; and a digital control word algorithm circuit electrically connected to said digital control signal generator for outputting said digital control word into a digital control word input of said mixed-signal-controlled oscillator circuit in response to said two specific digital signals, wherein said two specific digital signals are a SUB signal and a BYPASS signal, wherein said digital control word algorithm circuit is prohibited to increase/decrease said digital control word when said BYPASS signal is received, wherein said mixed-signal-controlled oscillator circuit comprises: a digital control word circuit electrically connected to said digital-control-signal-producing circuit for receiving said digital control word to control a digital control current source to output a digital control current in proportion to said digital control word; and a current-controlled oscillator electrically connected to said analog-control-signal-producing circuit for receiving said offset current and said digital control current to generate said oscillating signal, wherein said current-controlled oscillator is a 3Ã—3 array oscillator with nine inverters, wherein said inverters are current-mode differential inverters with symmetric loads.