Patent ID: 6034396
Filing Date: 2000-03-07
Classification: H01L

Abstract:
A transistor on a semiconductor substrate, said transistor comprising:a recessed region on top surface of said semiconductor substrate;a gate insulator within said recessed region, said gate insulator having a gate space within;a gate electrode within and over said gate space;a first insulator layer between said gate electrode and said semiconductor substrate;a semiconductor layer over a portion of said semiconductor substrate uncovered by said gate insulator and said gate electrode;a junction region with third type dopants, said junction region being located within said semiconductor substrate under a region uncovered by said gate insulator and said gate electrode;an extended junction region with first type dopants, said extended junction region being located within said semiconductor substrate under said gate insulator; andan anti-punchthrough region with second type dopants, said anti-punchthrough region being located within said semiconductor substrate under said gate electrode.