Patent ID: 6596611
Filing Date: 2003-07-22
Classification: H01L

Abstract:
A method for forming wafer level package having serpentine-shaped electrode formed along a scribe line comprising the steps of:providing a wafer that is preprocessed with a plurality of IC dies formed on a top surface, each of said plurality of IC dies having a plurality of input/output (I/O) pads formed on top, each of said plurality of IC dies being spaced-apart from its immediate adjacent IC dies by a border that has at least a width of a scribe line; depositing a first metal layer on said top surface of the wafer and patterning into an I/O redistribution line with a first end in electrical communication with one of said plurality of I/O pads and a second end extending toward and intelecting said border between said immediate adjacent IC dies, said patterning step further forms a serpentine-shaped electrode for a subsequent plating step on said border in electrical communication with said second end of the I/O redistribution line; depositing an insulating layer on said top surface of the wafer and forming an opening over an I/O redistribution pad exposing said first metal layer; depositing a photoresist layer to a thickness sufficient for forming a solder bump and forming an opening to expose said I/O redistribution pad; depositing a solder paste by a plating technique filling said opening to form a solder bump; and removing said photoresist layer and reflowing said solder bump into a solder ball.