Patent ID: 9165793
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A method for making an integrated circuit package, the method comprising: providing a handle wafer having a first region and a second region, the first region at least partially defining a cavity within the handle wafer, the cavity defining the second region; forming a capacitor in the first region of the handle wafer, the capacitor having a pair of electrodes, each electrode being electroconductively coupled to a corresponding one of a pair of electroconductive pads, at least one of which is disposed on a lower surface of the handle wafer in the first region thereof; providing an interposer having an upper surface with an electroconductive pad and a semiconductor die disposed thereon, the die having an integrated circuit (IC) formed therein, the IC being electroconductively coupled to a redistribution layer (RDL) disposed on or within the interposer; and bonding the lower surface of the handle wafer to the upper surface of the interposer such that the semiconductor die is disposed below or within the cavity of the handle wafer and the at least one electroconductive pad of the handle wafer is electroconductively bonded to the electroconductive pad of the interposer in a metal-to-metal bond.