Patent ID: 6724044
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A MOSFET device comprising:a semiconductor region of first conductivity type having an upper surface; a plurality or source regions of a second conductivity type formed within an upper portion of said semiconductor region adjacent said upper surface; a plurality of drain regions of said second conductivity type formed within an upper portion of said semiconductor region adjacent said upper surface; a plurality of body contact regions of said first conductivity type formed within an upper portion of said semiconductor region adjacent said upper surface; said body contact regions having a net doping concentration that is higher than that of said semiconductor region; and a gate region disposed over said upper surface of said semiconductor region, said gate region comprising (a) a gate electrode region, wherein said gate electrode region comprises a continuous region with openings therein for said plurality of source regions, said plurality of drain regions and said plurality of body contact regions, and (b) a gate dielectric layer disposed between said gate electrode region and said semiconductor region, wherein, when viewed from above said upper surface, said source regions and said drain regions are arranged in orthogonal rows and columns, and wherein at least a portion of said body contact regions are bordered by four of said source and drain regions, and further wherein the body contact regions inside a perimeter of said plurality of source regions or said plurality of drain regions are completely surrounded by said gate electrode region.