Patent ID: 6294439
Filing Date: 2001-09-25
Classification: B23K,H01L,Y10S

Abstract:
A wafer dividing method comprising the steps of:forming grooves in a surface of a wafer, on which semiconductor elements are formed, along dicing lines by means of a dicing blade having a curved surface at the tip, the grooves being deeper than a thickness of a finished chip and having a curved bottom surface;attaching a holding member on the surface of the wafer on which the semiconductor elements are formed; andlapping and polishing a rear surface of the wafer to divide the wafer into chips, and keeping on lapping and polishing the rear surface of the wafer even after the wafer is divided into chips, until the wafer is made to have the thickness of the finished chip, andwherein a lapping and polishing amount required to attain the thickness of the finished chip after a lapped face of the wafer reaches the bottom surface of the groove, and a depth of a region of the curved bottom surface define a ratio of not less than 0.3.