Patent ID: 7051059
Filing Date: 2006-05-23
Classification: H03H

Abstract:
1. An oversampling FIR filter for filtering with a clock having a frequency higher than a frequency of accepting input data, comprising: a shift register having a plurality of holding parts connected in cascade for sequentially accepting input data; a plurality of selectors respectively formed corresponding to said holding parts each selector selecting a predetermined number of individual tap factors from a plurality of tap fators, in which the selecting is done sequentially in each selector in synchronization with said clock; a plurality of multipliers formed respectively corresponding to said holding parts for respectively multiplying said input data held in said holding parts, by said tap factors selected by said selectors corresponding to said holding parts; and an adder for adding the multiplication results from said multipliers and outputting the resultants as output data, and wherein one of said selectors capable of changing its respective predetermined number of individual tap factors to be selected and at least one other of said selectors also capable of changing its respective predetermined number of individual tap factors, such changes being made in accordance with a change in the number of oversamples, which is the number of tap factors to be multiplied by said single input data and wherein said input data is multiplied always by the same total number of tap factors in the same order, regardless of the change in the number of oversamples.