Patent ID: 6724851
Filing Date: 2004-04-20
Classification: H03B,H03C,H03D,H04L

Abstract:
A FIR chip for use in a wireless subscriber unit wherein the subscriber unit includes a processor for transcoding an input signal to provide digital input symbols for demodulating a received output signal, for synthesizing digital output symbols from the demodulated output signal processor and for providing filtered digital input symbols, the FIR chip comprising:an internal address decoder for internal address decoding to allow the processor to access internal functions of the FIR chip; a control and status register which allows the processor to read the status of and control the internal functions of the FIR chip; a FIR filter for FIR filtering the digital input symbols; a transmit timer for control timing which allows the processor to control the FIR filter; and a receive timer for generating timing signals for timing transcoding operations and synthesizing operations connected to the processor.