Patent ID: 6714888
Filing Date: 2004-03-30
Classification: G01R,H03M

Abstract:
An apparatus for testing a semiconductor integrated circuit comprising:a test circuit board configured to transmit signals to and receive signals from a semiconductor integrated circuit to be tested, said semiconductor integrated circuit comprising an A/D converter circuit to convert analog signals to digital signals and a D/A converter circuit to convert digital signals to analog signals; a test ancillary device which is disposed in the vicinity of said test circuit board and is connected to said test circuit board; and an external controller connected to said test ancillary device, wherein said test ancillary device comprises: a data circuit which produces a digital test signal and supplies said digital test signal to said D/A converter circuit of said semiconductor integrated circuit to be tested; a testing D/A converter circuit which converts the digital test signal from said data circuit into an analog test signal and supplies said analog test signal to said A/D converter circuit of said semiconductor integrated circuit to be tested; a register circuit which is provided in said data circuit and is arranged so as to be able to change the number of bits of digital input of said D/A converter circuit of said semiconductor integrated circuit to be tested and the number of bits of digital input of said testing D/A converter circuit matching the measurement resolution of said A/D converter circuit of said semiconductor integrated circuit to be tested; a testing A/D converter circuit which converts an analog test output from said D/A converter circuit of said semiconductor integrated circuit to be tested into a digital test output; measured data memory for storing a digital test output from said A/D converter circuit of said semiconductor integrated circuit to be tested and said digital test output from said testing A/D converter circuit; and an analysis section for analyzing said each digital test outputs stored in said measured data memory; and wherein said digital test signal and said analog test signal are imparted to said semiconductor integrated circuit to be tested in accordance with an instruction from said external controller, and a result of analysis of said each digital test outputs stored in said measured data memory, the analysis being performed by said analysis section, is sent to said external controller.