Patent ID: 7229893
Filing Date: 2007-06-12
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate; shallow trench isolation regions formed in the substrate to define active device regions between the isolation regions; a counter-doping channel region formed on the surface of semiconductor substrate, overlying at least one of the active areas wherein the counter-doping channel region is doped with its type different from the semiconductor substrate; at least one region of high-k gate dielectric material formed over the substrate, and having a top surface and sidewalls; at least one region of gate electrode material formed over the top surface of the gate dielectric region and having non-high-k sidewalls coextensive with the sidewalls of the gate dielectric region; and sidewall spacer material formed over the gate electrode sidewalls and the gate dielectric sidewalls and extending into the surface of the substrate or into the shallow trench isolation regions, respectively, below the bottom layer of the gate dielectric region.