Patent ID: 6746949
Filing Date: 2004-06-08
Classification: H01L

Abstract:
A method for fabricating a robust end reliable MOSFET gate external connection on a semiconductor apparatus, comprising the steps of:with a semiconductor wafer having gate and source metallizations and silicon oxide or silicon nitride passivations with contact passivation openings already in place on a first surface of the wafer, cleaning the wafer; coating the first surface of the wafer with a first photosensitive insulating layer; baking the first photosensitive insulating layer on the wafer; exposing and developing the first photosensitive insulating layer to define an exposed gate contact area, one or more exposed gate support areas, and one or more source contact areas; sputtering a first conducting metal onto the first insulating layer and the exposed gate contact area, one or more exposed gate support areas, and one or more source contact areas; coating the first conducting metal with a first photoresist coating; exposing and developing the first photoresist coating to define protected areas for the first conducting metal; and plating a second conducting metal onto the exposed areas of the first conducting metal.