Patent ID: 8735185
Filing Date: 2014-05-27
Classification: H01L

Abstract:
1. A method of fabricating a vertical light emitting diode (LED), comprising: forming a low doped first conductive semiconductor layer on a sacrificial substrate; forming an aluminum layer on a surface of the low doped first conductive semiconductor layer; forming an anodic aluminum oxide (AAO) layer having a plurality of holes formed therein by performing an anodizing treatment of the aluminum layer; etching and patterning the low doped first conductive semiconductor layer using the aluminum layer with the plurality of the holes as a shadow mask to expose a portion of the low doped first conductive semiconductor layer, thereby forming a plurality of grooves; removing the aluminum layer from the low doped first conductive semiconductor layer; sequentially forming a high doped first conductive semiconductor layer, an active layer and a second conductive semiconductor layer on the low doped first conductive semiconductor layer with the plurality of the grooves; forming a metal reflective layer and a conductive substrate on the second conductive semiconductor layer; separating the sacrificial substrate from the low doped first conductive semiconductor layer; and forming an electrode pad on the other surface of the low doped first conductive semiconductor layer, the electrode pad being filled in a plurality of the grooves to be in ohmic contact with the high doped first conductive semiconductor layer.