Patent ID: 9023701
Filing Date: 2015-05-05
Classification: H01L

Abstract:
1. A method of forming a three-dimensional memory, comprising: forming a stacked structure on a substrate, wherein the stacked structure comprises a plurality of semiconductor layers and a plurality of insulating layers arranged alternately; patterning the stacked structure to form a first comb structure and to form a plurality of trenches in the substrate, wherein the first comb structure comprises a bit line pad extending along a first direction and a plurality of comb-teeth portions extending along a second direction different from the first direction, and a first end of each comb-teeth portion is connected to the bit line pad; forming a charge storage layer on a top surface and a sidewall of the first comb structure; forming a plurality of bit lines and two first auxiliary gates on the charge storage layer, wherein each word line extends along the first direction and covers the top surface and the sidewall of a portion of the comb-teeth portions in a first area, and the first auxiliary gates extend in the first direction and respectively cover the top surface and the sidewall of two edge regions of the bit line pad; removing the charge storage layer on the top surface of the bit line pad, and patterning the stacked structure of the bit line pad to form a stepped structure; performing an ion implantation process to the stepped structure, so as to form a doped region in the semiconductor layer below each step surface of the stepped structure; and forming a plurality of contacts respectively contacting the doped regions.