Patent ID: 9136004
Filing Date: 2015-09-15
Classification: G11C

Abstract:
1. A programming method, adapted for a flash memory that comprises a memory array having a plurality of NAND type cell units formed in a first semiconductor region of a first conductive type, the programming method comprising: electrically isolating the cell unit comprising a programming unit from a bit line corresponding thereto, and electrically coupling the cell unit not comprising the programming unit with a bit line corresponding thereto; applying a programming voltage to a selected word line, and applying a pass voltage to a non-selected word line; generating carriers in the first semiconductor region during a period of applying the programming voltage; and injecting hot carriers into the programming unit, wherein applying the programming voltage to the selected word line, applying the pass voltage to the non-selected word line, generating the carriers in the first semiconductor region, and injecting the hot carriers are all carried out while the cell unit comprising the programming unit is electrically isolated from the bit line corresponding thereto and the cell unit not comprising the programming unit is electrically coupled with the bit line corresponding thereto.