Patent ID: 6339251
Filing Date: 2002-01-15
Classification: H01L

Abstract:
A semiconductor wafer comprising:device regions on a face of the semiconductor wafer wherein an integrated circuit device can be formed on each of the device regions; scribe line regions on the face of the semiconductor wafer wherein adjacent device regions are separated by the scribe line regions; and grooves in the surface of the semiconductor wafer wherein the grooves are within the scribe line regions of the semiconductor wafer to reduce distortion thereof during subsequent fabrication of a plurality of integrated circuit devices in the device regions and wherein the grooves comprise a plurality of separate grooves in each of the scribe line regions; wherein two of the scribe lines intersect and wherein separate grooves within the intersecting scribe lines intersect to form an X-shaped groove such that no leg of the X-shaped groove extends to a second intersection of scribe lines wherein the X-shaped groove has a predetermined depth that is less than a thickness of the wafer.