Patent ID: 8405213
Filing Date: 2013-03-26
Classification: H01L

Abstract:
1. A semiconductor package, comprising: a semiconductor device including a side surface, an active surface, and a back surface opposite to the active surface, wherein the semiconductor device includes a first pad adjacent to the active surface; a package body including a first package surface and a second package surface opposite to the first package surface, and a through-hole extending between the first package surface and the second package surface, wherein the first pad is exposed adjacent to the first package surface, and the back surface and the side surface of the semiconductor device are covered by the package body; a conductive via disposed in the through-hole and extending between the first package surface and the second package surface; a first dielectric layer adjacent to the first package surface, wherein the first dielectric layer has a first aperture exposing a first end of the conductive via; a first patterned conductive layer adjacent to the first dielectric layer and electrically connected to at least one of the first pad of the semiconductor device and the first end of the conductive via; a second patterned conductive layer adjacent to the second package surface and electrically connected to a second end of the conductive via; and a stacking element adjacent to the second package surface and electrically connected to the second patterned conductive layer, wherein the stacking element is laterally displaced from the conductive via.