Patent ID: 8938568
Filing Date: 2015-01-20
Classification: G06F

Abstract:
1. A system comprising: a plurality of processors, wherein each of the plurality of processors is configured to run an operating system, such that a plurality of operating systems of the system comprises at least one of a homogeneous operating system or a heterogeneous operating system; and a multiprotocol multi-root input output virtualization (MPMRIOV) switch communicatively coupled to at least one of the plurality of processors; an Inter Processor Communication unit (IPC) that is configured to enable message exchange between the plurality of processors, wherein the IPC facilitates inter-processor communication between at least two processors of the plurality of processors; and a peripheral and interface virtualization unit (PIVU) directly coupled to the MPMRIOV switch, wherein the PIVU is configured to communicatively couple at least one of the plurality of processors with at least one of a Peripheral Component Interconnect (PCI) compliant peripheral, a Peripheral Component Interconnect express (PCIe) compliant peripheral, a non PCI compliant peripheral or a non PCIe compliant peripheral, wherein the PIVU is configured to communicatively couple at least one of the processors from amongst the plurality of processors with at least one of the non PCI compliant peripheral or the non PCIe compliant peripheral by implementing at least one of a PCI register set or a PCIe register set, and wherein the system facilitates seamless switching from a first operating system of the plurality of operating systems to a second operating system of the plurality of operating systems.