Patent ID: 7115497
Filing Date: 2006-10-03
Classification: H01L,Y10S

Abstract:
1. A method for fabricating a semiconductor device, comprising: forming one or more insulating layers on a semiconductor substrate having a buried contact plug; forming a photoresist pattern on a top surface of the insulating layers; etching the insulating layers, using the photoresist pattern as a mask, to form a first contact opening; etching the insulating layers down to the buried contact plug to form a second contact opening on the buried contact plug; subsequently, forming a second photoresist pattern on a top surface of the insulating layers and in the first contact opening; etching at least one insulating layer, using the second photoresist pattern as a mask, to form a pattern for a bit line that intersects the first contact opening; filling the first and second contact openings simultaneously with a conductive material to form a portion of a bit line in the first contact opening and a conductive plug in the second contact opening; forming an additional insulating layer on a top surface of the semiconductor substrate; and etching the additional insulating layer down to the conductive material to form a contact opening on the conductive material for formation of a storage node.