Patent ID: 7473581
Filing Date: 2009-01-06
Classification: H01L

Abstract:
1. A wafer stacking package method, comprising: providing an array chip on a first wafer, comprising a plurality of independent first chips, formed by cutting the first wafer; providing a second wafer, comprising a plurality of connected second chips, wherein an adhesion layer is formed on active surfaces of the second chips; cutting gaps between the second chips to a specified depth; stacking the second chips overlying the first chips with the active surfaces of the second chips facing backsides of the first chips, wherein the first chips and the second chips are interlaecd to expose at least a portion of the active surfaces of the second chips, and each of the second chips overlaps with only one of the first chips; and thinning backsides of the second chips, wherein a plurality of independent and separated second chips are disposed overlying the first chips to form a plurality of stack chips.