Patent ID: 7510907
Filing Date: 2009-03-31
Classification: H01L

Abstract:
1. A method of fabrication, comprising: forming a first mask over a first side of a first semiconductor die to define a first via area; etching a deep recess through the first semiconductor die in the first via area; forming a blanket metal layer over the first side including the deep recess; removing the blanket metal layer from an outer surface of the first side of the first semiconductor die while retaining a portion of the blanket metal layer within the deep recess; forming a second mask prior to the first mask on the first surface of the first semiconductor die to define a second via area, wherein the first via area is defined within the second via area; and etching a shallow recess into the first semiconductor die in the second via area prior to etching the deep recess, and wherein forming the first mask over the first side of a first semiconductor die to define the first via area includes forming the first mask to cover a portion of the shallow recess, wherein forming the blanket metal layer over the first side including the deep recess further includes forming the blanket metal layer over the first side, the deep recess, and the shallow recess, wherein etching the deep recess and etching the shallow recess result in sloped sidewalls defining the deep recess and the shallow recess.