Patent ID: 8946904
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A semiconductor package, comprising: a substrate comprising a plurality of layers, a first side and a second side; and a via extending through the substrate from the first side to the second side, the via comprising: a first substrate via extending through a first layer of the plurality of layers, the first substrate via having a first cross-sectional area; a first capture pad disposed under the first substrate via, wherein the first capture pad physically contacts the first substrate via on a first side and is adapted to electrically contact a semiconductor die disposed over a top of a second side opposing the first side; a second substrate via extending through a second layer of the plurality of layers, the second substrate via physically contacting the first capture pad, the second substrate via having a second cross-sectional area that is greater than the first cross-sectional area; and a second capture pad disposed under the second substrate via, the second capture pad having a second cross-sectional area that is greater than the first cross-sectional area, wherein the second capture pad physically contacts the second substrate via; a third substrate via extending through a third layer of the plurality of layers, the third substrate via having a third cross-sectional area that is greater than the second cross-sectional area, wherein the third substrate via physically contacts the second capture pad; and a third capture pad disposed under the third layer, wherein the third capture pad physically contacts the third substrate via.