Patent ID: 8166227
Filing Date: 2012-04-24
Classification: G06F,H04L

Abstract:
1. An apparatus for processing a Peripheral Component Interconnect (PCI) Express protocol, comprising: a PCI Express transaction layer reception unit for transmitting status information indicating that a writing request packet is received to a PCI Express data link layer transmission unit, and performing a data writing operation on an application device layer by performing real-time processing without storing the writing request packet; a PCI Express data link layer transmission unit for creating a flow control packet according to the status information, transmitting the flow control packet to a PCI Express physical layer, and transmitting an integrity acknowledgement packet for the writing request packet to the PCI Express physical layer; a PCI Express physical layer for transmitting the flow control packet and the integrity acknowledgement packet to an upstream device through a PCI Express link, and transmitting the writing request packet, received from the upstream device through the PCI Express link, to a PCI Express data link layer reception unit; and a PCI Express data link layer reception unit for transmitting the writing request packet, received from the PCI Express physical layer, to the PCI Express transaction layer reception unit by performing real-time processing without storing the received writing request packet, and transmitting the integrity acknowledgement packet to the PCI Express data link layer transmission unit and a PCI Express transaction layer reception unit based on results of real-time integrity checking.