Patent ID: 6326692
Filing Date: 2001-12-04
Classification: H01L

Abstract:
An insulating and capping structure of an integrated circuit on a semiconductor wafer, the insulating and capping structure comprising:an insulating layer comprised of a dielectric material having a low dielectric constant that is less than about 4.0 and having chemical bonds that are chemically reactive with a predetermined reactant;a reaction barrier layer formed on said insulating layer, wherein said reaction barrier layer is comprised of a material that is not chemically reactive with said predetermined reactant; anda capping layer formed on said reaction barrier layer, wherein said capping layer is formed using said predetermined reactant;wherein said reaction barrier layer is comprised of a material with elements that do not react with said insulating layer during formation of said reaction barrier layer on said insulating layer such that said low dielectric constant of said insulating layer is substantially not changed during formation of said reaction barrier layer on said insulating layer;and wherein said reaction barrier layer prevents contact of said predetermined reactant with said insulating layer to prevent reaction of said predetermined reactant with said chemical bonds of said dielectric material of said insulating layer that are chemically reactive with said predetermined reactant such that the low dielectric constant of said dielectric material of said insulating layer is not increased by formation of said capping layer;and wherein said low dielectric constant of said insulating layer is substantially not changed after formation of said reaction barrier layer on said insulating layer and after formation of said capping layer on said reaction barrier layer.