Patent ID: 6628561
Filing Date: 2003-09-30
Classification: G11C

Abstract:
A programming circuit for a plurality of programmable elements, said programming circuit comprising:a plurality of programmable elements; a plurality of element programming circuits each associated with a programmable element and each including a latch circuit for receiving and holding a desired programming state of an associated programmable element, said plurality of element programming circuits setting the state of said associated programmable elements in accordance with a desired programming state held in an associated latch in response to a common control signal; and a latch programming circuit for temporarily applying a programming signal to an input of a respective latch circuit, said latch circuit latching a state of said programming signal, said latch programming circuit comprising, a latch isolation transistor coupled between said programmable element and said latch circuit, and a latch-programming transistor having a gate controlled by a first latch-programming signal, a first source/drain coupled to a second latch-programming signal, and a second source/drain coupled to said input of said latch circuit through said latch isolation transistor.