Patent ID: 7756494
Filing Date: 2010-07-13
Classification: H03F,H03G,H04B

Abstract:
1. An RF power amplifier comprising: a first amplification device; a second amplification device; and a third amplification device, wherein the first to third amplification devices are formed on a common semiconductor chip as final-stage amplification power devices connected in parallel between an input terminal and an output terminal, an input electrode of the third amplification device is connected with an input electrode of the first amplification device through a switching device, when an RF power output is at Low level, the switching device is controlled to be in OFF state, whereby the third amplification device is controlled to be in OFF state, when the RF power output is at Low level, a first bias voltage of an input terminal of the first amplification device is set to be higher than a second bias voltage of an input terminal of the second amplification device so that the first amplification device is operational in any one of operating classes between Class B with a conduction angle of π (180°) and Class AB with a conduction angle of π (180°) to 2π (360°), and the second amplification device is operational in Class C with a conduction angle below π (180°), and when the RF power output is at High level, the switching device is controlled to be in ON state, when the RF power output is at High level, (1) a first bias voltage of an input terminal of the first amplification device and an input terminal of the third amplification device, and (2) the second bias voltage of the input terminal of the second amplification device are set so that the first and third amplification devices are operational in any one of operating classes between Class B with a conduction angle of π (180°) and Class AB with a conduction angle of π (180°) to 2π (360°), and the second amplification device is also operational in any one of operating classes between Class B with a conduction angle of π (180°) and Class AB with a conduction angle of π (180°) to 2π (360°), a first effective device size of the first amplification device and a third effective device size of the third amplification device are set to be substantially identical to each other, but intentionally smaller than a second effective device size of the second amplification device beyond a range of a manufacturing error of the semiconductor chip.