Patent ID: 8513072
Filing Date: 2013-08-20
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device comprising the steps of: forming a continuous semiconductor layer over an insulating surface, forming an element region and an element isolation region including a first impurity element and a second impurity element in the continuous semiconductor layer by selective addition of the first impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and the second impurity element that imparts one conductivity type, to the continuous semiconductor layer, forming an insulating layer over the element region and the element isolation region, forming a conductive layer over the element region and the insulating layer, and forming a source region and a drain region having an opposite conductivity type to that of the second impurity element in the element region, wherein the element isolation region has a stacked structure of a first element isolation region and a second element isolation region, wherein the first element isolation region includes the first impurity element, and wherein the second element isolation region includes the second impurity element.