Patent ID: 7016452
Filing Date: 2006-03-21
Classification: H03K,H03L

Abstract:
1. A delay locked loop, comprising: a delay unit having a terminal for receiving a clock signal that will be delayed, a terminal for providing a delayed clock signal obtained by delaying the clock signal by a delay time, and a control terminal for receiving a control signal that controls the delay time; a feedback loop connecting said terminal for providing the delayed clock signal back to said control terminal of said delay unit; a phase interpolator having a first terminal for receiving a first input signal and a second terminal for receiving a second input signal; said delay unit including series-connected delay elements having output terminals, each one of said delay elements providing a delay time; said delay unit including a plurality of switching elements controlled by control signals, each one of said plurality of said switching elements being connected to a respective one of said delay elements; said delay unit including a switching device having a first input, a second input, and two outputs; said first input being connected to a first portion of said plurality of said switches; said second input being connected to a second portion of said plurality of said switches; said switching device for connecting said two outputs of said switching device to said output terminals of two of said delay elements being connected directly in succession; said switching device including two multiplexers having inputs being coupled together, each one of said two multiplexers having an output defining a respective one of said two outputs of said switching device; said phase interpolator being connected downstream of said two outputs of said switching device; and in a manner dependent on a selection signal, said phase interpolator effecting a shift in a phase of an input signal, selected from the group consisting of the first input signal and the second input signal, by a subphase that is smaller than the delay time of one of said delay elements.