Patent ID: 6717393
Filing Date: 2004-04-06
Classification: G01K,G01L,H03M

Abstract:
A system for measuring signals in an non-linear network, comprising:an integrating analog to digital converter (ADC) circuit br performing measurement cycles, each of said measurement cycles having at least four phases including, a first integrating phase for integrating a first excitation voltage for a fixed time interval and generating a first integrated voltage, a first de-integrating phase for de-integrating said first integrated voltage until a predetermined threshold voltage is reached and generating a first digital output value, a second integrating phase for integrating a second excitation voltage for said fixed time interval and generating a second integrated voltage, and a second de-integrating phase for de-integrating said second integrated voltage until said predetermined threshold voltage is reached and generating a second digital output value; an ADC controller operatively communicative with said integrating ADC circuit for obtaining and storing a first count value corresponding to said first digital output value at the end of said first de-integrating phase and obtaining a second count value corresponding to said second digital output value at the end of said second de-integrating phase, said ADC controller detecting when said first count value is reached during said second de-integrating phase and resetting said second count value in response to detecting said first count value so that said second count value is offset corrected at the end of said second de-integration phase; and at least one window comparator for comparing said second count value with predetermined upper and lower limit values, wherein after said second count value is offset corrected, said window comparator generates a set signal for setting a latch when said second count value exceeds said predetermined lower limit value and a reset signal for resetting said latch when said second count value exceeds said predetermined upper limit value.