Patent ID: 6518809
Filing Date: 2003-02-11
Classification: H03K

Abstract:
An apparatus comprising:a driver circuit configured to generate an output signal in response to a clock input signal and an adjustment signal, wherein said driver circuit comprises (i) a pre-driver circuit configured to generate a pre-driven clock signal and control a pre-driver duty cycle of said pre-driven clock signal in response to said adjustment signal, and (ii) a driver configured to generate said output signal in response to said pre-driven clock signal; and an adjustment circuit configured to generate said adjustment signal in response to said output signal, wherein said adjustment circuit comprises (i) a first converter configured to convert a high pulse of said output signal to a first charge potential, (ii) a second converter configured to convert a low pulse of said output signal to a second charge potential, and (iii) a charge difference circuit configured to generate a first control signal in response to said first charge potential and a second control signal in response to said second charge potential and said adjustment signal is configured to correct a duty cycle of said output signal.