Patent ID: 8304771
Filing Date: 2012-11-06
Classification: H01L

Abstract:
1. A fabricating method of a pixel structure, comprising: (A) providing a substrate having an array of a plurality of pixel areas; (B) forming a common electrode, surrounding each of the pixel areas, on the substrate; (C) forming a capacitance storage electrode on the common electrode; (D) forming a first passivation layer covering the capacitance storage electrode and the common electrode; (E) forming a scan line and a gate electrode in each of the pixel areas; (F) forming a gate insulation layer covering the scan line and the gate electrode; (G) forming a semiconductor layer on the gate insulation layer above the gate electrode; (H) forming a data line, a source, and a drain in each of the pixel areas, the source and the drain being formed on two sides of the semiconductor layer; (I) forming a second passivation layer on the substrate covering the data line, the source, and the drain; (J) forming a contact window in the second passivation layer above the drain to expose the drain; and (K) forming a pixel electrode in each of the pixel areas, the pixel electrode being electrically connected with the drain through the contact window.