Patent ID: 6981009
Filing Date: 2005-12-27
Classification: G06F

Abstract:
1. An apparatus for computing a logarithm to a base p of a floating-point number X wherein the floating-point number X is represented in the format of (−1) Sx ·2 Ex ·M x , where M x =(1+f x )=(1+A x ·2 −K )+(B x ·2 −N ), where S x is a sign, E x is an exponent, M x is a mantissa, 1≦M x <2, f x is a N-bit fraction, A x is a value of the most significant K bits of f x , B x is a value of the least significant (N−K) bits of f x , 0≦K<N, and p, K, N are natural numbers, the apparatus comprising: a first multiplier for multiplying a number whose value is log a logarithmic table for receiving the value A a first adder connected to the first multiplier and the logarithmic table for adding the multiplying result and the result to output an adding result; a divider for receiving the value B a Taylor-Series approximation circuit connected to the divider for receiving the dividing result R a second multiplier for multiplying a number whose value is 1/ln(p) and the value of ln(1+R a second adder connected to the first adder and the second multiplier for adding the adding result and the second multiplying result to output the logarithm Y.