Patent ID: 7554163
Filing Date: 2009-06-30
Classification: H01L,Y10S

Abstract:
1. A semiconductor device comprising: a first MIS transistor and a second MIS transistor, wherein said first MIS transistor includes: said second MIS transistor includes: said first gate electrode and said second gate electrode are formed integrally extending in a gate width direction, and connected with each other, thereby constituting a single gate line, said first gate width is larger than said second gate width, said first semiconductor region and said second semiconductor region are separated from each other by said isolation region, and sandwich said isolation region in the gate width direction, and said first semiconductor region has a smaller width along a gate length direction than said second semiconductor region, wherein said first MIS transistor and said second MIS transistor are included in an SRAM, and wherein said first MIS transistor and said second MIS transistor are access transistors.