Patent ID: 6680486
Filing Date: 2004-01-20
Classification: H01L,Y10S

Abstract:
An insulated-gate field effect transistor formed over a substrate, comprising:a semiconductor layer comprising amorphous silicon doped with hydrogen or halogen and having an intrinsic, pâˆ’, or nâˆ’ conductivity type; an amorphous channel region formed in said semiconductor layer, wherein a concentration of at least one of oxygen, carbon and nitrogen contained in said semiconductor layer is not higher than 5Ã—1018 atoms/cm3; source and drain regions forming respective junctions with said channel region whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate; a gate insulator contacting said channel region; and a gate electrode contacting said gate insulator; wherein said channel region is interposed between the gate insulator and another insulator, and portions of said semiconductor layer are located below said source and drain regions.