Patent ID: 9025712
Filing Date: 2015-05-05
Classification: G06F,H03L

Abstract:
1. A clock frequency adjusting system, comprising: a sensing clock generating unit, generating a sensing clock signal; a frequency-dividing unit, electrically connected to the sensing clock generating unit, the frequency-dividing unit receiving the sensing clock signal and making frequency of the sensing clock signal be divided by a frequency-dividing modulus and then outputting a clock calibration signal, wherein the frequency-dividing modulus is a positive integer; and a controller, electrically connected to the frequency-dividing unit, the controller having a first count value, wherein the first count value is equal to frequency of an external clock signal divided by frequency of a predetermined clock signal, the controller comprising: a period counter, electrically connected to the frequency-dividing unit, the period counter receiving the external clock signal and the clock calibration signal, and sampling the clock calibration signal through the external clock signal so as to acquire a second count value; and a frequency adjusting unit, electrically connected to the period counter, the frequency adjusting unit calculating a frequency difference data between the clock calibration signal and the predetermined clock signal according to the first count value and the second count value, and determining a number of adjustment according to the frequency difference data and a step adjusting frequency so as to output a clock adjusting signal to the sensing clock unit to adjust frequency of the sensing clock signal.