Patent ID: 8431481
Filing Date: 2013-04-30
Classification: H01L

Abstract:
1. A method of forming a semiconductor device including an integrated circuit (IC) die, comprising: providing a substrate having a top semiconductor comprising surface and a bottom surface; forming at least one through substrate via (TSV) comprising a first electrically conductive composition extending from said top semiconductor surface through said substrate to a protruding integral tip comprising sidewalls and a distal end opposite said bottom surface, having a tip height of between 1 and 50 μm; forming a metal layer on said bottom surface of said IC die, and said sidewalls and said distal end of said protruding integral tip, said metal layer comprising a second electrically conductive metal comprising composition that is different from said first electrically conductive composition, and completing fabrication of at least one functional circuit including at least one ground pad on said top semiconductor comprising surface, wherein said ground pad is coupled to said TSV.