Patent ID: 6373292
Filing Date: 2002-04-16
Classification: H03K

Abstract:
A low voltage differential circuit comprising:a complementary logic tree having first, second and third inputs and two outputs, the logic tree for performing a desired logical function on signals received at said first input, thereby opening a pathway for current flow between at least one of the following: said second input and said first output, said second input and said second output, said third input and said first output, said third input and said second output; a first transistor having a first gate, a first source, and a first drain, said first drain connected to said first output, said first source being connected to a supply voltage; a second transistor having a second gate, a second source, and a second drain, said second source connected to said first gate, said second drain connected to said first drain; and a third transistor having a third gate, a third source, and a third drain, said third source being connected to said supply voltage, said third gate being connected to said second drain, said third drain connected to said second source and said second output, wherein said supply voltage is between approximately 2.1 to 2.8 times the threshold voltage of said first, second and third transistors.