Patent ID: 7782090
Filing Date: 2010-08-24
Classification: H03K

Abstract:
1. A semiconductor device comprising: a first semiconductor integrated circuit having a predetermined function, the first semiconductor integrated circuit outputting a required output signal; and a second semiconductor integrated circuit in which a plurality of MOS elements each of which is independently controllable to and from a conducting state and a non-conducting state in accordance with a plurality of gate signals are provided, the plurality of MOS elements is connected in parallel, and outputs of the plurality of MOS elements are coupled to an output or an input of the first semiconductor integrated circuit, wherein: each of said plurality of MOS elements is capable of generating an output signal which is independent of the output signal of the other MOS elements, and at least one of the plurality of MOS elements is in conducting state during an operation of the second semiconductor integrated circuit, so that there is no situation in which all of the plurality of MOS elements are simultaneously in non-conducting state, drains of the plurality of MOS elements in the second semiconductor integrated circuit are connected in parallel to the input of the first semiconductor integrated circuit, the output of the first semiconductor integrated circuit is connected to respective substrates of the plurality of MOS elements, the first semiconductor integrated circuit is configured to output the required output signal based on at least one of the inputs from the plurality of MOS elements in the second semiconductor integrated circuit, and drains of the plurality of MOS elements are connected in parallel to the input of the first semiconductor integrated circuit via respective sample hold circuits.