Patent ID: 6251736
Filing Date: 2001-06-26
Classification: H01L,Y10S

Abstract:
A process for manufacturing a MOS transistor integrated in a semiconductor substrate having a first conductivity type, the process comprising:forming a gate oxide layer over the semiconductor substrate;forming a gate electrode over the gate oxide layer;forming a covering oxide layer over the gate oxide layer, the gate electrode, and area around said gate electrode, wherein forming a covering oxide layer comprises depositing the covering oxide layer onto the gate oxide layer, the gate electrode, and area around said gate electrode to a thickness of 500 Angstroms;implanting a dopant of a second conductivity type to form implanted regions in the semiconductor substrate and adjacent to the gate electrode;thermally treating the semiconductor substrate to allow said implanted regions to diffuse into the semiconductor substrate under the gate electrode and to form gradual junction drain and source regions of said transistor.