Patent ID: 8225149
Filing Date: 2012-07-17
Classification: G11C

Abstract:
1. A method for testing an operating state of a semiconductor device using a semiconductor testing apparatus to mount the semiconductor device to a mounting portion, the semiconductor device having a plurality of normal cells, each having a memory function for accumulating an electric charge by a floating gate thereof and a control gate thereof thereby to store information, and at least one reference cell identical in structure and function to each of the normal cells and taken as a reference object for an operating state of the normal cell, wherein the semiconductor device further includes a reference column switch connected to the at least one reference cell by a bit line and to a power supply line, the method comprising: operating each of the normal cells as an object on a pseudo basis to perform a function test on a normal corresponding cell with the reference cell as a reference; and controlling a supply of power to the semiconductor device and to the reference column switch such that, after the completion of execution of the function test, the supply of power thereof from the mounting portion to the device is stopped and the power is supplied again after a predetermined time, wherein the function test performs at least one function test after the resupply of power thereby to determine whether the operation of the reference cell is good.