Patent ID: 9208839
Filing Date: 2015-12-08
Classification: G06F,G11C

Abstract:
1. Apparatus for data processing, comprising: shift circuitry configured to perform a shift operation in response to a shift instruction, wherein the shift operation is performed on an input data value and comprises shifting bits of the input data value in a direction specified by the shift instruction to generate a shifted data value; bit location indicator generation circuitry configured to generate a bit location indicator, wherein the bit location indicator indicates at least one bit location in the input data value which must not have a bit set if the shifted data value is not to saturate; and comparison circuitry configured to compare the bit location indicator with the input data value and to indicate a saturation condition if any bits are indicated by the bit location indicator for bit locations which hold set bits in the input data value, wherein the bit location indicator generation circuitry and comparison circuitry are configured to operate in parallel with the shift circuitry; wherein the bit location indicator generation circuitry comprises mask generation circuitry configured to generate a mask data value as the bit location indicator, wherein the mask data value has bits set at bit locations corresponding to bit locations in the input data value which must not have bits set if the shifted data value is not to saturate; wherein the mask data value comprises a sequence of set bits concatenated with a sequence of unset bits, wherein the relative lengths of the sequence of set bits and the sequence of unset bits is determined in dependence on a shift distance specified by the shift instruction.