Patent ID: 6560765
Filing Date: 2003-05-06
Classification: H01L

Abstract:
A method for generating mask data that is used for a manufacturing method for a semiconductor device, the semiconductor device including: a trench isolation region, provided in a semiconductor substrate, defining a first direction and first virtual linear lines extending in a direction that traverses the first direction; and a plurality of dummy convex regions provided in the trench isolation region, wherein the first direction and the first virtual linear lines define an angle of 2 to 40 degrees, and, wherein the dummy convex regions are disposed on the first virtual linear lines, the method comprising the steps of:(a) setting a restriction region pattern that defines a restriction region; (b) setting dummy patterns that define the dummy convex regions; and (c) mixing the restriction region pattern and the dummy patterns, wherein the dummy patterns that at least partially overlap the restriction region pattern are entirely excluded.