Patent ID: 7776673
Filing Date: 2010-08-17
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising a PMOS transistor and an NMOS transistor, comprising: forming a silicon layer over a substrate through a gate insulating film; forming a first gate electrode and second gate electrode by patterning said silicon layer, said first gate electrode being a gate electrode of NMOS transistor, and said second gate electrode being a gate electrode of said PMOS transistor; forming an interlayer film covering said first and said second gate electrodes; forming a first metallic layer formed of a metal capable of forming a silicide over said first and said second gate electrodes; executing a first heat treatment process to form a first silicide from said first metallic layer; selectively forming an oxide layer on said silicon layer of said first and second gate electrodes subjected to said first heat treatment process, a thickness of said oxide layer on said first gate electrode being greater than a thickness of said oxide layer on said second gate electrode; forming, on said oxide layer, a second metallic layer of a metal capable of forming a silicide over said first and second gate electrodes subjected to said first heat treatment; executing a second heat treatment process; and removing an unreacted portion of said metallic layer and said oxide layer after said first and said second heat treatment process.