Patent ID: 7572703
Filing Date: 2009-08-11
Classification: H01L

Abstract:
1. A method for manufacturing a vertical-gate MOS transistor integrated in a semiconductor chip of a first conductivity type, said semiconductor chip having a main surface, the method comprising: forming a trench gate extending into the semiconductor chip from the main surface to a gate depth, said step of forming the trench gate including the steps of forming a control gate and forming an insulation layer for insulating the control gate from the semiconductor chip, wherein the step of forming the insulation layer includes: forming a trench extending into the semiconductor chip from the main surface to a protection depth less than the gate depth, the trench having a lateral wall and a bottom wall with an edge portion of the lateral wall extending from the main surface being inclined outwardly with respect to a remaining portion of the lateral wall; forming a first auxiliary insulation layer in the trench; removing a bottom wall of the first auxiliary insulation layer in correspondence with the bottom wall of the trench; extending the trench to the gate depth; and forming a second auxiliary insulation layer in the trench.