Patent ID: 6278166
Filing Date: 2001-08-21
Classification: H01L

Abstract:
A gate structure apparatus for a MOS semiconductor device, said apparatus comprising:a semiconductor substrate member,said substrate member having a silicon surface;a hydrogen-free silicon oxynitride layer formed on said silicon surface,said hydrogen-free silicon oxynitride layer being formed by an anneal process comprising the steps of:exposing said silicon surface to a hydrogen-free atmosphere of a pure nitric oxide, andheating said silicon surface in said hydrogen-free atmosphere of said pure nitric oxide in a temperature range of 400.degree. C. to 1000.degree. C. for a time period of 10 seconds to 5 minutes; andan insulating material layer,said insulating material layer having a dielectric constant in a range of 25 to 80, formed over said hydrogen-free silicon oxynitride layer, andsaid hydrogen-free silicon oxynitride layer functioning as a reaction barrier layer for facilitating deposition of said insulating material layer.