Patent ID: 8384153
Filing Date: 2013-02-26
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate having a first conductive type; a plurality of first conductive type regions and a plurality of second conductive type regions disposed on the substrate, extending in a first direction, and alternately arranged in a second direction so that a super junction structure is provided; a channel layer having a second conductive type and disposed on the super junction structure; a first conductive type layer disposed in a first surface portion of the channel layer; a contact second conductive type region disposed in a second surface portion of the channel layer, which is opposite to a corresponding second conductive type region, and having an impurity concentration higher than the channel layer; a gate insulation film disposed on the channel layer; a gate electrode disposed on the gate insulation film; a surface electrode disposed on the channel layer; a backside electrode disposed on the substrate opposite to the super junction structure; and an embedded second conductive type region, wherein a current flows between the surface electrode and the backside electrode, wherein the embedded second conductive type region is disposed in a corresponding second conductive type region, protrudes into the channel layer, and contacts the contact second conductive type region, and wherein the embedded second conductive type region has an impurity concentration higher than the channel layer, and has a maximum impurity concentration at a position in the corresponding second conductive type region.