Patent ID: 6812691
Filing Date: 2004-11-02
Classification: G01R

Abstract:
An apparatus for concurrently supplying a test signal to a plurality of integrated circuit (IC) terminals of ICs during a test of the ICs, wherein the test signal repeatedly transitions between first and second test signal voltage levels representing first and second logic levels when a control signal repeatedly transitions between first and second states, the apparatus comprising:a circuit node; first means for driving an output signal between first and second output signal voltage levels when the control signal transitions between the first and second states, the output signal being resistively coupled to the circuit node to produce the test signal at the circuit node; second means for concurrently distributing the test signal from the circuit node to the plurality of IC terminals though a network including resistance isolating the IC terminals from one another; and third means for responding to the control signal and the test signal by adjusting the first and second output signal voltage levels such that the test signal transitions between the first and second test signal voltage levels when the control signal transitions between said first and second states.