Patent ID: 6795911
Filing Date: 2004-09-21
Classification: G06F

Abstract:
A method of selecting a memory bank for access by a computing device having a memory permanently divided into a plurality of mutually exclusive memory banks, the computing device also having an instruction set that includes memory access instructions and a bank selection instruction, the computing device generating an address upon execution of each memory access instruction, the address being divided into a first part and a second part, the first part and the second part being mutually exclusive, the first part including at least one first address bit for selecting the memory bank from among the plurality of mutually exclusive memory banks, and the second part including a plurality of second address bits used in common for specifying addresses within any selected one of the plurality of mutually exclusive memory banks, the method comprising the steps of:(a) upon execution of each memory access instruction which follows a bank selection instruction, setting said first part of the address generated by the computing device according to the bank selection instruction to select the memory bank specified by the bank selection instruction, and accessing the specified memory bank according to the executed memory access instruction; and (b) upon execution of each memory access instruction which does not follow a bank selection instruction, automatically setting said first part of the address generated by the computing device to a permanently fixed value to select a permanently fixed default memory bank, and accessing the default memory bank according to the executed memory access instruction.