Patent ID: 6373880
Filing Date: 2002-04-16
Classification: H04B,H04L

Abstract:
A frequency spread modulation circuit for performing frequency spreading using a plurality of spread codes, comprising:a first input signal group (I signal group) having one or a plurality of input signals; a second input signal group (Q signal group) having one or a plurality of input signals; a first multiplication circuit group having a plurality of multiplication circuits for spreading the input signals belonging to the first input signal group using different spread codes, respectively; a first coefficient circuit group having a plurality of coefficient circuits for outputting predetermined values in accordance with outputs from said first multiplication circuit group; a first addition circuit for adding outputs from said first coefficient circuit group to generate an output signal (I signal) of the first input signal group; a second multiplication circuit group having a plurality of multiplication circuits for spreading the input signals belonging to the second input signal group using different spread codes, respectively; a second coefficient circuit group having a plurality of coefficient circuits for outputting predetermined values in accordance with outputs from said second multiplication circuit group; a second addition circuit for adding outputs from said second coefficient circuit group to generate an output signal (Q signal) of the second input signal group; a logic circuit for separately receiving a plurality of random signals for scrambling and processing the random signals together to generate first, second, and third control signals; and a switch circuit for controlling polarities of the spread codes used in the first input signal group in accordance with the first control signal, controlling polarities of the spread codes used in the second input signal group in accordance with the second control signal, and outputting the I signal as the output from the first addition circuit and the Q signal as the output from the second addition circuit directly or after exchange in accordance with the third control signal.