Patent ID: 7116740
Filing Date: 2006-10-03
Classification: G11C

Abstract:
1. A method for providing a plurality of clock signals, comprising: receiving a first clock signal at a first clock circuit and at a second clock circuit, the first clock signal comprising a plurality of first cycles; generating a second clock signal from the first clock signal at the first clock circuit, the second clock signal comprising a plurality of second cycles, a second cycle of the plurality of second cycles corresponding to a first multiple of the first cycles; generating a third clock signal from the first clock signal at the second clock circuit, the third clock signal comprising a plurality of third cycles, a third cycle of the plurality of third cycles corresponding to a second multiple of the second cycles; sampling the first clock signal and the second clock signal using the third clock signal; determining a safe cycle in response to the sampled first clock signal and the sampled second clock signal; and transferring data between a first circuit running at the second clock signal and a second circuit running at the third clock signal in accordance with the safe cycle in order to provide the plurality of clock signals.