Patent ID: 6426253
Filing Date: 2002-07-30
Classification: H01L

Abstract:
A method of forming an electrical connection to an interior plate of a trench capacitor located in a deep trench on a semiconductor substrate, said method comprising:low-angle implanting a dopant into exposed regions of a mask layer overlying said semiconductor substrate, wherein said mask layer comprises a low-aspect ratio well over said deep trench, and wherein a shielded region of said mask layer overlying said deep trench is shielded from said implanting by a sidewall of said well and thereby remains undoped; removing said undoped shielded region of said mask using a dopant-level selective semiconductor process, thereby exposing a first region of said deep trench, wherein a second region of said deep trench remains masked; and forming a buried strap in said first region of said deep trench, wherein said buried strap electrically connects said interior plate to a portion of an upper substrate sidewall of said deep trench.