Patent ID: 6359341
Filing Date: 2002-03-19
Classification: H01L,H05K

Abstract:
A BGA integrated circuit package, which comprises:a semiconductor chip; a substrate on which the semiconductor chip is mounted, which is composed of a core layer interposed between first conductive traces and second conductive traces, with the first conductive traces and second conductive traces being electrically interconnected to each other through a plurality of vias formed in the core layer; a plurality of conductive balls electrically coupled to the second conductive traces; a ground metallic layer adhered on the first conductive traces, which defines a chip-receiving cavity for accommodating the semiconductor chip therein; a plurality of bonding wires for electrically connecting the semiconductor chip to the first conductive traces; and an encapsulate which encapsulant the semiconductor chip, the bonding wires, the first conductive traces, and the ground metallic layer.