Patent ID: 6661295
Filing Date: 2003-12-09
Classification: H03L

Abstract:
A frequency-adjustable oscillator suitable for digital signal clock synchronization, the oscillator comprising:a crystal oscillator circuit for generating a driving signal and having a voltage-variable control input for adjusting a frequency of the driving signal, the crystal oscillator circuit including a discrete varactor responsive to the control input, an AT-cut quartz resonator operably linked to the varactor, and a gain stage for energizing the quartz resonator; a phase detector circuit for generating a phase offset signal; a filter which operates on the phase offset signal to produce a VCO control signal; a voltage controlled oscillator circuit operably linked to the filter and responsive to the VCO control signal for generating an analog controlled-frequency signal; a frequency divider circuit having a preselected divider ratio operably linked between the voltage controlled-frequency oscillator circuit and the phase detector circuit for generating a reduced frequency feedback signal in response to the controlled-frequency signal, the phase detector circuit being responsive to the feedback signal and the driving signal such that the phase offset signal varies according to a phase difference between the feedback signal and the driving signal; and a sinewave-to-logic level translator circuit operably linked to the voltage controlled oscillator for generating a digital logic output signal having substantially the same frequency as the controlled-frequency signal.