Patent ID: 6172395
Filing Date: 2001-01-09
Classification: H01L

Abstract:
A self-aligned floating gate, flash memory device on the surface of a semiconductor substrate doped with a first type of dopant comprising:a silicon oxide layer over said surface of said substrate,a floating gate electrode formed over said silicon oxide layer,trenches formed in the surface of said substrate,an active region formed in the surface of said substrate,an interconductor dielectric layer formed over said floating gate electrode,a control gate conductor formed over said interconductor dielectric layer,said silicon oxide layer over said surface of said substrate, said floating gate electrode said trenches formed in the surface of said substrate, said interconductor dielectric layer and said control gate conductor forming a self-aligned gate electrode stack,a row of source regions doped with an opposite type of dopant from said substrate with said trenches therebetween on the one side of said gate electrode stack,a row of drain regions doped with an opposite type of dopant from said substrate with said trenches therebetween on the opposite side of said gate electrode stack,said silicon oxide layer, said trenches in said substrate, and said active region in said substrate being self-aligned with said floating gate electrode, anda trench dielectric structure planarized with said floating gate electrode filling said trenches aside from said source/drain regions.