Patent ID: 6306709
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A manufacturing method for a semiconductor device, comprising the steps of:forming a field insulating film on the surface of a first conductivity type semiconductor region on the surface of a substrate to form a first transistor region and a second transistor region separated from each other;forming a gate insulating film on the surface of the first transistor region and the second transistor region;forming a photoresist pattern having opened windows for forming first and second channel impurity regions on the surface of the first transistor region and the second transistor region;forming the first and second channel impurity regions by doping an impurity into the surface of the first transistor region and the second transistor region using the photoresist pattern as a mask to form each channel impurity region of a plurality of first impurity concentration regions and second impurity concentration regions, each having a different threshold inversion voltage;patterning gate electrodes on the gate insulating film at each channel impurity region;forming second conductivity type source and drain regions on the surface of the first and second transistor regions so that the source and drain regions of the respective transistor regions are partitioned by the gate electrodes;forming an intermediate insulating film on the gate electrodes;forming contact holes through the intermediate insulating film; andpatterning metallic wiring to be overlaid on the contact holes to connect the first and second gate electrodes.