Patent ID: 6222769
Filing Date: 2001-04-24
Classification: G11C,H01L

Abstract:
A nonvolatile semiconductor memory device comprising:a semiconductor substrate;a plurality of floating gate electrodes formed above the semiconductor substrate, with a tunnel insulating film interposed therebetween, charges being exchanged between the floating gate electrodes and the semiconductor substrate through the tunnel insulating film;buried electrodes which are provided for two side walls of a trench, with an insulating film interposed therebetween, and which are electrically isolated from each other, said trench being formed in a major surface of the semiconductor substrate at a location corresponding to a position between adjacent ones of the floating gate electrodes; anda control gate electrode which is formed above the buried electrodes and the floating gate electrodes, with an interlayer insulating film interposed therebetween,wherein, in a data write mode, the buried electrodes that oppose each other in a state where the floating gate electrode corresponding to a selected memory cell is located therebetween, are applied with a negative potential, and the buried electrodes that oppose each other in a state where the floating gate electrode corresponding to a nonselected memory cell is located therebetween, are applied with a potential higher than said negative potential.