Patent ID: 9128662
Filing Date: 2015-09-08
Classification: G06F,G11C

Abstract:
1. A solid-state drive memory system, comprising: a memory controller mounted on a printed circuit board (PCB) and having a host interface for providing and receiving host data, and a memory interface for providing memory input signals and receiving memory output signals; a memory blade having serially connected memory devices, and a connector tab having input ports configured to receive the memory input signals and output ports configured for providing the memory output signals, the memory input signals being received by a first memory device of the serially connected memory devices and the memory output signals being provided by a last memory device of the serially connected memory devices; serially connected memory devices permanently mounted to the PCB and in communication with the memory controller; and a connector mounted on the PCB and having a socket configured to releasably receive the connector tab of the memory blade and configured for coupling the memory input signals and the memory output signals between the memory blade and the memory controller.