Patent ID: 6214696
Filing Date: 2001-04-10
Classification: H01L

Abstract:
A method of forming a trench isolation in a semiconductor substrate, said method comprising the steps of:forming a pad layer over said substrate;forming a polysilicon layer over said pad layer;forming a dielectric layer over said polysilicon layer;forming an opening in said dielectric layer, said polysilicon layer, and said pad layer;removing a portion of said substrate for forming a trench by using said dielectric layer as a mask;forming a sidewall structure on said opening;removing a portion of said substrate by using said sidewall structure as a mask to etch exposed portion of said trench, thereby forming a relative deeper trench to said trench;removing said sidewall structure and said first dielectric layer;forming an oxide layer over said polysilicon layer and a surface of said trench;forming an oxynitride layer over said oxide layer;forming a semiconductor layer over said oxyynitride layer;oxidizing a portion of said semiconductor layer to transfer a portion of said semiconductor to oxide for isolation;refilling an isolation layer over said oxided semiconductive layer; andperforming a planarization to planar said isolation layer, said oxided semiconductive layer, said oxynitride layer, said oxide layer to a portion of said polysilicon layer, leaving residual polysilicon layer over said substrate.