Patent ID: 7301825
Filing Date: 2007-11-27
Classification: G11C

Abstract:
1. A method of controlling a copy-back operation of a flash memory device including a plurality of Multi-Level Cells (MLCs) connected to bit lines and word lines, the method comprising the steps of: initializing a lower bit register in response to a first lower read control signal; sequentially reading first and second lower bit data from a source MLC of the plurality of MLCs by sequentially applying first and second read voltages to a word line to which the source MLC is connected, and storing program data in the lower bit register based on the first and second lower bit data; determining whether the program data will be modified; if it is determined that the program data will not be modified, firstly programming the program data into a target MLC of the plurality of MLCs in response to a first program control signal; if it is determined that the program data will be modified, storing the modified program data in the lower bit register; and secondly programming the modified program data in the target MLC in response to the first program control signal.