Patent ID: 6317354
Filing Date: 2001-11-13
Classification: G01R,G11C

Abstract:
A ferromagnetic memory circuit having a plurality of memory cells, each of the memory cells comprising:a) a bit, made of a ferromagnetic material, having a remnant polarity;b) a write line, located proximate the bit, coupled to receive a current sufficient to create the remnant polarity of the bit;c) a magneto sensor, positioned proximate the bit, including:1) a magneto resistor, having a current flow direction responsive to the remnant polarity of the bit;2) an input line, coupled to the magneto resistor to feed current to the magneto resistor;3) a single output line, coupled to the magneto resistor to receive current from the magneto resistor; and4) a single collector, coupled to both the output line and the magneto resistor, along a side of the magneto resistor between the output line and the input line, to collect current from the magneto resistor and conduct the current into the output line.