Patent ID: 9177944
Filing Date: 2015-11-03
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first integrated circuit (IC) die having solder bumps; and a second IC die mounted on the first IC die, the second IC die having an active side and a backside opposite the active side, the second IC die including bond pads on the active side configured for wire-bonding, and solder bumps disposed on a backside opposite the active side, the second IC die including at least one power converter circuit receiving an input from a bond pad of the bond pads by way of a first wire bond, the input having a first voltage and a first current, the second IC die having through-die vias (TDVs) extending between the active side and the backside; wherein the solder bumps of the first IC die are electrically and mechanically coupled to the solder bumps of the second IC die to form bump bonds, wherein the at least one power converter circuit provides, responsive to the input, an output having a second voltage and a second current to the first IC die by way of the TDVs of the second IC die and the bump bonds, and wherein the second current is greater than the first current; wherein the first IC die includes bond pads that are configured for wire bonding, and a second wire bond electrically couples a bond pad of the bond pads of the first IC die to a substrate to provide power to the first IC die having a third current that is a lower current than the second current; and wherein the second IC die further includes an inductor formed on the backside and coupled to the TDVs.