Patent ID: 6625241
Filing Date: 2003-09-23
Classification: H04J

Abstract:
A method for combining first and second bitstreams, both of which have a nominal first baud rate and are organized as a sequence of frames containing data bits separated by fill words, into a third bitstream having a second baud rate, said method comprising:providing a local clock source having a fundamental frequency that is nominally the same as the first baud rate, said local clock source generating a 0Â°-phase signal at the fundamental frequency, a 180Â°-phase signal at the fundamental frequency, and a double-frequency signal in phase with both the 0Â°-phase signal and the 180Â°-phase signal; providing first and second synchronizer units, said first synchronizer unit for receiving said 0Â°-phase signal and said first bitstream, said second synchronizer unit for receiving said 180Â°-phase signal and said second bitstream, each synchronizer acting independently of the other to synchronize its received bitstream with its received signal by adjusting, as necessary, the fill word content of that bitstream's constituent frames; and providing an interleaver controlled by said double-frequency signal, said interleaver for receiving the synchronized first and second bitstreams and combining them both into a third bitstream containing all the data bits of said first and second bitstreams, and having having a baud rate of double said fundamental frequency.