Patent ID: 6849507
Filing Date: 2005-02-01
Classification: H01L

Abstract:
1. The process for forming a trench type MOSgated device in a semiconductor body comprising a highly doped substrate of a first conductivity and a lightly doped semiconductor layer of said first conductivity formed over said substrate; said process comprising the steps of etching a trench having spaced side walls and a flat bottom surface in said semiconductor layer, said trench terminating in said semiconductor layer and said flat bottom surface and said sidewalls being generally normal to one another thereby forming a sharp edge at the point of their cross-section; amorphizing the bottom surface of the trench but not its side walls; and thereafter growing a silicon dioxide layer on the side walls and bottom of the trench at the same time, wherein the silicon dioxide layer is substantially thicker at the bottom of said trench than on the side walls and said edges are round.