Patent ID: 7139335
Filing Date: 2006-11-21
Classification: H04L

Abstract:
1. An apparatus, comprising: a symbol demodulator that is operable to: an I-rail MSB (Most Significant Bit) engine that is operable to process the I-rail voltage to approximate a first optimal decision metric using a first piece-wise linear metric function; an I-rail LSB (Least Significant Bit) engine that is operable to process the I-rail voltage to approximate a second optimal decision metric using a second piece-wise linear metric function; a Q-rail MSB engine that is operable to process the Q-rail voltage to approximate a third optimal decision metric using the first piece-wise linear metric function; a Q-rail LSB engine that is operable to process the Q-rail voltage to approximate a fourth optimal decision metric using the second piece-wise linear metric function; an I convolutional decoder that is operable to process the first optimal decision metric and the second optimal decision metric thereby generating a best estimate of at least a first bit of a symbol that has been encoded into a received data signal; and a Q convolutional decoder that is operable to process the third optimal decision metric and the fourth optimal decision metric thereby generating a best estimate of at least a second bit of the symbol that has been encoded into the received data signal.