Patent ID: 7427326
Filing Date: 2008-09-23
Classification: C30B,H01L

Abstract:
1. A method of forming a bipolar semiconductor device that minimizes the propagation of stacking faults through the device, the method comprising: growing a first stacking fault terminating layer of silicon carbide of a first majority carrier type on a silicon carbide substrate; growing a silicon carbide voltage blocking drift region on the first stacking fault terminating layer, wherein the thickness of said drift region is determined by the maximum voltage to be blocked by the device; growing a second stacking fault terminating layer of silicon carbide on the drift region, wherein the second stacking fault terminating layer has the opposite majority carrier type as the first stacking fault terminating layer; doping at least a portion of each stacking fault terminating layer to a higher carrier concentration than that of the drift region to reduce the minority carrier lifetime in that portion of each stacking fault terminating layer and to arrest the propagation of stacking faults through the device.