Patent ID: 6833604
Filing Date: 2004-12-21
Classification: H01L

Abstract:
An electronic structure, comprising:a first conductive plug formed at least in part within a first well in a first group of one or more layers of said electronic structure by a predetermined fabrication process, the first well having a first diffusion barrier metal layer thereon; an etch-stop layer formed on at least a portion of the first conductive plug by the predetermined fabrication process, the etch-stop layer having a preselected dielectric constant and a predetermined geometry; a second group of one or more layers formed adjacent the etch stop layer; a core well formed in a portion of the second group of one or more layers to expose at least a portion of the etch-stop layer, the core well and exposed portion of the etch-stop layer having a second diffusion barrier metal layer thereon; and a second conductive plug formed at least in part within the core well, the second conductive plug being electrically coupled through the etch-stop layer to the first conductive plug to form a metal-insulator-metal capacitor with the first conductive plug.