Patent ID: 6759320
Filing Date: 2004-07-06
Classification: H01L

Abstract:
An in-process semiconductor device comprising:a semiconductor substrate assembly including a semiconductor wafer and a conductive transistor gate portion which overlies said wafer; a first layer of material having a portion overlying said conductive transistor gate portion, wherein said portion of said first layer of material which overlies said conductive transistor gate portion has been only partially etched into; a second layer of material overlying said partially etched portion of said first layer and overlying a wafer location laterally spaced from said partially etched portion of said first layer; and a patterned mask layer overlying said second layer of material, said patterned mask having at least first and second openings therein wherein said first opening is oriented over said partially etched portion of said first layer and said second opening is oriented over said wafer location laterally spaced from said partially etched portion of said first layer.