Patent ID: 7948570
Filing Date: 2011-05-24
Classification: G02F,H01L

Abstract:
1. A thin film transistor (TFT) array substrate for a liquid crystal display, comprising: a gate line and a data line formed in a display region, a gate connecting line and a data connecting line formed in a PAD region, a TFT formed at an intersection between the gate line and the data line, wherein the TFT comprises a gate electrode on a base substrate, a gate insulating layer on the gate electrode, a semiconductor layer on the gate insulating layer, a doped semiconductor layer on the semiconductor layer, and a source electrode and a drain electrode that are on the doped semiconductor layer, and a TFT channel is defined in the semiconductor layer between the source electrode and the drain electrode; a passivation layer that is formed on the source electrode and the drain electrode; and a pixel electrode, which is formed outside of the stacked layers of the semiconductor layer and the doped semiconductor layer and a portion of which is formed under the drain electrode and connected with the drain electrode.