Patent ID: 6901521
Filing Date: 2005-05-31
Classification: G06F,Y02D

Abstract:
1. A processing device comprising: a processing module capable of multitasking multiple tasks; one or more associated circuits, coupled to said processing module for supporting the processing module, each of said associated circuits having power circuitry for either enabling or disabling the associated circuit responsive to a power input, at least one of the associated circuits being used by more than one task; a task attribute register storing task attribute bits for enabling and disabling the associated circuits, wherein each task has task attribute bits associated therewith which are stored in the task attribute register while the task is being executed by the processing module; and a logical OR gate having inputs receiving a bit of each the task attribute register corresponding to the at least one associated circuit used by more than one task and an output connected to the power input of the associated circuit used by more than one task to enable the associated circuit used by more than one task when task using the associated circuit is being executed by the processing module and to disable the associated circuit used by more than one task when no task using the associated circuit is being executed by the processing module.