Patent ID: 7843992
Filing Date: 2010-11-30
Classification: G01S,H01Q,H03F,H03J

Abstract:
1. A circuit, comprising: an impulse generator operable to provide a pulse train; a pulse position modulator having a splitting junction configured to receive the pulse train, the pulse position modulator including a plurality of n transmission lines, wherein n is an integer, the n transmission lines being selectably coupled in parallel between the splitting junction and a combining junction, the impulse generator driving each transmission line having a unique delay such that if the transmission line is selected, each pulse received at the splitting junction is uniquely delayed into a delayed pulse, whereby if all the transmission lines are selected, each pulse received at the splitting junction is uniquely delayed into a corresponding plurality of n delayed pulses; and an oscillator operable to provide a sinusoidal output signal, wherein the impulse generator includes a plurality of delay paths each having a unique delay, the impulse generator being configured to rectify and level shift the sinusoidal source output signal through the delay paths to provide the pulse train; and a controller operable to select the transmission lines responsive to received words of n bits in length, each word arranged from a first bit to an nth bit, and wherein the transmission lines are arranged from a first transmission line to an nth transmission line corresponding to the bits in the received words such that a given bit in a received word controls the selection of the corresponding transmission line.