Patent ID: 6621333
Filing Date: 2003-09-16
Classification: H03F

Abstract:
A circuit for countering an offset voltage, said circuit comprising:a first stage having an output current, said offset voltage being related to said output current; a second stage coupled to said first stage, said second stage operable to produce a first compensation current that is a function of said output current; a third stage having a first node and a second node which are inputs, said second stage coupled to said third stage to feed said first compensation current into said third stage to create a compensating voltage to counter said offset voltage by altering the voltage between said first node and said second node of said third stage; and a fourth stage, said fourth stage coupled to said second stage, said fourth stage operable to produce a second compensation current that is a function of said output current; and said fourth stage coupled to said third stage to feed said second compensation current into said third stage, said second compensation current operable to act jointly with said first compensation current to counter said offset voltage.