Patent ID: 7737041
Filing Date: 2010-06-15
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device including a first region formed of a plurality of paralleled semiconductor layer portions extending linearly in a first direction and a second region formed of two adjacent ones of said semiconductor layer portions connected in a second direction, the method comprising: forming a first hard mask on an etching target member; forming on said first hard mask a second hard mask having paralleled portions extending straight in said first direction at plural locations; executing ion implantation into said second hard mask in said second region while protecting said second hard mask in said first region from said ion implantation with a mask, thereby changing an etching rate of said second hard mask in said second region for wet etching compared to that of said second hard mask in said first region; etching said first hard mask with a mask of said second hard mask; removing said second hard mask from said first region selectively by wet etching while leaving said second hard mask in said second region due to a difference in the etching rate; forming sidewall films on sidewalls of said first hard mask; etching off said first hard mask selectively to remove a portion thereof having an upper part not covered with said second hard mask but exposed in said first region; and etching off said etching target member with a mask of said sidewall films and said first hard mask.