Patent ID: 6847078
Filing Date: 2005-01-25
Classification: H01L

Abstract:
1. A non-volatile memory device comprising: an active region disposed in a predetermined region of a semiconductor substrate; a selection gate electrode crossing over the active region, wherein the selection gate electrode comprises a selection-vertical part having a first curved sidewall and a first planar sidewall and a selection-protruding part coupled to a lower portion of the first planar sidewall; a floating gate electrode disposed on the active region parallel to the selection gate electrode and spaced apart from the selection gate electrode, wherein the floating gate electrode comprises a floating-vertical part having a second curved sidewall and a second planar sidewall and a floating-protruding part coupled to a lower portion of the second planar sidewall, wherein the first planar sidewall and the second planar sidewall are disposed to face each other; a tunnel insulating layer intervening between the active region and each of the selection gate electrode and the floating gate electrode; a separation insulating pattern intervening between the selection gate electrode and the floating gate electrode; an erasing gate electrode disposed over the floating gate electrode and crossing over the active region parallel to the selection gate electrode; and an erasing gate insulating layer intervening between the erasing gate electrode and the floating gate electrode.