Patent ID: 6038226
Filing Date: 2000-03-14
Classification: H04Q

Abstract:
A circuit configured to cross-connect data carried in PCM and associated signalling channels of a first side data stream into PCM and associated signalling channels of a second side data stream, wherein the first side PCM channels are received in successive time division multiplexed data frames and the first side signalling channels are received over signalling multiframes comprising a plurality of successive data frames, the cross-connect circuit comprising:a PCM memory configured to store data carried in first side PCM channels of each data frame at an address corresponding to the respective data frame timeslot in which the PCM channel is received; anda signalling memory configured to store data carried in the first side signalling channels of each signalling multiframe at an address corresponding to the data frame timeslot of its associated PCM channel, wherein the PCM and signalling memories may be configured to be substantially the same size.