Patent ID: 9201439
Filing Date: 2015-12-01
Classification: G05F,G11C,H02M,H03K

Abstract:
1. A semiconductor device comprising: a booster circuit that boosts an input voltage and generates a first boosted voltage; a voltage hold circuit that holds a second boosted voltage having a smaller absolute value than the first boosted voltage; a first output terminal through which the first boosted voltage is output; a second output terminal through which the second boosted voltage is output; a first switch that is placed between the first output terminal and the second output terminal; and a control circuit that generates a switch signal for switching the first switch from close to open in response to an output voltage of the booster circuit reaching a hold voltage level set to the voltage hold circuit, wherein the voltage hold circuit increases a voltage value of the second boosted voltage to be output in accordance with the output voltage of the booster circuit during a period when the switch signal indicates close of the first switch, and maintains the voltage value of the second boosted voltage at a point when a value of the switch signal is switched during a period when the switch signal indicates open of the first switch, wherein when the switch signal indicates open of the first switch, the voltage value of the second boosted voltage at the point when the value of the switch signal is switched is maintained.