Patent ID: 6784065
Filing Date: 2004-08-31
Classification: H01L

Abstract:
A method for forming a bipolar transistor on a wafer, the wafer having a buried layer, an epitaxial layer of a first conductivity type formed over the buried layer and having a smaller dopant concentration than the buried layer, and an intrinsic base region of a second conductivity type formed in the epitaxial layer, the method comprising the steps of:forming an isolation region on the intrinsic base region; forming a layer of conductive material on the isolation region and the intrinsic base region; etching the layer of conductive material to form an extrinsic emitter on the isolation region and the intrinsic base region; forming an intrinsic emitter region in the intrinsic base region; and forming a side-wall spacer on the intrinsic base region to adjoin the extrinsic emitter.