Patent ID: 8404546
Filing Date: 2013-03-26
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: providing a substrate including a gate structure; forming dummy sidewalls on opposing sides of the gate structure and overlying the substrate; etching recesses on opposing sides of the gate structure spaced from the gate structure by the dummy sidewalls; removing the dummy sidewalls from the gate structure and from the substrate; subsequent to removing the dummy sidewalls, using a tilt angle implant for implanting a barrier dopant lining the sidewalls and the bottom of the recesses, wherein the barrier dopant comprises one selected from the group consisting essentially of carbon, fluorine, and nitrogen; employing rapid thermal anneal (RTA) with a nitrogen ambient on the substrate; and forming a doped stressor into the recesses, wherein a dopant-containing portion is formed between the doped stressor and the substrate.