Patent ID: 6490279
Filing Date: 2002-12-03
Classification: H04L

Abstract:
An address table apparatus comprising:an address bus for receiving input data packets and for hashing a designated bucket number and extracting a key from each of said data packets; a plurality of memory banks connected directly to said address bus wherein each memory bank includes a plurality of memory buckets for storing a destination address (DA) and a port number for each of said packets in each of said buckets having a bucket number corresponding to a bucket number hashed from said each of said data packets; a comparand bus connected to said address bus for receiving said key therefrom; a plurality of comparators each corresponding to one of said memory banks for directly connected to and receiving said destination address (DA) and said port number from said designated bucket from a corresponding memory bank, said comparators further connected directly to said comparand bus for receiving and comparing said key to said address from said designated bucket in each of said memory banks; and a result bus connected directly to said comparators for displaying an output port number from one of said comparators if said key extracted from one said data packets matching said destination address (DA) from one of said designated buckets.