Patent ID: 7196556
Filing Date: 2007-03-27
Classification: H03K,H04L

Abstract:
1. Buffer circuitry configured to produce from an input signal indicative of information a pair of output signals that indicate the information by the relative polarity of their voltages comprising: a source of relatively high voltage; a source of relatively low voltage; differential switching circuitry configured to produce the output signals in response to the input signal; first resistor circuitry connected in series between the source of relatively high voltage and the differential switching circuitry; and second resistor circuitry connected in series between the differential switching circuitry and the source of relatively low voltage, wherein: connections between the sources, the differential switching circuitry, and the first and second resistor circuitries are such that when external circuitry is connected in series between the two output signals, current flows in series from the source of relatively high voltage through the first resistor circuitry, through the external circuitry, through the second resistor circuitry, to the source of relatively low voltage; and at least one of the first and second resistor circuitries includes a transistor coupled in series with a first resistor and a second resistor and is configured to increase in resistance in response to an increase in voltage difference between the source of relatively high voltage and the source of relatively low voltage.