Patent ID: 8947932
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A one-transistor (1T) floating-body DRAM cell device comprising: a substrate; a control electrode which is disposed above the substrate; a gate stack disposed on the substrate, the gate stack being formed of a charge storage node disposed on the control electrode and a tunneling insulating layer disposed on the charge storage node; a floating body formed above the gate stack; a source and a drain which are formed on the floating body, wherein the floating body is extended to between the source and the gate stack and between the drain and the gate stack so that the source and the drain are not directly in contact with the gate stack; a gate insulating layer which is formed on the floating body; and a gate electrode which is formed on the gate insulating layer, wherein the control electrode has a length longer than that of the gate electrode, and the floating body has a length longer than that of the gate electrode.