Patent ID: 6768431
Filing Date: 2004-07-27
Classification: H03M

Abstract:
A serial-to-parallel data converter for converting a serial data into a n-bit parallel data, comprising:a first data receiver, composed of n flip-flops for latching the n-bit parallel data referring n phase clock signals in a conversion cycle; a second data receiver, composed of n flip-flops with inputs connected in parallel with inputs of the first data receiver, for latching the n-bit parallel data by referring said n phase clock signals in said conversion cycle; a pre-register, composed of m flip-flop(s) for latching the first m bit(s) of the n-bit parallel data and output(s) thereof connected to the inputs of flip-flops in the first data receiver and the second data receiver corresponding to the first m bit(s); wherein the inputs of the pre-register receive the serial data, and the first m bit(s) is shifted back to one of the first data receiver and the second data receiver before each conversion cycle ends; and a selector, connected to the flip-flops of the first data receiver and the second data receiver for selecting one of the first data receiver and the second data receiver for serial data conversion and the other for parallel data output.