Patent ID: 6078973
Filing Date: 2000-06-20
Classification: G06F

Abstract:
A computer system, comprising:a processor;a processor bus connected to the processor and operable to transfer data to and from the processor;a memory having first and second addressable regions;a memory bus connected to the memory and operable to transfer data to and from the memory;a system controller connected to the processor bus and to the memory bus and operable to control the transfer of data between the processor bus and the memory bus; andmodem input/output circuitry connected to the system controller and operable to transfer modem data to and from the system controller, the system controller correspondingly operable to transfer the modem data directly to the first addressable region of the memory and directly from the second addressable region of the memory, the first and second addressable regions of the memory being operated as a first-in-first-out buffer.