Patent ID: 6021275
Filing Date: 2000-02-01
Classification: G06F

Abstract:
An object code structure for dynamic translation of an architecture-independent program implementation into native code for a target architecture, the object code structure encoded in computer readable media and comprising:a code section;a data section associated with the code section and including a first representation of data organized as units of storage;a data translation script associated with the first representation, the data translation script including an instruction sequence for reversing byte ordering within the units of storage of the first representation when the first representation is not in accordance with byte ordering of the target architecture;wherein the first representation includes first and second units of storage, the first unit of storage representing literal data and the second unit of storage representing pointer data;wherein the data translation script includes a translation instruction corresponding to the first unit of storage and descriptive of an endian transformation of the literal data;wherein the data translation script further includes a relocation expression corresponding to the second unit of storage and descriptive of a transformation of the pointer data to an effective memory address, the relocation expression encoding a linear combination of terms comprising one or more terms selected from a set comprising a constant term, a data section address term, a function gate address term, and a translation time constant term;the object code structure further comprising first and second flags associated with the data section, the first flag indicating whether the first representation is in big-endian format and the second flag indicating whether the first representation is in little-endian format;wherein the translation instruction transforms byte ordering of the first unit of storage,when evaluated on a big-endian target architecture, if the first flag does not indicate that the first representation is in big-endian format, andwhen evaluated on a little-endian target architecture, if the second flag does not indicate that the first representation is in little-endian format,wherein the translation time constant term, if any, evaluates to a first byte offset,when evaluated on a big-endian target architecture, if the first representation flag does not indicate that the first representation is in big-endian format, andwhen evaluated on a little-endian target architecture, if the first representation flag does not indicate that the first representation is in little-endian format; andwherein the translation time constant term, if any, evaluates to a second byte offset, otherwise.