Patent ID: 6133632
Filing Date: 2000-10-17
Classification: H01L,Y10S

Abstract:
A semiconductor device comprising, in combination,a first semiconductor die having opposing surfaces which contain respective electrodes,a second semiconductor die having opposing surfaces which contain respective electrodes,a thin conductive lead frame havinga common main pad area having a first plurality of parallel pins integral with and extending from one edge thereof, anda second plurality of pins separated from said common main pad area;said second plurality of pins being disposed along an edge of said common main pad area opposite to the side thereof containing said first plurality of pins at least two of said second plurality of pins being electrically connected together;one of said opposing surfaces of each of said first and second semiconductor die being disposed atop and in electrical contact with said common main pad area;the opposite ones of said opposing surfaces of said first and second die being in electrical contact with at least one of said second plurality of pins; anda molded housing for encapsulating said lead frame and said first and second die;said first and second pins extending beyond the boundary of said molded housing and available for external connection.