Patent ID: 8825922
Filing Date: 2014-09-02
Classification: G06F

Abstract:
1. An arrangement for processing trace data information, the arrangement comprising, a chip comprising one or more memory circuits configured to store trace data information relating to a series of instructions, and a trace data information port configured to provide off-chip access to the trace data information; one or more trace data information monitoring circuits configured to be in connection with the one or more memory circuits; wherein the trace data information port is connected via an on-chip bus to the trace data information monitoring circuits; and a direct memory access controller circuit configured to control the transportation of trace data information from the one or more memory circuits to the trace data information port, wherein the direct memory access controller circuit is configured to transport data based on source and target addresses; wherein the direct memory access controller circuit is configured to move trace data information from the one or more memory circuits to the trace data information port, when it is determined that trace data information is available in the one or more memory circuits and that trace data information can be received by the trace data information port; and wherein the direct memory access controller circuit is directly connected to the on-chip bus.