Patent ID: 7928874
Filing Date: 2011-04-19
Classification: H03M

Abstract:
1. An analog to digital converter (ADC), comprising: a track-and-hold circuit configured to provide a track-and-hold output based on a signal received at an input of the ADC and based on whether the track-and-hold circuit is operating in a track mode or a hold mode; a comparator configured to provide a comparator output based on the track-and-hold output, the comparator comprising a first pair of cross-coupled transistors, a second pair of cross-coupled transistors, and a differential pair of transistors; and a dynamic power circuit configured to selectively turn on and off the first pair of cross-coupled transistors, the second pair of cross-coupled transistors, and the differential pair of transistors based on whether the track-and-hold circuit is operating in a first or second phase of time associated with the track mode, or in a third or fourth phase of time associated with the hold mode, wherein the first phase occurs before the second phase, and the third phase occurs before the fourth phase.