Patent ID: 8055854
Filing Date: 2011-11-08
Classification: G06F,Y02D

Abstract:
1. A system comprising: a memory device having a converting part, a first memory array part and a second memory array part; a first processor configured to process a first data with a first data width, configured to selectively access the first memory array part and configured to selectively access the second memory array part; and a second processor configured to process a second data with a second data width different from the first data width, configured to selectively access the second memory array part and configured to selectively access the first memory array part, wherein the converting part is configured to convert the first data width of the first data into the second data width and is configured to store the converted first data in the second memory array part, and the converting part is configured to convert the second data width of the second data into the first data width, and is configured to store the converted second data in the first memory array part.