Patent ID: 8058676
Filing Date: 2011-11-15
Classification: H01L

Abstract:
1. A spin transistor, comprising: a semiconductor substrate including a channel layer having a 2-dimensional electron gas structure and upper and lower cladding layers disposed respectively at upper and lower sides of the channel layer; ferromagnetic source and drain electrodes formed on the semiconductor substrate and disposed spaced apart from each other in a longitudinal direction of the channel layer; a gate electrode disposed between the source electrode and the drain electrode, formed on the semiconductor substrate such that a gate voltage applied thereto controls the spin of electrons passed through the channel layer; a first electrical charge supply layer disposed at a lower side of the lower cladding layer to supply carriers to the channel layer; and a second electrical charge supply layer disposed at an upper side of the upper cladding layer to supply carriers to the channel layer; wherein the channel layer is formed with a double channel structure of a first channel layer and two second channel layers, wherein the first channel layer has a first band gap, and the two second channel layers have a higher second band gap than the first band gap and are disposed at upper and lower sides of the first channel layer so that the first channel layer is sandwiched therebetween; and wherein the first channel layer is asymmetrically disposed in the channel layer.