Patent ID: 9026867
Filing Date: 2015-05-05
Classification: G06F,G11C

Abstract:
1. An electronically-implemented method of adapting to changing characteristics of multi-level flash cells, the method comprising: storing data in pages of a memory device having multi-level cells, wherein two or more bonded pages share a set of multi-level cells, wherein a multi-level cell is configured to store a first bit for a first page and a second bit for a second page of the bonded pages; arranging the pages of the memory device into a plurality of page stripes for storage of data, using the first page stripe and the second page stripe of the bonded page stripe to store data; determining a first estimated bit error rate (first BER) for the first page stripe and a second estimated bit error rate (second BER) for the second page stripe during field use of the memory device, wherein none of the first page stripe or the second page stripe is associated with gear zero at the time of determining the first BER and the second BER, wherein gear zero corresponds to a zero journaling cell slot capacity; and when at least one of the first BER or the second BER exceeds a first predetermined threshold, associating gear zero with a selected one of the first page stripe or the second page stripe.