Patent ID: 6711029
Filing Date: 2004-03-23
Classification: H01L,H05K,Y10T

Abstract:
A multilayered low temperature co-fired ceramic assembly comprising:a) a planar ceramic core including: a1) a second ceramic layer having a second dielectric constant; a2) a third ceramic layer adjacent to the second ceramic layer, the third ceramic layer having a second third dielectric constant, the ceramic core shrinking in three axes during firing; b) a first ceramic layer having a first dielectric constant; c) a fourth ceramic layer having a fourth dielectric constant, the ceramic core located between the first and the fourth ceramic layers, the first and fourth ceramic layers shrinking during firing so as to converse mass in a direction perpendicular to the layers; d) a plurality of electrically conductive vias, one of the conductive vias extending through at least two of the first, second, third and fourth ceramic layers; and e) a plurality of circuit features located on the first, second, third and fourth ceramic layers, the vias electrically connecting the circuit features on the layers.