Patent ID: 8975129
Filing Date: 2015-03-10
Classification: H01L

Abstract:
1. A method for making an integrated circuit (IC), the method comprising: providing a substrate having a first region, a second region and a third region; forming a plurality of mandrel features in the first and the second regions, wherein a mandrel feature spacing between two adjacent mandrel features in the first region is larger than a mandrel feature spacing in the second region; forming a first spacer along sidewalls of the mandrel features; forming a second spacer along sidewalls of the first spacer, wherein two back-to-back adjacent second spacers are separate by a gap in the first region, and merge together in the second region; depositing a dielectric layer over the substrate, including the mandrel features and the first and second spacers; forming a dielectric feature in the second spacing; performing a first cut to remove a first subset of the first spacers; coincident with removing the first subset of the first spacers, forming a dielectric mesa in the third region; removing the mandrel features and the second spacers; and etching the substrate using the first spacer, the dielectric feature, and the dielectric mesa as an etch mask.