Patent ID: 6271092
Filing Date: 2001-08-07
Classification: H01L,Y10S

Abstract:
A method for fabricating a semiconductor device, comprising:forming a first oxide layer on a semiconductor substrate comprising a memory cell unit and an input/output circuit unit;removing selectively the first oxide layer on the memory cell unit;forming a photoresist layer on the first oxide layer of the input/output circuit unit and on the semiconductor substrate of the memory cell unit;forming openings on regions where gate eletrodes will be formed by patterning the photoresist layer;forming an oxygen containing layer by implanting oxygen ions into the semiconductor substrate at the memory cell unit through the openings;removing the photoresist layer;forming a trench inside of the semiconductor substrate of the memory cell unit by removing the oxygen containing layer;etching the first oxide layer on the input/output circuit unit to a certain thickness;forming gate electrodes on the first oxide layer on the input/output circuit unit and the trench at the memory cell unit, respectively;forming impurity regions by implanting ions into the semiconductor substrate at both sides of the gate electrodes;forming sidewall spaces on the both sides of the gate electrodes; andforming source/drain regions by implanting impurity ions into the semiconductor substrate by using the sidewall spacers as a mask.