Patent ID: 6504741
Filing Date: 2003-01-07
Classification: G11C,H01L

Abstract:
A semiconductor device, comprising:a semiconductor substrate; a plurality of cells regularly disposed on one surface of said semiconductor substrate, each said cell including a first transistor and a second transistor, each of said first and second transistors including a first current terminal, a second current terminal, and a gate terminal for controlling a conduction state between said first and second terminals, said second current terminal of said first transistor being connected to said gate terminal of said second transistor; a bit line connected to said first current terminals of said first transistors of part of said cells; a word line connected to said gate terminals of said first transistors of part of said cells; a first wiring connected to a point in a circuit connected to said first current terminal of said second transistor of part of said cells; a second wiring connected to a point of a circuit connected to said second current terminal of said second transistor of each of cells selected from said cells; a bit line driver for setting said bit line to either one of a first voltage state and a second voltage state with a voltage higher than a voltage of the first voltage state; a first voltage generator circuit for generating a third voltage on said first wiring, said third voltage being higher than said first voltage and lower than said second voltage; a second voltage generator circuit for generating a fourth voltage on said second wiring, said fourth voltage being higher than said third voltage and equal to or lower than said second voltage; and a voltage detector circuit for detecting a voltage appearing on said second wiring.