Patent ID: 7711914
Filing Date: 2010-05-04
Classification: G06F

Abstract:
1. In a computer system, wherein the computer system comprises a processor including a plurality of watchpoint registers supporting a maximum number of hardware watchpoints, a computer-implemented method comprising: using the processor watchpoint registers to set the maximum number of hardware watchpoints in the processor on a plurality of regions of memory in the computer system; expressly registering non-suspect computer program code, wherein access to a region of memory identified as protected against access by said non-suspect computer code does not trigger a virtual memory trap; executing a computer program code on an operating system of said computer system, wherein said computer program code comprises the expressly registered non-suspect computer program code and default computer program code identified as suspect; receiving notification of the virtual memory trap; determining whether the virtual memory trap was triggered by an access to the region of memory identified as protected against access; if it is determined that the virtual memory trap was triggered by an access to the region of memory identified as protected against access, determining whether the virtual memory trap was triggered by the execution of the default computer program code identified as suspect; and if it is determined that the virtual memory trap was triggered by execution of the default computer code identified as suspect, halting the execution of the computer program code on the operating system, signaling a fault to a debugger and passing control to the debugger executing on the computer system.