Patent ID: 7148139
Filing Date: 2006-12-12
Classification: H01L

Abstract:
1. A method for forming a metal wiring of a semiconductor, comprising: forming an inter metal dielectric layer on a semiconductor substrate having a predetermined low structure with a conductive layer; forming a plurality of contact holes to expose the conductive layer through the inter metal dielectric layer; forming a first titanium nitride layer on sidewalls of the contact holes; plasma processing the first titanium nitride layer; forming a first titanium silicon nitride layer on the first titanium nitride layer; forming a second titanium nitride layer on the first titanium silicon nitride layer; plasma processing the second titanium nitride layer with a mixture of N forming a second titanium silicon nitride layer on the second titanium nitride layer; forming metal plugs on the second titanium silicon nitride layer; polishing the metal plugs, the first titanium silicon nitride layer, and the first titanium nitride layer to expose the inter metal dielectric layer; and forming metal wirings to cover the contact holes.