Patent ID: 7795928
Filing Date: 2010-09-14
Classification: H03K

Abstract:
1. A selection circuit, comprising: a logic circuit adapted to receive a control signal for enabling said selection circuit; an array of sub-circuits comprising a first group of sub-circuits and a second group of sub-circuits, wherein an output of said logic circuit is electrically connected to an input of each sub-circuit of said first group of sub-circuits, wherein said first group of sub-circuits comprises greater than two sub-circuits, and wherein said second group of sub-circuits comprises greater than two sub-circuits; a first switching circuit, wherein an output of each sub-circuit of said first group is electrically connected to an input of said first switching circuit, wherein an output of said first switching circuit is electrically connected to an input of each sub-circuit of said second group of sub-circuits, and wherein said first switching circuit is adapted to select a first sub-circuit from said first group in response to a first select signal applied to said first switching circuit; and a second switching circuit, wherein an output of each sub-circuit of said second group is electrically connected to an input of said second switching circuit, wherein an output of said second switching circuit is electrically connected to an input of said logic circuit, wherein said second switching circuit is adapted to select a second sub-circuit from said second group in response to a second select signal applied to said second switching circuit, wherein said selection circuit is adapted to be subjected to a first operating condition and generate a first frequency, wherein said selection circuit is adapted to be subjected to a second operating condition and generate a second frequency, wherein a first frequency differential between said first frequency and said second frequency is adapted to be compared to a predetermined frequency differential to determine if said first frequency differential is about equal to said predetermined frequency differential, wherein an output of said selection circuit is electrically connected to a process circuit electrically connected to a reference circuit configured to generate said predetermined frequency differential, and wherein an input of said selection circuit is electrically connected to a control unit electrically connected to memory unit.