Patent ID: 9076510
Filing Date: 2015-07-07
Classification: G11C

Abstract:
1. A power mixing circuit, comprising: an input buffer configured to operate using a first supply voltage having a first voltage level, and to generate a first voltage signal in response to an input signal; a power mixing control circuit configured to generate a power mixing control signal based on a power-up signal and a power-down mode signal, the power-up signal generated when an external supply voltage rises up, and the power-down mode signal generated when a semiconductor device operates in a first mode; a power mixing driver configured to operate using the external supply voltage and a second supply voltage having a second voltage level, to perform power mixing on the external supply voltage and the second supply voltage, and to generate a second voltage signal in response to the first voltage signal and the power mixing control signal; and an output buffer configured to operate using the second supply voltage, and to generate an output signal in response to the second voltage signal.