Patent ID: 8181146
Filing Date: 2012-05-15
Classification: G06F

Abstract:
1. A method for performing equivalency checking between circuit designs, the method executed by one or more processors configured to perform a plurality of operations, the operations comprising: partitioning a first circuit design into first logic cones, wherein each first logic cone comprises at least one first compare point associated therewith; partitioning a second circuit design into second logic cones, wherein each second logic cone comprises at least one second compare point associated therewith; comparing the first and second logic cones for equivalency by determining whether the at least one first compare point is equal to the at least one second compare point; in response to a determination that the first compare point is not equal to the at least second compare point, identifying stuck-at constant registers feeding a nonequivalent logic cone among the first logic cones; in response to a determination that the first compare point is not equal to the at least second compare point, propagating a constant value associated with the stuck-at constant registers; and in response to a determination that the first compare point is not equal to the at least second compare point, repeating the comparing of the first and second logic cones subsequent to inserting the propagated constant values in one of the first or second logic cones.