Patent ID: 8917196
Filing Date: 2014-12-23
Classification: H03M

Abstract:
1. A sampling circuit comprising: a continuous section for transmitting a continuous signal; a sampling and holding section for operating in response to a first clock signal, connected to the continuous section to transmit a signal which is sampled but is not quantized; and a digital section connected to the sampling and holding section to transmit a signal which is sampled and quantized, wherein the first clock signal is a signal in which jitter is added to a basic clock signal, wherein the continuous section samples an input analog signal, wherein the sampling and holding section holds the signal sampled by the continuous section, wherein the continuous section operates in response to a second clock signal, wherein the second clock signal is a signal in which the jitter is not added to the basic clock signal, and wherein the first clock signal and the second clock signal have a reverse-phased and non-overlapping relationship.