Patent ID: 7245685
Filing Date: 2007-07-17
Classification: H04J

Abstract:
1. A timing distribution apparatus comprising: a source for producing a signal, the source includes an oscillator that produces the signal; a first filter for removing jitter from the signal, the first filter includes a first tuneable directed digital synthesizer connected to the source for producing a first clock signal derived from the signal from the source, the first filter includes a reference input clock signal mechanism for providing a reference input clock signal with respect to the first clock signal, the first filter includes a first comparison mechanism which accumulates error between the first clock signal and a reference input clock signal and produces an error correction signal to tune the directed digital synthesizer, the first comparison mechanism includes a microcontroller which accumulates the error between the first clock signal and the reference input clock signal for a predetermined number of consecutive cycles, and applies dithering to the accumulated error to produce the error correction signal; and a second filter for removing wander from the signal separate and apart from the first filter.