Patent ID: 7571416
Filing Date: 2009-08-04
Classification: G06F

Abstract:
1. An automatic design device comprising: a calculating section that calculates a plurality of additional geometries added to a plurality of basic geometries including wiring lines and vias arranged on a chip region and stores the calculation result in a wiring storage section; a classifying section that reads the calculation result on the plurality of additional geometries from the wiring storage section, classifies the plurality of additional geometries into at least an additional geometry required for manufacture and an additional geometry required for circuit characteristics in accordance with a division and characteristics of the plurality of additional geometries in order to manufacture the basic geometries on the chip region, and stores the classification result into a classification storage section; and an analyzing section that extracts at least one of the plurality of additional geometries through the classification result in accordance with a purpose of analysis and analyzes characteristics of the basic geometries.