Patent ID: 6804147
Filing Date: 2004-10-12
Classification: G11C

Abstract:
A nonvolatile memory apparatus comprising:a plurality of terminals including a clock terminal, a command terminal and other terminal; a converter circuit; and a plurality of nonvolatile memory cells, wherein said clock terminal receives a clock signal, wherein said command terminal receives commands which include a read command and a program command, wherein in an operation in response to said read command received from said command terminal, said nonvolatile memory apparatus is capable of reading data in parallel from ones of said nonvolatile memory cells, converts parallel type data to serial type data by said converter circuit and serially outputs data via said other terminal not said command terminal in response to said clock signal, and wherein in an operation in response to said program command, said nonvolatile memory apparatus serially receives data via said other terminal not said command terminal in response to said clock signal, converts serial type data to parallel type data by said converter circuit and is capable of writing data in parallel to ones of said nonvolatile memory cells.