Patent ID: 9070550
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a first unit transistor formed in a first area in planar view of the semiconductor device, the first unit transistor including a first source region and a first drain region in the semiconductor substrate; a second unit transistor formed in a second area in planar view of the semiconductor device, the second unit transistor including a second source region and a second drain region in the semiconductor substrate; a first gate line corresponding to the first unit transistor and formed in a gate wiring layer on the semiconductor substrate; a second gate line corresponding to the second unit transistor and formed in said gate wiring layer; wherein each of the first gate line and the second gate line have a longitudinal axis extending parallel to each other and contained within the gate wiring layer; a connection line that connects the first gate line and the second gate line, the connection line having a longitudinal axis extending in a different direction from the longitudinal axis of the first gate line and the second gate line, the connection line being spaced apart the first gate line and the second gate line and contained in said gate wiring layer so that the connection line and the first gate line and the second gate line are disposed in a same plane, and the connection line is formed in a middle area between the first and second areas in planar view of the semiconductor device; a first gate connection line formed in a first wiring layer above said gate wiring layer and coupled to the first gate line and the connection line via a through hole; a second gate connection line formed in said first wiring layer above said gate wiring layer and coupled to the second gate line and the connection line via a through hole, wherein the first gate connection line and the second gate connection line are separately and respectively contained within the first wiring layer of the first area and the second area.