Patent ID: 7834670
Filing Date: 2010-11-16
Classification: H03F,H03K

Abstract:
1. An input circuit, comprising: a first buffer circuit having an output signal terminal connected to an output; a capacitor having one end connected to an input signal terminal, and the other end connected to an input of the first buffer circuit; a first differential amplification circuit receiving a voltage of a first external power source terminal and an output of a second buffer circuit; a second differential amplification circuit receiving a voltage of a second external power source terminal and an output of a third buffer circuit; a first resistance having one end connected to an output of the first differential amplification circuit, and the other end connected between the capacitor and the first buffer circuit; and a second resistance having one end connected to an output of the second differential amplification circuit, and the other end connected between the capacitor and the first buffer circuit, wherein: an input of the second buffer circuit is connected to the output of the first differential amplification circuit, and an input of the third buffer circuit is connected to the output of the second differential amplification circuit.