Patent ID: 7683694
Filing Date: 2010-03-23
Classification: H03D

Abstract:
1. A logarithmic detector circuit, comprising: a drive circuit to receive a modulated input signal and generate a buffered modulated signal; a signal shaping circuit coupled to the drive circuit and configured to shape a voltage range of the buffered modulated signal to generate a shaped modulated signal; and a detecting circuit to detect the shaped modulated signal to generate an output signal substantially proportional to a logarithm of an amplitude of the modulated input signal, wherein the signal shaping circuit comprises: a first signal range shaper to shape an upper end of the voltage range of the buffered modulated signal, the first signal range shaper including a first diode, an anode of the first diode being coupled to receive the buffered modulated signal, and the first diode being configured to limit the upper end of the voltage range of the buffered modulated signal not to exceed a predetermined voltage; and a second signal range shaper to shape a lower end of the voltage range of the buffered modulated signal, the second signal range shaper including a second diode, a cathode of the second diode being coupled to receive the buffered modulated signal, and the second diode being configured to limit the lower end of the voltage range of the buffered modulated signal.