Patent ID: 6157058
Filing Date: 2000-12-05
Classification: H01L

Abstract:
An electrically programmable memory device which has greater efficiency of electron injection from the channel to the floating gate comprising:a substrate having source and drain regions with a channel therebetween;a floating gate structure over portions of said source and drain regions and said channel, which structure includes a dielectric layer and a conductor layer thereover;said channel under said floating gate having both horizontal and vertical components;said horizontal and vertical components are a horizontal channel and a vertical channel, and a vertical channel is adjacent to said drain region and said horizontal channel is adjacent to said source region which device provides in operation accelerated electrons in the horizontal channel are injected straight in the direction of momentum into the vertical channel and the vertical portion of said floating gate structure over said vertical channel;an extension of said horizontal channel is covered with another control gate (not floating); andsaid vertical and step channel are covered with a floating gate whereby said horizontal channel and the vertical channel are electrically controlled by two separate gates to allow injecting electrons to move straight in the direction of motion, into the vertical floating gate.