Patent ID: 8987088
Filing Date: 2015-03-24
Classification: H01L

Abstract:
1. A method of manufacturing a nonvolatile semiconductor memory device, the method comprising: forming first and second stacked layer structures each comprising active area layers, the active area layers stacked in a first direction and extending in a second direction which intersects with the first direction, the first and second stacked layer structures arranged in a third direction which intersects with the first and second directions; forming a gate insulating layer structure covering the first and second stacked layer structures; forming a first conductive layer on the gate insulating layer structure, a space between the first and second stacked layer structures not filled with the first conductive layer; forming a sacrifice layer on the first conductive layer, the space between the first and second stacked layer structures filled with the sacrifice layer; patterning the first conductive layer and the sacrifice layer with a line & space pattern comprising lines and spaces extending in the third direction; filling an insulating layer in the spaces of the line & space pattern, the insulating layer having an etching characteristic different from the sacrifice layer; forming trenches in the lines of the line & space pattern by removing the sacrifice layer selectively, the trenches exposing the first conductive layer between the first and second stacked layer structures; and forming a second conductive layer on the first conductive layer in the trenches.