Patent ID: 7516037
Filing Date: 2009-04-07
Classification: G11C

Abstract:
1. A method for evaluating a memory storage device, comprising the steps of: applying a low READ signal to the memory storage device; while applying said low READ signal to the memory storage device, applying a “0” to a programming node of the memory storage device; while applying the “0” to a programming node of the memory storage device, applying a high READ signal to the memory storage device and measuring a first output voltage of the memory storage device; applying the low READ signal to the memory storage device; while applying said low READ signal to the memory storage device, applying a test signal to a programming node of the memory storage device, said test signal being less than a designed threshold level; while applying the test signal to a programming node of the memory storage device, applying the high READ signal to the memory storage device and measuring a second output voltage of the memory storage device; comparing said first output voltage to said second output voltage, wherein a difference between said first output voltage to said second output voltage less than a predetermined amount indicates proper configuration of the memory storage device.