Patent ID: 8816328
Filing Date: 2014-08-26
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of forming a field effect transistor, comprising: providing a substrate having a carbon nanotube disposed over a surface of the substrate; forming a protective electrically insulating layer over the carbon nanotube; forming a first multi-layer resist stack over the protective electrically insulating layer, the first multi-layer resist stack comprising a bottom layer, an intermediate layer and a top layer of resist; patterning and selectively removing a portion of the first multi-layer resist stack to define an opening for a gate stack, where selectively removing also completely removes the intermediate layer and the top layer of resist leaving the bottom layer; selectively removing a portion of the protective electrically insulating layer within the opening to expose a first portion of the carbon nanotube; forming the gate stack within the opening and upon the exposed first portion of the carbon nanotube; forming a second multi-layered resist stack upon the bottom layer and upon the gate stack; patterning and selectively removing a portion of the second multi-layer resist stack to define adjacent to and self-aligned with the gate stack an opening for a source contact and an opening for a drain contact; selectively removing a portion of the protective electrically insulating layer within the source contact opening and within the drain contact opening to expose a second portion of the carbon nanotube and a third portion of the carbon nanotube, where selectively removing the portion of the protective electrically insulating layer within the source contact opening and within the drain contact opening to expose the second portion of the carbon nanotube and the third portion of the carbon nanotube exposes the entire circumference of the second portion and the third portion of the carbon nanotube that are adjacent to the gate stack such that the exposed second and third portions of the carbon nanotube that are adjacent to the gate stack are suspended above the surface of the substrate; and applying contact material within the source contact opening and within the drain contact opening and upon the exposed second and third portions of the carbon nanotube, where the exposed suspended second and third portions of the carbon nanotube that are adjacent to the gate stack are overcoated with and electrically conductively coupled to the contact material to form a wrap-around source contact and a wrap-around drain contact.