Patent ID: 6903576
Filing Date: 2005-06-07
Classification: H03K

Abstract:
1. An improved voltage translator for digital electronic circuits providing reduced rise times, fall times and transition times that remain independent of operating conditions, comprising: a first high-voltage switch driven by the input low-voltage signal; a second high-voltage switch driven by the complement of the input low-voltage signal, in which (a) the output of the first high-voltage switch enabling an active switched load connected to the output of the second high-voltage switch when the first high-voltage switch is OFF and disabling it when the first high-voltage switch is ON, (b) the output of the second high-voltage switch enabling an active switched load connected to the output of the first high-voltage switch when the second high-voltage switch is OFF and disabling it when the second high-voltage switch is ON, and (c) the output from the low-to-high voltage translator being provided by the output from the second high-voltage switch; a switched active pull-up at the output of the first high-voltage switch, controlled by the input low-voltage signal and gated by the output from the low-to-high-voltage translator; and a switched active pull-down at the output of the first high-voltage switch, controlled by the input low-voltage signal and gated by the complement of the output from the low-to-high-voltage translator, so at to provide regenerative pull-up and pull-down that also counteracts the bootstrap capacitance at the output of the first high-voltage switch.