Patent ID: 7499321
Filing Date: 2009-03-03
Classification: G06F

Abstract:
1. A semiconductor integrated circuit comprising: a reset control section that, when a first reset signal is inputted, outputs a second reset signal and an input/output control signal, the second reset signal being at a first logical level and, after expiration of a first period, switching to a second logical level, and the input/output control signal activating only during a second period, which is shorter than the first period, before the expiration of the first period; an input/output port that is connected with a controlled device and a mode identification signal generation unit which generates a mode identification signal corresponding to the controlled device, the input/output port functioning as an input port to input the mode identification signal only in the second period of the input/output control signal, and the input/output port functioning as an output port outside the second period; and an access control section that implements switching of an operation mode and implements control of access to the controlled device on the basis of the mode identification signal inputted by the input/output port by resetting by the first logical level of the second reset signal and the reset being released by the second logical level of the second reset signal.