Patent ID: 7456912
Filing Date: 2008-11-25
Classification: G02F

Abstract:
1. A process for fabricating an organic thin film transistor array substrate, comprising the following steps: providing a substrate divided into an LCD region and an OTFT region; forming a gate on the substrate in the OTFT region; forming a dielectric layer in the LCD and OTFT regions to cover the gate; patterning the dielectric layer to concurrently form a first dielectric layer having a first uneven portion in the LCD region and a second dielectric layer having a second uneven portion in the OTFT region, wherein the second dielectric layer is lower than the first dielectric layer, and the second dielectric layer is not formed in the LCD region; forming an organic semiconducting layer on the second dielectric layer in the OTFT region; forming a conductive layer in the LCD and OTFT regions; and patterning the conductive layer to concurrently form a pixel electrode on the first uneven portion of the first dielectric layer in the LCD region and a source and drain in the OTFT region, such that the source and drain are in contact with the organic semiconducting layer to form a channel between the source and drain, and the second uneven portion has alignment property, such that the organic semiconducting layer aligns according to the alignment of the second uneven portion.