Patent ID: 7326613
Filing Date: 2008-02-05
Classification: H01L

Abstract:
1. A method of forming a semiconductor device comprising: forming conductive structures on a substrate, each of the conductive structures having a line shape along a first direction parallel to the substrate; forming an insulation layer pattern that covers lower sidewalls of the conductive structures; forming an etch stop layer on the insulation layer pattern and the upper sidewalls of the conductive structures; forming insulating spacers on upper sidewalls of the conductive structures; forming an insulating interlayer that covers the conductive structures; etching a portion of the insulating interlayer between the conductive structures to form a contact hole, wherein an upper portion of the contact hole is larger than a lower portion thereof, the upper portion of the contact hole has a first width along the first direction and a second width along a second direction parallel to the substrate and substantially perpendicular to the first direction, and the first width is substantially larger than the second width; and filling the contact hole with a conductive material to form a contact plug, wherein forming the contact hole further comprises: forming a mask pattern on the insulating interlayer, the mask pattern selectively exposing a portion of the insulating interlayer between the conductive structures; partially removing a portion of the insulating interlayer exposed through the mask pattern to form a first opening; extending the size of the first opening along the first direction to form a second opening; removing a portion of the etch stop layer and the insulation layer pattern through the second opening to form a third opening, wherein a cross sectional area, parallel to the substrate, of a lower portion of the third opening is substantially smaller than that of an upper portion of the second opening; and removing the mask pattern.