Patent ID: 6750494
Filing Date: 2004-06-15
Classification: H01L

Abstract:
A semiconductor structure for formation of a semiconductor device having a sublithographic buried contact therein, the assembly comprising:a plurality of transistor gate structures and word lines adjacent a buried contact area on a substrate, the word lines lying in substantially parallel relation to one another and defining a first gap between word lines peripheral to the buried contact and a second gap between word lines atop the buried contact, which second gap is wider than the first gap; an insulator layer deposited over and adjacent the gate structures, word lines, buried contact area, and substrate; and a removable spacer layer deposited over the insulator layer substantially filling the first gap, partially filling the second gap, and defining a sublithographic dimension between removable spacer walls formed over the buried contact area, the removable spacer walls being formed by the removable spacer layer adjacent the plurality of gate structures, wherein the removable spacer layer provides an enhanced etching selectivity in relation to the insulator layer and is adapted to be completely removed when isotropically etched.