Patent ID: 7053900
Filing Date: 2006-05-30
Classification: G06F,G09G

Abstract:
1. A personal computer system comprising: a microprocessor; a core logic unit outputting first image data in a linear mode; a graphics accelerator in communication with said core logic unit for processing said first image data into second image data in a linear mode; a first tile converter in communication with said graphics accelerator for converting said second image data into third image data in a tile mode; a local memory in communication with said first tile converter for storing therein said third image data; a second tile converter in communication with said core logic unit for converting said first image data received from said core logic unit into fourth image data in a tile mode; and a system memory accessible by said microprocessor via said core logic unit and said second tile converter that is disposed between said core logic unit and said system memory, and comprising a graphics accelerating memory for storing therein said fourth image data received from said second tile converter.