Patent ID: 8093649
Filing Date: 2012-01-10
Classification: H01L

Abstract:
1. A flash memory cell comprising: a substrate having a surface; a trench formed in the substrate, wherein the trench has a sidewall that meets the surface to form a sharp edge; a source and two drains are formed in the substrate separately, wherein the source is disposed between the drains, wherein the source is disposed underneath the trench, and the drains are disposed on opposite sides of the trench, wherein the source and the drains are doped with N-type ions; a floating gate disposed in the trench adjacent to the sidewall of trench, wherein the floating gate is doped with P-type ions; a control gate disposed over the substrate; a first oxide surrounding the floating gate; and a second oxide disposed on the control gate, wherein the first oxide extends on the side of both the control gate and the second oxide.