Patent ID: 6861330
Filing Date: 2005-03-01
Classification: H01L

Abstract:
1. A method of enhancing a semiconductor structure so as to inhibit dielectric degradation, the method comprising: forming at least one inhibiting layer to define a chamber having an aperture and at least two sidewalls that extend outwardly from the aperture, wherein the at least one inhibiting layer includes a nitride compound; forming a first conductive layer on the at least one inhibiting layer such that the aperture of the chamber of the at least one inhibiting layer exposes a portion of the first conductive layer; annealing the semiconductor structure, wherein annealing includes annealing in a temperature of about greater than or about equal to 100 degrees Celsius, and wherein annealing includes annealing in a gaseous ambient selected from a group consisting of N forming a dielectric layer on the first conductive layer, wherein the dielectric layer includes an oxide compound; forming a second conductive layer on the dielectric layer; and wherein the forming of at least one inhibiting layer includes forming a first, a second, a third, and a fourth inhibiting layers, wherein the forming of the third inhibiting layer includes etching the first inhibiting layer, the dielectric layer, the second conductive layer, and the third inhibiting layer to form two edges, and wherein the forming of the at least one inhibiting layer includes etching the fourth inhibiting layer so as to form a first spacer abutting one of the two edges and a second spacer abutting the other of the two edges.