Patent ID: 9112020
Filing Date: 2015-08-18
Classification: H01L,Y10S

Abstract:
1. A transistor device comprising: a semiconductor substrate; a confining layer disposed on the semiconductor substrate and configured to confine impurity ions diffused from the semiconductor substrate to the confining layer; a well region including the confining layer and a portion of the semiconductor substrate, wherein the well region is ion-implanted; an epitaxial silicon layer disposed on the confining layer that is ion implanted; a gate structure disposed on the epitaxial silicon layer, wherein a portion of the epitaxial silicon layer includes an intrinsic channel region; a germanium-silicon carbide (GeSiC) implantation region in the epitaxial silicon layer on both sides of the gate structure; and a source region and a drain region each including a portion of each of: the GeSiC implantation region in the epitaxial silicon layer, the ion-implanted confining layer, and the portion of the semiconductor substrate in the well region.