Patent ID: 7074674
Filing Date: 2006-07-11
Classification: H01L

Abstract:
1. A method for manufacturing a one-time electrically programmable read only memory, comprising the steps of: providing a substrate; forming a tunneling dielectric layer over the substrate; forming a first conductive layer over the tunneling dielectric layer; forming a first patterned mask layer over the first conductive layer; removing a portion of the first conductive layer, the tunneling dielectric layer and the substrate using the first patterned mask layer as a mask and forming a device isolation structure therein; removing a portion of the first patterned mask layer to expose a portion of the first conductive layer destined to form a floating gate; forming a cap layer over the exposed first conductive layer; removing the first patterned mask layer; forming a second conductive layer over the substrate; forming a second patterned mask layer over the second conductive layer; removing a portion of the second conductive layer and the first conductive layer using the second patterned mask layer and the cap layer as a mask to form a word line and a floating gate; removing the second patterned mask layer; and forming doped regions in the substrate on both the outer sides of the word line and the floating gate and also between the word line and the floating gate.