Patent ID: 7242059
Filing Date: 2007-07-10
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a P-type semiconductor substrate; a P-channel DMOS transistor disposed on the P-type semiconductor substrate and including a drain formed of the P-type semiconductor substrate and a source formed in the P-type semiconductor substrate on a main surface of the P-type semiconductor substrate; and a CMOS transistor disposed on the P-type semiconductor substrate and including a P-channel MOS transistor formed in an N-type region formed in the P-type semiconductor substrate on the main surface of the P-type semiconductor substrate and an N-channel MOS transistor formed in a P-type region formed in the P-type semiconductor substrate on the main surface of the P-type semiconductor substrate, the P-type region being electrically isolated from the P-type semiconductor substrate by the N-type region.