Patent ID: 7969885
Filing Date: 2011-06-28
Classification: H04J,H04L

Abstract:
1. An arrangement for adjusting a degree of filling of a jitter buffer, to which jitter buffer there is connected a read-out unit for reading digital data from said jitter buffer, wherein the arrangement includes a processing unit, which is arranged: to compose, as a response to receiving a protocol unit, a time reserve indicator for the protocol unit, the time reserve indicator being essentially the difference of a first order indicator connected to the protocol unit and a second order indicator connected to an operational cycle of the read-out unit, the first order indicator expressing a position of digital data contained by the protocol unit in a timewise reading order of digital data to be read from the jitter buffer, and the second order indicator expressing a position of digital data that is being read from the jitter buffer during the operational cycle in the timewise reading order, to make a decision for increasing the degree of filling of the jitter buffer at least partly on a basis of the time reserve indicator of the protocol unit, and to increase the degree of filling of the jitter buffer as a response to a situation where the decision is positive, wherein the decision is positive as a response to one of the following situations: (i) a situation where during a predetermined period of time, there is received at least a predetermined quantity of protocol units whose time reserve indicator is smaller than a predetermined additive threshold value, or (ii) a situation where in the course of a predetermined number of protocol units received in succession, there is contained at least a predetermined share of protocol units having a time reserve indicator that is smaller than a predetermined additive threshold value.