Patent ID: 6593197
Filing Date: 2003-07-15
Classification: H01L

Abstract:
A method of forming a field-effect transistor in an integrated circuit, comprising the steps of:(a) providing a semiconductor substrate having a surface; (b) forming a gate electrode over said surface, said gate electrode having a gate width and sidewalls along its width direction; (c) forming first sidewall spacers having a first lateral extension along said sidewalls of said gate electrode; (d) removing portions of said semiconductor substrate adjacent said first sidewall spacers, using said first sidewall spacers as a masking material for defining trenches and an active region; (e) forming device insulation features in said trenches by overfilling said trenches with insulating material, polishing said insulating material back until a gate cover layer that has been previously formed above the gate electrode is exposed, and etching said insulating material isotropically back; (f) removing said first sidewall spacers; and (g) performing at least one ion implantation process to form source and drain regions between said gate electrode and said device insulation features.