Patent ID: 9154119
Filing Date: 2015-10-06
Classification: H02M,H03K

Abstract:
1. A latching comparator, comprising: a switching logic circuit coupled to receive a latching signal, a first signal and a second signal, wherein the latching signal is a rectangular pulse waveform that may only be in either a first state or a second state; and an output circuit having an input terminal coupled to the switching logic circuit, wherein the input terminal of the output circuit is coupled to receive both the first and second signals through the switching logic circuit to compare the first signal and the second signal at the input terminal during the first state of the latching signal, wherein the input terminal of the output circuit is coupled to receive only one of the first and second signals through the switching logic circuit in response to a signal representative of an output terminal of the output circuit and in response to the latching signal being in the second state, and wherein the signal representative of the output terminal of the output circuit is responsive to the comparison of the first signal and the second signal at the input terminal during the first state of the latching signal.