Patent ID: 7528624
Filing Date: 2009-05-05
Classification: H03K

Abstract:
1. An output buffer, comprising a driver circuit coupled to receive a power supply voltage, the driver circuit operable to generate an output signal having either a first or a second output value, the output signal having a first slew rate transitioning between the first output value and the second output value, the driver circuit operable to detect a change in the power supply voltage and adjust the second output value to a new output value in proportion with the change in the power supply voltage, the driver circuit further operable to regulate the time for the output signal to transition between the first output value and the new output value to maintain the rate at which the output signal transitions between the first output value and the new output value substantially equal to the first slew rate, the driver circuit comprising: a final driver powered by the power supply voltage, the final driver operable to generate the output signal responsive to receiving a power up signal and a power down signal, the final driver operable to transition the output signal from the first output value to the second output value responsive to the power up signal being transitioned from a respective second value to a respective first value a first delay after the power down signal being transitioned from a respective second value to a respective first value, the final driver further operable to transition the output signal from the second output value to the first output value responsive to the power down signal being transitioned from the respective first value to the respective second value a second delay after the power up signal being transitioned from the respective first value to the respective second value; and a pre-driver receiving the power supply voltage and operable to generate the power up and power down signals at the respective first or second value for each signal, the pre-driver operable to transition the power up and power down signals between the respective first and second values to allow the final driver to transition the output signal between the first and second output values, the pre-driver further operable to detect the voltage change and adjust the first and second delays proportionally to the voltage change.