Patent ID: 6512696
Filing Date: 2003-01-28
Classification: G11C

Abstract:
A method of programming a SNNNS type non-volatile memory cell, said memory cell having a semiconductor substrate, a first diffusion region, a second diffusion region, said second diffusion region being spaced from said first diffusion region and both of them formed underlying the surface of said semiconductor substrate, a channel formed in said semiconductor substrate between said first diffusion region and said second diffusion region, a polysilicon gate and a stacked gate insulating layer including a top silicon nitride layer, an intermediate silicon nitride layer and a bottom silicon nitride layer formed between said polysilicon gate and said channel, said method comprising:applying a first programming voltage to said polysilicon gate; applying a second programming voltage lower than said first programming voltage to said first diffusion region; and grounding said second diffusion region and said semiconductor substrate; thereby to inject channel hot electrons to said intermediate silicon nitride layer to program said memory cell to a predetermined state.