Patent ID: 7059859
Filing Date: 2006-06-13
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising a MOS transistor and a diffused resistor layer that are formed on a semiconductor substrate, the method comprising: forming an isolation layer on the semiconductor substrate; forming a gate insulation film on the semiconductor substrate; forming the diffused resistor layer by doping with a low concentration of impurities a portion of the semiconductor substrate defined by the device isolation layer; forming a film of a gate electrode material on the device isolation layer and the gate insulation film; forming a mask on the film of the gate electrode material to cover portions of the film of the gate electrode material that correspond to a gate electrode of the MOS transistor and an area of the diffused resistor layer; etching the film of the gate electrode material using the mask so that the gate electrode and a damage prevention film are formed; forming a spacer insulation film over a surface of the semiconductor substrate on which the gate electrode and the damage prevention film are formed; and etching the spacer insulation film so that a sidewall spacer is formed on a sidewall of the gate electrode and another sidewall spacer is formed on a sidewall of the damage prevention film.