Patent ID: 9104628
Filing Date: 2015-08-11
Classification: G06F

Abstract:
1. A software transactional memory (STM) system to create a plurality of transactional locks for a plurality of respective portions of an array object, the system comprising: one or more processors; a first component configured to, in accordance with a determining step, determine whether a single transactional lock or the plurality of transactional locks is to be allocated for an array object based on a size of the array object, the size of the array object being less than a size threshold indicating that the single transactional lock is to be allocated for the array object, the size of the array object being greater than the size threshold indicating that the plurality of transactional locks is to be allocated for the array object; and a second component, implemented using at least one of the one or more processors, configured to create a first transactional lock for a first portion of the array object in response to a call from a first transaction that accesses the array object, the second component further configured to create a second transactional lock for a second portion of the array object in response to a call from a second transaction that accesses the array object and further in response to a determination that the plurality of transactional locks is to be allocated for the array object and further in response to a determination that an array of transactional locks has not been created for the array object to permit concurrent access to portions of the array object.