Patent ID: 8742521
Filing Date: 2014-06-03
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: a first step of forming a first interlayer insulating film over a substrate and then burying a plurality of first via holes and first wirings in the first interlayer insulating film so as to expose the first wirings thereby forming a first layer, a second step of forming at least two first magnetization pinning layers electrically insulated from each other over the first wiring in a first region over the first layer, a third step of completing an MRAM by forming a free magnetization layer overlapping the two first magnetization pinning layer in a plan view, and electrically connected with the first magnetization pinning layers, a non-magnetic layer situated over the free magnetization layer, and a second magnetization pinning layers situated over the non-magnetic layer, a fourth step of forming a second interlayer insulating film covering the MRAM, and a fifth step of burying a second via hole connected with the second magnetization pinning layer and a second wiring connected with the second via hole in the second interlayer insulating film.