Patent ID: 7418553
Filing Date: 2008-08-26
Classification: G06F,G11C,Y02D

Abstract:
1. A method of controlling electric power consumed for a translation lookaside buffer (TLB) within a central processing device having the TLB and an entry replacement mechanism wherein the TLB includes a plurality of entries and performs translation from a logical address to a physical address and the entry replacement mechanism replaces the entries of the TLB, the method comprising: selecting one or more entries among the plurality of entries of the TLB in accordance with one or more predefined criteria based on an output from the entry replacement mechanism, and stopping supply of electric power to the selected entries based on weight information, wherein the weight information is obtained by weighing individual information items including replacement order information on the plurality of entries, Page Table Entry PTE information, access interval information, external power reduction instruction signals and other priority determination conditions.