Patent ID: 7470596
Filing Date: 2008-12-30
Classification: H01L

Abstract:
1. A method of manufacturing a capacitor, comprising: forming a first insulating layer pattern on a silicon substrate; epitaxially growing a first silicon epitaxial growth layer on a region of the silicon substrate exposed by the first insulating layer pattern; forming a second insulating layer covering the first insulating layer pattern and the first silicon epitaxial growth layer; forming a mask on the second insulating layer exposing a surface of the second insulating layer corresponding to the first insulating layer pattern; selectively etching the second insulating layer and the first insulating layer pattern using the mask such that a lateral surface of the first silicon epitaxial growth layer is exposed and a second insulating pattern is formed on the first silicon epitaxial growth layer; forming a dielectric layer pattern on the exposed lateral surface of the first silicon epitaxial growth layer to form a spacer; and epitaxially growing a second silicon epitaxial growth layer on a region of the silicon substrate exposed by both of the dielectric layer pattern and the first silicon epitaxial growth layer, wherein the second silicon epitaxial growth layer is adjacent to and in contact with the dielectric layer pattern.