Patent ID: 6097245
Filing Date: 2000-08-01
Classification: H03F,H04L

Abstract:
A differential output amplifier arrangement (DOA) with reduced power consumption, the differential output amplifier arrangement including a first arrangement input terminal (IN1) and a second arrangement input terminal (IN2) for respectively coupling to a first terminal (1) and a second terminal (2) of an input signal source (Vs), said differential output amplifier arrangement (DOA) further including a first arrangement output terminal (ZOUT1) and a second arrangement output terminal (ZOUT2) for delivering a differential output voltage to an external electrical load between said first arrangement output terminal (ZOUT1) and said second arrangement output terminal (ZOUT2), said differential output amplifier arrangement (DOA) further includinga first operational amplifier (OA1) having a first amplifier input terminal (INP1) of a first polarity type (+), and coupled to said first arrangement input terminal (IN1), said first operational amplifier (OA1) having a second amplifier input terminal (INN1) of a second polarity type (-) opposite to said first polarity type, and an amplifier output terminal (OUT1) coupled to said first arrangement output terminal (ZOUT1),a second operational amplifier (OA2) having a first amplifier input terminal (INP2) of said first polarity type (+), and coupled to said second arrangement input terminal (IN2), said second operational amplifier (OA2) having a second input terminal (INN2) of said second polarity type (-), coupled via a first resistor (R1) with said second amplifier input terminal (INN1) of said first operational amplifier (OA1), said second operational amplifier (OA2) further including an output terminal (OUT2) coupled to said second arrangement output terminal (ZOUT2)said amplifier output terminal (OUT1) of said first operational amplifier (OA1) being coupled to said second amplifier input terminal (INN1) of said first operational amplifier (OA1) via a second resistor (R2),said output terminal (OUT2) of said second operational amplifier (OA2) being coupled to said second input terminal (INN2) of said second operational amplifier (OA2) via third resistor (R20), characterised in thatsaid amplifier output terminal (OUT1) of said first operational amplifier (OA1) is coupled via a fourth resistor (R3) to said first arrangement output terminal (ZOUT1),said output terminal (OUT2) of said second operational amplifier (OA2) is coupled via a fifth resistor (R30) to said second arrangement output terminal (ZOUT2),said first arrangement output terminal (ZOUT1) is coupled via a sixth resistor (R4) to said second input terminal (INN2) of said second operational amplifier (OA2),said second arrangement output terminal (ZOUT2) is coupled via seventh resistor (R40) to said second amplifier input terminal (INN1) of said first operational amplifier (OA1).