Patent ID: 6380066
Filing Date: 2002-04-30
Classification: H01L

Abstract:
A method of fabricating metal plugs within via openings, comprising the steps of:providing a semiconductor substrate having an overlying metal layer and oxide hard masks overlying said metal layer; using said oxide hard masks to etch said metal layer forming metal lines separated by metal line openings; forming an oxide liner over said etched structure; depositing a layer of FSG over said oxide liner; planarizing said FSG layer to remove the excess of said FSG layer from said etched structure and to remove the portions of said oxide liner over said oxide hard masks, forming FSG blocks within said metal line openings; depositing a cap layer over said planarized structure; patterning said cap layer and hard masks to form via openings through said cap layer and said hard mask layer, exposing said metal lines; and forming planarized metal plugs within said via openings wherein in said cap layer and hard masks patterning step, a central portion of said hard masks are etched, leaving a portion of said hard masks lining at least one side wall of said via openings adjacent the respective oxide liners in said via openings.