Patent ID: 6509797
Filing Date: 2003-01-21
Classification: H03F

Abstract:
An amplifier having output phase reversal suppression, comprising:an amplifier having different inputs, wherein one of the differential inputs is a positive input and the other differential input is a negative input; a first voltage comparing circuit having a positive input connected to the positive input of the amplifier and reading voltages thereon, a negative input connected to a first voltage and an output having first and second logic levels, wherein the output is at the first logic level when the positive input is at a voltage greater than or equal to the first voltage and the output is at the second logic level when the positive input is at a voltage less than the first voltage; a second voltage comparing circuit having a positive input connected to the negative input of the amplifier and reading voltages thereon, a negative input connected to the first voltage and an output having first and second logic levels, wherein the output is at the first logic level when the positive input is at a voltage greater than or equal to the first voltage and the output is at the second logic level when the positive input is at a voltage less than the first voltage; the first voltage comparing circuit output is connected to the first logic circuits of the amplifier such that when the first voltage comparing circuit output is at the second logic level the output of the amplifier is set to a minimum voltage level; and the second voltage comparing circuit output is connected to second logic circuits of the amplifier such that when the second voltage comparing circuit output is at the second logic level the output of the amplifier is set to a maximum voltage level.