Patent ID: 7001801
Filing Date: 2006-02-21
Classification: G02F,H01L

Abstract:
1. A method of manufacturing a semiconductor device including at least one TFT on an insulating surface, said method comprising: forming an active layer on the insulating surface; forming a gate insulating film on said active layer; introducing an n-type impurity element or a p-type impurity element into a portion of said active layer, thereby forming a source region or a drain region; forming a first interlayer insulating film over a gate wiring and a gate electrode; forming a second interlayer insulating film on said first interlayer insulating film; etching said second interlayer insulating film, thereby eliminating said second interlayer insulating film disposed over said source region or said drain region; etching said first interlayer insulating film and said gate insulating film, thereby forming a contact hole that reaches said source region or said drain region; and forming a wiring in contact with said source region or said drain region, said wiring disposed on said second interlayer insulating film that overlaps with said gate electrode.