Patent ID: 6774477
Filing Date: 2004-08-10
Classification: H01L

Abstract:
A structure of stacking multiple semiconductor substrates of a composite semiconductor device, wherein the composite semiconductor device has at least two semiconductor devices, the structure comprising:a first semiconductor substrate having a first inter-insulating layer for a first semiconductor device, first via holes formed in the first inter-insulating layer for connecting the first semiconductor device, first bonding pads formed on the upper surface of the first inter-insultaing layer and connected with the first via holes and first alignment marks arranged on the outer periphery of the substrate; a second semiconductor substrate having a second inter-insulating layer for a second semiconductor device, second via holes formed in the second inter-insulating layer for connecting the second semiconductor device, second bonding pads formed on the upper surface of the second inter-insultaing layer and connected with the second via holes and second alignment marks arranged on the outer periphery of the substrate; wherein the first bonding pads of the first semiconductor substrate and the second bonding pads of the second semiconductor substrate are joined by aligning the first alignment marks of the first semiconductor substrate and the second alignment maks of the second semiconductor substrate; and wherein a plurality of semiconductor substrates are aligned and joined by forming additional alignment marks on the back surface of the second semiconductor substrate after joining the bonding pads of the first and second semiconductor substrate.