Patent ID: 6242277
Filing Date: 2001-06-05
Classification: H01L

Abstract:
A method of fabricating a complementary metal-oxide-semiconductor (CMOS) sensor device, wherein on a substrate, a passivation layer, a color filter and a planarized layer are successively formed on the substrate, and an opening is formed through the planarized layer and the passivation layer, the opening exposing the a portion of the substrate, wherein the method comprises:forming a microlens resist layer over the opening and the planarized layer, wherein the microlens resist layer has a bigger thickness in the opening than on the planarized layer;forming a first photoresist layer on the microlens layer, wherein the first photoresist layer has a pattern align to the color filter;performing a first exposure step at least onto the microlens layer to form a first exposed portion, using the first photoresist layer as a mask, and removing the first photoresist layer;forming a second photoresist layer on the microlens resist layer, wherein the second photoresist layer has a pattern align to the opening;performing a second exposure step at least onto the microlens layer to form a second exposed portion, using the second photoresist layer as a mask, and removing the second photoresist layer;performing a positive development step to remove the first exposed portion and the second exposed portion of the microlens resist layer and to form a plurality of microlens blocks align to the color filter; andperforming an after-development-exposure step and a curing step so that each of the microlens blocks forms a microlens, wherein the microlens has a substantially rounded semi-circle structure.