Patent ID: 6388341
Filing Date: 2002-05-14
Classification: G03F,H01L

Abstract:
A semiconductor device comprising:first patterns for alignment which are arranged in a first region on the surface of a semiconductor substrate, said first patterns including (n+1) first patterns (n is a natural number) in at least a first direction; and second patterns which are formed in a second region on the surface of the semiconductor substrate, said second region extending outwardly from said first region in said first direction, said second patterns including a plurality of patterns in a period of dD in at least said first direction, wherein defining a size of a pitch between adjacent two of said first patterns in said first direction as dk (1&lE;k&lE;n), defining a coefficient depending on a precision in pattern recognition in said first direction as &agr; (1>&agr;>0), and defining a distance between one of said first pattern which is closest to said second region in said first direction and the outside edge of said second region as D, said second region is set so as to satisfy the following relational expression, D&LessFullEqual;&Sum;k=1n&it;dkand said dD is set so as to satisfy the following relational expression with respect to optional dk|(dDâˆ’dk)/dk|&gE;&agr;.