Patent ID: 6551941
Filing Date: 2003-04-22
Classification: H01L

Abstract:
A method of forming a notched silicon-containing gate structure, said method comprising the steps of:a) providing an etch stack including, from top to bottom, a patterned masking layer, a silicon-containing gate layer, a gate dielectric layer, and an underlying substrate; b) etching said silicon-containing gate layer to a first desired depth using a plasma generated from a first source gas, to form a first passivation layer on sidewalls of said silicon-containing gate layer which are exposed during etching, whereby upper silicon-containing gate layer sidewalls are protected from etching during subsequent etching steps; c) etching the remaining portion of said silicon-containing gate layer using a plasma generated from a second source gas which selectively etches said silicon-containing gate layer relative to said gate dielectric layer, to form a lower sidewall of said silicon-containing gate layer and to expose an upper surface of said gate dielectric layer; d) exposing said etch stack to a plasma generated from a third source gas which includes nitrogen, to form a second, nitrogen-containing passivation layer on said exposed sidewalls of said etched silicon-containing gate layer; and e) etching a notch in said lower sidewall of said silicon-containing gate layer which is not protected by said first passivation layer, using a plasma generated from a fourth source gas which selectively etches said silicon-containing gate layer relative to said gate dielectric layer.