Patent ID: 7468626
Filing Date: 2008-12-23
Classification: G06F,H01L,Y02D

Abstract:
1. A data processor built in a single semiconductor chip, comprising: a first means for including a CPU; a second means for including an I/O unit which inputs or outputs a plurality of signals to or from outside of said data processor; a first voltage line coupled to said first means; a second voltage line coupled to said second means; and a control means, wherein said first means is supplied with a first operational voltage from said first voltage line in an active mode, is not supplied with said first operational voltage in a standby mode, wherein said first means couples to said second means via a data signal line and a switching unit, wherein said control means controls said switching unit to turn on in said active mode, and controls said switching unit to turn off in said standby mode, and wherein said data processor further comprises a memory which is arrayed between said switching unit and said second means.