Patent ID: 6385096
Filing Date: 2002-05-07
Classification: G11C

Abstract:
A method of writing at least one data word of 2p bits in a memory, the memory comprising a memory plane with at least one memory word of 2p cells, each connected to a respective bit line, and wherein the memory plane comprises a column register comprising 2q high-voltage latches and 2p-2q low-voltage latches, where p is a non-zero whole number and where q is a whole number less than p, each of the high-voltage latches comprising high-voltage memorization means for memorizing a binary data and each of the low-voltage latches comprising low-voltage memorization means for memorizing a binary data, the method comprising the following steps:1) erasing all the cells of a memory word; 2) loading 2q data in the 2q high-voltage latches, and loading 2p-2q other data in the 2p-2q low-voltage latches; and 3) programming 2q cells of the memory as a function of the data memorized in the 2q high-voltage latches; as well as repeating 2p-qâˆ’1 times the following steps: 4) loading, in the 2q high-voltage latches, of 2q of the other data that were loaded in 2q low-voltage latches at step 2); and 5) programming 2q other cells of the memory as a function of the data memorized in the 2q high-voltage latches.