Patent ID: 6762117
Filing Date: 2004-07-13
Classification: H01L,Y10T

Abstract:
A method for creating an integrated circuit device, comprising the steps of:providing a semiconductor die having a first surface and a first plurality of wire bond pads disposed about the first surface; depositing a redistribution layer upon the first surface, the redistribution layer having a plurality of conductive redistribution traces, at least some of which having first ends in electrical communication with the first wire bond pads; patterning a second plurality of wire bond pads with at least some of the redistribution traces; depositing an insulation layer atop the redistribution layer; forming first openings through the insulation layer to first positions along the redistribution traces and second openings therethrough to the second wire bond pads; forming a plurality of solder bumps through the first openings to the first positions along the redistribution traces; and bonding a plurality of bond wires through the second openings to the second wire bond pads.