Patent ID: 8772147
Filing Date: 2014-07-08
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: forming a first set of gate electrodes over a substrate, adjacent gate electrodes of the first set of gate electrodes being separated by a first gap width, and each gate electrode of the first set of gate electrodes having a first gate width; forming a second set of gate electrodes over the substrate, adjacent gate electrodes of the second set of gate electrodes being separated by a second gap width less than the first gap width, and each gate electrode of the second set of gate electrodes having a second gate width greater than the first gate width; forming a first set of spacer structures on sidewalls of the first and second sets of gate electrodes; forming a second set of spacer structures abutting the first set of spacer structures; and removing a subset of the second set of spacer structures over the sidewalls of the second set of gate electrodes.