Patent ID: 6026007
Filing Date: 2000-02-15
Classification: G06F,G06K,G11C,Y02D

Abstract:
A storage apparatus comprising:a body having first and second opposing major surfaces;an array of electrical contact pads integral with the body and disposed generally level with the first major surface, the electrical contact pad array including a data pad, a power pad, a ground pad, and a clock pad;a serial data line integral with the body and coupled to the data pad;a power line integral with the body and coupled to the power pad;a ground line integral with the body and coupled to the ground pad;a clock line integral with the body and coupled to the clock pad; anda high capacity memory integrated circuit integral with the body, the memory integrated circuit having a serial data port coupled to the serial line, a power node coupled to the power line, a ground node coupled to the ground line, and a clock node coupled to the clock line.