Patent ID: 8397043
Filing Date: 2013-03-12
Classification: G06F

Abstract:
1. A memory mapping system comprising a multi-processing arrangement, said multi-processing arrangement including a first processing unit and a second processing unit, said memory mapping system comprising: a main memory to which said second processing unit does not have write access, said main memory including a first memory section and a second memory section; an associated memory associated with said second memory section, said associated memory including a memory section to which said second processing unit has write access; a consistency control unit for maintaining consistency between data stored in said associated and data stored in said second memory section: wherein data to be used by said second processing unit can be stored in said parts of the second memory section to which said first processing unit has write access and data to be used by said first processing unit can be stored in said parts of the associated memory to which said second processing unit has write access.