Patent ID: 9015443
Filing Date: 2015-04-21
Classification: G06F

Abstract:
1. A method of reducing remote reads of memory in a hybrid computing environment, the hybrid computing environment comprising a host computer having a host computer architecture, a plurality of accelerators having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerators adapted to one another for data communications by a system level message passing module, the host computer having local memory shared remotely with the accelerators and having a shadow memory area, each accelerator having local memory shared remotely with the host computer, each accelerator comprising a descriptor array, the descriptor array comprising a plurality of elements, each element of the descriptor array capable of storing a descriptor identifying packet data to be read from the accelerator's shared memory, the method comprising: allocating, by the host computer in the shadow memory area of the host computer, a memory region for a packet to be written to the shared memory of an accelerator; writing packet data by the host computer to the accelerator's shared memory in a memory region corresponding to the allocated memory region in the host computer's shadow memory area; inserting, by the host computer in a next available element of the accelerator's descriptor array, a descriptor identifying the written packet data including identifying the next available element of the accelerator's descriptor array from a copy of a head pointer of the accelerator's descriptor array maintained on the host computer, the head pointer configured to point to next available element of the accelerator's descriptor array; incrementing, by the host computer, the copy of the head pointer of the accelerator's descriptor array maintained on the host computer; and updating, by the host computer, a copy of the head pointer of the accelerator's descriptor array maintained on the accelerator with the incremented copy.