Patent ID: 6249171
Filing Date: 2001-06-19
Classification: H01L,H03K

Abstract:
An isolation circuit for providing dc isolation between first and second circuits that may be referenced to different ground potentials, comprising:a transformer having first and second transformer coils;said first coil of said transformer being connected to a ground of said first circuit and to an output node of said first circuit, and said second coil of said transformer to a ground of said second circuit and an input node of said second circuit;a first capacitance connected between said output node of said first circuit and a second side of said first coil of said transformer, and a second capacitance connected between said input node of said second circuit and a second side of said second coil of said transformer;a signal output buffer in said first circuit connected to said output node;a signal input buffer in said second circuit, said signal input buffer being connected to said input node and being constructed to hold a desired state at said input node despite charge leakage from said capacitances;wherein said signal input buffer comprises a first inverter and a bus holder comprising a second inverter connected in a reverse direction across the first inverter.