Patent ID: 9209792
Filing Date: 2015-12-08
Classification: H03K

Abstract:
1. A clock signal selection system comprising: an arbitration component for coordinating eligibility between a plurality of clock signals input to said arbitration component, wherein each one of the plurality of clock signals have a respective each one of a plurality of corresponding respective external clock selection indication signals input to said arbitration component, wherein at least two of said external clock selection indication signals are independently externally generated, wherein said arbitration component includes a one hot mechanism; a control component for controlling the coordination utilizing a clock signal from the plurality of clock signals, wherein a first one of the plurality of clock signals that is currently running is utilized for controlling the coordination and selection of a second one of the plurality of clock signals; and a selection component for selecting between the plurality of clock signals, wherein the selection component includes a multiplexer and the multiplexer includes: a clock gate for coordinating timing between a selection by the selection component and control component with a selected clock signal transition to avoid glitches; and an OR gate for logically ORing clock signal output.