Patent ID: 9160684
Filing Date: 2015-10-13
Classification: G06F,H04L

Abstract:
1. A method of dynamically controlling a scheduling rate of each node in a scheduling hierarchy of a hardware network processor having a plurality of processing modules and at least one shared memory with packet data, the method comprising: generating, by a traffic manager of the network processor, a scheduling hierarchy comprising a tree structure of a root scheduler and N scheduler levels, wherein a scheduler is a branch node and a queue is a leaf node of the scheduling hierarchy, wherein N is a positive integer; generating, by the network processor, one or more tasks corresponding to each of a plurality of received packets associated with one or more data flows of the network processor; enqueuing, by the traffic manager, a task provided by one of the plurality of processing modules of the network processor to an associated queue of the scheduling hierarchy, wherein the queue is associated with a data flow corresponding to the received task, the queue having a corresponding parent scheduler at each of one or more next levels of the scheduling hierarchy up to the root scheduler; maintaining one or more scheduling data structures for each node in the scheduling hierarchy; receiving a rate reduction request corresponding to a given node of the scheduling hierarchy; updating one or more indicators in the scheduling data structure corresponding to the given node; and removing the given node from the scheduling hierarchy by a corresponding parent scheduler of the given node, thereby reducing the scheduling rate of the given node.