Patent ID: 6112285
Filing Date: 2000-08-29
Classification: G06F

Abstract:
A method for providing virtual memory support for managing translation look aside buffers (TLBs) with multiple page size support for use in a computer system comprising the steps of:defining a base page size for the computer system;defining one or more defined large page sizes, each defined large page size being a multiple of said base page size;maintaining a page frame data structure (PFDAT) for each portion of main memory of said base page size;maintaining a page table entry (PTE) for each mapped portion of main memory of said base page size; andfaulting in a large memory page, wherein said faulting in step comprises:(i) determining an appropriate large page size;(ii) verifying that a region of a virtual address space can accommodate a memory page of said appropriate large page size; and(iii) setting up a plurality of PTEs, wherein each of the plurality of PTEs is updated to point to a page frame number (PFN) and marked to reflect said appropriate size.