Patent ID: 9218974
Filing Date: 2015-12-22
Classification: H01L,Y10S

Abstract:
1. An integrated circuit structure comprising: a first conductive strip; a first spacer on a sidewall of the first conductive strip, the first spacer having a convex outermost sidewall; a second conductive strip; a second spacer on a sidewall of the second conductive strip; a gap between the first spacer and the second spacer; a top contact etch stop layer (CESL) directly over the first conductive strip; a bottom contact etch stop layer (CESL) in the gap and disconnected from the top CESL, wherein a portion of the convex outermost sidewall of the first spacer does not have a CESL formed thereon; and an inter-layer dielectric (ILD) in the gap, the ILD adjoining a sidewall of the bottom CESL between the first spacer and the bottom CESL.