Patent ID: 9153682
Filing Date: 2015-10-06
Classification: B82Y,H01L

Abstract:
1. A semiconductor device comprising: a substrate; a compound semiconductor layer formed on the substrate and having a two-dimensional carrier gas layer based on a hetero-junction; a first main electrode formed on the compound semiconductor layer; a second main electrode formed on the compound semiconductor layer so as to surround the first main electrode in a plan view and having a linear region and an arc-shaped region; and a control electrode formed between the first main electrode and the second main electrode on the compound semiconductor layer for controlling an electric current that flows between the first main electrode and the second main electrode by way of the two-dimensional carrier gas layer; wherein, first and second regions of the compound semiconductor layer are formed adjoining to each other along a direction perpendicular to a flowing direction of the current in the second region of the compound semiconductor layer in the plan view, each of the first and second regions having a different cross sectional structure between the first main electrode and the second main electrode from each other, an electric current limiting section for limiting the electric current from flowing between the first main electrode and the arc-shaped region of the second main electrode is formed in the first region of the compound semiconductor layer, and the electric current limiting section is not formed in the second region of the compound semiconductor layer.