Patent ID: 6963829
Filing Date: 2005-11-08
Classification: G06F

Abstract:
1. An emulating interface arrangement for a processor evaluation board and a DSP evaluation board, the processor evaluation board having a connector corresponding to actual data lines, address lines and control lines of the processor evaluation board, the DSP evaluation board having a connector corresponding to actual data lines, address lines and control lines of a DSP emulated by the DSP evaluation board, the arrangement comprising: a bridge board; a processor connection extending from said bridge board for connecting to the connector of the processor evaluation board; a Digital Signal Processor (DSP) connection extending from said bridge board for connecting to the connector of the DSP evaluation board; a Programmable Logic Device (PLD) mounted on said bridge board and electrically connected to both said processor connection and said DSP connection; software included in said PLD for reading said address lines, said data lines and said control lines of said processor connection and said DSP connection, said software monitoring said lines and converting signals from said address lines, data lines and control lines of said processor connection into DSP transfer signals based on signals received from said DSP connection, said software transmitting said DSP transfer signals to said DSP connection, said software converting signals from said address lines, said data lines and said control lines of said DSP connection into processor transfer signals based on signals received from said processor connection, said software transmitting said processor transfer signals to said processor connection, wherein said bridge board with said PLD and said software emulate a physical and electrical connection between a processor and a DSP in an Application Specific Integrated Circuit (ASIC).