Patent ID: 6130556
Filing Date: 2000-10-10
Classification: H03K

Abstract:
An integrated circuit buffer comprising:a core output terminal;a pad terminal;a pad pull-down transistor and a pad pull-up transistor which are coupled to the pad terminal and have pull-up and pull-down control terminals, respectively;a pull-down control circuit coupled between the core output terminal and the pull-down control terminal;a pull-up control circuit coupled between the core output terminal and the pull-up control terminal;a first, pull-up voltage protection transistor coupled in series between the pad pull-up transistor and the pad terminal and having a control terminal;a bias circuit coupled to the control terminal of the first, pull-up voltage protection transistor; anda voltage feedback circuit comprising a second voltage protection transistor and a pass gate transistor, which are coupled in series between the pad terminal and the control terminal of the first, pull-up voltage protection transistor.