Patent ID: 9190367
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A semiconductor package, comprising: a substrate having a first surface and a second surface opposite to the first surface; a plurality of components including a first component mounted on the first surface of the substrate, and a second component mounted on the second surface of the substrate; an interposer having a first surface; an electrical interconnect connecting the first surface of the interposer to the second surface of the substrate; and a first package body disposed on the second surface of the substrate and encapsulating the second component, the electrical interconnect and at least a portion of the interposer; wherein a sum of a thickness of the interposer and a height of the electrical interconnect is substantially equal to a height of the first package body; and wherein a lateral surface of the substrate, a lateral surface of the interposer, and a lateral surface of the first package body are substantially coplanar.