Patent ID: 8008952
Filing Date: 2011-08-30
Classification: H03K

Abstract:
1. A buffer circuit for outputting low and high voltages as opposed logic signals and capable of outputting a first high voltage and a second high voltage that is higher than the first high voltage as the high voltages, the buffer circuit comprising: a logic control circuit; a first metal oxide semiconductor (MOS) transistor provided between a power supply for feeding the first high voltage and an output terminal, the first MOS transistor including a gate receiving a control signal of the first high voltage outputted from the logic control circuit, and a backgate receiving the first high voltage; a second MOS transistor provided between a power supply for feeding the second high voltage and the output terminal, the second MOS transistor including a gate receiving a control signal of the second high voltage outputted from the logic control circuit, and a backgate receiving the second high voltage; and a switch circuit provided between the first MOS transistor and the output terminal and an ON/OFF state thereof being controlled by the control signal of the second high voltage level.