Patent ID: 6144231
Filing Date: 2000-11-07
Classification: G11C

Abstract:
A dynamic latching comparator interconnecting first and second signal input lines, said latching comparator comprising:latching circuitry comprising first and second pull-up devices connected, respectively, between first and second nodes and a positive voltage source and first and second pull-down devices operatively connected, respectively, between the first and second nodes and a ground, with the first and second pull-down devices having gates connected, respectively, to the first and second input lines, and with a gate of the first pull-up device cross-coupled to the second node, and with a gate of the second pull-up device cross-coupled to the first node; anddifferential amplifier circuitry comprising third and fourth pull-down devices connected, respectively, between the first and second nodes and the ground, and with a gate of the third pull-down device cross-coupled to the second node, and with a gate of the fourth pull-down device cross-coupled to the first node.