Patent ID: 7728234
Filing Date: 2010-06-01
Classification: H05K

Abstract:
1. A coreless thin substrate with embedded circuits in dielectric layers, comprising: a plurality of first patterned dielectric layers, having a plurality of embedded circuits; and at least a patterned dielectric layer, having a plurality of embedded conducting elements; wherein the second patterned dielectric layer is disposed between the first patterned dielectric layers, and the embedded conducting elements of the second patterned dielectric layer are electrically conducted with the embedded circuits of the first patterned dielectric layers, wherein a plurality of external connection pads connecting the embedded circuits are further embedded in an outermost layer of the first patterned dielectric layers, and a solder mask is formed on the outermost layer of the first patterned dielectric layers and at least partially exposes the external connection pads.