Patent ID: 6898851
Filing Date: 2005-05-31
Classification: H01L,Y10T

Abstract:
1. A method of manufacturing an electronic device comprising an underlying layer, an etching stopper film of an insulator provided on said underlying layer, an interlayer dielectric film provided on said etching stopper film, a lower wiring buried in an upper main surface of said underlying layer, an upper wiring buried in an upper main surface of said interlayer dielectric film, and a contact section for electrically connecting said lower wiring to said upper wiring, the method comprising the steps of: (a) selectively removing said interlayer dielectric film and forming a hole penetrating through said interlayer dielectric film to reach said etching stopper film; (b) carrying out a heat treatment with said hole opened; (c) filling said hole with an organic resin which can be cured by a deep ultraviolet light and curing said organic resin with said deep ultraviolet light to form a buried plug; (d) selectively removing said interlayer dielectric film and said buried plug by using a chemically amplified resist as an etching mask and forming a trench pattern for burying said upper wiring in said upper main surface of said interlayer dielectric film; (e) removing said busied plug remaining in said hole to obtain a structure in which said trench pattern communicates with said hole; (f) selectively removing said etching stopper film to expose said lower wiring; and (g) filling said trench pattern and said hole with a conductor material to simultaneously form said upper wiring and said contact section.