Patent ID: 6153926
Filing Date: 2000-11-28
Classification: H01L

Abstract:
A semiconductor device comprising N pieces or less of a semiconductor chip mounted on a common substrate for mounting N pieces of said semiconductor chip, which comprises:said semiconductor chip comprising a first surface on which a first electrode is formed and a second surface, opposite to said first surface, on which a second electrode is formed;said common substrate being provided with a mounting main surface to be separated into N divisional chip mounting regions, each of said N divisional chip mounting regions having a first wiring area whereto said semiconductor chip is mounted and said first electrode of said semiconductor chip is electrically connected; a second wiring area, insulated from said first wiring area, whereto said second electrode of said semiconductor chip is electrically connected; and separating portions being positioned between said adjacent N divisional chip mounting regions;wherein N pieces or less of said semiconductor chip are mounted on said corresponding first wiring areas of said common substrate respectively so that said first wiring area and said first electrode of said semiconductor chips make contact with each other, said second electrode of said semiconductor chips and said second wiring portion are electrically connected by wire bonding; and a redundant region whereon no semiconductor chip is mounted is cut off from said common substrate.