Patent ID: 6971167
Filing Date: 2005-12-06
Classification: H05K,Y10T

Abstract:
1. A method of forming a multilayered circuit board, comprising: a first circuit forming process of forming a first circuit made of a conductor in a predetermined pattern on a first flat surface of a flat insulating board made of an insulating material, said insulating board further having a second flat surface approximately parallel to said first flat surface; a first circuit embedding process of embedding said first circuit in said first insulating board so that said first surface and said first circuit have a predetermined surface flatness, and so that said first surface has a predetermined parallelism with respect to said second flat surface; a masking process of forming, on a part of a surface of the embedded first circuit, a mask for forming a pilot hole for a via hole; an insulating layer forming process of forming an insulating material layer by applying insulating material as a layer onto said first flat surface and embedded first circuit except for a part thereof on which said mask is located; an insulating material layer flattening process of flattening a surface of said insulating material layer so that said surface of the insulating material layer has the surface flatness and the parallelism with respect to said second flat surface; and a pilot hole forming process of forming the pilot hole by removing said mask from said first circuit with said insulating material layer having been flattened.