Patent ID: 6646986
Filing Date: 2003-11-11
Classification: H04L

Abstract:
An apparatus for transfer rate control of K data streams into a shared channel, the data streams containing variable sized packets and being stored in K packet buffers and K being a positive integer, the apparatus comprising:a pointer memory storing K pointers to the K packet buffers; a memory A containing an expanded time-space map for storing identifiers of data streams eligible for transfer in an array of calendar slots; a memory B having one-to-one correspondence with the memory A for locating a vacant calendar slot; a control data memory C holding specification of the data streams; a search-control circuit for locating a vacant slot indicator in memory B; a ready queue memory D for storing the identifiers of the data streams ready for transfer; and a transfer control circuit for determining transfer eligibility of each data stream based on the specification contained in the control data memory C and enabling the transfer of the packet of one of K packet buffers to the ready queue memory D.