Patent ID: 8572297
Filing Date: 2013-10-29
Classification: G06F,Y02D

Abstract:
1. A connection hub, comprising: one or more master processing elements; multiple different separately accessible busses; a bus connection circuit configured to enable the master processing elements to access any of the different busses simultaneously; multiple independently operating bus interface circuits each associated with a different one of the multiple busses, wherein the bus interface circuits are configured to reduce power consumption by the busses that are not being accessed by one of the master processing elements by powering down the busses that are not being accessed based on a first signal identifying the at least one of the busses and a second signal indicating whether the at least one of the busses is active, wherein the first signal and the second signal are generated by one of the master processing elements, and wherein the bus interface circuits are further configured to power up the at least one of the busses in response to determining that the at least one of the busses is being accessed by one of the master processing elements; and a configuration memory configured to store configuration values for the bus connection circuit and the multiple independently operating bus interface circuits.