Patent ID: 9041168
Filing Date: 2015-05-26
Classification: H01L,Y10T

Abstract:
1. A packaged electronic device comprising: a packaging substrate having a surface and including a reference potential layer at or below the surface; at least one semiconductor die mounted on the surface of the packaging substrate; a plurality of wirebonds disposed on the surface of the packaging substrate and arranged to define a perimeter around and substantially surround the at least one semiconductor die, each of the plurality of wirebonds having a first end, a second end, and a middle portion, the first and second ends electrically connected to the reference potential layer and separated by a wirebond loop width, wirebonds along the perimeter separated by a wirebond spacing, the wirebond loop width and the wirebond spacing selected to provide electromagnetic shielding for a particular range of frequencies; an overmold that substantially encapsulates the at least one semiconductor die and the plurality of wirebonds, the overmold including an upper surface where the middle portions of the plurality of wirebonds are exposed; and a conductive layer disposed on the upper surface of the overmold so as to be in electrical contact with the middle portions of the plurality of wirebonds, the conductive layer in combination with the plurality of wirebonds and the reference potential layer providing the electromagnetic shielding.