Patent ID: 7216327
Filing Date: 2007-05-08
Classification: G06F,H01L,H05K

Abstract:
1. A device for estimating the number of board layers constituting a board, which is connected to at least one file for storing information about an order of layers to be added, positional information of a component pin, a board pin, a power-source pin, and a ground pin, connection information between a component pin and a board pin, connection information between a power-source pin or a ground pin and a predetermined layer, information about existing wirings, information about an area where wiring is prohibited, and information about a shape of a via, a storage and an output device to which a wired result is output, comprising: a layer adding section for retrieving from the file the information about an order of layers to be added to form an original layer structure and to store information about the formed original layer structure in the storage; a via forming section for retrieving from the file positional information of a component pin, a board pin, a power-source pin, and a ground pin, and connection information between a component pin and a board pin to store the information in the storage, and retrieving from the file the connection information from a power-source pin or ground pin to a predetermined layer and the information about a shape of a via to form a via and to store the information and information about the formed via with its shape in the storage; a wiring prohibited area forming section for retrieving from the file the information about existing wirings and the information about an area where wiring is prohibited to store the information in the storage; and a wiring route searching section for searching for a wiring route in reference to the information stored in the storage to output to the output device a structure of a present board and the number of layers constituting the present board.