Patent ID: 6894542
Filing Date: 2005-05-17
Classification: H03K

Abstract:
1. A comparator with hysteresis comprising a first transistor (M 1 ) whose gate forms the one input of the comparator and a second transistor (M 2 ) whose gate forms the other input of the comparator, the main current paths of both transistors (M 1 , M 2 ) being connected to each other at one end, characterized by a third transistor (M 3 ) and a fourth transistor (M 4 ) being provided, the gate of said third transistor (M 3 ) being connected to the gate of said first transistor (M 1 ) and the main current path of said third transistor being connected between the one end of the main current paths of said first and second transistor (M 1 , M 2 ) and connected via the main current path of said fourth transistor (M 4 ) to the other end of said main current path of said second transistor (M 2 ), and the gate of said fourth transistor being connected to the output signal or inverted output signal of said comparator.