Patent ID: 7795096
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A method of manufacturing an integrated circuit, comprising: forming a transistor of a first type comprising a first gate electrode formed in a first gate groove that is defined in a semiconductor substrate between first and second source/drain regions of the transistor of the first type, the first gate electrode completely filling a space between two adjacent first isolation trenches in a cross section along the first gate electrode perpendicular to a first direction defined by a line extending between the first and second source/drain regions; and forming a transistor of a second type comprising a second gate electrode formed in a second gate groove defined in the semiconductor substrate, the second gate electrode partially filling a space between two adjacent second isolation trenches in a cross section along the second gate electrode perpendicular to the first direction, wherein portions of the semiconductor substrate are arranged between the second gate electrode and the adjacent second isolation trenches on both sides of the second gate electrode in the cross section along the second gate electrode perpendicular to the first direction.