Patent ID: 7317224
Filing Date: 2008-01-08
Classification: H01L

Abstract:
1. A semiconductor device comprising: a MISFET formed in a chip region of a semiconductor substrate, said MISFET having a gate portion comprised of a first conductor formed in a groove formed in a first surface of the semiconductor substrate, a source portion formed at said first surface, and a drain portion formed at a second surface opposite to said first surface; a gate electrode and a source electrode electrically connected to said gate portion and said source portion, respectively; a protective film having first and second openings formed over said gate electrode and said source electrode, respectively; bump electrodes formed at the first and second openings over said gate electrode and said source electrode; and a third opening which exposes the source electrode, formed in said protective film; wherein said gate electrode and source electrode are formed in a same layer; said bump electrodes are electrically connected to said gate electrode and said source electrode, respectively; said third opening is used for an inspection process; said groove has a stripe form extending along a first direction; said gate electrode has a first portion and a second portion; said first portion of said gate electrode is formed along a periphery of said chip region; said second portion of said gate electrode is formed in an area which is surrounded by said first portion of said gate electrode; and said second portion of said gate electrode extends in a second direction which intersects the first direction.