Patent ID: 6396354
Filing Date: 2002-05-28
Classification: H03D,H04N,Y10S

Abstract:
A PLL detection circuit comprising:a PLL circuit including a phase comparison circuit for performing a comparison of phases of an input signal and an oscillation signal and outputting a phase error signal corresponding to a phase error between the input signal and the oscillation signal based on a result of the comparison and an oscillation circuit for generating the oscillation signal and for controlling an oscillation frequency of the oscillation signal in accordance with the phase error signal; a PLL lock judgment circuit for judging whether the PLL circuit is in a lock state based on the phase error signal so as to judge that the PLL circuit is in a lock state when a voltage level of the phase error signal is in a prescribed range and to judge that the PLL circuit is out of a lock state when the voltage level of the phase error signal is out of the prescribed range; and a selection circuit for selecting a first signal corresponding to the phase error signal or a second signal having a prescribed voltage level in accordance with a judgment result of the PLL lock judgment circuit and outputting the selected signal as an automatic fine tuning control-signal.