Patent ID: 8415933
Filing Date: 2013-04-09
Classification: G05F,H02M

Abstract:
1. A control circuit for controlling a DC-DC converter, with the converter including an inductor and associated switching circuitry, with the switching circuitry including a first transistor switch connected intermediate an input voltage terminal and a first terminal of the inductor, a second transistor switch connected intermediate the first terminal of the inductor and a circuit reference, a third transistor switch connected intermediate a second terminal of the inductor and an output voltage terminal and a fourth transistor switch connected intermediate the second terminal of the inductor and the circuit reference, said control circuit comprising: a PI compensator having a first input for receiving a voltage feedback signal from the output voltage terminal and a second input for receiving a reference voltage relating to a target regulated voltage level at the output voltage terminal and producing first and second proportional error term output signals and first and second integral error term output signals; a buck control loop connected to receive the first proportional error term and the first integral error term output signals; a buck comparator coupled to monitor a state of the buck control loop; a boost control loop connected to receive the second proportional error term and the second integral error term output signals; a boost comparator coupled to monitor a state of the boost control loop; mode control circuitry responsive to the buck and boost comparators and configured to cause the switching circuitry to switch to a pass phase where the first and third transistor switches are ON, a boost phase where the first and fourth transistors are ON and a buck phase where the second and third transistors are ON, with first selected switching periods beginning operation in the pass phase followed, in response to an output of the buck comparator, by operation in the buck phase, and with second selected switching periods beginning operation in the pass phase followed, in response to an output of the boost comparator, by operation in the boost phase.