Patent ID: 6215833
Filing Date: 2001-04-10
Classification: H04L

Abstract:
A digital signal processing circuit for processing data obtained from a playback channel, wherein a transmission rate of data from the playback channel is greater than a rate at which data can be processed comprising:a memory means for storing a digital signal obtained from the playback channel;a control means for writing the digital signal in said memory means at a first rate and reading out the digital signal from said memory means at a second rate lower than said first rate;a processing means for executing a desired process relative to the digital signal thus read out from said memory means; andsaid control means comprising a first counter for counting pulses of a first fixed-frequency clock signal to generate successive write addresses for writing said memory means until one sector of data is written therein, and a second counter for counting pulses of a second fixed-frequency clock signal to generate addresses for reading said memory means automatically on completion of writing said one sector.