Patent ID: 7166511
Filing Date: 2007-01-23
Classification: H01L

Abstract:
1. A method for fabricating a split gate flash memory device having a first gate and a second gate, comprising steps of: depositing a second conductive layer for forming a control gate on a semiconductor substrate having a first conductive layer, an insulating layer, and an oxide layer on both sides of the first conductive layer formed sequentially thereon; filling an anti-implant protective layer in a depression of the second conductive layer between first and second gates; performing ion implant process on the second conductive layer; removing the anti-implant protective layer filled in the depression of the second conductive layer; forming a photoresist pattern by depositing a photoresist layer on the second conductive layer for forming a control gate, and treating the photoresist layer with a light exposure process and a development process; and forming the control gate by etching the second conductive layer.