Patent ID: 8245162
Filing Date: 2012-08-14
Classification: G03F

Abstract:
1. A computer-implemented method for generating a write pattern to be used in a maskless-lithography process, comprising: determining, using the computer, a one-to-one correspondence between pixels in the write pattern and at least a subset of elements in an array of elements in a spatial-light modulator used in the maskless-lithography process, wherein a configuration of the array of elements in the spatial-light modulator specifies a modification of an illumination pattern that provides an image pattern in the maskless-lithography process; and generating the write pattern, wherein the write pattern includes features corresponding to at least the subset of elements in the spatial-light modulator, wherein the generating is in accordance with a characteristic dimension of an element in the array of elements in the spatial-light modulator and a target pattern that is to be printed on a semiconductor wafer during the maskless-lithography process, and wherein the generating includes an inverse-lithography calculation in which the write pattern at an object plane in the inverse calculation is estimated based on the target pattern at an image plane in the inverse calculation.