Patent ID: 8148769
Filing Date: 2012-04-03
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of said memory strings, each of said memory strings comprising: a first semiconductor layer having a pair of columnar portions extending in a perpendicular direction with respect to a substrate, and a joining portion formed so as to join lower ends of said pair of columnar portions; a charge storage layer formed to surround a side surface of said columnar portions; and a first conductive layer formed to surround the side surface of said columnar portions and said charge storage layer, and configured to function as a control electrode of said memory cells, and each of said select transistors comprising: a second semiconductor layer extending upwardly from an upper surface of said columnar portions; and a second conductive layer formed to surround a side surface of said second semiconductor layer with a gap interposed, and configured to function as a control electrode of said select transistors.