Patent ID: 7373569
Filing Date: 2008-05-13
Classification: G01R,G11C

Abstract:
1. A storage circuit comprising: a first passgate having an input coupled to receive a signal representing a data input to the storage circuit and further having an output connected to a storage node in the storage circuit; and a scan latch having an input connected to a scan data input to the storage circuit and further coupled to receive a scan enable input, wherein the scan latch is configured to store the scan data input responsive to an assertion of the scan enable input, and wherein the scan latch comprises a second passgate connected to the storage node and having an input coupled to receive the stored scan data; wherein each of the first passgate and the second passgate are coupled to receive respective pairs of control signals to control opening and closing of the passgates, and wherein the scan enable signal controls which of the respective pairs of control signals are pulsed, whereby only one of the first passgate and the second passgate is opened in a given clock cycle of a clock signal from which the pulses are generated.