Patent ID: 8264730
Filing Date: 2012-09-11
Classification: G06T

Abstract:
1. An image processing apparatus for carrying out an image process with respect to image data including data corresponding to a plurality of lines, said image processing apparatus, comprising: a first process section for carrying out a first process in accordance with data corresponding to n lines (n: an integer equal to or more than 3); a second process section for carrying out a second process in accordance with data corresponding to m lines (m: an integer less than n); and a signal process section for causing data corresponding to a plurality of lines to be outputted in synchronization with each other, the second process section includes: a dilation process section for (i) referring to binary data corresponding to m lines containing a target pixel and (ii) carrying out, in a case where a pixel whose binary data is “1” exists among a predetermined number of pixels around the target pixel, a dilation process in which binary data of the target pixel is set to “1”; and an erosion process section for (i) referring to binary data corresponding to m lines containing a target pixel and (ii) carrying out, in a case where a pixel whose binary data is “0” exists among a predetermined number of pixels around the target pixel, an erosion process in which the binary data of the target pixel is set to “0”, the signal process section including: (n−1) or more line buffers each of which stores data corresponding to one line; and a first delay adjustment section for delaying and outputting inputted data corresponding to one line; a second delay adjustment section for delaying and outputting inputted data corresponding to one line; and a switch for changing a source from which data is supplied to at least part of the (n−1) or more line buffers, the source being changed according to whether the first process or the second process is carried out; in a case where the first process is carried out, the signal process section causing (i) data corresponding to (n−1) lines stored in (n−1) line buffers and (ii) data corresponding to one line supplied to the first delay adjustment section to be outputted to the first process section in synchronization with each other, and in a case where the second process is carried out, the signal process section causing (i) data corresponding to (m−1) line(s) stored in (m−1) line buffer(s) and (ii) data corresponding to one line supplied to the first delay adjustment section to be outputted to one of the dilation process section and the erosion process section in synchronization with each other, the signal process section causing data corresponding to (m−1) line(s) among data corresponding to m lines outputted by the one of the dilation process section and the erosion process section to be supplied to line buffer(s) different from the (m−1) line buffer(s) from which the data is supplied to the one of the dilation process section and the erosion process section, the signal process section causing remaining data corresponding to one line among the data corresponding to the m lines data to be supplied to the second delay adjustment section, and the signal process section causing the data corresponding to the m lines to be supplied to the other one of the dilation process section and the erosion process section in synchronization with each other.