Patent ID: 6077769
Filing Date: 2000-06-20
Classification: H01L

Abstract:
A method for fabricating a dual damascene structure, comprising the steps of:providing a substrate, comprising at least a conductive region;forming a first dielectric layer, an etching stop layer, a second dielectric layer, and a hard mask layer from a top of the substrate upward in sequence;defining the hard mask layer for forming a first hole, aligned over the conductive region for exposing the second dielectric layer;forming a patterned photoresist layer on the hard mask layer, wherein the photoresist layer has a first opening exposing the second dielectric layer exposed by the first hole, and the photoresist layer further has a second opening exposing a portion of the hard mask layer;performing an etching process to form a second hole aligned under the first hole to expose the conductive region, and a third hole aligned under the second opening to expose the stop layer;filling the second and the third holes with a conductive layer; andperforming a planarization process for exposing the hard mask layer.