Patent ID: 6121828
Filing Date: 2000-09-19
Classification: H03D,H04L

Abstract:
A demodulator for 2.sup.q (q is an integer and q.gtoreq.2)-quadrature amplitude modulation (QAM, thereinafter) system having I and Q Channels, comprising:an analog automatic gain control (AGC, hereinafter) circuit, which is supplied with a modulated wave and operates so that an average power of an output signal thereof is kept to be constant,analog to digital (A/D, hereinafter) converters of said I and Q channels, which A/D convert base band (BB, hereinafter) analog signals of said I and Q channels obtained by demodulating said output signal of said analog AGC circuit,an equalizer, which is supplied with output signals of said A/D converters of said I and Q channels and removes interference components between codes contained therein,digital AGC circuits of said I and Q channels, which are supplied with output signals of said equalizer and operate so that convergent points of said output signals of said equalizer have amplitudes expressed by binary numbers composed of q/2 bits in case that q is even and (q+1)/2 bits in case that q is odd, anda control circuit, which is supplied with output signals of said digital AGC circuits of said I and Q channels and generates control signals for said digital AGC circuits of said I and Q channels.