Patent ID: 6618376
Filing Date: 2003-09-09
Classification: H04L,H04Q

Abstract:
A switch, comprising:an inbound cell queue coupled to receive ATM cells from a number of ATM physical layer interfaces across a common inbound bus; an outbound cell queue coupled to provide the ATM cells to separate ATM termination points according to cell address information across separate outbound busses, each outbound bus being associated with one of the ATM termination points; and one or more content addressable memeory's coupled to the inbound cell queue, the one or more content addressable memory's being configured to indicate which of the ATM termination points is to receive a cell stored in the inbound cell queue, wherein the switch is configured to operate as an ATM bus master when communicating with the physical layer interfaces and as an ATM bus slave when communicating with the ATM termination points.