Patent ID: 9128169
Filing Date: 2015-09-08
Classification: G01R,G09G

Abstract:
1. A test structure of a display panel, the display panel having a display region, a non-display region, and a buffer display region located between the display region and the non-display region, the test structure being located within the buffer display region of the display panel and comprising: a substrate; at least one signal line disposed on the substrate; an insulation layer covering the at least one signal line; a planar layer disposed on the insulation layer, the planar layer having at least one opening exposing a portion of the insulation layer; and an electrode layer disposed on the planar layer, the electrode layer having a ring-like opening, wherein the ring-like opening is a continuous ring structure and has a first end and a second end at the same plane and opposite to each other, a gap is between the first end and the second end, and the ring-like opening divided the electrode layer into a display electrode and at least one test electrode portion, the ring-like opening surrounds the at least one test electrode portion and exposes a portion of the planar layer, the at least one test electrode portion is connected to the insulation layer via the at least one opening of the planar layer, and the display electrode portion is located on the planar layer, surrounds the ring-like opening and extends into the gap, and is electrically connected to the at least one test electrode portion.