Patent ID: 6107825
Filing Date: 2000-08-22
Classification: H03K

Abstract:
A programmable logic device comprising:a plurality of terminal pins disposed around the periphery of the device and configured to convey data signals to or from the device;terminal pin control circuitry associated with each of the terminal pins and configured to control passage of data signals via the associated terminal pin in response to control signals applied to the terminal pin control circuitry;a plurality of conductors extending around the periphery of the device and configured to convey the control signals to the terminal pin control circuitry adjacent to the conductors, each of the conductors being subdivided into a plurality of segments, each of which is associated with an adjacent portion of the periphery of the device and can be used to supply the control signals to the terminal pin control circuitry for the terminal pins in the associated portion of the periphery; andsegmentation circuitry configured to programmably selectively connect plural segments of each conductor to one another.