Patent ID: 6429108
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, which method comprises the steps of:providing a semiconductor substrate comprising silicon and having a surface; sequentially forming over said substrate surface a layer stack comprising: a gate oxide layer (a) on said substrate surface, an electrically conductive polysilicon layer (b) on said gate oxide layer, a barrier material layer (c) on said polysilicon layer, a tungsten layer (d) on said barrier material layer, a silicon nitride layer (e) on said tungsten layer; and a polysilicon cap layer (f) on said silicon nitride layer; selectively removing portions of layers (a)-(f) of said layer stack to define a pattern therein exposing sidewall surfaces of said layer stack; forming at least one device region in said semiconductor substrate by ion implantation into said substrate surface, said layer stack serving as an implantation mask; forming at least one oxide spacer layer (g) covering the exposed surfaces of said layer stack; selectively removing at least a portion of the at least one oxide spacer layer (g) on the uppermost surface of said layer stack; selectively forming a silicon nitride spacer layer (h) over the exposed surfaces of the at least one oxide spacer layer (g) covering the exposed sidewall surfaces of said layer stack, whereby said tungsten layer (d) is encapsulated by the combination of said silicon nitride layer (e) formed on the upper surface thereof and said silicon nitride spacer layer (h) formed over said at least one oxide spacer layer (g); and annealing the thus-formed layer stack at an elevated temperature in an oxidizing ambient, whereby said silicon nitride encapsulating layers (e) and (h) prevent oxidation of said tungsten layer (d) during said annealing.