Patent ID: 9134356
Filing Date: 2015-09-15
Classification: G01R,G05B,G06F,Y02P

Abstract:
1. Method for processing, in a processing device, data or signals from first and second independent synchronization sources, the method comprising introducing, in the processing device, a first time level for the first independent synchronization source and a second time level for the second independent synchronization source, using a clock from the first independent synchronization source as a source clock in the first time level and a clock from the second synchronization source as a source clock in the second time level, handling the data or signals assigned to each synchronization source synchronously with the source clock of each synchronization source in the associated time level, importing the signals or data of the first time level into the second time level,and handling, in the second time level and synchronously with the source clock of the second time level, the imported signals or data of the first time level; wherein the handling includes combining, in the second time level, the signals or data from the second time level and the imported signals or data to form a new signal or datum that is in synchronization with the source clock of the second time level; and wherein the clock from the first independent synchronization source is independent from the clock from the second synchronization source; and, during handling of the imported signals or data from the first time level in the second time level, the data or signals from the first time level continue to exist in the first time level of the processing device in synchronization with the source clock of the first time level.