Patent ID: 7488982
Filing Date: 2009-02-10
Classification: H01L

Abstract:
1. A thin film transistor (TFT), comprising: a substrate; a semiconductor layer formed over said substrate having end portions; a first insulating layer disposed on said semiconductor layer so as to expose end portions of said semiconductor layer; a gate electrode formed over said first insulating layer; a capping layer formed over said gate electrode; spacers formed over said first insulating layer and directly contacting both side wall portions of said gate electrode and said capping layer; high-density source and drain regions formed at the end portions of said semiconductor layer exposed beyond said spacers, the high-density source and drain regions being spaced apart from the gate electrode and the capping layer; low-density source and drain regions having a same conductivity as said high-density source and drain regions formed at regions of said semiconductor layer under said spacers between the gate electrode and the high-density source and drain regions, thereby providing said semiconductor layer with lightly doped drain (LDD) regions under said spacers; and source and drain electrodes which respectively contact said high-density source and drain regions without contact holes.