Patent ID: 8586421
Filing Date: 2013-11-19
Classification: H01L

Abstract:
1. A method of forming a semiconductor device package comprising: providing a semiconductor device having a substrate composed of a semiconductor material and a plurality of metallic connection pads formed on the substrate, with the plurality of metallic connection pads being formed on top and bottom surfaces of the semiconductor device; applying a first passivation layer onto the top and bottom surfaces of the semiconductor device and onto edges of the semiconductor device extending between the top and bottom surfaces; adhering a base dielectric film to the bottom surface of the semiconductor device; applying a second passivation layer over the top surface and the edges of the semiconductor device and over the first passivation layer to form a passivated semiconductor device, the second passivation layer having a thickness greater than that of the first passivation layer; patterning the base dielectric film and the first and second passivation layers to expose the plurality of metal interconnects; and forming a plurality of metal interconnects that extend through the patterned base dielectric film or through the patterned first and second passivation layers to form a direct metallic connection with the plurality of metallic connection pads.