Patent ID: 6414512
Filing Date: 2002-07-02
Classification: H03H,H04L

Abstract:
An on-chip termination circuit, comprising:a first termination resistance including a first gate and a first input terminal, the first input terminal being adapted to receive a first twisted pair transmission signal; a second termination resistance including a second gate and a second input terminal, the second input terminal being adapted to receive a second twisted pair transmission signal, wherein each of the first and second termination resistances of the on-chip termination circuit comprise a termination resistor connected serially between the first input terminal and a termination transistor; a replication resistance coupled to the first and second termination resistances and adapted to replicate the first and second termination resistances, the replication resistance including a replication gate commonly connected to the first and second gates; and a feedback circuit adapted to maintain substantially constant a first reference voltage across the replication resistance.