Patent ID: 8743305
Filing Date: 2014-06-03
Classification: G02F

Abstract:
1. A liquid crystal display device including: a first substrate; a second substrate; a liquid crystal material sealed between the first substrate and the second substrate; a plurality of scanning signal lines on the first substrate; a plurality of video signal lines on the first substrate which intersect the respective plurality of scanning signal lines; a plurality of switching elements on the first substrate which are electrically connected to the respective plurality of scanning signal lines and the respective plurality of video signal lines; and a plurality of picture element electrodes on the first substrate which are provided in a matrix pattern and electrically connected to the respective switching elements, the respective picture element electrodes having a longer length in a direction along the scanning signal lines than in a direction along the video signal lines, said liquid crystal display device comprising: storage capacitor lines; and storage capacitances, the storage capacitor lines being provided on the first substrate along the scanning signal lines such that each of the scanning signal lines is arranged between two storage capacitor lines, the storage capacitances being formed in respective overlap regions in which the storage capacitor lines overlap the respective picture element electrodes via an insulating film in plan view, in a part of the respective overlap regions, the storage capacitor lines overlapping, in plan view, storage capacitor counter electrodes which are provided in a layer above the respective storage capacitor lines via the insulating film, the respective storage capacitor counter electrodes being electrically connected to the respective plurality of picture element electrodes, and being electrically connected to respective drain electrodes of the switching elements via respective drain electrode connection sections, the respective storage capacitor counter electrodes having a larger width than a width of the respective drain electrode connection sections in a direction along the scanning signal lines, and being formed in such a manner that their end sides other than an end side connected to the respective drain electrodes are located, in plan view, inside of a region of the corresponding storage capacitor lines so as not to overlap end sides of the corresponding storage capacitor lines defining the region, the scanning signal lines and the storage capacitor lines overlapping, in plan view, black matrices provided in a layer above the scanning signal lines and the storage capacitor lines, a gap being provided between a scanning signal line of the plurality of scanning signal lines and one of the two storage capacitor lines which is closer to the scanning signal line than the other of the two storage capacitor lines, and the gap overlapping a corresponding one of the black matrices at least in plan view, wherein a corresponding one of the picture element electrodes has a first end side facing the scanning signal line that forms the gap with the one of the two storage capacitor lines, and the first end side of the corresponding one of the picture element electrodes overlaps, in plan view, the one of the two storage capacitor lines and the corresponding one of the black matrices in such a manner that the first end side does not extend beyond the one of the two storage capacitor lines toward the scanning signal line that forms the gap with the one of the two storage capacitor lines.