Patent ID: 9093419
Filing Date: 2015-07-28
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device containing an MIM capacitor, comprising: providing a first interlayer dielectric layer to cover a substrate; providing a metal interconnect layer in the substrate; forming a metal-insulator-metal (MIM) capacitor on the first interlayer dielectric layer, wherein the MIM capacitor includes a bottom electrode layer and a top electrode layer that are isolated from and laterally staggered with one another; forming a second interlayer dielectric layer to cover both the MIM capacitor and the first interlayer dielectric layer; and forming a first conductive plug and a second conductive plug each passing through the second interlayer dielectric layer, wherein the first conductive plug contacts a sidewall and a surface portion of the top electrode layer of the MIM capacitor and the second conductive plug contacts a sidewall and a surface portion of the bottom electrode layer of the MIM capacitor, and wherein at least one of the first conductive plug and the second conductive plug passes through the first interlayer dielectric layer and connects electrically with the metal interconnect layer.