Patent ID: 6143623
Filing Date: 2000-11-07
Classification: H01L,Y10S

Abstract:
A fabrication method of a semiconductor device having a trench type element isolation structure, comprising:a first step of forming a first oxide film on a semiconductor substrate;a second step of forming an easily oxidizable film on said first oxide film;a third step of forming an anti-oxidation insulating film on said easily oxidizable film;a fourth step of patterning said anti-oxidation insulating film;a fifth step of etching said easily oxidizable film, said first oxide film and said semiconductor substrate using said patterned anti-oxidation insulating film as a mask to thereby form a trench in said easily oxidizable film, said first oxide film and said semiconductor substrate;a sixth step of oxidizing an exposed portion of said easily oxidizable film, which is exposed from a side surface of said trench, to thereby form a second oxide film, and oxidizing an exposed portion of said semiconductor substrate, which is exposed from bottom and side surfaces of said trench, to thereby form a third oxide film;a seventh step of forming a fourth oxide film on said anti-oxidation insulating film in such a manner that said trench is buried by said fourth oxide film;an eighth step of polishing said fourth oxide film to thereby expose said anti-oxidation insulating film; anda ninth step of removing said anti-oxidization film, said easily oxidizable film and said first oxide film to thereby form an element isolation oxide film containing at least said second to fourth oxide films.