Patent ID: 6223239
Filing Date: 2001-04-24
Classification: G06F

Abstract:
A computer system having a core logic chipset having an AGP bus, said computer system comprising:a central processing unit connected to a host bus;said core logic chipset connected to said host bus;system memory connected to said core logic chip set by a memory bus;said core logic chipset configured as a first interface bridge between said host bus and said memory bus, and a second interface bridge between said host bus and a peripheral component interconnect bus connected to said core logic chipset;said core logic chipset configurable as a third interface bridge between said host bus and said AGP bus;said core logic chipset capable of accommodating an AGP device connected to said AGP bus when a configuration signal is set to a first logic level; andsaid core logic chipset capable of accommodating a PCI device connected to said AGP bus when said configuration signal is set to a second logic level.