Patent ID: 8139404
Filing Date: 2012-03-20
Classification: G11C

Abstract:
1. A semiconductor memory device comprising: a memory cell array comprising a plurality of memory cells; and a control circuit that performs control of reading data from and writing data into each of the memory cells; the control circuit comprising: a flip-flop circuit that stores the data read from the memory cells and stores the data from an outside to be written into the memory cells; and a dynamic type holding circuit connected to the flip-flop circuit through a switch, the dynamic type holding circuit temporarily storing the data read from the memory cells, wherein said control circuit writes the data in the flip-flop circuit into the memory cell(s) when the data read from the memory cells and then held in the holding circuit is different from the data in the flip-flop circuit to be written, supplied from the outside at a time of writing into the memory cell(s).