Patent ID: 6069091
Filing Date: 2000-05-30
Classification: H01L

Abstract:
A method for etching a silicon layer within a microelectronics fabrication comprising:providing a substrate employed within a microelectronics fabrication;forming over the substrate a blanket silicon layer;forming upon the blanket silicon layer a blanket silicon containing hard mask layer, the blanket silicon containing hard mask layer being formed from a silicon containing material chosen from the group of silicon containing materials consisting of silicon oxide materials, silicon nitride materials, silicon oxynitride materials and composites of silicon oxide materials, silicon nitride materials and silicon oxynitride materials;forming upon the blanket silicon containing hard mask layer a patterned photoresist layer;etching, through use of a first plasma etch method, the blanket silicon containing hard mask layer to form a patterned silicon containing hard mask layer while employing the patterned photoresist layer as a first etch mask layer, the first plasma etch method employing a first etchant gas composition comprising a first fluorine and carbon containing etchant source gas and a first bromine containing etchant source gas; andetching in-situ, through use of a second plasma etch method, the blanket silicon layer to form an at least partially etched silicon layer while employing the patterned photoresist layer and the patterned silicon containing hard mask layer as a second etch mask layer, the second plasma etch method employing a second etchant gas composition comprising a second fluorine and carbon containing etchant source gas, a second bromine containing etchant source gas and a chlorine containing etchant source gas, wherein by employing the first plasma etch method and the second plasma etch method in-situ rather than not in-situ the at least partially etched silicon layer is formed with an enhanced sidewall smoothness.