Patent ID: 9064726
Filing Date: 2015-06-23
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: forming a first mask that exposes a first well and a first gate to a first implant, and protects a second well and a second gate from the first implant, the first well and the second well being formed in a semiconductor substrate, a thin gate dielectric touching and lying between the first well and the first gate, a thick gate dielectric touching and lying between the second well and the second gate, the first and second wells including a first type of impurity atoms, being substantially free of a second type of impurity atoms, and having substantially identical dopant profiles when the first mask is formed; implanting the second type of impurity atoms through the first mask into the first well to form a first source extension region and a first drain extension region that lies spaced apart from the first source extension region, the first well including a first channel region that lies between the first source extension region and the first drain extension region, the first channel region having a first middle point that lies mid-way between the first source extension region and the first drain extension region, the first channel region at the first middle point including the first type of impurity atoms, being substantially free of the second type of impurity atoms, and having an average dopant concentration; and implanting the first type of impurity atoms through the first mask, the first gate, and the thin gate dielectric into the first channel region to raise the average dopant concentration of the first channel region.