Patent ID: 8306103
Filing Date: 2012-11-06
Classification: H04L,H04N

Abstract:
1. A system comprising: a group delay compensation processing circuit configured to provide group delay compensation with respect to a signal of interest; a phase equalization processing circuit configured to provide phase equalization with respect to in-phase and quadrature signal components of the signal of interest; a group delay phase shift correction signal path coupled to the phase equalization processing circuit and operable to provide group delay compensation phase correction information regarding phase shift implemented by the group delay compensation processing circuit for use by the phase equalization processing circuit in phase equalization processing of the in-phase and quadrature signal components of the signal of interest; and a DC offset correction processing circuit configured to provide DC offset correction with respect to the signal of interest, wherein the DC offset correction processing circuit has a first DC correction loop provided for analog signals and a second DC correction loop provided for digital signals.