Patent ID: 6191963
Filing Date: 2001-02-20
Classification: H02M

Abstract:
An integrated circuit having a charge pump for generating an output voltage having a greater magnitude than a power supply voltage, the charge pump comprising:(a) a charge pump section having a plurality of alternating boosting stages driven by first and second alternating, non-overlapping clock signals, said plurality of alternating boosting stages including an input boosting stage for receiving the power supply voltage and a last boosting stage for generating at an output node of the last boosting stage a last stage voltage having a greater magnitude than the power supply voltage;(b) a gating transistor coupled at its drain terminal to the output node of the last boosting stage, wherein the gating transistor is clocked by one of said clock signals and is biased so that the gating transistor, during a boost phase, gates the last stage voltage to a load coupled to the source terminal of the gating transistor without a voltage drop and, at other times, turns off to prevent charge from flowing from the load into the output node of the last boosting stage of the charge pump section, and(c) a biasing diode coupled to the gate terminal of the gating transistor for raising the magnitude of the voltage of the gate terminal of the gating transistor, during a precharge phase preceding the boost phase, to at least one threshold voltage less than the magnitude of the voltage of the drain terminal of the gating transistor.