Patent ID: 6154063
Filing Date: 2000-11-28
Classification: H03F

Abstract:
A buffer coupled to first and second power supply connections comprising:a first current source coupled to a first power supply terminal for supplying at least a minimum current;first and second transistors, each having first and second terminals and a control terminal, the voltage between the control terminal and the second terminal controlling the current flow between the first terminal and the second terminal of the respective transistor;the first transistor having its first terminal coupled to the first current source and its second terminal coupled to a buffer output and to the first terminal of the second transistor, the control terminal of the first transistor being coupled as the buffer input, the second transistor having its second terminal coupled to the second power supply terminal;a first resistor;a control circuit coupled through the first resistor to the first current source, and to the control terminal of the second transistor, the control circuit controlling conduction of current through the second transistor responsive to the current through the control circuit from the first current source;a boost capacitor coupled between the buffer output and the node between the control circuit and the first resistor; and,a second capacitor coupled between one of the power supply terminals and the node between the first resistor and the first current source.