Patent ID: 8198870
Filing Date: 2012-06-12
Classification: G01R,H02J

Abstract:
1. A circuit for balancing a sub-stack voltage in a stack of ultracapacitors, the circuit comprising: a pair of electrical leads that are connectable across different sub-stacks of one or more ultracapacitors, wherein a stack includes N sub-stacks of ultracapacitors coupled to an electrical bus; a discharge device switchably connectable with the pair of electrical leads, the discharge device configured to discharge each sub-stack of ultracapacitors; a voltage sensing circuit coupled to the electrical bus and configured to sense and output a voltage of the stack of ultracapacitors after the first sub-stack of one or more ultracapacitors has been discharged to a given threshold; and a voltage amplifier coupled to the output of the voltage sensing circuit and coupled to the pair of electrical leads, the voltage amplifier configured to provide a re-charge voltage to the first sub-stack of one or more ultracapacitors.