Patent ID: 8619472
Filing Date: 2013-12-31
Classification: G11C

Abstract:
1. A method for operating a NAND flash memory device, the memory device comprising a plurality of memory cell blocks, each memory cell block comprising a drain select line, a source select line, a plurality of word lines, a drain pass word line, and a source pass word line, wherein the drain pass word line is between the drain select line and the word lines, and has a same structure as the word lines, and wherein the source pass word line is between the source select line and the word lines, and has a same structure as the word lines, the method comprising: applying a pass voltage to a drain pass word line, a source pass word line and unselected word lines and a program voltage to a selected word line associated with a selected memory cell block; and applying a ground voltage to drain pass word lines and source pass word lines and setting word lines associated with unselected memory cell blocks to a floating state.