Patent ID: 6576510
Filing Date: 2003-06-10
Classification: H01L

Abstract:
A method of manufacturing a semiconductor integrated circuit device comprising the steps of:forming a MISFET on a semiconductor substrate; depositing a first insulating film on said semiconductor substrate; forming a plug connected to said MISFET through said first insulating film; forming a second insulating film over said first insulating film; etching a desired region in said second insulating film to form a first opening for a wiring pattern; depositing a third insulating film on said second insulating film and in said first opening and anisotropically etching said third insulating film in such a manner that part of said third insulating film on a sidewall of said first opening is left un-etched to form a sidewall spacer and said plug is exposed; and depositing a first conductor in said first opening having said sidewall spacer.