Patent ID: 9052725
Filing Date: 2015-06-09
Classification: G05F,G06F,Y02D

Abstract:
1. An apparatus, comprising: a plurality of data generating circuits, wherein each of the data generating circuits is configured to generate data at a respective output in response to a first signal; a plurality of timing circuits assigned to the plurality of data generating circuits, respectively, wherein each of the timing circuits is configured to measure a time delay between the first signal initiating the generation of the data of the respective data generating circuit and an appearance of the data at the output of the respective data generating circuit; a power supply circuit configured to generate a voltage for supplying power to the data generating circuits; a power controller configured to control the voltage generated by the power supply circuit based on the plurality of measured time delays; and a serial data transfer circuit configured to serially transfer the plurality of measured time delays from the respective timing circuits to the power controller.