Patent ID: 6601150
Filing Date: 2003-07-29
Classification: H04L

Abstract:
In a memory controller, a method for coordinating read and write access to a plurality of memory blocks in a packet memory in order to provide first-in-first-out read access to the packets stored in the packet memory, the method comprising the steps of:causing the packets to be written into the packet memory in first-in-first-out order; causing the packets to be processed by a packet processor; receiving, for each packet, an indication from the packet processor that the packet is ready to be forwarded, wherein the packets may become ready to be forwarded out of order; and causing the packets that become ready to be forwarded to be read from the packet memory in first-in-first-out order, including the step of maintaining a START indicator and a VALID indicator corresponding to each of the plurality of successive memory blocks in the packet memory, wherein the START indicator, when set to a predetermined value, indicates that a packet starts in the corresponding memory block, and wherein the VALID indicator, when set to a predetermined value, indicates that the packet starting in the corresponding memory block is ready to be forwarded.