Patent ID: 7091550
Filing Date: 2006-08-15
Classification: H01L

Abstract:
1. A non-volatile memory device, comprising: a substrate, wherein the substrate has a trench; a gate disposed over and completely filling the trench, wherein a part of the gate is protruded above the substrate; a plurality of spacers located on the sidewalls of the protruded part of the gate; a bottom oxide layer disposed between the gate and the trench surface; a charge-trapping layer disposed between the gate and the bottom oxide layer, wherein the charge-trapping layer is conformal to a bottom surface of the trench and at least one sidewall of the trench; a top oxide layer disposed between the gate and the charge-trapping layer; a plurality of lightly doped regions located in the substrate underneath the spacers; and a plurality of source/drain regions located at both sides of the trench in the substrate.