Patent ID: 7640151
Filing Date: 2009-12-29
Classification: G06F

Abstract:
1. A simulation system for simulating a response of an electronic circuit, the circuit being representable by a network of logical elements, comprising: a first asynchronous clock domain; and a second asynchronous clock domain, coupled to the first asynchronous clock domain, including a first jitter element and a second jitter element, wherein the first jitter element includes a delay element and a multiplexer, the first jitter element being configured to randomly introduce predetermined timing delays into data from the first asynchronous clock domain, the first jitter element being insertable in the second asynchronous clock domain at a circuit boundary between the first asynchronous clock domain and the second asynchronous clock domain, and the second jitter element includes an x generator element configured to randomly introduce predetermined signal values into the data from the first asynchronous clock domain.