Patent ID: 6901019
Filing Date: 2005-05-31
Classification: G11C

Abstract:
1. In a digital memory system including a memory cell arranged to store charge, apparatus providing an adaptive reference voltage comprising: a bit line coupled to the cell and arranged to conduct a current based on the charge stored in the cell; a transfer gate; a reference voltage generator arranged to generate a reference voltage; a sense amplifier; and a control circuit operative during a first mode of operation to precharge the bit line to generate a bit line precharge voltage and to cause the transfer gate to sample and store the precharge voltage, operative during a second mode of operation to cause the transfer gate to isolate the bit line from the sampled and stored precharge voltage, to cause the reference voltage generator to generate the reference voltage in response to the sampled and stored precharge voltage and to couple the bit line and the reference voltage to the sense amplifier.