Patent ID: 6319824
Filing Date: 2001-11-20
Classification: H01L

Abstract:
A method of forming a semiconductor device, comprising:stacking on each other in sequence an interlayer dielectric layer, a contact mask material layer comprised of a material having a high etching selectivity with respect to the interlayer dielectric layer, and an anti-reflection layer, and a photoresist layer, on a semiconductor substrate;patterning the photoresist layer to form a first photoresist pattern to expose a part of a surface of the anti-reflection layer;performing a flow process on the first photoresist pattern to produce a second photoresist pattern which exposes a smaller amount of the surface of the anti-reflection layer than the first photoresist pattern;etching the anti-reflection layer and the contact mask material layer using the second photoresist pattern as a mask to form an anti-reflection layer pattern and a contact mask pattern exposing a part of the surface of the interlayer dielectric layer;etching the interlayr dieletric layer using the second photoresist pattern, the anti-reflection layer patter, and the contact mask pattern as an etch mask, to form a contact hole;removing the second photoresist pattern;forming insulation spacers on sidewalls of the contact hole, and simultaneously removing the anti-reflection layer pattern during the forming of the insulation spacers;forming a conductive layer to fill the contact hole and to cover an upper surface of the contact mask pattern; andetching the conductive layer and the contact mask pattern to form a storage node pattern.