Patent ID: 6429136
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A method for forming a device isolation region of a shallow trench isolation structure in a semiconductor device, the method including the steps of:forming a pad oxide film and a silicon nitride film on a principal surface of a silicon substrate in the named order, and forming a trench which penetrates through said pad oxide film and said silicon nitride film and extends from said principal surface of said silicon substrate into a body of said silicon substrate; carrying out a thermal oxidation to form a surface protecting oxide film on a surface of said trench; depositing a first silicon oxide film on the whole surface to fill up said trench and to cover said silicon nitride film, and carrying out a first chemical mechanical polishing for said first silicon oxide film until said silicon nitride film is exposed; selectively removing said silicon nitride film, and forming upon said principal surface of said silicon oxide protection film including said pad oxide film and having an increased film thickness sufficient to protect said principal surface of said silicon substrate in a later step; depositing a second silicon oxide film on the whole surface; carrying out a second chemical mechanical polishing for planarization, to remove at least a major portion of said second silicon oxide film from said principal surface of said silicon substrate but to maintain said principal surface of said silicon substrate in an non-exposed condition; and carrying out a wet etching until said principal surface of said silicon substrate is substantially exposed.