Patent ID: 6794281
Filing Date: 2004-09-21
Classification: H01L

Abstract:
A method for forming a first transistor of a first conductivity type and a second transistor of a second conductivity type in a semiconductor substrate having a first well of the first conductivity type and a second well of the second conductivity type, comprising the steps of:forming a gate dielectric over the first and second wells; forming a first metal layer of a first metal type over the gate dielectric; removing a first portion of the first metal layer, the first portion being over the second well; then forming a second metal layer of a second metal type different from said first metal type over the first and second wells; forming a doped polysilicon layer over the second metal layer; forming a gate mask over the first well and the second well; and patterning the first metal layer, the second metal layer, and the doped polysilicon layer according to the mask to leave a first gate over the first well and a second gate over the second well.