Patent ID: 7948405
Filing Date: 2011-05-24
Classification: H03H

Abstract:
1. A sample rate converter circuit, for receiving a first signal at a first sampling frequency and for outputting a second signal, representative of said first signal, having a second sampling frequency, said sample rate converter comprising: a buffer, for storing data samples received from said first signal; a first loop circuit, for receiving a first clock signal corresponding to said first sampling frequency and a second clock signal corresponding to said second sampling frequency, and for generating an estimate of a ratio of the first sampling frequency to the second sampling frequency; and a second loop circuit, for receiving said first clock signal, said second clock signal and said estimate of the ratio of the first sampling frequency to the second sampling frequency, and for outputting a write pointer so that said data samples can be stored in the buffer, and for outputting a read pointer so that said data samples can be read from the buffer, with a first offset between said read pointer and said write pointer, such that said first offset is substantially independent of said ratio of the first sampling frequency to the second sampling frequency.