Patent ID: 7387676
Filing Date: 2008-06-17
Classification: C30B

Abstract:
1. A process for producing silicon semiconductor wafers, comprising: pulling a silicon single crystal using the Czochralski method and processing to form semiconductor wafers, a ratio V/G of pulling rate V and axial temperature gradient G at a growth front during the pulling of the single crystal being controlled to produce agglomerated vacancy defects above a critical size in the single crystal, the agglomerated vacancy defects, in a region of the semiconductor wafer that is of relevance to electronic components, the agglomerated vacancy defects exhibiting shrinkage during production of the components, such that the size of the agglomerated vacancy defect in this region no longer exceeds the critical size, wherein the ratio V/G is controlled such that the following formula is satisfied for G at every radial position of the single crystal: (V/G−ξc)≦α·D