Patent ID: 6444532
Filing Date: 2002-09-03
Classification: H01L

Abstract:
A process for fabricating a MOS semiconductor transistor, the method comprising:forming a gate electrode on a semiconductor substrate with intervention of a gate insulating layer; forming a first oxide film on a surface of the gate electrode; forming a nitride film, over the first oxide film, on the gate electrode and the semiconductor substrate; forming a sidewall spacer of a second oxide film on a side of the gate electrode with intervention of the first oxide film and the nitride film; forming, on the nitride film, a photoresist mask which has an opening in a device formation region; implanting impurity ions through the nitride film and the first oxide film into the semiconductor substrate in a high concentration using the gate electrode, the sidewall spacer and the photoresist mask as a mask; selectively removing the sidewall spacer of the second oxide film from the device formation region by wet etching; implanting impurity ions into the semiconductor substrate in a low concentration using the gate electrode and the photoresist mask as a mask, thereby forming an LDD structure; removing the photoresist mask; and thermally treating the resulting semiconductor substrate.