Patent ID: 7517735
Filing Date: 2009-04-14
Classification: G02F,H01L

Abstract:
1. A method of manufacturing an active matrix substrate, comprising: forming wiring lines each having a matrix pattern on a substrate such that a wiring line extending in any one of a first direction and a second direction is separated from another wiring line at an intersection; forming a laminated portion composed of an insulating layer and a semiconductor layer on a portion of the wiring line and the intersection; and forming a conductive layer that electrically connects the separated wiring lines, and a pixel electrode electrically connected to the wiring line via the semiconductor layer on the laminated portion, wherein the wiring line includes a source line, a gate line, and a capacitive line extending along the gate line in substantially a straight line; the source line, the gate line, and the capacitive line are formed directly on the same face of the substrate; while forming the source line, the gate line, and the capacitive line, the source line is formed so as to be separated from the gate line and the capacitive line at intersections therewith; and each capacitive line intersects a single pixel electrode between consecutive source lines.