Patent ID: 9184733
Filing Date: 2015-11-10
Classification: H03K

Abstract:
1. A low-power device, comprising: a clock path for propagating a clock signal, wherein the clock path includes a plurality of transistors; a clock source configured to generate the clock signal, the clock signal having a high state corresponding to a high voltage that is above threshold voltages of the transistors in the clock path; a data path for propagating a data signal, wherein the data path includes a plurality of transistors; a data source configured to generate the data signal, the data signal having a high state corresponding to a low voltage that is below threshold voltages of the transistors in the data path; and a flop configured to receive the clock signal from the clock path, to receive the data signal from the data path, and to latch the data signal using the clock signal; wherein the clock signal has a voltage swing between the high voltage and the low voltage.