Patent ID: 6895509
Filing Date: 2005-05-17
Classification: G06F,G06K,H01L,Y04S,Y10S

Abstract:
1. A tamper detection system for securing a protected integrated circuit from attack, the tamper detection system comprising: a power source; a trigger circuit including a plurality of resistors and a plurality of wire loops, the plurality of resistors including a first resistor, a second resistor and a third resistor, all of which being wired together in series and operatively connected to the power source, the plurality of wire loops including a first wire loop extending between the first resistor and the second resistor and a second wire loop extending between the second resistor and the third resistor, the first wire loop and the second wire loop being electrically isolated from each other but in physical proximity to each other so as to form a protective mesh that envelopes the protected integrated circuit; a ground layer in physical proximity to the first wire loop or the second wire loop; and a detection circuit being in operative communication with the trigger circuit and the protected integrated circuit, the detection circuit including a first transistor and a second transistor, the first transistor being operatively connected across the second resistor so that the first transistor is controlled by a bias voltage across the second resistor, the second transistor being operatively connected across the first transistor and ground so that the second transistor is activated by an output current received from the first transistor, the detection circuit monitoring a flow of current through the trigger circuit, wherein if the flow of current through the trigger circuit is altered because of an open condition in the first wire loop or the second wire loop or a short between the first wire loop and the second wire loop or a short from the first wire loop or the second wire loop to the ground layer, then the detection circuit outputs a predetermined signal at a designated node located between the power source and the second transistor.