Patent ID: 7251748
Filing Date: 2007-07-31
Classification: G06F,Y10S

Abstract:
1. In an isochronous electronic device including at least one processor and a plurality of chips, each said chip associated with a local time counter of a plurality of local time counters, a method for determining a global ordering of events, said method comprising: detecting an event associated with one of said plurality of chips; generating a timestamp with said local time counter at the time of the occurrence of said detected event, said timestamp being associated with said event; comparing said event and a normalized form of said timestamp with other events and associated normalized timestamps to determine an order of occurrence; providing a Time Base selected by said processor, said Time Base being a baseline time value; and transmitting a reset instruction from said processor to said plurality of local time counters associated with said plurality of chips, said plurality of local time counters resetting to a designated time so as to be synchronized with respect to each other; wherein the transmitting of the reset instruction is staggered so as to ensure that said resetting occurs simultaneously, said transmitting taking into account delays caused by network topology.