Patent ID: 7219336
Filing Date: 2007-05-15
Classification: G06F

Abstract:
1. A method of translating a block of code from a source architecture that supports multiple-format registers to a target architecture that does not, the method comprising: determining a register format of a source register operated on by a source instruction in a source block of code, the register format including an input instruction format and an output block format of the source block of code, the source block of code running in a source architecture, the source register having multiple formats and being used as an input of the source instruction, the input instruction format containing format of the source register expected by the source instruction, the output block format containing format of the source register after the source block of code is executed; detecting an instruction format inconsistency between the source register and a target register of a target architecture during a translation phase of a binary translation that translates the source block of code into a target block of code running in the target architecture; emitting a target instruction sequence corresponding to the source instruction into the target block of code; emitting a block inconsistency check code into a prefix of the target block of code; and emitting a format update code to update a format register associated register format into a suffix of the target block of code.