Patent ID: 8704276
Filing Date: 2014-04-22
Classification: H01L

Abstract:
1. A method of manufacturing a solid-state imaging device, the method comprising the steps of: forming lower first and second conductive-type semiconductor regions on a surface of a substrate, the conductivity of said substrate being opposite to the conductivity of said lower second conductive-type semiconductor region; forming a gate electrode between said lower first and second conductive-type semiconductor regions, the conductivity of said lower first conductive-type semiconductor region being opposite to the conductivity of said lower second conductive-type semiconductor region, wherein said lower first and second conductive-type semiconductor regions and said substrate are insulated from said gate electrode, wherein said lower first conductive-type semiconductor region is deposited onto a second conductive-type layer in the substrate, the conductivity of said second conductive-type layer being opposite to the conductivity of said substrate, wherein said second conductive-type layer is between said lower first conductive-type semiconductor region and a low concentration layer, an impurity concentration of the low concentration layer being lower than an impurity concentration of the second conductive-type layer, wherein an upper first conductive-type semiconductor region is selective epitaxially grown on said lower first conductive-type semiconductor region, an upper second conductive-type semiconductor region being selective epitaxially grown on said lower second conductive-type semiconductor region, and wherein an impurity concentration of the upper second conductive-type semiconductor region is higher than an impurity concentration of the lower second conductive-type semiconductor region, wherein said lower first conductive-type semiconductor region is in a readout region and lower second conductive-type region is in a photoelectric conversion region of the solid-state imaging device.