Patent ID: 7129866
Filing Date: 2006-10-31
Classification: H03M

Abstract:
1. A method of providing offset correction in an analog-to-digital converter circuit, the method comprising: introducing redundancy in an output of a first stage of the analog-to-digital converter circuit; using the redundancy to digitally correct an offset in an output of the analog-to-digital converter circuit; wherein introducing redundancy in the output of the first stage of the analog-to-digital converter circuit includes modifying a quantizer of the first stage to remove an uppermost reference voltage from the output of the first stage; and wherein modifying the quantizer of the first stage of the analog-to-digital converter circuit includes increasing the number of comparators used in the quantizer of the first stage of the analog-to-digital converter circuit to a number higher than that required for generating an output necessary for a second stage of the analog-to-digital converter circuit.