Patent ID: 7372154
Filing Date: 2008-05-13
Classification: H01L

Abstract:
1. A semiconductor device comprising a substrate and a plurality of conductor layers stacked thereon; each of said conductor layers having a first insulation layer, a second insulation layer and a third insulation layer, and a conductor wiring having been so formed as to extend through these three insulation layers, each of said first insulation layer and said third insulation layer consists of at least one selected from the group consisting of silicon carbonitride, and silicon oxide; a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers has a dielectric constant smaller than that of a second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers, wherein; a second insulation layer of a conductor layer positioned at a lower-layer part among said conductor layers is a porous silicon oxide having a dielectric constant of less than or equal to 2.5 and a second insulation layer of a conductor layer positioned at an upper-layer part among said conductor layers is a fluorine-doped silicon oxide having a dielectric constant of 3.6.