Patent ID: 8126396
Filing Date: 2012-02-28
Classification: H04B,H04W

Abstract:
1. An access point circuitry that supports reception of concurrent interfering transmissions utilizing a multiple input/multiple output technique from a plurality of end point devices, the access point circuitry comprising: receiver circuitry operable to receive the concurrent interfering transmissions from the plurality of end point devices, comprising a multiple input/multiple output transceiver circuitry; processing circuitry, communicatively coupled to the receiver circuitry, that is operable to decode the concurrent interfering transmissions; transmitter circuitry communicatively coupled to the processing circuitry; the processing circuitry, based on a change in a channel condition is operable to generate an instruction to change at least one frame parameter using the multiple input/multiple output technique; the processing circuitry is operable to deliver the instruction to at least one of the plurality of end point devices via the transmitter circuitry; the receiver circuitry is operable to receive the concurrent interfering transmissions, utilizing the multiple input/multiple output transceiver circuitry; and the processing circuitry is operable to decode the received concurrent interfering transmissions; and the processing circuitry based on channel conditions during subsequent frames, wherein the channel conditions during subsequent frames includes a number of the plurality of end point devices associated with the access point circuitry, is operable to: