Patent ID: 8853864
Filing Date: 2014-10-07
Classification: B82Y,G06K,G11C,H01L,H05K

Abstract:
1. A device comprising: a base substrate including an upper surface and a lower surface opposite to the upper surface, and a first peripheral edge and a second peripheral edge which are opposite to each other and in parallel with each other, the first peripheral edge being smaller in length than the second peripheral edge; a first semiconductor chip bonded to the upper surface of the base substrate; a second semiconductor chip bonded to one of the upper surface of the base substrate and the upper surface of the first semiconductor chip, each of the first and second semiconductor chips having bonding pads which are electrically connected with electrodes on the base substrate via wires; a sealing resin covering the first and second semiconductor chips; and a plurality of external terminals provided over the lower surface of the base substrate, the external terminals being arranged in a line along the first peripheral edge.