Patent ID: 6150883
Filing Date: 2000-11-21
Classification: H03F

Abstract:
A differential amplifier with a rail-to-rail common mode input voltage range, comprising:(a) first and second supply voltage rails, first and second input terminals, and an output terminal;(b) a rail-to-rail input stage includingi. differentially connected first and second input transistors of a first channel type, and differentially connected third and fourth input transistors of the second channel type;(c) a first folded cascode current summing circuit coupled to the first supply voltage rail and including a first cascode transistor and a second cascode transistor both of the second channel type, sources of the first and second cascode transistors being coupled to drains of the first and second input transistors, respectively;(d) a first cascode transistor bias circuit producing bias signals on gates of the first and second cascode transistors, respectively;(e) a second folded cascode current summing circuit coupled to the second supply voltage rail and including a third cascode transistor of the first channel type and a fourth cascode transistor of the first channel type, sources of the third and fourth cascode transistors being coupled to drains of the third and fourth input transistors, respectively;(f) a second cascode transistor bias circuit producing bias signals on gate electrodes of the third and fourth cascode transistors, respectively;(g) an output stage including a pull-up transistor of the second channel type coupled between the first supply voltage rail and the output terminal, a pull-down transistor of the first channel type coupled between the second supply voltage rail and the output terminal, and a class AB bias circuit coupled between drain electrodes of the second and fourth cascode transistors and the gate electrodes of the pull-up and pull-down transistors; and(h) a bias current circuit including a fifth cascode transistor of the first channel type having a gate connected to the gate of the third cascode transistor and a source coupled to a first constant current source and a first terminal of a differential bias amplifier having a second input coupled to a source of the third cascode transistor and an output coupled to first and second current source transistors of the first channel type coupled between the second supply voltage rail and the sources of the third and fourth cascode transistors.