Patent ID: 7616722
Filing Date: 2009-11-10
Classification: H04L

Abstract:
1. A circuitry for extracting a clock in a clock data recovery system suitable for processing a sampling of a transmission data, and the circuitry for extracting clock comprises: a plurality of XOR gates for comparing status of each of a plurality sub-periods and generating an XOR operation result, wherein the sampling of the transmission data comprises a plurality of pulse signals corresponding to a plurality of signal periods in the transmission data, and a mark is inserted between any two adjacent pulse signals in order to divide the signal period into the two sub-periods; a plurality of shift register modules correspondingly coupled to the XOR gates respectively, each of the shift register modules comprising a plurality of status output terminals for outputting the XOR operation result received in different time point; and a plurality of OR gates correspondingly coupled to the shift register modules for receiving the outputs from the status output terminals and continuously checking whether the signal of each sub-period is changed.