Patent ID: 6638815
Filing Date: 2003-10-28
Classification: H01L

Abstract:
A method of making an electrical connection between a lower electrical contact and a contact region of a semiconductor substrate comprising the steps of:forming said lower electrical contact having a contact top surface at a reference depth in an aperture formed in a semiconductor substrate and having aperture sidewalls; forming a first sidewall layer overlapping said lower electrical contact along a vertical axis; forming a vertical hardmask on said aperture sidewalls above said reference depth; recessing an upper portion of said lower electrical contact to a second depth below said reference depth; recessing an upper portion of said sidewall layer adjacent to said lower electrical contact below said reference depth, thereby exposing said aperture sidewalls below said vertical hardmask in a diffusion window; depositing supplementary conductive material in said diffusion window to the level of said second depth, thereby establishing said diffusion window between said second depth and said vertical hardmask; and diffusing dopant into the substrate walls through said diffusion window, thereby forming a conductive path vertically through said substrate from said lower electrode to said contact region of said substrate.