Patent ID: 7675966
Filing Date: 2010-03-09
Classification: G06F

Abstract:
1. A method for on-chip detection of data lock and measurement of data lock time in a high-speed serial data link, the method comprising: permitting one or more incoming data streams into the high-speed data link, each of the one or more incoming data streams having a plurality of bits; establishing a pattern to be searched in the one or more incoming data streams; comparing patterns in the one or more incoming data streams to a programmable data pattern to detect a data lock state and data lock time of the high-speed serial data link; holding a repetitive pattern of bits in the one or more incoming data streams by one or more programmable data pattern registers, wherein when one or more occurrences of a byte are detected, an appropriate bit in the one or more programmable data pattern registers is set to indicate the byte's relative position; and filtering false indications in the repetitive pattern by using a byte detection state machine, the state machine controlling and keeping track of a search progress and maintaining a counter for a number of successive groups of bytes correctly matched.