Patent ID: 6221736
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A fabrication method for a shallow trench isolation structure, the method comprising the steps of:providing a semiconductor substrate;forming a pad oxide layer on the semiconductor substrate;forming a silicon oxy-nitride layer on the pad oxide layer;forming a silicon nitride layer on the silicon oxy-nitride layer;performing photolithography and etching to form a trench in the substrate through the silicon nitride layer, the silicon oxy-nitride layer and the pad oxide layer;forming liner oxide layer on an exposed substrate surface in the trench;removing portions of the silicon nitride layer and the silicon oxy-nitride layer in the trench by a wet-etching process to form a recessed profile on sidewalls of the silicon nitride layer and the silicon oxy-nitride layer;filling the trench with an oxide material such that the oxide material covers upper corners of the trench; andsequentially removing a remaining of the silicon nitride layer, the silicon oxy-nitride layer and the pad oxide layer.