Patent ID: 6680493
Filing Date: 2004-01-20
Classification: H01L

Abstract:
An ESD protective transistor for dissipating an electrostatic discharge between a first terminal and a second terminal, comprising the following features:a heavily doped base region of a first doping type arranged in a lightly doped well of said first doping type and provided with the first terminal; a heavily doped emitter region of a second doping type arranged in said lightly doped well of the first doping type; and a heavily doped collector region of the second doping type separated from said lightly doped well of the first doping type by a lightly doped region of the second doping type and provided with the second terminal, wherein the emitter region, the lightly doped well of the first doping type and the lightly doped region of the second doping type are arranged to form a vertical bipolar transistor, and wherein the heavily doped emitter region of the second doping type is not shorted together with the heavily doped base region of the first doping type via a common electrode and does not have any external connection.