Patent ID: 7669172
Filing Date: 2010-02-23
Classification: G03F

Abstract:
1. A pattern creation method, comprising: by a computer: laying out data of a most extreme end pattern located at the most extreme end of a plurality of integrated circuit patterns arranged in line on a processing object substrate on a first layer, and laying out data of said each integrated circuit pattern other than the most extreme end pattern on a second layer; extracting data of a first most proximate pattern which is most proximate to the most extreme end pattern of said each integrated circuit pattern except the most extreme end pattern from the second layer and converting data of the extracted first most proximate pattern from the second layer to a third layer; generating data of a contacting pattern which contacts both the first most proximate pattern whose data is converted to the third layer and the most extreme end pattern in a fourth layer; generating data of a non-overlapping pattern which is the contacting pattern whose data is generated in the fourth layer, excluding a portion which overlaps the most extreme end pattern and the first most proximate pattern whose data is converted to the third layer, in a fifth layer; extracting data of a second most proximate pattern which is most proximate to the non-overlapping pattern whose data is generated in the fifth layer of said each integrated circuit pattern whose data is laid out in the second layer and converting data of the extracted second most proximate pattern from the second layer to the first layer; and repeating from a step of extracting data of the first most proximate pattern from the second layer and converting the data to the third layer to a step of extracting data of the second most proximate pattern from the second layer and converting the data to the first layer with respect to all data of said each integrated circuit pattern.