Patent ID: 7652332
Filing Date: 2010-01-26
Classification: H01L

Abstract:
1. An extremely-thin silicon-on-insulator transistor comprising: a buried oxide layer above a substrate; a silicon layer above the buried oxide layer; a gate stack on the silicon layer, the gate stack including a high-k oxide layer on the silicon layer and a metal gate on the high-k oxide layer; a nitride liner having a first part on the silicon layer, and a second part adjacent to the gate stack; an oxide liner having a first part on the first part of the nitride liner, and a second part adjacent to the second part of the nitride liner; and raised source/drain regions each having a first part comprising a portion of the silicon layer, a second part adjacent to the first part of the oxide liner and the first part of the nitride liner, and a third part above the second part and extending higher than a top of the first part of the oxide liner.