Patent ID: 6307388
Filing Date: 2001-10-23
Classification: G01R

Abstract:
An electromechanical apparatus for testing integrated circuit chips, which is comprised of:a frame, and a first set of planar substrates which are held by said frame at spaced-apart locations which are parallel to each other;a second set of planar substrates which are held by said frame in an open position where each substrate of said second set is separated from one respective substrate of said first set by an predetermined distance which has a variance .DELTA.y;each substrate of said first set having one face with sockets which hold said chips that are to be tested, and having an opposite face with first electrical contacts that carry all power and all signals for those chips;each substrate of said second set having one face with mating electrical contacts that are aligned with said first electrical contacts, and having an opposite face with power and signal connectors that are electrically connected through the substrate, to said mating electrical contacts; and,a means for moving all of said substrates of one of said sets concurrently, from said open position to said closed position where said first electrical contacts press against said mating electrical contacts;said means for moving including--1) a rigid member, which moves on said frame, that has tracks for each substrate of said one set, and 2) respective springy members which are moved by said tracks and which in turn concurrently move all of said substrates of said one set by their respective distances that have said variance .DELTA.y.