Patent ID: 8450165
Filing Date: 2013-05-28
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, comprising: forming a gate stack on a substrate, wherein said gate stack is comprised of a metal gate electrode above a channel region, and a high-k gate dielectric layer formed between said metal gate electrode and said channel region and along the sidewalls of said metal gate electrode; forming a pair of source/drain regions on either side of said gate stack and in said substrate to define a channel region in said substrate, wherein said pair of source/drain regions is in direct contact with said high-k gate dielectric layer, and wherein the lattice constant of said pair of source/drain regions is different than the lattice constant of said channel region, said pair of source/drain regions formed with an undercut profile of approximately 55 degrees with respect to a horizontal axes; forming regions of boron out-diffusion in said substrate and adjacent to the periphery of said pair of source/drain regions; and forming an inter-layer dielectric film directly adjacent to the portions of said high-k gate dielectric layer along the sidewalls of said metal gate electrode.