Patent ID: 6835978
Filing Date: 2004-12-28
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor layer; a first insulating film formed on said semiconductor layer; a first electrode layer formed on said first insulating film; element isolating regions comprising of an element isolating insulating film formed to extend through said first electrode layer and said first insulating film to reach an inner region of said semiconductor layer, said element isolating regions isolating an element region and being self-aligned with said first electrode layer; a second insulating film formed on said first electrode layer across said element isolating regions, said second insulating film having an open portion exposing a surface of said first electrode layer, and said element isolating insulating film being located under the open portion and having a groove having a shape which is the same as that of the open portion; and a second electrode layer formed on said second insulating film and said exposed surface of said first electrode layer, said second electrode layer being electrically connected to said first electrode layer via said open portion, said first and second electrode layers including a gate electrode, said open portion having a first width in a direction of a gate length of said gate electrode and a second width in a direction perpendicular to the direction of the gate length, the second width being greater than the first width, the open portion extending in a direction of the second width across the element isolating regions, and said open portion being located at a center portion of the second electrode layer.