Patent ID: 9025595
Filing Date: 2015-05-05
Classification: G06F

Abstract:
1. Network architecture for communication between elementary calculus units or nodes of a supercomputer in order to execute a super-calculus processing application, partitionable and scalable at the level of calculus power in the range of PetaFLOPS, said supercomputer comprising a plurality of modular structures, each of which comprises: a plurality of elementary calculus units or nodes defined by node cards, which represent the basic components which implement the calculus and network functions relating to a calculus unit or node of the architecture, wherein the overall processing required by the application is mapped on a determinate partition of said nodes and distributed in coordinated manner to said individual nodes, each of which is configured to execute a process or sub-set of operations required by the application; a backplane both of interconnection between said nodes of the modular structure and also of communication of said nodes with the other modular structures; a root card, which manages feed and provides to monitor and distribute synchronization information both between the nodes interconnected by the relative backplane and also toward the other modular structures; wherein the network architecture includes i) an internodal communication architecture, configured to receive data and information to be processed at input to said nodes and for transmission at output, to one or more other nodes that belong to the mapped application on the desired partition of the modular structure, of output data relating to the results of the processing, so as to at least distribute the processing between several nodes, to effect different processing tasks substantially simultaneously and to share the relative results among several nodes, said communication architecture comprising a node communication network of the n-toroidal type and a node communication network of the switched fabric fat tree type; ii) a synchronization architecture comprising a plurality of distinct node communication networks, configured for the communication of specific synchronization information different from network to network and with different characteristics; iii) a re-configurable Programmable Network Processor that implements the nodes both of the n-toroidal network and those of the synchronization networks; wherein said node communication networks of the n-toroidal type and of the switched fabric fat tree type can be used alternately or simultaneously for the transmission between the calculus nodes of the same type of data and information also in a configuration of system partitions in order to achieve the desired interconnection topology of the nodes; said synchronization networks can be used independently or collaboratively for every topology and partitioning of the system; said Programmable Network Processor of each node is suitable to implement the calculus operations necessary to process the data in transit on the synchronization architecture networks in order to reduce the network traffic and the latency, said Programmable Network Processor being configurable even in real time, during the execution of an application, in order to achieve a particular system partitioning at a certain instant.