Patent ID: 6221714
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A method of forming a contact hole in a semiconductor substrate, the semiconductor substrate having a cell array region and a core region, the cell array region having at least two first gate stacks and the core region having at least two second gate stacks, the method comprising:forming first and second insulating layers over the semiconductor substrate, the first gate stacks, and the second gate stacks;forming a first photoresist layer over the second insulating layer to cover the cell array region and to expose the core region;using the first photoresist layer as a mask to etch the first and second insulating layers to form first spacers on sidewalls of the second gate stacks;removing the first photoresist layer;forming a second photoresist layer to cover the core region and to expose the cell array region;using the second photoresist layer as a mask to etch the second insulating layer to expose the first insulating layer;removing the second photoresist layer;forming an interlayer insulating layer over the semiconductor substrate, the first gate stacks, and the second gate stacks;etching a selected portion of the interlayer insulating layer to form a contact hole between the first gate stacks;forming a third insulating layer over the semiconductor substrate, the first gate stacks, the second gate stacks, and the contact hole;etching the third insulating layer to form second spacers on sidewalls of the contact hole; andusing the interlayer insulating layer and the second spacers as a mask to etch the first insulating layer to expose a top surface of the semiconductor substrate.