Patent ID: 7839993
Filing Date: 2010-11-23
Classification: H03H,H04B,H04L

Abstract:
1. A circuit comprising a line driver having output terminals connected to a load for supplying a transmit signal to the load and a line receiver having input terminals connected to the load for simultaneously receiving a receive signal from the load, an arrangement for canceling the transmit signal on the input terminals of the line receiver, the output terminals of the line driver being connected to the load via equal first impedances, the input terminals of the line receiver being connected to the load via equal first resistors and to respective ones of the line driver output terminals via equal second resistors, wherein the first impedances are complex impedances of an impedance value that is much smaller than an impedance value of the load so that a drive/termination impedance of the line driver matches the load impedance, and transconductance amplifiers are provided to sense the voltage across the first impedances and supply corresponding currents to respective ones of the line driver input terminals.