Patent ID: 6804140
Filing Date: 2004-10-12
Classification: G11C

Abstract:
A capacitance sensing method of reading a FeRAM (Ferroelectric Random Access Memory), the FeRAM including a word line, a bit line, an inverse bit line, a first switch, a second switch, a first ferroelectric capacitor, a second ferroelectric capacitor, a plate line, and a latch sense amplifier, wherein the bit line, the first switch, the first ferroelectric capacitor, and the plate line are connected serially, the inverse bit line, the second switch, the second ferroelectric capacitor, and the plate line are connected serially, the word line is used for switching the first and the second switches, and the latch sense amplifier is coupled to the bit line and the inverse bit line, the method comprising:turning on the first and the second switches by enabling the word line; changing the voltages of the bit line and the inverse bit line according to the first and the second ferroelectric capacitors by enabling the latch sense amplifier; and outputting the data stored in the FeRAM according to the voltage difference between the bit line and the inverse bit line.