Patent ID: 6298003
Filing Date: 2001-10-02
Classification: G11C

Abstract:
A boost circuit for driving word lines in a memory device, which comprises:delaying means for delaying a signal at right time to turn on a refresh cycle of said boost circuit;precharge timing controlling means for controlling the timing of said refresh cycle, wherein said delay means transmitting said signal to said precharge timing controlling means for disabling and enabling said precharge timing controlling means;precharge means for supplying charge, wherein said precharge means is controlled by said precharge timing controlling means;a first charge storage connected to said precharge means, charged by said precharge means and charging said word lines; anda second charge storage connected to said precharge means, charged by said precharge means and charging said word lines, wherein said second charge storage is connected to said precharge timing controlling means for deciding to turn on said second charge storage.