Patent ID: 6699772
Filing Date: 2004-03-02
Classification: H01L

Abstract:
A method of creating a trench for high voltage isolation in a semiconductor substrate having a first surface, said method comprising:forming a first trench in said substrate, said first trench having sidewalls and a bottom surface with said first trench having a first width and a first depth; forming spacers along said sidewalls of said first trench with said spacers partially covering said bottom surface; forming a barrier layer on portions of said bottom surface not covered by said spacers; removing said spacers thereby exposing portions of said bottom surface not covered by said barrier layer; etching said bottom surface, not covered by said barrier layer, to form a second trench having sidewalls and a bottom surface with said second trench having a second depth; and conformally depositing an insulating layer on said first surface including filling said first and second trenches.