Patent ID: 8558621
Filing Date: 2013-10-15
Classification: H04L

Abstract:
1. A driver amplifier circuit comprising: a first current source transistor of a first conductivity type, and a second current source transistor of the first conductivity type, control voltages being supplied to gates of said first current source transistor and said second current source transistor, respectively; a first switching transistor of the first conductivity type, and a second switching transistor of the first conductivity type; a third switching transistor of a second conductivity type, and a fourth switching transistor of the second conductivity type; first, second, third, and fourth resistor elements; and a first output node and a second output node, wherein in said first switching transistor, a source thereof is connected to a first power source electric potential, and a drain thereof is connected to said first output node through said first resistor element, in said second switching transistor, a source thereof is connected to the first power source electric potential, and a drain thereof is connected to said second output node through said second resistor element, in said third switching transistor, a source thereof is connected to the second power source electric potential, and a drain thereof is connected to said first output node through said third resistor element, in said fourth switching transistor, a source thereof is connected to the second power source electric potential, and a drain thereof is connected to said second output node through said fourth resistor element, in said first current source transistor, a source thereof is connected to the first power source electric potential, and a drain thereof is connected to said first output node, in said second current source transistor, a source thereof is connected to the first power source electric potential, and a drain thereof is connected to said second output node, each of gates of said first and third switching transistors is connected to a supply line for an input signal which is set to a first level at which said first current source transistor, first switching transistor, and second switching transistor of the first conductivity type are caused to be in a non-conduction state, and said second current source transistor, third switching transistor, and fourth switching transistor of the second conductivity type are caused to be in a conduction state, and is set to a second level at which said first current source transistor, first switching transistor and second switching transistor of the first conductivity type are caused to be in the conduction state, and said second current source transistor, third switching transistor, and fourth switching transistor of the second conductivity type are caused to be in the non-conduction state, each of said gates of said second and fourth switching transistors is connected to a supply line for an inverted signal of the input signal; a fifth switching transistor of the first conductivity type having a source connected to the first power source electric potential between the first power source electric potential and said source of said first current source transistor, a drain connected to said source of said first current source transistor, and a gate connected to said supply line for the input signal; and a sixth switching transistor of the first conductivity type having a source connected to the first power source electric potential between the first power source electric potential and said source of said second current source transistor, a drain connected to said source of said second current source transistor, and a gate connected to said supply line for the inverted signal.