Patent ID: 6509763
Filing Date: 2003-01-21
Classification: G11C,H03K,H03L

Abstract:
A signal input state detection circuit for detecting whether a small-amplitude signal is input or not, comprising:a first inverter including a first P-channel transistor and a first N-channel transistor inserted in series between a high-voltage terminal and a low-voltage terminal of a power supply, said small-amplitude signal being applied to the gate of said first P-channel transistor and the gate of said first N-channel transistor, said first P-channel transistor having a gate width sufficiently larger than the gate width of said first N-channel transistor; a second inverter including a second P-channel transistor and a second N-channel transistor inserted in series between said high-voltage terminal and said low-voltage terminal of said power supply, said small-amplitude signal being applied to the gate of said second P-channel transistor and the gate of said second N-channel transistor, said second N-channel transistor having a gate width sufficiently larger than the gate width of said second P-channel transistor; and a logic circuit for producing an active signal indicating that said small-amplitude signal is input upon detection that the output of said first inverter assumes a logical value approximate to the potential of said high-voltage terminal and upon detection that the output of said second inverter assumes a logical value approximate to the potential of said low-voltage terminal.