Patent ID: 9041570
Filing Date: 2015-05-26
Classification: H03M

Abstract:
1. An analog-to-digital converter comprising: a first analog-to-digital conversion cell that quantizes a voltage level of an analog signal within a first input range at a first quantization step and outputs a first digital value; a second analog-to-digital conversion cell that quantizes the voltage level of the analog signal within a second input range at a second quantization step and outputs a second digital value; a configuration controller which, when a mode specifying signal indicates a first mode, generates a control signal that sets the first and second input ranges to the same voltage range and sets first and second sampling clocks to different phases, and when the mode specifying signal indicates a second mode, generates the control signal that sets the first and second input ranges to one continuous voltage range and sets the first and second sampling clocks to the same phase; an ADC cell controller which individually controls an upper limit value and a lower limit value of the first input range and an upper limit value and a lower limit value of the second input range according to the control signal; a sampling clock generator which supplies the first and second sampling clocks to the first and second analog-to-digital conversion cells, respectively, according to the control signal; and an output data processing circuit that merges the first and second digital values and outputs output data.