Patent ID: 8969202
Filing Date: 2015-03-03
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: providing a substrate, wherein the substrate has a first region and a second region; forming a silicon layer on the substrate; performing a planarization process to make the silicon layer having a planar surface; removing a part of the silicon layer to form a plurality of first gates on the first region and to form a plurality of second gates on the second region, wherein the height of the first gates is greater than that of the second gates, and top surfaces of the first gates and the second gates have the same height level; forming a dielectric layer on the substrate, wherein the dielectric layer is fully filled between one of the first gates and one of the second gates and exposes the top surfaces of the first gates and the second gates; and forming a metal silicide on the top surfaces of the first gates and the second gates.