Patent ID: 6218714
Filing Date: 2001-04-17
Classification: B82Y,H01L

Abstract:
An insulated gate semiconductor device, comprising:a source region, a drain region and a channel forming region which are formed in a semiconductor having a major surface; anda gate insulating film and a gate electrode formed on said channel forming region;wherein said channel forming region includes a region in which carriers move and a plurality of impurity regions for pinning a depletion layer that expands from said drain region toward said channel forming region and said source region, each impurity region having a circular shape on said major surface of said semiconductor; andwherein impurity elements that shift an energy bandwidth (Eg) of said channel forming region are added to said impurity region, and said impurity elements have a conductivity type opposite to that of the source and drain regions,wherein widths of said impurity regions in a channel width direction Wpi is in a range of 10 to 100 .ANG. and widths between said impurity regions in said channel width direction Wpa is in a range of 100 to 3000 .ANG..