Patent ID: 7234041
Filing Date: 2007-06-19
Classification: G06F

Abstract:
1. A method for fetching instructions in an embedded system that includes a system bus, a processor coupled to the system bus, at least a peripheral controller coupled to the system bus, and a memory device having a set of the instructions stored therein, said method comprising the steps of: a) determining whether the system bus is in a data access phase, wherein in the data access phase, the system bus is occupied by data communication between the processor and the peripheral controller or between two peripheral controllers; b) fetching a predicted one of the instructions from the memory device and storing the predicted one of the instructions in an instruction buffer when the system bus is in the data access phase; c) determining whether the processor generates an access request for the memory device; d) determining whether the predicted one of the instructions stored in the instruction buffer hits the access request from the processor upon determining that the processor generated the access request; and e) providing the predicted one of the instructions stored in the instruction buffer to the system bus for receipt by the processor when the predicted one of the instructions stored in the instruction buffer hits the access request from the processor.