Patent ID: 8482447
Filing Date: 2013-07-09
Classification: H03M,H04N

Abstract:
1. An analog-to-digital converter, comprising: a comparator configured to compare a pixel signal received at a first input terminal thereof with a ramp signal received at a second input terminal thereof and generate a comparison signal as a result of the comparison; and a ramp signal supply circuit configured to provide the ramp signal to the comparator, wherein the ramp signal supply circuit generates a first signal as part of the ramp signal in response to the comparison signal and a first clock signal being received at the ramp signal supply circuit, wherein a value of the first signal sequentially changes until the comparison signal makes a transition from one logic level to another and, after the transition, the ramp signal supply circuit generates a second signal as part of the ramp signal, wherein a value of the second signal sequentially changes, wherein a slope of the second signal is opposite a slope of the first signal, wherein the first signal is provided to the second input terminal via a first capacitor in the ramp signal supply circuit and the second signal is provided to the second input terminal via a second capacitor in the ramp signal supply circuit, wherein the ramp signal supply circuit provides the ramp signal corresponding to a superposition of the first signal and the second signal to the second input terminal of the comparator using the first and second capacitors.