Patent ID: 6690059
Filing Date: 2004-02-10
Classification: B82Y,G11C,H01L

Abstract:
A transistor structure comprising:a substrate of semiconductor conductivity; a mesa structure disposed on the substrate with upright side walls, the mesa comprising a layer of gate oxide over the substrate, a doped floating charge reservoir layer over the gate oxide layer, a tunnel barrier layer over the floating charge reservoir layer, a nanocrystal layer disposed over the tunnel layer, an insulative layer over the tunnel layer, and a conductive control gate over the insulative layer; and source and drain regions of a second conductivity type aligned with the upright opposed side walls of the mesa structure, with the mesa defining a channel in the substrate between the source and drain regions with an electric field pinch-off characteristic influenced by the location of electrons in the mesa structure whereby electrons pulled from the charge reservoir layer to the nanocrystal layer change the pinch-off characteristic between source and drain regions thereby changing conductivity between source and drain regions.