Patent ID: 6510606
Filing Date: 2003-01-28
Classification: H01L,Y10T

Abstract:
A method of fabricating a multichip module comprising the steps of:(a) providing at least one submodule assembly constructed from low temperature co-fired ceramic (LTCC), where the at least one submodule assemblies includes first and second sides, where the first side has mounted thereon a plurality of circuit dice are electrically connected to at least one external electrical connection pad positionable on the second side, and the construction of the at least one submodule assembly comprises the steps: providing a plurality of ceramic tape layers; punching electrical vias through each of said plurality of ceramic tape layers; applying conductor and resistor inks to said plurality of ceramic tape layers, which includes the metallization of the electrical vias and creation of the external electrical connection pads on external surfaces of the at least one submodule assembly; pressing the layers together and firing at a predetermined temperature; plating the external electrical connection pads; and mounting the plurality of integrated circuit dice on the first side of the at least one submodule assembly proximate to a number of the external electrical connection pads on the first side of the at least one submodule assembly and establishing electrical contact between the and the at least one external electrical connection pad; (b) providing a carrier module configured with at least one open cavity formed therein sized to receive and support the at least one submodule assembly; (c) positioning the at least one submodule assembly in the at least one open cavity of the carrier module such that the first side of the submodule assembly, including the plurality of circuit dice, are substantially enclosed within the cavity and the second side, including the at least one external electrical connection pad, is exposed; (d) disposing at least one flexible insulative layer with upper and lower surfaces over the at least one submodule assembly and the open cavity such that the lower surface of the flexible insulative layer is in contact with the at least one submodule assembly, and the at least one submodule assembly is enclosed therein; and (e) locating the at least one electrical connection pad beneath the at least one flexible insulative layer and configuring the at least one flexible insulative layer such that at least one conduction line is formed over the upper surface and in connection with the at least one external electrical pad.