Patent ID: 7348596
Filing Date: 2008-03-25
Classification: G11C,H01L

Abstract:
1. A test device for detecting current leakage between deep trench capacitors in DRAM devices, wherein the test device is disposed in a scribe line region of a wafer, comprising: a plurality of bit line regions arranged in parallel, each comprising: a first trench capacitor pair having a first deep trench capacitor and a second deep trench capacitor disposed in parallel in a row; a first transistor having a first terminal electrically coupled to the first deep trench capacitor and a control terminal electrically coupled to a first word line; a second transistor having a first terminal electrically coupled to the second deep trench capacitor and a control terminal electrically coupled to a second word line; a first bit line electrically coupled to the first transistor; and a second bit line electrically coupled to the second transistor; wherein the first bit lines in the bit line regions are connected to each other, the second bit lines in the bit line regions are connected to each other, the first and second bit lines are separated and the first and second word lines are perpendicular to the bit line regions.