Patent ID: 8787058
Filing Date: 2014-07-22
Classification: G11C

Abstract:
1. A content addressable memory (CAM), comprising: a plurality of pairs of CAM elements, each pair of CAM elements storing binary values; a plurality of sets of decoders, each set of decoders connected to one pair of CAM elements and configured to provide a comparison value; a plurality of sets of match lines, each set of match lines configured to provide a match value on only one of the match lines; a plurality of sets of comparators, wherein the comparison value is supplied to one of the sets of comparators and the match value is supplied to the one set of comparators, the one set of comparators configured to compare the comparison value to the match value; a multiplexor connected to each of the sets of comparators, the multiplexor having two or more input lines and configured to select one of the sets of comparators based on values on the input lines; and a single output line connected to each of the comparators, wherein a positive match result value is output on the output line responsive to a comparator indicating a match between the comparison value and the match value.