Patent ID: 6740927
Filing Date: 2004-05-25
Classification: H01L

Abstract:
A nonvolatile memory capable of storing multi-bits binary information bits, comprising:an oxide formed on a substrate; a control gate formed on said oxide; a L-shape structure attached on sidewall of said control gate, a vertical portion of said L-shape structure attaching on the side wall of said gate and a lateral portion where tunneling will be occurred is formed on said substrate; spacers formed on said L-shape structure to act as a floating gate; a first doped region and a second doped region formed in said substrate adjacent to said spacers, a first and a second fringing field induced channels under said first and said second spacers, wherein said first and a second fringing field induced channels located between the main gate-induced channel, said first and second doped regions sitting adjacent to said first and second fringing field induced channels, respectively; wherein said spacers representing a first binary status by injecting and storing electrical charge in said spacers or to represent a second binary status by not injecting electrical charge into said spacer.