Patent ID: 6026008
Filing Date: 2000-02-15
Classification: G11C,H01L

Abstract:
An electronic memory device, in particular for use in implantable medical appliances comprising one at least electronic read/write memory chip (RAM chips) (2), a carrier (3) for mechanical fixing of the at least one RAM chip (2), address inputs (4), a read/write input (5), and a data bus connection (6), wherein the at least one RAM chip (2) in the memory device is provided with two interfaces (12,17) arranged on an input side and output side relative to the respective RAM chip (2) and each comprises address bus, data bus and read/write connection (14,15,16,18,19,20), the address bus, data bus and read/write connection (14,15,16) of the input side interface (12) being connected internally to a respectively allocated address bus, data bus and read/write connection (18,19,20) of the output side interface (17) for signal transmission through the RAM chip (2);wherein each RAM chip (2) is provided with an address expansion arrangement (21) with input connection (22), address logic (23) and output connection (24) in which in each case a binary input value is input via the input connection (22) and on the one hand is compared by an address logic (23) with a set value for activation of the RAM chip (2) and, on the other hand, the binary input value is converted according to a predetermined algorithm into a binary output value which is present at an output connection (24) for transmission as input value to an address expansion arrangement (21) of a following RAM chip (2).