Patent ID: 8436353
Filing Date: 2013-05-07
Classification: H01L

Abstract:
1. A semiconductor device, comprising: an active layer supported by a substrate, the active layer having at least two channel regions, a source region, a drain region, and at least one intermediate region formed between said at least two channel regions; a contact layer having a source contact region in contact with said source region, a drain contact region in contact with said drain region, and at least one intermediate contact region in contact with said at least one intermediate region; a source electrode in contact with said source contact region; a drain electrode in contact with said drain contact region; at least one intermediate electrode in contact with said at least one intermediate contact region; and a gate electrode facing said at least two channel regions and said at least one intermediate region through a gate insulating film interposed therebetween, wherein said at least two channel regions include a first channel region formed between said source region and said at least one intermediate region and a second channel region formed between said drain region and said at least one intermediate region, wherein an entire portion of said at least one intermediate electrode that is located between said first channel region and said second channel region overlaps said gate electrode through said at least one intermediate region and said gate insulating film, and wherein said intermediate electrode has a recess, and said drain electrode has a portion that protrudes into said recess of said intermediate electrode, as viewed from a direction perpendicular to said substrate.