Patent ID: 6191454
Filing Date: 2001-02-20
Classification: H01L

Abstract:
A semiconductor device comprising:a field effect transistor having first and second diffusion layers of a first conductivity type formed on a surface of a semiconductor substrate and serving as a source and a drain, respectively, and a gate electrode formed on a region sandwiched between said first and second diffusion layers through a gate insulating film; anda protective resistance element having a third diffusion layer of the first conductivity type formed on said surface of said semiconductor substrate to be separated from said second diffusion layer by a predetermined distance, a control electrode formed on said semiconductor substrate through an insulating film in a region sandwiched between said second and third diffusion layers, and a first well of the first conductivity type formed on said surface of said semiconductor substrate in said region sandwiched between said second and third diffusion layers to come into contact with said second and third diffusion layers, said field effect transistor and said protective resistance element being connected to one another through said second diffusion layer;wherein said control electrode is connected to said third diffusion layer so as to have the same electric potential as the third diffusion layer and said first well has an impurity concentration lower than those of said second and third diffusion layers; andwherein said device further comprises a second well of the second conductivity type formed under said first and second diffusion layers to come into contact therewith, said first well being deeper than said second well, anda third well of the first conductivity type having an impurity concentration lower than that of said first diffusion layer and formed to contact with said first diffusion layer and said second well.