Patent ID: 8994148
Filing Date: 2015-03-31
Classification: H01L

Abstract:
1. A semiconductor die, comprising: a semiconductor substrate having an edge region surrounding an active region, the active region containing devices of an integrated circuit; interconnect wiring over the active region in an interlayer dielectric and electrically connected to the devices in the active region; ancillary wiring over the edge region in the interlayer dielectric and isolated from the interconnect wiring and the devices in the active device region; a passivation on the interlayer dielectric; a plurality of bond pads over the interconnect wiring and electrically connected to the interconnect wiring through openings in the passivation over the active region; and a plurality of additional bond pads over the ancillary wiring and electrically connected to the interconnect wiring through additional openings in the passivation over the active region.