Patent ID: 6831002
Filing Date: 2004-12-14
Classification: H01L

Abstract:
A manufacturing method of a semiconductor device for providing wires on a front surface of a semiconductor wafer in such a manner that a conductive layer is provided over a substantially entire front surface of a semiconductor wafer for mounting semiconductor elements, electrolytic plating is carried out to a wiring part on the conductive layer, and then the conductive layer not including the wiring part is partially removed,the manufacturing method comprising the steps of: (a) providing a plurality of through-holes each of which passes between the front and back surfaces of the semiconductor wafer and then providing conductive material in the through-holes; (b) providing the conductive layer over the substantially entire front surface of the semiconductor wafer; (c) providing the conductive layer over a substantially entire back surface of the semiconductor wafer; and (d) electrically connecting between the conductive layer on the back surface of the semiconductor wafer and cathode terminals of an electrolytic plating apparatus and carrying out electrolytic plating with respect to the wiring part.