Patent ID: 6114198
Filing Date: 2000-09-05
Classification: H01L,Y10S

Abstract:
A method of fabricating a capacitor structure, for a DRAM device, on a semiconductor substrate, featuring a hemispherical grained, (HSG), TiN layer for a lower capacitor electrode, and a TiN layer for an upper capacitor electrode, comprising the steps of:providing an underlying transfer gate transistor, comprised of a polysilicon gate structure, on an underlying gate insulator layer, with a source and drain region in said semiconductor substrate;depositing an insulator layer;forming a storage node contact hole, in said insulator layer, exposing the top surface of said source and drain region;forming a bottom polysilicon shape, for a storage node structure, on the top surface of said insulator layer, and in said storage node contact hole, contacting said source and drain region, in said storage node contact hole;depositing said HSG TiN layer on said bottom polysilicon shape, and on said insulator layer, in a region in which said insulator layer is not covered by said bottom polysilicon shape, with said HSG TiN layer deposited via a low pressure chemical vapor deposition procedure, to a thickness between about 100 to 800 Angstroms, at a temperature between about 350 to 700.degree. C., at a pressure between about 5 to 40 torr, using: between about 50 to 300 sccm of NH.sub.3 ; between about 10 to 70 sccm of TiCl.sub.4, and between about 2000 to 4000 sccm of N2, to form said HSG TiN layer comprised with a roughened top surface;depositing a capacitor dielectric layer on said HSG TiN layer;depositing said TiN layer, on said capacitor dielectric layer;forming a photoresist shape on said TiN layer;patterning of said TiN layer, using said photoresist shape as a mask, to form said upper capacitor electrode, for a capacitor structure, patterning of said capacitor dielectric layer, using said photoresist shape as a mask; andpatterning of said HSG TiN layer, using said photoresist shape as a mask to form an HSG TiN shape, on said bottom polysilicon shape, of said storage node structure.