Patent ID: 6785892
Filing Date: 2004-08-31
Classification: G06F

Abstract:
For use in a computer system having at least two HOST processors and at least one MIP management processor, a communications system for supporting communications between the MIP management processor and partition-identifiable ones of said at least two HOST processors comprising:a main memory system accessible by all of the at least one HOST processors; a set of relocatable mailbox pairs, each said mailbox pair for establishing a communications channel between said partition-identifiable ones of said at least two HOST processors and said MIP management processor, each of said set of mailbox pairs including two mailbox memory locations within said main memory system, and arranged to form a first mailbox being accessible for writing data to it by said one of said at least two HOST processors and a second mailbox being accessible for writing data to it only by said MIP management processor, and a protocol for communicating between the MIP management processor and said one said at least two HOST processors through said communications channel, said protocol including at least a message pair for each communication wherein each message pair comprises a request message and a reply message, wherein both'the request and the reply messages of a message pair in any said each communication comprises code written to said first mailbox by a HOST processor when a message in said pair is to be transmitted from a HOST processor to said MIP management processor, and code to be written to said second mailbox by the MIP management processor when a message in said pair is to be transmitted from the MIP management processor to said one of said at least two HOST processors, and wherein said written code includes a validity signal indicating message validity for any instantiation, a function signal indicating a message function for any instantiation of any request message, and either data signals representing message function-mediating information or a pointer to an address in said main memory where such function-mediating information can be found.