Patent ID: 6429077
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A method of forming a lateral diffused metal-oxide semiconductor (LD MOS) transistor on a semiconductor wafer, the surface of the semiconductor wafer comprising a silicon substrate, a first p-well and a first n-well both positioned on the silicon substrate and the first p-well being adjacent to the first n-well, the method comprising:forming an insulation layer on a predetermined area of the first n-well; forming a gate layer positioned on a portion surface of the first p-well and the first n-well, a side of the gate layer positioned on the surface of the insulation layer; performing a first ion implantation process to form a second p-well on a predetermined area of the first p-well; performing a second ion implantation process to form at least a second n-well under the insulation layer on a predetermined area of the first n-well; and performing a third ion implantation process to form a doped region positioned on the second p-well and a doped region positioned on the first n-well, the two doped regions functioning as source and drain of the LD MOS transistor.