Patent ID: 7223655
Filing Date: 2007-05-29
Classification: H01L

Abstract:
1. A method for manufacturing a NAND flash device, comprising: forming a lower interlayer insulating film over the semiconductor substrate including a source line plug and a drain contact plug; forming an etch-stop layer on the lower interlayer insulating layer; forming an upper interlayer insulating film on the etch-stop layer; selectively etching the interlayer insulating film, the etch-stop layer and portions of the lower interlayer insulating layer and forming a first trench over the drain contact plug and a second trench over the source line plug, wherein the first trench is larger than the second trench; selectively removing the lower interlayer insulating layer and forming a first via hole under the first trench and the second via hole under the second trench, wherein the first via hole exposes the drain contact plug and the second via hole exposes the source line plug; filling the first trench, the second trench, the first via hole and the second via hole with a metal film; and forming a bit line passing the first trench and the first via hole and a common source line contact passing the second trench and the second via hole by polishing the metal film.