Patent ID: 6740952
Filing Date: 2004-05-25
Classification: H01L

Abstract:
A semiconductor device having a high withstand voltage lateral MISFET device, comprising:a first conductivity-type channel region, which is formed on the main face side of a first conductivity-type substrate; a second conductivity-type source region, which is formed on the main face side within the channel region; a second conductivity-type drain region, which is separated from said channel region on the main face side of said first conductivity-type substrate by a second conductivity-type drain drift region therebetween; a drain electrode layer, which is conductively connected with said drain region; a gate electrode layer, which backgates said channel region via a gate insulating film, and which extends toward the drain side on a first insulating film formed on the main face of said drain drift region; a source electrode layer, which is conductively connected with said channel region and said source region; and a resin covering layer, which covers said gate electrode layer, a protective film being interposed therebetween, wherein a breakdown drain voltage, when the voltage breakdown sacrificial position directly below said drain region reaches a critical field strength in a state in which said resin covering layer does not cover the gate electrode layer or has been peeled therefrom, is Vdabs (V), and wherein the length of extension Mc (&mgr;m) of said gate electrode layer on said first insulating film and the total insulating film thickness Tc (&mgr;m) directly below the extending tip of said gate electrode layer are greater than or equal to lower limit values Mcmin, Tcmin that satisfy the following inequalities: 350&lE;Vdabs&lE;1200; Tcmin&lE;&bgr;; Mcmin&lE;35; Mcmin&gE;âˆ’&agr;(Tcminâˆ’&bgr;); where &agr;=3500/Vdabs, &bgr;=0.01Vdabs.