Patent ID: 6804881
Filing Date: 2004-10-19
Classification: C25D,H05K,Y10T

Abstract:
A method for the formation of a multilayer circuit board, said method comprising:forming a first layer by applying a first dielectric coating onto an electrically conductive support, forming first recesses in said first dielectric coating that define solder mount pads, electroplating solder into said first recesses, forming a second layer by applying colloidal palladium over said first layer, applying a second dielectric coating onto said second layer, forming second recesses in said second dielectric coating that define first signal lines where said second recesses are in electrical communication with the solder mount pads in the first layer, contacting said second layer with a divalent sulfur salt, electroplating copper into said second recesses to form the first signal lines, forming a third layer by applying colloidal palladium over the second dielectric coating, applying a third dielectric coating onto said third layer, forming third recesses in said third dielectric coating that define interconnections where said third recesses are in electrical communication with the signal lines in the second layer, contacting said third layer with a divalent sulfur compound, electroplating copper into said recesses to form interconnections, and repeating said method to form a desired number of layers in the multilayer circuit board.