Patent ID: 6904581
Filing Date: 2005-06-07
Classification: G06F

Abstract:
1. A computer-automated method for locating dummy fills in an integrated circuit fabrication process, comprising: receiving as input layout of the integrated circuit, specification of device matching for the integrated circuit, and a maximum allowable capacitance increase; locating the dummy fills in the integrated circuit according to dummy rules while preserving device matching; designating at least one net of the integrated circuit as a critical net, the at least one critical net comprising only a subset of all nets of the integrated circuit; identifying metal conductors corresponding to each designated critical net from the layout file; determining a minimum net blocking distance that limits the maximum capacitance increase to the set maximum allowable capacitance increase; and for each metal conductor identified, delineating a net blocking exclusion zone extending a distance of the minimum net blocking distance from the metal conductor, wherein the step of locating the dummy fills includes locating the dummy fills outside of the net blocking exclusion zone.