Patent ID: 6316341
Filing Date: 2001-11-13
Classification: H01L

Abstract:
A method for DRAM fabrication, comprising:providing a semiconductor substrate having at least an isolation device therein, said isolation device defining an active area adjacent thereto on said semiconductor substrate;forming a first photoresist layer on said semiconductor substrate, said first photoresist layer exposing said active area in a first direction;implanting first conductive ions to form a well region in said semiconductor substrate;implanting second conductive ions to form a field implant region in said semiconductor substrate;implanting third conductive ions to form a punchthrough implant region in said semiconductor substrate;removing said first photoresist layer;forming a second photoresist layer on said semiconductor substrate, said second photoresist layer exposing said active area in a second direction different from said first direction;implanting fourth conductive ions to form a threshold implant region; andremoving said second photoresist layer.