Patent ID: 6812123
Filing Date: 2004-11-02
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device comprising the steps of:(a) forming a interlayer dielectric layer, the step including: (a)(1) forming a first silicon oxide layer by reacting a silicon compound and hydrogen peroxide through a chemical vapor deposition method, and (a)(2) forming a second porous silicon oxide layer by reacting a silicon compound, at least one of oxygen and a compound including oxygen, and a compound including an impurity through a chemical vapor deposition method; (b) forming a wetting layer over the interlayer dielectric layer; (c) forming a metal wiring layer over the wetting layer; (d) forming a pad section by patterning the wetting layer and the metal wiring layer; and after the step (a), the step of conducting an anneal treatment at a temperature of 600-850Â° C.