Patent ID: 6437608
Filing Date: 2002-08-20
Classification: G11C

Abstract:
A sample-and-hold circuit comprising:a completely differential type operational amplifier circuit; a first reset switch connected between a first input terminal constituting one of differential input terminals of the completely differential type operational amplifier circuit and a first output terminal constituting one of differential output terminals of the completely differential type operational amplifier circuit; a second reset switch connected between a second input terminal constituting other of the differential input terminals of the completely differential type operational amplifier circuit and a second output terminal constituting other of the differential output terminals of the completely differential type operational amplifier circuit; a first switch capacitor net connected between the first input terminal and the first output terminal and having a third input terminal; and a second switch capacitor net connected between the second input terminal and the second output terminal and having a fourth input terminal; wherein said sample-and-hold circuit is a sample-and-hold circuit constituting one set of differential input terminals by the third and the fourth input terminals and constituting one set of differential output terminals by the first and the second output terminals, further comprising: a common phase feedback circuit having a first and a second common phase feedback hold capacitor respectively connected to the first input terminal and the second input terminal and maintaining a middle value of output voltages of the first and the second output terminals to a predetermined value in accordance with voltages of the first and the second input terminals.