Patent ID: 7342805
Filing Date: 2008-03-11
Classification: H01L,H05K,Y10T

Abstract:
1. An assembled substrate, comprising: a substrate having a first side and a second side, and a first electrical contact area on said first side and a second electrical contact area on said second side; an electrical component having a plurality of leads electrically connected to said first electrical contact area of said substrate; and a capacitor plate electrically connected to said second electrical contact area on said second side of said substrate substantially opposite said first electrical contact area of said substrate; wherein the capacitor plate has a selected capacitance value that provides decoupling capacitance to the leads, and wherein each ground plane in the capacitor plate is disposed between a first pair of dielectric layers and each power plane in the capacitor plate is disposed between a second pair of dielectric layers, and wherein a first contact pad is connected to the ground plane and a second contact pad is connected to the power plane, and wherein the capacitor plate comprises a top surface that includes a first dielectric layer and a bottom surface that includes a second dielectric layer, wherein said assembled substrate further comprises: a first interposer between said component and said first electrical contact area on said first side of said substrate; and a second interposer between said capacitor plate and said second electrical contact area on said second side of said substrate.