Patent ID: 6200862
Filing Date: 2001-03-13
Classification: H01L

Abstract:
A method of fabricating a plurality of insulated gate, field effect transistor (IGFET) devices, said plurality of devices coupled electrically in series, each neighboring pair of said devices sharing source/drain region, said plurality of devices having end devices with at least a first and a second unshared source/drain region; said method comprising:forming at least one lightly-doped source/drain region including a lightly-doped drain region in said first unshared source/drain region;applying a protective layer over at least a portion of said lightly-doped drain region in said first unshared source/drain region; andforming normally-doped source/drain region portions in source/drain region portions not protected by said protective layer including a portion of said second source/drain region proximate a channel region of an associated end device.