Patent ID: 6115728
Filing Date: 2000-09-05
Classification: G06F

Abstract:
A fast Fourier transforming apparatus comprising:a RAM for storing input data of every symbol, one symbol corresponding to a unit of data for fast Fourier transform; anda FFT processor for performing a fast Fourier transform processing (FFT processing) using a butterfly operation on input data stored in said RAM,wherein said RAM stores data resulting from the FFT processing by said FFT processor on input data of one symbol stored in said RAM as output data of said one symbol,said FFT processor includes a RAM address generator for generating an access address for said RAM and makes an access to said RAM in accordance with an address generated by said RAM address generator, andsaid RAM address generator converts an address to be generated in every symbol, so that, among output data of one symbol and input data of another symbol to be stored in said RAM subsequently to the output data of said one symbol, data having a common index indicating orders thereof in the symbols are stored at the same address in said RAM, by repeating bit reverse in which bits of an address are grouped on the basis of a radix of the butterfly operation and an order of the bits is reversed by using each group as a unit, on a reference address by a predetermined frequency.