Patent ID: 6316322
Filing Date: 2001-11-13
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device on a wafer, which method comprises:ion implanting an impurity of a first conductive type into a main surface of a semiconductor substrate to form a retrograde impurity profile having an impurity concentration peak at a first depth below the main surface;forming a gate stack comprising a gate oxide formed on the main surface, a gate electrode formed on the gate oxide, and sidewall spacers formed on side surfaces of said gate oxide and gate electrode;selectively etching to remove the sidewall spacers and a preselected depth of said surface portion of said substrate;ion implanting an impurity of a second conductive type into the etched surface of the substrate to form a lightly- or moderately-doped source/drain region;forming sidewall spacers on the gate electrode after forming the lightly- or moderately-doped source/drain region; andion implanting an impurity of a second conductivity type into the etched surface of the substrate to form a heavily-doped source/drain region.