Patent ID: 6295623
Filing Date: 2001-09-25
Classification: G01R

Abstract:
An apparatus for testing an integrated circuit (IC) having a plurality of real input and output signals, the system comprising:an IC simulator for simulating response of said IC to a plurality of simulated input signals by producing a plurality of simulated output signals, each simulated input and output signal corresponding to a separate one of said real input and output signals;a simulator manager for providing said simulated input signals to the IC simulator and for generating a plurality of waveform data sequences, each representing sampled values of a corresponding one of said simulated IC input and output signals;an IC tester including a separate channel corresponding to each of said real input and output signals; anda tester manager for converting the waveform data sequence corresponding to each simulated input signal to a separate set of instructions provided as input to a corresponding one of said IC tester channels, wherein each IC tester channel corresponding to a real input signal responds to its input instructions by generating and supplying to said IC a real input signal having the sequence of values represented by the waveform data sequence representing a corresponding simulated input signal.