Patent ID: 7560328
Filing Date: 2009-07-14
Classification: H01L

Abstract:
1. A method of forming a semiconducting substrate comprising: providing a Si-containing substrate; forming a first pad stack atop a first portion of said Si-containing substrate, said first pad stack comprising a compressive layer positioned atop said first portion of said Si-containing substrate, a first semiconducting layer atop said compressive layer and a first etch barrier atop said first semiconducting layer; forming a second pad stack atop a second portion of said Si-containing substrate, said second pad stack comprising a tensile layer positioned atop said second portion of said Si-containing substrate, a second semiconducting layer atop said tensile layer, and a second etch baffler atop said second semiconducting layer; etching said Si-containing substrate selective to said first etch barrier and said second etch baffler, wherein said compressive layer elastically transfers a tensile strain to said first semiconducting layer and said tensile layer elastically transfers a compressive strain to said second semiconducting layer; removing said first etch baffler and said second etch barrier; and forming an isolation region between said first pad stack and said second pad stack, said isolation region having an upper surface that is substantially coplanar to an upper surface of said first semiconducting layer and to an upper surface of said second semiconducting layer.