Patent ID: 6274450
Filing Date: 2001-08-14
Classification: H01L

Abstract:
A method for manufacturing a metal oxide semiconductor field effect transistor, said method comprising steps of:providing a substrate;forming an isolation in said substrate;forming a well in said substrate, wherein said well is enclosed by said isolation;forming a first dielectric layer on said substrate;forming a conductive layer on said first dielectric layer;forming an anti-reflection coating layer on said conductive layer;removing portions of said anti-reflection coating layer, said conductive layer and said first dielectric layer to form a gate;forming a source and a drain in said substrate around said gate;forming a spacer on a sidewall of said gate;annealing said source and said drain;forming a first salicide on said source and said drain;forming a second dielectric layer on said substrate, wherein said second dielectric layer totally covers said gate and said spacer;planarizing said second dielectric layer, wherein said anti-reflecting coating layer is totally removed and said spacer is exposed;forming a second salicide on said conductive layer;removing said spacer;forming a halo and a source drain extension in said substrate, wherein said halo and said source drain extension is located between said gate and said source/drain; andforming a third dielectric layer on said second dielectric layer, wherein said third dielectric layer totally covers said gate.