Patent ID: 6545617
Filing Date: 2003-04-08
Classification: H03M,H04L

Abstract:
An asynchronous serial data receiving device comprising;a serial-to-parallel data conversion means, which takes in a communication data of one transmission unit starting with a start bit, and converts and outputs the communication data into a parallel data, a control signal generating means for generating a data shift signal to indicate the timing at which said serial-to-parallel conversion means should take in each of the bit data forming the communication data, and outputting the generated data shift signal to said serial-to-parallel conversion means, a count correction means, which generates a count value correction signal for controlling the time interval between a first timing at which it takes the first bit data of the received communication data into said serial-to-parallel conversion means and the second timing at which it takes in the second bit data following the first bit data into said serial-to-parallel conversion means for each of the bit data of said communication data, and outputs the generated count value correction signal to said control signal generating means, wherein, said control signal generating means controls the output timing of said data shift signal in accordance with the count value correction signal output from said count correction means, and said serial-to-parallel conversion means takes in each of the bit data of said communication data on the basis of said data shift signal.