Patent ID: 8685847
Filing Date: 2014-04-01
Classification: H01L

Abstract:
1. A method of forming a transistor device, the method comprising: forming a dummy gate stack structure over a silicon-on-insulator (SOI) starting substrate, the SOI starting substrate comprising a bulk layer, a global BOX layer over the bulk layer, and an SOI layer over the global BOX layer, the SOI layer having an initial thickness; forming self-aligned trenches completely through portions of the SOI layer and the global BOX layer at locations corresponding to source and drain regions; epitaxially regrowing silicon in the source and drain regions; re-establishing, by oxygen ion implantation, a local BOX layer in the epitaxially regrown silicon, adjacent to the global BOX layer, wherein a top surface of the local BOX layer is below a top surface of the global BOX layer, and wherein a bottom surface of the local BOX layer is above a bottom surface of the global BOX layer; forming embedded source and drain stressors in the source and drain regions, adjacent a portion of the SOI layer corresponding to a channel region; forming silicide contacts on the source and drain regions; removing the dummy gate stack structure; and forming a final gate stack structure.