Patent ID: 6247113
Filing Date: 2001-06-12
Classification: G06F

Abstract:
An apparatus for processing data, said apparatus comprising:a main processor for performing data processing in response to a stream of data processing instructions, said data processing instructions including at least one coprocessor instruction that has:an opcode specifying a data processing operation to be performed by a coprocessor; anda coprocessor identification field for identifying a target coprocessor for said coprocessor instruction; whereinat least one bit of said coprocessor identification field also serves as a data type field indicating a data type to be used in said data processing operation;a coprocessor coupled to said main processor by a bus, said main processor being responsive to a coprocessor instruction to issue at least a representation of said coprocessor instruction upon said bus and said coprocessor being responsive to said coprocessor instruction upon said bus to compare said coprocessor identification field with at least one coprocessor number value identifying said coprocessor and to issue an accept signal to said main processor via said bus if said coprocessor is said target processor; whereinif said coprocessor is a multiple data type coprocessor that supports multiple data types, then it has multiple coprocessor number values, issues an accept signal for any of said multiple coprocessor number values and uses said data type field to control the data type used.