Patent ID: 6300662
Filing Date: 2001-10-09
Classification: H01L

Abstract:
A electronic programmable read-only-memory comprising:(a) a field effect transistor having: relatively heavy doped source and drain regions separated by an oppositely doped channel region; a gate electrode disposed over the channel region; lightly doped regions, having the same conductivity type as the source and drain regions, extending laterally from the source and drain regions to peripheral regions of the channel region; and, relatively heavy doped regions, having the same conductivity type as the source and drain regions, extending laterally from the source and drain regions, through and beyond the lightly doped regions, into the channel region; and(b) a charge storing capacitor coupled to the gate electrode and adapted to store charge produced in the channel region in response to a logic state programming voltage applied between one of the source and drain regions and the gate electrode.