Patent ID: 6682597
Filing Date: 2004-01-27
Classification: C30B

Abstract:
A silicon wafer having a polysilicon layer, comprising:a silicon wafer having an oxygen concentration of 1.2Ã—10 18 atoms/cm3 or less (old ASTM) without generating crystal originated particles and interstitial large dislocation, and a polysilicon layer of 0.1 to 1.6 &mgr;m in thickness formed on a back of the wafer, wherein the silicon wafer before the formation of the polysilicon layer thereon is the type of a wafer in which oxidation induced stacking faults manifest itself at a center of the wafer when the wafer is heat-treated in an oxygen atmosphere at 1000Â° C.Â±30Â° C. for 2 to 5 hours and subsequently at 1130Â° C.Â±30Â° C. for 1 to 16 hours.