Patent ID: 6482682
Filing Date: 2002-11-19
Classification: H01L

Abstract:
A manufacturing method for improving the reliability of polysilicon thin film transistors, which comprises the steps of:providing a substrate; forming a buffer oxide layer on the substrate followed by forming a polysilicon layer on the substrate; oxidizing the polysilicon layer surface to produce a silicon oxide layer; etching away the silicon oxide; and taking the polysilicon layer as the active layer of thin film transistors to complete the thin film transistor manufacturing; wherein the step of taking the polysilicon layer as the active layer of thin film transistors to complete the thin film transistor manufacturing comprises the steps of:providing a pattern on the polysilicon layer to define the area of the active layer; forming two appropriate heavily doped regions on the polysilicon layer; forming an insulation layer on the polysilicon layer with two contact windows formed at the places corresponding to the two heavily doped regions; and forming a proper gate on the insulation layer and a source and drain at the two contact windows, respectively; further wherein the insulation layer is silicon nitride, and the substrate is a glass substrate.