Patent ID: 7179708
Filing Date: 2007-02-20
Classification: H01L

Abstract:
1. A process for fabricating non-volatile memory by tilt-angle ion implantation, comprising: step 1: providing a wafer substrate; step 2: depositing over said wafer substrate successively a first oxide layer, a nitride layer, a second oxide layer, and a gate in a manner that a gate dielectric is formed over said wafer substrate; step 3: forming a gate pattern by photoresist developing, and removing both ends of said gate dielectric layer by directional etching to expose said first oxide layer or said substrate; step 4: removing the photoresist and using tilt-angle ion implantation to implant said ions within said nitride layer thereby generating a deeper electron trap density such that electrons can be stored in said nitride layer more stably; step 5: removing damaged parts of both ends of said first oxide layer and said second oxide layer, respectively, by a selective wet etching to reduce the structural destruction of said first oxide and said second oxide layer due to the tilt angle implantation of heterogeneous elements to prevent electron loss via said first oxide layer and said second oxide layer; step 6: depositing a third interstitial oxide wall layer to prevent electron loss and hence enhancing the reliability of said device; whereby a non-volatile memory is fabricated.