Patent ID: 9171857
Filing Date: 2015-10-27
Classification: G11C,H01L

Abstract:
1. A method of making a monolithic three-dimensional semiconductor memory device, comprising: forming a plurality of vertical semiconductor regions and a charge storage medium over a substrate, wherein said vertical semiconductor regions are arranged in two or more horizontal rows, each of said horizontal rows having two or more said vertical semiconductor regions, and wherein the charge storage medium comprises one or more layers located lateral to the plurality of vertical semiconductor regions; and forming a plurality of control gates lateral to the charge storage medium, wherein the plurality of control gates comprises a first control gate and a second control gate which is located above the first control gate; wherein each of said first control gate and said second control gate are common among at least two of the plurality of vertical semiconductor regions in one of said horizontal rows and among at least two of the plurality of vertical semiconductor regions in a different one of said horizontal rows; and wherein the memory device comprises two or more memory elements vertically disposed relative to the substrate and vertically separated from each other.