Patent ID: 8518831
Filing Date: 2013-08-27
Classification: H01L

Abstract:
1. A method of forming semiconductor memory device, comprising: forming first to fourth spacers over a target layer including a first region and second regions adjacent to the first region, wherein a first spacer group including the first spacers spaced apart from each other at a first interval is formed in the first region of the target layer, a second spacer group including the second spacers spaced apart from one another at second intervals is formed in the second regions, a third spacer is formed between the first and the second spacer groups, and an odd number of fourth spacers are formed between the third spacer and the first spacer group; forming an overlap pattern blocking the target layer exposed between the third spacer and the first spacer group; and forming first patterns and second patterns, wherein the first patterns are spaced apart from each other at the first interval and formed to have first widths in the first region, and the second patterns are spaced apart from one another at the second intervals and formed to have second widths in the second regions by etching the target layer exposed between the first to fourth spacers and the overlap pattern.