Patent ID: 8587026
Filing Date: 2013-11-19
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: forming a recess in a Si substrate, the recess being used for forming a source region or a drain region; forming a SiGe seed layer having a constant content of Ge on sidewalls of the recess; subsequently forming a first SiGe layer on an area of the bottom of the recess that is not covered by the SiGe seed layer, wherein the content of Ge in the first SiGe layer gradually increases from bottom to top of the first SiGe layer, and the first SiGe layer has a thickness less than the depth of the recess; and forming a second SiGe layer having a constant content of Ge on the first SiGe layer, wherein the content of Ge in the SiGe seed layer is less than the content of Ge in the second SiGe layer, and the content of Ge at the upper surface of the first SiGe layer is less than or equal to the content of Ge in the second SiGe layer.