Patent ID: 6031413
Filing Date: 2000-02-29
Classification: G05F

Abstract:
A semiconductor integrated circuit comprising:a plurality of circuits arranged in separate multiple stages of circuit blocks including at least an input circuit and an output circuit, the multiple stages of circuit blocks arranged vertically between a first power supply line and a second power supply line, the first power supply line having a voltage value greater than said second power supply line, and an intermediate power supply line arranged between each of said multiple stages of circuit blocks, said intermediate power supply line having a voltage value between the voltage values of the power supply lines directly above and below said intermediate power supply line; anda load unit connected in parallel with at least one of said circuits arranged in separate multiple stages of circuit blocks,wherein said at least one circuit consumes less power than a circuit in another one of said multiple stages of circuit blocks, such that a total power consumed by said load unit and said at least one circuit in parallel with said load unit is approximately equal to a power consumed by each of other ones of said multiple stages of circuit blocks.