Patent ID: 9153483
Filing Date: 2015-10-06
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor integrated circuit (IC), the method comprising: providing a device precursor, including: recessing the HK/MGs to form first trenches on the HK/MGs; forming first hard masks (HMs) in the first trenches, wherein the first HMs are top layers on the HK/MGs; forming a second dielectric layer over the HK/MGs and the conductive features, having first openings in the second and the first dielectric layers to expose the conductive features; forming first metal plugs in the first openings; forming a third dielectric layer over the HK/MGs and the first metal plugs, having second openings in the third dielectric layer to expose a subset of the HK/MGs and the first metal plugs; and forming second metal plugs in the second openings to connect with the subset of HK/MGs and the first metal plugs.