Patent ID: 6397266
Filing Date: 2002-05-28
Classification: G06F

Abstract:
An input/output (I/O) control device used to control accesses to a plurality of input/output devices by a central processing unit (CPU) in a computer system, the input/output control device comprising:means for storing a mapping table containing pairs of address and response time data associated with the input/output devices, respectively, wherein when an input/output device is accessed by the central processing unit, the input/output control device locates a corresponding response time from the mapping table according to an address associated with the input/output device; if the located response time is more than a default time, the input/output control device defers an access to the input/output device in a form of defer control; and if the located response time is less than the default time, the input/output control device proceeds an access to the input/output device.