Patent ID: 7338861
Filing Date: 2008-03-04
Classification: H01L

Abstract:
1. A method of manufacturing a nonvolatile memory device, the method comprising: forming a trench in the surface of a substrate; forming a gate insulating layer along an inner wall of the trench; forming a floating gate on the gate insulating layer such that a lower portion of the floating gate is located within the trench and an upper portion of the floating gate protrudes above the surface of the substrate; forming an inter-gate insulating layer on the upper portion of the floating gate to obtain a resultant structure; forming a tunneling oxide layer on the resultant structure; forming a control gate above the upper portion of the floating gate and along a first sidewall of the upper portion of the floating gate; and forming source and drain regions in the substrate on opposite sides of the trench; wherein the forming of the trench comprises forming an antioxidation layer mask pattern on the substrate, and etching the substrate through an opening in the antioxidation layer mask pattern to form the trench; wherein the forming of the floating gate comprises forming a conductive layer over the antioxidation layer mask pattern and within the trench and opening in the antioxidation layer mask pattern, and planarizing the conductive layer to expose an upper surface of the antioxidation layer mask pattern; wherein the forming of the inter-gate insulating layer comprises thermally oxidizing an upper surface of the floating gate exposed by opening in the antioxidation layer mask pattern, and wherein the forming of the tunneling oxide layer comprises removing the antioxidation layer mask pattern to obtain the resultant structure, and forming the tunneling insulating layer on the entire surface of the resultant structure.