Patent ID: 7606975
Filing Date: 2009-10-20
Classification: G06F,Y02D

Abstract:
1. A method comprising: formulating one or more micro-operations based at least in part on a portion of one or more memory blocks; retaining the micro-operations in an entry of a trace cache; speculatively executing the micro-operations via a processor core; associating one or more samples of current age values with the entry to generate one or more translation age values, the one or more samples of current age values corresponding to the one or more memory blocks; modifying at least the portion of the one or more memory blocks after executing the micro-operations; incrementing a value of the one or more samples of current ages for the modified portion of the one or more memory blocks to generate one or more incremented current age values; comparing a particular one of the one or more incremented current age values to a corresponding translation age value; determining a difference in at least one of the one or more incremented current age values and the corresponding one or more translation age values; and conditionally invalidating the entry based on the difference.