Patent ID: 8866258
Filing Date: 2014-10-21
Classification: H01L

Abstract:
1. An interposer structure for electrically coupling a semiconductor die to a support substrate in a semiconductor package, said interposer structure comprising: at least one through-wafer via extending through a semiconductor substrate, said at least one through-wafer via providing an electrical connection between said semiconductor die and said support substrate; conductive segments having a pitch substantially wider than said at least one through-wafer via, disposed on a bottom surface of said semiconductor substrate and electrically connecting said at least one through-wafer via to said support substrate; a passive component comprising a trench conductor, said trench conductor extending through said semiconductor substrate without electrically coupling said semiconductor die to said support substrate; a plurality of conductive pads, each disposed on a top surface of said semiconductor substrate that is opposite the bottom surface and coupling one of said at least one through-wafer via and said passive component to said semiconductor die; and a dielectric liner disposed between said semiconductor substrate and each of said at least one through-wafer via and said passive component; wherein each of said at least one through-wafer via and said passive component is completely electrically isolated from said semiconductor substrate; and wherein a first terminal is situated on one end of the passive component and a second terminal is situated on another end of the passive component, the first and second terminals being on the top surface of said semiconductor substrate.