Patent ID: 6653998
Filing Date: 2003-11-25
Classification: G09G,H03M

Abstract:
A driver circuit for a display, the circuit having an input receiving a digital input data having n bits for selecting one of a plurality of voltage levels for driving the circuit, the circuit having an output, a plurality of digital signal lines coupled to the digital input data, a plurality of active regions coupled to a first side of the output, each of the plurality of active regions coupled to a separate voltage level, the circuit further including a plurality of pass transistors at a first subset of locations where the plurality of digital signal lines overlap the plurality of active regions, a plurality of depletion-implanted transistors at a second subset of locations where the plurality of digital signal lines overlap the plurality of active regions, wherein:the number of the plurality of digital signal lines on the first side of the output is an odd number; wherein at least one active region has at least one pass transistor and at least one depletion-implanted transistor; and wherein n is a positive integer.