Patent ID: 7309639
Filing Date: 2007-12-18
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising: forming a layer of insulation material over a semiconductor substrate, the layer of insulation material having a first opening that defines a first side wall and an opposing second side wall; forming a first layer of conductive material on the layer of insulation material to contact the first opening; etching the first layer of conductive material to form a first conductive spacer that adjoins the first side wall and the second side wall, and a second opening; forming a first layer of isolation material on the layer of insulation material and the first conductive spacer to contact the second opening; etching the first layer of isolation material to form a first isolation spacer that adjoins the first conductive spacer, and a third opening; forming a second layer of conductive material on the layer of insulation material to contact the third opening; etching the second layer of conductive material to form a second conductive spacer that adjoins the first isolation spacer, and a fourth opening; forming a second layer of isolation material on the layer of insulation material and the second conductive spacer to contact the fourth opening, and forming a conductive region on the first conductive spacer and the first layer of isolation material, the conductive region contacting the first and second conductive spacers to make an electrical connection.