Patent ID: 6277700
Filing Date: 2001-08-21
Classification: H01L

Abstract:
A method of etching silicon nitride spacers beside a gate structure comprisinga) providing a gate electrode over a gate oxide layer on a substrate; providing a liner oxide layer over said substrate and said gate electrode; providing a silicon nitride layer over said liner oxide layer;b) anisotropically etching said silicon nitride layer forming spacers by performing a nitride etch recipe in a plasma etcher; said nitride etch recipe comprising a main etch step and an over etch step;(b1)said main etch step comprising the following conditions: a Cl.sub.2 flow between 35 and 55 molar %, a He flow between 35 and 55 molar %, and a HBr flow between 7.5 and 12.5 molar %.