Patent ID: 7394713
Filing Date: 2008-07-01
Classification: G11C

Abstract:
1. A memory device, comprising: at least one non-volatile memory cell having a programming terminal; a programming unit for programming the at least one memory cell, the programming unit having a potential terminal to which a first fixed potential is applied; a first switching unit configured to selectively connect the potential terminal to the programming terminal of the at least one memory cell and isolate the potential terminal from the programming terminal of the at least one memory cell, wherein the first fixed potential, when applied for a first time to the programming terminal of the at least one non-volatile memory cell, alters an electrical property of the at least one memory cell, thereby effecting an altered non-volatile programming state of the at least one non-volatile memory cell, wherein the memory device is integrated in a semiconductor chip, and wherein the non-volatile memory cell is electrically decoupled from the potential terminal which is accessible externally from the semiconductor chip during read-out of the programming state of the at least one non-volatile memory cell.