Patent ID: 7098053
Filing Date: 2006-08-29
Classification: H01L

Abstract:
1. Method of producing at least one semiconductor element in a semiconductor substrate, the semiconductor element having a plurality of cell types, the method comprising: producing at least one test structure on said semiconductor substrate, comprising a predetermined number of test cells having cell types similar to one or more of said plurality of cell types; each of said cell types having at least a first and a second local interconnect layer structure to be connected to predetermined supply voltages during use, a plurality of first and second polysilicon layer structures to provide control voltages to first and second electronic component structures, respectively; connecting in said test structure all of said plurality of said first polysilicon layer structures to one another to provide an interconnected first polysilicon layer structure, and connecting in said test structure all of said plurality of said second polysilicon layer structures to one another to provide an interconnected second polysilicon layer structure; providing predetermined test voltages to said first and second local interconnect layer structures, and to said interconnected first and second polysilicon layer structures, respectively; measuring currents resulting from said test voltages to identify production errors.