Patent ID: 8778798
Filing Date: 2014-07-15
Classification: H01L

Abstract:
1. A method for fabricating an electronic device package, comprising: providing at least one semiconductor chip having a first surface and a second surface opposite thereto, wherein the semiconductor chip has at least one via opening therein, which extends to the first surface, and has at least one conductive pad structure disposed on the bottom of the via opening; attaching the second surface of the semiconductor chip onto a substrate; forming at least one redistribution layer on the first surface of the semiconductor chip and electrically connected to the conductive pad structure through the via opening; covering the first surface of the semiconductor chip with a sacrificial pattern layer, wherein the sacrificial pattern layer has an opening to partially expose the redistribution layer; forming an abut portion in the opening, wherein the abut portion electrically contacts the exposed redistribution layer; removing the sacrificial pattern layer; and covering the first surface of the semiconductor chip with a passivation layer, such that the passivation layer surrounds the abut portion.