Patent ID: 6157567
Filing Date: 2000-12-05
Classification: G11C

Abstract:
A non-volatile memory device, comprising:a single power solution pin in addition to one or more ground pins; andmeans for providing two-cycle programming while maintaining measures to prevent accidental user overwrites, said means for providing two-cycle programming including a state machine wherein said state machine includes the states READ, WRITE UNLOCK, PROGRAM, and ULBYPASS, and wherein said state machine transitions from said READ state to said WRITE UNLOCK state upon receipt of a write unlock command, wherein said state machine transitions from said WRITE UNLOCK state to said ULBYPASS state upon receipt of an unlock bypass command, and wherein said state machine can repeatedly transition from said ULBYPASS state to said PROGRAM state and back to said ULBYPASS state to program multiple units of information without having to again transition to said WRITE UNLOCK state.