Patent ID: 8822323
Filing Date: 2014-09-02
Classification: H01L,H05K,Y10T

Abstract:
1. A method of manufacturing a multilayer printed circuit board, comprising: placing a plurality of semiconductor devices in a plurality of opening portions formed in a core substrate, respectively; and forming a buildup structure comprising an interlayer insulating layer and a conductor circuit on the core substrate, wherein the plurality of semiconductor devices are produced by a method comprising forming a plurality of die pads on a wafer; forming on the die pads and the wafer a protective film having a plurality of openings exposing the die pads, respectively; forming a thin film layer on the die pads and the protective film; forming on the thin film layer a plating resist having a plurality of openings such that the openings of the plating resist expose a plurality of portions of the thin film layer formed on the die pads, respectively; forming a plurality of thickening portions forming a thickening layer and consisting of copper by copper plating over the portions of the thin film layer exposed through the plating resist such that a plurality of structures comprising the portions of the thin film layer formed on the die pads and the thickening portions formed at outermost positions of the structures, respectively, are formed on the die pads, respectively; removing the plating resist from the thin film layer such that the plurality of structures comprising the portions of the thin film layer formed on the die pads and the thickening portions formed at outermost positions of the structures, respectively, remain on the die pads, respectively; removing the thin film layer by etching such that the thin film layer not forming the portions of the thin film layer is removed from the protective film and that a plurality of intermediate layers comprising the portions of the thin film layer formed on the die pads and the thickening portions formed at outermost positions of the intermediate layers, respectively, are formed on the die pads, respectively; roughening the thickening portions of the intermediate layers such that the intermediate layers have roughened thickening portions at the outermost positions, respectively; and dividing said wafer to thereby form the plurality of semiconductor devices comprising the dies pads and the intermediate layers having the roughened thickening portions , respectively, the intermediate layers are formed such that the die pads have a diameter smaller than a diameter of the intermediate layers formed on the die pads, respectively, the forming of the thin film layer comprises forming a first thin film layer and forming a second thin film layer on the first thin film layer, and the second thin film layer is made of copper, and the forming of the buildup structure comprises forming the interlayer insulating layer on the semiconductor devices such that the intermediate layers of the semiconductor devices are exposed through openings formed in the interlayer insulating layer, and forming via conductors in the openings such that the via conductors connect the conductor circuit and the intermediate layers of the semiconductor devices, respectively.