Patent ID: 6087243
Filing Date: 2000-07-11
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device having an active region isolated by an insulated trench, which method comprises:forming a first oxide layer, having a first thickness, on a main surface of a semiconductor substrate or on a main surface of an epitaxial layer formed on the semiconductor substrate;depositing a silicon nitride layer on the first oxide layer;forming a trench in the semiconductor substrate or epitaxial layer, wherein the trench has edges at the main surface;growing an oxide liner in the trench;filling the trench with insulating material;planarizing the main surface to expose the silicon nitride layer;removing the silicon nitride layer;heating at a first temperature for a first period of time, to densify the insulating material filling the trench;removing the first oxide layer, thereby exposing the main surface and the trench edges;heating in an oxidizing atmosphere, at a second temperature for a second period of time, to form a second oxide layer having a third thickness on the main surface and the trench edges;removing the second oxide layer, exposing the main surface and the trench edges;forming a gate oxide layer on the main surface and the trench edges;forming a conductive layer on the gate oxide layer; andpatterning to form a gate electrode, wherein the thickness of the first oxide layer is increased to a second thickness during heating at a first temperature for a first period of time by providing an oxidizing atmosphere.