Patent ID: 6864500
Filing Date: 2005-03-08
Classification: H01L

Abstract:
1. A programmable conductor memory cell for an integrated circuit, comprising: a first insulating layer having a top surface and a cell body via; a memory cell body comprising a glass electrolyte with metal ions disposed therein, the memory cell body being contained within the cell body via and defining a sidewall where the memory cell body and the first insulating layer make contact; a cathode in contact with the memory cell body; a second insulating layer over the first insulating layer and defining an anode via to said the memory cell body; an anode in contact with a top surface of the memory cell body and formed in the anode via; wherein the anode contacts the top surface of the memory cell body without contacting the sidewall of the memory cell body, the anode via has a width about the same as a width of the memory cell body, and the anode via is lined with a spacer that covers an edge of the sidewall of the memory cell body.