Patent ID: 9018576
Filing Date: 2015-04-28
Classification: G05F

Abstract:
1. A circuit comprising: a first metal track having a plurality of electrically connected first spaced-apart nodes; a second metal track having a plurality of electrically connected second spaced-apart nodes; a plurality of current sources coupled between first and second spaced-apart nodes of said first and second metal tracks, wherein each second spaced-apart node is configured to receive a current injected from one of said current sources, each current source controlled by a control signal generated by a voltage regulator, said control signal further controlling generation of a regulated voltage by said voltage regulator, said regulated voltage applied to said second metal track; wherein each of said second spaced-apart nodes are adapted to provide said injected current and said regulated voltage directly to output circuitry; wherein said output circuitry comprises a plurality of pixel columns in a pixel array; and wherein pixel columns in the pixel array have a first pitch, and said current sources have a second pitch equal to said first pitch.