Patent ID: 7990303
Filing Date: 2011-08-02
Classification: H03M

Abstract:
1. An analog-to-digital conversion unit, configured for a pipelined analog-to-digital converter and comprising: a plurality of sub analog-to-digital converters, wherein the sub analog-to-digital converters are respectively and correspondingly coupled to a plurality of first threshold voltages, a plurality of second threshold voltages and an input voltage, the sub analog-to-digital converters respectively compare the input voltage with the first threshold voltages and the second threshold voltages and output a plurality of first bits and a plurality of second bits according to the comparison results, wherein the first threshold voltage and the second threshold voltage received by each of the sub analog-to-digital converters are two threshold voltages non-successive in terms of levels arrangement of all the first threshold voltages and second threshold voltages; and an encoding unit, coupled to the sub analog-to-digital converters for encoding the first bits and the second bits and outputting a digital data.