Patent ID: 7793040
Filing Date: 2010-09-07
Classification: G06F

Abstract:
1. A system for increasing parallel processing efficiency by associating data that is to be used in the same operation with a similar tag before processing and re-associating the processed data with a tag based on the input tag, the system comprising: computational hardware containing at least one element configured to act as an operator; and a content addressable memory mechanism, the content addressable memory mechanism comprising, a tag mechanism configured to: prior to emitting the complete operand set to computational hardware, determine from a set of at least one input tag including the unique tag prefix that the operand set of input data is complete, the complete operand set of data comprising all the variables, operators, and input values necessary to process the complete operand set, such that each operation of the complete operand set is configured to be processed together, in parallel, and wherein the set of input tags is arranged such that tags that are adjacent in terms of tag value are stored in physically adjacent locations in memory; emit the complete operand set to the computational hardware to receive a computational result from the computational hardware for the complete operand set, the computational hardware being configured to process a plurality of operand sets in parallel; and generate an output tag for the computational result that is different than the input tag, the output tag indicating that each of the input data values in the operand set that were to be used in the specified application process were processed, the output tag being generated as a function of the input tag, such that at least some portions of the input tag are referenced in the output tag; and re-associate the computational result with the generated output tag based on the corresponding data's input tag.