Patent ID: 6252760
Filing Date: 2001-06-26
Classification: H01L

Abstract:
A capacitor comprising:a substrate;a first interconnect layer disposed upon said substrate;a first insulating layer disposed upon said first interconnect layer;a first metal layer disposed upon said first insulating layer and formed as at least two regions, said at least two regions of said first metal layer connected to said first interconnect layer through vias formed in said first insulating layer;a second insulating layer disposed upon said first metal layer;a second metal layer disposed on said second insulating layer and formed as at least two regions;a third insulating layer disposed on said second metal layer; a second interconnect layer disposed on said third insulating layer and connecting to said at least two regions of said second metal layer through vias formed in said second insulating layer;at least one first terminal connected to said first interconnect layer; andat least one second terminal connected to said second interconnect layer.