Patent ID: 8293654
Filing Date: 2012-10-23
Classification: B82Y,G11C,H01L,Y10S

Abstract:
1. A method of manufacturing a memory device, the method comprising: forming first and second electrodes on a substrate to partially overlap each other in a first direction perpendicular to the substrate and to be insulated from each other; forming first and second dummy electrodes respectively facing the first and second electrodes on the substrate to partially overlap each other in the first direction and to be insulated from each other; forming a first nanowire extending in a second direction parallel to a top surface of the substrate and connecting the first electrode and the first dummy electrode; forming a second nanowire parallel to the first nanowire and connecting the second electrode and the second dummy electrode; forming a mask covering the first and second electrodes and covering the first and second nanowires; and removing the first and second dummy electrodes and the first and second nanowires that are not covered by the mask, and removing the mask.