Patent ID: 6537899
Filing Date: 2003-03-25
Classification: H01L

Abstract:
A method of fabricating a semiconductor device comprising the steps of:forming a drain layer of a first conduction type on a surface layer of a semiconductor substrate of the first conduction type; forming a first insulating film, a conductive film, and a second insulating film successively on the entire surface of the semiconductor substrate including the drain layer; patterning the second insulating film, the conductive film, and the first insulating film which are located in a cell region of the semiconductor substrate to form a gate insulating film and a gate electrode which consists of the conductive film so that the gate insulating film remains extending to a periphery of the semiconductor substrate; injecting an impurity of the second conduction type into a surface layer of the drain layer with using the gate electrode as a mask, thereby forming a channel region; injecting an impurity of the first conduction type into the channel region with using the gate electrode as a mask, thereby forming a first impurity region layer of the first conduction type; forming a side wall insulator on a side wall of the gate electrode, the side wall insulator being formed only on side walls of the patterned second insulating film, the patterned conductive film, and the patterned first insulating film; forming a first recess with using the side wall insulator as a mask, and at the same time removing a center of the first impurity region layer, thereby forming a source region; removing a part of the second insulating film, thereby forming a gate contact region; and forming a source electrode in the first recess, and a gate electrode wiring in the gate contact region.