Patent ID: 8773197
Filing Date: 2014-07-08
Classification: H03F

Abstract:
1. A class-D amplifier circuit comprising: a first controller for generating a first PWM signal which alternates between two PWM signal values corresponding to an input signal; a DAC for creating a correction signal which is greater than a first selected value when the PWM signal is at a first one of the two PWM signal values and less than the first selected value when the PWM signal is at the other of the two PWM signal values, and which crosses zero when the PWM signal transitions from one of the two PWM signal values to the other; a second controller for summing the correction signal and an error signal and generating a second PWM signal, the second PWM signal corresponding to the sum of the correction signal and the error signal and changing state when the sum crosses a second selected value; a first switching element and a second switching element connected in series between two voltages for receiving the second PWM signal and producing in response thereto a first output signal of a power sufficient for driving a desired load with a distortion of the input signal; a third switching element and a fourth switching element connected in series between two voltages for receiving the first PWM signal and producing a second output signal with a lower distortion of the input signal than the first output signal; and a third controller for generating the error signal based upon the difference between the first output signal and the second output signal.