Patent ID: 8422295
Filing Date: 2013-04-16
Classification: G11C

Abstract:
1. A non-volatile random access memory, comprising: a latch unit, having a first terminal and a second terminal; a first non-volatile memory element, having a first terminal coupled to a first voltage, and a second terminal coupled to the first terminal of the latch unit; a second non-volatile memory element, having a first terminal coupled to the first terminal of the latch unit; a third non-volatile memory element, having a first terminal coupled to a second voltage, and a second terminal coupled to the second terminal of the latch unit; a fourth non-volatile memory element, having a first terminal coupled to the second terminal of the latch unit, and a second terminal coupled to a second terminal of the second non-volatile memory element; and a switch, having a first terminal coupled to the second terminal of the second non-volatile memory element and the second terminal of the fourth non-volatile memory element, and a second terminal coupled to a third voltage.