Patent ID: 6725326
Filing Date: 2004-04-20
Classification: G06F,H04L

Abstract:
A method of memory management comprising the steps of:dividing a memory into a plurality of contiguous regions ordered from the lowest to the highest, each said region composed of a plurality of entries, wherein each said entry is either a used entry or a hole; iteratively: equalizing a first designated region to maintain all used entries in a first contiguous sub-region adjoining a second contiguous sub-region containing all holes; when commanded inserting a value in one of said entries in a second designated region, said second designated region being any one of said plurality of contiguous regions, wherein said inserting further comprises: if said second designated region lacks a hole, expanding said second designated region by moving one of said holes from an adjoining region; and writing said value in a hole in said second designated region; and deleting a used entry by converting said used entry into a hole.