Patent ID: 7557603
Filing Date: 2009-07-07
Classification: G11C,H03K

Abstract:
1. An output driver calibration circuit, comprising: a pull-up calibration circuit including a first comparator configured to compare a reference voltage to a first voltage at a calibration terminal when an external load is connected thereto, the pull-up calibration circuit further configured to generate a first averaged count signal by averaging a plurality of first count signals from a first counter responsive to an output of the first comparator and in response to a respective plurality of input and output configurations on the first comparator, and a first variable pull-up impedance circuit responsive to first count signals, the first variable pull-up impedance coupled to the calibration terminal; and a pull-down calibration circuit including a second comparator configured to compare the reference voltage to a second voltage at a reference node, a second variable pull-up impedance circuit responsive to the first averaged count signal and a variable pull-down impedance circuit serially coupled at the reference node to the second variable pull-up impedance circuit, the pull-down calibration circuit further configured to generate a second averaged count signal by averaging a plurality of second count signals from a second counter responsive to an output of the second comparator and in response to a respective plurality of input and output configurations on the second comparator, the variable pull-down impedance circuit responsive to second count signals, wherein each of the first and second comparators is configured as a voltage-to-time converter.