Patent ID: 7428186
Filing Date: 2008-09-23
Classification: G11C

Abstract:
1. A column path circuit comprising: a plurality of address transition detectors which detect the level transition of page address signals, thereby outputting transition detection signals each having a predetermined enabled period, respectively; a detection signal coupler which implements a logical operation on the transition detection signals respectively outputted from the address transition detectors, and outputs a signal representing the results of the logical operation; a ready signal generator which outputs a strobe ready signal having a predetermined enable period in response to an enabled state of the signal outputted from the detection signal coupler; a strobe signal generator which generates a read strobe signal and a page address strobe signal for latch of the page address signals in response to the strobe ready signal, the strobe signal generator including a reset signal generator which outputs a reset signal for generation of the read strobe signal and the page address strobe signal in response to the strobe ready signal, and a read strobe output unit which outputs the read strobe signal and the page address strobe signal in response to the reset signal; a plurality of page address buffers which are enabled by the page address strobe signal, latch the page address signals and buffer the page address signals; a page address decoder which decodes the buffered page address signals respectively outputted from the page address buffers; and a column selection signal generator which outputs column selection signals respectively corresponding to the decoded page address signals in response to the read strobe signal.