Patent ID: 7123044
Filing Date: 2006-10-17
Classification: G02F,G09G

Abstract:
1. A semiconductor device comprising, on a semiconductor substrate: intersecting data lines and pixel switch control lines; pixel cell driving circuits arranged in a matrix in correspondence with positions of intersection of said data lines and pixel switch control lines, said pixel cell driving circuits each including a pixel switch and a pixel capacitance connected to the pixel switch, for retaining pixel data; vertical scanning means operatively coupled to said pixel switch control lines for scanning in a vertical direction by sequentially outputting a scanning signal for turning on said pixel switch to said pixel switch control lines; horizontal scanning means operatively coupled to said data lines for scanning in a horizontal direction by applying a data signal to said data lines in predetermined timing; and amplifying means for amplifying a potential level occurring in said data lines for output to an external testing device, wherein, said vertical scanning means and horizontal scanning means are operatively configured to turn on a plurality of pixel switches simultaneously to generate a testing scanning signal as said output to said external testing device.