Patent ID: 6551902
Filing Date: 2003-04-22
Classification: H01L

Abstract:
A process for fabricating a buried, laterally insulated zone of increased conductivity in a semiconductor substrate, having the following steps:providing a silicon substrate with a buried zone of increased conductivity; forming a reference layer on the substrate; patterning the reference layer; forming a trench with at least one shallow region and at least one deep region in the substrate; and filling the trench with silicon oxide insulation material and depositing the insulation material on the structure thus produced in an ozone-activated CVD process; selecting a material of the reference layer such that a growth rate of the insulation material on the reference layer is at least by a factor of two less than a growth rate of the insulation material on a surface of the trench to be covered, a ratio of a width of the deep region to a step height of the shallow region being approximately equal to 2*&agr;/(&agr;âˆ’1), where &agr; corresponds to a ratio of the growth rate of the insulation material on the surface of the trench to be covered to the growth rate of the insulation material on the reference layer.