Patent ID: 8301290
Filing Date: 2012-10-30
Classification: G06F

Abstract:
1. A system for correcting systematic parametric variations on an integrated circuit chip, said system comprising: a process tool; a data storage device storing a map of an integrated circuit chip, said integrated circuit chip having a given design and comprising a plurality of devices, said map indicating variations in a device parameter for said devices across different regions of said integrated circuit chip as a result of said given design, and said data storage device further storing information indicating a relative impact, on said device parameter, of changes in a specification associated with a process step performed by said process tool in manufacturing said integrated circuit chip according to said given design; a processor accessing said data storage device and determining, based on said information and using said map as a guide, different values for said specification, each one of said different values for said specification to be used in a corresponding one of said different regions as said process step is performed by said process tool during said manufacturing of said integrated circuit chip according to said given design in order to offset said variations in said device parameter; and a controller receiving said different values for said specification and controlling said process tool as said process step is performed by said process tool during said manufacturing of said integrated circuit chip according to said given design such that said different values for said specification are used in said different regions.