Patent ID: 7795702
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A microelectronic assembly comprising: a semiconductor substrate having a first dopant type at a first concentration; first and second buried layers having a second dopant type formed within the semiconductor substrate with a gap between the first and second buried layers, the first and second buried layers having a first end adjacent to the gap and a second end opposing the gap; a barrier region formed within the gap and adjacent to the first ends of the first and second buried layers, the barrier region having the first dopant type at a second concentration, the second concentration being higher than the first concentration; an epitaxial layer over the semiconductor substrate having the first dopant type at a third concentration, the third concentration being less than the second concentration; first and second semiconductor devices over the epitaxial layer above the respective first and second buried layers, the first ends of the first and second buried layers extending a first depth from the first and second semiconductor devices and at least a portion of the barrier region extending a second depth from the first and second semiconductor devices, the second depth being greater than or equal to the first depth; first and second well regions having the second dopant type within the epitaxial layer respectively above the first ends of the first and second buried layers; and a barrier well having the first dopant type at a fourth concentration between the first and second well regions, the fourth concentration being greater than the first concentration.