Patent ID: 8786745
Filing Date: 2014-07-22
Classification: H04N

Abstract:
1. A solid-state image pickup device comprising: a pixel array including a plurality of pixels arranged in an array; a control circuit for generating first, second, and third control signals for controlling the pixel; a readout circuit for reading the first and second pixel signals from the pixel array in one frame; and a signal processing unit for processing signals from the readout circuit; wherein each pixel includes: a photoelectric transducer for generating an electric signal from light received thereby; a floating semiconductor region for accumulating a charge from the photoelectric transducer; a first charge transfer path extending from the photoelectric transducer to the floating semiconductor region; a second charge transfer path extending from the photoelectric transducer to the floating semiconductor region; and an output unit for providing a signal corresponding to a potential in the floating semiconductor region; wherein one of the first and second charge transfer paths includes a first shutter switch for controlling a transfer of the charge from the photoelectric transducer in response to the first control signal, a first storage diode for accumulating the charge from the photoelectric transducer, and a first transfer switch for controlling a transfer of the charge from the first storage diode to the floating semiconductor region in response to the second control signal; wherein the other of the first and second charge transfer paths includes a second shutter switch for controlling a transfer of the charge from the photoelectric transducer to the floating semiconductor region through no charge storage unit in response to the third control signal; wherein the first pixel signal corresponds to a first transfer charge transferred to the floating semiconductor region through the first charge transfer path; wherein the second pixel signal corresponds to a second transfer charge transferred to the floating semiconductor region through the second charge transfer path; wherein a first accumulation period for accumulating the charge transferred through the one charge transfer path is longer than a second accumulation period for accumulating the charge transferred through the other charge transfer path; wherein the signal processing unit includes a signal synthesis unit for synthesizing a synthetic image signal from the first and second pixel signals; wherein the synthetic image signal has a dynamic range wider than that of each of the first and second image signals; wherein the pixel includes a reset switch for resetting the floating semiconductor region; wherein the control circuit generates a reset signal for controlling the reset switch; wherein the first pixel signal includes a first signal level corresponding to the first transfer charge and a first reset level corresponding to a potential of the floating semiconductor region reset by the reset switch; wherein the second pixel signal includes a second signal level corresponding to the second transfer charge and a second reset level corresponding to a potential of the floating semiconductor region reset by the reset switch; and wherein the readout circuit includes first and second correlated double sampling circuits for sampling the first and second pixel signals, respectively.