Patent ID: 6590279
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A dual-chip integrated circuit package, which comprises:a first integrated circuit chip having a front side and a back side, with the front side being formed with a plurality of bonding pads; a second integrated circuit chip having a front side and a back side, with the front side being formed with a plurality of bonding pads; the second integrated circuit chip being attached to the first integrated circuit chip in a back-to-back manner; a leadframe having a plurality of first leads and a plurality of second leads and at least a pair of support members between the first and second leads; at least one support member attached to the front side of the first integrated circuit chip for providing a support to the bonding pads on the second integrated circuit chip; the support being not smaller in dimension than the area where the bonding pads on the second integrated chip are located; a plurality of bonding wires for connecting the bonding pads on the first integrated circuit chip to the first leads and the bonding pads on the second integrated circuit chip to the second leads; at least one insulative adhesive for attaching the support member to the front side of the first integrated circuit chip; and an encapsulant for encapsulating the first integrated circuit chip, the second integrated circuit chip, the support members, and the inner parts of the first and second parts of the leadframe; wherein the first integrated circuit is mounted on the support members in such a manner that the front side thereof faces the support members and the bonding pads on the first integrated circuit chip are separated from any of the support members; and the second integrated circuit chip is attached to the back side of the first integrated circuit chip and the bonding pads on the second integrated circuit chip are aligned to at least one of the support members.