Patent ID: 6225185
Filing Date: 2001-05-01
Classification: H01L

Abstract:
A method for fabricating a semiconductor memory in which a transistor is formed on a semiconductor substrate, an interlayer insulator film is formed on the transistor, a contact plug is formed in the interlayer insulator film, a lower electrode film, a ferroelectric film as a capacitor insulator film and an upper electrode film are formed above the interlayer insulator film including the contact plug, a capacitor is formed by sequentially patterning the upper electrode film, the ferroelectric film and the lower electrode film, and the capacitor and the transistor are electrically connected to each other with the contact plug, comprising the steps of:forming an oxidation barrier layer on the capacitor in such a manner that at least the capacitor is covered with the oxidation barrier layer after forming the capacitor, said oxidation barrier layer being composed of silicon nitride or an oxide of titanium, tantalum, or a combination thereof; andheat treating the in-process semiconductor memory in an oxygen-containing atmosphere after forming the oxidation barrier layer on the capacitor.