Patent ID: 8884369
Filing Date: 2014-11-11
Classification: H01L

Abstract:
1. A device comprising: a semiconductor layer of a first conductivity type; a first and a second body region over the semiconductor layer, wherein the first and the second body regions are of a second conductivity type opposite the first conductivity type; a doped semiconductor region of the first conductivity type between and contacting the first and the second body regions; a gate dielectric layer over the first and the second body regions and the doped semiconductor region; a first gate electrode over the gate dielectric layer, wherein the first gate electrode comprises a first edge, and wherein the first gate electrode overlaps the first body region; a second gate electrode over the gate dielectric layer and electrically coupled to the first gate electrode, wherein the second gate electrode overlaps the second body region, wherein the second gate electrode comprises a second edge separated from the first edge by a space, with no additional gate electrode disposed between the first edge and the second edge, and wherein the space overlaps the doped semiconductor region; and a source region comprising: