Patent ID: 6198166
Filing Date: 2001-03-06
Classification: H01L,H05K

Abstract:
A package for mounting a power semiconductor device to a printed circuit board, said package comprising:a dielectric ceramic plate having an upper and lower surface and a grid array of holes penetrating said plate;a plurality of conductive metal contact pads disposed on said upper surface of said ceramic plate, said pads providing electrical contact for the power semiconductor device;conductive metal filling said holes, said metal-filled holes being connected to said conductive metal contact pads and providing vias from said pads to said lower surface of said ceramic plate;an array of solder balls, each ball being attached to a via at said lower surface of said ceramic plate and providing a connection terminal to the printed circuit board;sidewalls sealably connected to said ceramic plate at its perimeter; anda lid sealably connected to said sidewalls, said lid comprising, together with said sidewalls and said ceramic plate, a hermetically sealed cavity enclosing the power semiconductor device and conductive metal contact pads.