Patent ID: 7830018
Filing Date: 2010-11-09
Classification: H01L,H05K,Y10T

Abstract:
1. A substrate, comprising: a non-conductive layer having a top side, a bottom side, and a via hole extending between the top and bottom sides and including a sidewall having a first section and a second section; a partitioned via including a first metal interconnect within the via hole on the first section of the sidewall and a second metal interconnect within the via hole on the second section of the sidewall, wherein the second metal interconnect is electrically isolated from the first metal interconnect; first and second lead lands on the top side of the non-conductive layer, the first and second lead lands being electrically isolated from each other and being in direct contact with the first and second metal interconnects, respectively, the first and second lead lands at least partially surrounding the partitioned via; and first and second traces on the top side of the non-conductive layer, the first and second traces being in electrical contact with and extending away from the first and second lead lands, respectively, wherein the first and second metal interconnects, the first and second lead lands, and the first and second traces are generally homogeneous and have the same thickness.