Patent ID: 7515482
Filing Date: 2009-04-07
Classification: G11C

Abstract:
1. A pipe latch device, comprising: an output controller for outputting a first and a second output control signal group based on a delay locked loop (DLL) clock signal and a driving signal; an input controller for generating an input control signal group sequentially activated based on a column-related clock signal; and a pipe latch unit including a plurality of unit pipe latches, each for latching data on a data line when a corresponding input control signal among the input control signal group is activated, and outputting latched data when a corresponding output control signal among the first and the second output control signal groups is activated, wherein the output controller includes: a plurality of shifters, each of which delays an input data signal by a half clock and one clock to output a first and a second output signal, respectively, in synchronization with the DLL clock signal and the driving signal; and a plurality of output control signal drivers for outputting the first and the second output control signal groups based on the first and the second output signals of the plurality of shifters.