Patent ID: 8959133
Filing Date: 2015-02-17
Classification: G06F,H04L

Abstract:
1. A configurable fast Fourier transform (FFT) apparatus comprising: a data input to retrieve an input data segment from a memory device; a data output to store processed data to the memory device; an interconnect coupled between the data input and the data output, the interconnect to route radix FFT signals of multi-type radix configurations from the data input to the data output; and a configuration manager coupled to the interconnect, the configuration manager to dynamically configure the interconnect according to a determination of a current radix configuration; further comprising a plurality of intra-stage multipliers coupled between the data input and the interconnect, the plurality of intra-stage multipliers to receive an input data segment from the data input, wherein the data input is further configured to direct the input data segment to at least one of the plurality of intra-stage multipliers in response to a determination that the current radix configuration is a non-radix-2 configuration; further comprising an intra-stage twiddle generator coupled to the plurality of intra-stage multipliers, the intra-stage twiddle generator to generate intra-stage twiddle factors and to communicate the intra-stage twiddle factors to the plurality of intra-stage multipliers according to the determination of the current radix configuration, wherein at least one of the plurality of intra-stage multipliers is configured to multiply the input data segment by one of the intra-stage twiddle factors according to the determination of the current radix configuration; further comprising a plurality of accumulators coupled between the interconnect and the data output, each accumulator to accumulate a product of at least one plurality of intra-stage multipliers, wherein the interconnect is further configured to direct the product of one of the at least one intra-stage multipliers to a corresponding accumulator according to the configuration of the interconnect based on the current radix configuration; and further comprising a plurality of inter-stage multipliers coupled between the plurality of accumulators and the data output, each inter-stage multiplier to receive an accumulated data segment from one of the accumulators.