Patent ID: 6272514
Filing Date: 2001-08-07
Classification: G06F

Abstract:
An apparatus that performs partitionable carry-lookahead logic on two N-nary operands, comprising:a 1-of-P first input that receives the 1-of-P first operand and a 1-of-Q second input that receives the 1-of-Q second operand, wherein each said operand comprises one or more blocks comprising one or more bits, wherein each said operand further comprises one or more partition comprising one or more said blocks;an arithmetic logic, coupled to said first input and said second input, that performs an arithmetic operation on one or more grouping of one or more bits of the first operand and on one or more grouping of one or more bits of the second operand, to produce an intermediate result, said arithmetic logic also performs carry propagate logic to produce an intermediate HPG indicator for each said grouping; anda partition detection logic, coupled to said arithmetic logic, that produces a 1-of-R block-level HPG indicator for each said block, wherein the value of said block-level HPG indicator does not allow carry propagation across said partition boundaries.