Patent ID: 8138708
Filing Date: 2012-03-20
Classification: G05B

Abstract:
1. A circuit comprising: an error amplifier having a first input to receive a reference signal, a second input and an output to produce an error signal based on the first input and the second input; a lead-lag compensator comprising a lead portion and a lag portion, the lead portion being connected between the second input of the error amplifier and a feedback path from an external controlled system of a closed-loop control system having an associated frequency response, and the lag portion being connected between the second input and the output of the error amplifier; and wherein the lead portion comprises a network of passive elements connected to provide a high frequency zero for lead compensation and a high frequency pole to reduce the effect of the high frequency zero on the frequency response; wherein the lead portion comprises a first resistor, a second resistor and a capacitor, the second resistor and the capacitor being connected in series as a series resistive-capacitive (RC) circuit, and the first resistor being connected in parallel with the series RC circuit to form a parallel RC circuit; wherein the lead portion further comprises a third resistor connected in series between the parallel RC circuit and the second input of the error amplifier.