Patent ID: 6133635
Filing Date: 2000-10-17
Classification: H01L

Abstract:
A process for making a self-aligning conductive via structure in a semiconductor device, comprising:forming a first interconnect metallization layer over an oxide layer;forming an etch stop layer over the first interconnect metallization layer;forming a conductive via metallization layer over the etch stop layer;forming a hard mask layer over the conductive via metallization layer;patterning the hard mask layer and the conductive via metallization layer to produce an outline of a first interconnect metal layout, the patterning being configured to remove portions of the hard mask layer and portions of the conductive via metallization layer in regions other than the outline of the first interconnect metal layout; andproducing a conductive via and an interconnect line, the conductive via being formed from a portion of the conductive via metallization layer, the interconnect line being formed from a portion of the first interconnect metallization layer, the conductive via being substantially aligned with the interconnect line that is defined at the outline of the first interconnect metal layout, wherein the producing of the conductive via and the interconnect line comprises:patterning a remainder of the hard mask layer over the outline of the first interconnect metal layout to leave a hard mask pad over the conductive via metallization layer; andremoving the conductive via metallization layer within the outline of the first interconnect metal layout that is not covered by the hard mask pad and substantially simultaneously removing the first interconnect metallization layer down to the oxide layer in regions other than the outline of the first interconnect metal layout;whereby the conductive via is formed from the conductive via metallization remaining under the hard mask pad, and the conductive via is substantially aligned with the interconnect line formed from the first interconnect metallization layer within the outline of the first interconnect metal layout.