Patent ID: 7075866
Filing Date: 2006-07-11
Classification: G11B,H03L

Abstract:
1. A clock extracting device of a disc reproducing apparatus, comprising: an information read-out means for reading information signals from a disklike information recording medium; a voltage control oscillator; a phase comparator for comparing a phase of the information signals read by the information read-out means and a phase of an output of the voltage control oscillator; a frequency comparator for comparing a frequency of the information signals read by the information read-out means and a frequency of the output of the voltage control oscillator; a speed sensor for detecting the frequency of the output of the voltage control oscillator at a reference clock so as to output a speed signal corresponding to the detected frequency; a gain command unit for determining a plurality of speed ranges divided by a predetermined reference value and designating a loop gain of a clock extracting circuit in accordance with a range signal indicating in which one of the speed ranges the speed signal outputted from the speed sensor falls; a charge pump which discharges or draws electric current in accordance with outputs of the phase comparator and the frequency comparator and changes over an output current value in accordance with a gain command of the gain command unit; and a series circuit of a resistor and a capacitor, whose one end is connected to an output of the charge pump and the other end of which is grounded or is connected to a reference voltage; wherein an output voltage between the opposite ends of the series circuit acts as a control voltage for the voltage control oscillator and the gain command unit issues the gain command such that the loop gain of the clock extracting circuit secures a desired operating point in accordance with a read rate of the information signals; wherein the loop gain of the clock extracting circuit is raised when the read rate of the information signals increases; and wherein the loop gain of the clock extracting circuit is lowered when the read rate of the information signals decreases.