Patent ID: 7842560
Filing Date: 2010-11-30
Classification: B82Y,H01L

Abstract:
1. A method of manufacturing a thin film transistor, the method comprising: forming a gate insulating layer on a substrate having a gate electrode; forming a semiconductor layer of nanomaterial on the gate insulating layer; forming a source electrode and a drain electrode on the gate insulating layer; and applying a voltage to the source electrode and the drain electrode to arrange a direction of the nanomaterial, wherein the nanomaterial includes a nanowire, wherein a major axis of the nanowire is arranged according to a direction of an electric field between the source electrode and the drain electrode, wherein the step of forming the semiconductor layer of nanomaterial on the gate insulating layer includes: forming a self-assembled monolayer having a first polarity charge on the gate insulating layer; and dropping the nanomaterial on the substrate having the self-assembled monolayer, the nanomaterial having a second polarity charge, wherein the first polarity charge is positive and the second polarity charge is negative, wherein the self-assembled monolayer includes an —NH2 group, wherein the step of forming the self-assembled monolayer having the first polarity charge on the gate insulating layer includes: projecting a deep-ultraviolet on a mask to leave the self-assembled monolayer on a region where the semiconductor layer is formed.