Patent ID: 6037238
Filing Date: 2000-03-14
Classification: H01L

Abstract:
A method of fabricating an insulator filled, shallow trench isolation region, in a semiconductor substrate, comprising the steps of:depositing a first insulator layer, on said semiconductor substrate;forming an opening in said first insulator layer, exposing a region of said semiconductor substrate;forming a tapered shallow trench in said region of said semiconductor substrate, exposed in said in the opening in said first insulator layer;performing a hydrogen anneal procedure, for a period between about 10 min to 6 hrs, in an atmospheric pressure furnace, creating a defect free denuded zone, in a region of said semiconductor, exposed in said tapered shallow trench;growing a second insulator layer, lining a surface of said defect free denuded zone, in said semiconductor substrate;depositing a third insulator layer, completely filling said tapered shallow trench; andremoving said third insulator layer, from a top surface of said first insulator layer, creating said insulator filled, shallow trench isolation region.