Patent ID: 6421037
Filing Date: 2002-07-16
Classification: G09G

Abstract:
A Silicon-Chip-Display (SCD) cell structure operable in a field sequential mode for use in a liquid crystal display (LCD) devices, said SCD cell structure comprising;a mirror plate; a top electrode; a liquid crystal sandwiched between said mirror plate and said top electrode; first, second and third write-enable transistors, each of said first through third write-enable transistors having a gate, a source and a drain; first, second and third storage capacitors, each of said first through third storage capacitors having a first end and a second end; first, second and third display-enable transistors, each of said first through third display-enable transistors having a gate, a source and a drain; each of said first through third write-enable transistors having its source connected to a shared bitline and having its gate connected to one of three corresponding wordlines; each of said first through third write-enable transistors having its drain connected to said first end of one of said first through third storage capacitors and to said source of one of said first through third display-enable transistors, said second end of said first through third storage capacitors being connected to a ground potential; each of said first through third display-enable transistors having its drain connected to said mirror plate and having its gate connected to one of three corresponding display-enable lines; and test circuit means operatively connected for reading a voltage stored on said mirror plate.