Patent ID: 8117585
Filing Date: 2012-02-14
Classification: G06F,H05K

Abstract:
1. A system for testing size of vias, the system comprising: a storage system; and at least one processor to execute one or more programs stored in the storage system, the one or more programs comprising: a reading module operable to read a component group to be tested from the storage system, and a via size of each via in the component group; a selecting module operable to select a standard via size corresponding to the component group from the storage system; a testing module operable to test if each via in the component group is qualified according to the standard via size, and generate a test result of all the vias in the component group; a displaying module operable to highlight the vias that are unqualified in a printed circuit board (PCB) design map displayed on a display; and a generating module operable to generate a report to list the test result of all the vias in the component group.