Patent ID: 6429735
Filing Date: 2002-08-06
Classification: H03F

Abstract:
An apparatus for providing a buffered output signal in response to a differential input signal that is provided by an electronic circuit, the apparatus comprising:a pre-gain stage amplifier that is arranged to provide a differential intermediary signal in response to the differential input signal, wherein the pre-gain stage amplifier includes a first differential amplifier that provides a first half of a gain associated with the pre-gain amplifier and a second differential amplifier that provides a second half of the gain of the pre-gain stage amplifier, wherein the input impedance of the pre-gain stage amplifier has a low input capacitance such that the performance of the electronic circuit is unaffected by the apparatus; and a gain stage amplifier that provides the buffered output signal in response to the differential intermediary signal, the gain stage amplifier further comprising a first n-type transistor and a second n-type transistor that are configured as an n-type differential pair, a first p-type transistor and a second p-type transistor that are configured as a p-type differential pair, wherein the n-type differential pair and the p-type differential pair have common inputs that are coupled to the differential intermediary signal, a first current mirror that includes a first diode-connected p-type transistor that is coupled to the first n-type transistor, a second current mirror that includes a second diode-connected p-type transistor that is coupled to the second n-type transistor, a third current mirror that includes a first diode-connected n-type transistor that is coupled to the first p-type transistor, a fourth current mirror that includes a second diode-connected n-type transistor that is coupled to the second p-type transistor, wherein outputs of the second current mirror and the fourth current mirror are coupled together to provide the buffered output signal.