Patent ID: 6352872
Filing Date: 2002-03-05
Classification: H01L

Abstract:
A method for fabricating a silicon-on-insulator (SOI) device having a double gate, comprising the steps of:Preparing a supporting substrate and a device substrate; Forming an insulating layer over the supporting substrate; Implanting oxygen ions into the device substrate to form a first oxide layer within the device substrate; Implanting hydrogen ions into the device substrate below the first oxide layer to form an ion implanting layer below the first oxide layer and to define a first silicon layer and a second silicon layer over and below the first oxide layer, respectively; Bonding the device substrate and the supporting substrate to contact the insulating layer with the first silicon layer; Removing a portion of the device substrate including the ion implanting layer until the second silicon layer is exposed; Implanting impurity ions of a first conductivity into the first silicon layer; Patterning the first and second silicon layers and the first oxide layer; Forming a second oxide layer over the second silicon layer; Implanting impurity ions of a second conductivity into the second silicon layer; Forming a polysilicon layer doped with impurity ions of first conductivity over the second oxide layer; Patterning the polysilicon layer and the second oxide layer to form an upper gate having a width smaller than a lower gate; Implanting impurity ions of a first conductivity into the first silicon layer using the upper gate as a barrier to form intrinsic regions at both sides of the upper gate in the first silicon layer; and Implanting impurity ions of a first conductivity into the second silicon layer using the upper gate as a barrier to form source and drain regions at both sides of the upper gate in the second silicon layer.