Patent ID: 8697529
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A method of making a transistor, comprising: providing a semiconductor substrate; forming a gate stack over the semiconductor substrate; forming an insulating layer over the semiconductor substrate, the insulating layer further covering the gate stack; forming a depleting layer over the insulating layer; etching the depleting layer and the insulating layer to form composite sidewalls on two sides of the gate stack, an upper outside part of the sidewalls being formed of the depleting layer while a remainder part of the sidewalls being formed of the insulating layer; forming a metal layer over the semiconductor substrate, the metal layer further covering the gate stack and the sidewalls; performing thermal annealing to form source/drain Schottky junctions in the semiconductor substrate on two sides of the gate stack, wherein, during the annealing, metal covering the sidewalls is absorbed by reaction with the depleting layer in the composite sidewalls; and removing the metal layer on the semiconductor substrate and reaction product from metal reacting with the depleting layer in the composite sidewalls.