Patent ID: 8183098
Filing Date: 2012-05-22
Classification: H01L

Abstract:
1. A method for manufacturing an integrated electronic device, the method comprising: providing an SOI substrate comprising a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor starting layer on the insulating layer; epitaxial growing applied to the starting layer to obtain a semiconductor active layer on the insulating layer for integrating components of the device; forming at least one contact trench extending from an exposed surface of the starting layer to the semiconductor substrate before the epitaxial growing is applied to the starting layer, wherein the at least one contact trench clears a corresponding portion of the starting layer, of the insulating layer and of the semiconductor substrate, the epitaxial growing being further applied to the cleared portions thereby at least partially filling the at least one contact trench with semiconductor material; and implanting impurities in at least part of the cleared portions between the step of forming the at least one contact trench and the epitaxial growing, the impurities diffusing during the epitaxial growing to form an interface region enclosing the at least one contact trench, wherein the interface region is a contact region having the same type of conductivity as and a concentration of impurities higher than the semiconductor substrate and the active layer, the method further comprising the steps of: forming an insulating trench extending from an exposed surface of the active layer to the insulating layer around the at least one contact trench, the insulating trench insulating an active region of the active layer from a remaining portion thereof, forming a further contact region in the active region extending from the exposed surface of the active layer to the contact region, the further contact region having the same type of conductivity as and a concentration of impurities higher than the active layer, forming an electrical contact on a contact window of an exposed surface of the further contact region, the electrical contact contacting the semiconductor substrate through the at least one contact trench, and integrating the components in the remaining portion of the active layer.