Patent ID: 6590241
Filing Date: 2003-07-08
Classification: H01L

Abstract:
MOS silicon device comprising:a. a silicon substrate, b. a dielectric layer on said silicon substrate, c. a gate electrode on said dielectric layer, the invention characterized in the dielectric layer has a composition selected from group consisting of: (1) Ta1âˆ’xAlxOy, where x is 0.03-0.7 and y is 1.5-3, (2) Ta1âˆ’xSixOy, where x is 0.05-0.15, and y is 1.5-3, and (3) Ta1âˆ’xâˆ’zAlxSizOy, where 0.7>x+z>0.05, z<0.15 and y is 1.5-3.