Patent ID: 6180486
Filing Date: 2001-01-30
Classification: H01L

Abstract:
A process for fabricating a planar silicon-on-insulator (SOI) structure having areas devoid of buried oxide, the process comprising the steps of:(a) forming in sequential order a substrate including a silicon wafer, an oxide layer disposed on and in contact with said silicon wafer, a silicon layer disposed on and in contact with said oxide layer, and a nitride layer disposed on and in contact with said silicon layer, said substrate having a top surface;(b) forming a trench in said substrate extending from said top surface to said silicon wafer, said trench having side walls and a bottom, said trench side walls having side-wall silicon portions;(c) forming oxide layers on said trench bottom and on said side-wall silicon portions to create a trench bottom oxide layer and trench side-wall oxide layers;(d) forming a protective side wall on said trench side wall extending over said trench side-wall oxide layer and overlying a portion of said trench bottom oxide lay er;(e) removing all of said trench bottom oxide layer not underlying said protective side wall to expose said trench bottom; and(f) growing epitaxial silicon in said trench from said trench bottom to at least said top surface.