Patent ID: 7790557
Filing Date: 2010-09-07
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a SiC semiconductor device, the SiC semiconductor device including a SiC substrate of a first conductivity type; a SiC drift layer of the first conductivity type on the substrate; SiC base regions of a second conductivity type contacting with the drift layer; a SiC source region of the first conductivity type contacting with the base region; a gate electrode covering the portion of the base region that is sandwiched between the drift layer and the source region, with a gate insulator film interposed therebetween; a source electrode contacting commonly with the base region and the source region; and a drain electrode on the back surface of the substrate, the method comprising exerting stress to SiC in the region where carriers flow in order to change the crystal lattice intervals of the SiC, wherein stress is exerted on SiC in the region where carriers flow by implanting Ar ions in the SiC in the region where carriers flow and annealing the implanted Ar atoms, in order to exert stress on the SiC in the region where carriers flow and thereby change the crystal lattice intervals of the SiC layer comprising the region where carriers flow.