Patent ID: 6704373
Filing Date: 2004-03-09
Classification: H04L

Abstract:
A timing recovery circuit comprising:absolute response value signal generating means for obtaining absolute values of L input impulse response value signals representing as communication channel characteristic and arranged in an order of shorter response times and providing the obtained absolute values as absolute response value signals; absolute value signal sum generating means for using the maximum one of the absolute response value signals as a maximum absolute response value signal and using m sequential absolute response value signals, in which the maximum absolute response value signal is highest in response speed, as a precursor candidate signal set and providing the total sum of the precursor candidate signal set as an absolute value signal sum; weighted absolute value signal sum generating means for multiplying the absolute value signal sum by a shift factor determined on the basis of a received signal intensity to obtain and provide a weighted absolute value signal sum; precursor/postcursor response signal set generating means for providing, when the weighted signal sum is greater than all of preceding absolute response value signals wherein all of preceding absolute response value signals are higher in response speed than the precursor candidate signal set, m impulse response signals corresponding to the precursor candidate signal set among the L impulse response signals as a precursor response signal set and n impulse response signals next in response speed to the precursor response signal set as a postcursor response signal set; and weighted absolute value signal sum updating means for updating, when the weighted signal sum is less than any one of the preceding absolute value response signals, the precursor candidate signal set with m sequential absolute response value signals higher in response speed by one each and updating the weighted absolute value signal sum with weighted total sum of the updated precursor candidate signal set, the precursor and postcursor response signal sets being determined recursively, wherein L, m and n are natural numbers.