Patent ID: 6468853
Filing Date: 2002-10-22
Classification: H01L

Abstract:
A method for fabricating a shallow trench isolation structure on a semiconductor substrate having field oxide regions extending over the edges of active device areas comprising:forming a first oxide layer by thermal oxidation on said substrate; depositing a silicon nitride (SiN) layer on said first oxide layer for a hard mask; forming a trench in said substrate by patterning said substrate and etching said SiN hard mask, said first oxide layer and partially into said substrate; forming a first conformal silicon layer over exposed surfaces of said substrate, said trench, said first oxide layer and said SiN hard mask; annealing said conformal silicon layer to form epitaxial silicon in said trench substrate surface regions and polysilicon elsewhere; forming a second oxide deposition layer on exposed surfaces of said trench epitaxial silicon and said polysilicon; filling said trench opening with a third oxide deposition; removing top surface of said trench fill third oxide deposition to just below top surface of said SiN hard mask layer; removing said SiN hard mask layer and said first oxide layer by selective etching; performing a fourth oxide deposition, covering surface of said trench fill third oxide deposition and said active device area; removing said fourth oxide deposition layer leaving field oxide extensions over edge of said active device area near said trench corners; continue processing of said active devices.