Patent ID: 8963818
Filing Date: 2015-02-24
Classification: G09G

Abstract:
1. A display panel comprising: a plurality of data lines disposed in a display area, on which a plurality of pixels are disposed; a plurality of gate lines disposed in the display area and crossing the data lines; a plurality of dummy loads disposed in a peripheral area adjacent to the display area, wherein the dummy loads include a plurality of dummy data lines adjacent to the data lines; a pad portion disposed in the peripheral area and including signal pads and dummy pads; and a fanout portion including a first fanout line portion connecting the data lines to the signal pads, and a second fanout line portion connecting the dummy loads to the dummy pads, wherein the second fanout line portion includes: a plurality of fanout connecting lines connecting the dummy pads with one another in a plurality of groups, wherein first fanout connecting lines are connected to a plurality of odd-numbered dummy pads in one of the groups, and second fanout connecting lines are connected to a plurality of even-numbered dummy pads in another one of the groups; and a plurality of fanout lines connecting the fanout connecting lines to the dummy data lines, wherein a first fanout line electrically connects one of the first fanout connecting lines to one of the dummy data lines, and a second fanout line electrically connects one of the second fanout connecting lines to another one of the dummy data lines, and wherein each of the dummy loads only include the dummy data lines, and wherein the dummy data lines are disposed parallel to the data lines, and wherein the dummy data lines are at least one of longer than the data lines and narrower than the data lines, and wherein the dummy data lines have zigzag patterns.