Patent ID: 7219314
Filing Date: 2007-05-15
Classification: G01R

Abstract:
1. A method of testing a programmable logic device to determine whether the programmable logic device is functional when configured to instantiate a circuit design expressed in a design database, wherein the programmable logic device includes a plurality of logic blocks and programmable interconnect resources, the method comprising: identifying a collection of signal paths defined in the design database, each signal path including a source node and a destination node; instantiating the signal paths on the programmable logic device; testing the instantiated signal paths to identify a failed signal path; correlating the failed signal path with at least one alternative signal path extending between the source and destination nodes of the failed signal path; instantiating the alternative signal path on the programmable logic device; testing the instantiated alternative signal path; and wherein the testing of one or more of the instantiated signal paths and instantiated alternative signal path includes, configuring one of the logic blocks as a test-signal generator, issuing a test signal from the configured logic block, and transmitting the test signal through the signal path.