Patent ID: 7795955
Filing Date: 2010-09-14
Classification: G06F,Y02D

Abstract:
1. A semiconductor integrated circuit comprising: a plurality of computing units, wherein each of the computing units includes an input/output control unit that controls input and output of a process set signal, the process set signal being sent to and from the other computing units and indicating processing data and processing content of the processing data; a storage unit that stores the processing data and processing content of the processing data; a first signal output unit that outputs a first status signal indicating either one of an operating state and a standby state, the operating state indicating a state of the input/output control unit being to access the storage unit, and the standby state indicating a state of the input/output control unit being in other than the operating state; a processing unit that performs a predetermined process, that the process set signal indicates, on processing data stored in the storage unit, stores the processing data that has been processed in the storage unit, and outputs identification information for identifying the processing data that has been processed from the storage unit and the process set signal indicating processing content to be performed by the other computing units; a process control unit that controls a process performed by the processing unit based on the process set signal; a second signal output unit that outputs a second status signal indicating either one of an operating state and a standby state, the operating state indicating a state of the process control unit being to control the processing unit, and the standby state indicating a state of the control unit being in other than the operating state; and a power control unit that controls ON and OFF of power of the storage unit and the processing unit based on states of the first status signal and the second status signal.