Patent ID: 6908813
Filing Date: 2005-06-21
Classification: H01L

Abstract:
1. A method, comprising the steps of: providing a semiconductor structure; forming a first oxide layer over said semiconductor structure; forming a first polysilicon layer over said first oxide layer; etching said first polysilicon layer to define a gate structure, said gate structure having sidewalls; forming a second oxide layer over said first polysilicon layer; forming a third oxide layer over said semiconductor structure, including over said second oxide layer; forming a silicon nitride (SiN) layer over said third oxide layer; performing a fist wet etch of said SiN layer to form first SiN spacers along the sidewalls of said gate structure, said spacers having a height; performing a second wet etch of said first SiN spacers to form second SiN spacers along the sidewalls, said second spacers having a height less than the height of the first SiN spacers.