Patent ID: 9106131
Filing Date: 2015-08-11
Classification: G05F,H02M

Abstract:
1. A controller used in a high side buck converter, wherein the high side buck converter comprises a high side switching transistor and a low side switching transistor, and is configured to provide an output voltage at an output terminal, the high side and low side switching transistors are coupled together to form a switch node and the switch node is configured as the reference ground of the controller, wherein the controller comprises: a sensing window generator configured to generate a sensing window signal; an error amplifier a first input terminal, a second input terminal, a third input terminal and an output terminal, wherein the first input terminal is configured to receive a feedback signal of a sensing signal indicating the output voltage, the second input terminal is configured to receive a reference signal, the third input terminal is coupled to the sensing window generator to receive the sensing window signal, the output terminal is configured to provide an error signal, and wherein the error amplifier is enabled to amplify the difference between the reference signal and the feedback signal during a sensing window determined by the sensing window signal, and is disabled out of the sensing window; a first comparator coupled to the sensor and the error amplifier, wherein the first comparator is configured to compare the feedback signal with the error signal, and to generate a first comparison signal; and an on-time signal generator coupled to the first comparator, wherein the on-time generator is configured to generate an on-time signal based on the first comparison signal, so as to control the high side and low side switching transistors; wherein the sensing window generator comprises: a third comparator having a first input terminal, a second input terminal and an output terminal, wherein the second input terminal is configured to receive a reference voltage; a first current source having an input terminal and an output terminal, wherein the input terminal is configured to receive a supply voltage, the output terminal is coupled to the first input terminal of the third comparator; a first capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the first input terminal of the third comparator, the second terminal is coupled to the reference ground; a first switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first input terminal of the third comparator, the second terminal is coupled to the reference ground, and the control terminal is coupled to the on-time signal generator to receive the on-time signal; a fourth comparator having a first input terminal, a second input terminal and an output terminal, wherein the second input terminal is configured to receive a reference voltage; a second current source having an input terminal and an output terminal, wherein the input terminal is configured to receive a supply voltage, the output terminal is coupled to the first input terminal of the fourth comparator; a second capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the first input terminal of the fourth comparator, the second terminal is coupled to the reference ground; a second switch having a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the first input terminal of the fourth comparator, the second terminal is coupled to the reference ground, and the control terminal is coupled to the on-time signal generator to receive the on-time signal; a NOT gate having an input terminal and an output terminal, wherein the input terminal is coupled to the output terminal of the fourth comparator; and an AND gate having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the output terminal of the third comparator, the second input terminal is coupled to the output terminal of the NOT gate, and the output terminal is configured to provide the sensing window signal.