Patent ID: 8415250
Filing Date: 2013-04-09
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising the steps of: providing a substrate; growing a source region and a drain region of the semiconductor device on the substrate; forming a gate disposed on the substrate between the source region and the drain region; forming an interlayer dielectric covering the source region and the drain region, and disposed on and adjacent to the gate; forming openings inside the interlayer dielectric, wherein the openings expose the source region and the drain region underneath the interlayer dielectric; forming one or more shaped surface areas on the source region and the drain region exposed by the openings, wherein the one or more shaped surface areas are hexagonal-like surface areas, pentagonal-like surface areas, or brimmed surface areas; forming a contact layer disposed on and adjacent to the interlayer dielectric, and the one or more shaped surface areas, wherein the contact layer provides a contact conformal to the one or more shaped surface areas, and wherein the contact layer is a silicide that comprises nickel silicide, cobalt di-silicide, or erbium di-silicide; forming a metal layer disposed on and adjacent to the contact layer; forming a planarized surface, wherein a portion of the contact layer and a portion of the metal layer are removed selective to the interlayer dielectric; and forming a capping layer disposed on the planarized surface.