Patent ID: 6211031
Filing Date: 2001-04-03
Classification: H01L

Abstract:
A method of forming a plurality of polysilicon structures having different resistance values comprising:providing a dielectric layer overlying a semiconductor substrate;depositing a first polysilicon layer overlying said dielectric layer;etching away said first polysilicon layer where it is not covered by a mask;thereafter depositing a second polysilicon layer overlying said first polysilicon layer and said dielectric layer;patterning said first and second polysilicon layers to form a first polysilicon structure comprising said first and second polysilicon layers over said dielectric layer and a second polysilicon structure comprising said second polysilicon layer overlying said dielectric layer; anddoping said first and second polysilicon structures to form said first polysilicon structure having a first resistance and said second polysilicon structure having a second resistance wherein said first resistance is lower than said second resistance.