Patent ID: 8703563
Filing Date: 2014-04-22
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device comprising: a) providing an N-type epitaxial (N-epi) layer; b) forming a trench mask on top of the N-epi layer; c) etching the N-epi layer through the trench mask to a predetermined depth to form a trench; d) forming a gate oxide on a bottom and sidewalls of the trench; e) filling a remaining space in the trench with a conductive material to form a gate electrode; f) removing the trench mask; g) implanting and diffusing dopants into a top region of the N-epi layer to form a P-body layer; h) implanting and diffusing dopants into a top region of the P-body layer to form a source region; i) forming oxide on top of the gate electrode and the source region; j) etching portions of the oxide to expose selected portions of the source region; k) etching selected portions of the source region not covered by the oxide down to the P-body layer; l) depositing N+ doped polysilicon on sidewalls of remaining portions of the source region and the oxide; and m) etching back the N+ doped polysilicon to form an N+ doped polysilicon spacer disposed along the sidewalls of the remaining portions of the source region and the oxide.