Patent ID: 6606046
Filing Date: 2003-08-12
Classification: G06F,H03M

Abstract:
A digital-to-analog converter for converting an n-bit digital data set including upper nh bits and lower nl bits to an analog voltage, comprising:a signal generator configured to perform a pulse width modulation, to generate a first pulse-width-modulated signal having a plurality of first pulses, and to generate a pulse-width-modulation (pwm) cycle signal indicating a cycle of said pulse width modulation; a low-weighted value manager configured to receive said first pulse-width-modulated signal, said pwm cycle signal, and the lower nl bits of said n-bit digital data set, and to divide a pulse width of the first pulse-width-modulated signal into a plurality of fraction pulse widths in response to a value of the lower nl bits of said n-bit digital data, to add said plurality of fraction pulse widths to respective of said plurality of the first pulses, and to generate a second pulse-width-modulated signal; and a voltage smoothing circuit configured to smooth said second pulse-width-modulated signal.