Patent ID: 6548995
Filing Date: 2003-04-15
Classification: G05F

Abstract:
A high speed bias voltage generating circuit comprising:a first node for receiving an input signal; a second node for providing an output voltage; a first circuit that is coupled to said first node and said second node, said first circuit being adapted to provide a standby voltage and substantially no output current to said second node when said input signal has a first value; a second circuit that is coupled to said first node and said second node, said second circuit being adapted to provide a bias voltage to said second node when said input signal has a second value different from said first value; and a third circuit that is coupled to said first node and to said second node, said third circuit being adapted to cause said output voltage to be changed from said standby voltage to a value substantially close to said bias voltage after said input signal switches from said first value to said second value.