Patent ID: 7332443
Filing Date: 2008-02-19
Classification: H01L

Abstract:
1. A method for fabricating a transistor device having a source region, a drain region and a channel region the method comprising: implanting germanium into a surface of a semiconductor body and forming a germanium-containing layer inside the semiconductor body having a first germanium concentration; oxidizing the surface of the semiconductor surface down to and including an upper part of the germanium-containing layer, thereby pushing the implanted germanium atoms from the surface down into the semiconductor body and thereby enhancing the germanium concentration inside the remaining germanium-containing layer and forming a layer with an enhanced or a second germanium concentration inside the semiconductor body where said transistor is to be formed, and wherein the thickness of an oxide grown during said oxidation step is reduced and the remaining oxide layer with reduced thickness is used as a gate oxide for the transistor; and concluding the fabrication of the transistor device such that the source region, the drain region and the channel region of the transistor device is within the layer with enhanced germanium concentration such that each of the source region, the drain region and the channel region have said second germanium concentration.