Patent ID: 7026841
Filing Date: 2006-04-11
Classification: G11C,H03K

Abstract:
1. A logical operation circuit comprising: a first ferroelectric capacitor which can retain a polarization state corresponding to a specified logical operator and which has first and second terminals; first and second signal lines which can provide first and second operation target data to the first and second terminals, respectively, of the ferroelectric capacitor retaining the polarization state corresponding to the specified logical operator and which are connected to the first and second terminals, respectively; and an operation result output section which outputs the result of a logical operation performed on the first and second operation target data according to the specified logical operator, based on a polarization state of the ferroelectric capacitor generated by providing the two operation target data to the ferroelectric capacitor, and which is connected to the first signal line, said operation result output section comprising an output transistor connected with the gate to the first signal line; wherein the specified logical operator is realized as a NAND or a NOR depending on whether the retained polarization state is the positive or negative residual polarization state, and wherein a threshold voltage of the output transistor is set such that, upon applying a read voltage to the second terminal, said threshold voltage lies between the gate voltage Va (S=1) appearing at the gate of the output transistor when the ferroelectric capacitor is in the positive residual polarization state and the gate voltage Va (S=0) appearing at the gate of the output transistor when the ferroelectric capacitor is in the negative residual polarization state.