Patent ID: 6327172
Filing Date: 2001-12-04
Classification: G11C

Abstract:
A ferroelectric non-volatile memory device comprising:a MOS or MIS cell transistor having a gate electrode;two ferroelectric capacitors which are connected in series and have respective first terminals connected to each other and to the gate electrode of said cell transistor and respective second terminals, said capacitors having substantially the same remnant polarization;first and second control lines connected to the respective second terminals of said two ferroelectric capacitors, said first control line corresponding to a bit line and said second control line corresponding to a plate line, respectively; anda single selector transistor having a gate electrode, said selector transistor connected in series to said capacitors and selectively turned on, said gate electrode connected to a word line;wherein data is stored by polarizing ferroelectric thin films of said capacitors in opposite directions with respect to the gate electrode of said cell transistor.