Patent ID: 6762100
Filing Date: 2004-07-13
Classification: H01L

Abstract:
A method of fabricating a mask ROM cell, comprising the steps of:preparing a semiconductor substrate of a first conductivity type; forming a plurality of impurity diffusion regions of a second conductivity type in a surface of the semiconductor substrate in one direction, having a predetermined distance and free of other impurity diffusion regions therebetween; forming an insulating layer completely above the surface of semiconductor substrate and entirely covering a portion of the semiconductor substrate surface corresponding to each impurity diffusion region; forming another insulating layer only on a portion of the semiconductor substrate between the impurity diffusion regions, whereby the other insulating layer is a gate insulating layer; and forming a plurality of conductive lines on and in contact with both the gate insulating layer and insulating layer in a predetermined interval, the gate lines being perpendicular to the impurity diffusion regions.