Patent ID: 8587055
Filing Date: 2013-11-19
Classification: H01L

Abstract:
1. An apparatus, comprising: a source region, a gate region and a drain region supported by a substrate; and a drift region extending horizontally between the source region and the drain region and including a plurality of n-type conducting strips and p-type conducting strips to couple the gate region and the drain region of a transistor, wherein the plurality of n-type conducting strips and p-type conducting strips are formed in alternating longitudinal rows longitudinally extending between the gate region and the drain region of the transistor, wherein each of a plurality of drain regions extends partially into the n type conductive strips, wherein each of the drain regions do not extend into the p type conducting strips, wherein the drain region has a higher impurity concentration than the n-type conducting strips, wherein the p type conducting strips separate each of the plurality of drain regions, and wherein the drift region is separated from the source region by a portion of the substrate.