Patent ID: 9077330
Filing Date: 2015-07-07
Classification: H03K,H03M,H04L

Abstract:
1. Serializer circuitry on an integrated circuit comprising: a plurality of channels of serializer circuitry, each of which employs a high frequency clock signal and a low frequency clock signal; a reference clock signal source; global clock generator circuitry for using an output signal of the reference clock signal source to produce a global high frequency clock signal and a global low frequency clock signal; local clock generator circuitry associated with at least one of the channels for using an output signal of the reference clock signal source to produce a local high frequency clock signal and a local low frequency clock signal; and selection circuitry associated with the at least one of the channels for selecting either the global high and low frequency clock signals or the local high and low frequency clock signals of that channel for employment by that channel as its high and low frequency clock signals.