Patent ID: 8004871
Filing Date: 2011-08-23
Classification: G11C,H01L

Abstract:
1. A semiconductor memory device comprising: a memory cell including a memory element including a first field effect transistor having a gate insulating film made of a ferroelectric film, and a selection switching element including a second field effect transistor having a gate insulating film made of a paraelectric film; a load element for a read operation connected in series to the memory cell; and a first gate electrode of the first field effect transistor is provided on the ferroelectric film, a second gate electrode of the second field effect transistor is provided on the paraelectric film, and a source electrode and a drain electrode are provided on a major surface of the semiconductor film, wherein the ferroelectric film and the paraelectric film are stacked with a semiconductor film being interposed therebetween, the semiconductor film forms a common channel shared by the first field effect transistor and the second field effect transistor, the load element includes a third field effect transistor having a channel made of the semiconductor film or a resistance element having a resistor made of the semiconductor film, and data is written into the memory element by applying a predetermined voltage to the second gate electrode to cause the selection switching element to go to an ON state, and applying a predetermined voltage between the first gate electrode and the drain electrode, to change a polarization state of the ferroelectric film.