Patent ID: 6363476
Filing Date: 2002-03-26
Classification: G06F

Abstract:
A device for performing a multiply-add operation in which multiplication of floating point numbers consisting of mantissas and exponents and accumulative addition or accumulative subtraction of results of the multiplication are performed, comprising:an exponent operating section for comparing an exponent of a floating point number of an operation result of a preceding multiply-add operation n with an exponent of a multiplication result of a subsequent multiply-add operation (n+1), and calculating an alignment shift count of the multiply-add operation (n+1) by the comparison result, the alignment shift count is obtained by starting calculation of the alignment shift count of the subsequent multiply-add operation (n+1) before normalization of the preceding multiply-add operation n is finished; and a mantissa operating section for aligning one mantissa of mantissas of two operands according to the alignment shift count inputted from the exponent operating section, calculating a sum of an aligned mantissa of the operand and the mantissa of the other operand, and normalizing a calculated addition result of the mantissas as needed, thereby calculating a mantissa of the multiply-add operation (n+1).