Patent ID: 6791123
Filing Date: 2004-09-14
Classification: H01L,H03K

Abstract:
An element for protecting a semiconductor device against electrostatic surge, comprising:a high impurity density n type semiconductor substrate having a low impurity density n type layer epitaxially grown on one of main surfaces of said high impurity density n type semiconductor substrate; an anode electrode provided on the other main surface of said high impurity density n type semiconductor substrate; a p type region selectively formed in a surface layer of said low impurity density n type layer; a first high impurity density n type region selectively formed in said p type region; a second high impurity density n type region extending from said surface layer of said p type region in which said first high impurity density n type region is formed to said surface layer of said low impurity density n type layer, the second high impurity density n type region having an inner vertical perimeter portion contacting said p type region and an outer vertical perimeter portion extending into and contacting with said low impurity density n type layer; a silicon oxide film formed on and covering all upper surfaces of said p type region and said second high impurity density n type region; and a cathode electrode electrically in contact with said first high impurity density n type region.