Patent ID: 6847059
Filing Date: 2005-01-25
Classification: H01L

Abstract:
1. An input protection circuit comprising: an input terminal for supplying an input signal to a circuit to be protected; a semiconductor substrate of a first conductivity type; a first well region of a second conductivity type opposite to the first conductivity type, said first well region being formed in one principal surface area of said semiconductor substrate and forming a PN junction with said semiconductor substrate; first and second impurity doped regions of the first conductivity type formed in said first well region and forming a first lateral bipolar transistor with a portion of said first well region serving as a base; a second well region of the first conductivity type formed in the principal surface area of said semiconductor substrate; and third and fourth well regions of the second conductivity type formed in said second well region and forming a second lateral bipolar transistor with a portion of said second well region serving as a base, bottoms of said third and fourth well regions forming a PN junction with said second well or with said semiconductor substrate and the third well region being formed entirely inside the second well region; wherein said input terminal is connected to said first impurity doped region, said second impurity doped region and the base of said first lateral bipolar transistor are connected to said third well region, said first lateral bipolar transistor operating without a fixed base bias, and said fourth well region and the base of the second lateral bipolar transistor are connected to a reference potential node.