Patent ID: 6828221
Filing Date: 2004-12-07
Classification: H01L,H05K,Y10T

Abstract:
A manufacturing method for a wiring circuit substrate, comprising steps of:forming an etching-barrier layer on a first metal layer that will be formed to be first conductor circuits, and forming a second metal layer, which is used to form protrusions, on said etching-barrier layer, said etching-barrier layer being formed of a metal differing from that of said first metal layer; forming said protrusions by selectively performing etching for said second metal layer by using etchant that does not etch at least said etching-barrier layer; removing said etching-barrier layer by using said protrusions as masks and by using etchant that does not etch said first metal layer; forming an interlayer-insulating layer on a face of said first metal layer on which the protrusions are formed; and forming a third metal layer, which will be formed to be second conductor circuits, on said interlayer-insulating layer and said protrusions.