Patent ID: 9112430
Filing Date: 2015-08-18
Classification: H02J,H02M,Y02E

Abstract:
1. A device for generating three phase alternating electrical current from a direct electrical current, the device comprising: a first coil, wherein an input terminal of the first coil is configured to be connected to a positive electrical output terminal of a direct electrical current source; a first boost switch, wherein an input terminal of the first boost switch is connected to an output terminal of the first coil and an output terminal of the first boost switch is configured to be connected to a negative electrical output terminal of the direct electrical current source; a first diode, wherein an input terminal of the first diode is connected to the output terminal of the first coil and the first diode is configured to prevent the flow of current from the first diode to the output terminal of the first coil; a first capacitor, wherein an input terminal of the first capacitor is connected to an output terminal of the first diode and an output terminal of the first capacitor is configured to be connected to the negative electrical output terminal of the direct electrical current source; a first input terminal for receiving a positive pulse amplitude modulated electrical current, wherein the first input terminal is connected to the output terminal of the diode; a second input terminal for receiving a negative pulse amplitude modulated electrical current, wherein the second input terminal is connected to the output terminal of the first capacitor; a first, a second, and a third switch connected in parallel with the first input terminal; a fourth, a fifth, and a sixth switch connected in parallel with the second input terminal; a first output terminal connected to an output of the first switch and an output of the fourth switch; a second output terminal connected to an output of the second switch and an output of the fifth switch; a third output terminal connected to an output of the third switch and an output of the sixth switch; and a processor coupled to the first boost switch and the first, second, third, fourth, fifth, and sixth switches, wherein the processor is configured to control the operation of each switch to generate a first phase of power on the first output terminal, a second phase of power on the second output terminal, and a third phase of power on the third output terminal; and a memory coupled to the processor, wherein the processor is configured with processor-executable instructions to perform operations comprising: