Patent ID: 7919374
Filing Date: 2011-04-05
Classification: H01L

Abstract:
1. A manufacturing method for a semiconductor device, comprising: forming a semiconductor layer of a first conductivity type on a semiconductor substrate the semiconductor layer including an element active portion and a peripheral portion that is formed in an outer periphery of the element active portion; forming a first trench and a second trench which are mutually connected in the semiconductor layer, the first trench being formed in the element active portion and the second trench being formed in the peripheral portion; forming a gate electrode in the first trench and a gate electrode extraction portion in the second trench, the gate electrode and the gate electrode extraction portion being mutually connected; forming a first column region of a second conductivity type in the element active portion in the semiconductor layer and a second column region of the second conductivity type in the peripheral portion in the semiconductor layer after forming the gate electrode in the first trench and the gate electrode extraction portion in the second trench, each of the first and second column regions having a columnar structure that is formed at a position deeper than the first and second trenches; forming an interlayer insulating film over the semiconductor layer, the gate electrode and the gate electrode extraction portion; forming a contact hole passing through the interlayer insulating film and protecting into the gate electrode extraction portion; forming a gate electrode plug using a conductor filled in the contact hole; and forming a gate wiring metal connected with the gate electrode plug over the interlayer insulating film.