Patent ID: 6854025
Filing Date: 2005-02-08
Classification: G06F

Abstract:
1. A method for scheduling at least one data transfer for a plurality of input/output (I/O) devices, each I/O device having a direct memory access (DMA) controller and being associated with one or more network ports, the method comprising the steps of: polling, from a device interface, the plurality of I/O devices to receive status inputs from the I/O devices; selecting an I/O device to be serviced based at least in part on the status inputs; storing a first identifier associated with the selected I/O device in a first register of the device interface; accessing, at a processor, the first identifier from the first register of the device interface; selecting a handler routine from a plurality of handler routines based at least in part on the first identifier; and executing the selected handler routine at the processor to process a data transfer with the selected I/O device or DMA controller.