Patent ID: 7109076
Filing Date: 2006-09-19
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor integrated circuit device, which forms an n-channel type MISFET and a p-channel type MISFET over a semiconductor substrate, the method comprising the steps of: (a) forming a gate dielectric film over a main surface of said semiconductor substrate, and thereafter forming a silicon film over said gate dielectric film; (b) introducing a plurality of kinds of impurities into said silicon film, and thereby defining one portion of said silicon film as a n-type silicon film and the other portion as a p-type silicon film; (c) forming, above each of said n-type silicon film and said p-type silicon film, a conductive film containing tungsten or tungsten silicide as a main component; (d) patterning said conductive film, said n-type silicon film, and said p-type silicon film after said step (c), and thereby forming a gate electrode of n-channel type MISFET, which is composed of a laminated film of said n-type silicon film and said conductive film, and forming a gate electrode of p-channel type MISFET, which is composed of a laminated film of said p-type silicon film and said conductive film; and (e) performing a heat treatment of said semiconductor substrate at a temperature of 700° C or higher after said step (d); wherein a circuit formed over the semiconductor substrate includes a memory array, a sense amplifier disposed at a periphery of said memory array, and a sub word driver, and further includes a DRAM provided with a memory array associate circuit for directly controlling said memory array and a peripheral circuit for controlling said memory array associate circuit, the memory array of said DRAM has a memory cell including a said n-channel type MISFET and a capacitor, and the peripheral circuit of said DRAM includes a said n-channel type MISFET and a said p-channel type MISFET.