Patent ID: 9048318
Filing Date: 2015-06-02
Classification: H01L

Abstract:
1. A semiconductor device comprising: a p-type fin field effect transistor located in a first device region, wherein the p-type fin field effect transistor includes a first fin structure comprised of a germanium containing material and has a bottommost surface in direct physical contact with a first portion of a topmost surface of an insulator layer; and an n-type fin field effect transistor located in a second device region, wherein the n-type fin field effect transistor includes a second fin structure comprised of III-V semiconductor material and has a bottommost surface in direct physical contact with a second portion of the topmost surface of the insulator layer, wherein the second fin structure has a different shape than the first fin structure and has a first sidewall surface that is entirely perpendicular to the topmost surface of the insulator layer, and a second sidewall surface that has a lower portion that is entirely perpendicular to the topmost surface of the insulator layer and an upper portion that is not perpendicular to the topmost surface of the insulator layer, wherein a high-k gate dielectric of said n-type field effect transistor is in direct physical contact with an entirety of the first sidewall surface and the second sidewall surface of said second fin structure.