Patent ID: 9023715
Filing Date: 2015-05-05
Classification: H01L

Abstract:
1. A method of forming a FinFET device comprised of a gate structure, the method comprising: forming a plurality of trenches in a semiconducting substrate to thereby define a plurality of spaced-apart fins in a semiconducting substrate, each of said trenches having a bottom surface; forming a doped liner layer of insulating material on said fins and on the entire bottom surface of said trenches; forming an undoped layer of insulating material above said doped liner layer such that said undoped layer of insulating material overfills said trenches and is positioned between said fins, wherein said undoped layer of insulating material has an upper surface that is positioned at a level that is above a level of an upper surface of said fins and above an upper surface of said doped liner layer; performing at least one recess etching process to consume a portion of said doped liner layer and a portion of said undoped layer of insulating material to thereby define a recessed doped liner layer of insulating material and a recessed undoped layer of insulating material said recessed doped liner layer covering the entire bottom surface of said trenches and having a recessed upper surface that is positioned at a level that is below a level of the upper surface of each of said fins, wherein an exposed portion of each of said fins extends above said recessed upper surface of said recessed doped liner layer of insulating material while a covered portion of each of said fins is positioned below said recessed upper surface of said recessed doped liner layer of insulating material; forming said gate structure comprised of a gate insulation layer and a gate electrode around said exposed portions of each of said fins and above said recessed doped liner layer of insulating material positioned on the entire bottom surface of said trenches and said recessed undoped layer of insulating material; and at some point after forming said recessed doped liner layer of insulating material, performing at least one process operation to heat at least said recessed doped liner layer of insulating material to cause a dopant material in said recessed doped liner layer of insulating material to migrate from said recessed doped liner layer of insulating material into said covered portions of said fins and thereby define a doped region in said covered portions of said fins that is positioned under said exposed portions of said fins.