Patent ID: 7285453
Filing Date: 2007-10-23
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device with a triple well structure, the method comprising: defining a substrate of first conductive type to include a first conductive type MOS section, a second conductive type MOS section and a triple well section; performing a first ion implantation process to form a deep buried well of the second conductive type in the substrate of the triple well section; performing a second ion implantation process to form a first well of the first conductive type over the deep buried well of the second conductive type in the substrate of the triple well section; performing a third ion implantation process to form a well ring of the second conductive type surrounding the first well of the first conductive type and to form a well of the second conductive type in the substrate of the first conductive type MOS section, simultaneously; and performing a fourth ion implantation process to form a well ring of the first conductive type between the first well of the first conductive type and the well ring of the second conductive type in the triple well section and to form a second well of the first conductive type in the substrate of the second conductive type MOS section.