Patent ID: 6717910
Filing Date: 2004-04-06
Classification: H04L

Abstract:
A method for controlling flow of network data arranged in frames and minimizing congestion, comprising the steps of:generating a status error indicator within a FIFO memory of a network device indicative of a frame overflow within the FIFO memory; in response to the status error indicator setting early congestion notification bits within an interrupt register of a direct memory access unit from control signals generated by a communications processor, and generating an early congestion interrupt to a host processor indicative that a frame overflow has occurred within the FIFO memory; generating instructions from the host processor to the FIFO memory for discarding the incoming frame that has caused the frame overflow within the FIFO memory; and enhancing the servicing of frames received within the FIFO memory by one of either increasing the number of words of a direct memory access (DMA) unit burst size or modifying the time-slice of other active processes.