Patent ID: 7253033
Filing Date: 2007-08-07
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming a gate oxide film in an SOI layer element formation region; forming a gate on the gate oxide film; forming at least one sidewall spacer on a side of the gate; forming a channel formation portion having a first impurity concentration; forming an extension region in the channel formation portion having a second impurity concentration; and performing ion implantation at a predetermined angle relative to a central axis of the gate from multiple directions to form a high concentration region that is disposed substantially beneath the gate between the extension region and a central portion of the channel formation portion, the high concentration region having an impurity concentration higher than that of the central portion of the channel formation portion, and the high concentration region having a width that is substantially constant independent of a length of the gate, the high concentration region width and gate length being along the same direction; and forming another gate in a substrate, on an opposite side to said gate, with said SOI layer interposed.