Patent ID: 6576402
Filing Date: 2003-06-10
Classification: H05K,Y10S

Abstract:
A method for producing wiring configurations, which comprises the steps of:providing an electrically insulating substrate; applying a metal layer to the electrically insulating substrate; applying an etching resist to the metal layer; applying a photoresist to the etching resist; patterning the photoresist using photolithography such that a pattern of coarse conductor structures and a region of fine conductor structures are covered; removing the etching resist in regions not covered by the photoresist; removing the photoresist; patterning the etching resist with a laser beam such that it has a pattern of the fine conductor structures; and etching away those regions of the metal layer which are not protected by the etching resist as far as a surface of the electrically insulating substrate in a common etching process to form the coarse conductor structures and the fine conductor structures.