Patent ID: 8095104
Filing Date: 2012-01-10
Classification: G06F,G06K,H03K

Abstract:
1. A semiconductor device comprising: an antenna circuit for receiving a wireless signal; a power supply circuit generating a power by the wireless signal received by the antenna circuit; and a clock generation circuit to which the power is supplied, wherein the clock generation circuit includes a ring oscillator for generating a self-oscillating signal of a constant period, and a frequency divider for frequency-dividing the self-oscillating signal, wherein the ring oscillator generates the self-oscillating signal by the power supplied from the power supply circuit, wherein the ring oscillator comprises at least a first stage and a second stage, wherein each of the first stage and the second stage comprises an input terminal, an output terminal, a first transistor, a second transistor, a third transistor and a fourth transistor, wherein a gate of the first transistor and a gate of the second transistor are electrically connected to the input terminal, wherein a first terminal of the first transistor, a first terminal of the second transistor, a gate of the third transistor, and a gate of the fourth transistor are electrically connected to the output terminal, wherein a source or drain terminal of the third transistor and a source or drain terminal of the fourth transistor are configured to be applied a controlled voltage, wherein the output terminal of the first stage is electrically connected to the input terminal of the second stage, wherein the frequency divider is connected to the ring oscillator in series, and wherein a clock signal is output from an output terminal of the frequency divider.