Patent ID: 6201405
Filing Date: 2001-03-13
Classification: H03K,H04L

Abstract:
Output buffer circuit for driving a transmission line (7) in accordance with data to be transmitted, the circuit comprising:a switch stage (1) having an input port (1H, 1L), a control terminal (4) for receiving a digital input signal (IN) in accordance with data to be transmitted, and an output port for connection to said transmission line (7);said switch stage (1) comprising switches (11 to 14) adapted for connecting said output port (OP, ON) with said input port (1H, 1L) in accordance with said digital input signal (IN);impedance means (15, 16) connected to said switch stage (1) and having an impedance control input (C1, C2), an impedance of said impedance means (15, 16) being adjustable in accordance with a control signal applied to said impedance control input (C1, C2);means (3) for controlling an output impedance of the output port of the switch stage (1) by adjusting of the impedance of said impedance means (15, 16) in accordance with a deviation of a detected output impedance from a desired impedance value;a selector circuit (2) for selectively connecting said output port (OP, ON) of said switch stage (1) with a detection input of said means for controlling (3); andsaid selector circuit (2) being connected to receive a selection control signal having a fixed timing relationship with said digital input signal (IN).