Patent ID: 6750104
Filing Date: 2004-06-15
Classification: H01L

Abstract:
A method of forming a power semiconductor device comprising the steps of:A. providing a substrate of a first or second conductivity type; B. forming a voltage sustaining region on said substrate by: a. depositing an epitaxial layer on the substrate, said epitaxial layer having a first conductivity type; b. etching at least one trench in the epitaxial layer with an etchant gas having a dopant species of the second conductivity type to form a doped surface layer in a portion of the epitaxial layer defining the trench walls; c. diffusing further into the epitaxial layer the dopant species located in said doped surface layer to form a doped epitaxial region adjacent to the trench and in the epitaxial layer; d. depositing a filler material in said trench to substantially fill said trench; and C. forming over said voltage sustaining region at least one region of said second conductivity type to define a junction therebetween.