Patent ID: 6657134
Filing Date: 2003-12-02
Classification: H01L,H05K,Y02P

Abstract:
A ball grid array mounted circuit comprising:a flexible stress relief substrate having a top surface and a bottom surface; spaced conductive vias extending between the top surface and said bottom surface; connection pads it said top surface with each connection pad capturing at least one of said vias; connection pads at said bottom surface connected by said conductive vias with said connection pads at said top surface; an electronic component having a first thermal coefficient of expansion (TCE) and having connection pads larger than and spaced to substantially align with said connection pads at said top surface; first solder connections formed from solder balls between said connection pads at said top surface and said component connection pads; a printed circuit board (PCB) having a second TCE and having connection pads larger than and spaced to substantially align with said connection at said bottom surface; second solder connections formed from solder balls between said connection pads at said bottom surface and said PCB connection pads, wherein said first solder connections have a smaller cross section at said pads at said top surface than at said component connection pads and said second solder connections have a smaller cross section at said pads at said bottom surface than at said PCB connection pads to absorb at least a portion of the stress due to differences between said first TCE and said second TCE.