Patent ID: 7219318
Filing Date: 2007-05-15
Classification: G06F

Abstract:
1. A system for verifying a layout of traces on a motherboard, the system comprising a computer and a database connected to the computer, wherein: the database comprises: a standard layout data storage for storing preset standard layout data on segments of the traces and a preset standard length for each of the traces; and an actual layout data storage for storing actual layout data on the segments of the traces; and the computer comprises: a substandard layout area creating module for creating substandard areas according to the standard layout data on the segments of the traces and split planes next to the traces; a substandard segment data obtaining module for obtaining actual layout data on substandard segments from the actual layout data storage, wherein the substandard segments are placed in the substandard areas; a substandard length calculating module for calculating a length for each substandard segment of each of the traces according to actual start coordinate values and end coordinate values of the substandard segments, and calculating a total length of the substandard segments of the trace by adding up all the lengths of the substandard segments; and a satisfactory trace determining module for determining whether each of the traces is satisfactory by comparing the total length of the substandard segments of the trace with the preset standard length for the trace.