Patent ID: 7259053
Filing Date: 2007-08-21
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device comprising: forming a p-type well and an n-type well in a semiconductor substrate; sequentially depositing a gate insulating layer and a gate electrode material layer; depositing a protective layer on the gate electrode material layer; removing a portion of the gate insulating layer, the gate electrode material layer, and the protective layer to form a gate electrode; forming an ion implantation mask on the protective layer to expose a surface area of the semiconductor substrate; implanting ions into the exposed surface area of the semiconductor substrate using the ion implantation mask; performing a first heat treatment process to form a device isolation layer; performing a second heat treatment process to form a device isolation oxide layer on the device isolation layer; forming an LDD region by implanting low concentration impurity ions into the semiconductor substrate; forming a spacer on a sidewall of the gate electrode; and implanting high concentration impurity ions into the semiconductor substrate to form a source/drain region in the semiconductor substrate.