Patent ID: 6277670
Filing Date: 2001-08-21
Classification: H01L

Abstract:
A method for making a semiconductor package, comprising:forming a passivation film on a first surface of a wafer such that a plurality of chip pads of the wafer are exposed;forming a metal layer on the passivation film;forming a patterned photoresist layer on the metal layer, etching the metal layer by using the photoresist layer as a mask, stripping the photoresist layer and forming a plurality of patterned metal wirings conductively coupled to the plurality of chip pads;printing a solder paste on each one of the plurality of metal wirings, mounting a solder ball, performing an infrared reflow process, removing a remaining solder paste, and attaching the solder ball serving as an external ball to each one of the plurality of metal wirings;forming a molding resin layer on the wafer and the metal wiring by performing a first molding process with a resin such that an upper portion of the solder ball is exposed;carrying out a foil mounting on a second surface of the wafer; andcutting the wafer into a chip package.