Patent ID: 8390347
Filing Date: 2013-03-05
Classification: H03L

Abstract:
1. A phase locked loop for generating an oscillator signal, comprising: a phase to digital converter for receiving a reference clock and a feedback clock, and generating a digital output signal of a phase difference between the reference clock and the feedback clock, wherein the phase to digital converter operates on a first edge of the reference clock, and wherein the phase difference digital output signal includes a sign bit and a magnitude portion; a digital filter, connected to the phase to digital converter, for receiving the phase difference digital output signal and generating an oscillator control signal, wherein the digital filter operates on a second edge of the reference clock that is different from the first edge; a controlled oscillator, connected to the digital filter, for generating the oscillator signal, wherein a frequency of the oscillator signal is controlled using the oscillator control signal; and a loop divider, connected to the controlled oscillator, for receiving and dividing the oscillator signal to generate the feedback clock, wherein the phase to digital converter provides the phase difference digital output signal in a single clock period of the reference clock, and wherein the phase to digital converter comprises: