Patent ID: 6722376
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A method used to form a semiconductor device, comprising:providing a semiconductor wafer substrate assembly having a planarized wafer surface and at least first and second features in spaced relation to each other which define a region comprising an opening between said first and second features; forming a conductive layer over said first and second features and within said opening; providing a patterned mask layer over said conductive layer, said patterned mask layer having an opening therein which exposes said region between said first and second features; etching said conductive layer within said opening between said first and second features using a continuous etch comprising: a first etch which erodes said conductive layer with ions traveling in a first direction substantially perpendicular with a plane of said planarized wafer surface and leaves conductive stringers between said first and second features subsequent to said first etch; then a second etch which electrically charges said ions to bend said charged ions into said stringers in a second direction which is less perpendicular with said plane of said planarized wafer surface than said first direction and removes said conductive stringers remaining between said first and second features.