Patent ID: 7425673
Filing Date: 2008-09-16
Classification: G10H

Abstract:
1. A tone output device that has internal memory storing tone data and a control program for reading of the tone data, and that reads and converts the tone data into an analog tone signal, the tone output device comprising: a clock oscillator operable to generate a reference clock by using a crystal resonator; a multiplication circuit operable to generate a multiplied clock by multiplying the reference clock; a control circuit including an internal buffer and operable to store the tone data from the memory into the buffer and transfer the tone data stored in the buffer, the tone data storing being performed in sync with a signal based on the multiplied clock and the tone data transfer being performed in accordance with predetermined timing; a CPU operable, in sync with a signal based on the multiplied clock, to execute the control program stored in the memory so as to cause the control circuit to perform the tone data transfer; a DA converter operable, in sync with a clock signal based on the reference clock, to convert the transferred tone data into an analog tone signal and output the analog tone signal, and a data bus that is connected to the memory, the control circuit, and the CPU, and via which the tone data is transferred to the control circuit and the control program is transferred to the CPU, wherein the control by the CPU includes arbitration of a right to use the data bus, wherein the control circuit includes: wherein upon receipt of the read signal from the output instruction circuit, the memory is operable to output the tone data stored at the address to the data bus; wherein the tone data is composed of a plurality of pieces of sampling data each of which is compressed at a predetermined compression rate, wherein the buffer included in the data control circuit is composed of a first buffer area for storing the tone data that is output from the data bus and a second buffer area for saving tone data, the tone output device being operable to (i) store a size of each piece of compressed sampling data and (ii) issue a compression rate signal indicative of the data size to the data control circuit, wherein the data control circuit is operable to transfer, sequentially in units of the data size indicated by the compression rate signal, the tone data stored in the first buffer area, and wherein if tone data smaller than the data size indicated by the compression rate signal remains in the first buffer area as a result of the tone data transfer, the data control circuit is operable to (i) store the remaining tone data into the second buffer area and (ii) transfer the remaining tone data with a portion of tone data newly stored into the first buffer area, the remaining tone data and the portion of newly stored data amounting to the data size indicated by the compression rate signal.