Patent ID: 7060550
Filing Date: 2006-06-13
Classification: H01L

Abstract:
1. A method for fabricating a bipolar junction transistor on a semiconductor wafer including a doping region of a first conductivity type and a plurality of isolated structures positioned on both ends of the doping region, the method comprising: forming a protection layer on the semiconductor wafer, and removing portions of the protection layer to expose portions of the doping region; forming a doping layer of a second conductivity type on the protection layer and the exposed doping region, and removing portions of the doping layer and portions of the protection layer to define a base electrode region; depositing an isolation layer on the semiconductor wafer, and removing portions of the isolation layer to form at least a collector electrode opening and at least an emitter electrode opening; forming a polysilicon layer in the collector electrode opening and the emitter electrode opening; removing the isolation layer, and forming a spacer structure at a side wall of the polysilicon layer and the doping layer; and performing a self-aligned silicidation process to form a silicide layer on surfaces of the polysilicon layer and portions of the doping layer to be a contact region of the bipolar junction transistor.