Patent ID: 7705664
Filing Date: 2010-04-27
Classification: G05F

Abstract:
1. A circuit for providing an output current at an output, comprising: an output transistor having a control node configured to receive a bias voltage and further having first and second nodes, the output transistor operable to conduct current between the first node and the second node in accordance with the bias voltage; and a clamp circuit coupled to the output transistor and configured to clamp a voltage across the first and second nodes of the output transistor, the clamp circuit having a bias circuit coupled to the second node and further having a bias current source configured to provide a bias current, the bias current source having a first current source field-effect transistor (FET) coupled to the bias circuit, a second current source FET having a gate coupled to the control node of the output transistor, and an n-channel diode-coupled FET matched to the first current source FET and having a gate coupled to a drain of the second current source FET and further coupled to a gate of the first current source FET, the bias circuit configured to provide a clamp voltage to the second node in accordance with the bias current.