Patent ID: 6211556
Filing Date: 2001-04-03
Classification: H01L

Abstract:
A transistor having transistor on a semiconductor substrate, said transistor comprising:a gate insulator over a portion of said substrate;a gate electrode over said gate insulator;a gate sidewall structure on sidewalls of said gate electrode;a lightly doped source/drain region in said substrate under said gate sidewall structure;a doped source/drain region in said substrate abutting said lightly doped source/drain region, said doped source/drain region located aside from a region under said gate insulator;a doped buried contact region in said substrate next to said doped source/drain region;a silicon connection on a portion of said doped buried contact region; anda shielding block on said doped buried contact region covering only a region uncovered by said silicon connection, said shielding block comprising dielectric sidewalls and silicon sidewalls, said shielding block being formed next to an edge of said silicon connection.