Patent ID: 6291296
Filing Date: 2001-09-18
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device on a semiconductor substrate, comprising the steps of:forming a multi-layer structure on an active region on the semiconductor substrate;forming a source region and a drain region on said active region adjacent said sidewall spacers;forming sidewall spacers around said multi-layer structure;forming a dielectric layer over the semiconductor substrate, including said multi-layer structure, said sidewall spacers, said source region and said drain region, said dielectric layer having a top surface;forming an anti-reflective coating layer over said dielectric layer;forming a masking layer over said anti-reflective coating layer;patterning said masking layer to form a contact mask;forming a first opening and a second opening in said dielectric layer through said anti-reflective coating layer using said contact mask as a mask, said first opening exposes a portion of said source region and said second opening exposes a portion of said drain region; andremoving said anti-reflective coating layer using selective plasma etch to etch said anti-reflective coating layer with reactive ions at a rate which is significantly faster than the etch rates of said dielectric layer, said source region, and said drain region.