Patent ID: 6452261
Filing Date: 2002-09-17
Classification: H01L

Abstract:
A flat-type semiconductor device housing a plurality of parallel-disposed semiconductor chips, each having a primary main electrode and a control electrode on a primary main surface side of each semiconductor chip and a secondary main electrode on a secondary main surface side thereof, in a flat package having a pair of externally-exposed common electrodes and an insulating cylinder insulating between the pair of common electrodes,wherein intermediate electrodes, which are electrically conductive and thermally radiative, are respectively provided at least at the primary main surface side of each semiconductor chip between the primary main electrode and one of the common electrodes, and at the secondary main surface side of each semiconductor chip, between the secondary main electrode and the other of the common electrodes; wherein the intermediate electrodes and the respective primary and secondary main electrode of the semiconductor chip are bonded to one another; and wherein a control electrode wire led out from a control electrode of each semiconductor chip and an insulating member for insulating each control electrode wire serve to determine the position of each semiconductor chip.