Patent ID: 6887747
Filing Date: 2005-05-03
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device comprising the steps of: forming an interlayer insulating film on a silicon substrate; selectively removing said interlayer insulating film between source and drain forming regions of a MISFET, to forming a gate trench; forming a side wall insulating film on a side wall of said gate trench; exposing said silicon substrate on a bottom surface of said gate trench, and forming a gate insulating film on the exposed surface of the silicon substrate; burying/forming a gate electrode in said trench; selectively etching said interlayer insulating film of the source and drain forming regions of said MISFET, to forming a source/drain trench with a surface of said silicon substrate exposed in a bottom portion thereof burying/forming a metal film in said source/drain trench, to forming a source electrode and a drain electrode; and forming a source and a drain, composed of a silicide film, to be Schottky junctioned to the silicon substrate, the silicide film being formed by reacting said silicon substrate with said source electrode and the drain electrode.