Patent ID: 7639765
Filing Date: 2009-12-29
Classification: H04L

Abstract:
1. A bidirectional communication apparatus which is used while being connected to a single bidirectional signal line and a controller for a software process, comprising: an input synchronizing circuit for synchronizing an input signal from the single bidirectional signal line based on a drive clock into a synchronized input signal; a trigger pulse generating circuit for generating a transmission request trigger pulse signal based on a transmission request from the controller; a state determining circuit for determining an operating state of the bidirectional communication apparatus to supply a state signal; a transmission control circuit for supplying a transmission data output edge generating pulse signal to control generation of a transmission waveform in accordance with a transmission data setting from the controller, based on the state signal which is changed to indicate a transmission state in accordance with the transmission request trigger pulse signal; a data output circuit for generating a waveform of an output signal to the single bidirectional signal line in accordance with the transmission data output edge generating pulse signal; an arbitration monitoring circuit for performing arbitration monitoring of a signal on the single bidirectional signal line during transmission; a reception start detecting circuit for supplying a start detection signal when the start of reception is recognized based on the synchronized input signal; a waveform timing check circuit for supplying a reception sampling pulse signal, and checking timing of a reception waveform of the synchronized input signal in response to the state signal which is changed to indicate a reception state in accordance with the start detection signal; a reception control circuit for controlling data sampling of the synchronized input signal in accordance with the reception sampling pulse signal, and decoding of a reception address; a forced LOW transmission control circuit for performing a control for forcedly transmitting a LOW level to the single bidirectional signal line when timing violation occurs in the synchronized input signal during reception; and an interrupt signal generating circuit for receiving an interrupt generating edge signal from each circuit and generating an interrupt signal to the controller, wherein the controller is configured to receive, as observation data, reception data and a result of decoding the reception address from the reception control circuit.