Patent ID: 6023101
Filing Date: 2000-02-08
Classification: H01L

Abstract:
A semiconductor device comprising:an interlayer insulation film provided on a substrate;an upper wiring patterned on said interlayer insulation film;a sidewall formed to a side face of said upper wiring, wherein said sidewall is formed of an insulating material; anda contact provided through said interlayer insulation film,wherein a first region of said contact is provided through said interlayer insulation film and is superposed on said upper wiring and a recess is formed in a second region of said contact which has a surface formed in a lower position than a formation position of a surface of said first region and is not superposed on said upper wiring,a part of said sidewall is buried in said recess, andsaid sidewall is formed on a step portion defined by said side face of said upper wiring layer and a surface of said interlayer insulation film.