Patent ID: 9088270
Filing Date: 2015-07-21
Classification: B41J,H02M,H03K

Abstract:
1. A capacitive load drive circuit which applies a predetermined drive signal to drive a capacitive load, comprising: a drive waveform generator which generates a drive waveform signal which becomes a reference of the drive signal, a modulator which pulse-modulates the drive waveform signal to generate a modulated signal in which a first voltage state and a second voltage state which is lower in voltage than the first voltage state are repeated; a digital power amplifier which power-amplifies the modulated signal to generate a power-amplified modulated signal; a low pass filter which smoothes the power-amplified modulated signal and generate the drive signal to be applied to the capacitive load; and a power amplification stopping section which stops operation of the digital power amplifier; a time counter which counts at least one of the elapsed time of the first voltage state and the elapsed time of the second voltage state of the modulated signal; the power amplification stopping section, while a voltage level of the drive signal is maintained to be constant, stops the operation of the digital power amplifier either at a timing when the elapsed time of the first voltage state of the modulated signal reaches a predetermined time, or at a timing when the elapsed time of the second voltage state of the modulated signal reaches a predetermined time.