Patent ID: 8044699
Filing Date: 2011-10-25
Classification: H03K

Abstract:
1. A level-shift circuit for translating a control signal to a level-shifted output signal, the level-shift circuit comprising: a pulse generator circuit for receiving the control signal and generating in response to the control signal a Set pulse and a Reset pulse; a voltage translation circuit connected to receive the Set and Reset pulses from the pulse generator circuit and to generate in response a level-translated Set pulse and a level-translated Reset pulse, wherein the level-translated Set pulse and level-translated Reset pulse are derived from a bootstrap voltage node having a voltage greater than a voltage of the Set pulse and the Reset pulse, wherein the voltage translation circuit includes: a first differential detector connected to receive the level-translated Set pulse and the level-translated Reset pulse, wherein the first differential detector generates a logic high output when a threshold voltage difference is present between the level-translated Set pulse and the level-translated Reset pulse; a second differential detector connected to receive the level-translated Reset pulse and the level-translated Set pulse, wherein the second differential detector generates a logic high output when a threshold voltage difference is present between the level-translated Reset pulse and the level-translated Set pulse; and a gate drive circuit for generating a gate drive signal based on the outputs provided by the first differential detector and the second differential detector.