Patent ID: 7344917
Filing Date: 2008-03-18
Classification: H01L

Abstract:
1. A method for packaging a stackable semiconductor device, comprising the steps of: forming a plurality of through holes in a base substrate; depositing a conductive material on at least a first side of the base substrate to form a conductive layer, wherein the conductive material at least partially fills the plurality of through holes; patterning and etching the conductive layer to form a plurality of interconnect traces and a plurality of pads; forming a plurality of conductive supports on the plurality of pads, wherein the plurality of conductive supports extends in a first, downward direction through respective ones of the plurality of through holes and in a second, upward direction above the through holes to a predetermined height that is much greater than a height of the conductive layer; electrically coupling at least one die to the plurality of pads, wherein the conductive supports extend both above and below the die; and performing a moulding operation to encapsulate the die, wherein at least one end of each conductive support is exposed.