Patent ID: 8697496
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A method of manufacturing an integrated circuit package, comprising: providing at least one lead frame having an upper surface, an oppositely disposed lower surface and at least one open space extending through the at least one leadframe from said upper surface to said lower surface; attaching an integrated circuit device to a portion of said upper surface of said at least one leadframe; applying tape to the lower surface of said at least one leadframe; placing a shunt at least partially in said open space such that it is in contact with said tape; electrically connecting said integrated circuit device to said shunt and to said at least one leadframe; encompassing at least portions of said at least one leadframe, said integrated circuit device and said shunt with a molding material; and thereafter, removing said tape from said lower surface of said at least one leadframe.