Patent ID: 7587688
Filing Date: 2009-09-08
Classification: G06F

Abstract:
1. A method of directing an optimization of a compilation process, wherein a compilation determines a configuration of a circuit to implement a user design, the method comprising: receiving, at a computer system, optimization information for a compilation, wherein the optimization information specifies at least one performance-critical portion of the user design, wherein the performance-critical portion of the user design includes logic gates, and wherein the optimization information is not based on results from a previous compilation of the user design, and wherein receiving optimization information includes receiving the optimization information from a user; determining, with the computer system, compilation settings for the design based at least in part on the optimization information, initiating a compilation of the design, wherein the compilation includes at least one compilation phase responsive to the compilation settings; and performing, with the computer system, the first and second optimizations as part of the at least one compilation phase; based on at least one result of the performed optimized compilation, obtaining a configuration of the circuit that implements the user design, wherein the configuration includes placing and routing the user design on the circuit.