Patent ID: 7884011
Filing Date: 2011-02-08
Classification: H01L

Abstract:
1. A manufacturing method for a semiconductor device, comprising the steps of: (a) forming an etching stopper film and a second interlayer insulating film in sequence on top of a first interlayer insulating film provided above a semiconductor integrated circuit formed on a semiconductor substrate; (b) forming a hole which penetrates said second interlayer insulating film and reaches said etching stopper film in a region corresponding to a portion of said second interlayer insulating film above said semiconductor integrated circuit, and forming a trench which surrounds the periphery of a region corresponding to a portion of said second interlayer insulating film above said semiconductor integrated circuit, and penetrates said second interlayer insulating film and reaches said etching stopper film; (c) forming a resin layer within said hole and said trench; (d) after said step (c), forming a resist mask having a wiring pattern where an opening is provided above said hole and covering said trench; (e) forming a wire trench by etching and removing said second interlayer insulating film to a predetermined depth using said resist mask as a mask; (f) removing said etching stopper film at the bottom of said hole and at the bottom of said trench after removing said resist mask and said resin layer within said hole and said trench; and (g) after said step (f), filling in said wire trench and said hole which are communicative connected, as well as said trench, with a conductive layer.