Patent ID: 6639453
Filing Date: 2003-10-28
Classification: G05F

Abstract:
An active bias circuit comprising:(a) a first transistor with a diode connection; the first transistor being supplied with a reference current by way of a resistor; the reference current being generated by a variable reference voltage applied to the first transistor through a first terminal and the resistor; the first transistor having a control terminal; (b) a second transistor connected in cascode to the first transistor; the second transistor having a control terminal; (c) a third transistor having a control terminal connected to the control terminal of the first transistor; a constant current flowing through the third transistor, having a specific ratio with respect to said reference current; the constant current being generated by a fixed bias voltage applied to a third transistor through a second terminal; (d) a fourth transistor with a diode connection; the fourth transistor being connected in cascode to the third transistor; the fourth transistor having a control terminal connected to the control terminal of the second transistor; (e) an output terminal formed between the third and fourth transistors connected in cascode; an output bias voltage being derived from the output terminal; the output bias voltage varying according to the variable reference voltage; and (f) a diode with a specific forward voltage drop generated by a current flowing through the diode itself, connected to at least one of said transistors, wherein the diode is connected between the third transistor and the output terminal in such a way that a forward direction of the diode and a direction of the constant current flowing through the third transistor are the same.