Patent ID: 6385680
Filing Date: 2002-05-07
Classification: G06F

Abstract:
A method for flexibly allocating I/O pins used for bus grant signals between bus controllers located on a semiconductor chip, comprising:receiving a first set of grant lines from a first bus arbitration circuit, the first set of grant lines being used to grant control of a first bus to devices on the first bus; dividing the first set of grant lines into a first subset of grant lines and a second subset of grant lines; receiving a second set of grant lines from a second bus arbitration circuit, the second set of grant lines being used to grant control of a second bus to devices on the second bus; dividing the second set of grant lines into a third subset of grant lines and a fourth subset of grant lines; selecting a plurality of outputs from between the first subset of grant lines and the third subset of grant lines; and driving the plurality of outputs off of the semiconductor chip through a first set of output pins; wherein during a first mode of operation the first subset of grant lines is selected to be driven through the first set of output pins, and during a second mode of operation the third subset of grant lines is selected to driven through the first set of output pins.