Patent ID: 8168470
Filing Date: 2012-05-01
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor device, comprising: providing a substrate; forming a via through a topside of the substrate, the via extending vertically through less than a thickness of the substrate; forming a first insulation layer over the substrate and further into the via; forming a first conductive layer over the first insulating layer and further into the via; forming a first integrated passive device (IPD) in a first region over the first conductive layer; forming a plurality of conductive pillars over the first conductive layer; mounting a first semiconductor die in a second region over the substrate, the second region being separate from the first region; forming an encapsulant around the conductive pillars and first semiconductor die; removing a portion of a back-side of the substrate, opposite the topside of the substrate, to expose the first conductive layer in the via; mounting a second semiconductor die to the back-side of the substrate, the second semiconductor die being electrically connected to the first IPD and first semiconductor die through the first conductive layer in the via; forming a second IPD over the encapsulant; and forming an interconnect structure over the second IPD.