Patent ID: 6936504
Filing Date: 2005-08-30
Classification: H01L

Abstract:
1. A method of fabricating a poly-silicon (poly-Si) thin film transistor (TFT) having back bias effects, the poly-Si TFT fabrication method comprising the steps of: (a) forming a conducting underlayer to which a back bias voltage is applied by using a conductive material on the entire surface of one side of a glass substrate; (b) forming a buffer layer by using an insulation material on the upper portion of the conducting underlayer; and (c) forming a poly-Si TFT on the upper portion of the buffer layer, the step of forming the poly-Si TFT includes the steps of: (d) forming gate, source and drain electrodes in the gate, source and drain regions, respectively, and connecting the conducting underlayer with a back bias electrode for applying a back bias voltage.