Patent ID: 6358797
Filing Date: 2002-03-19
Classification: H01L

Abstract:
A method of forming a non-volatile memory cell, said method comprising:a. forming a first dielectric layer and a first silicon layer on a semiconductor substrate; b. forming an etching stop layer on said first silicon layer; c. patterning said etching stop layer to form an opening; d. forming a dish-shaped hole by performing an isotropic etching process to partially etch said first silicon layer through said opening; e. removing said etching stop layer; f. forming a second dielectric layer to refill said dish-shaped hole; g. forming a dielectric stud by performing a planarization process to remove a portion of said second dielectric layer outside said dish-shaped hole; h. forming a floating gate with sharp corners by performing an anisotropical etching process to etch an exposed portion of said first silicon layer using said dielectric stud as an etching mask; i. removing said dielectric stud.