Patent ID: 6570252
Filing Date: 2003-05-27
Classification: H01L

Abstract:
An integrated circuit comprising:an electrically insulative layer over a silicon-containing substrate; an opening within the electrically insulative layer, the opening having a periphery defined at least in part by a bottom surface and a sidewall surface, the bottom surface comprising a portion of the silicon-containing substrate; a first layer comprising elemental Ti over the electrically insulative layer and within the opening; the first layer physically contacting the bottom surface of the opening periphery and to any extent that the first layer is along the sidewall surface of the opening periphery, the first layer is thicker along the bottom surface of the opening periphery than along the sidewall surface of the opening periphery; a second layer comprising TIN over the first layer; the second layer extending along the sidewall and bottom surfaces of the opening periphery and having a common thickness along the sidewall surface as along the bottom surface of the opening periphery; a third layer comprising elemental Ti over the second layer and within the opening; the third layer extending along the bottom surface of the opening periphery and to any extent that the third layer is along the sidewall surface of the opening periphery, the third layer is thicker along the bottom surface of the opening periphery than along the sidewall surface of the opening periphery; and an aluminum-comprising layer within the opening and over the third layer.