Patent ID: 6744839
Filing Date: 2004-06-01
Classification: H03L,H04J,H04L

Abstract:
A clock regeneration circuit for regenerating a clock signal for data demodulation of a digital modulated signal from an AM data multiplex modulated signal obtained by multiplexing the digital modulated signal and an AM modulated signal in the same frequency band and at the same time, the clock regeneration circuit comprising, carrier extracting means for extracting a carrier of the AM modulated signal from the AM data multiplex modulated signal, phase comparator means for receiving as one input the carrier extracted by said carrier extracting means, a voltage-controlled oscillator whose oscillation frequency is controlled by an output from said phase comparator means, and frequency-dividing means for frequency-dividing the oscillation frequency of said voltage-controlled oscillator and supplying a frequency-divided output to said phase comparator means as another input, wherein the oscillation output of said voltage-controlled oscillator is a clock signal synchronized with the carrier of the AM data multiplex modulated signal.