Patent ID: 6806148
Filing Date: 2004-10-19
Classification: H01L

Abstract:
A method of making an integrated circuit in a semiconductor substrate, the method comprising:forming at least two trench isolation regions in the semiconductor substrate; forming a first well between the two trench isolation regions; forming a second well between the two trench isolation regions and above the first well to define a body region; forming a first oxide layer above a first portion of the body region; forming a first dielectric layer above, the first oxide layer; forming a first polysilicon layer above said first dielectric layer, said first polysilicon layer forming a control gate of a non-volatile device; forming a second dielectric layer above the first polysilicon layer; forming a first spacer above the body region and adjacent said first polysilicon layer; forming a second oxide layer above a second portion of the body region not covered by said first spacer; forming a second polysilicon layer over the second oxide layer, the first spacer and a portion of the second dielectric layer; said second polysilicon layer forming a guiding gate of the non-volatile device; forming a second spacer above the body region to define source and drain regions of the non-volatile device; and delivering n-type implants in the defined source and drain regions of the non-volatile device.