Patent ID: 8098114
Filing Date: 2012-01-17
Classification: H01P,H03F,H03H,H04B

Abstract:
1. A matching circuit comprising: a main matching block inserted in a signal path defined between a first terminal and a second terminal to be connected to a first circuit of a fixed impedance and a second circuit of a frequency dependent impedance, respectively; N−1 series matching blocks inserted in said signal path in series between said first terminal and said main matching block, each of said series matching blocks consisting only of a transmission line of a characteristic impedance equal to said fixed impedance, where N is an integer equal to or greater than 3 and n corresponds to a number of series matching blocks; and N−1 series connections of a parallel matching block and a switch, one end of each of said N−1 series connections on the switch side being connected to said signal path at one end of a corresponding one of said N−1 series matching blocks on the first terminal side; wherein said main matching block being configured to match the frequency dependent impedance with said fixed impedance in a first frequency band when all of the switches are OFF, and a length of the n-th transmission line from the main matching block side and a reactance of said parallel matching block in the n-th series connection from the main matching block side are selected for each of n=1, . . . , N−1 such that when the switch in the n-th series connection is ON, an impedance of a combination of the main matching block and the parallel matching block in the n-th series connection seen looking into the signal path from the first terminal becomes equal to the fixed impedance in a (n+1)th frequency band which is different from said first frequency band, thereby allowing selective matching in the first to N-th different frequency bands by setting all the switches OFF or setting one of the switches ON.