Patent ID: 6222180
Filing Date: 2001-04-24
Classification: G01J,H01L

Abstract:
A method for fabricating a semiconductor device comprising:(a) providing a semiconductor wafer having a main surface defining chip areas separated by V-grooves, the chip areas defining bonding pads and three rows of photosites, wherein the photosites include inner photosites, outer photosites and bonding pads;(b) depositing a clear layer on the semiconductor wafer,(c) soft baking the semiconductor wafer;(d) exposing selective areas of the semiconductor wafer;(e) etching the clear layer covering the bonding pads and outer photosites from the semiconductor wafer;(f) hard baking the semiconductor wafer; and(g) depositing a first primary color filter layer over at least first inner photosite and first outer photosite, the first primary color filter layer transmitting a primary color.