Patent ID: 7464200
Filing Date: 2008-12-09
Classification: H04L

Abstract:
1. An output port determining apparatus for determining an output port of data, comprising: a plurality of output ports connected to networks identified by different network addresses, each network address having port information that corresponds thereto and an effective address length; an address bus comprising a plurality of address signal lines for carrying node addresses which uniquely identify specific nodes of a network as connection destinations, the address signal lines respectively corresponding to the effective address lengths; a plurality of memory devices corresponding to different effective address lengths and storing the port information that corresponds to the network addresses having the respective effective address lengths, wherein each memory device is connected to as many of the address signal lines as the effective address length corresponding thereto; an address register placing a specified node address having a network address included therein on the address signal lines; a selecting circuit selecting one of the memory devices that has a largest number of address signal lines connected thereto that correspond to the network address included in the node address, and outputting the port information stored in the selected memory device; and wherein the address signal lines connected to each successive different memory device carry a most significant bit and a successively increasing number of less significant bits of the node address.