Patent ID: 7441060
Filing Date: 2008-10-21
Classification: G06F

Abstract:
1. A method for providing a service interface to a memory subsystem, the method comprising: receiving an input signal at a slave service interface module in a cascaded interconnect system that includes a master service interface module for generating input signals and one or more slave service interface modules that are cascade interconnected by a bidirectional data wire and a clock wire of a service interface bus, each slave service interface module integrated on a corresponding memory module in a memory system that comprises one or more memory modules and a memory controller cascade interconnected by one or more memory busses for transmitting memory commands and memory data, wherein the service interface bus operates independently of and is physically separate from the memory busses, thereby providing a dedicated service interface to the memory system; transmitting the input signal via the service interface bus in response to the receiving; and providing a service to the memory module in response to the input signal.