Patent ID: 7522248
Filing Date: 2009-04-21
Classification: G02F

Abstract:
1. A thin film transistor array substrate, comprising: a substrate, having a pixel region and a peripheral circuit region surrounding the pixel region; a thin film transistor array, disposed in the pixel region, the thin film transistor array including a first conductive layer and a second conductive layer; a plurality of first lines, disposed in the peripheral circuit region, the first lines being on the same layer of the first conductive layer; a plurality of second lines, disposed in the peripheral circuit region, the second lines being on the same layer of the second conductive layer; a plurality of first shield lines, disposed in the peripheral circuit region, the first shield lines being between and overlapped with the second lines for preventing lights pass through gaps between the second lines; and a first connection line comprising a first outer connection line, a first inner connection line and a plurality of first connection parts, the first outer connection line electrically connecting one end of each first shield line through one of the first connection parts, the first inner connection line electrically connecting the other end of each first shield line through one of the first connection parts, the first shield lines and the first connection line being on the same layer of the first conductive layer; wherein the first connection parts have widths smaller than gaps between the second lines.