Patent ID: 7562190
Filing Date: 2009-07-14
Classification: G06F

Abstract:
1. A method of performing operations in a computer system, comprising: receiving, from a first processor comprising an on-chip cache memory, a first read request for a data item stored in a physical memory; writing the data item to the on-chip cache memory and to a first off-chip cache memory, wherein the first off-chip cache memory overlaps a first corner of the first processor and communicates with the first processor using proximity communication; receiving, from a second processor, a second read request for the data item; receiving, at the second processor, a plurality of responses from the first off-chip cache memory and the on-chip cache memory, wherein each of the plurality of responses comprises the data item; accepting, at the second processor, a first response of the plurality of responses; and discarding, at the second processor, a second response of the plurality of responses, wherein the first off-chip cache memory extends past a perimeter of the first processor and further overlaps a first corner of a third processor, a second off-chip cache memory overlaps a second corner of the first processor, a third off-chip cache memory overlaps a third corner of the first processor, and a fourth off-chip cache memory overlaps a fourth corner of the first processor in the computer system, and wherein the second off-chip cache memory, the third off-chip cache memory, and the fourth off-chip cache memory communicate with the first processor using proximity communication.