Patent ID: 8633096
Filing Date: 2014-01-21
Classification: H01L

Abstract:
1. A method of forming a transistor device, the method comprising: implanting a diffusion inhibiting species in a semiconductor-on-insulator substrate comprising a bulk substrate, a buried insulator layer, and a semiconductor-on-insulator layer, the semiconductor-on-insulator substrate having one or more gate structures formed thereon such that the diffusion inhibiting species passes through the one or more gate structures and becomes disposed in portions of the semiconductor-on-insulator layer directly below the one or more gate structures, corresponding to a channel region, and wherein the diffusion inhibiting species also passes through the semiconductor-on-insulator layer in regions where the one or more gate structures are not present, and becomes disposed in portions of the buried insulator layer below source and drain regions, the source and drain regions being located in the semiconductor-on-insulator layer adjacent the channel region; introducing a transistor dopant species in the source and drain regions; and performing an anneal so as to diffuse the transistor dopant species in a substantially vertical direction, wherein the diffusion inhibiting species substantially prevents lateral diffusion of the transistor dopant species into the channel region.