Patent ID: 6505313
Filing Date: 2003-01-07
Classification: G11C

Abstract:
A device which comprises:a reconfigurable component having redundant portions; a built-in self-test (BIST) unit coupled to the reconfigurable component and configured to test the reconfigurable component to identify faulty portions of the reconfigurable component; and a built-in self-repair (BISR) unit configured to store identifiers of the faulty portions and coupled to the reconfigurable component to configure the redundant portions to operate in lieu of the faulty portions, wherein the BIST unit is further configured to retest the reconfigurable component anew to identify faulty portions of the reconfigurable component at a subsequent time, wherein the BISR unit is further configured to receive subsequent identifiers of the faulty portions, and wherein the BISR unit is configured to compare the subsequent identifiers to the stored identifiers to identify any discrepancies; wherein said subsequent identifiers are stored by the BISR unit in a shift chain, and wherein the BISR unit is configurable to serially shift the contents of the shift chain to one or more external pins for off-chip examination; and wherein the stored identifiers are addresses stored in reserve latches, and wherein the subsequent identifiers are addresses stored in address latches, and the BISR unit includes logical XOR gates that perform bit-wise comparisons between the contents of the reserve and address latches to provide corresponding match signals to a detector that detects simultaneous assertion of all said match signals.