Patent ID: 8861631
Filing Date: 2014-10-14
Classification: H04L

Abstract:
1. A receiver apparatus for a communication system using four transmitting antennas and two receiving antennas, comprising a processor configured to: determine whether or not, in a pilot pattern in which a pilot symbol is arranged at a different location in a frequency-time matrix with respect to each of the transmitting antennas, an error of a channel estimation value at the pilot symbol location in a frequency direction is smaller than an error in a time direction for predetermined two of the transmitting antennas, the channel estimation value being calculated by multiplying a received signal by the pilot symbol; perform an interpolation in the frequency direction on the channel estimation value at the pilot symbol location to calculate a channel estimation value having a 3-subcarrier interval if the error in the frequency direction is determined to be smaller than the error in the time direction; and perform an interpolation in the time direction on the channel estimation value at the pilot symbol location to calculate a channel estimation value having a 3-subcarrier interval if the error in the frequency direction is not determined to be smaller than the error in the time direction.