Patent ID: 7268049
Filing Date: 2007-09-11
Classification: H01L

Abstract:
1. A method of forming a semiconducting device comprising: providing a layered structure comprising a substrate, a low diffusivity layer of a first conductivity type dopant atop said substrate, and a channel layer atop said low diffusivity layer of said first conductivity type dopant, wherein said low diffusivity layer of said first conductivity type dopant comprises Si forming a gate region atop a protected surface of said channel layer of said layered structure; etching said layered structure selective to said gate region to expose a surface of said substrate, where a remaining portion of said low diffusivity layer of said first conductivity type dopant provides a retrograded island substantially aligned with said gate stack having a first dopant concentration to reduce short-channel effects without increasing device leakage; growing a Si-containing material atop said recessed surface of said substrate; forming offset spacers abutting said gate region; and doping said Si-containing material with a second conductivity type dopant at a second dopant concentration.