Patent ID: 7408418
Filing Date: 2008-08-05
Classification: H03L

Abstract:
1. Phase locked loop circuit comprising a phase detector having a first input for receiving a first frequency signal and an output, a first filter adapted to filter the output electric signal of said phase detector, a voltage controlled oscillator adapted to generate a second frequency signal in response to the output filtered signal of said phase detector, said phase detector having a second input for receiving said second frequency signal and being adapted to compare it with said first frequency signal, further comprising means adapted to amplify the difference between an electric signal coupled with the output of the phase detector and a reference electric signal and a second filter adapted to receive the output electric signal of said amplification means and to send an output electric signal to said voltage controlled oscillator, said circuit comprising further means adapted to modify the value of the electric signal in input to said second filter to decrease the response time of said second filter.