Patent ID: 6833323
Filing Date: 2004-12-21
Classification: H01L

Abstract:
A method for preventing peeling of a metal layer formed over a semiconductor wafer process surface during a chemical mechanical polishing (CMP) process comprising the steps of:providing a semiconductor wafer having a process surface comprising a periphery portion and a central portion said central portion comprising active areas having semiconductor device features formed therein the process surface including a dielectric insulating layer; forming a plurality of dummy via openings having a diameter in the periphery portion through a thickness portion of the dielectric insulating layer in closed communication with the dielectric insulating layer; blanket depositing a metal layer to cover the process surface including the periphery portion to include filling the plurality of dummy via openings to form a plurality of dummy vias to anchor the metal layer; and, performing a CMP process to remove at least a portion of the metal layer from the process surface.