Patent ID: 6261897
Filing Date: 2001-07-17
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having a semiconductor substrate, comprising the steps of:forming MOS transistors on the semiconductor substrate, each of the MOS transistors including impurity diffusion regions and a gate electrode, the impurity diffusion regions serving as source and drain regions;depositing a first interlayer insulating film over the MOS transistors;opening contact holes in the first interlayer insulating film so as to reach the impurity diffusion regions;depositing a conductor on an entire surface of the semiconductor substrate;etching back the deposited conductor in order to form contact plugs only in the contact holes;forming pad portions only on the contact plugs by the use of a selective growth method; andforming a capacitor over the semiconductor substrate so as to be connected to the pad potions via capacitor contacts.