Patent ID: 6815775
Filing Date: 2004-11-09
Classification: H01L

Abstract:
A semiconductor structure for electrostatic discharge (ESD) protection of a metal oxide semiconductor (MOS) integrated circuit comprising:a substrate of a first conductivity type forming a base for said semiconductor structure; a first region of a second conductivity type within said substrate for forming a drain of a first MOS transistor; a second region of the second conductivity type within said substrate for forming a source of the first MOS transistor; a third region of the second conductivity type within said substrate for forming a source of a second MOS transistor, wherein a fourth region of the first conductivity type is disposed between the second region of said first MOS transistor and the third region of said second MOS transistor for surrounding said first MOS transistor with an additional pick up diffusion to restrain the turn on of said first MOS transistor, and wherein the channel length of said first MOS transistor is longer than the channel length of said second MOS transistor to increase the drain base voltage of said first MOS transistor.