Patent ID: 6836757
Filing Date: 2004-12-28
Classification: G06F

Abstract:
A method for emulation communications via a test data input port and boundary-scan architecture providing serial access to a serial connection of a plurality of registers disposed in a plurality of modules, each of the plurality of modules including at least one of the plurality of registers, comprising the steps of:selecting for communication one of said plurality of modules, nonselected modules being nonresponsive to data on said serial connection; supplying to the test data input port for communication to the boundary-scan architecture a serial signal having a number of bits greater in number than a number of bits of the serial connection of the plurality of registers, each bit of said serial signal having a first digital state; following supply of said serial signal, supplying to the test data input port for communication to the boundary-scan architecture a single start bit having a second digital state opposite to said first digital state followed by a predetermined number of data bits; at said selected module detecting said single start bit within the boundary-scan architecture and storing said predetermined number of data bits.