Patent ID: 6566942
Filing Date: 2003-05-20
Classification: H03F

Abstract:
A multistage amplifier circuit comprising:n chopper amplifiers arranged from a first stage to an n-th stage for sequentially amplifying an input signal, each chopper amplifier including: first and second signal paths, a first capacitor and a first switch in said first signal path, a second capacitor and a second switch in said second signal path, and an operational amplifier common to said first and second signal paths; and m (where mthird and fourth signal paths, third and fourth switches in said third and fourth signal paths, respectively, and a fifth switch that connects and disconnects said third and fourth signal paths, wherein one of said coupler/isolators is disposed between an (iâˆ’1)-th stage chopper amplifier and an i-th stage chopper amplifier, that are disposed between said first-stage and n-th stage chopper amplifiers, and said coupler/isolator alternatively couples and isolates said first-stage to (iâˆ’1)-th stage chopper amplifiers and said i-th stage to said n-th stage chopper amplifiers to shift reset timing and amplification timing of said first-stage to (iâˆ’1)-th stage chopper amplifiers sequentially, and the reset timing and the amplification timing of said i-th stage to n-th stage chopper amplifiers sequentially, so that said first-stage to n-th stage chopper amplifiers amplify the input signal in a pipeline format.