Patent ID: 9196499
Filing Date: 2015-11-24
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure, comprising: depositing a high-K dielectric layer on a semiconductor substrate; forming a plurality of fin hardmask regions disposed on the high-K dielectric layer; depositing a lithography stack on the semiconductor structure; performing a first etch into the lithography stack to expose a portion of at least one fin hardmask region, the hardmask region being comprised of a first hardmask portion disposed on a second hardmask portion, wherein a subset of fin hardmask regions remain covered by the lithography stack; performing a second etch to remove the first hardmask portion of the exposed hardmask region; removing the lithography stack; performing a third etch to remove the second hardmask portion of the exposed hardmask region; performing a substrate recess to form fins at locations of the subset of fin hardmask regions; and removing the subset of fin hardmask regions.