Patent ID: 6448113
Filing Date: 2002-09-10
Classification: H01L

Abstract:
A method of forming a fuse area, comprising the steps of:forming a fuse line; forming a first interlayer dielectric film on the fuse line; forming a fuse opening etching stop film on the first interlayer dielectric film using a predetermined material layer of a semiconductor device to be formed to be slightly wider than an area in which a fuse opening is to be formed; forming a second interlayer dielectric film on the etching stop film; forming a contact hole for the semiconductor device by etching the second interlayer dielectric film and forming a fuse opening exposing the etching stop film at the same time; forming a conductive material layer on the entire surface of each of the contact hole, the fuse opening, and the second interlayer dielectric film; forming an upper interconnection layer of the semiconductor device by patterning the conductive material layer and removing a conductive material layer formed on the fuse opening at the same time; removing the etching stop film exposed to the fuse opening; forming a passivation film on the entire surface of each of the upper interconnection layer, the fuse opening, and the second interlayer dielectric film; and exposing the first interlayer dielectric film by removing the passivation film formed on the bottom of the fuse opening.