Patent ID: 7494868
Filing Date: 2009-02-24
Classification: H01L

Abstract:
1. A method of fabricating a flash memory device, comprising: forming parallel mask patterns on a substrate; etching the substrate using the mask patterns to form trenches; forming a trench oxide layer on exposed surfaces of the trench; forming an insulating layer pattern on the trench oxide layer to fill the trenches and an area between the mask patterns; removing the mask patterns to expose an upper portion of the insulating layer pattern; isotropically etching the upper portion of the insulating layer pattern to form sloped sidewalls on the insulating layer pattern that protrude away from the top surface of the substrate; forming a tunnel insulating layer directly on the substrate extending between the insulating layer pattern and so that an edge portion of the tunnel insulating layer that is adjacent to the insulating layer pattern and is on a substantially planar top surface of the substrate is less thick than a central portion of the tunnel insulating layer between the device insulating layer pattern; wherein the isotropic etching of the upper portion of the insulating layer pattern to form sloped sidewalls on the insulating layer pattern also exposes sidewalls of the trench oxide layer that extend above and protrude away from the top surface of the substrate; and wherein the tunnel insulating layer is formed on the substrate and on at least a portion of the exposed sidewalls of the trench oxide layer extending above and protruding away from the top surface of the substrate.