Patent ID: 6944720
Filing Date: 2005-09-13
Classification: G06F

Abstract:
1. A cache system comprising: a tag ramdom access memory to store an index and a storage status for each of a plurality of data entries; a data RAM to store the plurality of data entries; a hit/miss unit to determine whether data at a specified entry is available in the cache; a translation lookaside buffer (TLB) to provide an address translation and a storage status of a data entry when the hit/miss unit indicates an access miss in the tag RAM with respect to the data entry; and a read/write unit to determine the storage status for each of the plurality of data entries and to update the storage status to indicate whether a corresponding data entry has a reference value available from a local storage location; wherein the storage status includes cleared, compressed, or uncompressed, and the read/write unit to compress data having a compressed storage status before writing the compressed data to the data RAM, and to update the storage status to cleared without writing data to the data RAM if the data has a cleared storage status.