Patent ID: 9123310
Filing Date: 2015-09-01
Classification: G09G,G11C

Abstract:
1. A liquid crystal display device comprising: a liquid crystal display panel in which n gate lines are formed, the n being a natural number, wherein the “n” is greater than or equal to 6; a timing controller configured to generate first to sixth clock signals using timing control signals applied from an external system; a first gate driver configured to apply a high gate voltage to one ends of the (2k−1)th gate lines in response to the first, third and fifth clock signals, the “k” being a natural number; a second gate driver configured to apply the high gate voltage to one ends of the (2k)th gate lines in response to the second, fourth and sixth clock signals; left discharge circuits each configured to apply a low gate voltage to the other end of the (2k)th gate line according to a voltage level on (2k+3)th gate line; and right discharge circuits each configured to apply the low gate voltage to the other end of the (2k−1)th gate line according to the voltage level on (2k+2)th gate line, wherein the first gate driver includes a plurality of left stages which each include a gate output terminal used to output the high gate voltage and a carry output terminal used to control the respective left discharge circuit, and the second gate driver includes a plurality of right stages which each include another gate output terminal used to output the high gate voltage and another carry output terminal used configured to control the respective right discharge circuit.