Patent ID: 6562685
Filing Date: 2003-05-13
Classification: H01L

Abstract:
A method of fabricating a field effect transistor, the method comprising:forming a polysilicon layer patterned on a gate oxide film formed on the surface of a substrate; forming a metal layer having a high melting point in such a way as to extend from over the polysilicon layer to over the gate oxide film; forming a silicide layer by causing the metal layer having a high melting point to react with the polysilicon layer, and forming a gate electrode made up of the silicide layer and the polysilicon layer; removing portions of the metal layer having a high melting point, which have not undergone reaction with the polysilicon layer; and implanting ions into the surface of the substrate to form source and drain electrodes having lightly-doped regions directly beneath the edges of the gate electrode, and more heavily-doped regions adjacent to the lightly-doped regions, without the use of sidewall spacers to mask the lightly-doped regions, the implantation of ions in the lightly doped regions and the implantation of ions in the more heavily-doped regions being performed consecutively.