Patent ID: 8947912
Filing Date: 2015-02-03
Classification: G11C,H01L,Y10S

Abstract:
1. A memory cell including a pair of cross-coupled inverters, comprising: a first inverter, said first inverter including a substantially rectangular first gate conductor and a first contact; a second inverter, said second inverter including a substantially rectangular second gate conductor and a second contact, the second contact substantially aligned with a long axis of the first gate conductor, and the first contact substantially aligned with a long axis of the second gate conductor; a first substantially rectangular active region that intersects at least one of the first gate conductor and the second gate conductor in plan view; and a second substantially rectangular active region that intersects at least one of the first gate conductor and the second gate conductor in plan view, wherein, the second active region is non-contiguous with the first active region and has a width in plan view that is greater than a width of the first active region in plan view.