Patent ID: 6684278
Filing Date: 2004-01-27
Classification: G06F,Y02D

Abstract:
A microcomputer comprising:a CPU; a memory; a storage unit for storing a waiting period relating to memory access; and a memory controller for reading the waiting period upon receipt of a memory access request, and for performing access control to the memory in response to the memory access request after a lapse of the waiting period, wherein the memory controller further comprises a selector for assigning a priority to the memory access requests and is capable of accepting the memory access request not only from the CPU but also from an external device, wherein the memory access requests are adjusted based on the priority of the memory access requests when these requests are competed with each other, so that access to the memory is obtained by the memory access request having a higher priority, and the selector assigns higher priority to the memory access request from one of the CPU or the external device, that has higher operational speed than the other.