Patent ID: 8816410
Filing Date: 2014-08-26
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first semiconductor layer of a first conductivity type, the first semiconductor layer provided in a first region and a second region adjacent to the first region; a second semiconductor layer of the first conductivity type provided on the first semiconductor layer in the first and second regions; a third semiconductor layer of a second conductivity type selectively provided on a surface of the second semiconductor layer in the first region; a fourth semiconductor layer of the first conductivity type selectively provided on a surface of the third semiconductor layer; a first control electrode facing the second semiconductor layer in the first region, the third semiconductor layer, and the fourth semiconductor layer, via a first insulating film; an extraction electrode provided on the second semiconductor layer in the second region and not provided on the second semiconductor layer in the first region; a second control electrode and a third control electrode facing the second semiconductor layer under the extraction electrode via a second insulating film, and the first control electrode, the second control electrode, and the third control electrode being electrically connected to the extraction electrode, the third control electrode being electrically connected to the extraction electrode via the second control electrode; a first main electrode connected to the first semiconductor layer; a second main electrode connected to the third semiconductor layer and the fourth semiconductor layer; and an electrical resistance of the second control electrode being higher than an electrical resistance of the third control electrode.