Patent ID: 9021240
Filing Date: 2015-04-28
Classification: G06F

Abstract:
1. A system for controlling restarting of instruction fetching via speculative address computations in a processor, the system comprising: an address generator; a predicted target queue; target selection logic including a recycle queue, the recycle queue configured to store calculated branch targets of branch instructions for use during a recycle operation, wherein a speculative branch instruction is repeatedly inserted in a pipeline of the processor for repeated address generation of a target address until a calculated branch target of the speculative branch instruction is resolved; and a compare block, the system for performing a method comprising: receiving a calculated branch target address of a branch instruction to be executed and decode branch information for a surprise guess taken (SGT) branch instruction, the SGT branch instruction being a non-predicted guess taken branch, and the address generator calculating the calculated branch target address as a surprise branch target after a surprise branch is decoded; determining that the branch instruction is the SGT branch instruction based on decode branch information; initiating instruction fetching of an instruction stream at the calculated branch target address; storing the calculated branch target address in the recycle queue where the calculated branch target address is based on a speculative result of an older instruction; initiating a recycle operation of the SGT branch instruction, the SGT branch instruction having no entry in the predicted target queue, the SGT branch instruction having a branch target address in the recycle queue; receiving a current calculated branch target value from the address generator for the SGT branch instruction; selecting a saved branch target value from the recycle queue based on determining that the branch instruction is the SGT branch instruction; selecting the saved branch target value from the predicted target queue based on determining that the branch instruction was predicted; determining, by the compare block, that a mismatch exists between the saved branch target value and the current calculated branch target; and restarting instruction fetching of an instruction stream for the SGT branch instruction at the current calculated branch target based on determining that the mismatch exists.