Patent ID: 8966307
Filing Date: 2015-02-24
Classification: G06F,G06K,H04N

Abstract:
1. A security module comprising: a processor configured to process at least one audio/video data stream; an interface comprising a plurality of contacts including a power supply contact and a clock contact configured to receive a clock signal; a frequency divider configured to divide a frequency of the clock signal to generate a divided clock signal, a first frequency multiplier configured to multiply the frequency of the clock signal to generate a first multiplied clock signal, a second frequency multiplier configured to multiply the frequency of the clock signal to generate a second multiplied clock signal, or a combination thereof; a voltage detector configured to measure a voltage on the power supply contact and to categorize the measured voltage as pertaining to one of three predetermined voltage ranges, each of the three predetermined voltage ranges corresponding to one of three operation modes; and a multiplexer configured to select between the received clock signal, the divided clock signal, the first multiplied clock signal, or the second multiplied clock signal for operating the security module; wherein said security module is configured to function according to any one of the three operation modes, each of the three operation modes having a frequency of operation corresponding to a frequency of one of the received clock signal, the divided clock signal, the first multiplied clock signal, or the second multiplied clock signal, the three operation modes including any communication protocol from a plurality of different communication protocols or any class from a plurality of classes of a communication protocol; and wherein the security module is configured to monitor for a change in a category of the measured voltage from the voltage detector following power-on and, when the security module detects the change in the category, to switch to a different one of the thee operating modes and to cause the multiplexer to select between the received clock signal, the divided clock signal, the first multiplied clock signal, or the second multiplied clock signal corresponding to the different one of the three operation modes.