Patent ID: 9214615
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A composite wafer comprising: a semiconductor substrate comprising a plurality of partially unsingulated chips, each chip comprising (i) a plurality of exposed electrical contact pads and (ii) a non-contact region disposed between the electrical contact pads; a plurality of trenches extending through only a portion of a thickness of the substrate and partially singulating the chips; and an anisotropic conductive adhesive (ACA) (i) on the semiconductor substrate, (ii) extending as a single unitary layer over the chips and trenches, and (iii) contacting the electrical contact pads and at least a portion of the non-contact region of each chip, a portion of the ACA directly overlying each of the trenches that partially singulate the chips, wherein (i) none of the electrical contact pads comprises a solder bump or a non-solder bump, and (ii) no solder bumps or non-solder bumps are disposed between the electrical contact pads and the ACA.