Patent ID: 7870528
Filing Date: 2011-01-11
Classification: G06F

Abstract:
1. A computer system comprising: one or more processors which process program instructions; a memory device connected to said one or more processors; and program instructions residing in said memory device for modeling propagation of a metastable value in an integrated circuit design by receiving a circuit description for a net of the integrated circuit design wherein the net has an asynchronous crossing from a source in a first clock domain to a receive latch in a second clock domain, identifying at least one path in the circuit description from the receive latch to two or more sinks of the net in the second clock domain wherein the at least one path has a coincident portion with combinational logic and wiring, and unfolding the coincident portion of the at least one path by replicating the combinational logic and wiring to create a modified circuit description having two or more separate paths from the receive latch to the two or more sinks, respectively.