Patent ID: 7961165
Filing Date: 2011-06-14
Classification: G09G

Abstract:
1. A liquid crystal display device comprising a plurality of pixels, each of which includes a liquid crystal capacitor made up of a liquid crystal layer and two electrodes to apply a voltage to the liquid crystal layer, wherein each said pixel further includes a storage capacitor, and wherein the liquid crystal capacitor includes a pixel electrode, which is provided for each said pixel, and a counter electrode, which is provided for all of the pixels in common electrically; and wherein the storage capacitor includes a first electrode, which is electrically connected to the pixel electrode, an insulating layer, and a second electrode, which faces the first electrode with the insulating layer interposed between the first and second electrode, and the second electrode is electrically independent from the counter electrode; and wherein while the device is conducting a display operation, an oscillation voltage, which oscillates a number of times within a single vertical scanning period, is applied to the second electrode such that the oscillation voltage is superposed to a voltage of the pixel electrode, and the oscillation voltage and a predetermined gray-scale voltage are applied to the liquid crystal capacitor of an arbitrary one of the pixels, wherein in an arbitrary vertical scanning period, the respective second electrodes of all pixels belonging to an arbitrary one of the rows are electrically connected together, wherein the oscillation voltage includes a first oscillation voltage and a second oscillation voltage which is different from the first oscillation voltage, the first oscillation voltage and the second oscillation voltage having a phase difference of 180 degrees, wherein in the arbitrary vertical scanning period, the first oscillation voltage is applied to the respective second electrodes of all pixels belonging to one of two mutually adjacent rows via a first CS bus line, and the second oscillation voltage is applied to the respective second electrodes of all pixels belonging to the other row via a second CS bus line, the first and second oscillation voltages being applied concurrently, wherein the first and second CS bus lines are parallel to a plurality of scan lines.