Patent ID: 6647487
Filing Date: 2003-11-11
Classification: G06F

Abstract:
A computer program storage medium readable by a computer, tangibly embodying a software program of instructions executable by the computer, providing the computer comprises a microprocessor, to perform method steps for prefetching instruction addresses, the method steps comprising:when a preselected bit position in a shift register is set to a preselected logical value and the microprocessor is ready to accept the prefetch instruction address, writing the prefetch instruction address into an address register; and writing the prefetch instruction address into an instruction cache; incrementing the prefetch instruction address to that of the next prefetch instruction address; when the instruction cache has accepted the prefetch instruction address, providing the shift register has a left side input and a right side input, providing each input has capability of shifting logical values into the shift register, shifting the complement of the preselected logical value into the shift register at the left side input; and when the microprocessor fetches last instruction from a cache line in the instruction cache, shifting a value equal to the preselected logical value into the shift register at the right side input.