Patent ID: 6342418
Filing Date: 2002-01-29
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:forming an element isolation insulation film at a main surface of a semiconductor substrate of a first conductivity type, a first implantation step of ion-implanting impurities of the first conductivity type at a first dose from said main surface to a first depth so as to form an impurity region of the first conductivity type for preventing inversion at a region of said semiconductor substrate below said element isolation insulation film, a second implantation step of ion-implanting an impurity of the first conductivity type at a second dose at a second depth smaller than said first depth so as to form an impurity region of the first conductivity type for adjusting a threshold voltage at a region of said semiconductor substrate between said element isolation insulation films, forming a gate electrode with a gate insulation film thereunder at a region of said semiconductor substrate between said element isolation insulation films, forming first and second source/drain regions of a second conductivity type at the main surface of said semiconductor substrate at both sides of said gate electrode, a third implantation step of ion-implanting impurities of the second conductivity type at a third dose attaining an impurity concentration higher than the impurity concentration by said first dose at a neighborhood of said first depth from said main surface at said first source/drain region, and a fourth implantation step of ion-implanting impurities of the second conductivity type at a fourth dose attaining an impurity concentration higher than the impurity concentration by second dose at a neighborhood of said second depth from said main surface at said first source/drain region.