Patent ID: 6143624
Filing Date: 2000-11-07
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device having an insulated trench formed in a semiconductor substrate or in an epitaxial layer on the semiconductor substrate, which method comprises:forming a pad oxide layer on a main surface of the substrate or epitaxial layer;forming a barrier nitride layer having an upper surface on the pad oxide layer;forming a mask having an opening on the barrier nitride layer;etching to remove a portion of the underlying barrier nitride layer to expose a portion of the pad oxide layer and to form an opening in the barrier nitride layer having a substantially vertical wall intersecting the pad oxide layer;depositing a protective layer on the barrier nitride layer and on the exposed portion of the pad oxide layer;anisotropically etching the protective layer to form a protective sidewall spacer on the substantially vertical wall of the barrier nitride layer and extending on a portion of the pad oxide layer;etching to form a trench in the substrate or epitaxial layer, which trench comprises side surfaces intersecting the main surface at edges;removing the protective spacer, thereby exposing portions of the main surface proximal to the edges;ion implanting impurities in the exposed portions of the main surface including the edges, thereby increasing the oxidation rate of the ion implanted portions; andforming an oxide liner on the side surfaces of the trench, on the edges, and on the exposed portions of the main surface in contact with the pad oxide layer, the oxide liner having a thickness on the main surface and proximal to the edges on the ion implanted portions greater than that of the remainder of the oxide liner.