Patent ID: 6970014
Filing Date: 2005-11-29
Classification: H03K

Abstract:
1. An integrated circuit, comprising: a first function block having a plurality of inputs and a plurality of outputs; a first channel coupled to a first portion of the plurality of inputs located on a first side of the first function block and coupled to a first portion of the plurality of outputs located on the first side of the first function block; a second channel coupled to a second portion of the plurality of inputs located on a second side of the first function block, the second side opposite the first side, and coupled to a second portion of the plurality of outputs located on the second side of the first function block; a third channel coupled to the first channel and the second channel and coupled to a third portion of the plurality of inputs located on a third side of the first function block and coupled to a third portion of the plurality of outputs located on the third side of the first function block; and a fourth channel associated with a fourth side of the function block that is opposite the third side, the fourth channel coupled only to the first channel and the second channel.