Patent ID: 6977203
Filing Date: 2005-12-20
Classification: H01L

Abstract:
1. A method of forming a trench MOSFET comprising: providing a semiconductor wafer of a first conductivity type; depositing an epitaxial layer of said first conductivity type over said wafer, said epitaxial layer having a lower majority carrier concentration than said wafer; forming a body region of a second conductivity type within an upper portion of said epitaxial layer; providing a patterned first masking material layer over said epitaxial layer, said patterned first masking material layer comprising a densified non-doped silica glass layer overlaid by a positive photoresist material, and said patterned first masking material layer comprising a first aperture; depositing a second masking material layer over said first masking material layer, said second masking material layer comprising a densified non-doped silica glass layer; etching said second masking material layer until a second aperture is created in said second masking material layer within said first aperture, said second aperture being narrower than said first aperture; forming a trench in said epitaxial layer by etching said semiconductor wafer through said second aperture; and removing the first masking material layer and the second masking material layer prior to performing the following steps: forming an insulating layer lining at least a portion of said trench; forming a conductive region within said trench adjacent said insulating layer; and forming a source region of said first conductivity type within an upper portion of said body region and adjacent said trench, wherein said step of forming a source region is performed subsequent to said step of forming a trench.