Patent ID: 6026460
Filing Date: 2000-02-15
Classification: G06F

Abstract:
A method of reducing thrashing in a bus bridge comprising:(a) determining whether a processor has been backed off a first bus a predetermined number of times;(b) masking off requests from the processor for a predetermined period of time in response to the processor being backed off the predetermined number of times;(c) checking whether an inbound posting buffer is empty;(d) disabling posting to the inbound posting buffer responsive to the inbound posting buffer being empty;(e) re-checking whether the inbound posting buffer is empty after waiting a predetermined period of time;(f) allowing control of the first bus to be granted to the processor responsive to the inbound posting buffer being empty;(g) checking whether a bus cycle on the first bus is complete; and(h) re-enabling posting to the inbound posting buffer one clock cycle after the bus cycle is complete.