Patent ID: 6329851
Filing Date: 2001-12-11
Classification: H03K

Abstract:
An apparatus, comprising:a power on reset cell comprising an input circuit and an output circuit, the input circuit providing an output signal to the output circuit providing a first output when said input circuit receives an input below a predetermined value, and said output circuit providing a second output when said input circuit receives an input equal to or above the predetermined value; andmeans, receiving as input the output signal of the input circuit, for discharging the output signal of the input circuit such that said output circuit is prevented from prematurely transitioning between the first output and the second output when the input to said input circuit is cycled at a high rate,said discharging means comprising a diode receiving the input to the input circuit, said diode coupled to a capacitor that is charged by said diode, and a first transistor coupled to the input of said input circuit, for controlling the discharge of the output signal by setting a control voltage at a control node,further comprising second and third transistors coupled in series between the input to said input circuit and to said first transistor at the control node, said second and third transistors for further controlling the discharging of the output signal, said second and third transistors having at least one parameter selected to control the discharging of the output signal.