Patent ID: 6073182
Filing Date: 2000-06-06
Classification: G06F

Abstract:
A method for deadlock resolution in a symmetric multiprocessor system having at least one storage controller (SC) providing a storage controller mechanism with control logic, a plurality of processing elements for processing instructions with pipeline passes and for making requests for fetches and stores for a memory attached via a bus, comprising the steps of:processing with deadlock resolution logic contemporaneously for all of the processing elements processing instructions requests for processor fetches stores and other requests from competing requestors;detecting a potential deadlock amoung competing requesters while said request processing occurs, and upon detecting of a potential deadlock among competing requestors interrupting said request processing to keep a request in a held state until a specific condition has been satisfied;allowing the request to resume;wherein, during processing of requests from competing requesters, using global hang pulse logic for detecting potential hangs in the storage controller mechanism by detecting the time that a request being processed has been valid in the storage controller mechanism and for generating short hang pulses, and using internal hang detection logic for generating an internal hang detect pulse when a number of short hang pulses are detected to provide an indication that there is a potential deadlock condition, and thereafter, as a result, setting an internal hang detect output signal, and causing said control logic to ignore detected hangs in pipeline passes.