Patent ID: 8802507
Filing Date: 2014-08-12
Classification: H01L

Abstract:
1. A fabrication method of a semiconductor package device, comprising: providing a wafer having a plurality of silicon substrates, wherein each of the silicon substrates has a first surface and an opposed second surface and a plurality of Through Silicon Vias; disposing a plurality of semiconductor chips on the first surfaces of the silicon substrates, wherein the semiconductor chips are electrically connected to the Through Silicon Vias; forming an encapsulant on the first surfaces of the silicon substrates to encapsulate the semiconductor chips; forming a hard component on the encapsulant, wherein the encapsulant is formed only between the hard component and the semiconductor chip, and the encapsulant is not formed on an outside surface of the hard component, so as to expose the hard component; and forming a plurality of conductive elements on the second surfaces of the silicon substrates to electrically connect the Through Silicon Vias.