Patent ID: 7572690
Filing Date: 2009-08-11
Classification: H01L

Abstract:
1. A method of fabricating a CMOS thin film transistor (TFT), comprising the steps of: providing a substrate having a first region and a second region; forming a first semiconductor layer and a second semiconductor layer on the first and second regions, respectively; forming a single gate insulating layer having a first portion overlying first source and drain regions of the first semiconductor layer and a second portion overlying second source and drain regions of the second semiconductor layer, wherein the second portion is thicker than the first portion; forming an ion doping mask pattern on the gate insulating layer; and doping first impurities in the first source and drain regions of the first semiconductor layer using the ion doping mask pattern as a mask, and doping second impurities having a conductivity type different from a conductivity type of the first impurities in the second source and drain regions of the second semiconductor layer using the ion doping mask pattern as a mask.