Patent ID: 6789153
Filing Date: 2004-09-07
Classification: G06F

Abstract:
Apparatus for connecting a digital signal processor to an application specific integrated circuit (ASIC) on-chip bus as a slave comprising:a bridge for coupling signals between internal memory of a digital signal processor and an ASIC on-chip bus, said bridge comprising: a generic bus slave coupled to said ASIC on-chip bus, said generic bus slave translating on-chip bus protocol signals into bridge bus protocol signals; a slave engine coupled to said digital signal processor, said slave engine having control logic for providing signals which control the flow of instructions and data to and from said internal memory of said digital signal processor; a grower module coupled between said slave engine and said generic bus slave, said grower module lengthening bridge bus protocol signals being transmitted from said slave engine to said generic bus slave; and a shaver module coupled between said slave engine and said generic bus slave, said shaver module shortening bridge bus protocol signals being transmitted from said generic bus slave to said slave engine; wherein said digital signal processor and said slave engine operate at a first clock frequency; and wherein said on-chip bus and said generic bus slave operate at a second clock frequency different than said first clock frequency.