Patent ID: 9038073
Filing Date: 2015-05-19
Classification: G06F,Y02D

Abstract:
1. A data processing method, comprising: receiving, by a hardware data mover having associated therewith a first task queue, instructions to execute a first set of tasks stored in the first task queue, wherein the instructions to execute the first set of tasks are configured to program the hardware data mover to perform the first set of tasks upon receiving a first hardware interrupt, the first set of tasks including reading a block of data from a first memory and storing the block of data in a second memory; receiving, by a hardware accelerator having associated therewith a second task queue, instructions to execute a second set of tasks stored in the second task queue, wherein the instructions to execute the second set of tasks are configured to program the hardware accelerator to perform the second set of tasks upon receiving a second hardware interrupt, the second set of tasks including processing the block of data stored in the second memory and comparing a length of the processed block of data to a threshold length; receiving, at the hardware data mover, the first hardware interrupt, from a processor, to trigger the hardware data mover to execute the first set of tasks; upon completion of the first set of tasks, transmitting, by the hardware data mover, the second hardware interrupt to the hardware accelerator to trigger the hardware accelerator to execute the second set of tasks; when the length of the processed block of data is less than the threshold length, transmitting, by the hardware accelerator, a third hardware interrupt to the hardware data mover to move the processed data out of the second memory; determining, by the hardware data mover, whether any further tasks are in the first task queue; and if no further tasks are in the first task queue, transmitting a software interrupt to a software component running on the processor.