Patent ID: 9177912
Filing Date: 2015-11-03
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a substrate; an insulating layer formed over the substrate; a first conductive plate formed in the insulating layer and formed at a first wiring layer; a fuse element formed in the insulating layer and formed at a second wiring layer, the second wiring layer being one level above the first wiring layer; a second conductive plate formed over the insulating layer and formed at a third wiring layer which is one level upper than the second wiring layer; a third conductive plate formed in the insulating layer and formed at the second wiring layer; and a fourth conductive plate formed in the insulating layer and formed at the second wiring layer, wherein the fuse element includes copper, wherein the fuse element is brought into a blow state by a current supplied thereto, wherein the fuse element has a first portion including a meltdown portion, wherein the first conductive plate is formed below the fuse element in a planar view, wherein the second conductive plate is formed above the fuse element in the planar view, wherein the first portion, the third conductive plate, and the fourth conductive plate extend in a first direction of the planar view, and wherein the first portion is located between the third conductive plate and the fourth conductive plate in a second direction of the planar view perpendicular to the first direction.