Patent ID: 8497703
Filing Date: 2013-07-30
Classification: H03K

Abstract:
1. A logic device comprising: at least two logic blocks including a first logic block and a second logic block; a global wire group including at least a plurality of first global wires connected to the first logic block and a plurality of second global wires connected to the second logic block; and a global controller including a plurality of first nonvolatile memory devices associated with at least one first global wire and one second global wire, the global controller configured to selectively couple the plurality of first global wires to the plurality of second global wires based on first data stored in the associated first nonvolatile memory devices, wherein the global controller includes, a global wire connection unit including the plurality of first nonvolatile memory devices, the global wire connection unit configured to connect the plurality of first global wires to the plurality of second global wires, and a global wire connection controller configured to control the global wire connection unit by programming the plurality of first nonvolatile memory devices in real time.