Patent ID: 8802529
Filing Date: 2014-08-12
Classification: H01L

Abstract:
1. A method for manufacturing a Semiconductor Power device disposed on a semiconductor layer of a first conductivity type comprising an active area and a termination area, the method further comprising: forming a power device in the active area and forming a plurality of laterally cascaded MOSFETs in the termination area by forming a plurality of dopant floating guard rings (FGRs) of a second conductivity type each encompassing a heavy dopant region of the second conductivity type to function as drain regions and source regions of the laterally cascaded MOSFETs wherein the drain and source regions disposed in two adjacent FGRs on opposite sides of a gate disposed on a top surface of the semiconductor layer extending over the two adjacent FGRs above a dopant region of the first conductivity type disposed between the two adjacent FGRs and forming the dopant region of the first conductivity type between the two adjacent FGRs to adjust a threshold of turning on the MOSFET for applying a voltage between the source region and the drain region disposed laterally on two opposite sides of the dopant region of the first conductivity type; and connecting each of the gates of the laterally cascaded MOSFETs to the drain region of the second conductivity type of each of the cascaded lateral MOSFETs functioning as a chain of field threshold MOSFETs in the termination area.