Patent ID: 6798827
Filing Date: 2004-09-28
Classification: H04B,H04L

Abstract:
For use in a transceiver comprising front-end analog signal processing circuitry capable of communicating with a high frequency Ethernet local area network (LAN), an apparatus for correcting an input DC offset signal generated in said front-end analog signal processing circuitry comprising:a receiver line driver capable of receiving an incoming analog signal from a transformer coupling said front-end analog signal processing circuitry to said LAN, said receiver line driver comprising a differential amplifier having a first input coupled to a first biasing resistor array and a second input coupled to a second biasing resistor array, wherein said differential amplifier amplifies said incoming analog signal and said input DC offset signal to produce a composite incoming analog signal containing an amplified input DC offset signal; a DC offset correction controller capable of detecting an output DC offset signal component in an output signal of said front-end analog signal processing circuitry; and an adjustable biasing circuit coupled to said first and second biasing resistor arrays capable of generating an adjustable DC offset correction signal in said first and second biasing resistor arrays, wherein said DC offset correction controller, in response to said detection, modifies said adjustable DC offset correction signal generated by said adjustable biasing circuit to reduce a level of said amplified input DC offset signal in said composite incoming analog signal.