Patent ID: 7705422
Filing Date: 2010-04-27
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a multi-layered wiring construction formed over said semiconductor substrate; and a metal-insulator-metal capacitor arrangement established in said multi-layered wiring construction, wherein said metal-insulator-metal capacitor arrangement includes first, second, third, fourth, fifth, sixth, seventh and eighth electrode structures, which are arranged in order in parallel with each other at regular intervals, said first, second, fifth and sixth electrode structures being electrically paired to each other so as to define a first capacitor, said third, fourth, seventh and eighth electrode structures being electrically paired to each other so as to define a second capacitor, and wherein said first and fifth electrode structures are connected to each other with a first conductive line having a first node; said second and sixth electrode structures are connected to each other with a second conductive line having a second node; said third and seventh electrode structure is connected to a third conductive line having a third node; and said fourth and eighth electrode structure is connected to a fourth conductive line having a fourth node, voltages being independently applied to said first, second, third and fourth nodes.