Patent ID: 7402887
Filing Date: 2008-07-22
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a surface thereof; a first insulating layer selectively formed in direct contact with the surface of the semiconductor substrate; a fuse formed in direct contact with the first insulating layer; a diffusion layer formed in direct contact with the surface of the semiconductor substrate, the diffusion layer being applied to a fixed potential; a second insulating layer formed in direct contact with the fuse; a conductive pattern formed in direct contact with the second insulating layer, the conductive pattern surrounding the fuse and being electrically connected to the diffusion layer; and a third insulating layer formed in direct contact with the second insulating layer and the conductive pattern, the third insulating layer having a window to expose both the second insulating layer over the fuse and a part of the conductive pattern, wherein no portion of the conductive pattern except a peripheral edge portion thereof is exposed in the window.