Patent ID: 8698522
Filing Date: 2014-04-15
Classification: G11C,H03K

Abstract:
1. A sampling circuit that operates in at least a sample state and a hold state comprising: an input terminal receiving a time variable input signal; a semiconductor switch that operates in at least a non-conductive mode and a conductive mode as directed by an amount of charge applied to a control terminal, the semiconductor switch being coupled between the input terminal and an output terminal, the semiconductor switch body being accessible at a body bias terminal; a control circuit that is non-coupled to the input terminal and coupled to the control terminal and operative to select the semiconductor switch operation mode; and a body bias circuit coupled between the body bias terminal and the input terminal or the output terminal that maintains, in sample and hold states, respectively, a predetermined and substantially constant body bias voltage difference between the body bias terminal and at least one of (i) the input terminal or (ii) the output terminal, wherein the body bias circuit comprises a charge refresh circuit operating in one or the other of a first phase and a second phase, selectively, and a first body bias capacitor coupled between the body bias terminal and the input terminal or the output terminal.