Patent ID: 8335951
Filing Date: 2012-12-18
Classification: G06F,G11C

Abstract:
1. A method for verifying an integrity of a memory device, the method comprising: identifying, by a processor coupled to the memory device, at least one memory block corresponding to at least one memory location within the memory device, the at least one memory block including a first memory block associated with a prior checksum; determining, by the processor, whether a write operation associated with the first memory block has been executed since the prior checksum; calculating, by the processor, a current checksum based at least in part on data within the first memory block; determining whether the current checksum is equal to the prior checksum; when the current checksum is not equal to the prior checksum, indicating a verification failure for the first memory block via a notification interface; when the current checksum is equal to the prior checksum, indicating, via the processor, a verification success for the first memory block and recording a first time at which the current checksum was determined to be equal to the prior checksum; at a second time subsequent to the first time, determining, by the processor, whether the first time is older than a predefined threshold age; and when the first time is older than the predefined threshold age and no write operation associated with the first memory block has been executed, calculating a new current checksum.