Patent ID: 6924189
Filing Date: 2005-08-02
Classification: H01L

Abstract:
1. A method for manufacturing a capacitor bottom electrode of a semiconductor device, the method comprising the steps of: a) preparing a semiconductor substrate; b) forming a sacrificial layer of low k dielectric material on the semiconductor substrate; c) forming a photoresist pattern on the sacrificial layer; d) etching the sacrificial layer by using the photoresist pattern as an etching mask, thereby forming an opening; e) depositing a conductive layer on sides and a bottom face of the opening and a top face of the sacrificial layer; f) forming a photoresist on the conductive layer, wherein a concave region of the conductive layer is completely filled with the photoresist; g) planarizing the conductive layer till the top face of the sacrificial layer is exposed; and h) forming a bottom electrode by removing the sacrificial layer enclosing the bottom electrode by using O