Patent ID: 6275495
Filing Date: 2001-08-14
Classification: H04L,H04Q

Abstract:
A modular PET decoder for an ATM network comprising:a processing unit comprising a first memory for storing data for decoding processing, a second memory for storing intermediate results of decoding processing, and a processing pipeline, the processing pipeline for:constructing, starting from a block of m digital data of a predefined number of bits, an m.times.m square matrix A based on a vector of relative points over a Galois field to which an m number of packets of coded information received at a decoder input refer to based upon header bits of the m packets,decomposing by a triangular factorization of the square m.times.m matrix A according to a scheme A=LU, where L is a resulting lower triangular matrix and U is a resulting upper triangular matrix into which the square matrix A is decomposed and from which UX=Y and LY=B, where B is a vector of polynomial values decoded as a function of a certain offset stored in header bits of the input packets,solving the systems LY=B and UX=Y by substitution; anda control unit connected to said processing unit for interfacing to the ATM network.