Patent ID: 7305588
Filing Date: 2007-12-04
Classification: G06F

Abstract:
1. A method of testing the servicing of interrupt sources of a microprocessor having a number of interrupt sources which are each operable to execute an interrupt service routine when enabled, each interrupt having a default priority level and an associated memory, each interrupt source having a position in a service order in which they are to be serviced, the method comprising the steps of: a) sorting the interrupts in descending service order; b) determining an array of priority levels to be assigned in a pre-arranged sequence to selections of interrupts in descending service order, the array of priority levels consisting of: the lowest priority level; and the priority levels in descending order from the highest priority level to the lowest priority level; c) incrementing a global counter; d) assigning the array of priority levels to a selected group of interrupts, the remainder of the interrupts assuming their default priority level; e) enabling all interrupts simultaneously so that the interrupt having the highest priority level executes its interrupt service routine unless two or more of the interrupts each have the same highest priority level, in which event the interrupt having a highest service order executes its interrupt service routine; f) transferring the value of the global counter into the memory of the interrupt having executed its interrupt service routine; g) repeating steps c) to f) to the next selected group of interrupts until the pre-arranged sequence is completed; and h) comparing the interrupt memory values after completion of the pre-arranged sequence with expected values and determining from the comparison whether there is an error in the microprocessor interrupts.