Patent ID: 6642114
Filing Date: 2003-11-04
Classification: H01L

Abstract:
A method for fabricating a semiconductor device comprising the steps of:forming a device isolation film on a semiconductor substrate to define a plurality of device regions extended in a first direction and arranged in a staggered layout; forming a plurality of word lines having surfaces covered with a first insulation film and extended in a second direction intersecting the first direction, two of the word lines being extended in each of the device regions; depositing a second insulation film on the semiconductor substrate with the word lines formed on; planarizing the second insulation film until the first insulation film on the word lines is exposed; forming on the second insulation film a resist pattern for covering regions which are arranged in a staggered layout, the respective regions being between the device regions extended in the first direction, and being on one side of the respective device regions; and etching the second insulation film with the resist pattern as a mask to form first contact holes extended in the second direction and opened on regions which are between the adjacent two word lines intersecting the same device regions other than the regions where the resist pattern is formed, and second contact holes opened on the respective device regions between the adjacent two word lines intersecting the different device regions.