Patent ID: 9202571
Filing Date: 2015-12-01
Classification: G11C,H01L

Abstract:
1. A nonvolatile memory device comprising: first and second common source lines of a first conductivity type in a substrate; a channel region of a second conductivity type in the substrate between the first and second common source lines; a stacked structure on the channel region, the stacked structure including a vertically-stacked plurality of conductive patterns; first and second string selection lines on the stacked structure, the first and second string selection lines horizontally spaced apart from each other; a bit line overlapping the first and second string selection lines; a first vertical channel penetrating the first string selection line and the stacked structure, the first vertical channel connecting the first common source line to the bit line; and a second vertical channel penetrating the second string selection line and the stacked structure, the second vertical channel connecting the second common source line to the bit line.