Patent ID: 8847636
Filing Date: 2014-09-30
Classification: G06F,H03K

Abstract:
1. A method for implementing protection for complementary metal oxide semiconductor (CMOS) output drivers in a transistor stack output drive stage including a plurality of series connected P-channel field effect transistors (PFETs) and series connected with a plurality of series connected N-channel field effect transistors (NFETs) connected between upper and lower voltage supply rails, said method comprising: applying a first offset DC voltage level and a second offset DC voltage level to respective gate inputs of an intermediate PFET and an intermediate NFET in the output driver stage transistor stack; driving respective gate inputs of the upper PFET and the lower NFET in the transistor stack output driver stage using a pair of pre-driver circuits receiving voltage level translated logic signals; and providing a voltage feedback circuit including a plurality of resistors and a pair of capacitors and providing a feedback input of a driver output of the transistor stack output driver stage input including first and second respective resistor and capacitor parallel connected pairs connected in series between the upper voltage supply rail and the lower voltage supply rail and connected to a third resistor connected to the driver output; and providing respective gate voltages to the PFET and NFET connected together in the transistor stack output driver stage with the voltage feedback circuit.