Patent ID: 6353559
Filing Date: 2002-03-05
Classification: G11C

Abstract:
A write circuit for supplying a write potential that is higher than a power supply potential to memory cells of a semiconductor memory device, comprising:a voltage-controlled oscillator (VCO) for receiving the power supply potential and generating an oscillation clock signal having an oscillation clock frequency that fluctuates in response to a reference potential; a reference potential generator, connected to the VCO, for generating the reference potential, wherein the reference potential generator maintains the reference potential at a substantially constant level such that the VCO generates the oscillation clock signal having a constant oscillation clock frequency; a booster, connected to the VCO, for generating the write potential by piling up the oscillation clock signal onto the power supply potential in a multistage manner; and a write controller, connected to said booster, for supplying the write potential to the memory cells in accordance with a write clock.