Patent ID: 7479821
Filing Date: 2009-01-20
Classification: G05F,H01L,H03F

Abstract:
1. A cascode circuit comprising: a first N-channel depletion type MOS transistor having a source and a gate connected to each other; a second N-channel depletion type MOS transistor having a gate connected to the gate of the first N-channel depletion type MOS transistor, for supplying power to a load circuit connected to a source of the second N-channel depletion type MOS transistor; and a control current source connected to the source of the first N-channel depletion type MOS transistor, the control current source being controlled by current through the load circuit, wherein the drain-source voltage of the first N-channel depletion type MOS transistor is set to be higher than threshold voltage, and the substrate potential is set to be lower than source potential of the first N-channel depletion type MOS transistor, and the drain-source voltage of the second N-channel depletion type MOS transistor is set to be higher than threshold voltage, and the substrate potential is set to be lower than source potential of the second N-channel depletion type MOS transistor.