Patent ID: 6079623
Filing Date: 2000-06-27
Classification: G06Q,G07F

Abstract:
An apparatus for mapping internal registers, in a PCMCIA card of a computer system, into I/O address space and for performing write and read operations, the apparatus comprising:a plurality of first means for receiving index signals from an index register and generating a first control signal;a plurality of second means for receiving the first control signal from the first means and a data write signal from a CPU of the computer system and generating a second control signal;a plurality of third means for receiving the first control signal from the first means and a data read signal from the CPU of the computer system and generating a third control signal;a plurality of registers for storing an input data in response to the second control signal; anda plurality of fourth means for reading out data stored in the registers in response to the third control signal from the third means.