Patent ID: 6128673
Filing Date: 2000-10-03
Classification: G06F

Abstract:
A single chip digital protocol translator comprising;first protocol circuitry having a first I/O port adapted to communicate using a first digital protocol, said first protocol circuitry including a first controller;second protocol circuitry having a second I/O port adapted to communicate using a second digital protocol different from said first digital protocol, said second protocol circuitry including a second controller in communication with said first controller;whereby communications between said first I/O port and said second I/O port are translated between said first protocol and said second protocol;wherein said first protocol circuitry and said second protocol circuitry are integrated on a single chip; anda digital microprocessor and digital memory integrated on said chip, said digital memory being coupled to said digital microprocessor, said digital microprocessor operating under program control stored in said digital memory and communicating with both said first controller and said second controller.