Patent ID: 7518963
Filing Date: 2009-04-14
Classification: G11B

Abstract:
1. A phase difference detection circuit that detects a phase difference between at least two signals and outputs a phase difference signal indicating the detected phase difference, said at least two signals being obtained by summing predetermined signals among a plurality of signals input to the phase difference detection circuit, said phase difference detection circuit comprising: a phase difference correction circuit that detects and stores the phase difference between the at least two signals at a predetermined timing; wherein when the detected phase difference is greater than an upper limit of a phase difference window, the phase difference correction circuit corrects the detected phase difference to be the upper limit and outputs the corrected phase difference, and when the detected phase difference is less than a lower limit of the phase difference window, the phase difference correction circuit corrects the detected phase difference to be the lower limit and outputs the corrected phase difference, said phase difference window being defined in a range from said lower limit to said upper limit, said upper limit and said lower limit being defined to be an average value of a plurality of said stored phase differences plus and minus a predetermined value, respectively.