Patent ID: 6933219
Filing Date: 2005-08-23
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising the steps of: forming a charge-trapping dielectric layer over a substrate, the charge-trapping dielectric layer including a tunnelling layer, a charge-trapping layer, and an insulating layer, wherein the tunnelling layer is disposed over the substrate, the charge-trapping layer is disposed over the tunnelling layer and the insulating layer is disposed over the charge-trapping layer; forming a mask layer over the dielectric layer; forming a photosensitive layer over the mask layer; using the photosensitive layer to pattern only the mask layer to form a mask including a mask line and space pattern, the mask line and space pattern including at least one mask space; and forming a conductive layer over the patterned mask layer and filling the at least one mask space, the conductive layer including a width dimension about equal to the width dimension of the least one mask space; and planarizing the conductive layer down to horizontal surfaces of the mask.