Patent ID: 6823410
Filing Date: 2004-11-23
Classification: G06F

Abstract:
A split transaction bus system, comprising:a bus that is a data transfer path for a plurality of devices; two or more master devices connected to said bus and each having an output terminal for a bus request and an input terminal for a bus grant; one or more slave devices connected to said bus and each having an output terminal for a bus request and an input terminal for a bus grant; an access time prediction circuit that predicts an access time required for the data in the slave device to be read to be ready for output when a read command is issued from one of said master devices to one of said slave devices, measures an elapsed time based on a count of clock signals, and sends a parking indication to said slave device to be read during the last cycle before the predicted access time; and an arbiter having an input terminal for the bus request from said master device and said slave device and an output terminal for the bus grant to said master device and said slave device, and provided with an arbitration function of selecting the device to which a bus ownership is given in response to the bus request thereof and transmitting the bus grant thereto, and a parking control function of parking said slave device to be read by transmitting the bus grant to said slave device to be read unless said bus is being used when said parking indication is received, as well as placing said slave device to be read at the highest priority in the arbitration.