Patent ID: 8327068
Filing Date: 2012-12-04
Classification: G06F

Abstract:
1. A memory controller for reading data from a nonvolatile main memory and writing data received from outside to the main memory according to an externally given logical address, said memory controller comprising: a CPU that controls the entire memory controller; a first volatile RAM that operates as a work area of the CPU; a first read-write controller that reads and writes data from and to the main memory; an auxiliary memory comprising a nonvolatile RAM of destructive read type and a second volatile RAM separate from the first volatile RAM, each of the nonvolatile RAM and the second volatile RAM storing access data used when the first read-write controller accesses the main memory; and a second read-write controller that reads and writes the access data from and to the auxiliary memory according to a command to access the auxiliary memory from the CPU, the second read-write controller reading access data from the second volatile RAM in reading from the auxiliary memory, the second read-write controller writing the same access data to both the second volatile RAM and the nonvolatile RAM in writing to the auxiliary memory, such that the same access data that is written into the second volatile RAM is written into the nonvolatile RAM every time the access data is written into the second volatile RAM, to maintain consistency in the access data between the nonvolatile RAM and the second volatile RAM, wherein the second read-write controller reads access data from the nonvolatile RAM, and writes the access data read from the nonvolatile RAM to the second volatile RAM and writes back the access data to the nonvolatile RAM during initialization processing of the auxiliary memory, the access data includes a physical area management table for managing a state in the main memory and a logical-physical conversion table for converting a logical address into a physical address of the main memory, and wherein the second read-write controller reads the access data from the nonvolatile RAM only at the initialization processing of the auxiliary memory.