Patent ID: 6430652
Filing Date: 2002-08-06
Classification: G06F

Abstract:
An integrated circuit comprising:a microcontroller interface, wherein the microcontroller interface is configured to communicate with a microcontroller; a data interface, wherein the data interface is configured to receive data from a storage device; a host interface, wherein the host interface is configured to send data to a host; a buffer manager which includes: reception means for receiving data from the data interface; storage means for storing the received data in a memory; determination means for determining whether space in the memory is available to store data; control means, responsive to a determination that space in the memory is unavailable, for halting transfer of data to the memory; and an error correction unit that receives the data from the storage device via the data interface, corrects errors in the received data by generating correction information, and overwrites erroneous data stored in the memory by the storage means, without intervention from the microcontroller.