Patent ID: 7521989
Filing Date: 2009-04-21
Classification: G11C

Abstract:
1. A method of distributing a reference voltage signal through an integrated circuit (IC) including a plurality of circuit blocks, comprising: generating the reference voltage signal; and distributing, to the plurality of circuit blocks, the reference voltage signal with a reference voltage line at a reference voltage potential relative to a reference ground line, wherein the reference ground line is coupled to a common ground line at a first node and is further coupled to a gate of a first P-channel transistor in each of the plurality of circuit blocks, the first P-channel transistor having a drain coupled to the common ground line at a second node, wherein the reference voltage line is coupled to a first N-channel transistor gate of each of the plurality of circuit blocks, the first N-channel transistor having a source coupled in series to a source of the first P-channel transistor to form an input interface for each of the plurality of circuit blocks.