Patent ID: 8822322
Filing Date: 2014-09-02
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor memory device, the method comprising: forming a mold stack on a substrate, the mold stack including first sacrificial layers and second sacrificial layers alternately stacked on the substrate; forming a plurality of vertical channels that penetrate the mold stack and that contact the substrate; patterning the mold stack to form word line cuts between the vertical channels, the word line cuts exposing the substrate; removing one of the first and second sacrificial layers to form recessed regions in the mold stack; forming gates in the recessed regions; forming a data storage layer, at least a portion of the data storage layer being formed between the vertical channels and the gates; forming air gaps between the gates by removing the other of the first and second sacrificial layers; and forming an insulation layer in the word line cuts.