Patent ID: 7315879
Filing Date: 2008-01-01
Classification: G06F

Abstract:
1. A multiply-accumulate module comprising: a multiply-accumulate core, wherein said multiply-accumulate core comprises: wherein said multiply-accumulate module includes a plurality of electrical paths which further include at least one critical path, said at least one critical path being an electrical path for which an amount of time that it takes for an electrical signal to travel from an input of said multiply-accumulate core to an output of said multiply-accumulate core is greater than or equal to a predetermined amount of time and less than a longest amount of time that it takes any other electrical signal to travel from said input of said multiply-accumulate core to said output of said multiply-accumulate core, wherein said predetermined amount of time is less than said longest amount of time; said plurality of Booth decoder cells includes at least one first Booth decoder cell and at least one second Booth decoder cell, each of said at least one first Booth decoder cell structurally the same as each of said at least one second Booth decoder cells except that at least one of a first plurality of transistors of said first Booth decoder cell is constructed to have a width greater than a width of a corresponding one of a second plurality of transistors of said second Booth decoder cell; said plurality of Wallace tree cells including at least one first Wallace tree cell and at least one second Wallace tree cell, each of said at least one first Wallace tree cell structurally the same as each of said at least one second Wallace tree cell except that at least one of a first plurality of transistors of said first Wallace tree cell is constructed to have a width greater than a width of a corresponding one a second plurality of transistors of said second Wallace tree cell; wherein said at least one first Wallace tree cell and said at least one first Booth decoder cell are disposed on said at least one critical path; and wherein said at least one second Wallace tree cell and said at least one second Booth decoder cell are disposed on an electrical path not said at least one critical path and are not disposed on any of said at least one critical path.