Patent ID: 8889542
Filing Date: 2014-11-18
Classification: H01L

Abstract:
1. A method of forming a via structure, the method comprising the steps of: forming a through-silicon via in a substrate, wherein the substrate has a first-surface and a second-surface; forming a back-end-of-line (BEOL) wiring level on the first-surface of the substrate, wherein the BEOL wiring level includes a contact pad; forming a photosensitive polyimide layer on the BEOL wiring level; forming an opening in the photosensitive polyimide layer; forming a ball limiting metallization (BLM) layer on the opening in the photosensitive polyimide layer; forming an adhesive layer on the photosensitive polyimide layer and the BLM layer; forming a mechanical support carrier layer on the adhesive layer; placing a conducting plate on the mechanical support carrier layer; forming an electrical path, through the mechanical support carrier layer and the adhesive layer, which connects the conducting plate to the contact pad; and performing an electroplating technique to fill the through-silicon via with a plated-conductive material.