Patent ID: 8263437
Filing Date: 2012-09-11
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: providing a sacrificial substrate; forming a first insulating layer over the sacrificial substrate; forming a first conductive layer over the first insulating layer; forming a first integrated passive device (IPD) in a first region over the first conductive layer by, forming a plurality of conductive pillars over the first IPD after forming the first IPD; disposing a first semiconductor die in a second region over the sacrificial substrate, the second region being laterally offset and separate from the first region; forming a first encapsulant over the first IPD to a top surface of the conductive pillars and first semiconductor die, the first encapsulant having a resistivity greater than 1.0 kohm-cm and a thickness of at least 50 micrometers; forming a second IPD over the first encapsulant opposite the first IPD such that the second IPD is stacked with respect to the first IPD and separated by the first encapsulant to reduce inter-device interference between the first and second IPD, wherein the first IPD is a capacitor or resistor and the second IPD is an inductor; forming a third insulating layer over the second IPD; removing the sacrificial substrate; and disposing a second semiconductor die over the first conductive layer opposite the first semiconductor die or first IPD.