Patent ID: 8530943
Filing Date: 2013-09-10
Classification: H01L

Abstract:
1. A semiconductor device with multiple unit cells that are arranged either one-dimensionally or multi-dimensionally, each said unit cell comprising: a substrate, which is made of a wide-bandgap semiconductor; an n-type drift layer, which is arranged on the substrate and which is made of the wide-bandgap semiconductor; a p-type well, which is defined in the drift layer; a first n-type doped region, which is defined in the well; a source electrode, which is electrically connected to the first n-type doped region; a second n-type doped region, which is defined in the drift layer so as to be adjacent to its own well and arranged between its own well and an adjacent unit cell's well and which has a higher dopant concentration than the drift layer; a gate insulating film, which covers at least partially the first and second n-type doped regions and the well; a gate electrode, which is arranged on the gate insulating film; and a third n-type doped region, which is defined in the drift layer and arranged adjacent to the second n-type doped region in a direction perpendicular to a thickness direction of the drift layer so as to cover one of the vertices of the unit cell when the drift layer is viewed perpendicularly to the surface of the drift layer in the thickness direction thereof and which has a lower dopant concentration than the second n-type doped region, and wherein the second n-type doped region is in contact with both of its own well and the adjacent unit cell's well at a region where the third n-type doped region does not exist.