Patent ID: 9087599
Filing Date: 2015-07-21
Classification: G11C

Abstract:
1. A method implemented in a flash storage device comprising: supplying a first voltage from a power source; charging a hold circuit to a second voltage in the flash storage device in response to the first voltage, wherein the hold circuit comprises a series of double layer capacitors; receiving a programming command from a host; writing a plurality of data portions into a data buffer of the flash storage device in response to the programming command; receiving a comparator output from a power monitoring circuit, the comparator output based on a comparison of the first voltage with respect to a reference voltage, the reference voltage fed from an electrical storage element coupled to the power source; determining that the comparator output indicates no disruption in power supplied from the power source, initiating, in response to the determination, a data transfer before the first voltage drops below a first threshold voltage, the data transfer comprising reading one or more of the plurality of data portions in the data buffer and writing the one or more of the plurality of data portions to a flash storage; supplying the second voltage to the data buffer and the flash storage; completing the data transfer before the second voltage of power supplied to the flash storage drops below a second threshold voltage at which data integrity is maintained for the data transfer; monitoring the first voltage; and inhibiting, based on the monitoring, a subsequent data transfer from occurring in the flash storage device if the first voltage drops below the first threshold voltage.