Patent ID: 7112996
Filing Date: 2006-09-26
Classification: H03K

Abstract:
1. A level shifter comprising: an input buffer, coupled to a first power voltage, configured to buffer an input signal swinging between a base level and a first voltage level to output a first small range signal having a reversed phase with respect to the input signal, and a second small range signal having substantially the same phase with respect to the input signal; a level shifting circuit having a first node and a second node, coupled to a second power voltage higher than the first power voltage, configured to transform the first and second small range signals into a first wide range signal and a second wide range signal, respectively, to output the first wide range signal via the first node and the second wide range signal via the second node when the first power voltage is higher than a given specified voltage level, the first and second wide range signals swinging between the base level and a second voltage level higher than the first voltage level; a voltage level detecting circuit configured to detect whether the first power voltage is lower than the given specified voltage level, and configured to maintain voltage levels of the first and second nodes as higher than or equal to a third voltage level to prevent floating of the first and second nodes by forming at least one of a first conduction path and a second conduction path through the voltage level detecting circuit between the first and second nodes when the first power voltage is lower than the specified voltage level, the third voltage level being lower than the second voltage level; an output buffer configured to buffer the first and second wide range signals to output third and fourth wide range signals; and a reference logic circuit, the reference logic circuit receiving the third and fourth wide range signals, outputting a fifth wide range signal having substantially the same phase with respect to the input signal when the first power voltage is equal to or greater than the given specified voltage level, and outputting the fifth wide range signal having a predetermined logic level regardless of the logic level of the input signal when the first power voltage is lower than the given specified voltage level.