Patent ID: 7400180
Filing Date: 2008-07-15
Classification: G11C

Abstract:
1. A semiconductor device comprising: an external input terminal; a plurality of resistor elements which are connected to said external input terminal, the plurality of resistor elements including a first resistor element and a second resistor element; and a plurality of input circuits each connected to said external input terminal through any one of said resistor elements, the plurality of input circuits including a first pair of input circuits and a second pair of input circuits, wherein said input circuits are activated in response to the level transition of supplied clock signals for accepting input signals; said clock signals having different phases being supplied to said respective input circuits for accepting signals supplied to said external input terminal, wherein said first resistor element is the only element provided between said external input terminal and said first pair of input circuits, and wherein said second resistor element is the only element provided between said external input terminal and said second pair of input circuits.