Patent ID: 6071803
Filing Date: 2000-06-06
Classification: H01L

Abstract:
A method for fabricating and forming electrical interconnection between bulk active devices and silicon-on-insulator devices in a thin film silicon-on-insulator semiconductor device, which comprises:a) providing active devices in the silicon-on-insulator bulk substrate;b) providing a top semiconductor substrate material located above said silicon-on-insulator bulk substrate;c) providing active devices on said top semiconductor substrate material;d) providing a dielectric layer on said top semiconductor substrate material;e) delineating contact trenches between active devices on the top semiconductor substrate material and the active devices in said silicon-on-insulator bulk substrate; andf) depositing conductivity electrical interconnection material in said trenches to thereby provide said electrical interconnection; andg) providing insulation so as to at least partially isolate the electrical interconnection from the top semiconductor substrate material.