Patent ID: 6211029
Filing Date: 2001-04-03
Classification: H01L

Abstract:
A process of fabricating a bipolar transistor, comprising the steps of:a) preparing a silicon substrate of a first conductivity type;b) introducing a first dopant impurity into a surface portion of said silicon substrate so as to form a heavily doped impurity region of a second conductivity type opposite to said first conductivity type;c) thermally growing a field insulating layer occupying at least an outer peripheral area of said heavily doped impurity region;d) selectively removing a central portion of said heavily doped impurity region for forming a recess therein;e) epitaxially growing a single crystal silicon in said recess so as to form a lightly doped epitaxial silicon layer of said second conductivity type; andf) forming a base region in a surface portion of said lightly doped epitaxial silicon layer and an emitter region in a surface portion of said base region.