Patent ID: 6473433
Filing Date: 2002-10-29
Classification: H04L,H04Q

Abstract:
A switch of a network connected to a switch control processor comprising:port cards which receive packets from and send packets to the network; a switch control processor for providing control information; and fabrics for switching the packets, the fabrics receiving control information from the switch control processor but all the fabrics only implementing the control information at a same logical time when each fabric receives a control initiation signal from one of the port cards, each respective fabric continuously operating on packets before, during and after each respective fabric receives the control initiation signal, each fabric enters a queue resynch state where all packet fragments received by the fabric before the queue resynch state is entered by the fabrics are dequeued, and any packet fragments received by the fabric after the queue resynch state is entered are dequeued only after a prespecified queue resynch time has elapsed, the fabrics connected to the switch control processor and the port cards, the fabrics receiving respective packet fragments from the port cards.