Patent ID: 6556035
Filing Date: 2003-04-29
Classification: G01R

Abstract:
A test key layout for finding via-open failures, comprising:a first test key layout for finding open vias underneath even-numbered metallic layers, wherein the first test key layout includes a substrate, a first plurality of vias, a plurality of metallic layers over a substrate such that all even-numbered metallic layers are in an open circuit state, and the first plurality of vias is within a dielectric layer underneath an even-numbered metallic layer but above an odd-numbered metallic layer; and a second test key layout for finding open vias underneath odd-numbered metallic layer, wherein the second test key layout includes a substrate, a second plurality of vias, a plurality of metallic layers over the substrate such that all even-numbered metallic layers are in a closed circuit state, and the second plurality of vias is within a dielectric layer underneath an odd-numbered metallic layer but above an even-numbered metallic layer.