Patent ID: 7670913
Filing Date: 2010-03-02
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device having multiple gate dielectric thickness layers, the method comprising: forming a masking layer over a semiconductor substrate in a first active region and a second active region of a semiconductor device; patterning the masking layer to expose the semiconductor substrate in the first active region; subjecting exposed portions of the semiconductor substrate to a nitrogen containing plasma, thereby forming a first layer of gate dielectric material over the semiconductor substrate in the first active region; incorporating oxygen into the first layer of gate dielectric material located in the first active region, and then removing the patterned masking layer; and forming a second layer of gate dielectric material over the first layer of gate dielectric material in the first active region and over the semiconductor substrate in the second active region, thereby resulting in a first greater thickness gate dielectric in the first active region and a second lesser thickness gate dielectric in the second active region, wherein the first greater thickness gate dielectric in the first active region includes the first layer of gate dielectric material and the second layer of gate dielectric material and the second lesser thickness gate dielectric in the second active region includes only the second layer of gate dielectric material.