Patent ID: 7132333
Filing Date: 2006-11-07
Classification: G11C,H01L

Abstract:
1. A method of manufacturing a transistor in a semiconductor substrate, comprising: providing said semiconductor substrate having a surface; defining isolation trenches in said surface of said semiconductor substrate, for laterally confining an active area in which the transistor is to be formed; filling said isolation trenches with an isolating material; providing a gate electrode which is isolated from said active area by a gate isolating material; providing a first and a second source/drain regions, wherein a conductive channel is formed between said first and second source/drain regions, a first direction being defined by a line connecting said first and second source/drain regions; wherein said step of providing a gate electrode comprises steps of: defining a groove in said active area by etching said groove in said surface of said semiconductor substrate, said groove extending from said surface of said semiconductor substrate in a direction perpendicular to said surface of said semiconductor substrate to a first depth; thereafter, defining a pocket in each said isolation trenches at a position adjacent to said groove so that said groove will be connected with two pockets and said groove is disposed between said two pockets, said two pockets extending to a second depth larger than said first depth; providing a gate isolating material at an interface between said active area and said groove and at an interface between said active area and said pockets; depositing a gate electrode material so as to fill said groove and said two pockets; partially removing said gate electrode material so that said gate electrode material is removed from the portions outside said groove and said two pockets.