Patent ID: 6921692
Filing Date: 2005-07-26
Classification: H01L,Y10S

Abstract:
1. A method of forming memory circuitry comprising: providing a semiconductor substrate comprising a pair of word lines having a bit node received therebetween, insulative sidewall spacers being received over opposing sidewalls of the word lines facing the bit node; depositing insulative material over the pair of word lines, the bit node and the insulative sidewall spacers; forming a bit node contact opening within the insulative material over the bit node; forming sacrificial plugging material within the bit node contact opening between the pair of word lines; from the bit node contact opening, removing sacrificial plugging material which is received between and at some common elevation with conductive portions of the pair of word lines, and replacing it with conductive material in the bit node contact opening that is in electrical connection with the bit node; and after the replacing, forming the conductive material into a bit line.