Patent ID: 6839869
Filing Date: 2005-01-04
Classification: G06F

Abstract:
1. A trace data control circuit comprising: a branch event generation circuit for outputting trace data related to a branch instruction in response to a branch instruction, a CPU-access event generation circuit for outputting a trace data related to a data access instruction in response to a data access instruction, a selection means capable of inputting at least trace data output from the branch-event generation circuit and trace data output from the CPU-access event generation circuit, and selecting trace data related to either one of these events, a memory means for storing the trace data, and a trace data abbreviation means that abbreviates one part of the trace data and outputs the trace data excluding the abbreviated part of the trace data, wherein said branch event generation circuit further comprises an address abbreviation information generation means for detecting an overlapped portion of a branch-source address with a branch-destination address from the upper address bit sides thereof, and generating a branch-destination address abbreviation information.