Patent ID: 8513037
Filing Date: 2013-08-20
Classification: H01L

Abstract:
1. A method for integrating a slotted waveguide with a complementary metal-oxide-semiconductor (CMOS), said method comprising: patterning a slot in a silicon-on-insulator (SOI) wafer utilizing a patterning technique; filling said slot with a nitride compound; patterning at least one waveguide region and at least one CMOS region in said SOI wafer; completing a trench isolation fill and polish back on said SOI wafer; stripping a nitride hard mask, wherein stripping a nitride hard mask etches said nitride compound in said slot to form a patterned slot area; depositing and patterning a nitride plug to fill the patterned slot area, and thereafter, performing CMOS and photonic fabrication on said SOI wafer; forming a via to said nitride plug; and removing said nitride plug in the patterned slot area to form an opening of said slotted waveguide.