Patent ID: 9122114
Filing Date: 2015-09-01
Classification: G02F,H01L

Abstract:
1. A method of manufacturing an array substrate, comprising: a first mask process of forming an inorganic material protrusion on a base substrate; a second mask process of forming a reflective region pattern, a gate electrode, and a common electrode respectively, from a first metal layer and a first transparent conductive layer, on the base substrate obtained from the first mask process; a third mask process of forming an active island formed of a semiconductor layer, on the base substrate obtained from the second mask process, forming a source electrode and a drain electrode, which are formed of a second metal layer, on the active island, and forming a channel from the semiconductor layer; a fourth mask process of forming an insulation material layer, on the base substrate obtained from the third mask process; treating the insulation material layer to form a planarization layer, and forming a through hole in the insulation material layer above the drain electrode; and a fifth mask process of forming a second transparent conductive layer on the planarization layer, and forming a pixel electrode from the second transparent conductive layer, the pixel electrode being connected to the drain electrode via the through hole in a reflective region.