Patent ID: 6718421
Filing Date: 2004-04-06
Classification: G06F

Abstract:
A bus for interconnecting a plurality of components, wherein the bus is configured as a ring with segments of the bus chaining from one component to another so as to reduce the amount of global wiring between the plurality of components, and wherein at least one component serves as a beginning and an end of the ring, the bus comprising:a plurality of unidirectional data signal lines connecting each of the plurality of components in the ring configuration, the data signal lines carrying data signals between components in a first direction; at least one unidirectional tag signal line connecting each of the plurality of components in the ring configuration, the at least one tag signal line carrying one or more tag signals between components in the first direction, wherein the at least one tag signal line indicates how the data signal lines should be interpreted when received at any of the plurality of components; and one or more unidirectional flow control signal lines connecting each of the plurality of components in the ring configuration, the one or more flow control signal lines carrying one or more flow control signals between components in a second direction, wherein the second direction is opposite the first direction.