Patent ID: 8609528
Filing Date: 2013-12-17
Classification: H01L

Abstract:
1. A method comprising: forming a dielectric layer; depositing a first photoresist layer over the dielectric layer; patterning the first photoresist layer with a first pattern; subsequent to patterning the first photoresist layer with the first pattern, etching first portions of the dielectric layer that are revealed by the first pattern in the first photoresist layer; subsequent to etching the first portions of the dielectric layer, removing the first photoresist layer; subsequent to removing the first photoresist layer, depositing a first metal layer over the dielectric layer; subsequent to depositing the first metal layer over the dielectric layer, depositing a second photoresist layer over each of (i) the first metal layer and (ii) the dielectric layer; patterning the second photoresist layer with a second pattern to reveal second portions of the dielectric layer, wherein third portions of the dielectric layer are not revealed by the second pattern in the second photoresist layer; subsequent to patterning the second photoresist layer with the second pattern, etching the second portions of the dielectric layer that are revealed by the second pattern in the second photoresist layer, wherein while the second portions of the dielectric layer are etched, the third portions of the dielectric layer are not etched; subsequent to etching the second portions of the dielectric layer, removing the second photoresist layer to expose the third portions of the dielectric layer; subsequent to removing the second photoresist layer, depositing a second metal layer directly over each of (i) the third portions of the dielectric layer and (ii) the first metal layer such that the second metal layer is in physical contact with each of (i) at least a section of the third portions of the dielectric layer and (ii) at least a section of the first metal layer; and subsequent to depositing the second metal layer over each of (i) the third portions of the dielectric layer and (ii) the first metal layer, planarizing the second metal layer to expose the third portions of the dielectric layer.