Patent ID: 7298006
Filing Date: 2007-11-20
Classification: G11C,H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a cell transistor comprising a floating gate formed on a semiconductor substrate via a gate insulating film and diffusion layers as source and drain regions, the diffusion layers being positioned on opposite sides of the floating gate and formed in the semiconductor substrate; first and second control gates which are formed above the diffusion layers and only on the opposite sides of the floating gate; and an inter-gate insulating film which insulates the first and second control gates from the floating gate and diffusion layers, wherein the inter-gate insulating film includes first and second portions, the first portion contacts the floating gate, the second portion contacts the lower surface of the first or second control gate, the second portion is a single layer of a silicon oxide film, the first portion is a stacked film including a silicon nitride film, and the floating gate is selected by the first and second control gates.