Patent ID: 7670942
Filing Date: 2010-03-02
Classification: H01L

Abstract:
1. A method of fabricating a SAC (self-aligned contact) pad, comprising: forming stacks of a conductive line and a capping layer on a semiconductor substrate, spacers covering sidewalls of the stacks, and an insulation layer simultaneously filling substantially the entire gaps between the stacks and exposing the top of the capping layer; etching an upper portion of the capping layer to form damascene grooves in the remaining capping layer and between the insulation layer; forming a plurality of first etching masks with a material different from that of the capping layer to fill the damascene grooves without covering the top of the insulation layer; forming a second etching mask having an opening region that simultaneously exposes some of the first etching masks and a portion of the insulation layer located between the first etching masks; etching the portion of the insulation layer exposed by the opening region using the first and second etching masks to form a plurality of opening holes; removing the second etching mask; forming a conductive layer filling the opening holes to cover the remaining first etching masks; and performing a chemical mechanical polishing (CMP) process on the conductive layer using the capping layer as a polishing end point to remove the first etching masks such that a plurality of self-aligned contact (SAC) pads separated from each other are formed that fill the opening holes, and wherein uppermost surfaces of the capping layer, uppermost surfaces of remaining portions of the insulation layer and uppermost surfaces of the SAC pads are all at a same height level as one another.