Patent ID: 7844418
Filing Date: 2010-11-30
Classification: G06F

Abstract:
1. A method for distributing a process variable using statistically-correct spatial interpolation, the method comprising: configuring a circuit simulation tool to perform computerized modeling of a chip to be fabricated using the process variable in a process step; forming, using the circuit simulation tool, an array of equilateral triangles in a planar coordinate frame on a region of the chip; assigning, using the circuit simulation tool, a numerical value of the process variable at each vertex of the array of equilateral triangles; defining, using the circuit simulation tool, a plurality of test points at respective spatial locations in the planar coordinate frame that are bounded by the array of equilateral triangles; distributing, using the circuit simulation tool, a numerical value of the process variable at each of the test points by spatial interpolation from one or more of the numerical values of the process variable assigned at each vertex of the array of equilateral triangles; and adjusting, using the circuit simulation tool, the numerical value of the process variable distributed at each of the test points with a respective correction factor.