Patent ID: 8541835
Filing Date: 2013-09-24
Classification: H01L

Abstract:
1. A field effect transistor (FET), comprising: a semiconductor on insulator substrate, the substrate comprising a top semiconductor layer; source and drain regions comprising silicide located in the top semiconductor layer; a channel region located in the top semiconductor layer between the source region and the drain region, the channel region having a thickness that is less than a thickness of the source and drain regions, wherein the channel region is in direct contact with the silicide of the source and drain regions; a gate located over the channel region; a supporting material comprising oxide located over the source and drain regions on both sides of the gate; and gate spacers comprising nitride located on both sides of the gate adjacent to the supporting material, wherein the gate spacers are located on top of and in direct contact with the channel region, and wherein the gate spacers are in direct contact with the silicide of the source and drain regions above the channel region.