Patent ID: 6281550
Filing Date: 2001-08-28
Classification: H01L,Y10S

Abstract:
A semiconductor inverter comprising:a semiconductor substrate;an insulator formed on said semiconductor substrate;a semiconductor layer formed on said insulator;a p-well formed in said semiconductor layer, said p-well being the output of said inverter;a gate structure formed atop said p-well, said gate structure being the input of said inverter and being formed from a thin gate oxide layer underneath a conductive layer, wherein a high voltage V.sub.cc or a low voltage V.sub.ss applied to said gate structure will result in a gate induced drain leakage current;an n-base formed adjacent to a first edge of said gate structure;a p+ structure formed within said n-base, said p+ structure constantly biased to said low voltage V.sub.ss during inverting operation; anda n+ structure adjacent a second edge of said gate structure, said n+ structure constantly biased to said high voltage V.sub.cc during inverting operation.