Patent ID: 6080931
Filing Date: 2000-06-27
Classification: H01L

Abstract:
A semiconductor package comprising:(a) two semiconductor chips, each semiconductor chip having a front surface on which a plurality of bonding pads are formed, and a rear surface opposite the front surface;(b) an insulating circuit film comprising(i) an insulating base film with a plurality of through holes,(ii) a plurality of metal lines formed on upper and lower faces of said base film, said metal lines respectively formed on said upper and lower faces being connected with each other via the through holes, wherein said upper and lower faces face said front surface of each corresponding semiconductor chip, and(iii) means for electrically connecting each of said metal lines with said bonding pads of the corresponding semiconductor chips;(c) a plurality of leads electrically connected with said metal lines and extended to connect to an external device wherein said plurality of leads are part of a lead frame, each lead including an inner lead for connecting outer pads to said external device; and(d) a package body surrounding a predetermined area containing said semiconductor chips, said insulating circuit film and said inner lead of said lead frame,wherein said means for electrically connecting comprises a plurality of protruded, conductive inner pads which are respectively formed on said metal lines, and an anisotropic conductor comprising a resin and conductive particles contained therein, for electrically connecting said inner pads with said bonding pads through said conductor, wherein said metal lines further comprises a plurality of protruded, conductive outer pads which are respectively formed on said metal lines apart by a selected interval from the plurality of inner pads and connected to said plurality of leads, and wherein said plurality of leads include an outer lead exposed at the lower surface of said package body.