Patent ID: 6516335
Filing Date: 2003-02-04
Classification: G06F

Abstract:
An incrementer device utilizing redundant overlapping of operations, the incrementer device comprising:an input stage comprising at least first, second and third operators, the second operator being located in between the first and third operators, each operator having an input and an output, each operator receiving at its input a first bit signifying that the device is operating as an incrementer device as opposed to a decrementer device and a second bit representing a binary number by which the incrementer device will increment; a first core stage, the first core stage comprising at least first and second operators, the first and second operators of the first core stage being adjacent one another, each operator of the first core stage having an input and an output; routing circuitry interconnecting the outputs of the first and second operators of the input stage to the input of the first operator of the first core stage, the routing circuitry interconnecting the outputs of the second and third operators of the input stage to the input of the second operator of the first core stage, to enable redundant overlapping of operations to be achieved; and an output stage comprising at least first, second, and third operators, the second operator of the output stage being located between the first and third operators of the output stage, each operator of the output stage receiving at its input a propagate signal from a previous bit in a previous stage of the incremented device and the signal routed down from a current bit position in the input stage.