Patent ID: 8264254
Filing Date: 2012-09-11
Classification: G11C,H03K

Abstract:
1. A semiconductor device comprising: a shift register comprising: wherein: the first line is configured to supply a first power source voltage, the second line is configured to supply a second power source voltage, a gate of the first transistor is directly connected to one of a source and a drain of the fourth transistor, the one of a source and a drain of the fourth transistor is directly connected to one of a source and a drain of the fifth transistor, one of a source and a drain of the first transistor is directly connected to the first line, the other of the source and the drain of the fifth transistor is directly connected to the first line, the other of the source and the drain of the first transistor is directly connected to one of a source and a drain of the second transistor, the other of the source and the drain of the second transistor is directly connected to one of a source and a drain of the third transistor, the other of the source and the drain of the third transistor is directly connected to the second line, a gate of the fourth transistor is directly connected to a gate of the fifth transistor, a gate of the second transistor is not directly connected to the other of the source and the drain of the fourth transistor, the gate of the second transistor is not directly connected to a gate of the third transistor, the gate of the third transistor is not directly connected to the gate of the first transistor, the semiconductor device does not comprise a sixth transistor, the sixth transistor comprises: the sixth transistor comprises: