Patent ID: 6040618
Filing Date: 2000-03-21
Classification: H01L

Abstract:
A carrier substrate for a semiconductor element, comprising:a substrate with a substantially planar surface having at least one elongated, substantially linear mesa defined by two inclined sidewalls rising therefrom and extending to a top surface substantially parallel to said substantially planar surface;an insulating layer disposed over said substantially planar substrate surface and said at least one elongated substantially linear mesa; anda plurality of conductive traces extending over said insulating layer and including mutually parallel, laterally spaced, substantially linear segments oriented transversely to said at least one elongated, substantially linear mesa, said mutually parallel, laterally spaced, substantially linear segments of said plurality of conductive traces each extending over a first portion of said planar substrate surface on one side of said at least one elongated mesa, over said at least one elongated, substantially linear mesa and onto a second portion of said substantially planar substrate surface on an opposing side of said at least one elongated, substantially linear mesa.