Patent ID: 7054972
Filing Date: 2006-05-30
Classification: G06F

Abstract:
1. A method for dynamically enabling and disabling interrupt coalescing in a data processing system, comprising: providing a counter suitable for tracking input/output load of an input/output processor, wherein the counter is incremented when a new input/output request is received by the input/output processor, and is decremented when the input/output processor posts a completed message back to a host processor; generating a timer interrupt periodically so that an interrupt service routine is periodically performed; comparing a current value of the counter with a store of a highest value of the counter seen since last timer interrupt when the input/output processor iterates a polling loop, wherein the current value becomes a maximum value stored when the current value is greater, and the highest value is the maximum value stored when the current value is not greater; comparing the maximum value stored with a first predetermined threshold value in the interrupt service routine; and enabling the interrupt coalescing when the maximum value stored is greater than the first predetermined threshold value.