Patent ID: 6812131
Filing Date: 2004-11-02
Classification: H01L,Y10S

Abstract:
A method of making conducting vias and conducting lines on a substrate comprising:depositing a stack having a top surface on a substrate, wherein the stack comprises a first organic intermetal dielectric layer, an etchstop layer applied to the first organic intermetal dielectric layer, a second organic intermetal dielectric layer, and a hardrnask layer, wherein the hardmask layer comprises a material comprising silicon oxynitride or silicon oxide; forming a via opening in said stack; depositing a sacrificial inorganic dielectric in the via opening, wherein the sacrificial inorganic dielectric substantially fills the via opening and substantially covers the top surface of the stack; depositing a photoresist material on the sacrificial inorganic dielectric; developing the photoresist material; forming a line opening in the stack and the sacrificial inorganic dielectric, said line opening substantially aligned with said via opening; selectively removing the sacrificial inorganic dielectric; and filling the via opening and the line opening with conducting material.