Patent ID: 8050157
Filing Date: 2011-11-01
Classification: G11B

Abstract:
1. A method of recovering clock timing from a bi-phase modulated portion of a high frequency modulation (HFM) signal, wherein the HFM signal comprises signal transitions between a high level and a low level, the method comprising: initiating a clock count upon detection of a first signal transition in the bi-phase modulated portion of the HFM signal, wherein the clock count corresponds to an expected clock timing of the HFM signal; stopping the clock count upon detection of a second signal transition in the bi-phase modulated portion of the HFM signal subsequent to the first signal transition, wherein an actual clock count comprises a number of clock cycles occurring between the first and second signal transitions based on the expected clock timing; identifying a first expected clock count between signal transitions of the bi-phase modulated portion of the HFM signal if the actual clock count between the first and second signal transitions falls within a first range of clock counts, wherein the first range of clock counts comprises the first expected clock count and a first subset of clock count deviations from the first expected clock count; and determining an error between the actual clock count and the first expected clock count.