Patent ID: 8501585
Filing Date: 2013-08-06
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device, comprising the steps of: adding a first impurity element imparting first conductivity type to a second region of the first semiconductor wafer, to form a first impurity region of a first transistor in the second region of the first semiconductor wafer; irradiating the first semiconductor wafer with ions to form an embrittlement layer in the first semiconductor wafer after adding the first impurity element; forming a first insulating layer over at least one of the first semiconductor wafer and a second semiconductor wafer; attaching the first semiconductor wafer to the second semiconductor wafer with the first insulating layer interposed therebetween; performing a second heat treatment to separate the first semiconductor wafer from the second semiconductor wafer along the embrittlement layer so that a semiconductor layer including the first impurity region is formed over the second semiconductor wafer; forming a second insulating layer over the semiconductor layer; forming a gate electrode over the second insulating layer; forming a third insulating layer over the gate electrode; forming a sidewall over the third insulating layer; adding a third impurity element so that a third impurity region is formed in the first impurity region; etching a part of the third insulating layer so that a part of an upper surface of the semiconductor layer is exposed; adding a fourth impurity element so that a fourth impurity region is formed under the third impurity region in the first impurity region; forming a metal layer containing cobalt over the semiconductor layer; and forming a silicide by heating the metal layer and the semiconductor layer.