Patent ID: 6649501
Filing Date: 2003-11-18
Classification: H01L

Abstract:
A method for forming a bit line of a semiconductor device, comprising:forming I-type active regions in a minimum line width on a semiconductor substrate, the active regions being separately positioned from the adjacent active regions by a minimum line width distance in lateral and longitudinal directions, and the active regions in adjacent rows are offset from each other in the longitudinal direction; forming word lines of a minimum line width which divide one I-type active region into three, and cross the divided I-type active regions; forming plug polys on the active regions between the word lines; forming an interlayer insulation film over the resultant structure; forming a bit line contact plug, such that a portion of the bit line contact plug is overlapped with at least one of the plug polys; and forming a bit line of a minimum line width between active regions, wherein a portion of the bit line is overlapped with the bit line contact plug and the bit line is orthogonal to the word lines and in parallel to the I-type active regions.