Patent ID: 9165106
Filing Date: 2015-10-20
Classification: G06F,Y02P

Abstract:
1. A method to create an electron-beam lithography layout, comprising: using a computer, which is configured to provide an integrated circuit layout made of multiple integrated circuit layers, to produce an electronic version of an initial integrated circuit layer made up of one or more design shapes; resolving the initial integrated circuit layer into a plurality of e-beam subfields, wherein respective e-beam subfields correspond to respective passes of an electron beam and wherein neighboring e-beam subfields meet at a stitching line which overlaps a length or area on a design shape in the initial integrated circuit layer; and modifying the electronic version of the initial integrated circuit layer to produce a modified integrated circuit layer in which the design shape is moved or altered to reduce the length or area of overlap between the design shape and the stitching line relative to the initial integrated circuit layer.