Patent ID: 6461920
Filing Date: 2002-10-08
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device and particularly forming, at a main surface of a semiconductor substrate, a first MIS transistor with a first threshold voltage having a first channel region and a second MIS transistor with a second threshold voltage having a second channel region, the first and second MIS transistors being of the same conductivity type, the method comprising the steps of:forming first and second active regions of the same conductivity type at said main surface of said semiconductor substrate for forming said first and second MIS transistors, respectively; forming said first channel region having a first impurity layer by implanting first conductivity type ions with a predetermined ion implanting energy into a region for said first channel region in said first active region; forming said second channel region having a second impurity layer by implanting first conductivity type ions with an ion implanting energy different from said predetermined ion implanting energy into a region for said second channel region in said second active region; forming a gate insulating film on said first and second channel regions; forming gate electrodes on said first and second channel regions with said gate insulating film therebetween, respectively; and forming source/drain regions of a conductivity type opposite the first conductivity type at positions in said main surface located at opposite sides of each of said first and second channel regions.