Patent ID: 6717475
Filing Date: 2004-04-06
Classification: H03L

Abstract:
A phase-locked loop (PLL) system having active times and inactive times, the system comprising:an apparatus configured to provide charge; a voltage-controlled oscillator (VCO) having a VCO input coupled and configured to receive charge from the apparatus, a tuning voltage at the VCO input being at a VCO-lock voltage when the phase-locked loop system is locked to a frequency; and a controller coupled to the apparatus and configured to provide a control signal to the apparatus to control the charge provided by the apparatus; wherein the apparatus is configured to provide, during at least a portion of an inactive time of the PLL system and in response to the control signal, charge such that the tuning voltage at the VCO input is approximately at the VCO-lock voltage at a start of an active time of the PLL system; and wherein during the inactive time of the PLL at least one component of the PLL for locking to a frequency is inoperative.