Patent ID: 7787579
Filing Date: 2010-08-31
Classification: H04L

Abstract:
1. A frame synchronous circuit for use in a dedicated short-range communication system applicable to a plurality of modulation schemes to transmit data between a roadside unit and a controlled device for controlling synchronization of the controlled device, comprising: a synchronous word detector for detecting a synchronous word from data received from the roadside unit; an FCMC (Frame Control Message Channel) data analyzer for analyzing the received data to retrieve first operational information from FCMC data included in the received data; an operation setting register group for setting the first operational information obtained by said FCMC data analyzer; and a synchronous manager for read out the first operational information from said operation setting register group and for controlling a synchronous state, said synchronous manager operative in response to the first operational information for generating a window signal for opening a window at a timing where the synchronous word is to be detected to supply the window signal to said synchronous word detector, said synchronous word detector being responsive to the window signal to refrain, when the window is not open, from detecting the synchronous word, said circuit further comprising input circuitry for receiving a control signal from a central processing unit (CPU) which controls said controlled device or from a terminal provided to said circuit, whereby said circuit controls the synchronization by the control signal.