Patent ID: 7103715
Filing Date: 2006-09-05
Classification: G06F,G11B

Abstract:
1. A buffer memory controller for a hard disk controller, the buffer memory controller comprising: a data buffer configured to buffer write operation data between a buffer memory that stores write operation data corresponding to a first write operation and a second write operation and a write head of a disk; a plurality of address registers configured to store, for each of the write operations, an address identifying a location of corresponding write operation data stored within the buffer memory; and controller logic configured to determine whether the first write operation and the second write operation write data to the same track and to transfer, for each of the write operations, the corresponding write operation data from the buffer memory to the data buffer based at least upon the corresponding address stored in the address registers, wherein the controller logic is further configured to transfer, based upon a single command to the controller logic, the data of the first write operation and the second write operation in an order other than the order in which the first and second write operations were received in the buffer memory when the first write operation and the second write operation write data to the same track.