Patent ID: 6844584
Filing Date: 2005-01-18
Classification: H01L

Abstract:
1. A memory cell comprising: a semiconductor component having semiconductor material and a top side, said semiconductor component selected from the group consisting of a semiconductor body and a semiconductor layer, said semiconductor material having an upper surface; said semiconductor material having a trench formed therein and a gate electrode located in said trench; a memory transistor including a source region and a drain region formed at said upper surface of said semiconductor material, said memory transistor including said gate electrode located on said top side and located in a lateral direction between said source region and said drain region, said source region and said drain region being located on opposite sides of said trench; a dielectric material separating said gate electrode from said semiconductor material; a layer sequence including boundary layers and a memory layer located between said boundary layers, said layer sequence located at least between said source region and said gate electrode and at least between said drain region and said gate electrode; and a barrier level of at least 2 eV being present between said semiconductor material and said memory layer.