Patent ID: 6893909
Filing Date: 2005-05-17
Classification: H01L

Abstract:
1. A method of manufacturing a metal-oxide-semiconductor (MOS) transistor, comprising the steps of: providing a substrate; forming a gate insulation layer and a conductive layer over the substrate sequentially; performing a pre-amorphization implantation on the conductive layer so that the conductive layer is amorphized; patterning the conductive layer and the gate insulation layer to form a gate structure; forming a first spacer on the sidewalls of the gate structure; forming a doped source/drain extension region in the substrate aside each side of the first spacer; forming a second spacer on the sidewall of the first spacer, meanwhile, performing a solid phase epitaxial process to re-crystallize the amorphized conductive layer in the gate structure and activating a plurality of first dopants in the doped source/drain extension region; and forming a doped source/drain region in the substrate on each side of the second spacer.