Patent ID: 8674919
Filing Date: 2014-03-18
Classification: G02F,G09G,H01L

Abstract:
1. A liquid crystal display device comprising: a plurality of picture elements that are arranged in columns and rows so as to form a matrix pattern, each said picture element including a liquid crystal layer and a plurality of electrodes for applying a voltage to the liquid crystal layer, wherein each said picture element includes a first sub-picture element and a second sub-picture element having the ability to apply mutually different voltages to their liquid crystal layer, wherein at a grayscale level, the first sub-picture element has a higher luminance than the second sub-picture element, gate bus lines; source bus lines; wherein each of the first and second sub-picture elements includes a liquid crystal capacitor formed by a counter electrode and a sub-picture element electrode that faces the counter electrode through the liquid crystal layer, and at least one storage capacitor, each being formed by a storage capacitor electrode that is electrically connected to the sub-picture element electrode, an insulating layer, and a storage capacitor counter electrode that is opposed to the storage capacitor electrode with the insulating layer interposed between them, a plurality of TFTs, wherein each of the first and second sub-picture elements includes a TFT that is connected to the sub-picture element electrode thereof; wherein after a display voltage representing a certain grayscale level has been applied to the respective sub-picture element electrodes of the first and second sub-picture elements, a voltage difference ΔVα is produced between voltages to be applied to the respective liquid crystal capacitors of the first and second sub-picture elements by way of their associated storage capacitor(s), wherein in some of the picture elements, the voltage difference ΔVα changes from one picture element to another, wherein the at least one storage capacitor includes two storage capacitors, wherein the counter electrode is a single electrode that is provided in common for the first and second sub-picture elements, wherein the storage capacitor counter electrodes of the two storage capacitors of the first sub-picture element are electrically independent of each other, and the storage capacitor counter electrodes of the two storage capacitors of the second sub-picture element are also electrically independent of each other; and wherein the first and second capacitor counter electrodes of the two storage capacitors of the first sub-picture element are electrically independent from the gate bus lines, and the first and second capacitor counter electrodes of the two storage capacitors of the second sub-picture element are electrically independent from the gate bus lines.