Patent ID: 6768333
Filing Date: 2004-07-27
Classification: G01R

Abstract:
Test circuitry within an integrated circuit for facilitating accurate measurement of input-to-output signal speed of the integrated circuit by means of external test equipment probes, the test circuitry comprising:input and output pads; a signal path between said input and output pads, wherein a signal transition applied by test equipment to said input pad propagates to said output pad along such signal path with some delay time to be measured; and a D-type flip-flop having a data input connected to the output pad, a clock input connected to a test clock pad, and a data output connected to a second output pad, the D-type flip-flop being located in said integrated circuit near said output pad and test clock pad; wherein probes of test equipment used to measure said input-to-output signal speed contact at least said input pad, said test clock pad and said second output pad, a signal transition applied at said input pad being registered by said D-type flip-flop and appearing at said second output pad when a variable frequency test clock signal applied to said test clock pad has a half-period coinciding with said delay time.