Patent ID: 8194664
Filing Date: 2012-06-05
Classification: H04L

Abstract:
1. An apparatus for a network element, the apparatus comprising: a first memory portion comprising a plurality of first data structures, wherein each of the plurality of first data structures includes an Internal Gateway Protocol (IGP) label and an adjacency identifier that identifies one of a plurality of outgoing interfaces in the network element, wherein each IGP label stored in any one of the plurality of first data structures indicates a Label Switched Path (LSP) through a network, wherein the first memory portion is a Table-Look-Up (TLU) memory and the plurality of first data structures is a plurality of TLU entries; a second memory portion comprising a plurality of IGP load-balancing entries, wherein each of the plurality of IGP load-balancing entries includes two or more reference values that point to two or more of the plurality of first data structures, and wherein any two or more IGP labels stored in any two or more of the plurality of first data structures, which are pointed to by any one of the plurality of IGP load-balancing entries, indicate two or more LSPs that all lead to a specific egress network element in the network; a third memory portion comprising a plurality of Border Gateway Protocol (BGP) load-balancing entries, wherein each of the plurality of BGP load-balancing entries includes a pointer that indicates one of the plurality of IGP load-balancing entries and an index value that is used to look-up the pointer; a fourth memory portion comprising a plurality of second data structures, wherein each of the plurality of second data structures includes a network address identifier and a unique value, wherein the unique value is associated with two or more of the plurality of BGP load-balancing entries and wherein the unique value is used in combination with information computed on a per-packet basis to select one BGP load-balancing entry from the two or more of the BGP load-balancing entries that are associated with the unique value, wherein the fourth memory portion is a Pointer-Look-Up (PLU) memory and the plurality of second data structures is a plurality of PLU entries; first logic which is configured to program the first memory portion, the second memory portion, the third memory portion, and the fourth memory portion; and second logic which is configured to forward one or more packets across the network based on the first memory portion, the second memory portion, the third memory portion, and the fourth memory portion, wherein the second logic is configured at least to: