Patent ID: 8768684
Filing Date: 2014-07-01
Classification: G06F,Y02D

Abstract:
1. An apparatus for processing information, the apparatus comprising: a processor operable to determine whether a migration condition exists for migrating, from a source information processing unit to a destination information processing unit, an instruction to be executed of a program, wherein whether the migration condition is determined to exist is based on a determination of a type of processing capability of the source information processing unit and the destination information processing unit and a type of processing capability called for by the instruction to be executed, to determine whether the instruction to be executed of the program is a predetermined instruction when a migration condition is determined to exist, and to be an instruction emulator to convert the instruction to be executed of the program to be executable by the destination information processing unit, only when the instruction to be executed is determined to be the predetermined instruction, wherein the source information processing unit includes a first CPU which implements a first instruction set, the destination information processing unit includes a second CPU which implements a second instruction set, the predetermined instruction is an instruction that is present in the first instruction set but is absent from the second instruction set so that the destination information processing unit does not have a capability to execute the predetermined instruction, and the instruction emulator, only when an instruction to be executed of the first instruction set is determined to be the predetermined instruction, converts the instruction to be executed of the first instruction set into at least one instruction that is present in the second instruction set.