Patent ID: 8098074
Filing Date: 2012-01-17
Classification: G11C

Abstract:
1. A monitoring circuit of a semiconductor device, comprising: a fuse unit including an anti-fuse, an electrical resistance of the anti-fuse changing according to an applied electrical stress, configured to output a fuse voltage corresponding to said electrical resistance, and a fuse state signal corresponding to an electrical connection state of the anti-fuse; a reference voltage generating unit configured to generate a reference voltage; a comparing unit which, in response to a change of said electrical resistance, compares the fuse voltage with the reference voltage and outputs a load detection signal based on a result of the comparison; and an output unit configured to output the load detection signal and the fuse state signal to an output pad, wherein the reference voltage generating unit generates a plurality of reference voltages, the comparing unit outputs a load detection signal for each of the plurality of reference voltages, and the output unit outputs the load detection signal for each of the plurality of reference voltages and the fuse state signal to the output pad, wherein the reference voltage generating unit includes a plurality of reference loads whose electrical resistance does not change with respect to an applied electrical stress, and a plurality of reference voltage generators for generating the plurality of reference voltages, wherein each reference voltage generator includes one of the plurality of the reference loads, generates a reference voltage corresponding to the electrical resistance of the one reference load, and each of the plurality of reference loads has a different electrical resistance, and wherein the fuse unit includes: