Patent ID: 6278183
Filing Date: 2001-08-21
Classification: H01L,H05K,Y02P

Abstract:
A semiconductor device comprising:a semiconductor chip having a pad mounting surface with a plurality of bonding pads provided thereon;a dielectric layer having opposite first and second adhesive surfaces, said first adhesive surface adhering onto said pad mounting surface of said semiconductor chip, said dielectric layer further having a plurality of holes at positions registered with said bonding pads to expose said bonding pads, said holes being confined by respective walls of said dielectric layer that cooperate with said registered bonding pads to form contact receiving spaces;a plurality of conductive contacts in said contact receiving spaces, respectively; anda printed circuit board having a circuit layout surface adhering onto said second adhesive surface of said dielectric layer, said circuit layout surface being formed with circuit traces that are bonded to said conductive contacts to establish electrical connection with said bonding pads,wherein at least one of said first and second adhesive surfaces is provided with a heat-curable adhesive having a curing point for said adhering thereof that is lower than a melting point of said conductive contacts.