Patent ID: 6921949
Filing Date: 2005-07-26
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device comprising: an amplifier circuit comprised of a first PMOS transistors having a gate electrode and a drain electrode connected together, a second PMOS transistor having a gate electrode connected to the gate electrode of the first PMOS transistor and a source electrode connected to a source electrode of the first PMOS transistor, a first NMOS transistor having a drain electrode connected to the drain electrode of the first PMOS transistor and a gate electrode set as a first input terminal, and second NMOS transistor having a drain electrode connected to a drain electrode of the second PMOS transistor, a source electrode connected to a source electrode of the first NMOS transistor, and a gate electrode set as a second input terminal, at least one of the first NMOS transistor and the second NMOS transistor being comprised of a buried channel transistor; wherein the semiconductor integrated circuit device comprises an A/D converter.