Patent ID: 8369976
Filing Date: 2013-02-05
Classification: H01L

Abstract:
1. A method for increasing overall yield in semiconductor manufacturing comprising: processing wafers or wafer lots with a first tool from a first group of tools; recording process variation data for each tool of the first group of tools; recording process variation data for each tool of a second group of tools; comparing the recorded process variation data for the first tool to the recorded process variation data for each tool of the second group of tools; determining a second tool from the second group of tools that at least partially neutralizes or compensates for the recorded process variation for the first tool; routing the wafers or wafer lots from the first tool to the determined second tool after processing the wafers or wafer lots with the first tool based on the comparing the recorded process variation for the first tool to the recorded process variation data for each tool of the second group of tools; and updating the routing as new process variation data is received, wherein: