Patent ID: 8692577
Filing Date: 2014-04-08
Classification: H03K

Abstract:
1. A driver circuit, comprising: an output pMOS transistor that is connected, at a source thereof, to a first terminal to which a first potential is applied and, at a drain thereof, to an output terminal at which an output signal is output, the source and a back gate of the output pMOS transistor being connected to each other; an output nMOS transistor that is connected, at a source thereof, to a second terminal to which a second potential lower than the first potential is applied and to the output terminal at a drain thereof, the source and a back gate of the output nMOS transistor being connected to each other; a first pre-driver circuit that is connected to a gate of the output pMOS transistor at an output part thereof, receives a first pulse signal at an input part thereof, and outputs, at an output part thereof, a first gate signal that is obtained by inverting the first pulse signal; a second pre-driver circuit that is connected to a gate of the output nMOS transistor at an output part thereof, receives a second pulse signal at an input part thereof, and outputs, at an output part thereof, a second gate signal that is obtained by inverting the second pulse signal; an auxiliary pMOS transistor that is connected to a first potential line at a source thereof and to the gate of the output pMOS transistor at a drain thereof; an auxiliary nMOS transistor that is connected at a source thereof to a second potential line having a lower potential than the first potential and to the gate of the output nMOS transistor at a drain thereof; a first controlling circuit that outputs, to a gate of the auxiliary pMOS transistor, a first controlling signal that rises in synchronization with a rising of the first pulse signal and falls after a delay from a falling of the first pulse signal; and a second controlling circuit that outputs, to a gate of the auxiliary nMOS transistor, a second controlling signal that rises in synchronization with a rising of the second pulse signal and falls after a delay from a falling of the second pulse signal.