Patent ID: 8001405
Filing Date: 2011-08-16
Classification: G06F

Abstract:
1. A method for power management of a processor chip, comprising the steps of: setting an initial operating level for the processor chip at an initial time point t calculating power consumption slack after a predetermined time interval as a difference between the desired processor chip power consumption and an average of the actual processor chip power consumption from the time point t if the slack is greater than zero, increasing the initial operating level to a next higher level thereby increasing the actual processor chip power consumption, otherwise if the slack is less than zero, maintaining the initial operating level; re-calculating the slack after the predetermined time interval, wherein the re-calculated slack further includes slack, if any, that has accumulated during one or more previous intervals added thereto; if the re-calculated slack is greater than zero, increasing the operating level to the next higher level if the processor chip is being operated at the initial operating level, otherwise if the re-calculated slack is less than zero, returning the operating level to the initial operating level if the processor chip is being operated at the next higher operating level; and repeating the steps of re-calculating the slack and either increasing the operating level to the next higher level or returning the operating level to the initial operating level.