Patent ID: 7804474
Filing Date: 2010-09-28
Classification: G09G

Abstract:
1. An overdriving circuit for source drivers to overdrive a LCD module, said overdriving circuit comprising: a first threshold detection logic unit configured to receive a gray scale data value associated with a pixel from an overdriving timing controller, compare the gray scale data value with a first predetermined threshold value, and output a first control signal as a result of the comparison between the gray scale data value and the first predetermined threshold value; a second threshold detection logic unit configured to receive the gray scale data value, compare the gray scale data value with a second predetermined threshold value and to a third predetermined threshold value, and output a resulting second control signal indicative of whether the gray scale data value is within a range between the second and third predetermined threshold value; and a selection logic unit configured to receive the gray scale data value and a plurality of gray scale compensation data, and issue one output data value selected among the gray scale data value and the plurality of gray scale compensation data for driving the pixel according to said first control signal, said second control signal, and a third control signal, wherein said selection logic unit comprises: a first multiplexer configured to receive a first one and a second one of said plurality of gray scale compensation data, and output one of said first and said second gray scale compensation data according to said third control signal; a second multiplexer configured to receive a third one and a fourth one of said plurality of gray scale compensation data, and output one of said third and said fourth gray scale compensation data according to said third control signal; and a third multiplexer configured to receive outputs of said first and said second multiplexers and the gray scale data value, and issue the output data selected among the gray scale data value and the outputs of said first and said second multiplexers according to said first and second control signals.