Patent ID: 9122633
Filing Date: 2015-09-01
Classification: G06F

Abstract:
1. A computer system comprising: a first subsystem; a control program that resides and executes in a control subsystem within the first subsystem that includes one or more CPU(s) each with an associated memory, wherein the control subsystem is protected by one or more of hardware and firmware from access by programs located in other parts of the system, and at least the associated memory of the control subsystem contains programs and data that constitute information required to manage, supervise, and support the system, wherein the control program further has access to information in a remainder of the system, and an ability to control processes and information in the remainder of the system; and a second subsystem including one or more additional CPU(s) each with an associated memory, the second subsystem does not boot but begins execution upon receipt of an instruction from a control subsystem CPU via a hardware/firmware dispatcher, the second subsystem providing a facility for execution and storage of user programs and one or more of user data and databases, wherein the hardware/firmware dispatcher between the control subsystem and the second subsystem facilitates the ability of the control subsystem to manage and control the second subsystem, and buffers the control subsystem from the second subsystem and enables communication between the two subsystems, the hardware/firmware dispatcher between the control subsystem and the second subsystem insulates the control subsystem from any interference by the second subsystem by not allowing the second subsystem access to operating system memory or storage, and controls the dispatching and execution of user programs in the second subsystem in response to commands and data from the control subsystem, and relays information from the second subsystem to the control subsystem.