Patent ID: 6803957
Filing Date: 2004-10-12
Classification: H04N

Abstract:
An image sensor comprising a plurality of linear image sensor ICs arranged linearly, each linear image sensor IC comprising: a plurality of unit light receiving circuits, each unit light receiving circuit comprised of a photodiode for receiving light reflected by an image to be sensed, a first amplifier for amplifying an output signal of the photodiode which varies in response to the received light, a read-out switch for selectively reading out an output of the first amplifier, and a reset switch for resetting the photodiode to an initial potential, wherein a first electrode of the photodiode is held at a fixed potential, a second electrode of the photodiode that varies depending on the received light is connected to an input terminal of the first amplifier, an output terminal of the first amplifier is connected to an input terminal of the read-out switch, an output terminal of the read-out switch is connected to an output terminal of a read-out switch of all of the other unit light receiving circuits through a common signal line, a first electrode of the reset switch is connected to the second electrode of the photodiode, and a second electrode of the reset switch is connected to a reference voltage that serves as the initial potential; and wherein each of the linear image ICs further comprises a scanning circuit for performing a scanning operation by successively scanning the read-out switch and the reset switch of the respective unit light receiving circuits such that output signals from the respective unit light receiving circuits are read out separately by first activating the read-out switch of the respective unit light receiving circuit and during activation of the read-out switch activating and deactivating the reset switch for resetting the photodiode of the respective unit light receiving circuit to the initial potential; a second amplifier for further amplifying a signal read out on the common signal line; and a chip select switch for selectively enabling the second amplifier so that output signals dependent upon a light reception amount are externally read out from the respective unit light receiving circuits in the order of arrangement of the unit light receiving circuits.