Patent ID: 6890770
Filing Date: 2005-05-10
Classification: B82Y,H01L

Abstract:
1. A method for fabricating a magnetoresistive random access memory device structure, the method comprising the steps of: providing a semiconductor substrate having a first transistor and second transistor formed therein; forming an operative magnetic tunnel junction element device in electrical contact with said first transistor; forming at least a portion of a false magnetic tunnel junction element device in electrical contact said second transistor; depositing a first dielectric layer overlying said at least a portion of a false magnetic tunnel junction element device and said operative magnetic tunnel junction element device; patterning and etching said first dielectric layer to simultaneously form a first via to said at least a portion of a false magnetic tunnel junction element device and a second via to said operative magnetic tunnel junction element device; and depositing an electrically conductive interconnect layer so that said electrically conductive interconnect layer extends from said at least a portion of a false magnetic tunnel junction element device to said operative magnetic tunnel junction element device.