Patent ID: 8804392
Filing Date: 2014-08-12
Classification: G11C

Abstract:
1. A content addressable memory chip comprising: a memory array with content addressable memory cells arranged in a matrix; a plurality of match lines each coupled with a plurality of content addressable memory cells belonging to a corresponding entry of the memory array; and a plurality of match amplifiers each operable to determine one of coincidence and non-coincidence of search data with stored data in the content addressable memory cells in the entry of the memory array, according to a voltage of corresponding one of the match lines, wherein each of the match amplifiers comprises one or more NMOS transistors and one or more PMOS transistors, and wherein each of the match amplifiers has a dead zone to an input of a voltage of corresponding one of the match lines, and has a property that no flow-through current is present in each of the match amplifiers.