Patent ID: 6375060
Filing Date: 2002-04-23
Classification: B23K,H05K

Abstract:
A joining method, comprising:furnishing a microelectronic chip having a chip bonding location thereon; furnishing a substrate having a substrate bonding location thereon, at least one of the chip bonding location and the substrate bonding location comprising a metallic solder; furnishing a heating element; removing surface contamination and oxide from the chip bonding location and from the substrate bonding location; thereafter joining the microelectronic chip and the substrate, the step of joining including the steps of positioning the microelectronic chip and the substrate in a facing contact with the chip bonding location and the substrate bonding location in registry in a contact region, and with the heating element disposed adjacent to the chip bonding location and the substrate bonding location to form an assembly, there being no flux present in the assembly in the contact region, placing the assembly into an oven having a non-oxidizing environment; and bonding the chip bonding location and the substrate bonding location, the step of bonding including the substeps of heating the assembly to a preheating temperature of less than a melting temperature of the solder, and thereafter reflowing the solder by locally heating the contact region to a reflow temperature of greater than the melting temperature of the solder using the heating element, permitting the solder in the contact region to melt for a reflow period of time above the melting temperature of the solder, and then cooling the contact region to a temperature below the melting temperature of the solder.