Patent ID: 7109757
Filing Date: 2006-09-19
Classification: G11C,H03K

Abstract:
1. A circuit which blocks a keeper from interfering with a dynamic node during an evaluation phase for a dynamic wide-NOR structure, comprising: a precharge device which is coupled to the dynamic node, wherein the precharge device precharges the dynamic node during a precharge phase; a plurality of parallel pull-down transistors which are coupled to the dynamic node, wherein the pull-down transistors conditionally discharge the dynamic node during the evaluate phase; the keeper, which is configured to sustain a precharged value on the dynamic node, thereby preventing a false evaluation caused by a leakage current through the parallel pull-down transistors; and a feedback gating device which is coupled between the keeper and the dynamic node; a narrow pulse generator which generates a feedback control signal that controls the feedback gating device, wherein the feedback control signal is active for a predetermined time which is shorter than the active phase of an input to the narrow pulse generator; and wherein during the evaluation phase the feedback gating device blocks the keeper, so that the parallel pull-down transistors can discharge the dynamic node without interference from the keeper.