Patent ID: 7638366
Filing Date: 2009-12-29
Classification: H01L

Abstract:
1. A method of providing additional conductive pathways to a plurality of integrated circuits, each integrated circuit having a plurality of terminals, the method comprising: providing a wafer having a first and a second major surface, the plurality of integrated circuits disposed on a first major surface thereof, each of the plurality of integrated circuits having a plurality of terminals arranged in a common layout, and the plurality of integrated circuits disposed in a repeating pattern over at least a portion of the first major surface; providing a conductor carrier having a first major surface and a second major surface, a first plurality of contact terminals disposed on the first major surface of the conductor carrier in a pattern that corresponds to the terminal layout of the plurality of integrated circuits; providing a street map on the second major surface of the conductor carrier; and attaching the conductor carrier to the wafer such that the first major surface of the wafer and the first major surface of the conductor carrier are facing each other, and such that at least a portion of the terminals of the integrated circuits are in electrical contact with the first plurality of contact terminals; wherein each of the first plurality of contact terminals is electrically coupled to a corresponding one of a second plurality of contact terminals disposed on the second major surface of the conductor carrier.