Patent ID: 7417284
Filing Date: 2008-08-26
Classification: H01L

Abstract:
1. A semiconductor device including a cell region in which a vertical semiconductor switching cell group is formed, and a peripheral region located on the periphery of the cell region, the vertical semiconductor switching cell group not being formed in the peripheral region, the semiconductor device comprising: a semiconductor layer that is continuously formed from the cell region to the peripheral region; an insulating layer covering the surface of the semiconductor layer in the peripheral region; and a conductor layer covering at least the surface of the cell region, wherein: a super junction structure in which a combination of a first portion region extending in the layer thickness direction and including first conductivity-type impurities and a second portion region extending in the layer thickness direction and including second conductivity-type impurities are repetitively formed in a plane perpendicular to the layer thickness direction is formed in a lower region of the semiconductor layer of the cell region; a semiconductor upper layer including second conductivity-type impurities, the semiconductor upper layer extending into the cell region, and a semiconductor lower layer including first conductivity-type impurities whose concentration is lower than the first portion region constituting the combination of the cell region are formed in the semiconductor layer of the peripheral region; a body region including the second conductivity-type impurities is formed on a surface portion of the semiconductor upper layer of the cell region so that a concentration of impurities in the body region is greater than a concentration of impurities in the semiconductor upper layer; and the conductor layer is connected to a main electrode at the surface side that constitutes the vertical semiconductor switching cell group.