Patent ID: 6430243
Filing Date: 2002-08-06
Classification: H04L,H04N

Abstract:
A phase detector for detecting the phase error of a complex signal comprising:a subtractor having a first input coupled to an in-phase (I) signal and a second input coupled to a quantized I signal wherein the quantized I signal is subtracted from the I signal to produce a &Dgr;I signal; a before-after symbol processor, having the I signal as an input, for processing a plurality of symbols to determine the signs of each symbol and determine changes in the signs from one symbol to the next, in response to the signs of each symbol the before-after symbol processor produces a phase error sign correction signal and a phase error gating signal, wherein said before after symbol processor further comprises: a symbol sign determination circuit, having the I signal as an input, for producing a current symbol sign signal, said symbol sign determination circuit comprising: a sign detector for producing a sign signal; an inverter for inverting the sign signal; and a threshold processor for producing said phase error sign correction signal as a +1 when the inverted sign signal is greater than 0.5 and a âˆ’1 when the inverted sign signal is less than 0.5; a first delay for delaying said current symbol sign signal; a first XOR gate for performing an exclusive OR function upon said current symbol sign signal and said delayed current sign signal to produce a sign change signal that indicates a sign change between the current symbol and the previous symbol; a second delay for delaying said sign change signal; a second XOR gate for performing an exclusive OR function upon the delayed sign change signal and the sign change signal to produce the phase error gating signal; a first multiplier having said &Dgr;I signal as a first input and said phase error sign correction signal as a second input and having an output that is a sign corrected phase error signal; and a second multiplier having said sign corrected phase error signal as a first input and said phase error gating signal.