Patent ID: 6255207
Filing Date: 2001-07-03
Classification: H01L

Abstract:
A method for forming upon a substrate employed within a microelectronics fabrication a dielectric layer comprising:providing a substrate employed within a microelectronics fabrication;forming upon the substrate a patterned microelectronics layer;forming upon the patterned microelectronics layer a blanket fluorine-doped silicon containing glass (FSG) low dielectric constant dielectric layer employing a high density plasma chemical vapor deposition (HDP-CVD) method;forming over the blanket fluorine-doped silicon glass (FSG) low dielectric constant dielectric layer a second blanket low dielectric constant dielectric layer; andforming over the second blanket low dielectric constant dielectric layer a silicon oxide dielectric layer to form a composite inter-level metal dielectric (IMD) layer.