Patent ID: 6107148
Filing Date: 2000-08-22
Classification: H01L

Abstract:
A method for fabricating a semiconductor device comprising:a first step for forming an electrically insulating layer on an active area defined on a surface of a semiconductor substrate;a second step for forming a conductive layer on said insulating layer;a third step for forming a patterned photoresist layer of a downward tapered shape on said conductive layer;a fourth step for forming a gate electrode by patterning said conductive layer using a mask provided by bottom portions of said patterned photoresist layer;a fifth step for forming heavily doped regions at both sides of said gate electrode by introducing ions using a mask provided by top portions of said patterned photoresist layer;a sixth step for removing said patterned photoresist layer; anda seventh step for forming lightly doped regions at both sides of said gate electrode by introducing ions using a mask provided by said gate electrode.