Patent ID: 6166794
Filing Date: 2000-12-26
Classification: G02F

Abstract:
A liquid crystal display device comprising:a first substrate;a second substrate disposed opposite to the first substrate;a liquid crystal sealed in a space between the first and the second substrate;gate lines formed in longitudinal rows on the first substrate;a layer insulating film formed over the gate lines and comprising silicon dioxide having a dielectric constant of not more than 3;source lines formed in transverse lines on the layer insulating film to form a matrix with the gate lines;thin-film transistors each electrically connected to the gate line and the source line;pixel electrodes formed in regions demarcated by the intersecting gate lines and the source lines and connected to the thin-film transistors, respectively; andgate insulating films interposed between active semiconductor layers and gate electrodes integrally formed with the gate lines of the thin-film transistors, the gate insulating films comprising tantalum oxide having a dielectric constant of at least 23;wherein formation of a parasitic capacitance between the source lines and the gate lines is suppressed by the dielectric constant of the layer insulating film disposed between the gate lines and the source lines at intersections of the gate lines and source lines being lower than the dielectric constant of the gate insulating films, thereby suppressing signal delay in the gate lines caused by the parasitic capacitance.