Patent ID: 8405941
Filing Date: 2013-03-26
Classification: H01L

Abstract:
1. An electrostatic discharge (ESD) protection apparatus comprising: a first metal-oxide-semiconductor field effect transistor (MOSFET) coupled between a pad and a low-level voltage, the first MOSFET having a parasitical silicon controlled rectifier (SCR) equivalent circuit parasitizing in the first MOSFET, the first MOSFET comprising: a first equivalent resistor coupled between a gate of the first MOSFET and the low-level voltage; a transistor switch coupled between the pad and the first equivalent resistor and configured to conduct currents between the pad and the first equivalent resistor; a second equivalent resistor coupled between the pad and a control terminal of the transistor switch; an equivalent capacitor coupled between the control terminal of the transistor switch and the low-level voltage; an N-type buffer region, the P-type heavily doped region and the at least one N-type heavily doped region being formed in the N-type buffer region; a P-type body region; and an N-type well region, the P-type body region and the N-type buffer region being formed in the N-type well region; wherein when electrostatic discharge charges occurs on the pad, the transistor switch conducts currents between the pad and the first equivalent resistor, such that the first MOSFET turns on and the electrostatic discharge charges are discharged through the SCR equivalent circuit.