Patent ID: 7403432
Filing Date: 2008-07-22
Classification: G11C

Abstract:
1. A read-out circuit for reading out an item of memory information stored in a memory unit, where the memory unit comprises two non-volatile memory cells having different programming states, and where the memory information of the memory unit is given by the programming states of the two memory cells, the read-out circuit comprising: a volatile signal memory having two inputs and at least one output, the inputs, during the read-out of the memory information of the memory unit, being connected to read outputs of the two memory cells and the memory information of the memory unit being able to be read out at the at least one output; first selective coupling means between a first input of the signal memory and a read output of a first memory cell, and selectively coupling the first input of the signal memory to the read output of the first memory cell during read-out of the memory information; and second selective coupling means between a second input of the signal memory and a read output of a second memory cell, and selectively coupling the second input of the signal memory to the read output of the second memory cell during read-out of the memory information.