Patent ID: 7374987
Filing Date: 2008-05-20
Classification: H01L

Abstract:
1. A method for making stressed spacer structures for devices in a substrate, the devices including devices of a first conductivity type and devices of a second conductivity type, the devices each having a gate terminal and a channel for conducting charge extending in the substrate in a longitudinal direction, the method steps comprising: forming a first spacer structure on the sidewalls of the gate terminal of a first device of the first conductivity type, the first spacer structure comprising a first stress inducing material adjacent to both the sidewall of the first one of the device's gate terminal and its channel which applies a first type of mechanical stress on the first one of the devices at least in the longitudinal direction, the first type of mechanical stress being one of tensile stress and compressive stress; and depositing a second spacer material on the sidewalls of the gate terminal of a second device of the second conductivity type, the second spacer structure comprising a second stress inducing material adjacent to both the sidewall of the second one of the device's gate terminal and its channel which applies a second type of mechanical stress different from the fist type of the mechanical stress, on the second one of the devices at least in the longitudinal direction, the second type of the mechanical stress being the other of the tensile stress and the compressive stress, said first and second conductivity type devices being respectively an NFET and PFET devices, and said first and second type mechanical stress being respectively induced by a tensile material and a compressive induced material.