Patent ID: 7560379
Filing Date: 2009-07-14
Classification: H01L

Abstract:
1. A method of fabricating a semiconductive device, comprising: forming at least one gate over a semiconductor substrate; forming source/drains adjacent the at least one gate and within the semiconductor substrate; forming a raised layer adjacent the at least one gate and over the source/drains, wherein a thickness of the raised layer is a function of a thickness of the at least one gate and a depth of the source/drains; depositing a silicidation layer over the at least one gate and the raised layer; and siliciding the raised layer and at least substantially siliciding the at least one gate with the silicidation layer; wherein the thickness of the raised layer is sufficient to prevent silicidation from penetrating a junction of the source/drains at a shallowest doping point of the source/drains when the at least one gate is substantially silicided.