Patent ID: 7129779
Filing Date: 2006-10-31
Classification: G05F,H01L

Abstract:
1. A semiconductor device comprising: a high-potential power source terminal to be applied with a power source voltage varying from a low potential to a high potential; a floating block configured as an island by surrounding a semiconductor layer formed on a semiconductor substrate with a separation-and-diffusion region, the potential of the island being biased by the voltage of said high-potential power source terminal; a MOS transistor having a source connected to a low-potential power source terminal and outputting a reference voltage between said high-potential power source terminal and a drain; first and second bipolar transistors having collectors and bases connected to said high-potential power source terminal; a first resistor connected between the emitter of said first bipolar transistor and the drain of said MOS transistor; second and third resistors connected in series between the emitter of said second bipolar transistor and the drain of said MOS transistor; and a differential amplifier for controlling conduction of said MOS transistor by comparing an intermediate connection point of said second and third resistors and the emitter potential of said first bipolar transistor, wherein the transistor active region of said first and second bipolar transistors, said MOS transistor, and said first to third resistors are formed within said floating block.