Patent ID: 7764329
Filing Date: 2010-07-27
Classification: G02F

Abstract:
1. A pixel circuit of a multi-domain vertical alignment liquid crystal display (MVA LCD) device, comprising: a first sub-pixel unit, which comprises a first storage capacitor with one end electrically connected to a first coupling signal line providing a first coupling electrode signal, a first liquid crystal (LC) capacitor and a first thin-film transistor (TFT) having a source electrically connected to a data line, a gate electrically connected to a scan line, and a drain electrically connected to one end of the first LC capacitor and the other end of the first storage capacitor; a second sub-pixel unit, which comprises a second storage capacitor electrically connected to a storage bus line providing a common voltage, a second liquid crystal (LC) capacitor and a second thin-film transistor (TFT) having a source electrically connected to the data line, a gate electrically connected to the scan line, and a drain electrically connected to one end of the second LC capacitor and the other end of the second storage capacitor; and a third sub-pixel unit, which comprises a third storage capacitor electrically connected to a second coupling signal line providing a second coupling electrode signal, a third liquid crystal (LC) capacitor and a third thin-film transistor (TFT) having a source electrically connected to the data line, a gate electrically connected to the scan line, and a drain electrically connected to one end of the third LC capacitor and the other end of the third storage capacitor; wherein the first sub-pixel unit has a first pixel voltage, the second sub-pixel unit has a second pixel voltage, and the third sub-pixel unit has a third pixel voltage, and wherein the first pixel voltage is coupled with the voltage level of the first coupling electrode signal and the third pixel voltage is coupled with the voltage level of the second coupling electrode signal.