Patent ID: 7163870
Filing Date: 2007-01-16
Classification: G03F,H01L

Abstract:
1. A method of manufacturing a semiconductor integrated circuit device, comprising steps of: forming trenches in a semiconductor substrate such that said trenches defines active regions and dummy regions not functioning as a semiconductor element; forming a first insulating film over said trenches; filling said first insulating film in said trenches by polishing said first insulating film to form element isolation insulating films filled in said trenches; forming semiconductor elements on said active regions; forming a second insulating film over said semiconductor elements; and polishing said second insulating film, forming dummy interconnections over said second insulating film such that said dummy interconnections do not function as an element; forming a third insulating film over said dummy interconnections; and polishing said third insulating film, wherein said dummy regions and said dummy interconnections are regularly arranged at a scribing area, respectively.