Patent ID: 6486693
Filing Date: 2002-11-26
Classification: G01R

Abstract:
An automatic test system adapted for testing source synchronous parts, each part having data outputs and a data clock output, the automatic test system comprising:a) an interface unit having a support structure for receiving a device under test, the support structure providing connection points for the data outputs and data clock outputs of a device under test; b) a buffer amplifier, the amplifier having an input and an output, with the input being connected to the connection point for the data clock output; c) a plurality of receive channel circuits, each of the receive channel circuits having a comparator circuit with a data input, a strobe input and an output, the output being latched in response to the strobe input; d) a first plurality of transmission lines each carrying a signal between a connection point for the data outputs on the interface unit and a data input of the comparator circuit in a receive channel circuit; and e) a second plurality of transmission lines each carrying a signal between the output of the buffer amplifier and a strobe input of a comparator circuit of a receive channel; f) wherein the second plurality of transmission lines introduces a shorter propagation delay than the first plurality of transmission paths.