Patent ID: 6750920
Filing Date: 2004-06-15
Classification: H04N

Abstract:
A video signal adjusting circuit, comprising:a first gain cell, wherein the first gain cell receives an amplitude control signal and a current-mode video signal, wherein the first gain cell adjusts the amplitude of the current-mode video signal based on the amplitude control signal to produce an amplitude adjusted current-mode video signal; a second gain cell, wherein the second gain cell receives the amplitude control signal and a current-mode bias control signal, wherein the second gain cell adjusts the amplitude of the current-mode bias control signal based on the amplitude control signal to produce an amplitude adjusted current-mode bias control signal; and a summing node operably coupled to the first and second gain cells, wherein the summing node combines the amplitude adjusted current-mode video signal and the amplitude adjusted current mode bias control signal to produce an amplitude adjusted biased current-mode video signal.