Patent ID: 6742247
Filing Date: 2004-06-01
Classification: H01L,H05K,Y10T

Abstract:
A process for interconnecting at least two high-layer-count (HLC) substrates comprising the steps of:forming a first via in a first HLC substrate and a second via in a second HLC substrate, the first via extending through at least a portion of the first HLC substrate to a bottom surface of the first HLC substrate and the second via extending through at least a portion of the second HLC substrate to a top surface of the second HLC substrate; forming a first conductive pad on the bottom surface of the first HLC substrate and a second conductive pad on the top surface of the second HLC substrate, the first conductive pad being in electrical contact with the first via and the second conductive pad being in electrical contact with the second via; applying solder paste to a surface of the first conductive pad; reflowing the solder paste to form a first solder bump on the first conductive pad; positioning an adhesive film between the bottom surface of the first HLC substrate and the top surface of the second HLC substrate, the adhesive film having an aperture substantially located between the first solder bump and the second conductive pad; pressing the first HLC substrate and the second HLC substrate together to adhere at least a portion of the bottom surface of the first HLC substrate to at least a portion of the top surface of the second HLC substrate and where the first solder bump occupies at least a portion of the aperture in the adhesive film; and reflowing the first solder bump to form at least part of a solder segment providing an electrical connection between the first and second conductive pads.