Patent ID: 8258568
Filing Date: 2012-09-04
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a first isolation region formed on the semiconductor substrate; a first element region isolated via the first isolation region; a first gate insulating film formed on the first element region; a first gate electrode formed on the first gate insulating film; a second isolation region formed on the semiconductor substrate; a second element region isolated via the second isolation region; a second gate insulating film formed on the second element region; and a second gate electrode formed on the second gate insulating film, wherein: the first isolation region has a width smaller than that of the second isolation region; and in a channel width direction of the first element region, a first area defined by a first line, a second line and the first element region is smaller than a second area defined by a third line, a fourth line and the second element region, the first line extending from part of the first element region which is the highest in the channel width direction, in a direction parallel to a main surface of the semiconductor substrate, the second line extending from part of the first element region which is located at an end thereof in the channel width direction, in a direction perpendicular to the main surface of the semiconductor substrate, the third line extending from part of the second element region which is the highest in the channel width direction, in the direction parallel to the main surface of the semiconductor substrate, the fourth line extending from part of the second element region which is located at an end thereof in the channel width direction.