Patent ID: 7033846
Filing Date: 2006-04-25
Classification: H01L

Abstract:
1. A method for processing integrated circuit devices, the method comprising: introducing a test wafer into a production run of wafers to form a run of wafers to be processed, each of the wafers being before a gate dielectric production process; inserting the run of wafers into a process for gate dielectric production; forming a silicon oxynitride layer to a first predetermined thickness of less than 40 Angstroms at a predetermined temperature using a nitrogen bearing species and an oxygen bearing species; removing the test wafer from the run; forming a second oxidation overlying the silicon oxynitride layer to a second thickness, the second thickness being based substantially upon a nitrogen bearing concentration in the silicon oxynitride layer; determining a difference value between the first predetermined thickness and the second thickness; and correlating the difference value to one of a plurality of nitrogen concentrations to determine a nitrogen concentration in the first predetermined thickness.