Patent ID: 6815993
Filing Date: 2004-11-09
Classification: H03D,H03H

Abstract:
A &pgr;/2 phase shifter, comprising:a phase shifter circuit for receiving an input signal and an inverted input signal thereof and producing first and second intermediate signals having a same amplitude and being out of phase from each other, said phase shifter circuit further producing first and second inverted intermediate signals respectively corresponding to said first and second intermediate signals with their respective phases inverted; and a phase difference correction circuit for receiving said first and second intermediate signals produced by said phase shifter circuit and said first and second inverted intermediate signals and outputting a set of signals that are out of phase from each other by &pgr;/2, said phase difference correction circuit including an adder circuit for outputting a first output signal obtained by first addition of said first intermediate signal and said second intermediate signal, a second output signal obtained by second addition of said first intermediate signal and said second inverted intermediate signal, a third output signal obtained by third addition of said first inverted intermediate signal and said second inverted intermediate signal, and a fourth output signal obtained by fourth addition of said first inverted intermediate signal and said second intermediate signal; a first mixer configured to multiply the first and third output signals by in-phase signals; and a second mixer configured to multiply the second and fourth output signals by quadrature signals.