Patent ID: 8703545
Filing Date: 2014-04-22
Classification: H01L

Abstract:
1. A method for preparing a power semiconductor package using an aluminum alloy lead-frame comprising a plurality of chip mounting areas and a plurality of pins arranged along a periphery of the chip mounting areas, the method comprising the steps of: electroplating a first metal electroplating layer, a second metal electroplating layer and a third metal electroplating layer on the surface of the lead-frame in sequence; attaching a semiconductor chip at a top surface of the chip mounting area, and electrically connecting a plurality of electrodes arranged at a front surface of the semiconductor chip to corresponding pin connecting areas in different pins through a plurality of bonding wires; depositing a molding compound to encapsulate a portion of the top surface of the chip mounting area as well as the semiconductor chip, the bonding wires and the pin connecting area; and electroplating a fourth metal electroplating layer on the third metal electroplating layer at an external portion of each pin extending outside of the molding compound wherein the first metal electroplating layer, the second metal electroplating layer and the third metal electroplating layer are provided without a noble metal electroplating layer.