Patent ID: 6487685
Filing Date: 2002-11-26
Classification: G06F,H03M

Abstract:
A method for minimizing ECC bits in variable sized data formats, comprising:determining a number of ECC bits needed for each of a plurality of data formats; creating a common data representation equal in size to a largest data format in the plurality of data formats, the common data representation for using a single implementation of error detection and correction logic for all of the plurality of data formats; choosing an ECC matrix and default values for unused data bits such that for smaller data formats, any ECC bits beyond the minimum required for that sized data format will have known values thereby allowing smaller data formats to go through the error detection and correction logic using the common data representation; retrieving a data entry from memory, the data entry having one of the plurality of data formats; formatting the data entry into the common data representation; populating unused bits in the common data representation with chosen default values, the chosen default values chosen to provide known values for any ECC bits that are only needed for larger data formats thereby minimizing the number of ECC bits stored in each of the plurality of data formats; generating a syndrome for the common data representation using the ECC matrix; detecting errors in the common data representation in response to the syndrome including any number of â€œ1â€  bits; correcting errors in the common data representation using the syndrome and the ECC matrix; reformatting the common data representation into a format of the retrieved data entry.