Patent ID: 6504585
Filing Date: 2003-01-07
Classification: G02F

Abstract:
A liquid crystal display device comprising:first and second gate signal lines formed on a first insulating substrate; a terminal electrically connected to said first gate signal line to receive a drive voltage; first and second thin-film transistors each having a source electrode, a gate electrode and a drain electrode; a first pixel electrode electrically connected to either the source electrode or the drain electrode of said first thin-film transistor, a second pixel electrode electrically connected to either the source electrode or the drain electrode of said second thin-film transistor, both of said first and second pixel electrodes being disposed between said first and second gate signal lines; a first video signal line electrically connected to the other one of the source electrode or the drain electrode of said first thin-film transistor, a second video signal line electrically connected to the other one of the source electrode or the drain electrode of said second thin-film transistor; a second insulating substrate which is transparent and superposed on said first insulating substrate; a transparent common electrode provided at a position where it is opposed to said first and second pixel electrodes of said second insulating substrate; liquid crystals provided between said common electrode and said first and second pixel electrodes; a first light-shielding film formed on said second insulating substrate, said first light-shielding film having first and second openings with respect to said first and second pixel electrodes, respectively, and covering peripheries of said first and second pixel electrodes; and second light-shielding films formed on said first insulating substrate, each of said second light-shielding films being electrically connected to said second gate signal line and overlapped with an edge region of either said first pixel electrode or said second pixel electrode while extending along either of said first video signal line or said second video signal line; wherein the gate electrode of said first thin-film transistor is electrically connected to a first portion of said first gate signal line; wherein the gate electrode of said second thin-film transistor is electrically connected to a second portion of said first gate signal line which is more remote than the first portion of said first gate signal line from said terminal; wherein the area of a portion where said edge region of said second pixel electrode is overlapped with one of said second light shielding films is selected to be smaller than the area of a portion where said edge region of said first pixel electrode is overlapped with another of said second light-shielding films.