Patent ID: 8497170
Filing Date: 2013-07-30
Classification: H01L

Abstract:
1. A semiconductor device manufacturing method comprising: forming an element isolation insulating film in a semiconductor substrate to define a first active region and a second active region; forming a first gate insulating film containing silicon oxide having a first film thickness on the first active region and a second gate insulating film containing silicon oxide having a second film thickness thinner than the first film thickness; forming a polysilicon film above the semiconductor substrate, the first gate insulating film and the second gate insulating film; patterning the polysilicon film to form a first gate electrode on the first gate insulating film and a second gate electrode on the second gate insulating film; forming an insulating film above the semiconductor substrate, the first and second gate electrodes; anisotropically etching the insulating film to leave first side wall insulating films on side wall of the first gate electrode and on side wall of the second gate electrode; removing the first side wall insulating film on the side wall of the first gate electrode; and after removing the first side wall insulating film on the side wall of the first gate electrode, thermally treating in an oxidizing atmosphere the semiconductor substrate to form a second side wall insulating film on the side wall of the first gate electrode.