Patent ID: 6436746
Filing Date: 2002-08-20
Classification: H01L

Abstract:
A method of forming a gate structure, comprising the steps of:forming a primary insulation layer adjacent a semiconductor substrate, the primary insulation layer comprising a first material; forming a disposable gate having sidewalls on the primary insulation layer; forming an isolation dielectric layer on and in contact with the primary insulation layer and said sidewalls of said disposable gate, the isolation dielectric layer comprising a second material, the second material different from the first material and selectively etchable relative to said first material; removing the disposable gate to expose a portion of the primary insulation layer; removing the exposed portion of the primary insulation layer to expose a portion of the substrate using an etch process selective to the first material relative to the second material; forming a gate insulator on the exposed portion of the substrate; and forming a gate on the gate insulator and isolated from said substrate.