Patent ID: 6792443
Filing Date: 2004-09-14
Classification: G06F

Abstract:
A method comprising:maintaining a first form of an intermediate result of an operation in a first register; maintaining a second form of the intermediate result in a second register; responsive to receiving digits 1 to Lâˆ’2 of the intermediate result from a digit recurrence unit, where L represents a number of digits that satisfies a predetermined precision for the operation, updating each of the first form and the second form of the intermediate result by register swapping or concatenation under the control of load and shift control logic and on-the-fly conversion logic; generating a rounded result by determining digits dLâˆ’1 and dL and deriving from these the two digits dâ€²Lâˆ’1 and dLrnd which are then appended to either the first form of the intermediate result or the second form of the intermediate result.