Patent ID: 8179511
Filing Date: 2012-05-15
Classification: G02F

Abstract:
1. A liquid crystal panel comprising: a gate line and a data line crossing each other to define a pixel; a thin film transistor including: a gate electrode connected to the gate line; a semiconductor layer formed on the gate electrode; a source electrode connected to the data line; a drain electrode; a gate insulating layer between the gate electrode and the drain electrode and between the gate line and the drain electrode; a compensating parasitic capacitor between the gate line and the drain electrode for compensating a parasitic capacitance between the gate electrode and the drain electrode; and a pixel electrode connected to the drain electrode, wherein the drain electrode has at least a first end and a second end, the first end of the drain electrode overlapping with the gate electrode, a parasitic capacitor with the parasitic capacitance being provided between the gate electrode and the first end of the drain electrode, the second end of the drain electrode overlapping with the gate line, the compensating parasitic capacitor being provided between the gate line and the second end of the drain electrode, wherein the drain electrode is formed parallel with the gate line, wherein a width of the gate line corresponding with a portion of the drain electrode between the first end and the second end of the drain electrode is narrower than that of the gate line overlapped by the second end of the drain electrode, and wherein the portion of the drain electrode is not overlapped with the gate line.