Patent ID: 7913055
Filing Date: 2011-03-22
Classification: G06F,Y02D

Abstract:
1. A method of accessing a data structure that has been stored as two portions accessible concurrently over a time period larger than that represented by a single access, within symmetric and asymmetric memory components of main memory, respectively, where the symmetric memory components are each configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component, and where the asymmetric memory components are each configured to enable block write operations in which a write to an address within a block of one of the asymmetric memory components affects the availability of other addresses within the block of the asymmetric memory component, the method comprising: receiving a command from an application to access a data structure associated with multiple virtual addresses mapped to main memory; configuring symmetric memory components of the main memory and asymmetric memory components of the main memory to interface with a memory table controller; querying, based on the virtual addresses associated with the data structure and from within the memory table controller, a memory table that manages first virtual addresses associated with first physical addresses in symmetric memory components and second virtual addresses associated with second physical addresses within asymmetric memory components; identifying, based on results of the query of the memory table, a first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components; in response to identifying the first subset of virtual addresses for the data structure that are mapped to the symmetric memory components, identifying, from among the first physical addresses in the symmetric memory components, a first subset of physical addresses in the symmetric memory components that correspond to the first subset of virtual addresses for the data structure and accessing data from the symmetric memory components using the first subset of physical addresses; in response to identifying the second subset of virtual addresses for the data structure that are mapped to the asymmetric memory components, identifying, from among the second physical addresses within the asymmetric memory components, a second subset of physical addresses within the asymmetric memory components that correspond to the second subset of virtual addresses for the data structure and accessing data from the asymmetric memory components using the second subset of physical addresses; generating a response to the command received from the application to access the data structure by integrating the data accessed from the symmetric memory components using the first subset of physical addresses and the data accessed from the asymmetric memory components using the second subset of physical addresses; and providing the generated response to the application without providing the application with an indication of whether the data included in the response was accessed within the symmetric memory components or the asymmetric memory components.