Patent ID: 6028340
Filing Date: 2000-02-22
Classification: H01L,Y10S

Abstract:
A static random access memory (SRAM) cell including first and second load devices, first and second access transistors, first and second drive transistors and two bit lines, comprising:a substrate having a field region with an axis;an active region in the substrate, the active region being formed to be diagonally symmetrical around the axis of the field region;gate electrodes of the first and second access transistors crossing the active region, the gate electrodes of the first and second access transistors are parallel with each other;gate electrodes of the first and second drive transistors crossing the active region, the gate electrodes of the first and second drive transistors are parallel with each other; andfirst and second load devices on the gate electrodes of the first and second access transistors, the first and second load devices are parallel with each other.