Patent ID: 6096636
Filing Date: 2000-08-01
Classification: H01L

Abstract:
A semiconductor processing method of forming a plurality of conductive lines comprising the following steps:providing a semiconductive substrate;providing an inner insulative layer over the semiconductive substrate;providing a first conductive material layer over the semiconductive substrate;providing an outer insulative layer over the first conductive layer;etching through the outer insulative layer and the first conductive layer to both form a plurality of first conductive lines from the first conductive layer and provide a plurality of grooves between the first lines, the first lines being capped by outer insulative layer material, the first lines having respective sidewalls, the grooves having respective open widths;etching an opening through the inner insulative layer and substantially into the semiconductive substrate between at least one pair of adjacent first lines, the opening comprising one sidewall which is collinear with one of the sidewalls of one of the first lines of the one pair;depositing another insulative layer over the etched outer insulative layer and first conductive layer, the first line sidewalls, and the opening sidewall to a thickness which is less than one-half the respective groove open widths to less than completely fill the grooves and which is less than one-half the opening width to less than completely fill the opening;anisotropically etching the another insulative material layer to define insulating sidewall spacers over the first line sidewalls, one of the spacers being formed continuously over the one first line sidewall and the opening sidewall;after providing the insulating sidewall spacers, depositing a second conductive material layer to a thickness effective to fill the remaining grooves and the opening; andwithout photomasking, planarize etching the second conductive material layer to form a plurality of second lines within the grooves which alternate with the first lines and within the opening through the inner insulative layer and substantially into the semiconductive substrate.