Patent ID: 7719540
Filing Date: 2010-05-18
Classification: G06F,G06T,G09G

Abstract:
1. A graphics processor, comprising: a multithreading, multi-core graphics engine to process pixel data; a render-cache, readily accessible to the graphics engine, to store the pixel data; and, a render-cache controller to maintain the order in which each thread is dispatched to the graphics engine in line with the multithreading, multi-core graphics engine processing the pixel data corresponding to each thread, and to maintain data coherency between the render-cache and a main memory, wherein the render-cache controller is to block a thread from dispatching to the graphics engine if the thread specifies a cache-line address of the render-cache containing a pixel in flight, and wherein a single look-up of the render-cache controller acquires information to control the thread being dispatched to or blocked from the graphics engine based on the data coherency maintained by the render-cache controller and the order of the thread maintained by the render-cache controller.