Patent ID: 9087714
Filing Date: 2015-07-21
Classification: H01L

Abstract:
1. A semiconductor integrated circuit comprising: a substrate having a first conductivity type; a first MOS transistor formed in the substrate; and a second MOS transistor formed in the substrate, the first MOS transistor including the second MOS transistor including wherein, alternatively, the second drain region and the second source region of the second MOS transistor are formed in the substrate and having the second conductivity type between at least one of the plurality of first source regions of the first MOS transistor and the active region having the first conductivity type, such that said at least one of the plurality of first source regions of the first MOS transistor is proximate to the second drain region of the second MOS transistor; the active region having the first conductivity type; a second gate electrode formed on the substrate between the second drain region and the second source region; a second drain electrode connected to the second drain region; a second source electrode connected to the second source region; and a second substrate electrode connected to the active region having the first conductivity type, wherein the first substrate electrode is electrically separate from the plurality of first drain electrodes, wherein the second MOS transistor is connected between the first substrate electrode and (i) at least one of the plurality of the plurality of first drain electrodes or (ii) at least one of the plurality of first source electrodes, wherein the plurality of first source electrodes and the first substrate electrode are electrically connected to and disconnected from each other, in accordance with a control voltage applied to the second gate electrode of the second MOS transistor, and wherein the plurality of first source electrodes are simultaneously connected to the second drain electrode.