Patent ID: 8031033
Filing Date: 2011-10-04
Classification: H01F,H05K,Y10T

Abstract:
1. A solenoid delay line disposed on at least two layers of a multilayer printed circuit board (PCB), comprising: a first plurality of first discrete delay elements formed on a first layer of said PCB; and a second plurality of second discrete delay elements formed on a second layer of said PCB, distinct from said first layer, each of said first discrete delay elements being electrically connected to at least one of said discrete second delay elements and corresponding ones of said first and second delay elements are connected to each other through vias formed in said PCB; wherein the delay line includes at least two parts having parallel solenoid axes and electrically connected together by an intermediate part selected from the group consisting of: an intermediate part formed by alternating first and second elements and extending transversally with respect to the axes of the at least two parts; an intermediate part having a star-like configuration and defining a 180-degree turn, an intermediate ground pad, the at least two parts forming a 180-degree turn at the intermediate ground pad.