Patent ID: 6504402
Filing Date: 2003-01-07
Classification: G06F,G11C,H01L,H03K

Abstract:
A semiconductor integrated circuit comprising:a plurality of circuit blocks, each of which has a standby state and an active state; wherein a first circuit block of said plurality of circuit blocks is in the standby state and a second circuit block of said plurality of circuit blocks is in the active state at one time, a substrate voltage of a MOS transistor of said first circuit block is set so that a threshold voltage of the MOS transistor of the first circuit block in standby state becomes higher than the threshold voltage of the MOS transistor of the first circuit block in active state, and a substrate voltage of a MOS transistor of said second circuit block is set so that a threshold voltage of the MOS transistor of the second circuit block in standby state becomes higher than the threshold voltage of the MOS transistor of the second circuit block in active state.