Patent ID: 6324225
Filing Date: 2001-11-27
Classification: G11B,H04L

Abstract:
A detector, comprising:a slicer operable to receive a clock signal and a data signal, to sample the data signal, and to generate a sequence of data samples;a sequence table operable to store predetermined information corresponding to the sequence of data samples and to provide the stored information in response to the sequence;a phase-error estimator operable to use the stored information to determine a phase error between the clock signal and a data sample from the sequence of data samples and to generate a phase-correction signal corresponding to the determined phase error; andcomparison circuitry coupled to the slicer, the sequence table, and the phase-error estimator, the comparison circuitry operable to determine whether the stored information provided by the sequence table is valid and to provide the stored information to the phase-error estimator if the stored information is valid.