Patent ID: 6291304
Filing Date: 2001-09-18
Classification: H01L

Abstract:
A process for manufacturing a high voltage bipolar transistor, comprising:providing an N type silicon wafer having an upper surface;through a mask, ion implanting first acceptor ions to form a P+ layer extending downward from said upper surface and then heating the wafer in order to perform a drive-in diffusion;depositing, by means of epitaxial growth, a layer of N type silicon having a thickness between about 4 and 5 microns;growing a layer of field oxide on said epitaxial layer and then patterning and etching the field oxide thereby delineating the area of said high voltage transistor as well as providing a base opening;implanting acceptor ions through said base opening followed by a rapid thermal anneal;re-growing said layer of field oxide;forming openings in the field oxide for two collector contacts and an emitter;through said openings, forming N+ regions by introduction of donor ions;using photoresist, forming a mask that covers all exposed surfaces except where a base contact is to be formed;etching all field oxide not covered by the photoresist; andthrough a mask, implanting acceptor ions to form a P+ base contact region.