Patent ID: 7650457
Filing Date: 2010-01-19
Classification: G06F,G11C

Abstract:
1. A memory module storing data in the form of code words, each code word comprising useful bits and check bits for error correction, the memory module comprising: a first group of memory devices including check bits and a second group of memory devices including useful bits, the memory devices of the second group forming ranks, each rank being addressed as a whole, wherein the first group of memory devices and the second group of memory devices form a plurality of rank groups, each rank group including at least two ranks and a memory device from the first groups, wherein memory areas are defined in each memory device of the first group, each of said memory areas being individually assigned to a rank of the selected rank group; an interface; and a connecting device transferring bit packets each containing useful bits and check bits in the parallel format between the interface and the memory devices of a selected rank group; and an access control device configured to write code words, the access control device being activated in order to select, for each bit packet, a rank of the selected rank group and to input useful bits to all the memory devices of the second group of the selected rank, and simultaneously to select, from the memory device, of the first group, assigned to the selected rank group, that area which is assigned to the selected rank, and to input check bits to the selected area of the memory device of the first group.