Patent ID: 7834792
Filing Date: 2010-11-16
Classification: H03M

Abstract:
1. A synchronous analog to digital conversion system comprising: first and second synchronized analog to digital converters; an ADC synchronizing circuit for synchronizing operation of said first and second analog to digital converters; a first signal conditioning circuit responsive to a first direct current signal, said first signal conditioning circuit is associated with an input of said first analog to digital converter, wherein said first signal conditioning circuit has a first gain and a first time delay; a second signal conditioning circuit responsive to a second direct current signal, said second signal conditioning circuit is associated with an input of said second analog to digital converter, wherein said second signal conditioning circuit has a second gain and a second time delay, said second gain differs from said first gain by at least an order of magnitude; wherein said first time delay and said second time delay are balanced based upon a specified tolerance such that a first output of said first signal conditioning circuit based upon said first direct current signal is provided to said input of said first analog to digital converter at substantially the same time as a second output of said second signal conditioning circuit based upon said second direct current signal is provided to said input of said second analog to digital converter.