Patent ID: 6368911
Filing Date: 2002-04-09
Classification: H01L

Abstract:
A method of manufacturing a semiconductor containing buried gates having a drain region and a source region on opposite sides of the buried gates, comprising the steps of:providing a substrate; forming a first trench in the substrate, the first trench being adjacent to the location where the drain region and the source region will be formed, the trench having a bottom and opposing sides; forming a first dielectric layer over an interior surface of the first trench; forming a first conductive layer that fills the first trench; forming a plurality of second trenches extending through the first conductive layer to separate the first conductive layer into a plurality of buried floating gates below a surface level of the substrate, the second trenches extending between the opposing sides of the first trench and to the first dielectric layer on at least the bottom of the first trench; and forming an insulation layer in at least the second trenches to further insulate the buried floating gates from each other.