Patent ID: 7506210
Filing Date: 2009-03-17
Classification: G01R

Abstract:
1. A method for debugging a configuration process of a device having programmable logic and a JTAG interface comprising: providing a first connection between a configuration device and the device having programmable logic through the JTAG interface; providing a second connection between the configuration device and an input/output pin of the device having programmable logic which is separate from the JTAG interface; initiating the configuration process for the device having programmable logic; coupling configuration process signals to the input/output pin of the device having programmable logic; using boundary scan registers of the device having programmable logic to capture the configuration process signals received at the input/output pin of the device during the configuration process; using the boundary scan registers to transfer the captured configuration process signals to a configuration analyzer during the configuration process; analyzing the transferred configuration process signals using the configuration analyzer; and verifying the second connection between the configuration device and the input/output pin of the device having programmable logic coupled to receive the configuration process signals.