Patent ID: 8683416
Filing Date: 2014-03-25
Classification: G06F

Abstract:
1. A method, comprising: identifying, by a device, a plurality of signal channels for connecting circuit blocks, assigning, by the device, a channel priority to each signal channel, of the plurality of signal channels, based on one or more channel criteria; allocating, by the device, a channel implementation area, corresponding to the substrate, for each signal channel of a plurality of signal channels, based on the channel priority assigned to the signal channel and based on the block implementation areas associated with the circuit blocks; identifying a set of signal wires corresponding to one signal channel of the plurality of signal channels; selecting a wire pattern for the set of signal wires, allocating a wire implementation area, based on the wire pattern, for each signal wire corresponding to the set of signal wires; and generating, by the device, an integrated circuit design comprising the channel implementation area allocated for each signal channel of the plurality of signal channels,