Patent ID: 7573078
Filing Date: 2009-08-11
Classification: H01L

Abstract:
1. A transistor, comprising: an active region; source and drain electrodes in contact with said active region; a gate between said source and drain electrodes, said gate directly on said active region along the entire length of said gate; at least two spacer layers, wherein each of said spacer layers at least partially comprises a dielectric material; and at least two field plates, a first spacer layer on substantially all of the surface of said active region between said gate and said drain electrode and between said gate and source electrode, a first field plate on said first spacer layer, and the remaining of said spacer layers and field plates arranged alternately over said first of said spacer layers and said first field plate, an outermost of said field plates electrically connected to said source electrode and each of said field plates below said outermost of said field plates electrically connected to said gate or source electrode, wherein said first field plate does not overlap said gate and wherein said outermost field plate extends over said gate and on either side of said gate toward said source and said drain.