Patent ID: 8738962
Filing Date: 2014-05-27
Classification: G06F

Abstract:
1. A method of managing memory, the method comprising: storing data in a primary memory in communication with a processor; storing in a mirrored memory mirrored data that mirrors the data stored in the primary memory, wherein the mirrored data is compressed and wherein the mirrored memory is in communication with the processor; detecting a failure condition associated with the primary memory; in response to the detected failure condition, enabling the processor to access the mirrored data in the mirrored memory and disabling the processor from accessing the data in the primary memory, wherein enabling the processor to access the mirrored data in the mirrored memory and disabling the processor from accessing the data in the primary memory further comprises changing a virtual address associated with a physical address of the primary memory to a virtual address associated with a physical address of the mirrored memory; and in response to a corrective action configured to resolve the failure condition, enabling the processor to access the data in the primary memory and disabling the processor from accessing the mirrored data in the mirror memory.