Patent ID: 7968448
Filing Date: 2011-06-28
Classification: H01L

Abstract:
1. A manufacturing method for a semiconductor device, comprising: providing a semiconductor wafer comprising at least one semiconductor die comprising a conductive electrode exposed in a first surface of the semiconductor wafer; forming a passivation layer overlying the first surface of the semiconductor die, wherein the passivation layer comprises a through passivation opening overlying the conductive electrode; forming a wiring redistribution layer, comprising an Al layer and a TiW layer on a bottom surface of the A plating an Ni/Au layer overlying a top surface of the Al layer of the wiring redistribution layer; and forming a solder mask overlying the passivation layer and the wiring redistribution layer, exposing a terminal of the wiring redistribution layer and the overlying Ni/Au layer; wherein the formation of the passivation layer further comprises: forming a first passivation film, comprising a first through opening overlying the conductive electrode, overlying the semiconductor wafer; forming a metal layer overlying the first passivation film; filling a sacrifice layer in the fist through opening; providing a solution comprising an electro-deposition coating material; immersing the semiconductor wafer into the solution, causing the electro-deposition coating material to attach to the metal layer beyond the sacrifice layer and a second surface opposing to the first surface of the semiconductor wafer, forming a second passivation film; and removing the sacrifice layer, resulting in the second passivation film comprising a second through opening overlying the conductive electrode, wherein the second through opening functions as the passivation opening.