Patent ID: 7349248
Filing Date: 2008-03-25
Classification: G11C,Y10S

Abstract:
1. A non-volatile memory cell to store data, comprising: an upper electrode and a lower electrode; and a state-variable region, in which a conductive state changes permanently, the state variable region being disposed between and in electrical contact with each of the upper electrode and the lower electrode, wherein the state-variable region comprises a first semiconductor layer of a first conductive type and second semiconductor layers of a second conductive type on either side of the first semiconductor layer in a direction of current flow through the state-variable region, which form on upper and lower surfaces of the first semiconductor layer two PN junctions of opposite polarity orientations; whereby the memory cell has four possible states depending on which of the two PN junctions has been broken and not broken, and two bits of data are storable in the memory cell.