Patent ID: 6342726
Filing Date: 2002-01-29
Classification: H01L,Y10T

Abstract:
a semiconductor device comprising:a wiring substrate comprising an insulating substrate base, a bump land formed on a first surface of the insulating substrate base, a wiring electrically connected to the bump land formed on the first surface of the insulating substrate base, a penetrating hole formed in the insulating substrate base on the bump land, and a bump electrode formed on the bump land through the penetrating hole, a semiconductor chip comprising a semiconductor element and an external terminal formed on a main surface of the semiconductor chip; an elastic film formed between the first surface of the insulating substrate base and the main surface of the semiconductor chip; an opening in the wiring substrate formed over the external terminal; and a lead electrically connecting the wiring at the edge of the opening with the external terminal, wherein the elastic film is recessed from the edge of the opening, at a portion where the lead connects to the wiring, towards a direction away from the external terminal.