Patent ID: 6225177
Filing Date: 2001-05-01
Classification: H01L

Abstract:
A method for making a MOSFET in an active region surrounded by an isolation region in a surface of a silicon substrate, said method comprising the steps of:forming a gate oxide on said active region;selectively forming a gate electrode layer of a silicon rich material and a sacrificial layer in stack on said gate oxide;forming source and drain regions in said active region with said gate electrode and sacrificial layers as a mask;selectively removing a portion of said gate oxide on said source and drain regions;forming an insulator spacer on sidewalls of said gate electrode and sacrificial layers;removing said sacrificial layer in result with a trench formed on said gate electrode layer and surrounded by said spacer;depositing a metal layer in said trench and on said source and drain regions partially extending to a surface of said isolation region;forming a suicide on said gate electrode layer and source and drain regions with use of said conductive and gate electrode layers;depositing a conductive layer on said metal layer on said source and drain regions partially extending to a surface of said isolation region;forming a dielectric layer on said conductive layer;forming contact holes in said dielectric layer extending to said conductive layer; andfilling a conductive material in said contact holes reaching said conductive layer.