Patent ID: 6756266
Filing Date: 2004-06-29
Classification: H01L

Abstract:
A process for forming a memory array of storage capacitors in a dynamic random access device, said process comprising the steps of:forming a first set of individual storage node plates for a first set of storage capacitors; forming a first set of storage node pillars that alternates in position with said individual storage node plates of said first set of individual storage node plates, wherein a portion of each storage node pillar of said first set of storage node pillars is formed simultaneously during said step of forming a first set of individual storage node plates; forming a second set of individual storage node plates for a second set of storage capacitors, each said individual storage node plate of said second set physically connecting to an individual storage node pillar; forming a cell dielectric material on said first and second sets of individual storage node plates; forming a second capacitor plate over said first and second sets of individual storage node plates.