Patent ID: 7326972
Filing Date: 2008-02-05
Classification: G06F,G11C,H01L

Abstract:
1. A device comprising: a functional unit; a plurality of circuit paths including a first circuit path and a second circuit path coupled to the functional unit; and a plurality of additional circuit paths including a third circuit pat and a fourth circuit path coupled to the functional unit and interleaved with the plurality of circuit paths such that the third circuit path is between the first and second circuit paths and the second circuit path is between the third and fourth circuit paths, each of the first and second circuit paths including a number of first drive units, each of the first drive units including an input node, an output node, a first transistor and a second transistor coupled to the input and output nodes, the first transistor of each of the first drive units including a source region coupled to a first supply node and a body region coupled to a first bias node, the second transistor of each of the first drive units including a source region coupled to a second supply node and a body region coupled to a second bias node, wherein each of the third and fourth circuit paths includes a number of second drive units, each of the second drive units including third transistor and a fourth transistor, the third transistor of each of the second drive units including a source region coupled to the first supply node and a body region coupled to the first supply node, the fourth transistor of each of the second drive units including a source region coupled to the second supply node and a body region coupled to the second supply node.