Patent ID: 7031183
Filing Date: 2006-04-18
Classification: G11C

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate having a first portion for an MRAM and a second portion for a first circuit type, wherein the first circuit type is different than MRAM; first front end circuitry for the MRAM over the first portion in the substrate; second front end circuitry for the first circuit type in the second portion of the substrate; an MRAM cell over the first front end circuitry, wherein the MRAM cell uses a first metal layer for a first program line; a metal interconnect over the second front end circuitry, wherein the metal interconnect uses the first metal layer to provide interconnect for the first circuit type; and a third metal layer over the first and second metal layers and a fourth metal layer over the third metal layer, wherein the third and fourth metal layers are both thicker than the first and second metal layers; wherein the MRAM cell is characterized as using a second metal layer for a second program line and the metal interconnect is characterized as using the second metal layer to provide interconnect for the first type of circuitry.