Patent ID: 6335273
Filing Date: 2002-01-01
Classification: H01L,Y10S

Abstract:
A method for using low dielectric SiOF in a process to manufacture semiconductor products, comprising the steps of:obtaining a layer of SiOF; depleting the fluorine from a surface of the SiOF layer, wherein said depleting step comprises the step of treating the surface of the SiOF layer with a plasma containing hydrogen to form a depleted region at a top portion of the SiOF layer; passivating the depleted region to form a passivated region in the depleted region, the passivated region being a layer adjacent to and disposed directly above a remaining, non-passivated layer of the depleted region; and forming a conductive layer above said passivated region, the conductive layer being formed in a CVD deposition chamber, wherein the treating step is performed in the CVD deposition chamber at a temperature of from 5 to 50 degrees C. higher than a temperature used in the step of forming a conductive layer, so that a potential that heating during the step of forming the conductive layer will drive fluorine atoms from a non-fluorine-depleted region of said layer of SiOF into said depleted region is reduced, wherein hydrogen atoms in the plasma containing hydrogen bond with fluorine atoms in the SiOF layer to form HF, wherein the HF vaporizes and is evacuated from the CVD deposition chamber to thereby form the depleted region within the SiOF layer, and wherein the passivation step is performed using a nitrogen-containing plasma to bond non-volatile nitrogen atoms into the depleted region, and to reduce a potential for fluorine atoms from the SiOF layer and the depleted region diffusing through the passivated region, to thereby block the fluorine atoms from coming into contact with the conductive layer.