Patent ID: 6548767
Filing Date: 2003-04-15
Classification: H05K

Abstract:
A multi-layer printed circuit board having a plurality of stacked layers, comprising:a core layer having first circuit patterns on an upper and a lower surface of a first insulation layer and a via-hole in which a first conductive layer is formed to electrically connect the first circuit patterns formed on the upper and lower surfaces of the insulation layer; and a built-up layer attached to the core layer, the built-up layer comprising a second insulation layer and second circuit patterns sequentially stacked on one side of the core layer, the second circuit patterns being on a surface of the built-up layer and a via-hole in which a second conductive layer electrically connects the second circuit patterns on the second insulation layer and the first circuit patterns of the core layer; wherein the first circuit patterns on each side of the core layer are connected by via holes formed from opposite sides of the core layer toward the core layer, and the via-hole of the core layer and the via-hole of the built-up layer are formed to have an identical center.