Patent ID: 7103381
Filing Date: 2006-09-05
Classification: H04M

Abstract:
1. An apparatus comprising: a transceiver circuit comprising a multiplexer circuit, an interface circuit, a physical layer interface and a plurality of bus input/outputs (I/Os), wherein (a) said transceiver circuit is configured to directly couple (i) an analog input signal to said bus I/Os with said multiplexer circuit when said bus I/Os are in a first state and (ii) a plurality of first digital signals to said bus I/Os with said multiplexer circuit when said bus I/Os are in a second state, (b) said multiplexer circuit is configured to present/receive (i) an analog output signal on an input/output when in said first state and (ii) said plurality of first digital signals on said input/output when in said second state, and (c) said interface circuit is configured to present a control signal to said multiplexer circuit and said physical layer interface to control coupling in response to said first state and said second state.