Patent ID: 6111924
Filing Date: 2000-08-29
Classification: H04L,H04N

Abstract:
For achieving synchronization with a bitstream that includes synchronization bits spaced by a synchronization interval and forming a predetermined synchronization sequence, a method comprising:A) receiving an electrical signal representing the bitstream;B) performing a group of update operations, wherein each update operation comprises:i) beginning with a sum word consisting of all zeros;ii) computing and generating electrical signals representing a comparison word by bitwise comparing a synchronization word with a bit-stream word, the synchronization word being associated with a bit of the synchronization sequence and consisting of a word-width replication of that bit, each bit-stream word consisting of a sequence of sequential bit-stream bits offset in the bitstream by integral numbers of synchronization intervals from the bit-stream words used in the other update operations in the group, the bits associated with synchronization words used in update operations that use bit-stream sequences offset from each other by a given number of synchronization intervals being offset by that given number from each other in the synchronization sequence; andiii) replacing the sum word with the result of bitwise ORing the sum word with the comparison word;C) if all of the sum word's bits have become ones within a predetermined number of the group's update operations, performing a further such group of update operations with different bit-stream words; andD) if not, thereupon generating an electrical indication that the bit-stream bits processed to produce the zero-valued bit are synchronization bits.