Patent ID: 8963647
Filing Date: 2015-02-24
Classification: G04F,G11C

Abstract:
1. A method for implementing a timer using a floating-gate transistor, where the floating-gate transistor includes a floating gate terminal electrically isolated from a control terminal and the floating gate terminal is comprised of polysilicon encased by an insulating material, comprising: changing leakage rate of the floating-gate transistor by creating lattice imperfections at boundary of the polysilicon after the fabrication of the polysilicon; injecting a charge into a floating-gate transistor at an initial time; injecting a charge into a reference floating-gate transistor at the initial time; estimating a thermal voltage at the initial time using the reference current; measuring current read out from the floating-gate transistor at a time subsequent to the initial time; measuring a reference current read out from the floating-gate transistor at the subsequent time; compensating the current read out from the floating-gate transistor using the estimated thermal voltage; and determining an amount of time between the initial time and the subsequent time using the compensated current.