Patent ID: 6606262
Filing Date: 2003-08-12
Classification: G11C

Abstract:
A method of operating a magnetoresistive random access memory (MRAM) cell array device; said MRAM device including a plurality of memory cells each crossed by a pair of conductive traces: said MRAM device further including a variable-calibration write current circuit, and a variable calibration sense amplifier, each capable of being connected to a selected one of said plurality of memory cells by the pair of conductive traces crossing at that selected memory cell to respectively write to and store in said selected memory cell a binary data value, and to sense a variable resistance value of the selected memory cell, which variable resistance value is indicative of the binary data value written to and stored in the selected memory cell according to the direction of magnetization of a free magnet layer of the selected memory cell; said method including steps of:calibrating the sense amplifier; calibrating the write current circuit by iteratively writing a calibration data value to the selected memory cell utilizing progressively and incrementally increased writing currents on each iteration loop; and on each iteration loop sensing the calibration data value stored in the selected memory cell; so as to determine during a first iteration process a transitional write current at which a change from a response of â€œno change of magnetic directionâ€  to a writing event, and a response of â€œdata written by change of magnetic directionâ€  takes place in response to a writing event; and in a second iteration continuing to incrementally increase the writing current until a second transitional write current is reached between a response from â€œdata written by change of magnetic directionâ€  and to â€œhalf select errorsâ€  occurs, said half select error being determined by undesired alteration of calibration data previously written into memory cells other than said selected cell and across which one of the pair of conductive traces of the selected memory cell crosses; and determining an optimized write current based on said first determined and said second determined transitional write currents.