Patent ID: 7785956
Filing Date: 2010-08-31
Classification: H01L

Abstract:
1. A method, comprising: forming a first stress-inducing dielectric material above first and second device regions of a semiconductor device, said first device region comprising one or more first transistors and said second device region comprising one or more second transistors, respectively; selectively removing a portion of said first stress-inducing dielectric material from above said second device region; forming a second stress-inducing dielectric material above said first and second device regions; determining a difference of a deposition rate of an interlayer dielectric material when deposited on said first and second stress-inducing materials, said determined difference having a value other than zero; selecting a thickness of a buffer material on the basis of said determined difference; forming said buffer material having said selected thickness above said second stress-inducing material above said first and second device regions; selectively removing a portion of said buffer material and a portion of said second stress-inducing material from above said first device region; and forming an interlayer dielectric material above said first and second device regions.