Patent ID: 6583365
Filing Date: 2003-06-24
Classification: H01L,H05K

Abstract:
A conductive pad layout for ball grid array (BGA) packaging structure implemented on a circuit substrate that includes a front surface where a chip is mounted, the conductive pad layout comprising:a first contact pad defined on the front surface of the circuit substrate; a first bonding wire connecting the chip to the first contact pad; a second contact pad defined on the front surface of the circuit substrate, the second contact pad being closer to the chip than the first contact pad and transmitting a critical signal; an anti-interference contact pad defined at a location on the front surface of the circuit substrate that is adjacent to the second contact pad, wherein the anti-interference contact pad is further connected to a reference voltage and the chip connects the anti-interference contact pad via a third bonding wire of approximately the same length as the second bonding wire; and a second bonding wire connecting the chip to the second contact pad, the second bonding wire being shorter than the first bonding wire so that interference therebetween is thereby prevented.