Patent ID: 6479874
Filing Date: 2002-11-12
Classification: G11C,H01L

Abstract:
A semiconductor read only memory (ROM) device comprising:a semiconductor substrate; a data memory cell provided on said semiconductor substrate, said data memory cell comprising a data cell transistor, said data cell transistor having a data cell transistor threshold voltage corresponding to a predetermined one of multilevel data of three or more levels that can be stored in said data memory cell, said data cell transistor threshold voltage causing a current level to flow from said data cell transistor during a data read operation; a reference cell provided on said semiconductor substrate, said reference cell comprising a reference cell transistor having a reference cell threshold voltage corresponding to a predetermined one of said multilevel data of three or more levels, said reference cell being used for generating a reference current which is compared with said current read out from said data memory cell to discriminate the data stored in said data memory cell; and at least one dummy cell provided on said semiconductor substrate, each said dummy cell comprising a dummy cell transistor, said dummy cell transistor disposed adjacent to said reference cell transistor, said dummy cell transistor having a dummy cell threshold voltage corresponding to a predetermine d one of said multilevel data of three or more levels, wherein said dummy cell threshold voltage equals said reference cell threshold voltage.