Patent ID: 6256251
Filing Date: 2001-07-03
Classification: G11C

Abstract:
A circuit with variable voltage boosting ratios in a memory device for raising a voltage level on a booster line with a selected voltage boosting ratio in the memory device, the circuit comprising:a first capacitor electrically connecting to the booster line for raising the voltage level on the booster line, wherein the first capacitor responds to a first control signal to boost the voltage level on the booster line or be precharged by a precharging line;first switching means electrically connecting to the booster line; second switching means electrically connecting to a power line in the memory device;a second capacitor, responding to a second control signal, and coupling to the booster line through the first switching means and the power line through the second switching means, respectively, said second capacitor responding to said second control signal to selectively boost the voltage level on the booster line together with the first capacitor when the first switching means is turned on and the second switching means is turned off, or being precharged by the power line when the first switching means is turned off and the second switching means is turned on; anda scheme for controlling the first capacitor and the second capacitor, wherein the scheme comprises:activating the circuit for boosting the voltage level on the booster line;boosting the voltage level solely by the first capacitor when the voltage level is greater than a predetermined check value; andboosting the voltage level by the first capacitor and the second capacitor concurrently when the voltage level is less than a predetermined check value.