Patent ID: 6400174
Filing Date: 2002-06-04
Classification: G01R,H01L

Abstract:
A test system for testing a semiconductor component having a plurality of component contacts comprising:a base comprising a plurality of terminal contacts; an interconnect on the base comprising a plurality of interconnect contacts in electrical communication with the terminal contacts and configured to electrically engage the component contacts; a plurality of wires and wire bonds electrically connecting the interconnect contacts to the terminal contacts, with at least some of the wires and the wire bonds comprising dummies; an encapsulant encapsulating the wires and the wire bonds, the dummies preventing the encapsulant from contacting selected portions of the interconnect or the base; a ridge on the interconnect configured to prevent the encapsulant from contacting the selected portions of the interconnect; and an alignment member on the interconnect or the base configured to align the component to the interconnect.