Patent ID: 7385286
Filing Date: 2008-06-10
Classification: H01L,H05K

Abstract:
1. A semiconductor module comprising: a multi-layer substrate; at least four terminal electrodes provided on a surface of said multi-layer substrate; a capacitive element layer which is selectively provided at an internal area of said multi-layer substrate placed directly below all of said terminal electrodes in a substrate thickness direction, said capacitive element layer is encapsulated by a different material comprising the multi-layer substrate; and a semiconductor device which is flip-chip-bonded to said terminal electrodes, wherein the height variation of said terminal electrodes provided on the surface of said multi-layer substrate is equal to or less than 10 μm; internal electrodes are provided on opposite sides of said capacitive element layer in the substrate thickness direction; and longitudinal length of said internal electrodes is smaller than a length equivalent to a quarter-wavelength of a wavelength of an electronic signal inputted into said semiconductor device.