Patent ID: 6909189
Filing Date: 2005-06-21
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; an isolation region formed in a surface layer of said semiconductor substrate and defining a plurality of active regions; at least one gate electrode formed above a substrate surface in each active region, constituting a semiconductor element in the active region; an interlevel insulating film formed over said semiconductor substrate, covering said gate electrode; a plurality of local interconnects formed through said interlevel insulating film and electrically connected to a region of the semiconductor element; a plurality of local interconnect dummies formed through said interlevel insulating film and electrically separated from said local interconnect; and a plurality of lower level dummies each including one of an active region dummy formed through said isolation region, a laminated dummy of an active region dummy formed through said isolation region and a gate electrode dummy formed over said active region dummy and a gate electrode dummy formed above said isolation region, wherein each of said local interconnect dummies is disposed so that said local interconnect dummy is not connected to two lower level dummies.