Patent ID: 7635610
Filing Date: 2009-12-22
Classification: H01L

Abstract:
1. A method for fabricating a multi-chip stack package, the method comprising: providing a substrate having a plurality of first contacts and a plurality of second contacts formed on a substrate surface; providing a first chip having a first active surface and a corresponding first back surface; providing a second chip having a second active surface and a corresponding second back surface; forming a plurality of first bumps on the first active surface and a plurality of second bumps on the first back surface; forming a first under-bump-metallurgy (UBM) layer between the second bumps and the first back surface, wherein the first UBM layer is formed covering substantially the entire first back surface; forming a plurality of third bumps on the second back surface; bonding the first chip to the substrate by bonding the first bumps to the first contacts; and bonding the second chip to the first chip by bonding the second bumps to the third bumps.