Patent ID: 7842555
Filing Date: 2010-11-30
Classification: H01L,H02M

Abstract:
1. A method of fabricating an integrated transistor module, comprising: forming a continuous metal leadframe that defines at least one low-side land on a first plane and at least one high-side land on a second plane substantially parallel to and distinct from said first plane vertically offset from said low-side land, and a stepped portion mechanically and electrically interconnecting said low-side and high-side lands; enclosing in an electrically insulating material a portion of said leadframe proximate said high-side land, an upper surface of said insulating material on a side of said leadframe that is opposite said high-side land being substantially coplanar relative to a side of said leadframe opposite said low-side land; and mounting a high-side transistor upon said high-side land, a source of said high-side transistor being electrically connected to said high-side land.