Patent ID: 7384835
Filing Date: 2008-06-10
Classification: H01L

Abstract:
1. A method of fabricating a field effect transistor, said method comprising: forming a semiconductor layer on a substrate, wherein said semiconductor layer has a first surface adjacent to said substrate and a second surface; forming a gate on said second surface; forming a sidewall spacer adjacent to said gate on said second surface; etching said semiconductor layer to form a recess that undercuts said sidewall spacer a first predetermined distance and further that extends below said second surface a second predetermined distance, wherein said etching exposes a third surface of said semiconductor layer within said recess; after said etching, implanting a first conductivity type dopant into said substrate through said recess so as to form a sharply defined halo in said substrate bordering said recess at said first predetermined distance and said second predetermined distance, wherein said implanting comprises using a low energy implantation process to minimize diffusion of said first conductivity type dopant; performing a chemical oxide removal process to clean said third surface; and performing an epitaxial deposition process to fill said recess with a semiconductor material.