Patent ID: 6773961
Filing Date: 2004-08-10
Classification: H01L

Abstract:
A singulation method used in a process for making a plurality of leadless semiconductor packages, the singulation method comprising the following steps:providing an array of molded products on an upper surface of a lead frame having a plurality of dambars between the molded products, the lower surface of the lead frame being attached with a tape, each of the molded products includes a semiconductor chip encapsulated in a package body and electrically coupled to the upper surface of the lead frame, each dambar having two grooves in the lower surface of the lead frame and adjacent to the molded product wherein each dambar has a first portion and a second portion connecting the first portion to an adjacent molded product; and etching the upper surface of the lead frame with the package bodies as mask until the second portion of each dambar is etched away while the first portion of each dambar substantially remains intact.