Patent ID: 8703557
Filing Date: 2014-04-22
Classification: H01L

Abstract:
1. A method, comprising: forming a plurality of fin-formation trenches in a semiconductor substrate, said fin-formation trenches defining a plurality of spaced-apart fins, wherein said plurality of spaced-apart fins are comprised of at least one dummy fin; forming a layer of insulating material that fills at least a portion of said fin-formation trenches; forming a masking layer above said layer of insulating material; forming a recess in said masking layer, wherein said recess has a depth that is less than a thickness of said masking layer; forming a sidewall spacer on sidewalls of said recess in said masking layer, said sidewall spacer defining a spacer opening; performing at least one first etching process on said masking layer through said spacer opening to define an opening in said masking layer that exposes a portion of said layer of insulating material and at least a portion of said at least one dummy fin; and performing at least one second etching process to remove at least a portion of said at least one dummy fin and thereby define an opening in said layer of insulating material.