Patent ID: 7037796
Filing Date: 2006-05-02
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: providing a semiconductor substrate in which a gate oxide layer, a polysilicon layer, a titanium silicide layer and a patterned hard mask layer are sequentially formed, and wherein the titanium silicide layer, the polysilicon layer and the gate oxide layer are etched using the patterned hard mask as an etching mask to form a titanium polycide gate; re-oxidizing the substrate at temperature of 700˜750° C. to form a re-oxidation layer on a side wall of the gate and on a surface of the substrate; depositing an oxide layer on the resultant structure at process temperature of 350˜750° C. to form a re-oxidation layer on a side wall of the gate and on a surface of the substrate; depositing a nitride layer on the oxide layer; and forming a spacer on the gate and on a side wall of the hard mask by blanket-etching the nitride layer, the oxide layer and the re-oxidation layer wherein the oxide layer is formed by a low pressure chemical vapor deposition process (LPCVD) comprising a pyrolysis method of TEOS (Si(OC