Patent ID: 6187657
Filing Date: 2001-02-13
Classification: H01L

Abstract:
A method of fabricating a plural material gate for a circuit device, comprising the steps of:a) providing a gate structure on a substrate, the gate structure having a top surface, and first and second sides,b) depositing a first layer on the gate structure, including a substantial portion of the top surface, and first and second sides,c) projecting a plurality of ions at a non-perpendicular angle, with respect to the top surface of the gate structure, wherein a first portion of the first layer adjacent to the first side of the gate structure, has a greater number of ions implanted than a second portion of the first layer adjacent to the second side of the gate structure,d) selectively etching the first layer so as to expose at least a portion of the first side of the gate structure while not exposing the second side,e) forming a silicide region in the first side of the gate structure, but not the second side of the gate structure, by utilizing the second portion of the first layer as a shield, andf) removing the second portion of the first layer.