Patent ID: 6797609
Filing Date: 2004-09-28
Classification: H01L

Abstract:
A manufacturing method of a semiconductor integrated circuit device, comprising the steps of:(a) forming a first interconnection groove in a first interlayer insulating film over a first main surface of a wafer; (b) forming a first barrier metal film over the first interlayer insulating film both outside and inside the first interconnection groove; (c) forming a first interconnection metal film having copper as a main component over the first barrier metal film both outside and inside the first interconnection groove so as to fill the first interconnection groove; (d) removing both the first interconnection metal film and the first barrier metal film outside the first interconnection groove by chemical mechanical polishing; (e) keeping the first main surface of the wafer wet with moving water under light-shaded conditions not brighter than 100 lux during a period after completion of step (d) and before a beginning of following step (f); (f) performing brush scrub cleaning of the first main surface with liquid; and thereafter (g) performing ammonia plasma treatment of the first main surface so as to reduce and nitride upper surfaces of both the first interlayer insulating film and the first interconnection metal film; and thereafter (h) forming a copper diffusion barrier insulating film over the first main surface.