Patent ID: 6660567
Filing Date: 2003-12-09
Classification: H01L

Abstract:
A method of fabricating an array substrate for use in X-ray detector, comprising:forming a plurality of gate lines on a substrate, the gate line having a gate electrode, a gate line extension, and a gate pad; forming a first insulation layer on the gate line, on the gate electrode, on the gate line extension, on the gate pad, and on the substrate; forming first and second gate line contact holes to the gate line extension by patterning the first insulation layer; forming an semiconductor layer on the first insulation layer and over the gate electrode, the semiconductor layer including an active layer and an ohmic contact layer; forming source and drain electrodes, a data line and a ground line, wherein the source and drain electrodes extend over the active layer, wherein the data line is electrically connected to the source electrode, wherein the gate line and the data line define a pixel region, and wherein the ground line crosses the pixel region; forming a thin film transistor (TFT) near the crossing of the gate and data lines, wherein the TFT is comprised of the gate electrodes, the data electrode, the drain electrode and semiconductor layer; forming a first capacitor electrode, a transparent electrode pattern, and an etch stopper, wherein the first capacitor electrode electrically connects to the ground line, wherein the electrode pattern is formed over the gate line extensions and electrically connect to the gate extension via the first and second gate line contact holes, and wherein the etch stopper is over the plural gate pads; forming a protection layer on the thin film transistor, on the first capacitor electrode, on the transparent electrode pattern, and on the etch stopper; forming a second capacitor electrode on the protection layer and over the first capacitor electrode; forming a storage capacitor in the pixel region, wherein the storage capacitor is comprised of the first capacitor electrode, the second capacitor electrode, and the protection layer; forming a second insulation layer on the protection layer and on the second capacitor electrode; forming an etching hole and an etch stopper contact hole, which respectively expose the transparent electrode pattern and the etch stopper, by etching the second insulation layer and the protection layer; and etching the etch stopper and a portion of the transparent electrode pattern.