Patent ID: 6381720
Filing Date: 2002-04-30
Classification: G01R

Abstract:
A test circuit for testing a system logic constituted of an existing macro and a newly created circuit both mounted on a circuit board, comprising a boundary scan circuit for testing said newly created circuit and a macro test circuit for testing only said existing macro independently of said newly created circuit, said boundary scan circuit including at least a first boundary scan cell and a second boundary scan cell, and said macro test circuit including an input terminal provided on said circuit board and connected to said first boundary scan cell, a first line for connecting said input terminal to said existing macro, an output terminal provided on said circuit board and connected to said second boundary scan cell, a first selector having inputs connected to said existing macro and said newly created circuit, respectively, and an output connected to said second boundary scan cell, and a second selector having inputs connected to said output of said first selector and said second boundary scan cell and an output connected to said output terminal, wherein said boundary scan circuit and said macro test circuit are unified.