Patent ID: 7944746
Filing Date: 2011-05-17
Classification: G11C

Abstract:
1. A system that provides reduced electronic drift for memory cells of a flash memory device, comprising: a flash memory management module that receives an indication that an erase pulse is applied to a flash memory cell of a flash memory device; a flash memory program module that applies a soft program pulse to the flash memory cell when directed by the flash memory management module, the soft program pulse includes a charge polarity that is opposite a polarity of the erase pulse; and a pulse modulator that adjusts a pulse width of the soft program pulse to control an amount of charge injected into the flash memory cell during the soft program pulse, wherein the pulse modulator employs a relatively small pulse width, compared to a pulse width of the erase pulse, for the soft program pulse, wherein voltage level and the pulse width of the soft program pulse are selected to control the application of the soft program pulse such that charge injected into the flash memory cell is concentrated in a channel region proximate to uncombined erase charge and away from another region of the flash memory cell wherein at least a portion of remaining program charge resides in order to combine at least a portion of the charge and the uncombined erase charge to reduce dipole interactions between the uncombined erase charge and the remaining program charge to thereby reduce the electronic drift in the flash memory cell.