Patent ID: 8952426
Filing Date: 2015-02-10
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory comprising: a semiconductor substrate; a memory cell array including a first block and a second block disposed above the semiconductor substrate adjacent to each other in a first direction; and a first driver disposed on one end of the memory cell array in a second direction orthogonal to the first direction, wherein the first and second blocks include at least two conductive layers arranged in a third direction perpendicular to the first and second directions above the semiconductor substrate, bit lines disposed above the at least two conductive layers extending in the first direction, and columnar semiconductors passing through the at least two conductive layers, and wherein a source diffusion layer is disposed in the semiconductor substrate under the first and second blocks and extends in an in-plane direction which is formed by the first direction and the second direction, a conductive element, which has a lower end connected to the source diffusion layer and an upper end connected to a source line disposed above the at least two conductive layers, the conductive element extends in the third direction and is interposed between ends of the at least two conductive layers of the first block and ends of the at least two conductive layers of the second block, and the columnar semiconductors in the first and second blocks have lower ends connected to the source diffusion layer and upper ends connected to the bit lines.