Patent ID: 8004320
Filing Date: 2011-08-23
Classification: H03L

Abstract:
1. A frequency prescaler, suitable for a frequency synthesizer, the frequency prescaler comprising: a first D having a clock signal positive input terminal for receiving a positive signal of a first signal, and having a clock signal negative input terminal for receiving a negative signal of the first signal; a second D flip-flop, having a clock signal negative input terminal for receiving the positive signal of the first signal, and having a clock signal positive input terminal for receiving the negative signal of the first signal; a first multiplexer, having a first positive input terminal and a second positive input terminal respectively coupled to a plurality of positive output terminals of the first D flip-flop and the second D flip-flop, having a first negative input terminal and a second negative input terminal respectively coupled to a plurality of negative output terminals of the first D flip-flop and the second D flip-flop, having a first positive output terminal coupled to a plurality of positive input terminals of the first D flip-flop and the second D flip-flop, and having a first negative output terminal coupled to a plurality of negative input terminals of the first D flip-flop and the second D flip-flop; a third D flip-flop, having a clock signal positive terminal and a clock signal negative terminal respectively coupled to a level shift positive output terminal and a level shift negative output terminal of the first multiplexer, having a positive output terminal and a negative input terminal coupled to each other, having a negative output terminal and a positive input terminal coupled to each other, and having a level shift positive output terminal and a level shift negative output terminal respectively coupled to a first negative output terminal and a first positive output terminal of the frequency prescaler; a fourth D flip-flop, having a clock signal positive terminal and a clock signal negative terminal respectively coupled to the level shift positive output terminal and the level shift negative output terminal of the third D flip-flop, having a positive output terminal and a negative input terminal respectively coupled to the negative input terminal and a positive input terminal of the fourth D flip-flop, and having a level shift positive output terminal and a level shift negative output terminal respectively coupled to a second positive output terminal and a second negative output terminal of the frequency prescaler; and a second multiplexer, having a first positive input terminal and a first negative input terminal respectively coupled to a high-level voltage and a low-level voltage, having a second positive input terminal and a second negative input terminal respectively coupled to the level shift negative output terminal and the level shift positive output terminal of the third D flip-flop, and having a third positive input terminal and a third negative input terminal respectively coupled to the level shift negative output terminal and the level shift positive output terminal of the fourth D flip-flop; wherein, the first multiplexer is controlled by a first different control signal, the second multiplexer determines the first differential control signal according to a second different control signal, and outputs the first differential control signal.