Patent ID: 6806776
Filing Date: 2004-10-19
Classification: H03F

Abstract:
A transconductor tuning circuit for controlling transconductance of a transconductor, the tuning circuit comprising:a first MOS (Metal-Oxide Semiconductor) transistor, a source terminal of said first MOS transistor being connected to a power source, a gate terminal and a drain terminal of the first MOS transistor being connected to each other; a second MOS transistor, a source terminal of said second MOS transistor being connected to the power source, a gate terminal and a drain terminal of the second MOS transistor being connected; and a first error amplifier, a first input terminal of the first error amplifier being connected to the gate terminal of the first MOS transistors, a second input terminal of the first error amplifier being connected to the gate terminal of the second MOS transistor, wherein the first error amplifier outputs an output signal in form of a bias signal for controlling tuning of the transconductor.