Patent ID: 6809395
Filing Date: 2004-10-26
Classification: H01L,Y10S

Abstract:
An isolation structure including a semiconductor substrate having a top surface, the isolation structure comprising:a pair of dielectric structures each of which contacts a respective active region in the semiconductor substrate, comprises oxide, and rises lower above the top surface of the semiconductor substrate than a substantially oval field oxide region extending into the semiconductor substrate, wherein the field oxide region has opposite sides each of which makes contact with the deposited oxide of a respective one of the dielectric structures, wherein each one of said pair of dielectric structures constitutes a structural barrier that separates said respective active region from said field oxide region, thus preventing the encroachment of material from said field oxide region into said respective active region; and nitride layers upon respective oxide layers, each said oxide layer contacting one of said dielectric structures and one of the active regions, and wherein each one of said pair of dielectric structures constitutes a structural barrier that separates said substantially oval field oxide region from each of said nitride layers.