Patent ID: 8143662
Filing Date: 2012-03-27
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first insulating film provided on a semiconductor substrate in a cell transistor region; a charge storage film provided on the first insulating film; a second insulating film provided on the charge storage film; a control gate electrode including a first conductive film and a second conductive film on the first conductive film, the first conductive film provided on the second insulating film, the second conductive film comprising a first metallic silicide film; first source/drain regions formed on a surface of the semiconductor substrate and sandwiching a region under the first insulating film; a third insulating film provided on the semiconductor substrate in a peripheral transistor region; a gate electrode including a third conductive film and a fourth conductive film on the third conductive film, the third conductive film provided on the third insulating film, the fourth conductive film comprising a polysilicon film and a second metallic silicide film on a top surface of the polysilicon film, the second metallic silicide film extending entirely over the top surface and side surfaces of the polysilicon film in the fourth conductive film; second source/drain regions formed on the surface of the semiconductor substrate and sandwiching a region under the third insulating film; a side wall insulating film formed on a side surface of the control gate electrode and the charge storage film; and a barrier film formed on the semiconductor substrate and at least one of the side wall insulating film and a side surface of the gate electrode, wherein the first and third conductive films are comprised of the same material, the first and second metallic silicide films are comprised of the same material, and a highest point of the side wall insulating film and the barrier film is higher than a top surface of the second insulating film and lower than a top surface of the second conductive film.