Patent ID: 7838946
Filing Date: 2010-11-23
Classification: H01L

Abstract:
1. A static random access memory comprising: a substrate, wherein a first type doped region, a second type doped region, and an isolation structure separating the first type doped region and the second type doped region apart are formed therein; an interlayer dielectric layer disposed on the substrate, the interlayer dielectric layer having an opening extending across the first type doped region, the isolation structure and the second doped region such that the substrate is exposed; a high-k dielectric layer disposed in the opening along inner sidewalls and a bottom of the opening; a first low resistance conductive layer disposed on the second type doped region and a portion of the isolation structure and filling in the opening; a second type conductive layer disposed between the first low resistance conductive layer and the high-k dielectric layer; a first type conductive layer disposed on the high-k dielectric layer along an exposed sidewall of the first low resistance conductive layer and an exposed upper surface of the high-K dielectric layer in the opening; and a second low resistance conductive layer disposed on the first type conductive layer and filling in the opening.