Patent ID: 8487355
Filing Date: 2013-07-16
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure comprising: forming a sacrificial mandrel structure having at least one opening on a semiconductor substrate, said at least one opening exposes at least one region of said semiconductor substrate; applying a self-assembled block copolymer to said semiconductor substrate within said at least one opening of said sacrificial mandrel structure; annealing the block copolymer to form an ordered array of removable and unremovable polymer components; removing said removable polymer component; etching exposed portions of said semiconductor substrate to provide an ordered, nanosized pattern within said at least one region of said semiconductor substrate; removing said sacrificial mandrel structure and said unremovable polymer component; forming at least a gate dielectric and a gate conductor on top of said at least one region of said semiconductor substrate including said at least one ordered, nanosized pattern; and forming source and drain diffusion regions in said semiconductor substrate in other regions of the semiconductor substrate that are adjacent to said at least one region of said semiconductor substrate including said at least one ordered, nanosized pattern.