Patent ID: 7892916
Filing Date: 2011-02-22
Classification: H01L

Abstract:
1. A fabricating method of a semiconductor device comprising a semiconductor substrate and a capacitor configuration configured by sandwiching a dielectric film with a lower electrode and an upper electrode formed on the semiconductor device, upon forming the capacitor configuration, comprising: forming a third layer on a first layer via a second layer and patterning the third layer to form the upper electrode; performing a first heat treatment by rapid heating in the state in which the upper electrode has been formed on the second layer which is not patterned yet; performing a second heat treatment with a longer period of time than the first heat treatment after the first heat treatment in the state in which the upper electrode has been formed on the second layer which is not patterned yet; and patterning the second layer to form the dielectric film and the first layer to form the lower electrode after performing the second heat treatment.