Patent ID: 7126419
Filing Date: 2006-10-24
Classification: H03F

Abstract:
1. An analog circuit for receiving a differential pair of input signals and compensating for a direct-current offset therein, the differential pair of input signals including a first input signal and a second input signal with mutually opposite phases, the analog circuit comprising: a first peak-hold circuit receiving the first input signal and generating a first peak signal indicating a peak value of the first input signal; a second peak-hold circuit receiving the second input signal and generating a second peak signal indicating a peak value of the second input signal; a first differencing circuit receiving the first input signal and the second input signal and generating a first difference signal indicating an algebraic difference between the first input signal and the second input signal; a second differencing circuit receiving the first peak signal and the second peak signal and generating a second difference signal indicating an algebraic difference between the first peak signal and the second peak signal; a first combining circuit for additively combining the first difference signal and the second difference signal, wherein the first differencing circuit includes a first amplifier receiving the first and second input signals as differential voltage inputs, and having a first output terminal and a second output terminal for differential current output, the first difference signal being provided from the first output terminal, the second differencing circuit includes a second amplifier receiving the first and second peak signals as differential voltage inputs, and having a first output terminal and a second output terminal for differential current output, the second difference signal being provided from the first output terminal of the second differencing circuit, and the first combining circuit includes a first resistor having one terminal coupled to the first output terminals of the first and second amplifiers, for generating a first voltage output signal responsive to a sum of the first and second difference signals; and a second combining circuit including a second resistor having one terminal coupled to the second output terminals of the first and second amplifiers, for generating a second voltage output signal opposite in phase to the first voltage output signal.