Patent ID: 9142287
Filing Date: 2015-09-22
Classification: G11C

Abstract:
1. A method for encoding bits to be stored within a crossbar memory architecture performed by a physical computing system, the method comprising: designating, with the physical computing system, a subset of crosspoints of wire segments of a crossbar matrix, the subset corresponding to a predetermined path through the crossbar matrix, wherein the wire segments comprise disjointed intersecting wire segments that form the crossbar matrix; and encoding, with the physical computing system, a number of data bits to be placed along the predetermined path, wherein the encoding of the number of data bits limits a number of bits per wire segment that are represented by a low resistive state based on a number of crosspoints in each corresponding wire segment, the encoding limits the number of bits per wire segment that are represented by a low resistive state based on the number of crosspoints per wire segment by limiting the number of bits per wire segment that are represented by a low resistive state to less than half the number of crosspoints per wire segment, the predetermined path includes a number of crosspoints of the wire segments of the crossbar matrix, and all paths through the crossbar matrix comprise a number of initially precluded crosspoints, each one of the wire segments of the crossbar matrix comprising one of the precluded crosspoints, the precluded crosspoints being placed in a high resistive state.