Patent ID: 7535985
Filing Date: 2009-05-19
Classification: G06F,G11C,H04L

Abstract:
1. A resynchronization circuit for synchronizing a received data signal with a reference clock signal which has a frequency equal to that of a strobe signal, the strobe signal being input to the resynchronization circuit together with the received data signal, comprising: a reception timing detection circuit for detecting in which of a plurality of phase ranges within one cycle of the reference clock signal the timing of determining the level of the received data signal occurs; a first holding circuit for holding the received data signal in synchronization with the strobe signal; a second holding circuit for holding an output of the first holding circuit in synchronization with a second holding circuit clock signal, the second holding circuit clock signal having the same frequency as that of the reference clock signal, the level of the second holding circuit clock signal transitioning in a phase range different from the phase range detected by the reception timing detection circuit; a third holding circuit for holding an output of the second holding circuit in synchronization with the reference clock signal; and a plurality of holding circuits for holding the output of the first holding circuit in synchronization with a plurality of said second holding circuit clock signals, the plurality of second holding circuit clock signals having the same frequency as that of the reference clock signal, the levels of the plurality of second holding circuit clock signals transitioning in different phase ranges from one another, wherein the second holding circuit holds a signal which is selected from the signals held by the plurality of holding circuits.