Patent ID: 8791574
Filing Date: 2014-07-29
Classification: B28D,H01L

Abstract:
1. A semiconductor device comprising: (a) a chip mounting portion; (b) a plurality of joining members; (c) a semiconductor chip having a main surface, a plurality of electrode pads formed over the main surface, a back surface opposite to the main surface, and a side face between the main surface and the back surface, and mounted over the chip mounting portion; (d) a plurality of conductive members electrically coupling the electrode pads of the semiconductor chip to the joining members, respectively; and (e) a sealing member sealing the semiconductor chip, wherein the semiconductor chip has a base material layer, a semiconductor element layer formed over the base material layer, a first interconnect layer formed over the semiconductor element layer, and a second interconnect layer formed over the first interconnect layer, wherein the dielectric constant of a first insulating layer placed in the first interconnect layer is lower than the dielectric constant of a pre-metal insulating layer formed in the semiconductor element layer and a second insulating layer placed in the second interconnect layer, and wherein the side face of the semiconductor chip has a first end face from which a portion of the first interconnect layer is exposed, a second end face located closer to the back surface side of the semiconductor chip than the first end face, and a third end face between the first end face and the second end face, wherein a first angle of inclination formed by the first end face relative to the back surface is less than a second angle of inclination formed by the second end face relative to the back surface, and larger than a third angle of inclination formed by the third end face relative to the back surface.