Patent ID: 9106370
Filing Date: 2015-08-11
Classification: H03L,H04L

Abstract:
1. A method for facilitating acquisition of a received reference clock signal in a clock and data recovery (CDR) system, the method comprising: initializing an integral register in a digital loop filter of the CDR system by setting a current value of the integral register to a first value; determining a number of mislock events occurring in a CDR loop of the CDR system, a mislock event being indicative of an unlocked state of the CDR loop; adjusting the current value of the integral register, when the number of mislock events is non-zero, by a second value to generate a new current value, the second value being a function of a negation of the current value of the integral register; and repeating the steps of determining the number of mislock events and adjusting the current value of the integral register until the number of mislock events is zero indicative of the CDR system acquiring the received reference clock signal.