Patent ID: 9040838
Filing Date: 2015-05-26
Classification: H01L,H05K

Abstract:
1. A substrate for a package comprising: a substrate; a circuit pattern formed on the substrate and comprising an outer package-on-package (PoP) pad for mounting an upper package thereon and a chip pad for mounting an inner chip thereon; a first solder resist (SR) inner region formed by being coated on an inner region of the substrate on which the inner circuit pattern comprising the chip pad is formed, comprising a plugged SR region which does not expose the substrate while exposing the entire upper surface of the chip pad by laser ablation, and desmeared to have a changed surface roughness; and a second solder resist SMD region formed to cover an edge of the first solder resist inner region and an edge of the POP pad and having a surface roughness different from a surface roughness of the plugged SR region on the first solder resist inner region.