Patent ID: 8514596
Filing Date: 2013-08-20
Classification: H02M

Abstract:
1. A system interconnection inverter comprising: an inverter configured to perform pulse wide modulation on an output from a DC power source; a first capacitor pair provided at an input side of the inverter and including two capacitors serially connected to form a neutral point; a second capacitor pair provided at an output side of the inverter and including two capacitors serially connected to form a neutral point; a bypass path for a leakage current formed by connecting the neutral point of the first capacitor pair and the neutral point of the second capacitor pair to each other; at least one common mode choke coil provided between the first capacitor pair and the second capacitor pair and configured to suppress a common mode current generated in the inverter; and an output filter configured to convert a voltage, which is outputted from the inverter and subjected to the pulse wide modulation, into a voltage in a sine wave form, wherein the bypass path includes impedance smaller than a leakage current path through which the leakage current flows into a floating capacitance of the DC power source through a ground from a system transformer connected through the second capacitor pair in the switching frequency of the inverter, the common mode choke coil includes bigger impedance than the leakage current path and the bypass path.