Patent ID: 6201194
Filing Date: 2001-03-13
Classification: H01R,H05K,Y10T

Abstract:
A chip carrier or circuit board comprising:a first layer of photoimageable material sandwiched between first and second metal layers, a second layer of photoimageable material bonded to said first metal layer, and a third layer of photoimageable material bonded to said second metal layer,circuitry formed on both said second layer of said photoimageable material and said third layer of photoimageable material,plated through holes extending through all of said photoimageable materials and both of said metal layers to connect a portion of the circuitry on said second layer of photoimageable material with a portion of the circuitry on said third layer of photoimageable material,and metal filled vias extending from the circuitry on said second layer of photoimageable material through said second photoimageable material to said first metal layer and from the circuitry on said third layer of photoimageable material through said third photoimageable material to said second metal layer.