Patent ID: 6334135
Filing Date: 2001-12-25
Classification: G06F

Abstract:
A register file having a plurality of register units identified by respective addresses,each of said plurality of register units comprising:(a) a data register for storing data representative of a result of an arithmetic operation executed,(b) an overflow flag register for storing, as an overflow flag, an overflow signal indicating the presence or absence of an occurrence of overflow in said arithmetic operation, in response to a write signal which directs that said data register is written, and(c) a sign flag register for storing, as a sign flag, a saturation value sign signal providing an indication of which one of a positive and a negative saturation value should replace said arithmetic operation result in the presence of an occurrence of overflow in said arithmetic operation, in response to said write signal,wherein if said overflow flag indicates the absence of an occurrence of arithmetic overflow at the moment when a read signal directing said data register to be read is provided, said data stored in said data register is then outputted, while if said overflow flag indicates the presence of an occurrence of arithmetic overflow, said overflow flag and said sign flag are then outputted.