Patent ID: 9219119
Filing Date: 2015-12-22
Classification: B82Y,H01L,Y10S

Abstract:
1. A semiconductor device, comprising: a substrate including a first region and a second region separated from each other; a structure on the substrate, the structure having at least one sacrificial layer and at least one active layer at a first level in the second region; a first gate-all-around device including a first nanowire in the first region; and a second gate-all-around device including a second nanowire and a conductive structure forming a gate in the second region, wherein the first nanowire is at substantially the first level, wherein the second nanowire is at a second level different from the first level of the first nanowire, wherein the second nanowire is on the structure in the second region and is not in contact with the structure and wherein a bottom surface of the gate is higher than an upper surface of the structure.