Patent ID: 6031267
Filing Date: 2000-02-29
Classification: H01L

Abstract:
A static random access memory (SRAM) cell comprising:first and second metal oxide semiconductor (MOS) transistors having source regions and drain regions of a first conductivity type, said source regions and said drain regions having a first dopant concentration, said source regions and said drain regions being in semiconductor regions of a second conductivity type opposite said first conductivity type, said semiconductor regions of a second conductivity type having a second dopant concentration, wherein said first dopant concentration is in the range of said second dopant concentration to 2.5 times said second dopant concentration; andthird and fourth MOS transistors having source regions and drain regions of said second conductivity type in semiconductor regions of said first conductivity type;wherein said first MOS transistor is coupled between a first voltage source and a first node of said SRAM cell, said second MOS transistor is coupled between said first voltage source and a second node of said SRAM cell, said third MOS transistor is coupled between said first node and a second voltage source, said fourth MOS transistor is coupled between said second node and said second voltage source, gates of said first and said third MOS transistor are coupled to said second node and gates of said second and fourth MOS transistors are coupled to said first node.