Patent ID: 8704807
Filing Date: 2014-04-22
Classification: G09G

Abstract:
1. A scan driver comprising: a first stage having a clock terminal electrically coupled to a first clock line and a control terminal electrically coupled to a first control line; and a second stage having a clock terminal electrically coupled to a second clock line, and a control terminal electrically coupled to a second control line, wherein the first and second stages are configured to drive a first scan signal output from the first stage and a second scan signal output from the second stage to at least partially overlap each other, wherein each of the first stage and the second stage comprises: a first switching device having a control electrode electrically coupled to an input terminal, the first switching device being coupled between a first power voltage line and a first node; a second switching device having a control electrode electrically coupled to the input terminal, the second switching device being coupled between a second power voltage line and a second node; a third switching device having a control electrode electrically coupled to the first switching device; a fourth switching device having a control electrode electrically coupled to the first switching device, the fourth switching device being coupled between the third switching device and the second node, wherein the third switching device is coupled between the first power voltage line and the fourth switching device; a fifth switching device having a control electrode electrically coupled to the first control line, the fifth switching device being coupled between the second power voltage line and the first node; a sixth switching device having a control electrode electrically coupled to the first node, the sixth switching device being coupled between the first power voltage line and a third node; a seventh switching device having a control electrode electrically coupled to the second node, the seventh switching device being coupled between the third node and the clock terminal; an eighth switching device having a control electrode electrically coupled to the first node, the eighth switching device being coupled between the first power voltage line and an output terminal; a ninth switching device having a control electrode electrically coupled to the second node, the ninth switching device being coupled between the output terminal and the second power voltage line; a first capacitor coupled between the first power voltage line and the control electrode of the sixth switching device; a second capacitor coupled between the control electrode of the seventh switching device and the third node; and a third capacitor coupled between the control electrode of the ninth switching device and the output terminal.