Patent ID: 7552436
Filing Date: 2009-06-23
Classification: G06F

Abstract:
1. A method of performing memory mapped input output operations to an alternate address space comprising: establishing a first instruction directed to a first memory mapped input output alternate address space associated with an adapter to store data in accordance with resource address designation, said resource address designation configured for decomposition thereof such that said first memory mapped input output alternate address space associated with said adapter is accessible; establishing a second instruction directed to said first memory mapped input output alternate address space associated with an adapter to load data in accordance with said resource address designation; allocating, through a host program, at least one of a real resource and a virtual resource associated with said first memory mapped input output alternate address space to a guest program started by the host program; ensuring that a process executed by the guest program corresponds to said at least one of the real resource and the virtual resource allocated to the guest program, in a manner that is not visible to the quest program; and wherein said process issues at least one of said first instruction and said second instruction and thereby causes execution of at least one of said store and load with said first memory mapped input output alternate address space.