Patent ID: 6080621
Filing Date: 2000-06-27
Classification: H01L

Abstract:
A method of manufacturing dynamic random access memory, the method comprising the steps of:providing a substrate having a field effect transistor formed thereon, wherein the field effect transistor includes a first source/drain region and a second source/drain region;forming a bit line electrically coupled with the first source/drain region, wherein the bit line is further covered on top by a cap layer;forming first spacers on the sidewalls of the bit line;forming a first dielectric layer, an etching stop layer and a first insulating layer sequentially over the substrate structure;forming a self-aligned contact opening that passes through the first dielectric layer, the etching stop layer and the first insulating layer, and exposes the second source/drain region;depositing a conductive material into the self-aligned contact opening to form a first conductive layer that couples electrically with the second source/drain region;patterning the first insulating layer to form an opening in the first insulating layer;forming a second conductive layer conformal to the surface profile of the substrate so that the etching stop layer, the first conductive layer and the first insulating layer are covered;forming second spacers over the second conductive layer that covers the first insulating layer and third spacers over the second conductive layer that covers the first conductive layer;depositing conductive material over the substrate structure and into the space between the second spacers and the third spacers forming a third conductive layer;removing a portion of the third conductive layer and the second conductive layer to expose the first insulating layer, the second spacers and the third spacers;removing the first insulating layer, the second and the third spacers to expose a storage electrode structure comprised of the first, the second and the third conductive layers;forming a dielectric thin film over the exposed storage electrode structure; andforming a fourth conductive layer over the dielectric thin film to function as a cell electrode.