Patent ID: 6207491
Filing Date: 2001-03-27
Classification: H01L

Abstract:
A method for eliminating leakage current in a semiconductor device by preventing silicon loss in a first area of a substrate during fabricating said semiconductor device, said method comprising:forming a first gate structure on a second area of said substrate, and a first structure together with a second structure on said first area of said substrate;forming a dielectric layer on said first gate structure, said first structure, said second structure, and said exposed substrate;etching a first portion of said dielectric layer to remain a second portion of said dielectric layer;forming a photoresist pattern on said dielectric layer over said first area of said substrate;etching said exposed second portion of said dielectric layer using said photoresist pattern as a mask to form spacers of said first gate structure, wherein said spacers and said gate structure constituting a gate electrode;forming a source region and a drain region in said substrate, said gate electrode, said source region, and said drain region constituting a first transistor;removing said photoresist pattern; andforming a second transistor, a capacitor, and a control line in said first area of said substrate by using said first structure and said second structure.