Patent ID: 9059708
Filing Date: 2015-06-16
Classification: H03K

Abstract:
1. A signal generating apparatus for generating a power-on-reset signal, comprising: a bias circuit for generating an output bias voltage, wherein the bias circuit comprises at least one bipolar junction transistor (BJT), a base terminal of the BJT is coupled to a collector terminal of the BJT, and the output bias voltage is related to an emitter-to-base voltage of the BJT; a power-on-reset signal generating circuit comprising a duplication unit and a hysteresis unit, the duplication unit configured to generate a first voltage by substantially duplicating the output bias voltage, the hysteresis unit configured to receive the first voltage and generate a second voltage based on the first voltage; a bandgap reference circuit, for generating a third voltage; and a determination unit, coupled to the power-on-reset signal generating circuit and the bandgap reference circuit, the determination unit generating the power-on-reset signal according to the second voltage and the third voltage.