Patent ID: 7560326
Filing Date: 2009-07-14
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure, comprising: forming a stress receiving layer over a stress inducing layer with an interface therebetween; and providing a carbon doping of material at the interface between the stress receiving layer and the stress inducing layer to reduce misfit dislocations at the interface, wherein the stress inducing layer comprises at least one of a relaxed and unrelaxed SiGe layer and the stress receiving layer is an upper Si layer, a percentage of the carbon doping is between about 0.0 1% and about 1% (atomic percent), the doping comprises a thickness of approximately 50 Å to 500 Å at the interface, the doping is imparted at least one of during the forming of the stress inducing layer and the stress receiving layer, a tensile stress formed by the stress inducing layer is stabilized by a doping at the interface of the stress inducing layer and the stress receiving layer, and further comprising: filling the openings with an epitaxial material.