Patent ID: 6653224
Filing Date: 2003-11-25
Classification: H01L

Abstract:
A method for fabricating semiconductor structures on an insulator, comprising:forming a LowK dielectric material over the insulator; forming a capping film over the LowK dielectric material; forming features in the LowK dielectric material, the features having inner defined by the LowK dielectric material, the features defining regions for receiving conductive material; forming a barrier layer over the capping film and over the surfaces of the features; filling the features with the conductive material, the filling leaving an overburden amount of the conductive material; performing a chemical mechanical planarization (CMP) operation to remove the overburden amount of the conductive material, the CMP operation configured to be discontinued upon reaching at least part of the barrier layer; and performing a dry etch to remove the barrier layer, the dry etch being configured to expose at least part of the capping film, wherein the CMP operation is an ultra-gentle CMP operation in which an abrasive-less slurry is utilized and further in which an inhibitor assisted direct charge transfer chemistry is utilized.