Patent ID: 8604552
Filing Date: 2013-12-10
Classification: C23C,H01L

Abstract:
1. A semiconductor device, comprising: a first element region where n-channel field-effect transistors are formed; a second element region where p-channel field-effect transistors are formed adjacent to the first element region; a first stress film formed to cover the n-channel field-effect transistors above the first element region, the first stress film applying a strain to channel regions of the n-channel field-effect transistors; a second stress film formed on the first stress film above the first element region, the second stress film applying a strain to the channel regions of the field-effect transistors; a third stress film formed on the second stress film above the first element region, the third stress film applying a strain to the channel regions of the field-effect transistors; and a fourth stress film formed to cover the p-channel field-effect transistors above the second element region, the fourth stress film applying a strain to the channel regions of the p-channel field-effect transistors, wherein a number of stress films formed above the first element region is greater than a number of stress films formed above the second element region, wherein the first stress film is thinner than the second stress film and the second stress film is thinner than the third stress film.