Patent ID: 6731527
Filing Date: 2004-05-04
Classification: G11C

Abstract:
A semiconductor memory device, comprising:an array of memory cells arranged in rows and columns, said rows extending in a first direction and said columns extending in a second direction substantially perpendicular to said first direction; wherein said array of memory cells is organized into a plurality of memory cell cores each comprising a plurality of said memory cells, said memory cell cores being arranged in an array of rows and columns of memory cell cores extending in said first and second directions, respectively; and wherein each two adjacent columns of memory cores define a substantially columnar stripe therebetween, such that a plurality of said columnar stripes are defined throughout said plurality of memory cell cores; said memory device further comprising: a plurality of conductive column select lines extending in said second direction along said columnar stripes defined between adjacent columns of memory cell cores; a plurality of conductive power straps extending in said second direction along said columnar stripes defined between adjacent columns of memory cell cores; and a plurality of conductive control signal lines extending in said second direction along said columnar stripes defined between adjacent columns of memory cell cores; wherein each two adjacent rows of memory cell cores define an elongate stripe therebetween extending in said first direction; wherein said memory device further comprises sense amplifier circuitry disposed in said elongate stripes extending in said first direction between adjacent rows of memory cell cores; wherein said memory device is organized into a plurality of sub-arrays of memory cells arranged in rows and columns of sub-arrays extending in said first and second directions, respectively, each sub-array comprising a plurality of memory cell cores; said memory device further comprising at least one input/output (I/O) circuit disposed between and functionally coupled to two sub-arrays in a row of said sub-arrays.