Patent ID: 6027981
Filing Date: 2000-02-22
Classification: H01L

Abstract:
A method for forming a capacitor of a dynamic random access memory cell, said method comprising:forming a first doped polysilicon layer over a semiconductor substrate, at least a portion of said first doped polysilicon layer communicating to said substrate;forming a first dielectric layer on said first doped polysilicon layer;patterning said first dielectric layer to define a storage node pattern therein;forming a second doped polysilicon layer on said first dielectric layer and said first doped polysilicon layer;forming a second dielectric spacer on sidewall of said second doped polysilicon layer;etching said second doped polysilicon layer and said first doped polysilicon layer using said second dielectric spacer as a mask, therefore exposing surface of said first dielectric layer and sidewalls of said first doped polysilicon layer and said second doped polysilicon layer;forming a third doped polysilicon spacer on sidewalls of said second dielectric spacer, said second doped polysilicon layer and said first doped polysilicon layer;removing said second dielectric spacer and said first dielectric layer;forming a third dielectric layer on a surface of said first doped polysilicon layer, said second doped polysilicon layer, and said third doped polysilicon spacer; andforming a conductive layer on said third dielectric layer.