Patent ID: 6958289
Filing Date: 2005-10-25
Classification: H01L

Abstract:
1. A method for forming a metal line in a semiconductor device, comprising the steps of: sequentially forming a first insulation film, an etch barrier film and a second insulation film on a semiconductor substrate on which a substructure has been formed; forming a plurality of via holes for exposing the substructure in different points by patterning the second insulation film, the etch barrier film and the first insulation film of the resulting structure, and forming a plurality of trench patterns respectively on the plurality of via holes by re-patterning the second insulation film and the etch barrier film of the resulting structure; forming a plurality of vias and trenches by filling a metal material in the plurality of via holes and trench patterns; removing the second insulation film; and forming a third insulation film over the resulting structure including the removed second insulation film.