Patent ID: 7319243
Filing Date: 2008-01-15
Classification: H01L

Abstract:
1. A flat panel display, comprising: a substrate; a pixel electrode formed on the substrate; a semiconductor layer formed on the substrate and spaced apart from the pixel electrode, and having source and drain regions formed at both end portions thereof; a first insulating layer formed over a surface of the substrate to cover the pixel electrode and the semiconductor layer, except an opening portion of the pixel electrode; a gate electrode formed on the first insulating layer over the semiconductor layer; a second insulating layer formed over the surface of the substrate, except the opening portion of the pixel electrode; contact holes formed in the first and second insulating layers, which expose a portion of the pixel electrode and portions of the source and drain regions of the semiconductor layer; source and drain electrodes formed on the second insulating layer; an electroluminescence (EL) layer formed on the opening portion of the pixel electrode; and a cathode formed over the EL layer, wherein the source electrode is electrically connected to the source region through one of the contact holes, and the drain electrode is electrically connected to the drain region and the pixel electrode through another one of the contact holes, and wherein the semiconductor layer, the gate electrode and the source and drain electrodes serve as a thin film transistor.