Patent ID: 7260012
Filing Date: 2007-08-21
Classification: G11C

Abstract:
1. A fuse latch circuit comprising: a fuse; a first inverter in which an input end is connected to one end of the fuse; a second inverter in which an input end is connected to an output end of the first inverter; a first transistor of a first conductivity type, in which a first power supply potential is input to a source, a drain is connected to the one end of the fuse, and a pulse signal for initialization is input to a gate; a second transistor of the first conductivity type, in which the first power supply potential is input to a source, a drain is connected to the one end of the fuse, and a gate is connected to the output end of the first inverter; and a third transistor of a second conductivity type disposed immediately below the fuse, in which a second power supply potential is input to a source, a drain is connected to the other end of the fuse, and the pulse signal is input to a gate, wherein conductance of the first transistor is higher than that of the second transistor.