Patent ID: 6054343
Filing Date: 2000-04-25
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device having shallow trench isolation, comprising the steps of:providing a substrate;forming a pad oxide/silicon mask on said substrate;patterning said pad oxide/silicon mask;removing portions of said pad oxide/silicon mask and said substrate to form a trench in said substrate, said trench having a bottom and sidewalls;forming a liner oxide on said bottom and said sidewalls of said trench and concurrently oxidizing exposed portions of said silicon mask extending over the corners of said trench;depositing a nitride fill over said pad oxide/silicon mask and said trench; andremoving the unoxidized portion of said silicon mask and the oxidized portion of said silicon mask not extending over the corners of said trench while retaining the oxidized portions of said silicon mask extending over said corners of said trench.