Patent ID: 7459750
Filing Date: 2008-12-02
Classification: H01L,H02M,Y02B

Abstract:
1. A down converter, comprising: an integrated circuit having a control Field Effect Transistor (FET) (CF) disposed in a first well having a first polarity; and a synchronous rectifier FET (SF) having a source region and a channel region both disposed in a second well having a second polarity opposite the first polarity, wherein the control FET is a Lateral Double-Diffused Metal Oxide Semiconductor (LDMOS) type and the SF is a vertical Metal Oxide Semiconductor type; the first and second wells are formed in contact with a heavily doped region of a substrate; and a conductivity- type of the LDMOS FET and a conductivity-type of the heavily doped region of the substrate are of the same type; wherein at least a portion of the heavily doped region forms a drain region for the SF; and a source contact of the CF is connected to drain region of the SF via a conductive plug in the substrate.