Patent ID: 8386982
Filing Date: 2013-02-26
Classification: G06F

Abstract:
1. A computer-implemented method for assigning pins in an electronic design comprising: generating, using one or more processors, a pin list associated with the electronic design, the pin list having a one or more pins that are directly and indirectly connected with at least one of a master partition and a clone partition; sorting, using one or more processors, one or more pins within the pin list based upon, at least in part, a number of local connections to generate a sorted pin list; selecting, using one or more processors, a first pin having a highest number of local connections of the sorted pin list as a reference pin; selecting, using one or more processors, a partition associated with the reference pin, as a reference partition; identifying, using one or more processors, one or more alignment zones for every connected pair of pins in the sorted pin list; and transforming, using one or more processors, all alignment zones to the reference partition using a depth-first-search.