Patent ID: 6888357
Filing Date: 2005-05-03
Classification: G01R,H05B

Abstract:
1. An electric circuit arrangement for checking the intactness of a photosensor array and for checking the intactness of an electrical connection between the photosensor array and a microprocessor spatially separated from the photosensor array, the electrical connection connecting an output of the photosensor array to an input of the microprocessor for the microprocessor to receive an output signal from the photosensor array for evaluation, the output of the photosensor array having a high resistance in an inactive state when the photosensor array is intact, the arrangement comprising: a first test resistor connecting the output of the photosensor array to one of a ground voltage and a supply voltage, the first test resistor being in the spatial vicinity of the photosensor array on one side of the electrical connection; and a second test resistor connecting the input of the microprocessor to a port output of the microprocessor, the port output of the microprocessor being operable to be connected to either the ground voltage or the supply voltage, the second test resistor being in the spatial vicinity of the microprocessor on the other side of the electrical connection.