Patent ID: 6800509
Filing Date: 2004-10-05
Classification: H01L

Abstract:
A process for forming a trench-gate power MOSFET, comprising the steps of:forming a trench deep into a drift layer of a first conductivity type above a substrate of said first conductivity type; forming a first oxide on a surface of said trench; depositing a nitride on a surface of said first oxide; forming a second oxide filled in said trench; etching said second oxide for leaving a thick oxide at a bottom of said trench; etching said nitride for remaining a part of said nitride at said bottom of said trench; forming a gate oxide on a sidewall of said trench; forming a gate conductor filled in said trench; forming a well region of a second conductivity type opposite to said first conductivity type adjacent to said sidewall of said trench; forming a source region of said first conductivity type on said well region; forming an insulator for covering on said gate conductor and a surface of said source region; and depositing a metal for electrically connecting said source region with said well region.