Patent ID: 6535027
Filing Date: 2003-03-18
Classification: G01R

Abstract:
A peak detector circuit for providing a voltage indicative of the maximum voltage of an input signal, the peak detector circuit comprising, in combination:a comparator receiving the input signal and a reference voltage, and having a comparator output that provides a low voltage when the input signal exceeds the reference voltage; a PNP transistor coupled via a resistive network to the comparator output, the PNP transistor being conductive when the comparator output provides a low voltage and being non-conductive when the comparator output provides a high voltage; when the PNP transistor is conductive, the PNP transistor driving current to charge a capacitor, wherein the capacitor provides a DC output voltage; and the capacitor being coupled with a voltage divider circuit that provides the reference voltage to the comparator, whereby the DC output voltage is indicative the maximum voltage of the input signal.