Patent ID: 8516024
Filing Date: 2013-08-20
Classification: G06F

Abstract:
1. A method of establishing thread priority in a processor comprising: assigning a priority value in a memory to indicate which of a first and second threads has a higher priority; providing said first thread access to a resource, wherein said resource is selected from a group consisting of: a decode unit, a trace cache/MSROM, a rename/allocation unit, an execution unit, a retire unit, and a bus; selecting first and second counter values based on the priority value in the memory; based on a first counter operation to the first counter value, switching access to the resource from the first thread to the second thread; based on a second counter operation to the second counter value, switching access to the resource from the second thread to the first thread; selecting a first number and a second number based on said priority value in the memory; supplying said first number of instructions to the resource from a first thread; and supplying said second number of instructions to the resource from a second thread; wherein said first counter value is higher than said second counter value, and the first and second counter operations are performed using at least one of a free-running timer and a down-counter.