Patent ID: 8144524
Filing Date: 2012-03-27
Classification: G11C

Abstract:
1. A semiconductor device comprising: a plurality of pads comprising a plurality of sets of pads and a first power supply pad which is free from the sets of pads, each of the sets of pads including first and second DQ pads and second and third power supply pads, the first DQ pad in each of the sets of pads being sandwiched between the second and third power supply pads in each of the sets of pads, the second DQ pad in each of the sets of pads being disposed on opposite side to the first DQ pad in each of the sets of pads with respect to the second power supply pad in each of the sets of pads, wherein the second DQ pad in first one of the sets of pads is sandwiched between the second power supply pad in the first one of the sets of pads and the first power supply pad without an intervention of any one of remaining ones of the pads between the second DQ pad in the first one of the sets of pads and the first power supply pad.