Patent ID: 7349277
Filing Date: 2008-03-25
Classification: G11C

Abstract:
1. A synchronous dynamic random access memory (“SDRAM”) device, comprising: a row address circuit operable to receive and decode row address signals applied to external address terminals of the SDRAM device; a column address circuit operable to receive and decode column address signals applied to the external address terminals; a DRAM cell array operable to store data written to or read from the array at a location determined by the decoded row address signals and the decoded column address signals; a data path circuit operable to couple data signals corresponding to the data between the array and external data bus terminals; a command decoder operable to decode a plurality of command signals applied to respective external command terminals of the SDRAM device, the command decoder being operable to generate control signals corresponding to the decoded command signals; refresh circuitry operable to initiate a refresh of the DRAM memory cells responsive to control signals from the command decoder resulting from a refresh command being applied to the command decoder; a delay circuit coupled to the command decoder and to the refresh circuitry, the delay circuit being operable to initiate a refresh of the DRAM memory cells after a delay interval corresponding to a portion of at least one period of the clock signal and operable to determine the delay interval by combining a base delay value with a delay adjustment value; a mode register programmed with the base delay value corresponding to the portion of at least one period of the clock signal, the mode register being coupled to the delay circuit so that the delay circuit can receive the base delay value from the mode register; and a configuration register receiving the delay adjustment value from data bus terminals of the SDRAM device, the configuration register being coupled to the delay circuit so that the delay circuit can receive the delay adjustment value from the configuration register.