Patent ID: 7092692
Filing Date: 2006-08-15
Classification: H01L,H03D

Abstract:
1. A compensation bias circuit for a CMOS passive mixer, comprising: a mixer having RF input ports, input ports coupled to LO amplifier outputs, and IF output ports, said mixer mixing the RF signal applied to said RF input ports and the amplified LO frequency applied to said input ports coupled to said LO amplifier outputs, said IF output ports supplying an IF signal which is the result of an up-conversion or a down-conversion of said RF signal and said amplified LO frequency, said mixer comprising a plurality of n-channel MOSFET transistors; a LO amplifier having LO inputs and said LO amplifier outputs, said LO amplifier comprising one or more differential amplifiers coupled in series to amplifiy said LO frequency applied at said LO inputs; and a biasing circuit coupled to said RF input ports, said biasing circuit supplying a tracking bias voltage to said RF input ports to compensate for variations of threshold voltage, temperature, and power supply, said biasing circuit comprising a transistor and a current source coupled serially between terminals of a voltage supply, where a junction of said transistor of said biasing circuit and said current source supplies said tracking bias voltage, said biasing circuit further comprising a reference resistive means and a feedback amplifier which drives cascade current mirrors, where an output of one or more of said current mirrors is coupled to said LO amplifier to maintain constant a value of the gate-source voltage minus a threshold voltage of said n-channel MOSFET transistors of said mixer.