Patent ID: 9024957
Filing Date: 2015-05-05
Classification: G06F,G06T

Abstract:
1. A method for loading a shader program, comprising: accessing a plurality of address independent shader programs in system memory of a computer system; writing a plurality of offset values into a GPU memory by accessing a global register table that aliases a plurality of memory locations of the GPU memory corresponding to each of a plurality of instruction unit tables of a plurality of functional units of a pipeline, to enable an offset value to be written simultaneously to each of the plurality of instruction unit tables; and wherein the offset value indicates where the first shader program is to be stored, and, from a first instruction of a first of the plurality of shader programs to a last instruction of a last of the plurality of shader programs, loading each instruction sequentially from an address indicated by the offset value to successively incremented addresses of the GPU memory; performing a respective plurality of DMA transfers of each of the shader programs from system memory into GPU memory such that each of the shader programs are loaded into GPU memory in an address-independent manner.