Patent ID: 6413835
Filing Date: 2002-07-02
Classification: H01L

Abstract:
In the fabrication of an integrated circuit, particularly an integrated circuit for radio frequency applications, a method for forming shallow and deep trenches for isolation of semiconductor devices comprised in said circuit, said method comprising the steps of:providing a semiconductor substrate; forming at least one shallow trench by using a first mask formed on said substrate, said shallow trench extending into said substrate; forming a dielectric layer of a predetermined thickness on the structure obtained subsequent to the step of forming the at least one shallow trench; forming at least one opening in said dielectric layer by using a second mask formed on said dielectric layer and with an edge of said second mask aligned to an edge of said shallow trench with a maximum misalignment of half the predetermined thickness of said dielectric layer, said opening extending within the shallow trench to the bottom thereof, whereby a spacer of a width equal to the predetermined thickness is formed in said shallow trench and along said edge thereof; and forming a deep trench in said opening by using said dielectric layer as a hard mask, said deep trench extending further into said substrate and being self-aligned to said shallow trench.