Patent ID: 7761695
Filing Date: 2010-07-20
Classification: H03M,H04N

Abstract:
1. A data processing circuit comprising: a programmable processor with an instruction set that comprises an instruction with a first operand that refers to a string of bits, and a second operand that refers to a position in the string of bits, the programmable processor being arranged to return, as a result of executing said instruction, a length code that is indicative of a count of a number of bits that occurs, from said position in the string of bits, until the string of bits from said position deviates from a predetermined bit pattern, and wherein the instruction has a third operand that refers to a further string of bits for extending said string of bits, wherein the bits that are counted in the count include bits from positions starting from said position and continuing from the end of the bit string into a start of the further bit string, when the bits from said position until the end of the bit string do not deviate from the pattern.