Patent ID: 8278145
Filing Date: 2012-10-02
Classification: H01L,H05K

Abstract:
1. A method for packaging a semiconductor device, comprising: providing a wafer having an top surface and a back surface, and a plurality of dies on said wafer; sawing the wafer to obtain a plurality of dies having an active surface, said active surface having a plurality of pads; providing a substrate having a top surface and a back surface, a plurality of first connecting points on said top surface, and a plurality of second connecting points on said back surface corresponds to said plurality of first connecting points, and said plurality of first connecting points being electrically connected said plurality of second connecting points; attaching said plurality of dies on said top surface of said substrate, said active surface of said plurality of dies being inversed toward said top surface of said substrate by using a flip-chip technology, and said plurality of pads being electrically connected said plurality of first connecting points; filling a under fill molding material to encapsulate said active surface of said plurality of dies and portion of said top surface of said substrate to form an package body; forming a center line material layer directly connected said top surface being not covered by said package body on said substrate; providing at least one memory component having an active surface and a back surface, and a plurality of pads on said active surface of said memory component; attaching said memory component on said top surface of said center line material layer on said substrate, said active surface of said memory component being inversed toward said top surface of said center line material layer, and said plurality of pads being electrically connected said plurality of first connecting points; mounting a top lid on said back surface of said memory component and on said back surface of said plurality of dies; forming a plurality of conductive elements on said back surface of said substrate and being electrically connected said plurality of second connecting points; and performing more than once IR reflow method to fix said plurality of connecting elements on said plurality of second connecting points.