Patent ID: 8304304
Filing Date: 2012-11-06
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming an n-type semiconductor region and a p-type semiconductor region on a semiconductor substrate; forming a first gate dielectric layer above the n-type semiconductor region; forming a second gate dielectric layer above the p-type semiconductor region, the second gate dielectric layer having a composition different from that of the first gate dielectric layer; and forming a gate electrode layer over the n-type semiconductor region and the p-typesemiconductor region, after said forming a first gate dielectric layer and said forming a second gate dielectric layer, such that a portion of the first gate dielectric layer in contact with the gate electrode layer and a portion of the second gate dielectric layer in contact with the gate electrode layer include oxygen, a first element of at least one element selected from the group consisting of Zr, Hf, Ti, Ta, Nb, V, Sc, Y, a lanthanoide series and a actinide series, and said forming a gate electrode layer over the n-type semiconductor region and the p-type semiconductor region includes making the atomic density of the first element in the portion of the second gate dielectric layer be lower than the atomic density of the first element in the portion of the first gate dielectric layer.