Patent ID: 6678018
Filing Date: 2004-01-13
Classification: G02F,H01L

Abstract:
A method for fabricating a thin film transistor array substrate for a liquid crystal display, comprising the steps of:forming a gate line assembly and a common electrode line assembly on a first substrate, thc gate line assembly comprising a plurality of gate lines and gate pads, the common electrode line assembly comprising common signal lines and common electrodes; forming a gate insulating layer; forming a semiconductor pattern; forming an ohmic contact pattern; forming a data line assembly and pixel electrodes, the data line assembly comprising a plurality of data lines, data pads, and source and drain electrodes, the pixel electrodes being connected to the drain electrodes while proceeding parallel to the common electrodes; forming a passivation layer; and etching the passivation layer and the gate insulating layer such that the gate pads and the data pads are exposed to the outside, wherein the passivation layer and the gate insulating layer are etched after a second substrate is assembled to the first substrate, and the passivation layer and the gate insulating layer are exposed externally to the second substrate, wherein the data line assembly, the pixel electrodes, the ohmic contact pattern and the semiconductor pattern are formed through a photolithography using one photoresist pattern of different thickness, and wherein the photoresist pattern has a first portion placed between the source electrode and the drain electrode with a predetermined thickness, a second portion for forming the data line assembly and the pixel electrodes thicker than the first portion, and a third portion thinner than the first portion.