Patent ID: 8055492
Filing Date: 2011-11-08
Classification: G01R,G06F

Abstract:
1. A computer software product, comprising a computer-readable non-transitory medium in which computer program instructions are stored, which instructions, when read by a computer, cause the computer to execute a method for validating a multi-processor design by simulating program execution, comprising the steps of: identifying a plurality of mutually dependent non-adjacent resources having non-contiguous addresses accessed by a multi-processor architecture test program that includes a first simulated process and a second simulated process, wherein each of the mutually dependent non-adjacent resources has an adjacent resource at a contiguous address therewith; identifying a set of value-lists, each value-list comprising a list of elements, wherein each of the elements corresponds respectively to a permissible value of one of the mutually dependent non-adjacent resources and to a permissible value of the adjacent resource thereof; associating a set of non-unique values for said mutually dependent non-adjacent resources; initializing said mutually dependent non-adjacent resources; using said initialized mutually dependent non-adjacent resources executing said test program by the steps of: executing a first sequence of instructions in said first simulated process; and while performing said step of executing said first sequence, executing a second sequence of instructions in said second simulated process; wherein each of said mutually dependent non-adjacent resources is accessed by at least one of said first simulated process and said second simulated process, and wherein upon completion of said steps of executing said first sequence and executing said second sequence, a member of said set of non-unique values is required to be present in each of said mutually dependent non-adjacent resources and in said adjacent resource thereof; creating, by the computer executing said test program, a set of tagged value-lists, each tagged value-list identifying an allowed subcombination of values of one of the mutually dependent non-adjacent resources and the adjacent resource thereof resulting from the steps of executing said first sequence and said second sequence, and formed by tagging members of a list of predicted results with a combination identifier which includes a string of literals identifying a particular outcome of said test program, wherein at least a portion of said mutually dependent non-adjacent resources have a common combination identifier, each of said tagged value-lists comprising: said list of elements; and said combination identifier; upon completion of an execution of said first sequence and said second sequence comparing contents of said mutually dependent non-adjacent resources and said adjacent resource thereof with a corresponding member of said set of tagged value-lists to match the allowed subcombination of values thereof, said step of comparing performed by selecting commonly tagged members of said set of tagged value-lists for each said combination identifier; and responsively to a failure to match any allowed subcombination of values in iterations of said step of comparing reporting that an architectural violation of the multi-processor design exists.