Patent ID: 8812745
Filing Date: 2014-08-19
Classification: G06F,G06K

Abstract:
1. A method of controlling a memory device including a memory, the method comprising: receiving a first command for initialization, a second command for reading information for the memory device, and a third command for controlling a timing of a power supply to the memory device; having information for judging whether a process of the third command is completed, failed, or not executed; returning a response indicating whether the memory device supports the third command in response to the second command; in response to the third command, executing the process of the third command, shifting to a low power mode, and saving flag information indicating whether power supply to the memory device has been cut off before completion of shifting to the low power mode; executing a first initializing process in response to (1) the first command received after supplying a power to the memory device and (2) information indicting incompletion of the process of the third command being received before a power supply to the memory device was stopped a previous time prior to power again being supplied to the memory device, and executing a second initializing process in response to (1) the first command received after supplying the power to the memory device and (2) information indicating completion of the process of the third command being received before the power supply to the memory device was stopped a previous time prior to power again being supplied to the memory device, wherein the second initializing process is completed quicker than the first initializing process, and the first and second initializing processes are alternative processes, which are executed for the memory device to be ready to be written and read by a request from a host.