Patent ID: 6147508
Filing Date: 2000-11-14
Classification: H03K

Abstract:
An apparatus for controlling power consumption of a logic device comprising:a metal oxide semiconductor (MOS) device having a well comprising a first dopant region in a substrate, two second dopant regions in said well, a portion of said well being operable for forming a conducting channel there between, and a third region in said well having a predetermined first dopant concentration greater than a first dopant concentration in said well, wherein said third region is operable for receiving a back bias signal, and wherein said conducting channel forms in response to a threshold voltage controlled by said back bias signal; anda voltage generator circuit for generating said back bias signal coupled to said third region, wherein said voltage generator circuit is operable for outputting a voltage in response to said temperature of said logic device and wherein said output voltage controls said threshold voltage wherein said temperature of said logic device is returned to a predetermined temperature.