Patent ID: 7948463
Filing Date: 2011-05-24
Classification: G09G

Abstract:
1. A liquid crystal display device comprising a plurality of pixels that are arranged in columns and rows so as to form a matrix pattern, each said pixel including a liquid crystal layer and a plurality of electrodes for applying a voltage to the liquid crystal layer, wherein each said pixel includes a first subpixel and a second subpixel, having liquid crystal layers to which mutually different voltages are applicable, and wherein each of the first and second subpixels includes a liquid crystal capacitor formed by a counter electrode and a subpixel electrode that faces the counter electrode through the liquid crystal layer, and a storage capacitor formed by a storage capacitor electrode that is electrically connected to the subpixel electrode, an insulating layer, and a storage capacitor counter electrode that is opposed to the storage capacitor electrode with the insulating layer interposed between them; and wherein the counter electrode is a single electrode provided in common for the first and second subpixels, while the storage capacitor counter electrodes of the first and second subpixels are electrically independent of each other, and wherein the device further includes a plurality of electrically independent storage capacitor trunks, and wherein each said storage capacitor trunk is electrically connected to the respective storage capacitor counter electrodes of either the first subpixels or the second subpixels of the pixels through storage capacitor lines, and wherein one vertical scanning period (V-Total) of an input video signal is divided into at least two subframes, in each of which a display signal voltage is written on each said pixel, two consecutive vertical scanning periods of the input video signal including a sequence in which the display signal voltage is written at the same polarity in two consecutive subframes and then has its polarity inverted in the next subframe, and wherein a storage capacitor counter voltage supplied through each said storage capacitor trunk has, in each said subframe, a first waveform, oscillating in a first cycle time P wherein between two subframes in which the polarity is inverted, the first waveforms of the storage capacitor counter voltages have a phase difference of 180 degrees.