Patent ID: 7764548
Filing Date: 2010-07-27
Classification: G11C

Abstract:
1. A semiconductor memory device having two refreshment modes of auto-refreshment and partial self-refreshment imposed on memory cells, the device comprising: a command decoder which detects one of the refreshment modes from an input command, outputs type data which indicates the detected refreshment mode, and outputs a refreshment signal which indicates the start of refreshment; a mode register in which the type data is set; a signal selection circuit which determines whether or not the refreshment signal is to be delayed, in accordance with the type data set in the mode register, and outputs the refreshment signal, which is delayed or not delayed in accordance with the result of the determination, as a refreshment start signal; and a control circuit which reads the type data set in the mode register based when receiving the refreshment start signal, and performs refreshment corresponding to the type data.