Patent ID: 7991364
Filing Date: 2011-08-02
Classification: H04B

Abstract:
1. A circuit comprising: a diplexer having a first port interfacing a first node of the circuit to a common port of the diplexer through at least one frequency adjustable first filter disposed along a first radio branch, and a second port interfacing a second node of the circuit to the common port through at least one frequency adjustable second filter disposed along a second radio branch; wherein the said diplexer comprises a branching diplexer and the at least one frequency adjustable first filter comprises a frequency adjustable first diplexer and a frequency adjustable second diplexer, arranged in series with one another such that either: a high pass port of the first diplexer interfaces to the second diplexer and a low pass port of the second diplexer interfaces to the first port of the branching diplexer, and further wherein a low pass port of the first diplexer interfaces to a first termination and a high pass port of the second diplexer interfaces to a second termination; or a low pass port of the second diplexer interfaces to the first diplexer and a high pass port of the first diplexer interfaces to the first port of the branching diplexer, and further wherein a high pass port of the second diplexer interfaces to a first termination and a low pass port of the first diplexer interfaces to a second termination; wherein at least one of the first and second filters has a control signal input configured to change at least one of a filtering frequency and filtering attenuations according to control signal input thereto.