Patent ID: 9123691
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A thin film transistor, comprising: a substrate having a principal surface; a gate electrode disposed on the principal surface of the substrate; a gate insulating layer covering the gate electrode and the substrate; a source interconnect layer and a drain interconnect layer disposed on the gate insulating layer, wherein the source interconnect layer is spaced apart from the drain interconnect layer by a gap; a source electrode and a drain electrode respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer; and a semiconductor layer disposed above the gate insulating layer at a position overlapped with the gate electrode, wherein the semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, and filled in the gap between the source interconnect layer and the drain interconnect layer, wherein an edge of the source interconnect layer and an edge of the drain interconnect layer are interposed between the semiconductor layer and the gate insulating layer, wherein the semiconductor layer is not overlapped with the source electrode and the drain electrode when observed in a direction perpendicular to the principal surface of the substrate, and the source electrode and the drain electrode are spaced apart from the semiconductor layer by clearances through which portions of the source interconnect layer and the drain interconnect layer are exposed.