Patent ID: 6465317
Filing Date: 2002-10-15
Classification: H01L

Abstract:
A process for producing a bipolar transistor with self-aligned emitter and extrinsic base, the process comprising the steps of:producing a structure comprising a semiconductor substrate in which an extrinsic collector, a lateral isolation region and an intrinsic collector region are formed, the structure having a main surface on which an amorphous silicon layer, defining a base window in the intrinsic collector region, and a layer that will form the future base of the transistor and covering the amorphous silicon layer and the base window, are deposited; successively depositing, on the layer that will form the future base of the transistor, an SiGe alloy layer, a thin silicon oxide layer, and a silicon nitride layer; etching, by means of a mask, the silicon nitride layer, the silicon oxide layer, and the SiGe alloy layer, in order to form, on the layer that will form the future base of the transistor, above the intrinsic collector region, a false emitter of geometry and dimensions corresponding to the desired geometry and dimensions of the final emitter; forming spacers on two opposite sides of the false emitter; forming an extrinsic base region in the layer that will form the future base of the transistor; forming a metal silicide layer on the extrinsic base region; depositing a thick silicon dioxide layer so as to cover the metal silicide layer and the false emitter; chemical-mechanical polishing of the thick silicon dioxide layer down to the level of the false emitter; etching the false emitter in order to form an emitter window; depositing a polysilicon layer filling the emitter window and covering the thick silicon dioxide layer; and etching, by means of a mask, the polysilicon layer in order to complete the emitter.