Patent ID: 7382307
Filing Date: 2008-06-03
Classification: H03M

Abstract:
1. An apparatus for converting an analog input signal into a digital output signal, said apparatus operating at a selectable data rate, comprising: an input unit for receiving a variable analog input signal and producing a constant analog signal; a first pipeline stage for receiving said constant analog signal and producing a first digital output number and a first analog remainder signal; at least one subsequent pipeline stage for receiving said first analog remainder signal and producing a second digital output number and a second analog remainder, wherein said first digital output number is delayed compared to said second digital output number; a summing unit for summing said first and second digital output numbers to generate said digital output signal; and a bias current generation unit, comprising: wherein said variable current is related to said selectable data rate and the first pipeline stage and the at least one subsequent pipeline stage each include a variable bandwidth amplifier coupled to said constant bias current generator and said variable bias current generator.