Patent ID: 9036123
Filing Date: 2015-05-19
Classification: G02F

Abstract:
1. An array substrate, comprising a gate line and a data line intersecting with each other to define a pixel unit, a plate-like electrode in the pixel unit, an electrode with slits and a thin film transistor, and an alignment film being provided on the array substrate, wherein within the pixel unit, an end of the electrode with slits away from a region of the TFT along the data line has an outer first side and an inner second side; the outer first side, the inner second side and a third side of the gate line of an adjacent pixel unit are perpendicular to a rubbing direction of the alignment film; the inner second side is located at the slits of the electrode with slits, and the third side is a side of the gate line of the adjacent pixel unit which is closest to the outer first side; and an angle between the rubbing direction of the alignment film and the data line is 7°.