Patent ID: 6078365
Filing Date: 2000-06-20
Classification: G02F

Abstract:
An active matrix liquid crystal panel having a plurality of pixels arrayed in a matrix format, comprising:a plurality of signal lines and a plurality of address lines which are arranged in a grid;a plurality of pixel electrodes arranged in correspondence with said pixels so as to be located at intersections of said signal lines and said address lines;a counter electrode opposing said pixel electrodes;a liquid crystal layer arranged between said pixel electrodes and said counter electrode;a plurality of transistors respectively arranged adjacent to said pixel electrodes, each transistor having a semiconductor active layer constituting a pair of source and drain regions and a channel region, a pair of source and drain electrodes for respectively connecting the source and drain regions to a corresponding pixel electrode and a corresponding signal line, and a gate electrode opposing the channel region via a gate insulating layer and connected to a corresponding address line; anda plurality of auxiliary capacitances respectively arranged adjacent to said pixel electrodes, each auxiliary capacitance having a pair of upper and lower electrodes electrically connected substantially in parallel to a corresponding pair of pixel electrodes and the counter electrode, a dielectric layer sandwiched between said upper and lower electrodes, and a semiconductor intervening layer sandwiched between said dielectric layer and said upper electrode,wherein said active layer and said intervening layer respectively comprise portions formed of a common semiconductor film,said active layer and said gate insulating layer have substantially a same plan-view contour at a position where said source and drain electrodes overlap with said gate electrode, andsaid intervening layer and said dielectric layer have substantially a same plan-view contour at a position where said upper electrode overlaps with said lower electrode.