Patent ID: 7936016
Filing Date: 2011-05-03
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate containing silicon, and having a main surface; an impurity diffusion layer formed in the main surface of the semiconductor substrate; a metal silicide layer formed in the impurity diffusion layer; an insulation layer stacked over the metal silicide layer; a gate insulation layer formed on the semiconductor substrate; a gate electrode formed on the gate insulation layer; and a contact plug formed in a contact hole, wherein the contact hole penetrates through the insulation layer and reaches the surface of the metal silicide layer is formed, wherein the metal silicide layer is formed below the gate insulation layer, wherein a recess part as a bottom portion of the contact hole is formed in the surface of the metal silicide layer and is formed below the gate insulation layer, and wherein the thickness of a portion of the metal silicide layer arranged immediately below the contact hole is smaller than the thickness of a portion of the metal silicide layer arranged around the contact hole.