Patent ID: 6706583
Filing Date: 2004-03-16
Classification: H01L

Abstract:
A method for making a heterojunction bipolar transistor on an insulated semiconductor substrate so as to minimize collector resistance and collector to substrate capacitance, the method comprising the steps of:forming a highly doped subcollector in a subcollector region on an insulated substrate; defining a collector region adjacent the subcollector region; forming a lightly doped collector adjacent to and in direct contact with the subcollector region; depositing a doped extrinsic base film stack on the lightly doped collector; etching a collector base and base emitter junction window in the extrinsic base film stack; forming a doped semiconductor intrinsic base in the base emitter junction window; depositing and etching self aligning base emitter spacers in the base emitter junction window; depositing and etching emitter material in the base emitter junction window; the emiter material having emitter walls; depositing and etching oxide spacers adjacent the emitter walls of the emitter material; defining an extrinsic base; and depositing conducting materials on the emitter and extrinsic base.