Patent ID: 6542393
Filing Date: 2003-04-01
Classification: G11C,H01L,H05K

Abstract:
A memory module comprising:a substrate with a connector and metal traces that electrically connect signals on the connector to metal pads on the substrate; a plurality of stacks of memory chips, each stack comprising: a lower memory chip having lower pins that are soldered to the metal pads on the substrate, the lower memory chip having a cap region of a chip package above the lower pins; an upper memory chip having upper pins; a hollowed printed-circuit board (PCB) between the lower memory chip and the upper memory chip, the hollowed PCB having a hollowed opening on a lower surface that fits over the cap region of the lower memory chip; upper bonding pads on an upper surface of the hollowed PCB, the upper bonding pads being soldered to the upper pins of the upper memory chip; and lower bonding pads on the lower surface of the hollowed PCB but outside the hollowed opening, the lower bonding pads being soldered to the lower pins of the lower memory chip, whereby the lower memory chip fits the hollowed opening of the hollowed PCB between the upper and lower memory chips in a stack.