Patent ID: 7049698
Filing Date: 2006-05-23
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device, comprising: a source region formed on a semiconductor substrate; a first conductor having a first resistivity formed over said source region; a first contact group having a plurality of first contacts connecting said source region and said first conductor, the first contacts being formed over said source region; a second conductor having a second resistivity over said first conductor; a second contact group having a plurality of second contacts connecting said first conductor and said second conductor, the second contacts being formed over said source region; a drain region formed on said semiconductor substrate; a third conductor having said first resistivity formed over said drain region; a third contact group having a plurality of third contacts connecting said drain region and said third conductor, the third contacts being formed over said drain region; a fourth conductor having said second resistivity formed over said third conductor; a fourth contact group having a plurality of fourth contacts connecting said third conductor and said fourth conductor, the fourth contacts being formed over said drain region; wherein a total number of the first contacts is different from a total number of the second contacts, and a total number of the third contacts is different from a total number of the fourth contacts.