Patent ID: 8102471
Filing Date: 2012-01-24
Classification: H03L,H04N

Abstract:
1. An H-sync phase locked loop device, comprising: an analog-to-digital converter, for receiving a TV video signal with an H-sync and converting the received signal into a digital TV video signal; an auto-gain-control and clamping circuit, for receiving the digital TV video signal, performing an AGC and clamping processing and then generating a clamped signal with a controlled amplitude; a slice level calculator, for receiving the above-mentioned clamped signal, estimating the level of the H-sync and outputting a level-indicating signal; an H-sync frequency calculator, comprising: an increment step number calculator, for outputting an increment step number according to the H-sync frequency, a predetermined frequency for each line to output pixels, and a predetermined total pixel quantity output from each line; and a discrete time oscillator, for receiving the increment step number and a dynamic increment step number and for adjusting the frequency of the timing signal output from the phase locked loop circuit according to the received step numbers.