Patent ID: 6567969
Filing Date: 2003-05-20
Classification: H03K

Abstract:
A programmable integrated circuit comprising:(a) a plurality of programmably configurable logic blocks (CLB's) having input terminals for receiving supplied function-input signals and output terminals for outputting function-output signals representing program-defined logic functions of the received function-input signals; and (b) a programmably configurable interconnect network for providing program-defined routing of signals between the CLB's; wherein each of said CLB's comprises: (a.1) a configuration memory for storing function-defining bits; (a.2) a plurality of function-defining multiplexers coupled to the configuration memory and to one another in tree-like manner for dynamically selecting for output as candidates for defining said function-output signals, selectable ones of the function-defining bits of said configuration memory, each of said function-defining multiplexers having at least one respective, dynamic selection control terminal for controlling the dynamic selecting action of the respective function-defining multiplexer; (a.3) a plurality of input-routing multiplexers coupled to the input terminals and to the dynamic-selection terminals of the function-selecting multiplexers for selectively routing function-input signals of the CLB to the dynamic-selection terminals of the function-selecting multiplexers; and (a.4) output-selecting multiplexers coupled to the function-defining multiplexers for programmably selecting for output as said function-output signals, outputs of the function-defining multiplexers.