Patent ID: 6191719
Filing Date: 2001-02-20
Classification: H03M

Abstract:
In combination for converting binary indications; of a value to an analog representation of the value,means for providing binary indications of the value,means for providing a clock signal,a plurality of decoding and latching circuits each responsive to an individual one of the binary indications for latching such individual one of the binary indications without: any ringing at times between the transitions of such binary indications,a plurality of current sources each responsive to the latched binary indications from an individual one of the decoding and latching circuits for producing an analog current: representative of the latched binary indications from the individual one of the decoding and latching circuits without any ringing at the transitions between such binary indications, andmeans for combining the currents from the current sources in the plurality to provide the analog representation of the value.