Patent ID: 6303948
Filing Date: 2001-10-16
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor chip;a circuit formed in said semiconductor chip;a first pad group comprising pads of substantially the same size, where the pads are provided on said semiconductor chip, spaced apart from one another, arranged on a central portion of said semiconductor chip and electrically connected to said circuit;a second pad group comprising pads of substantially the same size as the pads in the first pad group and provided on said semiconductor chip, spaced apart from one another, arranged on a central portion of said semiconductor chip and electrically connected to said circuit, the pads of the second pad group being offset from the pads of the first pad group by one-half of a pitch of the pads of the first pad group in a direction where the pads are spaced apart from one another and an aligned line of the second pad group being spaced apart from an aligned line of the first pad group by a distance shorter than the pitch;a first lead group comprising leads, each lead of the first lead group having a lead portion having a center line substantially aligned with a center of a corresponding pad of the second pad group;a second lead group comprising leads, each lead of the second lead group having a lead portion having a center line substantial aligned with a center of a corresponding pad of the first pad group; andbonding wires electrically connecting the lead portions of the leads of the first and second lead groups to the pads of the first and second pad groups.