Patent ID: 7684040
Filing Date: 2010-03-23
Classification: G03F

Abstract:
1. An overlay mark, used in checking alignment accuracy between a lower wafer layer defined by a first exposure step and a second exposure step and a lithograph process used in defining one upper wafer layer, the overlay mark comprising: a part of the lower wafer layer including two first X-directional bar-like figures, two first Y-directional bar-like figures, two second X-directional bar-like figures and two second Y-directional bar-like figures; the two first X-directional and the two first Y-directional bar-like figures defined by the first exposure step to form a first rectangular frame; the two second X-directional and the two second Y-directional bar-like figures defined by the second exposure step to form a second rectangular frame, wherein an X-directional dimension D a photoresist pattern, configured above a part of the lower wafer layer, surrounded by the bar-like figures, and formed by the lithograph process; and the lower wafer layer is completely aligned with the lithograph process when a first crossover point, a second crossover point and a center point of the photoresist pattern overlap with each other, wherein the first crossover point is an intersection between a median line of the two first X-directional bar-like figures and a median line of the two second X-directional bar-like figures, the second crossover point is an intersection between a median line of the two first Y-directional bar-like figures and a median line of the two second Y-directional bar-like figures.