Patent ID: 7629219
Filing Date: 2009-12-08
Classification: H01L

Abstract:
1. A method for forming a dual polysilicon gate of a semiconductor device, the method comprising: forming a channel region with a recessed structure in a first region of a substrate having the first region and a second region; forming a gate insulating layer over the substrate; forming a first polysilicon layer over the gate insulating layer; forming an insulating layer doped with a first impurity over the first polysilicon layer of the first region, wherein the insulating layer fills the channel region; performing a first thermal treatment to diffuse the first impurity of the insulating layer into the first polysilicon layer of the first region; removing a predetermined portion of the insulating layer such that a remaining portion of the insulating layer is disposed inside the channel region; forming a second polysilicon layer over the remaining portion of the insulating layer and the first polysilicon layer; implanting a second impurity into the second polysilicon layer of the second region; and performing a second thermal treatment to simultaneously form a polysilicon layer doped with the first impurity in the first region and a polysilicon layer doped with the second impurity in the second region, wherein the first impurity in the remaining portion of the insulating layer and the first polysilicon layer is diffused into the second polysilicon layer in the first region while performing the second thermal treatment.