Patent ID: 9086990
Filing Date: 2015-07-21
Classification: G06F,G11C

Abstract:
1. A computer program product for bitline deletion, the computer program product comprising: a tangible, non-transitory storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: detecting a first error when reading a first cache line in an array within a cache; recording a first bitline address and a first wordline address of the first error in the first cache line; detecting a second error when reading a second cache line in the array within the cache; recording a second bitline address and a second wordline address of the second error in the second cache line; comparing the first bitline address to the second bitline address; comparing the first wordline address to the second wordline address; activating, by a cache controller, a bitline delete mode based on the first bitline address matching the second bitline address and the first wordline address not matching the second wordline address; detecting a third error when reading a third cache line in the array within the cache; recording a third bitline address of the third error in the third cache line; comparing the second bitline address to the third bitline address of the third cache line; and removing, by the cache controller, a location corresponding to the third cache line from available cache locations based on the bitline delete mode being activated and the third bitline address matching the second bitline address.