Patent ID: 8688910
Filing Date: 2014-04-01
Classification: G06F

Abstract:
1. A data processing system comprising: a cache; snoop circuitry having a snoop request queue which stores non-debug snoop requests and debug snoop requests, wherein the snoop circuitry receives the non-debug snoop requests in response to transactions snooped from a system interconnect and receives the debug snoop requests in response to debug snoop commands from a debugger, and wherein the snoop circuitry provides the non-debug snoop requests and the debug snoop requests from the snoop request queue to the cache, wherein the snoop request queue includes a plurality of entries, each entry for storing a request, wherein each request can either be a non-debug snoop request or a debug snoop request, and wherein the snoop circuitry includes, for each request stored the snoop request queue, a debug indicator which indicates whether the request is a non-debug snoop request or a debug snoop request; and debug control circuitry which provides the debug snoop requests in response to the debug snoop commands to the snoop circuitry for storage into the snoop request queue.