Patent ID: 8230136
Filing Date: 2012-07-24
Classification: G06F

Abstract:
1. A method, in a data processing system, for programming a direct memory access engine operating as a multithreaded processor, the method comprising: receiving, from a host processor, a plurality of programs in either a local storage or a memory associated with the direct memory access engine; receiving a request, from the host processor, in the direct memory access engine, to execute the plurality of programs located in either the local storage or the memory using a set of parameters; executing, by the direct memory access engine and without intervention by a host processor, two or more of the plurality of programs; and as each of the two or more of the plurality of programs completes execution, sending, by the direct memory access engine, a completion notification to the host processor that indicates that the program has completed execution, wherein the direct memory access engine is programmed to support predefined subroutines to implement at least one of a scatter access, a gather access, or a strided access, wherein the direct memory access engine is programmed to execute at least one of a sync instruction that provides an ordering function that ensures that all instructions initiated prior to the sync instruction complete and that no subsequent instructions initiate until after the sync instruction completes, or an eieio instruction that provides an ordering function that ensures that all load and store instructions initiated prior to the eieio instruction complete before any loads or stores subsequent to the eieio instruction access memory.