Patent ID: 7910957
Filing Date: 2011-03-22
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first and a second active regions of a first conductivity type disposed on a semiconductor substrate; a third and a fourth active regions of a second conductivity type disposed on the semiconductor substrate, the second and the fourth active regions having sizes larger than those of the first and the third active regions respectively; a first electroconductive pattern disposed over the first active region and having a first width; a second electroconductive pattern disposed over the second active region and having a second width larger than the first width; a third electroconductive pattern disposed over the third active region and having a third width; and a fourth electroconductive pattern disposed over the fourth active region and having a fourth width smaller than the third width, wherein the first electroconductive pattern is electrically connected to the third electroconductive pattern, the second electroconductive pattern is electrically connected to the fourth electroconductive pattern, and the second width is the same as the fourth width.