Patent ID: 7547589
Filing Date: 2009-06-16
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device including transistors, each having a gate electrode, a source/drain region, and a channel region on a substrate, the method comprising: first, patterning a semiconductor film on the substrate to form element regions, each to be provided with the source/drain region and the channel region, the first patterning step including: second, forming a gate insulating film covering segments of the patterned semiconductor film in the respective element regions; third, forming the gate electrodes on the gate insulating film at predetermined positions; and fourth, forming the source/drain region and the channel region in each of the element regions, the gate electrodes being formed by a process including an exposure step through the holographic exposure mask in the third step and the source/drain regions and the channel regions being formed by a process including an exposure step through a projection exposure mask using a stepper or a scanner in the fourth step.