Patent ID: 6153514
Filing Date: 2000-11-28
Classification: H01L

Abstract:
A method of forming an electrical interconnect between dielectric layers in a self-aligned manner, comprising the sequential steps of:forming a first dielectric layer over a conductive layer, the first dielectric layer comprising a first low k dielectric material;forming a nitride etch stop layer on the first dielectric layer;patterning the nitride etch stop layer to define a first dielectric layer opening pattern therein;forming a second dielectric layer on the nitride etch stop layer, the second dielectric layer comprising a second low k dielectric material having different etch sensitivity than the first low k dielectric material to at least one etchant chemistry;etching a first opening extending through the second dielectric layer;etching a second opening extending through the first dielectric layer, using the opening pattern formed in the nitride etch stop layer and the first opening extending through the second dielectric layer, the first opening at least partially overlapping the second opening; andfilling the first and second openings with an electrically conductive material.