Patent ID: 8310002
Filing Date: 2012-11-13
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate including a base and at least a pillar; a first diffusion region in the base; a gate insulating film that covers a side surface of the pillar; a gate electrode separated from the pillar by the gate insulating film; a second diffusion region in an upper portion of the pillar; a contact plug connected to the second diffusion region, the contact plug being in contact with a top surface of the pillar, wherein an entire area of the top surface of the pillar is covered by a bottom surface of the contact plug; and a first inter-layer insulator surrounding the pillar, the gate insulating film, the gate electrode, and a lower portion of the contact plug, wherein the first inter-layer insulator has a top that is higher in level than the top surface of the pillar, and wherein the gate insulating film extends over the first diffusion region and covers a side surface of the second diffusion region in the pillar.