Patent ID: 7144773
Filing Date: 2006-12-05
Classification: H01L

Abstract:
1. A method for forming a split-gate flash device, comprising: providing a semiconductor substrate with a dielectric layer formed thereover; forming a conductor layer overlying the dielectric layer; depositing a masking layer overlying the conductor layer; forming a light sensitive layer overlying the masking layer; patterning and etching the light sensitive layer to form a pattern of openings therein; etching the masking layer and the conductor layer according to the pattern of openings in the light sensitive layer; etching the conductor layer at the outer surface area between the conductor layer and the dielectric layer to form undercuts; etching the dielectric layer to form a notch profile at the outer surface area between the conductor layer and the dielectric layer and portions of the substrate to form a plurality of trenches; filling an isolation layer over the plurality of trenches and the masking layer; and etching away the masking layer and portions of the isolation layer and the conductor layer, wherein a portion of the isolation layer is preserved in the notch profile.