Patent ID: 9053925
Filing Date: 2015-06-09
Classification: H01J,H01L

Abstract:
1. A bevel etcher wherein a bevel edge of a semiconductor substrate is subjected to plasma cleaning, comprising: a lower support having a cylindrical top portion; a lower plasma-exclusion-zone (PEZ) ring supported on the top portion of the lower support, the lower PEZ ring having an upper surface, a step on a lower inner edge which mates with an outer edge of the lower support, and a step on an upper outer edge which is configured to underlie the semiconductor substrate; an upper dielectric component disposed above the lower support and having a cylindrical bottom portion opposing the top portion of the lower support; an upper PEZ ring surrounding the bottom portion of the dielectric component and opposing the lower PEZ ring, an annular space between the lower and upper PEZ rings limiting the extent of the bevel edge to be cleaned by the plasma; at least one radio frequency (RF) power source adapted to energize process gas into the plasma during a cleaning operation; wherein the lower and upper PEZ rings are adapted to respectively shield the lower support and the upper dielectric component from the plasma during the cleaning operation.