Patent ID: 8583111
Filing Date: 2013-11-12
Classification: H01P,H03K,H04B

Abstract:
1. A circuit, comprising: (a) a first port configured to receive a first RF signal; (b) a second port configured to receive a second RF signal; (c) an RF common port; (d) a first switch transistor grouping having a first node coupled to the first port and a second node coupled to the RF common port, wherein the first switch transistor grouping has a control node configured to receive a switch control signal (SW); (e) a second switch transistor grouping having a first node coupled to the second port and a second node coupled to the RF common port, wherein the second switch transistor grouping has a control node configured to receive an inverse (SW_) of the switch control signal (SW); (f) a first shunt transistor grouping having a first node coupled to the second port and a second node coupled to ground, wherein the first shunt transistor grouping has a control node configured to receive the switch control signal (SW); and (g) a second shunt transistor grouping having a first node coupled to the first port and a second node coupled to ground, wherein the second shunt transistor grouping has a control node configured to receive the inverse (SW_) of the switch control signal (SW).