Patent ID: 8709874
Filing Date: 2014-04-29
Classification: H01L,Y10T

Abstract:
1. A method of manufacturing a semiconductor device carrier comprising: providing a conductive carrier having a first surface and a second surface opposite the first surface; forming a conductive trace layer on the second surface of the conductive carrier; forming a conductive stud layer on the conductive trace layer; forming a dielectric layer to encapsulate the conductive trace layer and the conductive stud layer, wherein the conductive stud layer is exposed from the dielectric layer; forming a plating conductive layer to envelop the conductive carrier, the dielectric layer and the exposed conductive stud layer; forming at least one cavity on the conductive carrier by removing a portion of the conductive carrier, wherein the cavity exposes the conductive trace layer, the remaining portion of the conductive carrier forms a plating ring around the peripheral of the dielectric layer, and the plating ring is electrically connected to the conductive trace layer via the plating conductive layer and the conductive stud layer; forming a first surface finishing on at least a portion of the exposed conductive trace layer in the cavity; and removing the plating conductive layer.