Patent ID: 6770543
Filing Date: 2004-08-03
Classification: H01L

Abstract:
A semiconductor device manufacturing method comprising:forming an electrode pad on a semiconductor wafer; forming a conductive pattern to be connected to the electrode pad; forming a conductive post to be connected to the conductive pattern, the conductive post being located on an area of the semiconductor wafer where the electrode pad is not; forming on a prescribed region of the semiconductor wafer a groove having a width that is varied periodically between a first width and a second width, the second width being greater than the first width; sealing with a resin the semiconductor wafer, the conductive pattern and the conductive post, wherein a top of the conductive post is exposed; forming on the top of the conductive post a protruded electrode; and dividing the semiconductor wafer into a plurality of semiconductor devices by cutting the prescribed region using a blade having a third width that is smaller than the first width.