Patent ID: 9158867
Filing Date: 2015-10-13
Classification: G03F,G05B,G06F

Abstract:
1. A method for determining abnormal equipment in a semiconductor processing system, the method comprising: processing a plurality of wafers, wherein each of the plurality of wafers undergoes a plurality of process steps, and wherein each process step is associated with a plurality of process tools, wherein each wafer is processed by one of the plurality of tools associated with each of the plurality of process steps; providing production history associated with each of the plurality of tools at each of the plurality of process steps for each of the plurality of processed wafers; performing an analysis of variance on the production history; providing a plurality of measurements associated with the plurality of wafers at each process step; performing a regression analysis on the plurality of measurements; identifying key measurement parameters based on the regression analysis on the plurality of measurements; identifying key process steps based on the analysis of variance on the production history; performing an analysis of covariance on the key measurement parameters and key process steps; ranking the key process steps based on an f-ratio associated with the analysis of covariance on the key process steps, therein ranking an abnormality of the key process steps; and ranking the plurality of tools associated with each of the key process steps based on an orthogonal t-ratio associated with an analysis of covariance, therein ranking an abnormality each tool associated with the key process steps.