Patent ID: 7199463
Filing Date: 2007-04-03
Classification: H01L

Abstract:
1. A semiconductor device package, comprising: a semiconductor die having first and second lateral edges and a first surface extending between the first and second lateral edges and on which an integrated circuit and at least one electrically conductive bond pad are fabricated; at least one electrically conductive external terminal; an interposer having a die attach surface and an external surface opposite of the die attach surface disposed in between the semiconductor die and the at least one external terminal, the interposer having at least one electrically conductive interconnect electrically coupling the at least one bond pad of the semiconductor die positioned adjacent to the die attach surface to the at least external terminal positioned adjacent to the external surface; and a plurality of pieces of adhesive film disposed in between the semiconductor die and the interposer to adhere the semiconductor die to the die attach surface of the interposer, the plurality of pieces of adhesive film having a substantially constant cross sectional width and height and including a compliant carrier layer comprised of a pair of opposing surfaces with a first adhesive layer disposed on a first surface of the opposing surfaces of the carrier layer to adhere the carrier layer to the die attach surface of the interposer, and a second adhesive layer disposed on a second surface of the opposing surfaces of the carrier layer to adhere the carrier layer to the die.