Patent ID: 7853420
Filing Date: 2010-12-14
Classification: G01R

Abstract:
1. An apparatus for performing temporal checking, said apparatus comprising: a first edge detection module for maintaining a first edge transition information after a detection of a signal of interest within a device under testing (DUT) had transitioned from a low state to a high state; a first counting module associated with said first edge detection module for maintaining a first clock cycle count information to be associated with said first edge transition information; a second edge detection module for maintaining a second edge transition information after a detection of said signal of interest within said DUT had transitioned from said high state back to said low state; a second counting module associated with said second edge detection module for maintaining a second clock cycle count information to be associated with said second edge transition information; and means for reconstructing said first and second edge transition information and said associated first and second clock cycle count information, respectively, in order to provide temporal checking information for said signal of interest within said DUT.