Patent ID: 8471754
Filing Date: 2013-06-25
Classification: G01R,G04F,H03K

Abstract:
1. A time measurement circuit configured to measure the time difference between edges of a first signal and a second signal, the time measurement circuit comprising: a sampling circuit configured to acquire a logical level of the first signal at a timing of an edge of the second signal, wherein the sampling circuit enters a metastable state when time difference between edges of the first signal and the second signal is shorter than a predetermined period, the predetermined period corresponding to at least one of a setup time and a hold time of the sampling circuit, and wherein a transition time of an output signal of the sampling circuit in the metastable state corresponds to the time difference in a one-to-one manner, and a time scale of the transition time is longer than a time scale of the time difference; and a transition time measurement circuit configured to measure the transition time of the output signal of the sampling circuit in the metastable state so as to determine the time difference.