Patent ID: 6406972
Filing Date: 2002-06-18
Classification: H01L

Abstract:
A method for use in the manufacturing of an integrated circuit for achieving an isolation of the semiconductor components, said method comprising the steps:depositing a hard mask over a semiconductor structure, said structure including an upper silicon surface, achieving a trench opening by uncovering, by means of etching, a reference area of the upper silicon surface, achieving a trench by etching the semiconductor structure thus obtained with the reference area to a specific depth, removing the hard mask and the first silicon layer by means of etching, uniformly depositing a first oxide layer over the semiconductor structure, including in the trench, uniformly depositing a barrier layer over the first oxide layer, filling the trench by depositing a silicon layer over the barrier layer, especially in the trench and etching back the silicon layer, and thermally growing a cap oxide over the trench opening.