Patent ID: 8994402
Filing Date: 2015-03-31
Classification: H03K

Abstract:
1. A circuit comprising: a generation circuit in a first voltage domain and coupled to receive a logic signal via a single-ended input and configured to generate true and complementary values of the logic signal on true and complementary input nodes, respectively; a storage circuit coupled to receive the true and complementary values of the logic signal from the generation circuit, wherein the storage circuit is configured to store the true and complementary values of the logic signal, wherein the storage circuit is in a second voltage domain having a second operating voltage, wherein the storage circuit includes a first internal state node and a second internal state node; an output circuit coupled to the storage circuit and configured to provide a differential output signal having true and complementary values corresponding to the true and complementary values of the logic signal; a first pull-up transistor coupled between the first internal state node and a voltage supply node of the second voltage domain, wherein the first pull-up transistor includes a gate terminal coupled to the true input node; and a second pull-up transistor coupled between the second internal state node and the voltage supply node of the second voltage domain, wherein the second pull-up transistor includes a gate terminal coupled to the complementary input node.