Patent ID: 8852851
Filing Date: 2014-10-07
Classification: H01L

Abstract:
1. A method used during fabrication of a semiconductor device, the method comprising: providing a layer to be etched, the layer to be etched having a substantially planar elevationally outermost surface; forming a plurality of sacrificial first spacers on the outermost surface; forming a second spacer layer over the plurality of sacrificial first spacers; removing a portion of the second spacer layer to form a plurality of triads of spacers on the outermost surface, the triads comprising the first spacer bracketed by second spacers on the surface with each of the spacers within the triad having a different elevational thickness and the second spacers contacting the first spacer; forming a conformal layer over the triad; removing a portion of the conformal layer to form groups of five adjacent spacers, the individual groups comprising the triad bracketed by third spacers; removing the second spacers; and etching the layer to be etched using the first and third spacers as a pattern to form a plurality of substantially similar features within the layer to be etched.