Patent ID: 9122629
Filing Date: 2015-09-01
Classification: G06F

Abstract:
1. An elastic cache system for non-transitory storage of electronic computer data, comprising: an array of physical memory devices divided into a stripe configuration containing a plurality of stripes in which each stripe comprises one window of like size from each physical memory device; a metadata storage device configured to store metadata describing data stored in the physical memory devices; a cache controller configured to load the physical memory devices with a combination of no-parity data blocks and single-parity data blocks; wherein the metadata storage device is updated each time the single-parity data blocks are allocated to allow loading of the no parity data blocks and the single-parity data blocks into a same cache array as a data storage requirement develops; wherein the cache controller is further configured to allocate an individual window for each block of read data in which the read data is stored in a no-parity format; wherein the cache controller is further configured to allocate a row comprising a window from each physical memory device for each block of write data in which the write data is stored in a single-parity format; wherein the rows for storing write data are not bound to the stripes of the physical memory device; wherein the single-parity rows are decoupled from the stripe configuration of the physical memory devices; and wherein the cache controller is further configured to update the metadata in association with allocating a single parity row for write data to correlate the windows comprising the row to the stripe configuration.