Patent ID: 7411434
Filing Date: 2008-08-12
Classification: H03K

Abstract:
1. A clock system comprising: a. a ring oscillator circuit that generates a plurality of uniquely phased oscillator transition signals from which a clock signal is generated; b. a comparator circuit coupled to the ring oscillator circuit that compares a speed of the ring oscillator circuit with a reference signal to generate a tracking value that is a measure of the instantaneous process, voltage and temperature conditions of the integrated circuit; and c. a computation circuit coupled to the comparator circuit that generates a delay control signal based on the tracking value and a desired delay amount; and d. a digitally programmable delay circuit comprising a plurality of transistors connected in parallel with each other and to an output of the ring oscillator circuit carrying the clock signal having an edge to be delayed, wherein one or more of the transistors are selected by the delay control signal to impose a delay amount to the edge, wherein the delay control signal is based on the desired delay amount and said tracking value.