Patent ID: 8384641
Filing Date: 2013-02-26
Classification: G09G

Abstract:
1. An amplifier circuit for amplifying an analog input signal and driving a signal line based on the amplified signal, the circuit comprising: an amplifying portion including a plurality of cascaded amplifiers and negatively feeding back an output signal from a last-stage amplifier to an input to a first-stage amplifier; a separation switch for selecting whether or not to supply an output signal from the amplifying portion to the signal line; and an initial setting switch for selecting whether or not to supply a first source voltage to the signal line, wherein the amplifying portion includes, an odd number of cascaded logical negation circuits, each serving as an amplifier; threshold setting switches provided in association with their respective logical negation circuits, excluding the last-stage logical negation circuit, for selecting whether or not to short-circuit input and output terminals of each logical negation circuit; a feedback control switch for selecting whether or not to feed back an output signal from the last-stage logical negation circuit to an input to the first-stage logical negation circuit; a first-stage capacitive element provided between an input terminal for the analog input signal and the input terminal of the first-stage logical negation circuit; an interstage capacitive element provided between the input terminal of the logical negation circuits other than the first-stage and last-stage logical negation circuits, and the output terminal of its previous-stage logical negation circuit; an input capacitive element having an electrode connected to the input terminal of the first-stage logical negation circuit and another electrode supplied with a constant voltage, wherein, the last-stage logical negation circuit includes a first transistor of a first conduction type having a source terminal supplied with the first source voltage and a gate terminal supplied with an output signal from a previous-stage amplifier, and a second transistor of a second conduction type having a source terminal supplied with a second source voltage and a gate terminal supplied with the same output signal from the previous-stage amplifier, the first transistor has a lower current drive capability than the second transistor, and the input capacitive element has a capacitance value not allowing the threshold setting switch associated with the first-stage logical negation circuit to be rendered conductive when the feedback control switch is rendered conductive, provided that the analog input signal is at a level within a predetermined range.