Patent ID: 6292396
Filing Date: 2001-09-18
Classification: G11C

Abstract:
A regulation circuit for regulating the generation of a signal to perform a programming operation, including an erase type operation and a write type operation, for an electrically programmable non-volatile memory having a plurality of memory cells wherein at least one memory cell has at least one transistor with a floating gate attached thereto, the regulation circuit comprising:a reference input for receiving an input reference signal;a first reference signal for an erase type operation;a second reference signal for a write type operation; anda control input to receive a control signal, for selecting a reference signal among the first and the second reference signal to be applied to the reference input according to the programming operation to be performed;wherein a magnitude of the first reference signal and a magnitude of second reference signal are set so that an electric field of approximate equal absolute magnitude is created on a floating gate of a transistor attached to the at least one memory cell during the erase type operation and the writing type operation.