Patent ID: 7058851
Filing Date: 2006-06-06
Classification: G11C

Abstract:
1. A method of repairing an integrated memory having first units of memory cells and second, redundant units of memory cells for replacing respective first units of memory cells, the method which comprises: functionally testing the first units of memory cells; if a defect is ascertained in one of the first units, programming a number of redundant units as associated cluster for replacing one or more of the first units, and thereby forming a repair element with a cluster size corresponding to the number of redundant units; setting the cluster size of respective repair elements in a variable manner; carrying out the step of programming a respective repair element by addressing the repair element with an address and applying a repair address in the form of an address of an element to be replaced; and when the cluster size is enlarged, setting parts of the address of the repair element and parts of the repair address in a predetermined manner.