Patent ID: 7825489
Filing Date: 2010-11-02
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; first and second active device regions formed on a principal surface of the semiconductor substrate; an isolating region formed around the first and second active device regions; a plurality of first active dummy patterns which are surrounded by the isolating region and are arranged in a first direction and a second direction different from the first direction, the plurality of first active dummy patterns having a first pitch; a plurality of second active dummy patterns which are surrounded by the isolating region and are arranged in a third direction and a fourth direction different from the third direction, the plurality of second active dummy patterns having a second pitch; and a plurality of third active dummy patterns which are surrounded by the isolating region and are arranged in the first direction, the plurality of third active dummy patterns having the first pitch, wherein the first pitch is smaller than the second pitch, any one of plane areas of the first active dummy patterns is smaller than any one of plane areas of the second active dummy patterns, any one of plane areas of the third active dummy patterns is smaller than any one of the plane areas of the second active dummy patterns, and the plurality of third active dummy patterns are arranged between the first and second active device regions.