Patent ID: 8089141
Filing Date: 2012-01-03
Classification: H01L

Abstract:
1. A semiconductor package comprising: a die pad defining opposed top and bottom pad surfaces, and including at least two anchor pad which protrude from the bottom pad surface and each have a generally quadrangular configuration defining a distal surface, the bottom pad surface being of a first area, and the distal surfaces of the anchor pads having a combined second area which is less than the first area; a plurality of leads which extend at least partially about the die pad in spaced relation thereto; at least one semiconductor die attached to the top pad surface of the die pad and electrically connected to at least one the leads; and a package body defining a generally planar bottom surface, the package body at least partially encapsulating the die pad, the leads and the semiconductor die such that at least the distal surfaces of the anchor pads are exposed in the bottom surface of the package body.