Patent ID: 6972623
Filing Date: 2005-12-06
Classification: H03F

Abstract:
1. A differential amplifier circuit comprising: a low gain fully differential amplifier; and a high gain fully differential amplifier connected in parallel with the low gain fully differential amplifier with a positive input of the low gain fully differential amplifier being connected to a positive input of the high gain fully differential amplifier and connected to a positive input of the circuit, with a negative input of the low gain fully differential amplifier being connected to a negative input of the high gain fully differential amplifier and connected to a negative input of the circuit, negative and positive outputs of the low gain fully differential amplifier being connected to positive and negative load terminals, respectively, of the high gain fully differential amplifier, wherein negative and positive outputs of the high gain fully differential amplifier become negative and positive outputs, respectively, of the circuit, and wherein when the low gain fully differential amplifier biases the high gain fully differential amplifier, the positive and negative outputs of the circuit are stable during a common mode operation without being impacted by a fluctuation of the inputs.