Patent ID: 6359486
Filing Date: 2002-03-19
Classification: H03K,H03L,H04L

Abstract:
A phase interpolator that receives input clock phases and selection inputs that are distinct form the input clock phases, and generates an output clock phase based on the selection inputs, said phase interpolator comprising: selector devices which receive the input clock phases and receive the selection inputs that are distinct from the input clock phases; and cross-coupled switches which are connected to the selector devices and receive input clock phases therefrom, wherein the selector devices are configured to select which input clock phases to provide to the cross-coupled switches based upon the selection inputs, wherein the cross-coupled switches are configured to generate the output clock phase based upon the input clock phases which are received from the selector devices, wherein said phase interpolator includes eight selector devices and eight cross-coupled switches connected to the eight selector devices, wherein each selector device receives a pair of selection inputs and four input clock phases, and wherein each selector device is configured to select a single input clock phase based on the selection inputs which are received.