Patent ID: 8878238
Filing Date: 2014-11-04
Classification: H01L

Abstract:
1. A gate-controlled thyristor, comprising: an n-type emitter region, overlying a p-type base region, which itself overlies an n-type base region, which in turn overlies a heavily doped p-type emitter region, wherein the n-type emitter region, the p-type base region, and the n-type base region form an NPN transistor, wherein the p-type emitter region, the n-type base region, and the p-type base region form a PNP transistor; one or more insulated gate electrodes lying in gate trenches which extend down into, but not through, said p-type base region; wherein the NPN transistor current gain defined by the combination of said n-type emitter region with said p-type base region and said n-type base region, multiplied by the PNP transistor current gain defined by the combination of said p-type emitter region with said n-type base region and said p-type base region, is less than one; wherein, at times when said one or more insulated gate electrodes have been driven sufficiently positive to invert portions of said p-type base region, the NPN transistor current gain defined by the combination of an induced population of electrons at the bottom of said trench with said p-type base region and said n-type base region, multiplied by the PNP transistor current gain defined by the combination of said p-type emitter region with said n-type base region and said p-type base region, is greater than one; whereby, when said gate electrode is sufficiently positive to invert said p-base region, current will flow from an anode terminal to a cathode terminal under forward bias; and when said one or more insulated gate electrodes are not sufficiently positive to invert said p-base region, current from said anode terminal to said cathode terminal will be interrupted, and wherein a p-type dopant concentration in the p-type base region and a depth and location of the one or more insulated gate electrodes into the p-type base region are such that no vertical or lateral n-type inversion channel between the n-type emitter region and the n-type base region is created in the p-type base region when the one or more insulated gate electrodes have been driven sufficiently positive to cause the current to flow from the anode terminal to the cathode terminal.