Patent ID: 7442632
Filing Date: 2008-10-28
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, which comprises: preparing a semiconductor substrate; forming an insulating layer on said semiconductor device, said insulating layer having a thickness of at most 1.6 nm; forming a polycrystalline silicon layer on said insulating layer; implanting n-type impurities into said polycrystalline silicon layer; implanting inert gas molecules or atoms into said polycrystalline silicon layer; forming a gate electrode structure including a gate insulating layer derived from said insulating layer, and a gate electrode layer derived from said polycrystalline silicon layer; and subjecting said gate electrode structure to an annealing process so that the polycrystalline silicon in said gate electrode layer has an average grain size falling within a range between 10 nm and 150 nm.