Patent ID: 8201118
Filing Date: 2012-06-12
Classification: G06F

Abstract:
1. A method, performed by execution of instructions loaded into a computer system, of dynamically generating a hint set for enhanced reachability analysis in a sequential circuitry design represented by a binary decision diagram, the method comprising: determining a ranking of a first plurality of variables for a binary decision diagram; sorting the first plurality of variables in order of the ranking, wherein the sorting is performed by execution of said instructions loaded into the computer system; selecting a second plurality of variables from among the first plurality of variables; creating a first hint based on the selected variables to be included in said hint set; performing a hint based reachability analysis using said hint set, wherein a second hint to be included in said hint set is created after beginning the hint based reachability analysis, with interim results of said hint based reachability analysis being used to create the second hint; and creating a third hint as part of the hint set and determining that said third hint equals a constant value of “1”, wherein said third hint is a last hint created in said hint set in response to determining that said third hint equals a constant value of “1”.