Patent ID: 6414394
Filing Date: 2002-07-02
Classification: H01L

Abstract:
A semiconductor device comprising:a wiring; a first interlayer insulation film formed in contact with at least one surface of the wiring; a second interlayer insulation film formed on the first interlayer insulation film in contact with the first interlayer insulation film and having a higher Young's modulus than that of the first interlayer insulation film, wherein when the wiring, the first interlayer insulation film and the second interlayer insulation film have coefficients of linear thermal expansion &agr;M, &agr;s and &agr;h respectively, Young's moduli EM, Es and Eh respectively, and film thickness dM , ds and dh respectively, and when coefficients determined by materials that structure the wiring are expressed as k1, k2, when it is defined that dI=ds+dh, EI=(dsEs+dhEh)/dI, and &agr;I=(ds&agr;s+dh&agr;h)dI, and also when a gradient of the stress working on the wiring depending on temperature is expressed as s, the wiring, the first interlayer insulation film and the second interlayer insulation film respectively satisfy a condition given by the following expression: s=k1&it;EM&it;EIEM+EI&CenterDot;(Î±M-k2&it;Î±I&it;dIdM)<5Ã—10-4.