Patent ID: 7547583
Filing Date: 2009-06-16
Classification: H01L

Abstract:
1. A method for packaging an integrated circuit comprising: providing a leadframe having a first section and a second section, said first section comprising a lateral portion, a chip mounting area and a first extension; molding a layer of material to provide a package having, a top surface, a bottom surface, a first side surface, a second side surface, and an interior region positioned between said top surface and said bottom surface; and bending said first extension downward so that it at least partially passes through said interior region toward said bottom surface in order to provide a first heat path from said chip mounting area to said bottom surface, said first heat path connecting said chip mounting area to said bottom surface without passing through said first side surface and said second side surface, wherein said lateral portion extends from said chip mounting area through said first side surface and a portion of said second section extends through said second side surface, and wherein said first heat path has less thermal resistance than a heat path through either said lateral portion or said second section.