Patent ID: 8624333
Filing Date: 2014-01-07
Classification: H01L

Abstract:
1. A semiconductor device comprising: an active region; first and second isolation regions sandwiching the active region therebetween; a trench extending in a first direction to include a first trench portion crossing the first isolation region, a second trench portion crossing the active region and a third trench portion crossing the second isolation region; a first upper surface and a first side surface of the first isolation region that cooperate with each other to define the first trench portion; a second upper surface and a second side surface of the second isolation region that cooperate with each other to define the third trench portion; a first fin portion that projects toward the trench as compared to each of the first upper surface of the first isolation region and the second upper surface of the second isolation region, the second trench portion being smaller in depth than each of the first and third trench portions and being smaller in width in a second direction crossing the first direction than each of the first and third trench portions; a second fin portion that projects toward the trench as compared to each of the first side surface of the first isolation region and the second side surface of the second isolation region so that the active region provides the second fin portion; and a gate electrode formed in the trench to fill the first, second and third trench portions.