Patent ID: 7118956
Filing Date: 2006-10-10
Classification: H01L

Abstract:
1. A method for manufacturing a trench capacitor comprising: forming a trench in a semiconductor substrate; forming a first dielectric film on an inner surface of the trench; filling a first doped amorphous silicon layer, doped with a first impurity, in the trench and having a first conductivity type; removing the first doped amorphous silicon layer and the first dielectric film to a first depth to expose an inner wall of an upper portion of the trench; forming a second dielectric film on the exposed inner wall of the trench; selectively removing the second dielectric film from the bottom of the trench to expose a surface of the first doped amorphous silicon layer; filling at least a second doped amorphous silicon layer, doped with a second impurity, in the trench, the second impurity, in the trench, the second impurity being different from the first impurity and having the first conductivity type; etching back the second doped amorphous silicon layer to a second depth to remove an exposed second dielectric film; and forming a buried strap layer on the second doped amorphous silicon layer, the buried strap layer being formed of the first doped amorphous silicon layer.