Patent ID: 9070200
Filing Date: 2015-06-30
Classification: G06T,G09G

Abstract:
1. A tile-based graphics processing system comprising: a graphics processing pipeline comprising: wherein the graphics processing system further comprises: a memory allocator configured to determine the tile data storage requirements for each render target to be generated for a render output to be generated by the graphics processing system and operable to allocate portions of the memory allocated for use as the tile buffer to respective ones of the render targets based on the determination; wherein each render target to be stored in the tile buffer has state information associated with it that indicates the tile buffer region that data for the render target in question should be written to; and wherein the state information for each render target also indicates one or more of: the format that the data for the render target is to be stored in whether write out of the render target to external memory is enabled; where the render target data should be written to in external memory; and how the data should be written out to external memory.