Patent ID: 8375187
Filing Date: 2013-02-12
Classification: G06F

Abstract:
1. Apparatus for controlling the scheduling of data transfers between a buffer memory and a plurality of solid state storage devices in a data storage system, the apparatus comprising: a controller for designating at least one of the plurality of solid state storage devices as a current write device such that there is always at least one solid state storage device scheduled as a current write device; the controller designating the remainder of the plurality of solid state storage devices as current read device(s); the controller storing write data from a host in the buffer memory; the controller allowing storage device reads to occur only from the current read device(s); the controller allowing storage device writes to occur only to the current write device(s) and to any available address location of the current write device(s); the controller, responsive to a triggering event, updating the designations to cause a different and at least one of the plurality of solid state storage devices to be designated a new current write device, and the remainder of the plurality of solid state storage devices to be designated the current read device(s), wherein, as prerequisite to accomplishing the update of the designations, the controller allows write operations pending for each current write device to finish to that current write device and reads to occur from any of the solid state storage devices, including from each current write device.