Patent ID: 6197638
Filing Date: 2001-03-06
Classification: H01L,Y10S

Abstract:
A process for forming multiple oxide layers on a semiconductor substrate, wherein the substrate is to have an E.sup.2 PLD CMOS device having high voltage N-channel, high voltage P-channel, low voltage N-channel, and low voltage P-channel transistors, comprising the steps of:(a) depositing a layer of nitride on the surface of the semiconductor substrate;(b) etching a first and second portions of the nitride layer;(c) forming a first and second regions of a first oxide layer on the substrate in the first and second etched portions of the nitride layer;(d) etching the first region of the oxide;(e) forming a second oxide layer on the substrate having a first portion in the first etched portion of the nitride and a second portion overlying the first portion of the second region of the first oxide layer;(f) removing the nitride layer; and(g) forming a third layer of oxide having a first portion on the surface of the substrate, a second and third portions on the first and second portions of the second oxide layer.