Patent ID: 6399436
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method for manufacturing a conductive strip for integrated circuits, said method comprising the steps of:patterning a barrier layer over a substrate; forming a trench into said substrate; conformally forming a doped dielectric layer along a surface of said etched substrate and said barrier layer; conformally forming an ion-implanted-sensitive resist lying over said doped dielectric layer; performing an anisotropical implantation to implant ions into a horizontal portion of said ion-implanted-sensitive resist, thereby generating horizontal insoluble portions and vertical soluble portions; removing said vertical soluble portions to expose said doped dielectric layer attached on side walls of said trench; removing said doped dielectric layer attached on said side walls of said trench; performing a thermal treatment to diffuse dopants in said doped dielectric layer into said substrate under said trench, thereby forming a conductive region and said barrier layer acting as a block to preventing said dopants from diffusing into an upper surface of said substrate.