Patent ID: 7550809
Filing Date: 2009-06-23
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device comprising: a first MISFET including a first gate insulating film formed over a first element forming region of a main surface of a semiconductor substrate and a first gate electrode formed over the first gate insulating film; and a second MISFET including a second gate insulating film formed over a second element forming region of the main surface of the semiconductor substrate and a second gate electrode formed over the second gate insulating film, a film thickness of the second gate insulating film being thinner than a film thickness of the first gate insulating film, wherein the first gate insulating film includes a thermally oxidized film and a deposited film formed over the thermally oxidized film, wherein the second gate insulating film includes a thermally oxidized film and a deposited film formed over the thermally oxidized film of the second gate insulating film, wherein a film thickness of the deposited film of the second gate insulating film is thinner than a film thickness of the deposited film of the first gate insulating film, and wherein the first element forming region, the second element forming region and a third element forming region are individually isolated by an element isolation region.