Patent ID: 7260815
Filing Date: 2007-08-21
Classification: G06F

Abstract:
1. A method of emulating guest instructions using binary translation in a virtual computer system, the virtual computer system having a binary translation mode and a direct execution mode, the virtual computer system switching from the direct execution mode to the binary translation mode in response to an interruption, the computer system permitting only indirect memory addressing when saving registers to memory, the computer system having a first set of registers that has two banks, with a first bank generally being active when the computer system is executing an interrupt handler and a second bank generally being active when the first bank is inactive, and a second set of registers having only a single bank, the method comprising: in response to an interruption that causes a switch from direct execution mode to binary translation mode, while the computer system is still executing the interrupt handler and the first bank of the first set of registers is still active, using one or more of the registers from the first set of registers for address Indirection and saving to memory one or more of the registers from the second set of registers; performing the following steps one or more times to execute one or more blocks of translated code: returning to direct execution mode.