Patent ID: 6716653
Filing Date: 2004-04-06
Classification: G01B,G03F,H01L

Abstract:
A method for measuring misalignment between a first layer and a second layer in an integrated circuit (IC), the method comprising the steps of:forming a first plurality of alignment test structures, each of the first plurality of alignment test structures being configured to have a different baseline spacing in a first direction between a first alignment feature in the first layer and a first reference feature in the second layer when the first layer and the second layer are aligned in the first direction, wherein a first device performance parameter of each of the first plurality of alignment test structures is controlled by the actual spacing between the first alignment feature and the first reference feature; forming a second plurality of alignment test structures, each of the second plurality of alignment test structures being configured to be a mirror image of a corresponding one of the first plurality of alignment test structures about an axis of symmetry in a second direction when the first layer is aligned with the second layer in the first direction, the second direction being substantially perpendicular to the first direction, such that each of the second plurality of alignment test structures is configured to have a second baseline spacing in the first direction between a second alignment feature in the first layer and a second reference feature in the second layer substantially equal to a first baseline spacing of the corresponding one of the first plurality of alignment test structures, wherein a second device performance parameter of each of the second plurality of alignment test structures is controlled by the actual spacing between the second alignment feature and the second reference feature; measuring a first device performance parameter for each of the first plurality of alignment test structures; measuring a second device performance parameter for each of the second plurality of alignment test structures; graphing the first device performance parameter versus the first baseline spacing for each of the first plurality of alignment test structures to create a first characteristic curve; graphing the second device performance parameter versus the second baseline spacing for each of the second plurality of alignment test structures to create a second characteristic curve; Determining the amount of misalignment between the first layer and the second layer by having a horizontal offset between the first characteristic curve and the second characteristic curve.