Patent ID: 7547585
Filing Date: 2009-06-16
Classification: H01L

Abstract:
1. The process of forming a Rad Hard MOSFET comprising the steps of implanting and diffusing a plurality of parallel spaced enhancement strips into the surface of a silicon wafer of one of the conductivity types; and thereafter implanting and diffusing a plurality of channel diffusions of the opposite conductivity type between and partially overlapping the side edges of adjacent ones of said enhancement strips; and thereafter forming source strips of said one conductivity type within each of said channel strips to define invertible channel regions on the opposite sides of each of said channel diffusions; and thereafter forming gate oxide and polysilicon gate strips atop each of said invertible channel regions and each said enhancement strip; and thereafter forming a conductive source contact atop and in contact with each of said source and channel diffusions, wherein said one conductivity type is the P type and said other conductivity type is N type whereby said MOSFET is a P channel device.