Patent ID: 8310688
Filing Date: 2012-11-13
Classification: H04N

Abstract:
1. An image forming apparatus comprising: a set value output circuit that includes: a first output unit that has a first input unit to which a signal indicating a set value for forming an image based on image data is sequentially input and a second input unit to which a first timing signal is input, the first output unit outputting the signal input to the first input unit when the first timing signal is input to the second input unit, and continuing to output the signal until a next first timing signal is input to the second input unit; and a second output unit that has a third input unit to which the signal output from the first output unit is input and a fourth input unit to which a second timing signal is input, the second output unit outputting the signal input to the third input unit when the second timing signal is input to the fourth input unit, and continuing to output the signal until a next second timing signal is input to the fourth input unit; a selection unit that selects one of a plurality of timing signals that are output in accordance with an image formation operation, and inputs the selected timing signal as the second timing signal to the fourth input unit of the second output unit; and a control unit that inputs the first timing signal to the second input unit of the first output unit, so that a set value for an image to be formed next is output during image formation using the signal output from the second output unit.