Patent ID: 6531780
Filing Date: 2003-03-11
Classification: H01L,Y10S

Abstract:
An integrated circuit comprising:a semiconductor substrate having a semiconductor device provided thereon; a first dielectric layer on the semiconductor substrate having a first channel opening provided therein; a first barrier layer lining the first opening; a first conductor core over the first barrier layer filling the first opening and connect to the semiconductor device and forming a first channel; a via dielectric layer over the first dielectric layer having a via opening provided therein; a second dielectric layer over the via dielectric layer having a second channel opening provided therein; a second barrier layer lining the via and second channel openings, the second barrier layer thicker in the via opening than in the second channel opening and having an opening provided therein to the first channel; and a second conductor core to fill the via and second channel openings and form a second channel and via.