Patent ID: 9123731
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A semiconductor memory device comprising: a circuit substrate including an insulating layer, a plurality of interconnections provided on the insulating layer, and a copper layer or a tungsten layer, and sections of one of the copper layer and the tungsten layer being exposed at the side surface of the circuit substrate; a flash memory element mounted on the circuit substrate; a sealing resin layer sealing the flash memory element; a conductive shielding layer covering the sealing resin layer; and an external connection terminal connected to the interconnections; the sections and the conductive shielding layer being electrically connected, one of the interconnections and the external connection terminal connected to one of the interconnections being capable of becoming a ground potential, the interconnection capable of becoming the ground potential being electrically connected to the sections, a distance between the adjacent sections capable of becoming the ground potential being not more than a half of a wavelength of an electromagnetic wave to be shielded.