Patent ID: 6807625
Filing Date: 2004-10-19
Classification: G06F

Abstract:
A method for emulating the production and consumption of arithmetic flags in a single cycle comprising:partially emulating a flag producing macroinstruction that performs an arithmetic operation, wherein the partially emulating step comprises executing a sequence of one or more microinstructions that: generate an arithmetic result as specified by the macroinstruction; generate one or more partial arithmetic flags from the results of the generating an arithmetic result step; and store in an intermediate format the one or more partial arithmetic flags and one or more bits of extra information based on the type and size of the arithmetic operation, the intermediate format being arbitrarily defined to include as much computation towards final results as resources allow; passing the one or more partial arithmetic flags and one or more bits of extra information across the macroinstruction boundary signifying the completion of the flag producing macroinstruction; and emulating a flag consuming macroinstruction, wherein the emulating step comprises executing a sequence of one or more microinstructions that: generate one or more final flags from the one or more partial arithmetic flags and the one or more bits of extra information; and complete the emulation of the flag consuming macroinstruction using the one or more final flags.