Patent ID: 8040144
Filing Date: 2011-10-18
Classification: H03K

Abstract:
1. An interface circuit comprising: a reference voltage generation circuit to generate a reference voltage; a differential voltage signal generation circuit to convert send data into a first pair of differential voltage signals for data transmission and output the first pair of differential voltage signals, based on the reference voltage generated by the reference voltage generation circuit, to a pair of input/output terminals; a receiver to convert a second pair of differential voltage signals for data reception, from the pair of input/output terminals, into received data and output the received data; and a receiver test circuit to perform a sensitivity test of the receiver by controllably connecting with the differential voltage signal generation circuit and the receiver, the receiver test circuit including a resistance circuit to selectively generate a third pair of differential voltage signals having a potential difference for the sensitivity test of the receiver in accordance with a sensitivity specification required of the receiver.