Patent ID: 7004708
Filing Date: 2006-02-28
Classification: H01L,Y10S

Abstract:
1. A wafer track system to reduce the effects of thermal crosstalk arising from handling semiconductor wafers with wide-ranging temperature ranges comprising: a wafer processing section including: a cassette end section (CES) for storing wafer cassettes that is positioned adjacent to each of the wafer process stations, the CES including at least one cassette wafer transporter for transferring semicondudor wafers between the CES and at least one wafer processing stack associated with each wafer process station; and a stepper interface section (SI) for enabling external access to the wafer process stations positioned adjacent to each of the wafer process stations, the SI including at least one stepper wafer transporter for transferring semiconductor wafers between the SI and at least one wafer processing stack associated with each wafer process station, wherein the first and the second main wafer transporters are each configured for transporting semiconductor wafers into a wafer bake module within a wafer processing stack in each respective wafer process station, and wherein one of the cassette and the stepper wafer transporters are configured for transporting semiconductor wafers out of the wafer bake module within the wafer processing stack for each respective wafer process station.