Patent ID: 6778695
Filing Date: 2004-08-17
Classification: G01R

Abstract:
A method of prioritizing defects for inspection and/or repair in a mask/reticle used for the photolithographic fabrication of an integrated circuit, comprising:receiving a netlist that defines structures to be created in a layer of the integrated circuit; using the netlist to produce a layout of the layer in the integrated circuit; analyzing the layout with a verification tool to produce a processed netlist and/or a processed layout that identifies regions of interest within the layer of the integrated circuit; producing a mask/reticle from the layout; inspecting the mask/reticle to determine a list of defects in the mask/reticle; and comparing the defect list to the processed netlist and/or the processed layout to prioritize the defects in the defect list to define an order in which the defects in the mask/reticle should be inspected and/or repaired.