Patent ID: 7870350
Filing Date: 2011-01-11
Classification: G06F

Abstract:
1. A method for reducing read-write interlock latency, comprising: receiving a first write request from a processing unit that specifies a memory location and write data; storing the memory location in a tag storage resource configured to store only pending write requests; storing the write data as pending write data in an buffer entry of a write data buffer; comparing the memory location to any other memory locations for pending write requests that are stored in the tag storage resource; and either outputting an early acknowledgement signal to the processing unit when the memory location does not match another memory location for a pending write request that is stored in the tag storage resource, the early acknowledgement signal indicating that a read request for the memory location can be processed before the pending write data is stored in the memory location or queuing a late early acknowledgement signal to interlock any read request specifying the memory location when the memory location does match another memory location for a pending write request that is stored in the tag storage resource, outputting the late early acknowledgment to the processing unit when the first write request is committed to memory, the late early acknowledgment indicating that a read request for the memory location can be processed, and removing the pending write data from the buffer to release the buffer entry.