Patent ID: 6316320
Filing Date: 2001-11-13
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:forming a plurality of element formation regions electrically isolated from each other by an element isolating and insulating film at a main surface of a semiconductor substrate;forming spaced apart source/drain regions at said element formation regions, one source/drain region on each side of said element isolating and insulating film;performing selective epitaxial growth of silicon or silicon-germanium alloy to form epitaxial growth of silicon or silicon-germanium alloy to form epitaxial layers on the surfaces of said source/drain regions;effecting inter-element insulating processing on the main surface of said semiconductor substrate to oxidize or remove polycrystalline silicon generated in said epitaxial growth step for electrically insulating said epitaxial layers opposed to each other with said element isolating and insulating film therebetween; andforming an interlayer insulating film at the main surface of said semiconductor substrate after said inter-element insulating step.