Patent ID: 6130125
Filing Date: 2000-10-10
Classification: H01L

Abstract:
A method of fabricating a capacitor, comprising steps of:forming a dielectric layer on a substrate;forming a node contact opening in the dielectric layer to expose a portion of the substrate;forming a conductive layer on the dielectric layer to cover the node contact opening;forming a ring trench in the conductive layer above the node contact opening;forming an oxide layer to fill the ring trench;forming an etching stop layer to cover the oxide layer, the conductive layer encircled by the oxide layer, and a portion of the oxide layer beside the oxide layer, wherein the etching stop layer defines a capacitor area;removing the conductive layer exposed by the etching stop layer until the dielectric layer is exposed;removing the oxide layer and the etching stop layer to expose the remaining conductive layer in the capacitor area, wherein the remaining conductive layer serves as a bottom electrode;forming a capacitor dielectric layer to cover the bottom electrode; andforming a top electrode to cover the dielectric layer.