Patent ID: 6127219
Filing Date: 2000-10-03
Classification: H01L

Abstract:
A method of fabricating a semiconductor memory device including a substrate, a transfer transistor having source/drain regions, formed in the substrate, and a charge storage capacitor electrically coupled to one of the source/drain regions, said method comprising the steps of:(1) forming a first insulating layer over the substrate, the first insulating layer covering the transfer transistor;(2) forming an insulating pillar over the first insulating layer, the insulating pillar defining recess areas on either side thereon;(3) forming a first conductive layer over the insulating pillar, and over the first insulating layer in the recess areas;(4) forming alternately at least a first film of insulating material and a second film of conductive material, over the first conductive layer;(5) forming a second insulating layer over the second film, so as to substantially fill up the recess area;(6) removing a selected portion of the second film so as to remove an upper portion of the second film that lies above the insulating pillar;(7) removing, portions of the first conductive layer, leaving a plurality of first conductive layer sections;(8) forming a second conductive layer in a recess area, to penetrate successively through the second insulating layer, the second film, the first film, the first conductive layer, and the first insulating layer, so as to be electrically coupled to one of the source/drain regions, the second conductive layer forming a base conductive layer, and the first conductive layer forming a branching conductive layer substantially L-shaped in cross section, the L-shaped cross section having one end connected to the base conductive layer, wherein the first conductive layer and the second conductive layer in combination form a storage electrode for the charge storage capacitor; and(9) removing the second insulating layer, the first film, and the insulating pillar;(10) forming a dielectric layer over the first and second conductive layers; and(11) forming a third conductive layer over the dielectric layer, the third conductive layer serving as an opposing electrode of the charge storage capacitor.