Patent ID: 6798828
Filing Date: 2004-09-28
Classification: H04B,H04L

Abstract:
For use in a high speed Ethernet local area network (LAN), a transceiver comprising:front-end analog signal processing circuitry comprising: a line driver capable of receiving an outgoing analog signal from a data source and transmitting said outgoing analog signal to an external cable via a transformer coupling said transceiver to said external cable; a DC offset correction circuit capable of receiving an incoming analog signal from said transformer and reducing a DC component in said incoming analog signal; an echo canceller capable of receiving said incoming analog signal and reducing in said incoming analog signal, an echo component of said outgoing analog signal to thereby produce a reduced-echo incoming analog signal; an automatic gain control (AGC) circuit capable of receiving said reduced-echo incoming analog signal and amplifying said reduced-echo incoming analog signal by an adjustable gain factor to thereby produce an amplified incoming analog signal; and an adaptive analog equalization filter capable of receiving said amplified incoming analog signal and amplifying a first high frequency component of said amplified incoming analog signal to thereby produce an analog filtered incoming signal; an analog-to-digital converter (ADC) capable of converting said analog filtered incoming signal to a first incoming digital signal; and digital signal processing circuitry comprising: a digital finite impulse response (FIR) filter capable of receiving said first incoming digital signal and amplifying a second high frequency component of said first incoming digital signal to thereby produce a digital filtered incoming signal.