Patent ID: 9214544
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A semiconductor device comprising: a body region formed in an epitaxial layer; a gate electrode formed in a trench in the body region and epitaxial layer; a source region disposed on the body region next to the gate electrode; a gate oxide disposed between the gate electrode and the source region, the body region and the epitaxial layer; a drain region formed by a substrate disposed below a bottom of the gate electrode and below the body region; an oxide disposed on top of the gate electrode and extending over a top portion of the source region; a doped polysilicon spacer disposed along a sidewall of the source region and a sidewall of the oxide; an exposed body contact region in an upper portion of the body region, adjacent to the doped polysilicon spacer, wherein the exposed body contact region has a top surface which is recessed below the bottom surface of the source region and spaced away from the source region by the doped Polysilicon spacer; and a source metal layer disposed on the device such that the doped polysilicon spacer is in electrical contact with the source region and the source metal layer.