Patent ID: 8119463
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. A method of manufacturing a thin film transistor, the method comprising: forming a semiconductor layer comprising a first doped region, a second doped region and a channel region on a sacrificial layer on a first substrate; separating the semiconductor layer from the first substrate and then coupling the separated semiconductor layer on a second substrate; forming a dielectric layer on the second substrate and the semiconductor layer; forming a first photoresist layer on the dielectric layer; exposing the first photoresist layer to light from a rear surface of the second substrate by using the first doped region and the second doped region as a mask and developing the exposed first photoresist layer to form a first mask pattern; forming a gate electrode overlapping the channel region on the dielectric layer by using the first mask pattern as a mask; and forming a source electrode and a drain electrode connected to the first doped region and the second doped region, respectively, wherein the channel region is etched to have a thickness less than that of any one of the first doped region and the second doped region.