Patent ID: 7296209
Filing Date: 2007-11-13
Classification: G11B,H03M

Abstract:
1. An encoding device for adding an error correction code parity to an input data sequence, comprising: a first code encoding unit for adding a binary error correction code parity to each of a plurality of first data blocks into which the input data sequence is divided; and a second code encoding unit for adding a symbol error correction code for correcting an error by a symbol unit of a predetermined length to each of a plurality of second data blocks into which the input data sequence is divided in a form different from that of the plurality of first data blocks, wherein the number of bit errors to be corrected per total number of bits of the first data block to which the binary error correction code parity is added is larger than the number of bit errors to be corrected per total number of bits of the second data block to which the symbol error correction code parity is added; wherein when a total number of bits of the first data block to which the binary error correction code parity is added is set to n, a minimum distance between codes of the first data block is set to d, a length of the second data block to which the symbol error correction code is added is set to N symbol, a minimum distance between codes of the second data block is D, and a total number of bits of the symbol is m, the first code encoding unit and the second code encoding unit respectively add the binary error correction code parity and the symbol error correction code parity to each of the plurality of first data block and second block to satisfy the following inequality: