Patent ID: 7328143
Filing Date: 2008-02-05
Classification: G06F

Abstract:
1. A method for building a hierarchical representation of a circuit for simulation, comprising: receiving a source file, wherein the source file comprises SPICE-like netlist descriptions of the circuit in a flattened representation; generating a primitive database using the source file, wherein the primitive database comprises a geometries-describing section for storing a plurality of primitive subcircuit blocks; generating an instance database using the geometries-describing section, wherein the instances database comprises instance subcircuit blocks corresponding to explicitly-expressed primitive subcircuit blocks with predefined geometric values; generating a simulation database using the instance database, wherein the simulation database comprises simulation subcircuit blocks corresponding to fully-flattened instance subcircuit blocks, wherein the simulation database comprises simulation subcircuit blocks from different hierarchical branches across a hierarchical structure of the circuit, and wherein the simulation database is generated and maintained on-the-fly; simulating the circuit using the simulation database, the instance database, and the primitive database; and storing simulation results in a memory device.