Patent ID: 6782065
Filing Date: 2004-08-24
Classification: H03L,H04J

Abstract:
A method for reproducing a system clock in a digital data transmission network comprising:a first step of receiving digital data containing a first time reference clock from a sending side node and reproducing the first time reference clock at a receiving side node, a second step of generating a system clock serving as an operation base in said receiving side node, a third step of generating a second time reference clock serving as a time base in said receiving side node in synchronization with the system clock, a fourth step of calculating a first difference between adjoining counts of said first time reference clock in a receiving time interval, a fifth step of calculating a second difference between adjoining counts of said second time reference clock in the receiving time interval, and a sixth step of generating the system clock, based on said first difference of the reproduced first time reference clock and said second difference of the generated second time reference clock, so as to make a deviation between these time reference clocks converge.