Patent ID: 6477825
Filing Date: 2002-11-12
Classification: B24B

Abstract:
A semiconductor device manufacturing method, the method comprising the steps of:forming a first metal layer connected to a semiconductor substrate through a via hole of an insulating film; forming an insulating layer having convex/concave portions on the first metal layer; planarizing the insulating layer to a level between the concave portion of the insulating layer and an upper surface of the first metal layer by a polishing method; and depositing a second metal layer on the planarized insulating layer and patterning the second metal layer, wherein the polishing method is comprised of the following steps: preparing a porous fixed abrasive platen for polishing; immersing the porous fixed abrasive platen for a predetermined period of 60 to 100 minutes in a liquid including water and alcohol; and planarizing the insulating layer by using the porous fixed abrasive platen treated by said immersing step.