Patent ID: 6104221
Filing Date: 2000-08-15
Classification: H03K

Abstract:
A power-up detection circuit for a semiconductor device, comprising:a level detection section for generating a detection signal having a first voltage level when an internal power voltage is less than a predetermined voltage level and for generating a detection signal having a second voltage level when the internal power voltage is greater than or equal to the predetermined voltage level; andan output driver for generating an output signal having a waveform which is the same as a waveform of the internal power voltage in response to the detection signal having the second voltage level such that internal circuits are enabled by the output signal;wherein the level detection section comprises:a first switching means for controlling supply of the internal power voltage in response to the output signal;a level detector for detecting when the internal power voltage reaches the predetermined voltage level and generating a level detector output signal in response thereto; andan inverter circuit for generating the detection signal by inverting the level detector output signal; andwherein the output driver comprises:an output buffer for buffering the detection signal, and a second switching means coupled to the output buffer for controlling supply of the detection signal to the output buffer in response to the output signal.