Patent ID: 6459118
Filing Date: 2002-10-01
Classification: G11C,H01L

Abstract:
An NAND type non-volatile ferroelectric memory cell comprising:a first conduction type semiconductor substrate; N numbers of source/drain regions formed in a surface of the semiconductor substrate; wordlines formed over the substrate between the source/drain regions; ferroelectric capacitor first electrodes formed over the wordlines, excluding a last wordline, disposed with barrier metals inbetween, wherein the ferroelectric capacitor first electrodes are electrically coupled to the wordlines formed underneath; ferroelectric films formed on sides and top of the ferroelectric capacitor first electrodes; ferroelectric capacitor second electrodes formed on the ferroelectric films; plugs for connecting the source/drain regions to the ferroelectric capacitor second electrodes adjacent to the source/drain regions respectively excluding the first region and the (N)th region of the N numbers of the source/drain regions; and, bitlines formed on the substrate inclusive of the plugs with an insulating layer disposed inbetween for electrical connection to the first region and the (N)th region of the N numbers of the source/drain regions.