Patent ID: 7696074
Filing Date: 2010-04-13
Classification: H01L

Abstract:
1. A method of manufacturing a NAND flash memory device, the method comprising: forming first and second gates over a semiconductor substrate, each of the first and second gates including first and second sidewalls, wherein the first sidewall of the first gate is opposed to the second sidewall of the second gate; forming a junction region in the semiconductor substrate between the first and second gates; forming a buffer oxide film on the first and second gates and the semiconductor substrate; stripping the buffer oxide film at the first sidewall of the first gate and at the second sidewall of the second gate; forming nitride film spacers over each of the first sidewall of the first gate, the second sidewall of the second gate, and the buffer oxide film remaining on the second sidewall of the first gate and the first sidewall of the second gate; forming a self-aligned contact process (SAC) nitride film and an insulating film over the nitride film spacers; etching the insulating film and the SAC nitride film between the first and the second gates to expose the junction region, thereby forming a contact hole; and forming a conductive film over the insulating film including the contact hole, wherein the nitride film spacers are formed after stripping the buffer oxide film at the first sidewall of the first gate and at the second sidewall of the second gate.