Patent ID: 8484446
Filing Date: 2013-07-09
Classification: G06F

Abstract:
1. A microprocessor capable of executing a program including calling of a subroutine, comprising: a register file including a plurality of registers that stores data; a saving memory that stores therein data saved from the registers; and a saving control unit that controls saving of data stored in the registers and includes a map memory unit storing map data, the map data indicating an order of saving among the registers, wherein: the saving control unit detects a write instruction for writing second data into one of the registers that stores first data when the write instruction is read into the microprocessor, the write instruction being included in the subroutine; the saving control unit saves the first data stored in the one of the registers to the saving memory after the write instruction is read into the microprocessor and before the second data is written into the one of the registers according to the write instruction, and updates the map data when the first data is saved; and the saving control unit restores data saved in the saving memory back to the registers according to the order of saving indicated by the map data when a return instruction for returning from the subroutine is executed.