Patent ID: 8835918
Filing Date: 2014-09-16
Classification: H01L

Abstract:
1. A semiconductor device comprising: a base insulating layer; a first conductive layer and a second conductive layer embedded in the base insulating layer; an oxide semiconductor layer including a channel formation region, the oxide semiconductor layer provided on and in contact with the first conductive layer, the second conductive layer, and the base insulating layer; a gate insulating layer over the oxide semiconductor layer; a gate electrode layer over the channel formation region with the gate insulating layer therebetween; an insulating layer over the gate insulating layer; and a first wiring layer and a second wiring layer electrically connected to the first conductive layer and the second conductive layer, respectively, through openings provided in the insulating layer and the gate insulating layer, wherein the openings do not overlap with the oxide semiconductor layer.