Patent ID: 6275425
Filing Date: 2001-08-14
Classification: G11C

Abstract:
A voltage boosting circuit (10) comprising:an output node for providing a boosted voltage (VBOOST) greater than an external power supply voltage (VDD);a P-channel transistor (M2) having a gate and a current path for selectively connecting the output node to the external power supply voltage or for isolating the output node from the external power supply voltage;means (M0, M1, N1) for pulling the gate of the Pchannel transistor to the boosted voltage level (VBOOST);a ferroelectric capacitor (Z1) having a first electrode connected to the output node; andmeans for driving a second electrode of the ferroelectric capacitor from low to high when the output node is isolated from the external power supply voltage (N2, optional delay and buffer).