Patent ID: 6654823
Filing Date: 2003-11-25
Classification: H04L

Abstract:
A packet-data-processing apparatus for processing data of an input packet, said packet-data-processing apparatus comprising:a first data-processing unit for computing information on a processing count based on the length of said input packet and outputting said information; a memory; a second data-processing unit for carrying out processing on pieces of data included in said input packet sequentially in accordance with said information on a processing count and storing a first result of processing at the end of said processing carried out on each of said pieces of data in said memory; an access control unit for reading out one of said first results of processing written into said memory least recently from said memory at a request for a read operation and deleting said first result of processing read out from said memory from said memory; a third data-processing unit for making said request for a read operation at reception of data at a predetermined position of said input packet by said third data-processing unit and carrying out processing based on said received input packet and said first result of processing read out by said access mechanism unit at said request; and a fourth data-processing unit constituting pipeline data-processing mechanism with said first and third data-processing unit and having latency longer than latency which said second data-processing unit needs to store said first result of processing for said packet with a greatest packet length packet into said memory, wherein said memory provides a sufficient storage area for storing a first result of processing for an input packet having the longest latency since the first result of processing is generated till the first result of processing is supplied to said third data-processing unit.