Patent ID: 9058892
Filing Date: 2015-06-16
Classification: G09G,G11C,H01L

Abstract:
1. A semiconductor device comprising: a first logic circuit; a second logic circuit; a first capacitor and a second capacitor, each comprising a pair of electrodes; and a first transistor and a second transistor, each comprising an oxide semiconductor layer, wherein each of the first logic circuit and the second logic circuit comprises an inverter or a clocked inverter, wherein one of source and drain of the first transistor is electrically connected to one of the pair of electrodes of the first capacitor, wherein one of source and drain of the second transistor is electrically connected to one of the pair of electrodes of the second capacitor, wherein the other of source and drain of the first transistor is electrically connected to an output terminal of the first logic circuit, wherein the other of source and drain of the first transistor is directly connected to an input terminal of the second logic circuit, wherein the other of source and drain of the second transistor is electrically connected to an output terminal of the second logic circuit, and wherein a potential of the other of the pair of electrodes of the first capacitor is different from a potential of the other of the pair of electrodes of the second capacitor.