Patent ID: 6166575
Filing Date: 2000-12-26
Classification: H03K

Abstract:
A signal transmission circuit, comprising:a driver circuit configured for transmitting a signal;a signal line having one end coupled to the driver circuit and configured for propagating the transmitted signal;a driven circuit coupled to the other end of the signal line, the driven circuit being configured so as to be powered by two power source voltages Vss and Vdd (Vdd>Vss) and for receiving the transmitted signal; andan assist-circuit, coupled to the signal line at a point between the one end and the other end, the assist-circuit being configured for outputting a prescribed voltage to the signal line, the prescribed voltage being larger than power source voltage Vss and being smaller than power source voltage Vdd, the assist-circuit including a first inverter including an input terminal and an output terminal, and a feedback circuit coupling the input terminal of the first inverter to the output terminal of the first inverter, an input of the assist-circuit being connected to an input of the driven circuit;wherein the driven circuit includes a second inverter such that a beta coefficient of the second inverter is substantially equal to a beta coefficient of the first inverter, the beta coefficient being a drain current coefficient representative of flow of a drain current of an FET.