Patent ID: 6272617
Filing Date: 2001-08-07
Classification: G06F

Abstract:
A computer system, comprising:memory unit for storing program instructions;a processor; anda bus to transfer said program instructions from said memory unit to said processor, wherein said processor comprises:an instruction window having registers for storing a plurality of instructions;control logic that assigns a tag to at least each new dependent instruction that enters said instruction window, wherein said tag comprises a unique address in a temporary buffer where instruction execution results are stored;a recycling queue that stores said tags;a register renaming circuit that selects a tag assigned to a first instruction as a register address of a source register of a second instruction if said source register of said second instruction is dependent on said first instruction, wherein said selected tag is a renamed register address for said source register of said second instruction; anda register file that stores said selected tag at an address location indicated by a tag assigned to said second instruction.