Patent ID: 8017484
Filing Date: 2011-09-13
Classification: H01L

Abstract:
1. A complementary metal oxide semiconductor (CMOS) device including a first transistor and a second transistor, wherein the first transistor and the second transistor each comprises: a gate dielectric disposed over a workpiece, the gate dielectric having a top portion and a bottom portion, the gate dielectric comprising in one layer a mixture of silicon dioxide or silicon oxynitride and a combination of two elements selected from the group consisting of Zr, Al, and Hf, wherein the gate dielectric comprises a greater amount of the combination of elements in the top portion of the gate dielectric than in the bottom portion of the gate dielectric; and a gate disposed over the gate dielectric, wherein the gate of the first transistor comprises a p-doped polysilicon, wherein the gate of the second transistor comprises a n-doped polysilicon, wherein the first transistor comprises a positive channel metal oxide semiconductor (PMOS) device, and wherein the second transistor comprises a negative channel metal oxide semiconductor (NMOS) device.