Patent ID: 6667524
Filing Date: 2003-12-23
Classification: H01L

Abstract:
A semiconductor device including a first semiconductor element having a channel type and a second semiconductor element having the same channel type as said first semiconductor element,said first semiconductor element comprising: a first active region in a semiconductor substrate; a first gate electrode on said first active region with a first gate insulating film interposed between said first gate electrode and the semiconductor substrate; a pair of first impurity diffusion regions having the same conductivity type as said first active region; located in said first active region, and sandwiching said first gate electrode; second impurity diffusion regions having the same conductivity type as said first impurity diffusion regions, respectively located in said first impurity diffusion regions, and shallower in depth in the semiconductor substrate than diffusion depth of said first impurity diffusion regions; third impurity diffusion regions having a different conductivity type from said second impurity diffusion regions, respectively located in said second impurity diffusion regions, and shallower in depth in the semiconductor substrate than diffusion depth of said second impurity diffusion regions; and fourth impurity diffusion regions having the same conductivity type as said third impurity diffusion regions, respectively located in said third impurity diffusion regions, and shallower in the semiconductor substrate than diffusion depth of said third impurity diffusion regions; and said second semiconductor element comprising: a second active region having the same conductivity type as said first active region and located in the said semiconductor substrate; a second gate electrode on said second active region with a second gate insulating film interposed between said second gate electrode and the semiconductor substrate; a pair of fifth impurity diffusion regions corresponding to said first impurity diffusion regions and having the same conductivity type as said first impurity diffusion regions; sixth impurity diffusion regions corresponding to said third impurity diffusion regions and having the same conductivity type as said third impurity diffusion regions; and seventh impurity diffusion regions corresponding to said fourth impurity diffusion regions and having the same conductivity type as said fourth impurity diffusion regions, wherein said first semiconductor element is a transistor for use in a memory cell region, said second semiconductor element is a transistor for use in a peripheral circuit region, and a first total impurity concentration of said first impurity diffusion region and of said second impurity diffusion region in said first semiconductor element is higher than a second total impurity concentration of said fifth impurity diffusion region in said second semiconductor element.