Patent ID: 8417846
Filing Date: 2013-04-09
Classification: G06F,G06T,G11B,H04N

Abstract:
1. Device for real-time streaming to an array of solid state memory device sets, each set comprising n parallel addressable solid state memory devices wherein each solid state memory device comprises one or more solid state memory units each comprising a page buffer configured for buffering a data amount p during a page-receiving-time t_r and each solid state memory unit is configured for writing said data amount p from the page buffer to the solid state memory during a page-writing-time wrt_tm, said device for real-time streaming comprising receiving means for receiving data from at most k data streams in parallel, each data stream being received with an individual data rate and receiving the at most k data streams in parallel results in a data rate of receiving which equals the cumulated individual data rates, an input cache for buffering received data, a bus system of n parallel buses configured for transferring data from the input cache to the solid state memory device sets, and a controller for controlling the bus system such that data received from a first data stream of the data streams received in parallel is transferred to solid state memory device sets comprised in a first subset of said array of solid state memory device sets, only, and data received from at least a second data stream of the data streams received in parallel is transferred to solid state memory device sets comprised in a different second subset of said array of solid state memory device sets, only, wherein the controller is further configured for using the page-receiving-time t_r, the page-writing-time wrt_tm, the data amount p and the individual data rates for dynamically controlling to which one of the solid state memory device sets the bus system is transferring data.