Patent ID: 7571414
Filing Date: 2009-08-04
Classification: G06F

Abstract:
1. A method for designing multi-projects system-on-chip bench, wherein the bench integrates multiple system-on-chip projects, and comprises multiple silicon intellectual property blocks to be installed with special intellectual properties by the system-on-chip projects, the method comprising using a computer to perform the following steps: building verification environment plan; developing system architecture and defining hardware component and interface on the bench; designing an implementation bench according to the system architecture; making a verification environment according to the system architecture; planning system spec and silicon intellectual property spec according to the verification environment plan and the system architecture; designing the special silicon intellectual property blocks according to the system spec and the silicon intellectual property spec; integrating the special silicon intellectual property blocks into the implementation bench; performing logic level design according to the integrated implementation bench for the special silicon intellectual property blocks and generating a netlist; and performing solid level design according to the logic level design and generating the multi-projects system-on-chip bench.