Patent ID: 6593784
Filing Date: 2003-07-15
Classification: H03L

Abstract:
An integrated circuit, comprising:a clock path for carrying a clock signal; a power supply path adapted to receive power from a power supply; a phase locked loop connected to the power supply path, comprising: a voltage-controlled oscillator for generating a frequency signal dependent on an input thereto; a phase-frequency detector for detecting a phase difference between the clock signal and the frequency signal; and a bias-generator arranged to output a voltage to the input of the voltage-controlled oscillator responsive to the phase-frequency detector; and an adjustment circuit operatively connected to the input of the voltage-controlled oscillator, wherein the adjustment circuit modifies the voltage output by the bias-generator, and wherein the adjustment circuit comprises a first switch to provide current flow between a first voltage provided by the power supply path and the input of the voltage-controlled oscillator, and a second switch to provide current flow between a second voltage provided by the power supply path and the input of the voltage-controlled oscillator.