Patent ID: 8202763
Filing Date: 2012-06-19
Classification: H01L,H05K

Abstract:
1. A method for fabricating at least one device, comprising: applying at least one semiconductor chip on a first form element; applying at least one element on a second form element; applying a spatially homogeneous material on the at least one semiconductor chip and on the at least one element, the spatially homogeneous material having a first surface and a second surface opposite to the first surface; and forming an electrical via connection through the spatially homogeneous material from the first surface of the spatially homogeneous material to the second surface of the spatially homogeneous material, wherein the first surface of the spatially homogeneous material is coplanar with a surface of the at least one semiconductor chip and the second surface of the spatially homogeneous material is coplanar with a surface of the at least one element.