Patent ID: 8191125
Filing Date: 2012-05-29
Classification: G06F,H04N

Abstract:
1. A semiconductor integrated circuit for restricting a rate of data access from an external memory requested by one of one or more devices coupled to the semiconductor integrated circuit, comprising: one or more processing devices configured to implement: a data access monitor configured to determine whether a data access request is from an insecure device seeking to access a portion of the external memory storing privileged data, the external memory divided into portions storing privileged data and unprivileged data, and to generate an access signal indicating whether an insecure device is requesting access to a portion of the external memory storing privileged data: and a bandwidth comparator configured to receive the access signal, and, if the access signal indicates that the insecure device is requesting access to a portion of the external memory storing privileged data, to determine a rate of data retrieval for the data access request, compare the rate of data retrieval with one or more thresholds, and to selectively limit the rate of data retrieval for the data access request to a selected rate based on the comparison.