Patent ID: 6200892
Filing Date: 2001-03-13
Classification: H01L

Abstract:
A method for forming an electrical interconnect, comprising the following steps:a) creating a first electrically conductive layer overlying a substrate;b) patterning said first electrically conductive layer to create a masked region and an unmasked region;c) creating an etch stop layer overlying said first electrically conductive layer;d) exposing the substrate in said unmasked region, thereby forming a via in said first electrically conductive layer;e) creating a second electrically conductive layer to overlie said first electrically conductive layer and the substrate, said second electrically conductive layer electrically contacting the substrate in the unmasked region;f) removing said second electrically conductive layer from overlying said first electrically conductive layer, a portion of said second electrically conductive layer remaining in the via and contacting the substrate to form an electrical plug, the electrical plug and the first electrically conductive layer forming the electrical interconnect;g) retaining a portion of said first electrically conductive layer during said step of removing; andh) defining a maximum height of the electrical plug by a total height of said first electrically conductive layer and said etch stop layer, such that the height of the electrical plug is equal to or less than the total height of said first electrically conductive layer and said etch stop layer.