Patent ID: 8319271
Filing Date: 2012-11-27
Classification: H01L

Abstract:
1. A NAND-type nonvolatile semiconductor memory device comprising, a peripheral circuit region and a core region, the peripheral circuit region includes transistors for the peripheral circuit, and the core region includes a semiconductor region, a plurality of memory cell transistors connected to each other in series formed on the semiconductor region, and a select transistor provided at each end of the plurality of memory cell transistors formed on the semiconductor region, wherein the memory cell transistor comprises: a first insulating film on the semiconductor region; a charge trapping layer on the first insulating film; a second insulating film including aluminum oxide on the charge trapping layer; a first control gate electrode on the second insulating film; and a first source/drain region formed in the semiconductor region on both sides of the first control gate electrode, and the select transistor comprises: a third insulating film on the semiconductor region; a fourth insulating film on the third insulating film including an aluminum oxide containing at least one of a tetravalent cationic element, a pentavalent cationic element, and N (nitrogen); a second control gate electrode on the fourth insulating film; and a second source/drain region formed in the semiconductor region on both sides of the second control gate electrode.