Patent ID: 7510969
Filing Date: 2009-03-31
Classification: H01L

Abstract:
1. A method of forming an electrode line structure of a semiconductor device, comprising: depositing a conductive layer on a semiconductor substrate; depositing a hard mask layer on the conductive layer; patterning the hard mask layer and the conductive layer to form a plurality of elongated electrode lines, each line extending in a direction of extension; following the patterning of the hard mask layer and the conductive layer to form the plurality of elongated electrode lines, forming a hole in a predetermined portion of each of the electrode lines, thereby defining a separated first line unit and a second line unit for each of the electrode lines that are separated from each other in the direction of extension; depositing an insulating layer in the hole of each of the electrode lines and on the plurality of electrode lines; and etching the insulating layer using an anisotropic etching method to form a spacer at a sidewall of the second line unit of each of the electrode lines.