Patent ID: 7462914
Filing Date: 2008-12-09
Classification: G06F,H01L

Abstract:
1. A semiconductor circuit device comprising: a semiconductor substrate; a first PMIS transistor and a first NMIS transistor which are formed on the semiconductor substrate; and a first gate wiring for connecting the first PMIS transistor and the first NMIS transistor, wherein the first PMIS transistor includes a first active region which is formed on the semiconductor substrate and a first gate electrode which is formed on the first active region and which is connected at one end thereof to the first gate wiring and includes at the other end thereof a first protruding portion protruding at a side opposite to the first gate wiring side from the first active region, the first NMIS transistor includes a second active region which is formed on the semiconductor substrate with a space left from the first active region and a second gate electrode which is formed on the second active region and which is connected at one end thereof to the first gate wiring and includes at the other end thereof a second protruding portion protruding at a side opposite to the first gate wiring side from the second active region, and a protruding length of the first protruding portion of the first PMIS transistor is greater than a protruding length of the second protruding portion of the first NMIS transistor.