Patent ID: 9081693
Filing Date: 2015-07-14
Classification: G06F,Y02D

Abstract:
1. A cache system comprising: a cache array, the cache array comprising a plurality of entries; a tag array coupled to the cache array, the tag array storing an indication of whether a respective entry of the plurality of entries in the cache array has modified information; and, a memory scrubbing controller, the memory scrubbing controller generating a first scrubbing rate and a second scrubbing rate, the first scrubbing rate being faster than the second scrubbing rate, the memory scrubbing controller controlling the first scrubbing rate to the tag array of the cache system; and wherein the memory scrubbing controller determines whether the respective entry of the plurality of entries in the cache array contains modified information based upon the indication; and, when the respective entry of the plurality of entries in the cache array contains modified information then scrubbing the respective entry at the first scrubbing rate.