Patent ID: 9219029
Filing Date: 2015-12-22
Classification: H01L

Abstract:
1. A method of manufacture of an integrated circuit packaging system comprising: forming a lower interior conductive layer directly on a carrier having an exterior conductive layer, the lower interior conductive layer on a side of the carrier opposite from the exterior conductive layer, and the lower interior conductive layer having a lower layer top side; forming an interior insulation layer directly on the lower interior conductive layer, the lower interior conductive layer within the interior insulation layer, and the lower layer top side of the lower interior conductive layer coplanar with an interior insulation bottom side of the interior insulation layer; removing a portion of the carrier to form a lead having a lead top side wider than a lead bottom side, the lead for conducting electrical signals, and the lead top side coplanar with the lower layer top side of the lower interior conductive layer with the lead having a curved surface extending from the lead top side to the lead bottom side; forming a protection layer directly on a bottom side of the lower interior conductive layer, a lead non-horizontal side, the exterior conductive layer, and a bottom extent of the interior insulation layer, the protection layer coplanar with a lead top side; forming an upper interior conductive layer directly on the interior insulation layer, the upper interior conductive layer having an upper contact for attaching an internal connector; mounting an integrated circuit over the upper interior conductive layer, the integrated circuit attached to the upper contact with the internal connector; and forming an encapsulation over the integrated circuit, the internal connector, and the upper interior conductive layer to hermetically seal the integrated circuit for environmental protection.