Patent ID: 6215345
Filing Date: 2001-04-10
Classification: G01R,G11C,H03K

Abstract:
A semiconductor device for setting a delay time, comprising:a frequency divider receiving as an input a reference pulse signal, the frequency divider providing as an output a divided reference signal having a frequency one-half of a frequency of the reference pulse signal;a counter receiving as an input the reference pulse signal, wherein an output of the counter changes once per period of the reference pulse signal;a plurality of serially connected delay circuits receiving as an input the divided reference signal and having a plurality of delayed outputs representing different delay values; anda selector switch for selecting one of the delayed outputs, the selector switch receiving as an input the output of the counter, so that changes in the output of the counter result in changes in a selected one of the delayed outputs;wherein for each change of a level of the divided reference signal, a different delayed output is selected.