Patent ID: 6057897
Filing Date: 2000-05-02
Classification: G02F,G09G,H01L

Abstract:
A liquid crystal apparatus comprising:an active matrix substrate including a plurality of scanning lines and a plurality of signal lines, transistors, each having source, gate and drain regions, arranged respectively at the crossings of said scanning lines and said signal lines, each transistor having the source region connected to a corresponding signal line and the gate region connected to the corresponding scanning line and pixel electrodes connected respectively to the drain regions of said transistors, and said transistor being a CMOS transistor in which nMOS transistors and pMOS transistors are alternately arranged in a direction along an elongated direction of said signal lines;an opposite substrate disposed oppositely relative to said active matrix substrate; anda liquid crystal material filled in the space between said active matrix substrate and said opposite substrate,wherein, in the CMOS transistor, the source regions of each pair of adjacently located nMOS transistors or of each pair of adjacently located pMOS transistors are formed as a single region to be shared by that pair as a common source region for that pair in said array of nMOS transistors and pMOS transistors alternately arranged in the direction along the elongated direction of said signal lines,wherein the common source region is connected to the corresponding signal line of that pair,wherein both drain regions of the adjacently located nMOS and pMOS transistors are connected to a single pixel electrode, andwherein only an nMOS or a pMOS transistor is arranged under said single pixel electrode.