Patent ID: 7340377
Filing Date: 2008-03-04
Classification: C23C,G05B,Y02P

Abstract:
1. A method of monitoring a single-wafer processing system comprising: positioning a wafer on a wafer holder in a single-wafer processing chamber, wherein a reduced pressure is established in the single-wafer processing chamber; performing a single-wafer process; monitoring the single-wafer process using a set of nonlinear differential equations {dot over (x)} and x 1 , p 1 , and u 1 are single-wafer process parameters in which the first vector x 1 comprises a first state vector for the single-wafer process, the first vector p 1 comprises one or more modeling parameters for the single-wafer process, the vector u 1 comprises one or more inputs applied to the single-wafer process; calculating a dynamic estimation error for the single-wafer process; comparing the dynamic estimation error to an operational limit established by one or more BIST rules in a BIST table for the single-wafer process; continuing the single-wafer process when the dynamic estimation error is within the operational limit; and comparing the dynamic estimation error to a warning limit established for the single-wafer process when the dynamic estimation error is not within the operational limit, and either sending a warning message identifying a potential problem with the single-wafer process and/or single-wafer processing system and continuing the single-wafer process when the dynamic estimation error is within the warning limit, wherein the warning message is determined by the BIST rule currently being used, or sending a fault message identifying a known problem with the single-wafer process and/or single-wafer processing system and stopping the single-wafer process when the dynamic estimation error is not within the warning limit established for the single-wafer process, wherein the fault message is determined by the BIST rule currently being used.