Patent ID: 9018074
Filing Date: 2015-04-28
Classification: H01L,H01S

Abstract:
1. A process for manufacturing a plurality of laminate leadless carrier packages, comprising the steps of: preparing a substrate, wherein preparing said substrate comprises laminating a top conductive layer, a bottom conductive layer, and a dielectric layer between said top and bottom conductive layers together, and wherein said top conductive layer comprises a die attach pad, a wire bond pad, and at least two slotted vias; applying epoxy adhesive to said die attach pad; mounting a photonic semiconductor chip on said die attach pad; wire-bonding said photonic semiconductor chip with said wire bond pad using a wire bond; temporarily filling said slotted vias with temporary fillers; molding a molding compound to form an encapsulation covering said photonic semiconductor chip, said wire bond, and at least a portion of said top surface of said substrate; removing said temporary fillers from the slotted vias; and dicing said substrate into individual laminate leadless carrier packages.