Patent ID: 6535987
Filing Date: 2003-03-18
Classification: H04L

Abstract:
An amplifier, comprising: a fan-out which varies according to the time spent between an edge of a synchronization signal and an edge of a logic input signal, the amplifier including several identical blocks, each block including:an output stage connected between a data input and a data output, the data input and output being respectively connected to the data inputs and outputs of the other blocks, a delay element, the delay elements of all blocks being connected in series, the delay element of the first block receiving the synchronization signal, an edge detector, the input of which is connected to the input of the output stage, and means for inhibiting the propagation of the synchronization signal through the delay element when the signal generated by the edge detector of the preceding block is active and for activating the output stage and the edge detector when the signal generated by the delay element of the preceding block is active.