Patent ID: 6423474
Filing Date: 2002-07-23
Classification: G03F,H01L,Y10S

Abstract:
A method of patterning and etching a semiconductor surface, the method comprising:forming an anti-reflective barrier on the semiconductor surface that has a first component tuned to absorb reflected light from the semiconductor surface in an unannealed state and a second component tuned to absorb reflected light from the semiconductor surface in an annealed state; positioning a first photoresist layer on the anti-reflective barrier; patterning and etching the first photoresist layer wherein the first component of the anti-reflective barrier inhibit light from being reflected from the semiconductor surface into the first photoresist layer during patterning and etching of the first photoresist layer; annealing the semiconductor surface following the patterning and etching of the first photoresist layer wherein the annealing step improves the ability of the second component of the anti-reflective barrier to inhibit reflected light to pass therethrough; depositing a second photoresist layer on the anti-reflective barrier; patterning and etching the second photoresist layer wherein the second component of the anti-reflection barrier inhibits light from being reflected from the semiconductor surface into the second photoresist layer during patterning and etching of the second photoresist layer.