Patent ID: 7417906
Filing Date: 2008-08-26
Classification: G11C

Abstract:
1. An apparatus for controlling a switch module in a memory, comprising: a first pulse width adjusting unit, for receiving an input instruction signal and selectively adjusting a pulse width of the input instruction signal to generate an adjusted input instruction signal according to a first pulse width adjustment; a decoder, coupled to the first pulse width adjusting unit, for receiving an input address signal and the adjusted input instruction signal to generate a control signal for controlling a turn-on period of the switch module for memory data access through the switch module; a second pulse width adjusting unit, coupled to the decoder, for receiving the control signal outputted from the decoder and selectively adjusting a pulse width of the control signal to generate an adjusted control signal for controlling the switch module according to a second pulse width adjustment; and a detector, coupled to the first pulse width adjusting unit and the second pulse width adjusting unit, for detecting an electronic power quality of an input signal for controlling the first and second pulse width adjusting units to set the first and second pulse width adjustments respectively.