Patent ID: 7471228
Filing Date: 2008-12-30
Classification: H03M

Abstract:
1. A method of operating a pipelined analog-to-digital converter comprising first and second stages sharing an amplifier, said method comprises: performing a first discharge operation at the amplifier in response to a first reset pulse during a first period in which the first and second stages change operations, wherein the first period occurs after a first clock signal is used to cause the first stage to perform a first operation and the second stage to perform a second operation, but before a second clock signal is used to cause the first stage to perform the second operation and the second stage to perform the first operation; and performing a second discharge operation at the amplifier during a second period in which the first and second stages change operations, wherein the second period occurs after the second clock signal is used to cause the first stage to perform the second operation and the second stage to perform the first operation.