Patent ID: 6912683
Filing Date: 2005-06-28
Classification: H03M

Abstract:
1. A method implemented by a data processor for providing a CRC code for specified data that comprises N bits including an LSB bit 0 , and an MSB bit N−1, the method comprising: generating a plurality of preliminary CRC codes in response to portions of the specified data, where each of the plurality of preliminary CRC codes is generated in response to a respective one of the portions, each one of the portions comprising bits adjacent to one another in the specified data, where a jth portion has an LSB that is a bit startj of the specified data, the bit startj being positioned between the LSB and the MSB of the specified data, and generating the CRC code associated with the jth portion comprises generating data indicative of a CRC code for a polynomial x synthesizing the CRC code for the specified data in response to the plurality of preliminary CRC codes.