Patent ID: 6381189
Filing Date: 2002-04-30
Classification: G11C,H03K

Abstract:
A semiconductor register element, wherein in a circuit network of a CMOS semiconductor integrated circuit, a source voltage supply system is divided into a first source wiring and a second source wiring, said first source wiring feeding a temporary memory element group, which stores information only when source voltage is applied, said second source wiring feeding an element group other than said temporary memory element group, said element group other than said temporary memory element group being constituted by a non-memory element group acting as combinational logic or a buffer, a permanent memory group for storing information even when source voltage is interrupted, an analog function element group, or other groups, and wherein output logic is held and passage of unstable logic is prevented from said element group other than said temporary memory element group that is connected to an input terminal of a temporary memory element in said temporary memory element group, so that even when source voltage is interrupted on said element group other than said temporary memory element group that is connected to said input terminal of said temporary memory element in said temporary memory element group, said stored information of said temporary memory element is held without corruption in a state just before source voltage is interrupted on an element other than said temporary memory element group, and after resuming supply of source voltage to said element other than said temporary memory element group, an operation of said integrated circuit is resumed in a state just before said source voltage is interrupted.