Patent ID: 7755114
Filing Date: 2010-07-13
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a monocrystalline channel region of a first conductivity type formed on the surface of the semiconductor substrate; a gate electrode formed on the channel region via a gate insulating film; a pair of source/drain electrodes of a second conductivity type provided on both sides of the gate electrode and having a monocrystalline or polycrystalline structure; metallic compound layers formed on the source/drain electrodes; first and second stress application layers placed in direct contact with bottom surfaces of the source/drain electrodes, respectively, and each having a crystal structure whose intrinsic lattice spacing is different from lattice spacing inherent in a substance constituting the source/drain electrodes; first and second buried insulating regions placed in direct contact with bottom surfaces of the first and second stress application layers, respectively; sealing insulating layers provided at both far-side and near-side ends of the first and second stress application layers, respectively, with respect to the gate electrode; and liner insulating layers insoluble in an HF solution and formed between the stress application layers and the buried insulating regions.