Patent ID: 8560916
Filing Date: 2013-10-15
Classification: G06F,H03M

Abstract:
1. A method for enhancing error correction capability of a controller of a flash memory device comprising: checking whether an iteration number for decoding encoded data reaches an upper bond, wherein the upper bond is determined in advance for the memory controller, and the encoded data is encoded by an encoding procedure comprising: when the iteration number reaches the upper bond, reporting decoding failure, otherwise, utilizing at least one portion of the second parity codes to perform first error correction upon corresponding columns and then checking, based upon the first error correction, whether at least one row that originally had at least one error has been completely corrected; when the row that originally had error have not been completely corrected, performing operations corresponding to one or more rows of the plurality of rows to perform second error correction according to at least one portion of the first parity codes and further checking whether the row that originally had error still have uncorrectable error; and when the row that originally had error still has uncorrectable error, increasing the iteration number and re-checking whether the iteration number for decoding the encoded data reaches the upper bond in order to iteratively perform at least one of the first error correction and the second error correction until either the encoded data is decoded successfully or the decoding failure is reported.