Patent ID: 7375506
Filing Date: 2008-05-20
Classification: H03K

Abstract:
1. A comparison device that receives an analogue input signal and a set value, and outputs a digital output signal, said output signal being capable of switching between a high logic level and a low logic level, or vice versa, said device comprising: a one-threshold comparator receiving said input signal and said set value, said comparator generating a resultant signal that depends on the result of the comparison, a sampler, which samples said resultant signal; and a controller, which blocks said sampler as long as a timeout mechanism does not indicate that a given timeout duration has elapsed since verification of at least one predetermined instability criterion, said timeout mechanism being reinitialized with the timeout duration every time that said at least one predetermined instability criterion is satisfied, wherein if said sampler is not blocked, said sampler copies the resultant signal at the output of said device.