Patent ID: 7833844
Filing Date: 2010-11-16
Classification: H01L

Abstract:
1. A method of producing a semiconductor device comprising a semiconductor substrate, a MOS transistor including a gate electrode and a side wall formed on sides of the gate electrode, a trimming fuse, a resistance element, and an insulating film covering the MOS transistor, the trimming fuse, and the resistance element, the insulating film having a trimming opening for laser trimming in an area above the trimming fuse where the insulating film is thinner than in other areas, the method comprising the steps of: (A) forming the gate electrode and the trimming fuse on the semiconductor substrate; (B) forming a side wall insulating film covering the gate electrode and the trimming fuse; (C) forming a conductive film on the side wall insulating film and patterning the conductive film to form an etching stop layer in an area encompassing a trimming opening forming area where the trimming opening is to be formed and to form the resistance element in a different area; (D) forming the side wall on the sides of the gate electrode by etching back the side wall insulating film using a mask pattern that covers at least the etching stop layer and the resistance element and exposes a portion of the side wall insulating film above the gate electrode and its surrounding area; (E) repeating, one or more times, sub-steps of forming an interlayer insulating film covering the entire semiconductor substrate and of forming an upper wiring layer on the interlayer insulating film, and then forming a passivation film covering the interlayer insulating film and the upper wiring layer; (F) removing the passivation film and the interlayer insulating film in the trimming opening forming area until the etching stop layer is exposed; and (G) forming the trimming opening by removing the etching stop layer in the trimming opening forming area.