Patent ID: 7733995
Filing Date: 2010-06-08
Classification: H03K

Abstract:
1. An {N−1}-stage noise filter, used for a digital signal, comprising: an N number of flip flops connected in series; at least an {N−1} number of AND circuits configured such that outputs from a first and a second of the flip flops are input to a first of the AND circuits, and for each n of 2≦n≦N−1, an output from an {n+1}-th of the flip flops and an output from an {n−1}-th of the AND circuits are input to an n-th of the AND circuits in order for each n-th AND circuit for 1≦n≦N−1 to be configured to output, as an output of an n-th stage filter in the noise filter, an AND of outputs of the first to {n+1}-th flip flops; a selection unit to output a filter output signal by selecting one of the outputs from the first to {N−1}-th AND circuits based on a selection signal; a wave form check unit to make the selection unit change a selection thereby by changing a value of the selection signal based on a pulse width on the filter output signal which is output from the selection unit; and a minimum pulse width designation register to set a minimum width of a pulse of said filter output signal, wherein said wave form check unit comprises, an output pulse width counter to count synchronously with an internal clock for a period of time when the filter output signal is high and to output a counted value; a comparison unit to compare an added value that is the counted value added by a filter value, which is determined by said selection signal, with a set value of said minimum pulse width designation register; and a filter output changeover counter to change the selection signal once the added value is less than the set value of the minimum pulse width designation register as a result of the comparison by the aforementioned comparison unit.