Patent ID: 7002499
Filing Date: 2006-02-21
Classification: H03K,H03M

Abstract:
1. A digital-to-analog converter comprising: a differential transistor pair comprising a first input/output transistor and a second input/output transistor, the first input/output transistor and the second input/output transistor having an input terminal, an output terminal and a third terminal, the differential transistor pair receiving a differential logic signal at the input terminals of the first input/output transistor and the second input/output transistor; a bistable circuit connected with the output terminal of the first input/output transistor and the output terminal of the second input/output transistor; a clock circuit comprising a first clock transistor and a second clock transistor connected as a differential pair, the first clock transistor and the second clock transistor having a clock input terminal, a clock second terminal, and a clock third terminal, the clock second terminal of the first clock transistor being connected with the third terminal of the first and second input/output transistor, and the clock second terminal of the second clock transistor being connected with the bistable circuit; and a current source connected with the clock third terminal of the first clock transistor and the clock third terminal of the second clock transistor, wherein: the clock circuit acts as a switch, controlling the converter so as to provide current from the current source either to the differential transistor pair or to the bistable circuit; and the input terminals of the first and second input/output transistor receive signals switching between a first logic value and a second logic value, switching between the first logic value and the second logic value occurring when the clock circuit controls the converter so as to provide current from the current source to the bistable circuit, said switching being asserted at the output terminal of the first and second input/output transistor when the clock circuit controls the converter so as to provide current from the current source to the differential transistor pair.