Patent ID: 8549246
Filing Date: 2013-10-01
Classification: G06F

Abstract:
1. A method for detecting a protected mode entry sequence comprising: receiving a first plurality of inputs on a first interface pin of a device and a second plurality of inputs on a second interface pin of the device, wherein the first interface pin normally operates as an input pin of the device and the second interface pin normally operates as an output pin of the device; comparing each of the received inputs of the first and second pluralities of inputs to a corresponding expected input of the protected mode entry sequence; and allowing access to a protected mode of operation only if each of the received inputs of the first and second pluralities of inputs matches a respective corresponding expected input of the protected mode entry sequence or else, denying access to the protected mode, wherein the protected mode is a debug mode, a settings programming mode, or a testing or evaluation mode, or a combination thereof.