Patent ID: 7638802
Filing Date: 2009-12-29
Classification: G02F,H01L

Abstract:
1. A flat panel display, comprising: a plurality of gate lines for providing a gate signal to a gate electrode; a plurality of data lines insulated from the gate lines; a plurality of pixels disposed in an intersection of data lines and gate lines, each pixel divided into a upper region, a middle region, and a lower region; and a plurality of thin film transistors (TFT), each of the TFTs are disposed in the one of pixels and includes the gate electrode, wherein a first pixel and a second pixel of the pixels are adjacent to each other along one of the respective gate lines, wherein a first TFT of the plurality of TFTs is provided in the middle region of the first pixel, and a second TFT of the plurality of TFTs is provided in the lower region of the second pixel.