Patent ID: 6103579
Filing Date: 2000-08-15
Classification: H01L

Abstract:
A method of manufacturing a static random access memory cell, the method comprising:providing a silicon substrate;defining first and second inverters on the substrate, the first and second inverters respectively including p-channel transistors having respective gates, defining first and second inverters comprising forming an active area common to the drains of the p-channel transistors by doping a contiguous region in the substrate extending from the drain of one p-channel transistor to the drain of the other p-channel transistor; anddefining an isolation gate relative to the common active area, between the drains of the p-channel transistors, by forming polysilicon on the common active area;whereby contact can be made to the respective drains of the p-channel transistors with reduced need to accommodate pullback of the active area common to the drains of the p-channel transistors, wherein the substrate has a planar surface and wherein forming an active area comprises forming a field oxide in the planar surface surrounding the contiguous region.