Patent ID: 7861027
Filing Date: 2010-12-28
Classification: G06F

Abstract:
1. An apparatus comprising: an adapter adapted on a single semiconductor die to communicate with a first component according to a peripheral component interconnect (PCI) protocol and to communicate with a first interface according to a second protocol corresponding to an advanced extensible interface (AXI) or open core protocol (OCP) protocol; the first interface adapted on the single semiconductor die and coupled to the adapter by a first interconnect, the first interface to perform address translation and ordering of transactions received from the first component; a first physical unit coupled between the first interface and a second interconnect to communicate the transactions between the first interface and the second interconnect; and the second interconnect adapted on the single semiconductor die to couple the first interface to a plurality of heterogeneous resources adapted on the single semiconductor die, each of the plurality of heterogeneous resources including an intellectual property (IP) core and a shim, wherein the shim is to implement a PCI header of the PCI protocol for the IP core to enable incorporation of the corresponding IP core in the apparatus without modification, wherein the apparatus is to operate according to the PCI protocol and the IP core is to operate according to the second protocol.