Patent ID: 6704858
Filing Date: 2004-03-09
Classification: G06F

Abstract:
An information processor comprising:a first register file which is used when a first instruction is executed; a second register file which is used when a second instruction is executed; a controller which activates said second register file and deactivates said first register file, when said second instruction is called from said first instruction; a first path which transfers a data read from said first register file if the data used by said second instruction is not written in said second register file activated by said controller when said second instruction is executed; a second path which transfers the data read from said second register file if the data used by said second instruction is written in said second register file activated by said controller when said second instruction is executed; and a third path which transfers an execution result obtained by executing said second instruction based on the data transferred from one of said first path and said second path to write into said second register file.