Patent ID: 7456773
Filing Date: 2008-11-25
Classification: H03M

Abstract:
1. A digital-to-analog converter, configured to convert a digital signal of N bits having a set M of most significant bits and a set L of least significant bits to an analog signal, the N bits defining a set of coded values, comprising: an input stage configured to receive the digital signal and modifying the most significant bit of the set M of most significant bits; a first current source and a first plurality of switches responsive to the set M of most significant bits; at least a second current source and a second plurality of switches responsive to the set L of least significant bits; and an output stage, configured to provide at least a first differential output signal and a second differential output signal, said output stage configured to modify the currents received from the first plurality of switches and the second plurality of switches, such that the value of the average output current of the first and second differential outputs signals is steered to a relatively low current value at the mid-point of the coded values.