Patent ID: 8698469
Filing Date: 2014-04-15
Classification: H02M

Abstract:
1. A system comprising: a filter module that (i) generates a direct current (DC) voltage component of an error between an output voltage of a switched-mode power supply and a reference voltage and (ii) generates a signal with ripple by subtracting the DC voltage component from the error; and a cyclic integrator module that (i) applies a gain to a difference between the generated signal with ripple and a predicted rippled, (ii) integrates each of N segments of the gain-applied difference, and (iii) generates the predicted ripple by reconstructing the N integrated segments, wherein N is an integer greater than one, wherein the filter module includes: a feedback filter module that calculates a sum of the error and a delayed sum, wherein the delayed sum is based on the sum after a first predetermined period; a sample/hold (S/H) module that samples the delayed sum and outputs the sampled delayed sum after a second predetermined period; and a feed-forward integrator module that calculates the DC voltage component based on a difference between the sampled delayed sum and a delayed difference, wherein the delayed difference is based on a third predetermined period, wherein each of the first, second, and third periods is a multiple of a Nyquist frequency of the switched-mode power supply.