Patent ID: 8949679
Filing Date: 2015-02-03
Classification: G06F,G11C,Y02D

Abstract:
1. A method of optimizing a voltage reference signal, comprising: assigning a first value to the voltage reference signal; executing a test pattern while using the voltage reference signal having the first value; observing whether a failure occurs in response to the executing and thereafter recording a pass/fail result; incrementing the voltage reference signal by a second value; repeating the executing, the observing, and the incrementing a plurality of times until the voltage reference signal exceeds a third value; determining an optimized value for the voltage reference signal based on the pass/fail results obtained through the repeating the executing, the observing, and the incrementing the plurality of times; and performing a margin testing process by varying a supply voltage rail and a plurality of clock/strobe positions to determine whether the optimized value for the voltage reference signal is operable across all potential variations of the supply voltage rail and the plurality of clock/strobe positions.