Patent ID: 6713372
Filing Date: 2004-03-30
Classification: H01L

Abstract:
A method for manufacturing a synchronous dynamic random access memory (SDRAM), comprising the steps of:a) preparing a semiconductor substrate on which a gate insulating layer, a stacked gate having a polysilicon layer and a metal layer containing tungsten, and an insulating layer are formed; b) forming a first oxide layer on the semiconductor substrate and sidewalls of the polysilicon layer, whereby a resulting structure is formed; c) forming a first nitride layer on the resulting structure; d) forming first nitride spacers on sidewalls of the metal layer, on the first oxide layer and on the gate insulating layer by applying a blanket etching process to the first nitride layer; e) injecting dopants into the semiconductor substrate exposed at both sides of the first nitride layer spacers; f) forming source/drain regions by activating the dopants through a thermal treatment in an O2 atmosphere and simultaneously forming a second oxide layer on a surface of the substrate; and g) forming second nitride layer spacers on sidewalls of the first nitride layer and on the second oxide layer, wherein the second oxide layer is a buffer layer to decrease stress caused by the second nitride layer.