Patent ID: 8493524
Filing Date: 2013-07-23
Classification: G02F,H01L

Abstract:
1. An array substrate comprising: a substrate having a display area and a peripheral area adjacent to the display area; a pixel array that receives a driving signal, the pixel array formed on the substrate corresponding to the display area; and a driving circuit comprising a plurality of stages, and formed on the substrate corresponding to the peripheral area, wherein at least one of the stages comprises: a first transistor comprising a gate electrode, a source electrode, a drain electrode, a gate insulating layer that electrically insulates the gate electrode from the source and drain electrode, and an active layer disposed on the gate insulating layer, wherein the active layer includes a first area for overlapping with the source electrode and a second area for overlapping with the drain electrode, wherein the first area has an opening that exposes a portion of the gate insulating layer to the source electrode to enhance a capacitance between the source electrode and the gate electrode, wherein the opening is overlapped with the gate electrode, wherein the drain electrode comprises a main drain electrode and a plurality of sub drain electrodes branched from the main drain electrode and spaced apart from each other, the main drain electrode is spaced apart from the gate electrode in a plan view, and the source electrode comprises an electrode body covering the opening, and a plurality of recesses that enclose ends of the sub drain electrodes, and wherein at least a portion of the electrode body is disposed on the gate electrode, and wherein the opening continuously extends from one of the sub drain electrodes to another of the sub drain electrodes along a lengthwise direction of the gate electrode.