Patent ID: 8472881
Filing Date: 2013-06-25
Classification: H04B

Abstract:
1. A test device, comprising: a microprocessor; a switching network comprising a plurality of switches; said microprocessor controls said switching network; a signal booster; an uplink antenna and a downlink antenna; a diagnostic device; a first 50 ohm load; a second 50 ohm load; a power source for said signal booster and said diagnostic device; said microprocessor controls said switching network which, in turn, controls the interconnection of said power source, said signal booster, said uplink and downlink antennas, said diagnostic device, said first 50 ohm load, and said second 50 ohm load; said diagnostic device includes an analyzer port, and said signal booster includes an uplink port and a downlink port, and wherein: said uplink port of said signal booster is in electrical communication with said first 50 ohm load, said downlink port of said signal booster is in electrical communication with said second 50 ohm load, said analyzer port is in electrical communication with said uplink antenna, and, said diagnostic device is measuring the efficiency of said uplink antenna.