Patent ID: 6667223
Filing Date: 2003-12-23
Classification: H01L

Abstract:
A method of using high aspect trenches to provide STI (shallow trench isolation) of active areas of a semiconductor substrate, the method comprising the steps of:providing a semiconductor substrate having a top surface covered by a pad nitride layer, said substrate defining a plurality of high aspect trenches, separated by element regions; depositing a first insulating material over said high aspect trenches to partially fill said trenches to a level of between Â½ to Â¾ of the total depth of said trenches and thereby defining a void that extends below the top surface of said pad nitride layer of said substrate, the first insulating material further forming a hut disposed over each element region, each hut comprising a bottom portion adjacent the element region and a top portion disposed over the bottom portion; forming a resist over the trenches, said resist filling said void between said element regions and leaving the hut top portion over each element region exposed; removing the hut top portion and hut bottom of the first insulating material so as to expose each element region; removing the resist, including resist that is filling said void; and depositing a second insulating material, said second insulating material to fill said void and cover said trenches and said element regions.