Patent ID: 7932136
Filing Date: 2011-04-26
Classification: H01L

Abstract:
1. A method of forming a field effect transistor (FET) comprising: forming a gate (G) stack atop a silicon layer, the silicon layer having a surface; forming halo features by etching into the surface of the silicon layer followed by a step of growing a first epitaxial silicon (epi-Si) layer on the etched silicon layer; forming a source (S) on one side of the gate (G) and a drain (D) on an opposite side of the gate (G), wherein the step of etching into the surface of the silicon layer comprises: first etching a first distance into the surface of the silicon layer; then etching a second distance into the surface of the silicon layer; forming a first void space extending from the surface of the silicon layer a total of the first distance and the second distance into the surface of the silicon layer; forming first recesses for the halo features extending under the gate stack from opposite sides of the gate stack, between the first distance and the second distance; filling and in situ doping the first void space and the first recesses; etching the first epitaxial silicon layer and forming a second void space so that first epitaxial silicon material remains only in recesses, as the halo features; growing a second epitaxial silicon layer to fill the second void space; and etching the second epitaxial silicon layer to form a third void extending into the surface of the second epitaxial layer and forming second recesses extending under the gate stack from opposite sides of the gate stack.