Patent ID: 6165826
Filing Date: 2000-12-26
Classification: H01L

Abstract:
A method of forming a pair of complementary metal oxide semiconductor transistors in a semiconductor substrate, said method comprising the steps of:a) forming a first gate dielectric and a first gate electrode on a first portion of said semiconductor substrate having a first conductivity type and forming a second gate dielectric and a second gate electrode on a second portion of said semiconductor substrate having a second conductivity type;b) forming a silicon nitride layer over said first portion of said semiconductor substrate including said first gate electrode and over said second portion of said semiconductor substrate including said second gate electrode;c) removing said silicon nitride layer from said second portion of said silicon substrate and from the top of said second gate electrode to thereby form a first pair of silicon nitride spacers adjacent to opposite sides of said second gate electrode;d) forming a pair of recesses in said second portion of semiconductor substrate in alignment with said first pair of silicon nitride spacers; ande) depositing a semiconductor material in said pair of recesses in said second portion of said semiconductor substrate.