Patent ID: 7666775
Filing Date: 2010-02-23
Classification: H01L

Abstract:
1. A method for fabricating a gate electrode of a field effect transistor device, comprising the steps of: providing a Si semiconductor layer having at least one gate insulating layer region formed of SiO forming a Si nano crystal layer on said gate insulating layer in a rapid thermal chemical vapor deposition chamber using SiH forming a poly-SiGe alloy layer on said Si nano crystal layer in situ in said rapid thermal chemical vapor deposition chamber using SiH forming a silicon oxide layer on said poly-SiGe layer in situ in said rapid thermal chemical vapor deposition chamber by an in situ purge of the deposition chamber in an oxygen ambient to form said silicon oxide layer with said silicon oxide layer formed sufficiently thin so as to offer little resistance to current flow and with sufficient oxide concentration to block upward Ge diffusion upon heating; and forming a poly-Si layer on said oxide layer.