Patent ID: 6826085
Filing Date: 2004-11-30
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device including a nonvolatile cell circuit comprising:a step-up circuit for receiving a clock signal to generate a step-up voltage for said nonvolatile cell circuit; a voltage divider, connected to said step-up circuit, for dividing said step-up voltage to generate a plurality of voltages; a selector, connected to said voltage divider, for selecting one of said voltages; a reference voltage generating circuit for generating a reference voltage; a first comparator, connected to said selector and said reference voltage generating circuit, for comparing said selected one of said voltages with said reference voltage; a gate circuit, connected to said first comparator and said step-up circuit, for supplying said clock signal to said step-up circuit in accordance with an output signal of said first comparator so that said selected one of said voltages is brought close to said reference voltage; a second comparator, connected to said step-up circuit, for comparing said step-up voltage with an externally-provided expected value; a counting signal generating circuit, connected to said second comparator, for generating a counting signal in accordance with an output signal of said first comparator; and a counter, connected between said counting signal generating circuit and said selector, for changing a value thereof by receiving said counting signal, said selector selecting said one of said voltages in accordance with said value of said counter, so that said step-up voltage is brought close to said expected value.