Patent ID: 6735210
Filing Date: 2004-05-11
Classification: H04L

Abstract:
An electronic queuing system comprising:an input queue receiving and delivering buffer descriptors using a first in first out procedure, said input queue being implemented in a first type of electronic memory; an expansion queue receiving and delivering the buffer descriptors using a first in first out procedure; said expansion queue selectively receivable of the buffer descriptors from said input queue, said expansion queue using a second type of electronic memory; an output queue receiving and delivering the buffer descriptors up a first in first out procedure, said output queue selectively receivable of the buffer descriptors from said input queue and said expansion queue, said output queue using a third type of electronic memory, said second type of memory being denser than said first and third types of memory; control logic for monitor a load status of said input and output queues and selectively directing a flow of the buffer descriptors from said input queue to one of said expansion queue and said output queue, said control logic directing said flow of the buffer descriptors to said expansion queue when a load status of said input and output queues are above a predetermined load.