Patent ID: 9083889
Filing Date: 2015-07-14
Classification: H04N

Abstract:
1. A signal processing circuit, comprising: an amplifying circuit, for receiving an analog input signal and outputting a first analog signal by amplifying the analog input signal; a control circuit, for outputting a control signal according to the analog input signal; a sample-and-hold circuit, coupled to the amplifying circuit and the control circuit, for selectively adjusting a gain factor of the sample-and-hold circuit according to the control signal to thereby output a second analog signal according to the first analog signal and the gain factor, and outputting a third analog signal according to the first analog signal and a reference gain factor, wherein the sample-and-hold circuit outputs the second analog signal by sampling the first analog signal with the gain factor, and outputs the third analog signal by sampling the first analog signal with the reference gain factor regardless of a strength of the first analog signal; and a processing circuit, coupled to the sample-and-hold circuit, the processing circuit arranged for receiving the second analog signal and the third analog signal to generate an output signal.