Patent ID: 7450045
Filing Date: 2008-11-11
Classification: H03M

Abstract:
1. A Delta-Sigma analog-to-digital converter, comprising: a first integrating circuit, performing an integration process on the difference between a first input signal and a first feedback signal to generate a first integrated signal according to a first clock signal and a second clock signal, wherein the first feedback signal is an analog signal corresponding to a first digital output signal, and the first clock signal and the second clock signal are non-overlapping clock signals; a second integrating circuit, performing an integration process on the difference between a second input signal and a second feedback signal to generate a second integrated signal according to a third clock signal and a fourth clock signal, wherein the second feedback signal is an analog signal corresponding to a second digital output signal, and the third clock signal and the fourth clock signal are non-overlapping clock signals; a multiplexer, coupled to the first integrating circuit and the second integrating circuit, and outputting the first integrated signal or the second integrated signal according to a selecting signal; and a quantizer, coupled to the multiplexer, the first integrating circuit, and the second integrating circuit, wherein the quantizer respectively quantizes and latches the first integrated signal and the second integrated signal output by the multiplexer according to a first latch signal and a second latch signal, so as to generate the first digital output signal and the second digital output signal.