Patent ID: 7030796
Filing Date: 2006-04-18
Classification: G09G,H03M,H04N

Abstract:
1. An analog-to-digital converting apparatus for processing a plurality of analog input signals, the apparatus comprising: a clock signal generator that generates a clock signal with a predetermined frequency; a control signal generator that generates a switching control signal and buffer control signals using the clock signal using the clock signal; a multiplexer (MUX) that receives and selectively outputs the plurality of analog input signals according to the switching control signal; an analog-to-digital converter (ADC) that converts the analog input signal selected and output by the MUX to digital signals; a buffer memory that sequentially stores the digital signals according to the buffer control signal and corresponding to the analog signals input to the MUX, and sequentially outputs digital signals when the buffer memory is filled with data of the digital signals corresponding to all of the analog input signals; and a digital filter that multiplies each of the digital signals output by the buffer memory corresponding to a number of digital filter taps by predetermined tap coefficients to remove noise.