Patent ID: 7459785
Filing Date: 2008-12-02
Classification: H01L

Abstract:
1. An electrical structure, comprising: a substrate comprising a first electrically conductive pad and a second electrically conductive pad extending through a top surface of said substrate and formed within a volumetric portion of the substrate, wherein said top surface of said substrate is coplanar with a top surface of said first electrically conductive pad and a top surface of said second electrically conductive pad; a first dielectric layer over and in contact with said top surface of said substrate, said top surface of said first electrically conductive pad, and said top surface of said second electrically conductive pad; a first via and a second via in said first dielectric layer, said first via located over a portion of said top surface of said first electrically conductive pad, said second via located over a portion of said top surface of said second electrically conductive pad; a metallic layer over a surface of said first dielectric layer and within said first via and said second via; a second dielectric layer over a surface of said metallic layer, said second dielectric layer comprising a first portion removed from over and within said first via, a second portion removed from over and within said second via, and a third portion removed from between said first via and said second via; a ball limiting metallization layer formed within said first via and said second via, over a section of said surface of said metallic layer, and over a surface of said second dielectric layer; a first solder ball formed within and over said first via and extending laterally from said first via over and parallel to a first portion of a surface of said ball limiting metallization layer; and a second solder ball formed within and over said second via and extending laterally from said second via over and parallel to a second portion of said surface of said ball limiting metallization layer.