Patent ID: 8601352
Filing Date: 2013-12-03
Classification: G06F,H03M

Abstract:
1. A method for error correction coding, comprising: accepting a first definition of a mother Error Correction Code (ECC), which is represented by a set of parity check equations and comprises first code words, each first code word comprising one or more check symbols; accepting a second definition of a punctured ECC comprising second code words, which is derived from the mother ECC by removal of one or more of the parity check equations and removal of one or more punctured check symbols, selected from among the check symbols of the first code words; providing a mother decoder, which is designed to decode the first code words of the mother ECC by exchanging messages between symbol nodes and check nodes in accordance with a predefined interconnection scheme that represents the mother ECC; and decoding an input code word of the punctured ECC using the mother decoder by initializing one or more of the symbol nodes and controlling one or more of the exchanged messages responsively to the punctured ECC, and while retaining the predefined interconnection scheme representing the mother ECC; wherein controlling the exchanged messages comprises preventing the messages originating from one or more check nodes that correspond to the parity check equations that were removed from the mother code from affecting the symbol nodes.