Patent ID: 7405792
Filing Date: 2008-07-29
Classification: G02F

Abstract:
1. A method of manufacturing a reflective liquid crystal display device, comprising: providing a first substrate including a display region and a first non-display region, the first non-display region being disposed at a boundary of the display region; forming a plurality of gate lines and a plurality of data lines on the first substrate to cross each other including a gate pad and a data pad; forming a plurality of light shielding patterns at the first non-display region adjacent to a second non-display region, wherein the plurality of light shielding patterns are made of the same material as the gate pad and the data pad and the plurality of light shielding patterns are disposed on the same layer as one of the gate line and the data line; forming a retardation layer on the first substrate that converts linearly polarized light into circularly polarized light; forming a polarizing plate on the retardation layer; providing a second substrate facing and spaced apart from the first substrate, the second substrate including a third non-display region corresponding to the first non-display region; forming a light absorption layer on an inner surface of the second substrate; forming a metal bar at a portion of the first non-display region not adjacent to the second non-display region, wherein the metal bar is made of one material of the gate pad and the data pad; forming a cholesteric liquid crystal color filter (CCF) layer at the display region and the first non-display region on the light absorption layer; and forming a liquid crystal layer between the first substrate and the second substrate; wherein the plurality of light shielding patterns are formed at spaces between adjacent gate lines and between adjacent data lines, to overlap the gate and data lines within a range of about 1 μm to about 3 μm; and wherein the light shielding pattern adjacent to the gate pad is simultaneously formed with the data lines, and the light shielding pattern adjacent to the data pad is simultaneously formed with the gate lines.