Patent ID: 6413847
Filing Date: 2002-07-02
Classification: H01L

Abstract:
A method of forming a dummy metal pattern, used for manufacturing an interconnect pattern, the method comprising the steps of:providing a substrate; forming a first dielectric layer on the substrate; forming a first metal layer on the first dielectric layer; defining the first metal layer to form a plurality of first metal lines along a first direction, wherein the first metal lines are uniformly distributed on the substrate; breaking the first metal lines according to the interconnect pattern into a first metal pattern and a first dummy metal pattern that achieve a uniform pattern density on the substrate; forming a second dielectric layer on the metal lines and the first dielectric layer; defining the second dielectric layer in a manner to partially expose the first metal lines to form a plurality of via holes; forming a plurality of plugs in the via holes wherein the plugs and the second dielectric layer have a same surface level; forming a second metal layer on the second dielectric layer and the plugs; defining the second metal layer to form a plurality of second metal lines along a second direction, wherein the second metal lines are uniformly distributed; and breaking the second metal lines according to the interconnect pattern into a second metal pattern and a second dummy metal pattern that achieve a uniform pattern density on the substrate, the second metal pattern being electrically connected to the first metal pattern.