Patent ID: 6297094
Filing Date: 2001-10-02
Classification: H01L

Abstract:
A fabrication method of a semiconductor device, comprising the steps of:(a) defining a memory cell area in which nonvolatile memory cells are provided and a peripheral circuitry area in which a peripheral circuitry is provided on a single-crystal Si substrate;(b) forming gate electrodes of a first plurality of MOSFETs for said nonvolatile memory cells through gate insulating films in said memory cell area and gate electrodes of a second plurality of MOSFETs for said peripheral circuitry through gate insulating films in said peripheral circuitry area;said gate electrodes of said first plurality of MOSFETs being equipped with floating gates for data storing;(c) forming dielectric sidewall spacers on said substrate at each side of said gate electrodes of said first plurality of MOSFETs in said memory cell area and said gate electrodes of said second plurality of MOSFETs in said peripheral circuitry area;(d) selectively ion-implanting a first impurity into said substrate to form source/drain regions of said first plurality of MOSFETs in said memory cell area and source/drain regions of said second plurality of MOSFETs in said peripheral circuitry area using said sidewall spacers and said gate electrodes of said first and second pluralities of MOSFETs as a mask;said source/drain regions of said second plurality of MOSFETs being lower in doping concentration than said source/drain regions of said first plurality of MOSFETs;(e) forming a first refractory metal film to cover said first and second pluralities of MOSFETs;(f) forming a silicide film on said source/drain regions of said second plurality of MOSFETs by a silicidation reaction of said first refractory metal film with said source/drain regions of said second plurality of MOSFETs;substantially no silicide film being formed on said source/drain regions of said first plurality of MOSFETs in this step (f); and(g) removing said unreacted refractory metal film.