Patent ID: 7202522
Filing Date: 2007-04-10
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a one time programmable (OTP) cell region and a main chip region; a floating gate of an OTP cell transistor in the OTP cell region formed on a first gate insulating film; first insulating spacers that cover sidewalls of the floating gate; a gate of a transistor in the main chip region on the substrate formed on a second gate insulating film; second insulating spacers that cover sidewalls of the gate; a plasma enhanced oxide (PEOX) film that covers the floating gate and the first insulating spacers in a close state and covers the gate and the second insulating spacers by a predetermined distance, wherein the PEOX film has a thickness in a range of 500˜1,000 Å; and a silicon oxy nitride (SiON) film interposed between the gate and the PEOX film in the main chip region.