Patent ID: 7786534
Filing Date: 2010-08-31
Classification: H01L

Abstract:
1. A semiconductor device comprising a semiconductor supporting substrate, an insulation film layer formed on said semiconductor supporting substrate and a transistor formed on a semiconductor layer formed on said insulation film layer, comprising: an isolation oxide film formed in said semiconductor layer; a plurality of interlayer insulation films formed on said semiconductor layer and said isolation oxide film; a plurality of wiring layers formed on said plurality of interlayer insulation films; a plurality of conductive layers connecting said semiconductor supporting substrate and said plurality of wiring layers and fixing a potential of said semiconductor supporting substrate, and a plurality of said conductive layers connecting said semiconductor supporting substrate and an uppermost wiring layer, wherein a plurality of said conductive layers and said plurality of wiring layers are formed around a periphery of a region in which said transistor is to be formed; a plurality of said conductive layers and a plurality of said wiring layers are separated from each other in the same layer, and connect said semiconductor supporting substrate and an uppermost wiring layer, a first opening extends through said isolation oxide film, said semiconductor layer and said insulation film layer to reach said semiconductor supporting substrate; a second opening extends through inside of said first opening; a conductive layer filling said second opening extends through a first interlayer insulation film formed on said semiconductor layer and said isolation oxide film to reach said semiconductor supporting substrate; and a wiring layer is connected to said conductive layer.