Patent ID: 7981708
Filing Date: 2011-07-19
Classification: H01L

Abstract:
1. A method of fabricating a pixel structure on a substrate, comprising: forming a gate electrode on the substrate; forming a dielectric layer to cover the gate electrode and the substrate; forming a patterned metal oxide semiconductor layer and a patterned metallic etching stop layer on the dielectric layer above the gate electrode, wherein the patterned metallic etching stop layer is stacked on the patterned metal oxide semiconductor layer and the metallic etching stop layer is made of a metallic material; forming a first conductive layer to cover the patterned metallic etching stop layer and the dielectric layer; patterning the first conductive layer by using the patterned metallic etching stop layer as an etching stop layer to form a source and a drain; forming a second conductive layer to cover the source, the drain and the dielectric layer; patterning the second conductive layer by using the patterned metallic etching stop layer as an etching stop layer to form a first electrode layer; and removing a portion of the patterned metallic etching stop layer exposed between the source and the drain.