Patent ID: 6271582
Filing Date: 2001-08-07
Classification: H01L,Y10T

Abstract:
An integrated circuit package comprising:an integrated circuit die having a front-side surface with a plurality of bond pads thereon, said integrated circuit die having a first edge and an opposing second edge, having at least one bond pad said plurality of bond pads located on the front-side surface adjacent the first edge, and having at least one bond pad of said plurality of bond pads located on the front-side surface adjacent the opposing second edge;a Leads-Over-Chip (LOC) lead frame including a plurality of interdigitated leads for overlying the front-side surface of the integrated circuit die with a first portion of the plurality of interdigitated leads extending across from substantially the first edge of the integrated circuit die to substantially the at least one bond pad located adjacent the opposing second edge of the integrated circuit die terminating at a location on the front-side surface of said integrated circuit die adjacent and before the at least one bond pad adjacent the opposing second edge and a second portion of the plurality of interdigitated leads extending across from substantially the opposing second edge of the integrated circuit die to substantially the at least one bond pad located adjacent the first edge of the integrated circuit die terminating at a location on the front-side surface of said integrated circuit die adjacent and before the at least one bond pad adjacent the first edge, said first portion of the plurality of interdigitated leads being interdigitated with said second portion of the plurality of interdigitatrd leads, each bond pad of the plurality on the front-side surface being alternatively coupleable via an electrical connection extending only over the front-side surface to adjacent leads of the first and second portions of the plurality of interdigitated leads; anda piece of tape overlying a portion of said front-side surface of said integrated circuit die, said piece of tape located between said integrate circuit die and said LOC lead frame for securing said integrated circuit die to said LOC lead frame.