Patent ID: 8742827
Filing Date: 2014-06-03
Classification: H03K

Abstract:
1. An integrated circuit comprising: a functional circuit; a power supply conductor for said functional circuit; at least one power gating transistor having a source terminal coupled to said power supply conductor, a drain terminal coupled to said functional circuit, and a gate terminal, said at least one power gating transistor having a saturation current; a switching device coupled to said gate terminal via a resistive element, said switching device being configured to apply a gate drive voltage to said gate terminal via said resistive element, an amount of current passed by said at least one power gating transistor being dependent on said gate drive voltage; wherein: said at least one power gating transistor is configured to provide a Miller capacitance between said drain terminal and said gate terminal; and said Miller capacitance, a resistance of said resistive element, and a drive strength of said switching device are configured such that, in response to said switching device switching said gate drive voltage to allow more current to pass through said at least one power gating transistor, said Miller capacitance provides a feedback mechanism competing against said switching device to reduce a slew rate of said gate drive voltage such that said current passing between said power supply conductor and said functional circuit through said at least one power gating transistor is less than said saturation current of said at least one power gating transistor, wherein said switching device comprises a first transistor for pulling said gate drive voltage to a power off level and a second transistor for pulling said gate drive voltage to a power on level, said second transistor having a lower drive strength than said first transistor.