Patent ID: 6503777
Filing Date: 2003-01-07
Classification: H01L,H05K

Abstract:
A method for forming a package for an integrated circuit, the method-comprising:forming a first pocket in a first side of an interposer; forming a second pocket in a second side of the interposer; tracing an interconnect in the interposer such that a deflectable portion of the interconnect extends over a portion of the first pocket forming a plurality of cantilevers, wherein at least one cantilever is longer than another cantilever; affixing an integrated circuit to the first side of the interposer such that a solder bump attached to the integrated circuit deflects the cantilevers into the first pocket; at least partially absorbing the cantilevers into the solder bump; and affixing a solder ball at least partially within the second pocket, wherein the solder ball electrically connects to the interconnect.