Patent ID: 6622255
Filing Date: 2003-09-16
Classification: G06F,H03D,H03K,H03L

Abstract:
An article of manufacture comprising:a skew measure circuit to assert (1) a first output signal if a first digital input clock signal leads a second digital input clock signal, and (2) a second output signal if the second digital input clock signal leads the first digital input clock signal; an exclusion circuit coupled to the skew measure circuit, to (1) provide first and second digital pulse signals that are representative of the first and second output signals and (2) prevent the states of the first and second digital pulse signals from changing so long as the skew measure circuit is experiencing metastability; and a first up/down counter to provide a first count that is (1) incremented in response to the first digital pulse signal, and (2) decremented in response to the second digital pulse signal.