Patent ID: 7888205
Filing Date: 2011-02-15
Classification: H01L

Abstract:
1. A method for forming a monolithic three dimensional device, the method comprising: depositing a first semiconductor material layer above a substrate, wherein the first semiconductor material layer is amorphous as deposited and comprises silicon-germanium alloy; forming a first plurality of field effect transistors, each first field effect transistor having a first channel region comprising a portion of the first layer of semiconductor material; depositing a second semiconductor material layer above the first field effect transistors, wherein, when the second semiconductor material layer is deposited, the first layer of semiconductor material remains predominantly amorphous; and forming a second plurality of field effect transistors, each second field effect transistor having a second channel region comprising a portion of the second layer of semiconductor material; wherein: the step of forming the first plurality of field effect transistors comprises growing an oxide layer between the first channel region and a gate electrode of the first plurality of field effect transistors transistor, and depositing a high-k dielectric layer having a dielectric constant greater than 8 on and in contact with the oxide layer.