Patent ID: 8893267
Filing Date: 2014-11-18
Classification: G06F

Abstract:
1. A system, comprising: a configuration processor; a partitioning microcontroller configured for generating a mapping table comprising a register, the register cross-referencing a destination address with a domain ID, where the domain ID is associated with a corresponding processor; an interface configured for accepting an access request to an accessible resource from a processor, the access request comprising an access request domain ID and a destination address, wherein the configuration processor reassigns the access request to another processor, the other processor being selected based on cross referencing the access request destination address and the access request domain ID; and a partition master configured for accessing the destination address associated with the access request domain ID specified in the access request, and authorizing the access request in response to the access request destination address matching the destination address in the mapping table, wherein the interface is further configured for sending the authorized access request to the destination address of the requested resource.