Patent ID: 7314822
Filing Date: 2008-01-01
Classification: H01L

Abstract:
1. A method for forming a stacked local interconnect in a semiconductor substrate having a plurality of features formed thereon, at least one feature of the plurality of features being an electrical contact, having at least one etch stop layer on at least a portion of the surface of the semiconductor substrate, and having a passivation layer covering at least a portion of the at least one etch stop layer and covering at least a portion of the electrical contact, the method comprising: forming a first local interconnect; etching through at least a portion of the passivation layer using a self-aligned contact etching process for exposing the electrical contact through the at least a portion of the passivation layer; forming a second local interconnect electrically connecting a first group of features included within the plurality of features while electrically connecting the second local interconnect to the stacked local interconnect during the forming thereof; and forming a third local interconnect electrically connected to the first local interconnect and at least one feature of the plurality of features.