Patent ID: 8144142
Filing Date: 2012-03-27
Classification: G09G

Abstract:
1. A drive circuit for supplying a driving pulse to a capacitive load including a display element of a plasma display panel through a pulse supply path, comprising: a first voltage source that supplies a first voltage to raise said driving pulse; a second voltage source that supplies a second voltage lower than said first voltage to lower said driving pulse; a first switching element having one end receiving the first voltage from said first voltage source; a second switching element having one end receiving the second voltage from said second voltage source; a first interconnection having one end connected to the other end of said first switching element and the other end connected to said pulse supply path; a second interconnection having one end connected to the other end of said second switching element and the other end connected to said pulse supply path; a first impedance control circuit connected in parallel with said first switching element between the one end and the other end of said first switching element; and a second impedance control circuit connected in parallel with said second switching element between the one end and the other end of said second switching element, wherein said first and second switching elements operate to apply the driving pulse to said capacitive load in a sustain time period during which said display element is lightened, said first impedance control circuit includes a plurality of first capacitive elements connected in parallel with said first switching element, said second impedance control circuit includes a plurality of second capacitive elements connected in parallel with said second switching element, each of said plurality of first capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in said plurality of first capacitive elements differ from one another, each of said plurality of second capacitive elements includes a capacitance component and an inductance component, and the values of the capacitance components in said plurality of second capacitive elements differ from one another, the values of the capacitance components in said plurality of first capacitive elements are set such that a plurality of peak frequencies of switching noises generated by said first switching element are not positioned within an anti-resonance frequency band of a parallel circuit of said plurality of first capacitive elements, and the values of the capacitance components in said plurality of second capacitive elements are set such that a plurality of peak frequencies of switching noises generated by said second switching element are not positioned within an anti-resonance frequency band of a parallel circuit of said plurality of second capacitive elements.