Patent ID: 6794233
Filing Date: 2004-09-21
Classification: H01L

Abstract:
A method of fabricating a MOSFET comprising:forming a polysilicon gate electrode on a semiconductor substrate; forming a first doping layer on an area of the semiconductor substrate, the area including the polysilicon gate electrode; implanting dopant into the first doping layer by means of a high-tilt angle pocket ion implantation; forming LDD regions on a surface of the semiconductor substrate at two sides of the polysilicon gate electrode by diffusing the dopant of the first doping layer into the semiconductor substrate; forming an insulating layer on the first doping layer by diffusing the dopant of the first doping layer into the semiconductor substrate; forming a spacer by etching the insulating layer and the first doping layer; forming a second doping layer on the semiconductor substrate and the polysilicon gate electrode with the spacer; and forming a source region and a drain region on a surface of the semiconductor substrate at both sides of the polysilicon gate electrode with the spacer by conducting a thermal treatment process so that the dopant of the second doping layer is diffused into the semiconductor substrate.