Patent ID: 6662289
Filing Date: 2003-12-09
Classification: G06F

Abstract:
A memory system for converting virtual addresses into physical addresses at the user code level and conveying the physical addresses to a peripheral device, the system comprising:a virtual memory having memory pages, each memory page having a virtual memory address and a corresponding physical memory address in a main memory; a microprocessor having a translation look-aside buffer which holds a subset of the virtual addresses for all the pages and their corresponding physical memory addresses in the main memory; and a set of user-code level software instructions stored in said main memory and executable by said microprocessor for converting a virtual memory address into the corresponding physical memory address, pinning the page, and conveying the physical memory address to the peripheral device at a user code level without requiring a system call and wherein the set of user level software instructions includes instructions for: incrementing a per-process pin page counter each time a new page is first pinned by a same process; and incrementing a system wide pin page counter, each time a new page is first pinned by any process within the system.