Patent ID: 6496940
Filing Date: 2002-12-17
Classification: G01R,G06F,H04L

Abstract:
A multiple processing system, comprising:N central processing units where N is an integer greater than or equal to 3, each central processing unit comprising a plurality of processors; a plurality of input/output devices; and a network interconnecting each of the N central processing units and the input/output devices so that any one of the N central processing units has separate and independent communicative access to any one of the input/output devices, the network further providing interprocessor communication between the N central processing units, the network including a plurality of routing devices, at least one of the routing devices synchronizing communications for one of the central processing units to enable lockstep operation within said one of the central processing units; whereby operational tasks of a failed one of the N central processing units employing a one of the input/output devices are performed by any of the other N central processing units including employment of the one of the input/output devices.