Patent ID: 8191247
Filing Date: 2012-06-05
Classification: H01L,Y10T

Abstract:
1. A method of manufacturing an electronic board, comprising: forming a substrate on which is formed an electronic circuit having a connection terminal; forming a stress-relaxation layer on a substrate; forming a first electrode, the first electrode disposed between the substrate and the stress-relaxation layer; forming a second electrode, the second electrode disposed at a top side of the stress-relaxation layer; arranging a dielectric material layer on the substrate, the dielectric material disposed between the first electrode and the second electrode; forming a corrugated surface on at least one of the stress-relaxation layer and the dielectric material layer, the corrugated surface being adjacent to the first electrode and/or the second electrode; and forming rearrangement wiring for the connection terminal, the rearrangement wiring disposed at the top side of the stress-relaxation layer.