Patent ID: 6956265
Filing Date: 2005-10-18
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate including an SOI region where a first insulating film is buried, and a non-SOI region, said semiconductor substrate being provided with a boundary region formed between said SOI region and said non-SOI region and having a second insulating film buried therein, said second insulating film being inclined upward from the SOI region side toward the non-SOI region side, said second insulating film having a thickness which is smaller than the thickness of said first insulating film and being tapered from the SOI region side to the non-SOI region side; a pair of element isolating insulating regions separately formed in said non-SOI region of semiconductor substrate and defining element regions; a pair of impurity diffusion regions formed in said element regions and in contact with said element isolating insulating regions, respectively; and a gate electrode formed via a gate insulating film in the element region of said semiconductor substrate.