Patent ID: 6134697
Filing Date: 2000-10-17
Classification: H04N

Abstract:
A traceback processor of a survivor memory unit for use in a trellis-coded modulation decoder, wherein the survivor memory unit includes a data delay processor and the traceback processor, the data delay processor provides determination vectors in parallel and the traceback processor selectively provides one of an N1 and an N2 state mode decoded symbols during M number of CONTROL signals, a decoding depth corresponding to the N1 state mode decoded symbol being D1, a decoding depth corresponding to the N2 state mode decoded symbol being D2, N1 being a positive integer, N2 being an integer larger than N1, D1 being a positive integer, D2 being an integer larger than D1 and M being an integer larger than D2, the traceback processor comprising:a first traceback module, based on an ith CONTROL signal, for sequentially selecting an ith determination vector, iteratively calculating an N1 state mode ith previous state by using an N1 state mode (i-1)st previous state mode and the ith determination vector and an N2 state mode ith previous state by using an N2 state mode (i-1)st previous state and the ith determination vector, and providing one of an N1 state mode (D1-1)st previous state and an N2 state mode (D2-1)st previous state, based on a mode selection signal, wherein i being an integer ranging from 1 to (D1-1) and a 0th previous state being an arbitrary state;a second traceback module, based on a (D1)th CONTROL signal, for providing the N1 state mode decoded symbol and a N2 state mode (D1)th previous state, by using the (D1-1)st previous state from the first traceback module and the (D1)th determination vector;a third traceback module, based on a jth CONTROL signal, for sequentially selecting the jth determination vector, iteratively calculating the N2 state mode jth previous state by using the (j-1)st previous state and the jth determination vector, and providing a N2 state mode (D2-1)st previous state, j being an integer ranging from (D1+1) to (D2-1);a fourth traceback module, based on a (D2)th CONTROL signal, for providing the N2 state mode decoded symbol by using the N2 state mode (D2-1)st previous state and a (D2)th determination vector; anda first mode selector, based on the mode selection signal, for selectively providing one of the N1 state mode decoded symbol from the second traceback module and the N2 state mode decoded symbol from the fourth traceback module.