Patent ID: 6414374
Filing Date: 2002-07-02
Classification: H01L

Abstract:
A semiconductor die, comprising:an active surface; a first layer comprising protective material over said active surface; a plurality of peripheral edges, at least one peripheral edge of said plurality of peripheral edges including at least one disconnected notch formed in at least a portion thereof, said at least one disconnected notch extending from a portion of said active surface of the semiconductor die and terminating at said at least one peripheral edge; at least one circuit trace traversing a portion of said first layer to said at least one disconnected notch; at least one bond pad disposed at least partially on said at least one circuit trace and forming a connector for mounting the semiconductor die nonparallel relative to a substrate with said at least one bond pad contacting a portion of said substrate; and a second layer comprising protective material covering at least a portion of said first layer and at least a portion of said at least one circuit trace.