Patent ID: 7838398
Filing Date: 2010-11-23
Classification: C23C,C30B,H01L,Y10T

Abstract:
1. A method for producing epitaxially coated semiconductor wafers, in which a multiplicity of prepared semiconductor wafers polished at least on their front sides are provided and successively coated individually by applying an epitaxial layer onto their polished front sides by chemical vapor deposition at temperatures of 800-1200° C. in a deposition reactor, comprising supporting a prepared semiconductor wafer to be epitaxially coated on a ring positioned between a susceptor and the semiconductor wafer which acts as a thermal buffer between the susceptor and the supported semiconductor wafer such that the semiconductor wafer rests on the ring, its backside faces a bottom of the susceptor having a gas-permeable structure but its backside does not touch the susceptor, such that gaseous substances are delivered from a region over the backside of the semiconductor wafer by gas diffusion through the susceptor into a region over the backside of the susceptor, the semiconductor wafer contacting the ring only in an edge region of the wafer backside, wherein the epitaxially coated semiconductor wafer comprises a front side and a backside, and is provided on its front side with an epitaxial layer that is free from stresses measurable by photoelastic stress measurement (“SIRD”) and which has a nanotopography on its backside, expressed as PV height variation of greater than or equal to 2 nm and less than or equal to 5 nm based on square measurement windows with an area of 2 mm×2 mm and a backside “halo” expressed as haze of greater than or equal to 0.1 ppm and less than or equal to 5 ppm.