Patent ID: 6908860
Filing Date: 2005-06-21
Classification: B23H,B24B,C25F,H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: a process for providing the semiconductor device and a dielectric film on one surface of a semiconductor substrate beforehand, providing an opening to the dielectric film and sequentially forming an electric conductor plug connected to an electrode of the semiconductor device, and a process for forming an upper interconnection layer connected to the electric conductor plug over the semiconductor substrate, wherein: the process for forming the upper interconnection layer over the semiconductor substrate includes following four steps comprising: first step for forming a low-dielectric constant dielectric film on the semiconductor substrate on which the electric conductor plug is formed, second step for forming an open trench for forming wiring in the low-dielectric constant dielectric film, third step for forming a first conductive film to be a barrier layer in the open trench and on the surface of the low-dielectric constant dielectric film and forming a second conductive film to be the upper interconnection layer on the first conductive film, and fourth step for removing a part of the second conductive film and a part of the first conductive film respectively formed on the semiconductor substrate by a processing apparatus for planarization provided with processing means for electro polishing and burying the first conductive film and the second conductive film in the open trench, wherein: the fourth step includes a first substep for detecting, by an image detector, a position of an area where a residue of polishing of at least the second conductive film remains, except the open trench, and a second substep for locally removing the residue of polishing based upon an image information detected by the image detector, wherein: the second substep uses the processing means for electro polishing having an electrolytic tool which includes a plurality of a pair of unit electrodes, and selectively applies a voltage to a part of the pair of unit electrodes according to the image information, and wherein: the pair of unit electrodes includes a plus electrode and a minus electrode, and one electrode of the pair of Unit electrodes surrounds the other electrode of the pair of unit electrodes at a predetermined interval.