Patent ID: 8039364
Filing Date: 2011-10-18
Classification: B28D,H01L

Abstract:
1. A manufacturing method of a semiconductor device, comprising: sequentially laminating an adhesive layer of which thickness is over 25 μm and a dicing tape on a rear surface of a semiconductor wafer having plural element regions, wherein the adhesive layer has a room temperature modulus of elasticity before curing in a range of not less than 100 MPa nor more than 3000 MPa; cutting a part of the semiconductor wafer in accordance with the plural element regions by using a first blade of which cutting depth is within the semiconductor wafer and does not reach the adhesive layer; cutting the semiconductor wafer together with a part of the adhesive layer having the room temperature modulus of elasticity in a range of not less than 100 MPa nor more than 3000 MPa by using a second blade of which cutting depth reaches the adhesive layer and does not reach the dicing tape, and having a narrower width than the first blade; cutting the adhesive layer having the room temperature modulus of elasticity in a range of not less than 100 MPa nor more than 3000 MPa together with a part of the dicing tape by using a third blade of which cutting depth reaches the dicing tape and having a narrower width than the second blade; picking up a semiconductor element sectioned by cutting the semiconductor wafer with the adhesive layer, from the dicing tape; and adhering the picked up semiconductor element on a device constructing base via the adhesive layer laminated on a rear surface of the semiconductor element.