Patent ID: 6339349
Filing Date: 2002-01-15
Classification: H03K

Abstract:
A circuit for generating a ramped voltage signal having controlled maximum amplitude without use of a comparator, said circuit including:output circuitry, including an output capacitor having a first plate at a first node and charging circuitry coupled to the first node, wherein the charging circuitry has an input coupled to receive a clock signal and is configured to charge and discharge the output capacitor periodically in response to the clock signal to produce the ramped voltage signal across said output capacitor; supplemental charge current circuitry having a first input coupled to receive a reference signal whose level is indicative of a preselected maximum amplitude for the ramped voltage signal, a second input which receives a feedback signal indicative of the ramped voltage signal, and an output coupled to the first node, wherein the supplemental charge current circuitry is configured to cause a charge rate adjustment current to flow from the output to the first node, the charge rate adjustment current having a magnitude indicative of the difference between the level of the reference signal and a sampled level of the feedback signal, whereby the charge rate adjustment current corrects the amplitude of the ramped voltage signal during charging of the output capacitor to cause the maximum amplitude of the ramped voltage signal to converge to the preselected maximum amplitude; and comparator-less clock signal generation circuitry coupled to the output circuitry and configured to generate the clock signal and assert said clock signal to the output circuitry.