Patent ID: 6461937
Filing Date: 2002-10-08
Classification: H01L

Abstract:
A method of forming a trench isolation region, comprising the steps of:forming a semiconductor substrate having a trench therein and a masking layer thereon extending adjacent the trench; forming a first recess-inhibiting layer on a sidewall of the trench and on a sidewall of the masking layer; forming a first stress-relief layer on the first recess-inhibiting layer, said first stress-relief layer extending opposite the sidewall of the trench and opposite the sidewall of the masking layer, wherein said forming a first stress-relief layer includes forming a silicon layer on the sidewall of the trench and on the sidewall of the masking layer, and converting the silicon layer into a silicon dioxide layer by oxidizing the silicon layer; forming a trench isolation layer on the first stress-relief layer; and removing at least a portion of the masking layer using a first etchant that selectively etches the masking layer and the first stress-relief layer at faster rates than the first recess-inhibiting layer.