Patent ID: 8999802
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: forming a gate stack on a substrate, wherein the gate stack comprises a gate dielectric layer and a gate conductor layer, wherein sidewalls of the gate dielectric layer are aligned with side walls of the gate conductor layer; performing tilted ion implantation at least partially via the gate dielectric layer; selectively etching end portions of the gate dielectric layer to form gaps so as to recess side walls of the gate dielectric layer with respect to respective side walls of the gate conductor layer; and filling a material for the gate dielectric layer into the gaps, wherein filling the material for the gate dielectric layer into the gaps comprises depositing the material and then etching it back, wherein portions of the material on side walls of the gate stack are reserved during the process of etching back to serve as a first spacer for the gate stack.