Patent ID: 7096137
Filing Date: 2006-08-22
Classification: B41J,G06F,H03K,H04N,Y10S,Y10T

Abstract:
1. An integrated circuit, comprising a processor, an onboard system clock for generating a clock signal, and clock trim circuitry, the integrated circuit being configured to: (a) receive an external signal; (b) determine either the number of cycles of the clock signal during a predetermined number of cycles of the external signal, or the number of cycles of the external signal during a predetermined number of cycles of the clock signal; (c) output the result of the determination of step (b) to an external source; (d) receive a trim value from the external source; (e) store the trim value in the integrated circuit, the trim value having been determined on the basis of the determined number of cycles; (f) use the trim value to control the internal clock frequency.