Patent ID: 7196376
Filing Date: 2007-03-27
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a processed substrate having a conductive layer of a first conductivity type; a base region of a second conductivity type formed at an inner surface of the conductive layer; a gate groove formed in a position in which the base region of the conductive layer is provided, wherein the gate groove with a bottom position thereof is formed deeper than a bottom surface of the base region; a gate insulating film provided at a side surface of the gate groove; a gate electrode plug provided inside the gate groove and being in contact with the gate insulating film; a source region of the first conductivity type provided in a position in contact with the gate insulating film within the base region, the source region being separated from the conductive layer by the base region; an embedded region of the second conductivity type provided in a position below the gate groove and being insulated from the gate electrode plug; a source electrode film in contact with the source region; and an active groove filled region of the second conductivity type in contact with the embedded region and electrically shorted with the source electrode film, wherein the gate groove is formed narrow, and the active groove filled region is provided at both ends in a longitudinal direction thereof.