Patent ID: 8213195
Filing Date: 2012-07-03
Classification: H02M

Abstract:
1. A pulse width modulation (PWM) step wave and sine wave driving device, adapted for receiving input signals, and generating driving signals for driving an external electric device, the input signals comprising an input voltage signal, an input current signal, and a system power supply frequency signal, wherein the input voltage signal and the input current signal are generated by the external electric device, and the system power supply frequency signal represents a frequency of a system power supply, the driving signals comprising a first driving signal, a second driving signal, a third driving signal, and a fourth driving signal, the driving device are adapted for working under a step wave operation mode and a sine wave operation mode, the driving device comprising: a register unit, containing a plurality of parameters saved therein, for setting the operation of the driving device, wherein the parameters comprise an operation mode selection parameter, a first dead time parameter, a first half period time parameter, a root mean square (RMS) voltage parameter of the system power supply, a second dead time parameter, a second half period time parameter, and a predetermined frequency parameter, for respectively determining to select one from the sine wave operation mode and the step wave operation mode, and setting a first dead time, a first half period time, an RMS voltage of the system power supply, a second dead time, a second half period time, and a predetermined frequency; an analog-to-digital converter (ADC) unit, receiving the input voltage signal and the input current signal, and conducting an analog-to-digital conversion operation on the received input voltage signal and input current signal according to a conversion initial signal, wherein when the analog-to-digital conversion operation is completed, the ADC unit generates a conversion completion signal and a conversion input signal; an input processing unit, generating and outputting the conversion initial signal, for informing the ADC unit to start the analog-to-digital conversion operation, wherein when the input processing unit receives conversion completion signal from the ADC unit, the input processing unit outputs the conversion input signal to a conversion output signal; a first pulse width calculation unit, receiving the conversion output signal from the input processing unit, and generating a first pulse width, a first dead time, and first low level time according to the first pulse width parameter , the first dead time parameter, the first half period time parameter, the RMS voltage parameter of the system power supply; a first output unit, receiving the first pulse width, the first dead time, and the first low level time from the first pulse width calculation unit, for generating a first step wave driving signal, a second step wave driving signal, a third step wave driving signal, and a fourth step wave driving signal; a second pulse width calculation unit, receiving the conversion output signal from the input processing unit, and generating a second pulse width, a second dead time, and a second low lever time according to the second pulse width parameter, the second dead time parameter, the second half period time parameter, the RMS voltage parameter of the power supply; a second output unit, for receiving the second pulse width, the second dead time, and the second low level time from the second pulse width calculation unit, for generating a first sine wave driving signal, a second sine wave driving signal, a third sine wave driving signal, and a fourth sine waved driving signal; a multiplexer output unit, comprising a low pass filter unit, receiving the first step wave driving signal, the second step wave driving signal, the third step wave driving signal, and the fourth step wave driving signal from the first output unit, and receiving the first sine wave driving signal, the second sine wave driving signal, the third sine wave driving signal, and the fourth sine wave driving signal from the second output unit, and generating the first driving signal, the second driving signal, the third driving signal, and the fourth driving signal according to the parameters saved in the register unit; and a zero point detecting unit, receiving the system power supply frequency signal, and generating a zero point detecting signal for indicating the time point where the voltage of the system power supply is zero, wherein the first output unit and the second output unit receive the zero point detecting signal from the zero point detecting unit, for determining whether or not the system power supply is in an abnormal condition, wherein when the system power supply is determined as in an abnormal condition, the first output unit and the second output unit set a predetermined frequency according to the predetermined frequency parameter saved in the register unit, wherein the first output unit generates the first step wave driving signal, the second step wave driving signal, the third step wave driving signal, and the fourth step wave driving signal corresponding to the predetermined frequency, and the second output unit generate the first sine wave driving signal, the second sine wave driving signal, the third sine wave driving signal, and the fourth sine wave driving signal corresponding to the predetermined frequency.