Patent ID: 8081243
Filing Date: 2011-12-20
Classification: H04N

Abstract:
1. A correlated double sampling (CDS) circuit, having an input terminal, a first output terminal and a second output terminal, comprising: a first sampling-and-holding unit, coupled to the input terminal, configured to sample or hold a sensed signal according to a first control signal; a second sampling-and-holding unit, coupled to the input terminal, configured to sample or hold a reset signal according to a second control signal; a first level-shifting unit, coupled to the first sampling-and-holding unit, configured to shift a level of an output voltage of the first sampling-and-holding unit according to at least one level control signal; a second level-shifting unit, coupled to the second sampling-and-holding unit, configured to shift a level of an output voltage of the second sampling-and-holding unit according to the level control signal; a first buffer, coupled between the first level-shifting unit and the first output terminal, for buffering an output of the first level-shifting unit; and a second buffer, coupled between the second level-shifting unit and the second output terminal, for buffering an output of the second level-shifting unit.