Patent ID: 9029913
Filing Date: 2015-05-12
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: forming a stack including, from bottom to top, a first silicon-germanium alloy layer, a silicon layer overlying a portion of said first silicon-germanium alloy layer, and a second silicon-germanium alloy layer on a semiconductor substrate; patterning said stack and an upper portion of said semiconductor substrate to foam a fin stack structure having a pair of substantially vertical sidewalls, said fin stack structure including, from bottom to top, a protruding semiconductor portion derived from said upper portion of said semiconductor substrate, a silicon-germanium alloy portion, a silicon portion, and a silicon-germanium alloy fin; forming a shallow trench isolation structure comprising a dielectric material and laterally surrounding said protruding semiconductor portion and a lower portion of said silicon-germanium alloy portion; forming a dielectric spacer that contacts all sidewall surfaces of said silicon-germanium alloy fin; and forming a cavity underneath said silicon portion by removing said silicon-germanium alloy portion selective to said silicon portion while said dielectric spacer prevents etching of said silicon-germanium alloy fin; and physically exposing a bottom surface of said silicon-germanium alloy fin by removing said silicon portion, wherein said cavity is vertically expanded.