Patent ID: 8263492
Filing Date: 2012-09-11
Classification: H01L

Abstract:
1. A method for forming a via in a portion of a semiconductor wafer comprising a substrate, the method comprising the steps of: forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, wherein the trench extends through the substrate; forming a hole through the substrate within the first part; and forming a first metal within the hole, wherein the first metal extends from a front surface of the substrate to a back surface of the substrate, and wherein the via comprises the hole and the first metal; forming a second metal within the trench, wherein the forming of the first metal and the forming of the second metal comprise: forming metal plating at least within the hole and the trench; and etching the metal plating, wherein, after the etching, the metal plating is discontinuous from a first interior wall of the trench to a second interior wall of the trench, wherein the second interior wall is closer to the hole than the first interior wall; wherein the etching of the metal plating comprises: a first electro-etching operation that removes at least a portion of the metal plating adjacent to at least a portion of a bottom surface of the trench; a reactive-ion etching operation that removes at least a portion of a seed layer adjacent to the at least a portion of the bottom surface of the trench, and electrically decouples the first metal from that portion of the second metal formed on the first interior wall of the trench; and a second electro-etching operation that removes at least the portion of the second metal formed on the first interior wall of the trench.