Patent ID: 6219118
Filing Date: 2001-04-17
Classification: G02F,H01L

Abstract:
A display device comprising:a substrate;a plurality of parallel source lines and a plurality of parallel gate lines formed over said substrate, said source line and gate lines being arranged relative to one another to form a matrix of pixel regions over said substrate with each of said pixel regions bounded by two adjacent source lines and two adjacent gate lines;a plurality of thin film transistors formed on said substrate, at least one thin film transistor disposed at each intersection of said source lines and gate lines in each of said pixel regions;a first interlayer insulating film formed over said thin film transistors;a black matrix comprising a light shielding electrode formed on said first interlayer insulating film and configured to have a matrix pattern with respect to said matrix of pixel regions, said light shielding electrode disposed to cover completely said source lines and said gate lines and to leave exposed a portion of each of said pixel regions;a second interlayer insulating film formed on said light shielding electrode;a pixel electrode disposed in each of said pixel regions on said second interlayer insulating film, wherein a periphery of said pixel electrode overlaps with said light shielding electrode to form an auxiliary capacitor with said light shielding electrode, said second interlayer insulating film and said pixel electrode; anda counter electrode in electrical communication with said light shielding electrode, wherein said light shielding electrode is electrically connected to a same potential as the counter electrode, said.