Patent ID: 6101594
Filing Date: 2000-08-08
Classification: G06F

Abstract:
A method for processing data in a microprocessor system, comprising the steps of:fetching a plurality of instructions from a source of instructions according to a specified, sequential program order;temporarily storing said plurality of instructions into a first in first out (FIFO) buffer, wherein said FIFO buffer holds at least two of said plurality of instructions;concurrently decoding and dispatching a plurality of said buffered instructions for execution;issuing more than one of said dispatched instructions for execution, out of said specified, sequential program order, wherein each of said instructions is to be executed by a separate one of a plurality of functional units;executing said more than one of said issued instructions out of said specified, sequential program order thereby producing execution results;storing out-of-order execution results in temporary registers; andretiring said executed instructions according to said specified, sequential program order by storing results from said temporary registers to a register array.