Patent ID: 6266378
Filing Date: 2001-07-24
Classification: G11B

Abstract:
A data detector comprising:a converter for converting received data into digital data according to a sampling clock signal;a maximum likelihood decoder for performing maximum likelihood decoding on the digital data; anda generator for measuring a phase difference between the digital data sampled at a desired detection point among a predetermined number of optimal detection points of the received data and each of a number of reference levels corresponding to the predetermined number of optimal signal according to the measured phase difference, wherein the generator comprises:a detector for detecting the digital data sampled at the desired detection point among the number of optimal detection points, said detection comprising a divider for dividing a system clock signal by 1/3n and outputting a divided clock signal, wherein n is an integer, and a sample and hold unit for holding the digital data which is sampled at the desired detection point among the predetermined number of optimal detection points according to the divided clock signal;a calculator for calculating absolute values of the differences between the level of the digital data and each reference level, and outputting the results as a phase error, and calculator comprising a reference level generator for generating a first reference level representing the optimal detection point ""+1"" value, a second reference level representing the optimal detection point for a ""0"" value and a third reference level representing the optimal detection point for ""-1"" value, a selector for selecting one of the first, second and third reference levels, a selection controller for outputting a selection control signal to the selector such that the first, second and third reference levels are selected by the selector in a predetermined sequence according to the system clock signal and the divided clock signal input into the selection controller, a first comparator for comparing an output level of the detector with each reference level selected by the selector and for outputting the differences as an output, and a second comparator for comparing each difference output from the first comparator to output the least difference as the phase error; anda control signal generator for generating a voltage corresponding to the phase error and outputting the voltage as the control signal.