Patent ID: 6515602
Filing Date: 2003-02-04
Classification: H03M

Abstract:
A clamp circuit, comprising:a first clamp unit operating under a set of first conditions for clamping the reference input section of an analog image signal according to at least one first clamp pulse and fixing the DC bias level of the image signal to a predetermined level; a variable gain amplifier (VGA) for amplifying the gain of an image signal clamped by the first clamp unit and outputting the signal whose gain is amplified; a second clamp unit operating under a second set of conditions for clamping the reference input section of an image signal whose gain is amplified according to at least one second clamp pulse and adjusting the DC bias level; an analog-to-digital converter (ADC) for converting one of the output of the variable gain amplifier and the image signal clamped by the second clamp unit into a digital signal and outputting the converted signal as predetermined digital data; and a clamp controller for obtaining an average value by accumulating the digital data and generating the first clamp pulse and the second clamp pulse by comparing the obtained average value with a target level.