Patent ID: 6759679
Filing Date: 2004-07-06
Classification: H01L

Abstract:
A poly-silicon layer of a thin film transistor (TFT), comprising:an active channel region, wherein a probability P that a maximum number of primary grain boundaries exists on the active channel region is not 0.5, the probability P obtained by the following equation: P=D-(N&it;â€ƒ&it;max-1)&CenterDot;GsGs,where D=LÂ·cos &thgr;+WÂ·sin &thgr;, L is a channel length of the active channel region, W is a width of the active channel region, Nmax is the maximum number of the primary boundaries existing on the active channel region, Gs is a grain size, and &thgr; is a tilt angle of the primary grain boundaries.