Patent ID: 7087492
Filing Date: 2006-08-08
Classification: H01L

Abstract:
1. A method for fabricating transistors of different conduction types arranged in a first section of a surface of a semiconductor substrate with a high packing density and in a second section with a low packing density, comprising: providing a gate electrode having a doping of a first conduction type on the semiconductor substrate at least in the first section; producing encapsulated gate structures assigned to the transistors in the first and second sections, the gate structures having gate electrodes emerging from the gate electrode layer and cover structures emerging from a second dielectric layer provided above the gate electrode layer; providing a spacer structure perpendicular to the surface of the semiconductor substrate and comprising a third dielectric layer for the encapsulation of the gate structures, the gate structure sections of the second dielectric layer which are formed as a cover structure remaining in the gate structures during the formation of the spacer structures and the cover structure and the spacer structure comprising materials that can be removed selectively with respect to one another; using the encapsulated gate structures as a protective mask and/or conductive structure for auxiliary structures for a self-aligning contact-connection of the transistors in the first section; applying a protective layer in the region of the first section; opening encapsulated gate structures arranged in the second section by selective removal of the cover structures, thereby uncovering at least a portion of the gate electrodes; and simultaneously doping, in each case, the gate electrode and assigned source/drain regions of at least a first subset of transistors arranged in the second section, with a dopant for a second conduction type opposite to the first conduction type, so that in each case the source/drain regions and the gate electrode of a transistor arranged in the second section are provided in each case with a doping of the same conduction type.