Patent ID: 8618787
Filing Date: 2013-12-31
Classification: G05F,H03F

Abstract:
1. A system for use within an integrated circuit, the system comprising: an input differential pair comprising a first input transistor device coupled in series with a first cascode input transistor device, and a second input transistor device coupled in series with a second cascode input transistor device, wherein a positive input node is coupled to a gate of the first input transistor device and a negative input node is coupled to a gate of the second input transistor device; a current source coupled to a gate of the first cascode input transistor device and a gate of the second cascode input transistor device, wherein the current source provides a predetermined bias current; a biasing field effect transistor device comprising a source terminal, a gate terminal, and a drain terminal, wherein the drain terminal is coupled to a voltage source; and a current mirror comprising a first active device and a second active device, wherein the first active device comprises a first transistor device, and the second active device comprises a second transistor device; wherein the biasing field effect transistor device is of a different doping type from that of the current mirror; and wherein a gate terminal of the first transistor device and a gate terminal of the second transistor device are coupled to the source terminal of the biasing field effect transistor device.