Patent ID: 7052977
Filing Date: 2006-05-30
Classification: H01L

Abstract:
1. A method of dicing a semiconductor wafer, the semiconductor wafer including a top surface, a bottom surface, a plurality of doped regions, and an isolation region, the top surface having a street region, the isolation region extending down from the top surface, and having a bottom surface spaced apart from the bottom surface of the semiconductor wafer, the method comprising: forming a layer of first material on the semiconductor wafer; forming a mask on the layer of first material, the mask including a plurality of openings that expose a plurality of first regions of the layer of first material; etching to remove the first regions of the layer of first material from the top surface of the semiconductor wafer without removing a substantial portion of the top surface of the semiconductor wafer to expose the street region and the doped regions; forming a layer of second material over the layer of first material; forming a mask on the layer of second material, the mask including an opening that exposes a second region of the layer of second material; performing an etch of the layer of second material, the etch removing the second region of the layer of second material from the top surface of the semiconductor wafer without removing a substantial portion of the top surface of the semiconductor wafer to expose the street region; attaching a wafer holding tape to the layer of second material after the second region has been removed, the semiconductor wafer being free of an opening in the street region that extends vertically below the bottom surface of the isolation region after the wafer holding tape has been attached; and thinning the semiconductor wafer by removing the bottom surface of the semiconductor wafer until the semiconductor wafer singulates into dice.