Patent ID: 6335636
Filing Date: 2002-01-01
Classification: G11C

Abstract:
For use in a programmable logic device having reference voltage circuitry, a programmable input/output circuit comprising:an input/output terminal; an input/output buffer coupled to said input/output terminal for buffering input/output signals between said input/output terminal and other circuitry of said programmable logic device; and a programmable reference voltage clamp circuit for controllably passing a reference voltage from said input/output terminal to reference voltage circuitry of said programmable logic device; wherein: when said programmable reference voltage clamp is controlled to pass said reference voltage from said input/output terminal to said reference voltage circuitry, said input/output buffer is disconnected from said input/output terminal to prevent conduction of said reference voltage to said other circuitry of said programmable logic device; and when said programmable reference voltage clamp is controlled to prevent conduction of said reference voltage from said input/output terminal to said reference voltage circuitry, said input/output buffer is connected to said input/output terminal to allow conduction of said reference voltage to said other circuitry of said programmable logic device.