Patent ID: 8830640
Filing Date: 2014-09-09
Classification: H02H

Abstract:
1. An electronic device comprising at least one integrated circuit (IC) and an electrostatic discharge (ESD) protection circuit for failsafe protection of the at least one integrated circuit (IC), the ESD protection circuit comprising: a primary protection stage having primary power dissipating clamps and a subsequent, secondary protection stage which is coupled to the primary protection stage via a current limiting resistor, wherein a first primary power dissipating clamp is coupled in series between a first supply voltage of the electronic device and an input of the ESD protection circuit and a second primary power dissipating clamp is coupled in series between a second supply voltage of the electronic device and the input of the ESD protection circuit, the protective resistor is coupled in series between the input node and an output node of the ESD protection circuit, and wherein, the secondary protection stage, comprises: the low side CMOS-transistor is coupled so as to provide a Zener diode, which is coupled in forward direction between the output and the second supply voltage and the high side CMOS-transistor(s) and the low side CMOS-transistor are complementary CMOS-transistors, wherein a source, a gate and a bulk of at least one of the high side transistors are coupled substantially directly to the first supply voltage; wherein a drain of the at least one high side transistor is/are coupled substantially directly to a drain of the low side transistor, wherein a bulk of the low side transistor is substantially directed coupled to the second supply voltage, and wherein the gate of the low side transistor is substantially directly coupled to its own drain.