Patent ID: 8301868
Filing Date: 2012-10-30
Classification: G06F

Abstract:
1. A system comprising: a processor including a plurality of channels to store a plurality of state information corresponding to a plurality of instruction threads, each channel having a different priority and specifying a trigger-action mapping for a scenario associated with the channel responsive to which a yield event is to occur to transfer execution to a yield event service routine associated with the channel, and a block indicator to provide an override of the yield event, wherein if multiple yield events occur simultaneously, a highest priority channel is selected for servicing; a scenario detection unit to detect performance characteristics via interpretation of the occurrence of events within the processor, a combination of events being determined by the plurality of state information; a profiling unit to generate a profile of the combination of events according to a user model, and a profile method generator to translate the profile into a method; a managed run-time environment (MRTE) to modify user code of at least one of the plurality of instruction threads within the MRTE to improve the user code during run-time of the at least one instruction thread according to the combination of events detected by the scenario detection unit, the modification including optimization of the user code of the at least one instruction thread via the method.