Patent ID: 8627019
Filing Date: 2014-01-07
Classification: G11C

Abstract:
1. A memory area managing method of a multi-port memory device in a memory link architecture which includes a multi-port memory device, a memory controller, and a flash memory, the memory area managing method comprising: performing a data processing step in which data stored in a host CPU area of the multi-port memory device is processed by a host CPU connected with the multi-port memory device, the processed data being stored in a shared area of the multi-port memory device; performing a file data generating step in which file data is generated from the processed data stored in the shared area according to a write command of the host CPU, the file data being stored in a memory controller area of the multi-port memory device; and performing a file data storing step in which the file data is read out from the memory controller area and the read file data is sent to the flash memory.