Patent ID: 6687160
Filing Date: 2004-02-03
Classification: G11C

Abstract:
A reference current generation circuit, suitable for a multiple bit flash memory, comprising a plurality of reference current generation units, each of the reference current generation units comprising:a load, having a first connection terminal and a second connection terminal, wherein the first connection terminal couples to an operating power; and a reference cell, having a gate, a first source/drain, and a second source/drain, wherein the first source/drain couples to the second connection terminal, the second source/drain is grounded, the gate couples to a boosted word-line voltage; wherein the gate of each of the reference current generation units couples to the same boosted word-line voltage, and a gate width of the reference cell for each of the reference current generation units is different according to a magnitude of the reference current that needs to be generated by the reference current generation units.