Patent ID: 7962721
Filing Date: 2011-06-14
Classification: G06F

Abstract:
1. An information processing apparatus comprising: a processor; at least one ancillary device; and a processor support chip coupled to the processor and the at least one ancillary device, wherein the processor support chip includes a local service controller and a jointly addressable memory space, wherein the processor support chip further includes an interface to the processor for the transfer of information therebetween, an interface for communication with a service processor, and an interface for communication with the at least one ancillary device; wherein the local service controller has exclusive read and write access to the ancillary device interface; wherein the local service controller is operable to maintain a data structure indicating a current value associated with the at least one ancillary device in the jointly addressable memory space for access by the processor and the service processor; wherein the local service controller is further operable to intercept access requests from the processor and the service processor requesting access to the at least one ancillary device, filter the intercepted access requests, and manage conflicting access requests.