Patent ID: 9058899
Filing Date: 2015-06-16
Classification: G11C

Abstract:
1. A Static Random Access Memory(SRAM) cell comprising: a storage unit configured to receive a first input voltage signal and a second input voltage signal with a different value from the first input voltage signal, and to maintain a first stored value signal and a second stored value signal, wherein when the first stored value signal is of value 0, the second stored value signal has a value equal to the second input voltage signal, and when the second stored value signal is of value 0 the first stored value signal has a value equal to the first input voltage signal; a first access unit connected to the first stored value signal of the storage unit and controlled by a word line signal, configured to read the first stored value signal to a first bit line signal or to write the value of the first bit line signal to the first stored value signal; and a second access unit connected to the second stored value signal of the storage unit and controlled by the word line signal, configured to read the second stored value signal to a second bit line signal or to write the value of the second bit line signal to the second stored value signal.