Patent ID: 6999372
Filing Date: 2006-02-14
Classification: G11C

Abstract:
1. A multi-port memory for storing data, comprising a memory cell comprising a first node for reading and writing a first data value to the memory cell and a second node for reading and writing a second data value to the memory cell; a first current limiter device coupled to the first node for limiting memory cell current flow during read and write operations; a second current limiter device coupled to the second node for limiting memory cell current flow during read and write operations; first and second transfer gates for transferring data stored in the memory cell to a first pair of bit lines in accordance with the potential of a first word line, where the first transfer gate is connected to the first current limiter device, and the second transfer gate is connected to the second Current limiter device; and third and fourth transfer gates for transferring data stored in the memory cell to a second pair of bit lines in accordance with the potential of a second word line, where the third transfer gate is connected to the first current limiter device, and the fourth transfer gate is connected to the second current limiter device.