Patent ID: 6548353
Filing Date: 2003-04-15
Classification: H01L

Abstract:
A method of making a nonvolatile memory device, comprising the steps of:providing a substrate with shallow trench isolation (STI) structures protruding above the substrate and a conductive layer confined between the STI structures; recessing the conductive layer below a top surface of the STI structures to leave a recess; forming a spacer on sidewalls of the recess, the spacer covering a portion of the conductive layer to serve as an oxidation mask; growing a thermal oxide layer on the conductive layer where it is not covered by the spacer; removing the spacer to expose the conductive layer; etching an opening through the conductive layer using the thermal oxide layer as an etch mask to define a floating gate; removing the oxide layer; forming an inter-gate dielectric layer conformally lining the opening and the floating gate; and forming a control gate layer over the inter-gate dielectric layer and filling the opening.