Patent ID: 8671236
Filing Date: 2014-03-11
Classification: G06F

Abstract:
1. A method for computing, comprising: connecting a host device to a peripheral device via a bus that is physically configured in accordance with a predefined standard and comprises multiple connection pins that are specified by the standard, including a plurality of ground pins; using at least one pin selected from among the pins on the bus that are specified as the ground pins in order to indicate to the peripheral device that the host device has an extended operational capability; and sensing, at the peripheral device, that the at least one pin is floating, and operating in accordance with the extended operational capability of the host device, wherein using the at least one pin comprises floating two of the pins on the bus that are specified as the ground pins, and wherein sensing that the at least one pin is floating comprises detecting that both of the two of the pins are floating as a condition for operating in accordance with the extended operational capability.