Patent ID: 6825694
Filing Date: 2004-11-30
Classification: H03K

Abstract:
A digital flip-flop circuit producing, at an output node, an output signal reflecting the state of a data signal when a clock signal changes logical states, comprising:a clock node for receiving the clock signal and a data node for receiving the data signal; a first output transistor comprising a source/drain terminal connected to the output node, wherein the first output transistor turns on to bring the output to a first state; and a second output transistor having opposite conductivity type of the first output transistor and having a source/drain terminal connected to the output node wherein the second output transistor turns on to bring the output node to a second state; a first control node connected to the gate of the first output transistor wherein the state of the first control node is determined by the clock signal and the data signal; a second control node, decoupled from the first control node, and connected to a gate terminal of the second output transistor; further comprising a first set of transistors, each having its respective pair of source/drain terminals connected between Vdd and the first control node.