Patent ID: 6774670
Filing Date: 2004-08-10
Classification: H03K

Abstract:
An intra-tile buffering system for a field programmable gate array, wherein said field programmable gate array includes:a plurality of rows and a plurality of columns, wherein each of said plurality of rows has a left end and a right end, and each said plurality of columns has a top end and a bottom end, and wherein each of said plurality of rows comprises a plurality of functional groups aligned from said left end to right end with an interface group located at said right end and said left end, and each of said plurality of columns comprises a plurality of functional groups aligned from top end to bottom end with an interface group located at said top end and said bottom end; wherein each functional group is configured to receive a primary input signal, perform a logic operation, and generate a primary output signal; and wherein each interface group is configured to transfer signals from each of said plurality of functional groups connected to said interface group to outside of said at least one field programmable gate array tile, and includes a plurality of input multiplexers configured to select signals received from outside of said at least one field programmable gate array tile and provide signals to each of said plurality of functional groups connected to said interface group, said intra-tile buffering structure comprising: a primary routing structure coupled to said functional groups and interface groups and configured to route signals within said at least one field programmable gate array tile, between said plurality of functional groups and said interface groups; wherein said primary routing structure comprises: a horizontal bus coupled to each of said plurality of rows of functional groups; a vertical bus coupled to each of said plurality of columns of functional groups; a horizontal buffer coupled to each horizontal bus and spaced every Nth of said plurality of columns of functional groups, where N is an integer; and a vertical buffer coupled to each vertical bus and spaced every Mth said plurality of rows of functional groups, where M is an integer.