Patent ID: 7623395
Filing Date: 2009-11-24
Classification: G06F

Abstract:
1. A buffer circuit, comprising: a storage unit having a first storage capacity that stores data based on a write request inputted from an outside, and outputs the data in an order in which the data was written, based on a read request inputted from the outside, and a valid data counting unit counting a word count of valid data based on a number of input of the write request and a number of input of the read request, wherein a second storage capacity in the first storage capacity which is used to store the data is adjusted based on an amount of valid data which has been written into the storage unit but has not been read therefrom, wherein the storage unit comprises a plurality of buffer units whose total storage capacity comprises the first storage capacity, wherein the second storage capacity is determined by a number of used buffer units of the plurality of buffer units which number is changed corresponding to the amount of valid data, and wherein the number of used buffer units is determined based on the word count.