Patent ID: 8334211
Filing Date: 2012-12-18
Classification: H01L

Abstract:
1. A method for patterning integrated circuit (IC) device arrays, comprising: forming a repeating pattern of lines in a masking layer across a first region of a substrate, the first region including spaced-apart array regions and peripheral regions outside the array regions, the lines having top and side surfaces, wherein a plurality of the lines extend across a plurality of the array regions and one or more of the peripheral regions; applying a blocking mask over the lines in the masking layer, the blocking mask differentiating the array regions of the first region from the peripheral regions of the first region, the blocking mask covering substantially all of the top and side surfaces of a plurality of the lines in either the array regions or the peripheral regions, wherein the blocking mask extends continuously between the plurality of the lines; and transferring the pattern of lines in the array regions into the substrate.