Patent ID: 7473988
Filing Date: 2009-01-06
Classification: H01G,H01L,H05K

Abstract:
1. A wiring board comprising: a substrate core including a core main surface and a core rear surface; a plurality of ceramic capacitors each including a capacitor main surface and comprising an alternatively laminated structure including a first inner electrode layer and a second inner electrode layer which sandwich a ceramic dielectric layer therebetween, said ceramic capacitors being embedded in said substrate core and being oriented such that said core main surface and said capacitor main surface face in a common direction; and a built-up layer having a laminated structure wherein at least one interlayer insulating layer and at least one conductor layer are alternately laminated on said core main surface and said capacitor main surface, said built-up layer including a plurality of semiconductor integrated circuit element mounting areas at different locations on a surface of said built-up layer, and said plurality of ceramic capacitors being disposed in areas of said substrate core corresponding to said plurality of semiconductor integrated circuit element mounting areas, said substrate core including a plurality of housing opening portions therein which open at said core main surface, and said ceramic capacitors being respectively accommodated in said plurality of housing opening portions and being oriented such that said core main surface and said capacitor main surface face in a common direction, said substrate core further including a conductor portion which electrically connects said core main surface side and said core rear surface side and which is disposed in an area formed between said adjacent housing opening portions.