Patent ID: 7232746
Filing Date: 2007-06-19
Classification: H01L

Abstract:
1. A method for forming a dual damascene interconnection in a semiconductor device, comprising the steps of: forming an etch stop film and an intermetal insulating film sequentially on a lower metal film to be interconnected; forming a via hole for exposing a portion of a surface of the etch stop film through the intermetal insulating film; forming a trench having a width wider than a width of the via hole on the intermetal insulating film; exposing the lower metal film by removing the etch stop film by performing an etching process using an etching equipment of a dual plasma source; performing a nitrogen passivation process for the exposed lower metal film while a bias power of the etching equipment of the dual plasma source remains; and forming a barrier metal film and an upper metal film sequentially within the trench and the via hole.