Patent ID: 6242335
Filing Date: 2001-06-05
Classification: H01L

Abstract:
A method for fabricating an anti-fuse on a silicon substrate having a first conductivity type, comprising the steps of:forming on a surface of the substrate a first conductive layer;forming a dielectric layer on the first conductive layer;forming a second conductive layer on the dielectric layer, a portion of the second conductive layer extending over the surface of the substrate beyond the dielectric layer; andforming a well region having a graded doping profile in the substrate under the portion of the second conductive layer extending over the surface of the substrate beyond the dielectric layer to thereby form a graded junction between the silicon substrate and the well region having a reverse breakdown voltage greater than the difference between a programming voltage applied to the second conductive polysilicon layer during programming of the anti-fuse and a back bias voltage applied to the substrate.