Patent ID: 6836230
Filing Date: 2004-12-28
Classification: G06K,H03M

Abstract:
A device having a number P of first single analog inputs for each receiving a first analog signal having a frequency F from a sensor electrode and a first single digital output for sequentially generating a number P of first digital signals each coding an amplitude value of the first analog signal, comprising:a first multiplexer having a number M of first multiple analog inputs each comprising a number N of second single analog inputs connected to the first single analog inputs for receiving the first analog signal, a first multiple analog output comprising a number N of second single analog outputs, and a first command input for connecting the first multiple analog output sequentially to each one of the first multiple analog inputs; a phase sensitive amplifier having a number N of third single analog inputs connected to the second single analog outputs of the first multiplexer, a number N of third single analog outputs, and a second command input for generating on each third single analog output an amplitude analog value of an analog signal received on the corresponding third single analog input; a second multiplexer having a number N of fourth single analog inputs connected to the third single analog outputs of the phase sensitive amplifier, a fourth single analog output, and a third command input for connecting the fourth single analog output sequentially to each one of the fourth single analog inputs; an analog to digital converter having a fifth single analog input connected to the fourth single analog output of the second multiplexer, a second single digital output tied to the first output of the device, and a fourth command input for generating the first digital signals coding the amplitude analog values received on the fifth single analog input; and a front-end controller operable for setting the first command input with a first new value and the second command input with a first pulse value at the beginning of each period of the first analog signal, the third command input with a succession of N second new values, and the fourth command input with a succession of N second pulse values at a time delayed after the beginning of each period of the first analog signal; wherein the second new value is set for connecting the fourth single analog output on a different fourth single analog input so as to connect the fourth single analog output on all the fourth single analog inputs during a period of the first analog signal; and wherein the second pulse value is set to a succession of N pulse values generated during the time which the second new value is applied.