Patent ID: 6169452
Filing Date: 2001-01-02
Classification: H03G

Abstract:
A gain control amplifier for amplifying an input voltage and providing an amplified output voltage, comprising: a first differential circuit comprising first and second transistors, the emitters of which are coupled, and a first load element connected to the collector of the first transistor; a second differential circuit comprising third and fourth transistors, the emitters of which are coupled, and a second load element connected to the collector of the fourth transistor, the bases of the third and fourth transistors being coupled to the bases of the second and first transistors, respectively, the amplified output voltage being provided from the collectors of the first and fourth transistors; a third differential circuit comprising fifth and sixth transistors, the emitters of which are coupled through a pair of resistance elements, the junction of the resistance elements being connected to a first current circuit, the collector of the fifth transistor being connected to the coupled emitters of the first and second transistors, the collector of the sixth transistor being connected to the coupled emitters of the third and fourth transistors, the input voltage being fed to the bases of the fifth and sixth transistors; and current split means for splitting current flowing in the first and second load elements from the respective transistors, the current split means comprising: fourth differential circuit for splitting the current flowing in the first load element from the first transistor, the fourth differential circuit comprising seventh and eighth transistors, the emitters of which are coupled, the coupled emitters being connected to a second current circuit, the collector of the seventh transistor being connected to the collector of the first transistor, the bases of the seventh and eight transistors being connected to the bases of the second and first transistors, respectively; fifth differential circuit for splitting the current flowing in the second load element from the fourth transistor, the fifth differential circuit comprising ninth and tenth transistors, the emitters of which are coupled, the coupled emitters being connected to a third current circuit, the collector of the tenth transistor being connected to the collector of the fourth transistor, the bases of the ninth and tenth transistors being connected to the bases of the fourth and third transistors, respectively; and split control means for controlling currents flowing in the transistors of the differential circuits in response to a voltage difference between the voltages at the collectors of the first and fourth transistors.