Patent ID: 6893926
Filing Date: 2005-05-17
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device, comprising: providing a semiconductor substrate of a first conductivity type; forming a low impurity drain layer of a second conductivity type in a surface of the semiconductor substrate; forming a low impurity drain layer of a second conductivity type in a surface of the semiconductor substrate; forming a gate insulation film on the semiconductor substrate; forming a gate electrode on the gate insulation film; forming a high impurity drain layer of the second conductivity type so as to be adjacent the low impurity drain layer and apart from the gate electrode, the high impurity drain layer having an impurity concentration higher than an impurity concentration of the low impurity drain layer; and forming a buried layer of the first conductivity type in a region deeper than the high impurity drain layer so that the buried layer forms a PN junction with the high impurity drain layer.