Patent ID: 7571415
Filing Date: 2009-08-04
Classification: H03F

Abstract:
1. A layout of a power device, comprising: a substrate; a unit array, disposed on the substrate, wherein the unit array has a plurality of rows and each row comprises a plurality of units; a plurality of first signal paths, disposed on the substrate, wherein the first signal paths are disposed on a first side of corresponding odd-numbered rows of the unit array; a plurality of second signal paths, disposed on the substrate, wherein the second signal paths are disposed on a second side of corresponding odd-numbered rows of the unit array; a plurality of third signal paths, disposed on the substrate, wherein the third signal paths are disposed over corresponding rows of the unit array; a plurality of fourth signal paths, disposed on the substrate, wherein the fourth signal paths are disposed over corresponding rows of the unit array; a first port, disposed on the substrate and electrically connected to the first signal paths; a second port, disposed on the substrate and electrically connected to the second signal paths; a third port, disposed on the substrate and electrically connected to the third signal paths; and a fourth port, disposed on the substrate and electrically connected to the fourth signal paths.