Patent ID: 6558998
Filing Date: 2003-05-06
Classification: H01L

Abstract:
Process for making an integrated circuit equipped with capacitive means of decoupling electrical power supply terminals comprising the following steps in sequence:a) formation of a first insulating layer (112) and a second conducting layer (114) in order, starting from the surface, on a substrate (100) comprising a first conducting layer (110), b) formation of the second conducting layer (114) to leave at least part of the second conducting layer separated from the first conducting layer by the insulating layer, c) formation of a second insulating layer (116) surrounding part of the second conducting layer, d) creation of a thin layer (206) of semiconducting material on the second insulating layer (116), e) formation of at least one component in the thin layer, comprising at least one active area (302, 304, 306, 308) and oxidation of the thin layer between the components, f) formation of a thick electrical insulating layer (320) on the thin layer, g) formation of openings passing through the thick insulating layer, the thin layer (206), and the layer of electrical insulating material (116) outside components to reach the first and second conducting layers, h) placement of the conducting material in the openings, and formation of electrical interconnections to connect the first and second conducting layers to first and second electrical power supply terminals, respectively.