Patent ID: 7462521
Filing Date: 2008-12-09
Classification: G11C,H01L,Y10S

Abstract:
1. A method for providing a dual-gate semiconductor device, comprising: providing a first insulating layer over a semiconductor substrate; forming a first gate electrode structure over the insulating layer; forming a first dielectric layer over the first gate electrode structure; forming a semiconductor layer over the first dielectric layer, such that the first gate electrode structure, the first dielectric layer and a portion of a surface of the semiconductor layer form a first semiconductor device; forming a second dielectric layer over the semiconductor layer; and forming a second gate electrode structure over the second dielectric layer, such that the second gate electrode structure, the second dielectric layer and a portion of a surface of the semiconductor layer form a second semiconductor device, and such that the first and second semiconductor devices are sufficiently isolated from each other from electrostatically interacting.