Patent ID: 7945009
Filing Date: 2011-05-17
Classification: G11B

Abstract:
1. A method of determining in a jitter measurement hardware circuit of an analog-to-digital converter based timing loop a zero crossing time of a signal having an approximately sinusoidal shape with respect to time and in the presence of noise, the method comprising: receiving the signal at the analog-to-digital converter based timing loop; determining in the jitter measurement hardware circuit at least a first and second point on the signal before crossing a critical level; determining in the jitter measurement hardware circuit at least a third and fourth point on the signal following crossing the critical level; calculating a first approximate critical level crossing time using at least the first, second, and third points; calculating a second approximate critical level crossing time using at least the second, third, and fourth points; and averaging the first and second approximate critical level crossing times to determine the zero crossing time.