Patent ID: 7911750
Filing Date: 2011-03-22
Classification: H01L

Abstract:
1. An electronic device having input/output (I/O) and common terminals, comprising: a circuit core coupled between the I/O and common terminals; and a plurality of serially arranged resistor triggered bi-directional electrostatic discharge (ESD) clamp stages coupled between the I/O and common terminals, wherein a first ESD clamp stage of the plurality of ESD clamp stages comprises serially coupled first and second bipolar transistors, a first external resistor coupled between an emitter and a base of the first bipolar transistor, and a second external resistor coupled between an emitter and a base of the second bipolar transistor, wherein the emitter of the first bipolar transistor also is coupled to the common terminal, collectors of the first and second bipolar transistors are coupled together, and wherein a second ESD clamp stage comprises serially coupled third and fourth bipolar transistors, a third external resistor coupled between an emitter and a base of the third bipolar transistor, and a fourth external resistor coupled between an emitter and a base of the fourth bipolar transistor, wherein the emitter of the third bipolar transistor is coupled to the emitter of the second bipolar transistor, collectors of the third and fourth bipolar transistors are coupled together, and wherein the second external resistor and the third external resistor are located in a region between the first ESD clamp stage and the second ESD clamp stage.