Patent ID: 8443413
Filing Date: 2013-05-14
Classification: H04N

Abstract:
1. A video port aggregator comprising: a plurality of inputs for receiving asynchronous video data streams; a plurality of input buffers, each input buffer corresponding to one of said inputs, each input buffer generating video data and a status signal corresponding to said asynchronous video data stream; a memory controller connected to said plurality of input buffers for writing video data corresponding to said asynchronous video data streams from said input buffers to corresponding locations within an external memory; a channel sequencer connected to said plurality of input buffers and said memory controller, said channel sequencer triggering said memory controller to read data out of the external memory for transmission to a single video output port when said corresponding status signal indicates receipt of a predetermined portion of data, said read of data out of the external memory occurring at a faster rate than the writing of video data corresponding to on asynchronous video data stream, said channel sequencer controlling said memory controller to form said data transmitted via said single video output port into artificial video frames including data from plural of the asynchronous video data streams.