Patent ID: 6404372
Filing Date: 2002-06-11
Classification: H03M

Abstract:
An apparatus for converting an analog input into a digital output, comprising:(a) a generator that generates a top voltage boundary and a bottom voltage boundary for a voltage window; (b) a comparator that compares the analog input to the top voltage boundary and the bottom voltage boundary for the voltage window, the comparator setting an off state when the analog signal is positioned above the bottom voltage boundary and below the top voltage boundary, the comparator setting an on state when the bottom voltage boundary is greater than the analog input and setting another on state when the top voltage is less than the analog input; and (c) a counter that increments a digital output when the comparator is set in the on state and decrements the digital output when the comparator is set in the other on state, the digital output of the counter representing the value of the analog signal when the comparator is set in the off state.