Patent ID: 8446000
Filing Date: 2013-05-21
Classification: H01L

Abstract:
1. A package structure, comprising: a circuit board; a first semiconductor device disposed on the circuit board, wherein the first semiconductor device has an upper surface and a lower surface which is opposite to the upper surface and facing the circuit board, the first semiconductor device has a plurality of conductive vias, and each of the conductive vias has a first end surface protruding from the upper surface and a second end surface exposed by the lower surface wherein the second end surface is attached to the circuit board by a conductive bump; a first protection layer disposed on the circuit board, wherein the first protection layer covers portions of the upper surface and a side wall of the first semiconductor device and exposes the first end surface of each of the conductive vias; a second semiconductor device disposed on the upper surface of the first semiconductor device and connected to the conductive vias of the first semiconductor device; and a second protection layer disposed on at least a portion of an upper surface of the first protection layer and encapsulating the second semiconductor device, wherein a side wall of the second protection layer is substantially aligned with a side wall of the first protection layer and a side wall of the circuit board.