Patent ID: 6162676
Filing Date: 2000-12-19
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:(a) sequentially forming an etching stopper insulating film and a first insulating interlayer on a semiconductor substrate having a semiconductor element formed thereon;(b) forming at least a pair of first upper contact holes in said first insulating interlayer;(c) forming first side wall conductive layers on inner surfaces of the respective upper contact holes;(d) forming lower contact holes in said etching stopper insulating film in the pair of first upper contact holes by using said first side wall conductive layers as a mask so as to reach said semiconductor element;(e) forming first buried conductive layers by burying conductive layers in the pair of contact holes each constituted by the upper and lower contact holes;(f) forming a first interconnection above one of said pair of buried conductive layers;(g) sequentially forming a second etching stopper insulating film and a second insulating interlayer on an entire surface;(h) forming a second upper contact hole in said second insulating interlayer corresponding to a portion above the other one of said first buried conductive layers;(i) forming a second side wall conductive layer on an inner surface of the second upper contact hole;(j) forming a second lower contact hole in said second etching stopper insulating film in the second upper contact hole by using said second side wall conductive layer as a mask so as to reach said first buried conductive layer, the second lower contact hole and the second upper contact hole forming a second contact hole; and(k) forming a second buried conductive layer in the second contact hole and a second interconnection integrally connected to said second buried conductive layer.