Patent ID: 6114235
Filing Date: 2000-09-05
Classification: H01L,Y10S

Abstract:
A method for forming a local interconnect to a contact surface located below a dielectric layer within a semiconductor wafer stack, the method comprising:depositing a cap layer on at least a portion of the dielectric layer, wherein the cap layer has an exposed top surface;covering at least a portion of the top surface of the cap layer with a resist layer;using the cap layer as a bottom anti-reflective coating and patterning the resist layer to form a resist mask that includes at least one etch window that exposes a selected portion of the top surface of the cap layer;etching through the selected portion of the top surface of the cap layer to expose a selected portion of the dielectric layer;using the cap layer as a hardmask and etching through the selected portion of the dielectric layer to create an opening that exposes at least a portion of the contact surface;depositing a conductive material on at least a portion of the top surface, wherein the conductive layer substantially fills the opening; andremoving the conductive material located outside of the opening to form a local interconnect within the opening, wherein the local interconnect has an exposed surface that is substantially level with the top surface of the cap layer,wherein the method further comprises removing the resist mask before using the cap layer as a hardmask;wherein the cap layer comprises Si.sub.(1-x+y+z) N.sub.x O.sub.y :H.sub.z or SiO.sub.x N.sub.y.