Patent ID: 7224760
Filing Date: 2007-05-29
Classification: H03D,H03L,H04L

Abstract:
1. A high-speed, wide bandwidth data detection circuit comprises: phase detection module operably coupled to produce controlled current based on a current mode mathematical manipulation of differences between an incoming data stream and a recovered clock; data detection module operably coupled to produce the detected data based on the incoming data stream and the recovered clock; loop filter operably coupled to convert the controlled current into a control voltage; voltage controlled oscillator operably coupled to convert the control voltage into the recovered clock; and wherein the phase detection module comprises: a first differential exclusive OR gate operably coupled to produce a first differential current component of the controlled current based on a first representation of the incoming data stream and a second representation of the incoming data stream; a second differential exclusive OR gate operably coupled to produce a second differential current component of the controlled current based on a third representation of the incoming data stream and a fourth representation of the incoming data stream; a first current source module operably coupled to provide a first reference current; a second current source module operably coupled to provide a second reference current; and a differential common gate amplifier circuit operably coupled to the first and second differential exclusive OR gates and to the first and second current source modules, wherein the differential common gate amplifier circuit produces a differential controlled current based on the first and second differential current components and the first and second reference currents.