Patent ID: 8618604
Filing Date: 2013-12-31
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor wafer having a main surface; a plurality of first chip regions arranged in matrix form in said main surface; a plurality of second chip regions arranged adjacent to said plurality of first chip regions in said main surface to surround a periphery of a region where said plurality of first chip regions are arranged; and a blank region arranged in an outer region on the main surface of the semiconductor wafer so that neither the first chip regions nor the second chip regions reach a circumferential edge of the semiconductor wafer, wherein said second chip regions are smaller in area than said first chip regions, each of the plurality of first chip regions has a first pattern, each of the plurality of second chip regions has a second pattern, said second pattern is formed in an identical design pattern to said first pattern, and each of said first chip regions and said second chip regions has a rectangular shape when viewed two-dimensionally.