Patent ID: 8411501
Filing Date: 2013-04-02
Classification: G11C

Abstract:
1. A method of programming memory cells of a multi-level cell non-volatile memory to one of a plurality of data values, the method comprising: applying a first programming pulse to a wordline of the non-volatile memory device and a first bitline voltage to at least one first bitline associated with the wordline corresponding to a first data value among a plurality of data values; applying a second programming pulse to the wordline, a second bitline voltage to at least one second bitline associated with the wordline corresponding to a second data value among the plurality of data values, and a third bitline voltage to at least one third bitline associated with the wordline corresponding to a third data value among the plurality of data values, wherein a voltage level of the second programming pulse is different from a level of the first programming pulse, the second bitline voltage is different from the third bitline voltage if the second data value and third data value are different, the second bitline voltage is applied to the at least one second bitline and the third bitline voltage is applied to the at least one third bitline simultaneously, the second programming pulse is applied to the wordline successively after the first programming pulse, and after applying the second programming pulse, applying at least one of a sequence of verifying voltages to the wordline successively, wherein a level of the at least one of the sequence of verifying voltages varies in accordance with a data value being programmed to the memory cell.