Patent ID: 6128403
Filing Date: 2000-10-03
Classification: G06T,H01L

Abstract:
A wafer map analysis aid system comprising:observing means for executing inspection or measurement on wafers at plural steps of a semiconductor manufacturing process to which said wafers are subjected, to thereby create plural wafer map data which are image data respectively capable of representing results of said inspection or said measurement at said plural steps on images of said wafers as wafer maps, and for adding, to said plural wafer map data, linkers respectively indicating relation to said plural steps;input means for inputting text data related to said plural steps;storing means for storing said plural wafer map data respectively accompanied with said linkers sent from said observing means and said text data sent from said input means; andimage display means capable of displaying images of said text data stored in said storing means on a screen, and capable of fetching a specified part of said plural wafer map data from said storing means in accordance with said linkers to thereby display those images on said screen which said part of wafer map data represent as part of said wafer maps.