Patent ID: 7821307
Filing Date: 2010-10-26
Classification: G05F,H03K

Abstract:
1. A power on reset (POR) circuit comprising: a supply voltage; a current mirror coupled to the supply voltage, the current mirror operable to provide a pair of matching currents; a resistor divider disposed between the supply voltage and a voltage reference, the resistor divider comprising a first resistor disposed between the supply voltage and a first node and a second resistor disposed between the first node and the voltage reference; a pair of transistors coupled to receive a corresponding one of the pair of matching currents, the pair of transistors having their bases coupled to the first node, a collector of a first transistor of the pair of transistors providing an output voltage in response to the supply voltage; a third resistor disposed between an emitter of a second transistor of the pair of transistors and the voltage reference; and a third transistor having a base and a collector coupled to the first node and an emitter coupled to the voltage reference.