Patent ID: 6512181
Filing Date: 2003-01-28
Classification: G01R,H05K

Abstract:
A multilayer type printed-wiring board comprising;a first insulating layer; a data transmission wire pattern formed on said first insulating layer and adapted to data transmission with a transmission frequency (fapp) between a CPU module and a main memory module to be used for the CPU; an impedance measuring wire pattern formed on said first insulating layer with a predetermined clearance to any adjacent wiring pattern; a second insulating layer provided on said data transmission wire pattern and said impedance measuring wire pattern; and land sections for signals formed on said second insulating layer and electrically connected to said impedance measuring wire pattern arranged on said first insulating layer by way of a through hole being held in contact with the signal terminal of the probe for measuring the impedance of said impedance measuring wire pattern by using a TDR (time domain reflectometer) unit; a GND (grounding) land section also formed on said second insulating layer held in contact with the GND terminal of said probe; said impedance measuring wire pattern having a pattern length L and a pattern width, said pattern width being the same as that of said data transmission wire pattern; wherein said pattern length L is expressed by the formula: L&gE;&lgr;eff/4 &gE;C0/(fappÃ—3Ã—4Ã—{square root over (&egr;eff(coefficient of self-induction))}), wherein C0 is the light velocity in vacuum.