Patent ID: 6707082
Filing Date: 2004-03-16
Classification: H01L

Abstract:
A ferroelectric transistor, comprising:a semiconductor substrate; two source/drain zones disposed in said semiconductor substrate, a space between said two source/drain zones defining a channel region having a surface; a first dielectric intermediate layer containing an Al2O3 layer disposed on said surface of said channel region; a ferroelectric layer disposed above said first dielectric intermediate layer and having a surface and edges; a second dielectric intermediate layer disposed on said surface of said ferroelectric layer, said second dielectric intermediate layer containing an Al2O3 layer, and dielectric edge coverings formed of the same material as said second intermediate layer and surrounding said edges of said ferroelectric layer, said second dielectric intermediate layer and said edge coverings forming a contiguous structure for reducing leakage currents through said ferroelectric layer; and a gate electrode disposed on said second dielectric intermediate layer.