Patent ID: 7253114
Filing Date: 2007-08-07
Classification: H01L,Y10S

Abstract:
1. A method for forming a semiconductor device comprising: providing a substrate with designated high voltage (HV) and low voltage (LV) areas; forming a plurality of gate oxides including a thick gate oxide in said HV area and at least one thin gate oxide in said LV area, said thick gate oxide being thicker than said at least one thin gate oxide; forming a pattern of poly features in each of said high voltage and low voltage areas, said poly features including polysilicon covered by an etch resistant material; forming a photoresist pattern at least over said LV area; plasma etching to remove said thick gate oxide from said HV area that is not masked by one of said poly features; removing said photoresist pattern; and wet etching to remove said at least one thin gate oxide from said LV area not masked by one of said poly features.