Patent ID: 9123283
Filing Date: 2015-09-01
Classification: G09G,G11C

Abstract:
1. A shift register comprising shift register units at N stages in a cascade connection, wherein a frame start signal STV is input to a first signal input terminal of a shift register unit at a first stage and a second signal input terminal of a shift register unit at an Nth stage, and a forward scanning signal and a reverse scanning signal are input to a forward scanning signal input terminal and a reverse scanning signal input terminal of each of the shift register units respectively, the shift register outputs an output signal of each stage via a signal output terminal of each stage in a forward direction according to the forward scanning signal and outputs the output signal of each stage via the signal output terminal of each stage in a reverse direction according to the reverse scanning signal, wherein the shift register units at N stages comprises odd numbered shift register units which receive a first clock signal and even numbered shift register units which receive a second clock signal having phase opposite to that of the first clock signal, wherein each of the shift register units (S/R(n)) comprises: a forward scanning switch module for turning on a pull-up driving module under the control of the forward scanning signal to output a first signal to a pull-up node (PU), and outputting a second signal to a second pull-down module under control of the forward scanning signal; the first signal is the output signal of a shift register unit (S/R(n−1)) at a previous stage of the shift register unit (S/R(n)) or STV, and the second signal is the output signal of a shift register unit (S/R(n+1)) at a next stage of the shift register unit (S/R(n)) or STV; a reverse scanning switch module for turning on the pull-up driving module under control of the reverse scanning signal to output the second signal to the pull-up node (PU), and outputting the first signal to the second pull-down module under the control of the reverse scanning signal; the pull-up driving module for inputting a pull-up control signal to the pull-up node (PU) according to an output signal of the forward scanning switch module or the reverse scanning switch module; a pull-up module for supplying the first clock signal or the second clock signal to the signal output terminal according to the pull-up control signal of the pull-up node (PU); a pull-down driving module for outputting a pull-down control signal to a first pull-down module according to a second supply voltage (VDD) and the pull-up control signal of the pull-up node (PU); the first pull-down module for receiving the pull-down control signal of the pull-down driving module and supplying a first supply voltage (VSS) to the signal output terminal; a second pull-down module for receiving a reset signal according to the control of the forward scanning switch module or the reverse scanning switch module, and discharging under control of the reset signal, wherein the reset signal is the first signal or the second signal.