Patent ID: 6399505
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method for reducing contamination in a semiconductor device formed on a substrate including a center, an edge, a front, and a back, the method comprising the steps of:providing a barrier metal layer on the substrate, a first portion of the barrier metal layer being located near the edge and back of the substrate, a second portion of the barrier metal layer being near the center of the substrate, the first portion of the barrier metal layer being thinner than the second portion of the barrier metal layer, the barrier metal layer for providing a barrier between a first conductor used in an interconnect structure and the substrate; removing the first portion of the barrier metal layer; and depositing the first conductor used in forming the interconnect structure on the barrier metal layer after removal of the first portion of the barrier metal layer, wherein the barrier metal layer and the first conductor form a portion of the interconnect structure within a single level of the semiconductor device.