Patent ID: 7741177
Filing Date: 2010-06-22
Classification: G11C,H01L

Abstract:
1. A method of forming a memory cell, the method comprising: forming a body of a first conductivity type in a semiconductor substrate; forming a first insulator layer adjacent to the substrate; forming a charge storage region adjacent to the first insulator layer; forming first and second regions of a second conductivity type in the body; forming a channel region in the body between the first region and the second region, and generally disposed adjacent to and insulated from the charge storage region; forming a second insulator layer adjacent to the charge storage region; forming a first electrically conductive region comprising at least a portion thereof disposed adjacent to and insulated from the charge storage region by the second insulator layer; forming a layer adjacent to the first electrically conductive region; forming a second electrically conductive region adjacent to and separated from the first electrically conductive region by the layer; and forming a strain source that provides mechanical stress to at least one of the first and second electrically conductive regions, wherein: