Patent ID: 6388320
Filing Date: 2002-05-14
Classification: H01L

Abstract:
A semiconductor configuration, comprising:at least one semiconductor chip having a first chip side, a second chip side, and connections passing through said at least one semiconductor chip; active structures on said first chip side and said second chip side, said connections electrically connecting said active structures to one another; a support having a first support side, a second support side, plated-through holes, and non-conducting regions running alternately with regular spacings from said first support side to said second support side, said plated-through holes spaced apart from one another to define a hole spacing distance between respective ones of said plated-through holes; contact connections connecting said second chip side to said first support side, said contact connections spaced apart from one another to define a connection spacing distance between respective ones of said contact connections; and said hole spacing distance being smaller than said connection spacing distance.