Patent ID: 6246701
Filing Date: 2001-06-12
Classification: H04N

Abstract:
A method for locking reference clocks at circuits that transmit and receive a transport stream formed from a sequence of transport packets containing compressed data for one or more programs, each of said programs having an independent bit rate and program clock reference time stamps of an independent encoder system time clock to which decoding and presentation of said program is synchronized, said method comprising the steps of:(a) maintaining a reference clock at each first circuit which receives transport packets and each second circuit which transmits transport packets, said reference clock at each first circuit for indicating a time at which each transport packet is received thereat and said reference clock at each second circuit for indicating when to transmit each transport packet therefrom;(b) designating a master reference clock to which each other one of said reference clocks is to be synchronized, wherein a reference clock at one of said first and second circuits is designated as said master reference clock;(c) periodically obtaining a current time of said master reference clock;(d) adjusting each other one of said reference clocks according to a difference between said time at each of said other reference clocks and said current time of said master reference clock so as to match a time of said respective reference clock to a corresponding time of said master reference clock;(e) simultaneously retrieving a current time of said reference clocks at each said first and second circuits;(f) forming a difference between said current times of said reference clocks at said one circuit and each of said first and second circuits other than said one circuit; and(g) adjusting said reference clock at each of said first and second circuits other than said one circuit to reduce said difference.