Patent ID: 6508883
Filing Date: 2003-01-21
Classification: C23C,H01L

Abstract:
A semiconductor substrate processing system, comprising:a reactor comprising a single substrate deposition chamber; a wafer holder positionable in said deposition chamber, said wafer holder being of plate-like form, and having a plurality of recesses formed therein, wherein n is the number of recesses, to coplanarly hold a corresponding number n of wafers, with a center-to-center distance between adjacent wafers determined by center-to-center spacing between recesses holding said adjacent wafers; a substrate cassette coplanarly holding a corresponding number n of wafers therein, wherein wafers coplanarly adjacent to one another have a center-to-center spacing therebetween equal to said center-to-center distance between adjacent wafers in said wafer holder; and an automated substrate transport assembly comprising a corresponding number n of coplanar wands, wherein wands coplanarly adjacent to one another have a center-to-center spacing therebetween equal to said center-to-center distance between adjacent wafers in said wafer holder, wherein the wafer holder, substrate cassette and automated substrate transport assembly are constructed and arranged for simultaneous coplanar loading of said n wafers from the substrate cassette into said n recesses in the wafer holder, simultaneous processing of said n wafers in the wafer holder in the single substrate deposition chamber, and simultaneous coplanar transport of said n wafers from the wafer holder.