Patent ID: 6667208
Filing Date: 2003-12-23
Classification: H01L

Abstract:
A method for forming a semiconductor device comprising:preparing a semiconductor device comprising a transistor and a bit line disposed on a cell area and a peripheral circuit area of the semiconductor device; depositing a nitride layer and an oxide layer for forming a capacitor on the bit line; depositing a polysilicon layer for forming a lower electrode of the capacitor on the cell and peripheral circuit areas; depositing a photosensitive layer on the cell area, and performing a multiple isotropic etching of the photosensitive layer and a portion of the polysilicon layer on the peripheral circuit area with a mixture of CF4 gas and O2 gas; depositing a gap-fill oxide layer on the cell and peripheral circuit areas, and performing chemical and mechanical polishing thereby leaving the gap-fill oxide layer only in a gap portion of the polysilicon layer disposed on the cell area leaving exposed portions of the polysilicon layer; and forming the lower electrode of the capacitor by etching exposed portions of the polysilicon layer.