Patent ID: 7790500
Filing Date: 2010-09-07
Classification: H01L

Abstract:
1. A method of forming chip scale packages, the method comprising the steps of: forming a block of partially etched lead frames, the lead frames comprising webbed portions, a chip mounting area, a plurality of electrical lead portions, and street portions, attaching an integrated circuit chip to the chip mounting area of the first region of the film; forming electrical connections between one or more terminals on the chip and one or more electrical lead portions on the lead frame; encapsulating the lead frame by applying an encapsulant material over the lead frames and street portions; back-patterning the bottom surface of the lead frames to remove the webbed portions, street portions, and the chip mounting area, whereby all or a substantial portion of the lead frame underlying the integrated circuit chip is removed; and singulating the encapsulant material disposed over the street portions of the lead frame to form individual chip scale packages.