Patent ID: 8537618
Filing Date: 2013-09-17
Classification: G11C

Abstract:
1. An integrated circuit memory device (i) for replacing a NAND memory device comprising a plurality of series-connected memory cells, and (ii) responsive to a NAND-memory controller configured to issue (a) a page program command for transferring a page comprising a plurality of bytes of data into a data buffer of the NAND memory device and, thereafter, transferring the bytes of data from the data buffer simultaneously into memory cells of the NAND memory device in parallelized fashion, and (b) a page read command for transferring a page comprising a plurality of bytes of data simultaneously from memory cells of the NAND memory device into the data buffer of the NAND memory device in parallelized fashion and, thereafter, reading the page of data out of the data buffer, the integrated circuit memory device comprising: a plurality of memory cells configured in an internal random access architecture; and a command-based interface comprising circuitry configured to: