Patent ID: 8445348
Filing Date: 2013-05-21
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor component with a nanowire channel, comprising: forming a stack structure on a substrate, the stack structure at least comprising a first TEOS layer, a first intermediate material layer and a second TEOS layer from a bottom to a top; patterning the stack structure to form a channel region; removing the first intermediate material layer inside the channel region to form at least a fillister on one side of the stack structure; forming a semiconductor layer on the substrate and the stack structure and filling into the fillister; patterning the semiconductor layer to form a source area and a drain area, and the channel region being located between the source area and the drain area; removing the semiconductor layer located outside the source area, the drain area and the fillister; removing the stack structure to expose the semiconductor layer inside the fillister to form a channel; forming a gate oxide layer to cover the channel; and forming a gate layer on the gate oxide layer.