Patent ID: 6119250
Filing Date: 2000-09-12
Classification: G01R

Abstract:
A semiconductor integrated circuit comprising:a test-target circuit, constructed of a plurality of circuit blocks each including MOS transistors having a first threshold voltage, for being subjected to a test;power supply line switch means, disposed on a power supply line of each said circuit block and constructed of MOS transistors having a second threshold voltage in excess of said first threshold voltage, for switching a path of a current flowing in each said circuit block to a normal current path or to a test mode current path;circuit block selection means for selecting from among said plurality of circuit blocks a desired circuit block that is required to make a switch in current path to said test mode current path during a test mode of operation; andtest means for generating, at the time when the value of a current flowing in said switched test mode current path in said selected circuit block exceeds a predetermined reference value, a specified signal indicating that said selected circuit block fails to operate normally.