Patent ID: 7356076
Filing Date: 2008-04-08
Classification: H04J

Abstract:
1. In a transceiver chip used in high-speed serial data communications, a method to aid said transceiver chip in recovering from a system-side, out-bound clocking problem, said method comprising: detecting, within said transceiver chip, a problem with a primary clock signal used to clock data from said system-side of said transceiver chip through at least a part of an out-bound data path of said transceiver chip; substituting said primary clock signal with a secondary clock signal generated within said transceiver chip when said problem is detected, to clock data from said system-side through said at least a part of said out-bound data path of said transceiver chip; detecting, within said transceiver chip, a recovery of said primary clock signal; switching from said secondary clock signal to said primary clock signal, when said recovery is detected, to clock data from said system-side through said at least a part of said out-bound data path of said transceiver chip; and resetting, automatically, certain discrete circuits of said out-bound data path of said transceiver chip, without system level intervention, after performing said switching.