Patent ID: 7180118
Filing Date: 2007-02-20
Classification: H01L

Abstract:
1. A semiconductor device comprising: bit lines formed on a semiconductor substrate; an insulating layer formed on the semiconductor substrate having the bit lines; an etch stop layer formed on the insulating layer; storage node contact bodies which are electrically connected to the semiconductor substrate extending through the etch stop layer and the insulating layer; landing pads formed on the etch stop layer and formed on at least a portion of the storage node contact bodies, the landing pads including larger landing pads and smaller landing pads alternately formed in a lengthwise direction of the bit lines and electrically connected to the storage node contact bodies; and storage nodes formed on the landing pads, the storage nodes having at least outward sidewalls that are substantially exposed, wherein the storage nodes are arranged at an angel to each other in a lengthwise direction of the bit lines such that the storage nodes are disposed in a zigzag pattern, and wherein the bit lines are disposed between the storage nodes.