Patent ID: 6010967
Filing Date: 2000-01-04
Classification: H01L,Y10S

Abstract:
A plasma etching method comprising:positioning a semiconductor wafer over an electrostatic chuck within an inductively coupled plasma etch chamber, the semiconductor wafer having a photoresist layer formed over an insulative oxide layer, the photoresist layer having contact opening patterns formed therethrough;first plasma etching contact openings within the insulative oxide on the semiconductor wafer through the contact opening patterns formed in the photoresist layer with a gas comprising carbon and fluorine, a polymer comprising carbon and fluorine forming over at least some internal surfaces of the plasma etch chamber during the first plasma etching; andafter the first plasma etching and with the wafer over the electrostatic chuck, second plasma etching polymer material from the chamber internal surfaces while providing the electrostatic chuck at a bias power effective to produce an ac peak voltage at the wafer surface of greater than zero and less than 150 Volts to restrict any widening of the contact openings formed in the insulative oxide to less than 0.010 micron resulting from further etching of the material on the semiconductor wafer during the second plasma etching.