Patent ID: 6348950
Filing Date: 2002-02-19
Classification: H04N

Abstract:
A video signal processing circuit comprising:first and second line memories for storing an inputted luminance signal, each having a memory capacity larger than a data amount of one line of the luminance signals; third and fourth line memories for storing an inputted color difference signal, each having a memory capacity larger than a data amount of one line of the color difference signals; first count means for indicating a space line position of each of the luminance signal and the color difference signal to be written in the first to fourth line memories; second count means for indicating a space line position of a luminance signal to be outputted; third count means for indicating a space line position of a color difference signal to be outputted; writing and reading means for alternately writing the inputted luminance signal into the first and second line memories every line in a ring method, alternately writing the inputted color difference signal every line into the third and fourth line memories in a ring method, determining a read start position and a read start timing of each of the luminance signals written in the first and second line memories and the color difference signals written in the third and fourth line memories by using integer parts of the first to third count means, and reading the written luminance and color difference signals; coefficient generating means for generating first to fourth coefficients by using decimal fraction parts of the second and third count means; a first multiplier for multiplying the luminance signal read from the first line memory by the signal writing and reading means by the first coefficient generated by the coefficient generating means; a second multiplier for multiplying the luminance signal read from the second line memory by the signal writing and reading means by the second coefficient generated by the coefficient generating means; a third multiplier for multiplying the color difference signal read from the third line memory by the signal writing and reading means by the third coefficient generated by the coefficient generating means; a fourth multiplier for multiplying the color difference signal read from the fourth line memory by the signal writing and reading means by the fourth coefficient generated by the coefficient generating means; a first adder for adding outputs of the first and second multipliers to generate a luminance signal whose space line position is shown by the second count means, and outputting the luminance signal; and a second adder for adding outputs of the third and fourth multipliers to generate a color difference signal whose space line position is shown by the third count means, and outputting the color difference signal.