Patent ID: 6128714
Filing Date: 2000-10-03
Classification: G06F

Abstract:
An information processing apparatus comprising:a storage unit including a plurality of storage modules, said storage modules being assignable to a main storage or to an extended storage;a first address array connected to said respective storage modules and having address entries for a plurality of storage modules assigned to said main storage within said plurality of storage modules, each of said address entries including a flag assignable to either one of said main storage or said extended storage;a second address array connected to said respective storage modules and having address entries for a plurality of storage modules assigned to said extended storage within said plurality of storage modules, each of said address entries including a flag assignable to either one of said main storage or said extended storage;a system controller, responsive to a data move instruction for moving data between said main storage and said extended storage, operative to re-write an address entry indicative of a storage module specified by said move instruction to assign said flag in said address entry to one of said main storage and said extended storage;at least one instruction processor connected to said system controller for issuing data move instructions to said system controller,wherein said system controller sequentially executes a plurality of data move instructions sent thereto from said instruction processor; andfirst and second latches, respectively connected to said first and second address arrays, for latching outputs of said respective first and second address arrays,said first and second latches both being connected to each of said plurality of storage modules;wherein said first and second latches simultaneously output respective outputs from said first and second arrays to said plurality of modules in parallel.