Patent ID: 8384123
Filing Date: 2013-02-26
Classification: H01L

Abstract:
1. A semiconductor device, comprising: an insulated gate bipolar transistor element of the configuration where an emitter and a gate are formed on the front side thereof, using a p-type substrate as a collector and an n layer as a base, on a semiconductor substrate composed of the p-type substrate and the n layer formed on the p-type substrate, and in which a defect layer in which many crystal defects are introduced is formed in the semiconductor substrate, wherein the defect layer in an active region where the insulated gate bipolar transistor element is formed on the semiconductor substrate, is a n-type defect layer formed in the n layer or a p-type defect layer formed in the p-type substrate, the defect layer in a non-active region where the insulated gate bipolar transistor element is not formed on the semiconductor substrate, is a p-type defect layer formed in the p-type substrate, and the defect layer in the active region is formed at a shallower position than the defect layer in the non-active region, when viewed from the surface.