Patent ID: 8174214
Filing Date: 2012-05-08
Classification: H02M

Abstract:
1. A three-phase bridge rectifier circuit connectable to at least one AC voltage source via a plurality of input lines and to a load via a pair of output lines, said at least one AC voltage source configured to supply said three-phase bridge rectifier circuit with a plurality of AC voltage waveforms that differ in phase by a certain amount, said three-phase bridge rectifier circuit comprising: first and second field effect transistors of different channel types, a source-drain path of said first field effect transistor connected in series with a source-drain path of said second field effect transistor to form a first series transistor combination connected across said pair of output lines; third and fourth field effect transistors of different channel types, a source-drain path of said third field effect transistor connected in series with a source-drain path of said fourth field effect transistor to form a second series transistor combination connected across said pair of output lines; fifth and sixth field effect transistors of different channel types, a source-drain path of said fifth field effect transistor connected in series with a source-drain path of said sixth field effect transistor to form a third series transistor combination connected across said pair of output lines; a plurality of gate drive circuits configured to sense voltages applied on said plurality of input lines and supply a voltage to gates of said field effect transistors for switching said field effect transistors to their “on” states at certain times determined based on said sensed voltages, each having a first terminal connected to a gate of said respective one of said field effect transistors, a second terminal coupled to a source of a respective one of said field effect transistors, and a third terminal connected to a respective voltage tap provided by a voltage divider circuit; and a plurality of diodes, each connected directly between a drain of a first transistor of said field effect transistors and said third terminal of a respective one of said plurality of gate drive circuits that is provided for a second transistor of said field effect transistors that is different than said first transistor.