Patent ID: 6411663
Filing Date: 2002-06-25
Classification: H03M,H04L

Abstract:
A convolutional coder for performing a rate 1/N convolutional coding and a rate 1/M convolutional coding, wherein N and M are positive integers and Ma convolutional code generator for generating N convolutional coding bits based on N generator polynominals, a parallel/serial converter for converting the convolutional coding bits to a serial convolutional coding sequence, a rate indicator for indicating a convolutional coding rate of either the rate 1/N convolutional coding or the rate 1/M convolutional coding, and a selector for providing the N convolutional coding bits when performing the rate 1/N convolutional coding, and for providing M convolutional coding bits generated by M generator polynominals common to the rate 1/N convolutional coding and the rate 1/M convolutional coding and for nullifying (Nâˆ’M) convolutional coding bits generated by other (Nâˆ’M) generator polynominals for the rate 1/N convolutional coding when performing the rate 1/M convolutional coding.