Patent ID: 7042041
Filing Date: 2006-05-09
Classification: H01L

Abstract:
1. A semiconductor device comprising: a capacitor provided above a substrate and formed by sandwiching a capacitive insulating film between lower and upper electrodes; an interlayer insulating film of an n-th layer (n is 1 or greater integer) provided above the substrate to cover the capacitor; and a plurality of plugs and a plurality of wirings provided above the substrate, wherein an electrode wiring among the wirings which is electrically connected to the lower or upper electrode in the interlayer insulating film of the n-th layer is formed into an isolated island shape so as not to be laid on an edge part of each electrode above the capacitor, and the upper electrode is formed smaller than the lower electrode, the lower and upper electrodes are electrically connected to respective electrode upper-layer wiring via respective electrode wirings; and the respective electrode upper-layer wiring are among the wiring provided in an interlayer insulating film of an (n+1)-th layer or more.