Patent ID: 7961519
Filing Date: 2011-06-14
Classification: G11C

Abstract:
1. A memory, comprising: at least one word line; a plurality of dynamic reference (Dref) cells coupled to the word line, wherein the plurality of Dref cells is arranged to form a first Dref area and a second Dref area; a plurality of memory cells that is coupled to the word line, wherein the plurality of memory cells is arranged to form a data area that is positioned between the first Dref area and the second Dref area; one or more sense amplifiers; and a switch component that is arranged to receive addressing data, wherein the switch component is configured to independently couple one of the first Dref area or the second Dref area to the sense amplifiers based, at least in part, on a physical proximity of individual memory cells in the plurality of memory cells along the word line.