Patent ID: 7566404
Filing Date: 2009-07-28
Classification: C23F,H01L

Abstract:
1. A method for fabricating a thin film transistor, comprising: forming a first conductive layer on a substrate, wherein the first conductive layer is a composite layer or a single metal layer; performing a first etching process to pattern the first conductive layer so as to form a gate; forming a dielectric layer to cover the gate; forming a channel layer on the dielectric layer; forming a second conductive layer on the channel layer, wherein the second conductive layer is a composite layer or a single metal layer; and performing a second etching process to pattern the second conductive layer so as to form a source and a drain, wherein an etchant used in both of the first etching process and the second etching process comprises peracetic acid, a peracetic acid stabilizer, an organic acid, an inorganic acid, a salt and water.