Patent ID: 8698278
Filing Date: 2014-04-15
Classification: H01L,H05K

Abstract:
1. A component-incorporated wiring substrate comprising: a core substrate having a core main surface and a core back surface and having an accommodation hole portion which opens at least on a side toward the core main surface; a first capacitor which has a capacitor main surface and a capacitor back surface and is accommodated in the accommodation hole portion in such a state that the core main surface and the capacitor main surface face the same side; a wiring laminate portion configured such that interlayer insulation layers and conductor layers are laminated alternatingly on the core main surface, and having a component-mounting region which is set on a surface of the wiring laminate portion and in which a component can be mounted; and a second capacitor which has an electrode layer having a first main surface and a second main surface, and a dielectric layer that comprises a dielectric ceramic as a main component formed only on one or both of the first main surface and the second main surface of the electrode layer, is embedded in the wiring laminate portion in such a state that the first main surface and the second main surface are in parallel with the surface of the wiring laminate portion, and is disposed between the first capacitor and the component-mounting region; wherein: