Patent ID: 6399456
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method for fabricating a resistor and a capacitor electrode in an integrated circuit constructed on a semiconductor substrate that is already formed with a plurality of isolation structures defining a plurality of active regions with a silicon nitride layer being formed over each of the active regions, the method comprising the steps of:forming a polysilicon layer covering all of the isolation structures and the active regions, wherein the polysilicon layer is partitioned by definition into a resistor part and an electrode part; forming an oxide layer over the polysilicon layer; performing a first ion-implantation process, wherein the ions penetrates through the oxide layer to convert the entire polysilicon layer into a lightly-doped polysilicon layer with a first impurity concentration; performing a second ion-implantation process solely on the electrode part of the polysilicon layer so as to convert the electrode part of the polysilicon layer into a heavily-doped polysilicon layer with a second impurity concentration being higher than the first impurity concentration, wherein the ions penetrates through the oxide layer; and performing a selective removal process to remove selected parts of the lightly-doped polysilicon layer and the heavily-doped polysilicon layer in such a manner as to expose all the silicon nitride layers, with the remaining part of the lightly-doped polysilicon layer serving as the intended resistor and the remaining part of the heavily-doped polysilicon layer serving as the intended capacitor electrode.