Patent ID: 6658584
Filing Date: 2003-12-02
Classification: G06F

Abstract:
A method of counting and storing the number of occurrences of each of a plurality of events occurring in a processor complex, which processor complex has at least one processor which processes multiple groups of data in a multiplicity of ways comprising the steps of:providing a plurality of arrays of memory storage for storing count information of each event; providing a plurality of separately addressable groups of memory addresses in each array of memory; providing at least one counter associated with each array of memory; providing a table which contains information including a point of reference in each array to uniquely define the structure and location of each array of memory; said at least one processor generating a plurality of parameters for each of said events to uniquely identify each said event; providing a counter manager communicating with said at least one processor and said memory arrays; passing the parameters of each said event generated by said at least one processor to said counter manager; said counter manager, utilizing said table and said parameters of information from said at least one processor, determining the unique physical address location associated with said event, reading the data from said determined address, modifying the read data and writing the modified data to the said determined addresses.