Patent ID: 6806529
Filing Date: 2004-10-19
Classification: H01L

Abstract:
A memory cell comprising:a semiconductor material of a first conductivity type; spaced apart source and drain regions of a second conductivity type formed in the semiconductor material; a channel region located between the source and drain regions; a first insulation layer formed over the channel region; a first conductive structure formed on the first insulation layer over the channel region; an isolation material contacting the first conductive structure; and a capacitive structure including: a plurality of first horizontal sections, the first horizontal sections being conductive; a plurality of first vertical sections connected to the plurality of first horizontal sections such that a first vertical section is connected to each first horizontal section, the first vertical sections being conductive and having different vertical dimensions, a first select horizontal section and a first select vertical section connected to the first select horizontal section being electrically connected to the first conductive structure; a plurality of second horizontal sections the second horizontal sections being conductive; a plurality of second vertical sections connected to the plurality of second horizontal sections such that a second vertical section is connected to each second horizontal section, the second vertical sections being conductive and having different vertical dimensions; and a plurality of dielectric regions, each dielectric region being connected to a first horizontal section a first vertical section, a second horizontal section, and a second vertical section.