Patent ID: 6920578
Filing Date: 2005-07-19
Classification: G06F

Abstract:
1. A data transfer apparatus for transferring data from a first clock domain to a second clock domain, the data transfer apparatus comprising: a first bank of registers having an input and an output, wherein the input receives a first size of data and the output outputs a second size of data in which the second size of data is twice the first size of data; a second bank of registers having an input and an output, wherein the input receives a first size of data and the output outputs a second size of data in which the second size is twice the first size; and a switch having a first input connected to the output of the first bank of registers, a second input connected to the output of the second bank of registers and an output, wherein the switch selects data from one of the first bank of registers and a second bank of registers for output at the output to the second clock domain; wherein the switch is a multiplexer, wherein filling of data and transferring of data occurs in an alternating fashion between the first bank of registers and the second bank of registers such that one bank of registers is filled with data while another bank of registers transfers data to a synchronizer unit and wherein the first bank of registers comprises;