Patent ID: 7234130
Filing Date: 2007-06-19
Classification: G03F,G06F,Y02P

Abstract:
1. A method for compensating an integrated circuit layout for variations in flare intensity within different regions of the integrated circuit, comprising: receiving at least a portion of an integrated circuit layout having a number of data layers that define features to be created in a layer of the integrated circuit; estimating a flare intensity in a number of regions of the integrated circuit; dividing the estimated flare intensity values into a number of ranges between a lowest flare intensity value and a highest flare intensity value; creating a number of additional data layers, each of which is associated with a different range of flare intensity values and associating features to be created in the layer of the integrated circuit with one or more of the additional data layers; and processing the features associated with each of the additional data layers with a resolution enhancement technique that is selected or adjusted for the range of flare intensity values associated with the additional data layer.