Patent ID: 7116575
Filing Date: 2006-10-03
Classification: G11C

Abstract:
1. In a magnetoresistive memory array, a memory cell comprising: a first dynamic read ring-shaped multilayer magnetoresistive element having an inner circumference, an outer circumference, a top edge, and a bottom edge, wherein the inner circumference defines a center hole of the element, wherein the multilayer includes a spacer layer sandwiched by a first magnetic layer and a second magnetic layer; a row write line threaded through the center hole and electrically isolated from the element, the row write line coupled to a first power source for providing a row write current; a column write line threaded through the center hole and electrically isolated from the element, the column write line coupled to a second power source for providing a column write current; a bit line coupled in series with the element such that a current flowing through the bit line passes perpendicularly through the spacer layer of the element, wherein the bit line includes a first segment coupled through the first ring-shaped element and a second segment coupled through the second ring-shaped element; and a pair of transistors controlled by a select line, wherein each segment of the bit line is coupled to a ground through one of the transistors, whereby activation of the select line closes a circuit allowing a current to pass through the layers of the ring-shaped elements.