Patent ID: 8879548
Filing Date: 2014-11-04
Classification: H04L

Abstract:
1. An alignment circuit that is provided on a side of receiving a packet to which a sequence number according to an order of transmission is attached, and receives packet information including a sequence number of a target packet which is a currently-received packet, the alignment circuit comprising: an alignment buffer including a plurality of areas into which the packet information is to be written, the plurality of areas being sequentially arranged; a writing circuit that receives a selection signal indicating one of the plurality of areas of the alignment buffer and writes the packet information of the target packet into the alignment buffer according to the selection signal; and a control circuit that generates the selection signal for the target packet to supply the selection signal to the writing circuit, wherein when a head area of the alignment buffer is an unwritten area which is an area where the packet information has not been written, the control circuit generates the selection signal indicating the head area, when the head area of the alignment buffer is a written area which is an area where the packet information has been written, the control circuit acquires the sequence number of the target packet from the packet information of the target packet, and performs a search of a boundary area which is a head area among each of written areas to which the packet information including sequence numbers larger than the acquired sequence number is written by sequentially performing comparison between the sequence number included in the packet information written in the written area and the sequence number of the target packet in an order from a head to a tail of the alignment buffer, the control circuit generates the selection signal indicating the boundary area when the boundary area could be detected as a result of the search, whereas the control circuit generates the selection signal indicating a next area of a last written area when the boundary area could not be detected even when the search reaches a written area in the tail, and the writing circuit shifts data stored in the respective areas by one area from an area indicated by the selection signal in a direction to the tail of the alignment buffer, and writes the packet information of the target packet into the area indicated by the selection signal.