Patent ID: 9136837
Filing Date: 2015-09-15
Classification: H02H,H03K

Abstract:
1. A switching circuit for supplying a voltage from a connected power supply to a load, the switching circuit comprising: a first MOS transistor having a gate, a drain connected to a first terminal, and a source and a back gate that are connected to each other; a second MOS transistor having a drain connected to the first terminal, a source connected to a second terminal, a gate connected to the gate of the first MOS transistor, and a back gate connected to the source of the first MOS transistor; a potential control circuit configured to control a current flowing between the source of the first MOS transistor and a third terminal such that a potential of the source of the first MOS transistor and a potential of the source of the second MOS transistor are equal; and a switching control circuit configured to turn off the first MOS transistor and the second MOS transistor by outputting a control signal to the gate of the first MOS transistor and the gate of the second MOS transistor when a potential at a fourth terminal is higher than a potential at the first terminal, wherein the second MOS transistor comprises: a first semiconductor layer of a first conductive type on a semiconductor substrate and having a first impurity concentration, the first semiconductor layer being the drain; a second semiconductor layer of the first conductive type on the first semiconductor layer and having a second impurity concentration lower than the first impurity concentration; a third semiconductor layer of a second conductive type on the second semiconductor layer and being the back gate; a first gate electrode adjacent to the second semiconductor layer and the third semiconductor layer via a first gate insulating film; a second gate electrode adjacent to the second semiconductor layer and the third semiconductor layer via a second gate insulating film; a first diffusion layer of the first conductive type on an upper surface of the third semiconductor layer and adjacent to the first gate electrode via the first gate insulating film; a second diffusion layer of the first conductive type on the upper surface of the third semiconductor layer and adjacent to the second gate electrode via the second gate insulating film; a first insulating film between the first diffusion layer and the second diffusion layer; and a source electrode on the first diffusion layer and the second diffusion layer.