Patent ID: 7518423
Filing Date: 2009-04-14
Classification: H03L

Abstract:
1. A digital DLL circuit comprising: a register configured to hold a delay target value; an oscillator; a first counter configured to count an external reference clock or an oscillation output from the oscillator in order to determine a measurement cycle; a second counter configured to count the oscillation output from the oscillator or the external reference clock in every measurement cycle determined by the first counter; a digitally-controlled variable delay circuit; and a control circuit configured to control the reset and activation of the first counter and the second counter, and control the stop of the first and second counters according to need, based on a count value of the first counter, the control circuit subjecting a count value of the second counter and the delay target value of the register to a digital arithmetic operation, and supplying the variable delay circuit with a result of the arithmetic operation as a delay control value.