Patent ID: 7904840
Filing Date: 2011-03-08
Classification: G06F

Abstract:
1. A method of redistributing white space within an integrated circuit floorplan to realize an efficiently arranged integrated circuit, comprising the steps of: providing the integrated circuit floorplan within which are located a plurality of circuit blocks to be efficiently arranged on the integrated circuit; determining where to place the circuit blocks on the integrated circuit to obtain a floor plan having minimized white space; redistributing the circuit blocks, from the floorplan having minimized white space, to obtain a minimal total wire length and optimized circuit block arrangement for the integrated circuit, including constructing a network graph, computing a residual graph derived from the network graph, and applying a shortest path algorithm on the residual graph to give positions for all of the circuit blocks on the integrated circuit; and using a computer system, executing a block redistributing program, to perform the redistributing step.