Patent ID: 9135012
Filing Date: 2015-09-15
Classification: G06F

Abstract:
1. A system for instruction filtering, the system comprising: a memory configured to store instructions accessible by a processor; and the processor comprising a tracking array and a tracked instruction logic block, wherein the processor is configured to perform a method comprising: detecting, by the processor, a tracked instruction in an instruction stream; storing an instruction address of the tracked instruction in the tracking array based on detecting and executing the tracked instruction; accessing the tracking array based on an address of instruction data of a subsequently fetched instruction to locate the instruction address of the tracked instruction in the tracking array as an indication of the tracked instruction; marking, by the processor, instruction text of the subsequently fetched instruction to indicate that the subsequently fetched instruction is a previously executed tracked instruction based on the indication of the tracked instruction from the tracking array; and preventing an action of the tracked instruction logic block based on detecting the marked instruction text.