Patent ID: 6772391
Filing Date: 2004-08-03
Classification: H03M,H04L

Abstract:
A turbo code encoder for encoding at least one input bit set of N bits with permutation position integers I(k), where k=1 to N, comprising:a first encoder with memory size m, having a first input, coupled to a first source and a common source, and a multi-state register having 2m states, for receiving said input bit set as said first source and encoding said input bit set to provide an encoded input bit set at a first output, said first output coupled to said common source; a hybrid S-random interleaver for receiving said input bit set and reordering the bits within said input bit set to provide a reordered input bit set, where S is an arbitrary predetermined value; a second encoder with memory size m, having a second input, coupled to a second source and said common source, and a multi-state register having 2m states, for receiving said reordered input bit set as said second source and second said reordered input bit set to provide reordered encoded input bit set at a second output; and a switch (SW), for switching said first encoder from said first source to said common source and for switching said second encoder from said second source to said common source; whereby said interleaver reorders sad integers I(k) such that once reordered, the value for |I(k)âˆ’I(kâˆ’nL)| is not evenly divisible by L, where L=2mâˆ’1, and n is a positive integer defined as kâˆ’nL&gE;0 and nL&lE;S.