Patent ID: 6475875
Filing Date: 2002-11-05
Classification: H01L

Abstract:
A method of forming insulator filled, shallow trench isolation (STI), regions in a semiconductor substrate, comprising the steps of:growing a first silicon dioxide layer on said semiconductor substrate; depositing a silicon nitride layer; forming shallow trench shapes in said silicon nitride layer, in said first silicon dioxide layer, and in a top portion of said semiconductor substrate; growing a second silicon dioxide layer on surfaces of said semiconductor substrate exposed in said shallow trench shapes; depositing a first silicon oxide layer, with a first portion of said first silicon oxide layer located on the top surface of said silicon nitride layer, and with a second portion of said first silicon oxide layer filling said shallow trench shapes; depositing a thin stop layer; depositing a second silicon oxide layer on said thin stop layer, removing first portions of said second silicon oxide layer, first portions of said thin stop layer, and said first portions of said first silicon oxide layer, from top surface of said silicon nitride layer, leaving second portions of said second silicon oxide layer, and second portions of said thin stop layer, on said second portions of said first silicon oxide layer, located in said shallow trench shapes; selectively removing said second portions of said second silicon oxide layer from the top surface of said second portions of said thin stop layer; performing a thermal oxidation procedure to convert said second portions of said thin stop layer to an oxidized stop layer; selectively removing said silicon nitride layer; and removing said first silicon dioxide layer resulting in said insulator filled, STI regions located in said top portion of said semiconductor substrate.