Patent ID: 6780673
Filing Date: 2004-08-24
Classification: H01L,Y10T

Abstract:
A method of forming a package for an integrated circuit device, comprising the steps of:providing a package substrate; forming an electrically conductive layer on a surface of said package substrate; patterning said electrical conductive layer to form conductive contact pads on a surface of said package substrate and to form a plate layer on said surface of said package substrate, the plate layer being spaced from the contact pads and having a thickness substantially equal to the thickness of the pads; providing a semiconductor device having regions containing solder alignable with said contact pads and aligning and contacting said regions containing solder with said contact pads; and then forming an electrically insulating underfill layer disposed over said plate layer and surrounding said conductive pads and filling the region between said semiconductor device and said package substrate.