Patent ID: 7689789
Filing Date: 2010-03-30
Classification: G06F,Y10S

Abstract:
1. A data processing system having one or more processors, a memory and a communication pathway between the one or more processors and the memory, said system being adapted to avoid unnecessary grace period token processing while detecting a grace period for deferring a removal by one of said processors of a shared data element until pre-existing references to the data element maintained by other of said processors are removed, and comprising: a token to be circulated between said processors; a token manipulator associated with each of said processors adapted to circulate said token and determine whether said grace period has elapsed by virtue of said token making a round trip through said processors; a distributed indicator associated with each of said processors that is indicative of whether there is a need to perform removal processing at any of said processors relative to any data element shared by said processors; a distributed indicator handling mechanism associated with each of said processors adapted to process said distributed indicator before token processing by said token manipulator; and said distributed indicator handling mechanisms being further adapted to permit said token manipulators to performing token processing at said processors only when warranted by said distributed indicator.