Patent ID: 6480424
Filing Date: 2002-11-12
Classification: G11C

Abstract:
A RAM with analog multiplex sensing means comprising:an odd block of data cells including a plurality of data cell subsets, wherein each of the data cell subsets is coupled to a respective odd bit line; an even block of data cells including a plurality of data cell subsets, wherein each of the data cell subsets is coupled to a respective even bit line; a plurality of local sense amplifiers positioned between the odd block of data cells and the even block of data cells, each local sense amplifier of the plurality of local sense amplifiers is shared by a respective odd bit line, a respective even bit line, and a respective global bit line; a global sense amplifier electrically coupled to a subset of the plurality of local sense amplifiers by a set of respective global bit lines and having a higher signal driving capability than each of the plurality of local sense amplifiers, wherein one of the set of respective global bit lines is selected for superimposing a signal development on a respective local bit line to be sensed by a respective local sense amplifier and wherein, other global bit lines in the set of respective global bit lines are decoupled from the respective local sense amplifiers.