Patent ID: 7221203
Filing Date: 2007-05-22
Classification: H02M,H03K

Abstract:
1. A pulse width modulator circuit for generating a reference signal having a desired duty cycle comprising: an adjustment unit including at least one storage register and a counter, the storage register being configured for storing values corresponding to the desired duty cycle at least approximately and which are set during a working cycle in the pulse width modulator circuit for generating a reference signal, and the counter setting a cycle count (Y) indicating how often a stored first value (X) is read during the working cycle (A) from the storage register, wherein the first value stored in the storage register is variable upon reaching the cycle count (Y) to store a second value (X+1) which is set for the remainder of the working cycle after the cycle count (Y) is reached; and an adder which receives the stored first value from the storage register and changes it upon reaching the cycle count (Y) to generate a second value (X+1) which is set for the remainder of the working cycle after the cycle count (Y) is reached.