Patent ID: 6400425
Filing Date: 2002-06-04
Classification: G02F

Abstract:
An array substrate for a liquid crystal display (LCD) device, comprising:a substrate; a plurality of gate lines, a plurality of first and second gate pads at each end of the gate lines, first and second gate shorting bars, and a plurality of first and second gate shorting bar connectors connecting the first and second gate pads to the first and second gate shorting bars, respectively, on the substrate; a first insulation layer over the substrate and covering the gate lines, the gate pads, the gate shorting bar connectors and the gate shorting bars; a plurality of source lines, a plurality of first and second source pads at each end of the source lines, first and second source shorting bars, and a plurality of first and second source shorting bar connectors connecting the first and second source pads to the first and second source shorting bars, respectively, on the first insulating layer; a second insulation layer over the source lines, the source pads, the source shorting bar connectors and the source shorting bars; wherein the first insulation layer and the second insulation layer have gate cutting holes penetrating the first and second insulation layers and the gate shorting bar connectors, the gate cutting holes being formed between the first gate shorting bar and the second gate pads and between the second gate shorting bar and the first gate pads; wherein the second insulation layer has source cutting holes penetrating the second insulation layer and the source shorting bar connectors, the source cutting holes being formed between the first source shorting bar and the second source pads and between the second source shorting bar and the first source pads; and wherein at least one of the gate and source cutting holes has an uneven side portion.