Patent ID: 9054524
Filing Date: 2015-06-09
Classification: H01L,H02H

Abstract:
1. A bi-directional bipolar junction transistor (BJT) comprising: a p-type substrate; an N+ doped buried layer disposed adjacent to the substrate; a first P-type well region disposed adjacent to the N+ doped buried layer; a second P-type well region disposed adjacent to the N+ doped buried layer; and an N-type well region adjacent to the N+ doped buried layer and encompassing the first and second P-type well regions such that at least a portion of the N-type well region is interposed between the first and second P-type well regions; wherein the first P-type well comprises first, second, and third N+ doped plates, first and second P+ doped plates, and first and second gate structures, the first P+ doped plate being disposed adjacent to the first N+ doped plate, the first gate structure being interposed between the first and second N+ doped plate, the second gate structure being interposed between the second and third N+ doped plate, and the second P+ doped plate being disposed adjacent to the third N+ doped plate; and wherein the second P-type well comprises fourth, fifth, and sixth N+ doped plates, third and fourth P+ doped plates, and third and fourth gate structures, the third P+ doped plate being disposed adjacent to the fourth N+ doped plate, the third gate structure being interposed between the fourth and fifth N+ doped plate, the fourth gate structure being interposed between the fifth and sixth N+ doped plate, and the fourth P+ doped plate being disposed adjacent to the sixth N+ doped plate.