Patent ID: 9194911
Filing Date: 2015-11-24
Classification: G01R

Abstract:
1. An on-die test engine coupled with a circuit under test (CUT), the CUT comprising both an analog/RF domain and a digital domain, the on-die test engine to generate a sub-sampled data stream suitable for testing of the CUT, the on-die test engine comprising: a programmable core comprising a microcontroller and a software program executable by the microcontroller; an input subsystem to: wherein the first type consists of consecutive and non-consecutive samples from the data stream, the first type of sub-sampled data stream to be suitable for a test that is insensitive to the number of samples dropped from the data stream; wherein the second type consists of samples from the data stream that are contiguous in time, the second type of sub-sampled data stream to be suitable for a second test that operates using periodic samples that are contiguous; wherein the third type consists of samples with a burst length of one captured every K*T