Patent ID: 7821040
Filing Date: 2010-10-26
Classification: G02F,H01L

Abstract:
1. A thin film transistor substrate comprising: a substrate including a display area and a non-display area located at a periphery of the display area; a plurality of gate lines on the substrate; a plurality of data lines crossing the gate lines; a gate insulating layer disposed between the gate lines and the data lines; a plurality of thin film transistors each of which is connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines; a plurality of pixel electrodes disposed in the display area and connected to the thin film transistors, respectively; a plurality of first data signal supply lines on the substrate in the non-display area; a plurality of second data signal supply lines on the gate insulating layer, the second data supply lines alternating with the first data signal supply lines; a plurality of first bridge electrodes, each of which connects through a plurality of contact holes a first data signal supply line of the plurality of first data signal supply lines to a corresponding data line of the data lines; and a plurality of second bridge electrodes, each of which connects through a plurality of contact holes a second data signal supply line of the plurality of second data signal supply lines to a corresponding data line of the data lines.