Patent ID: 7939930
Filing Date: 2011-05-10
Classification: H01L,H05K

Abstract:
1. An integrated circuit device, comprising: at least one layer forming a plane and having a plurality of interconnects passing through at least a portion of the layer; the interconnects having a longitudinal axis substantially perpendicular to the plane and including an arrangement pattern which reduces or eliminates cross-talk between nearest neighboring interconnects, wherein the interconnects include a first differentially driven signal conductor pair with conductors arranged next to each other in a first direction and a second differentially driven signal conductor pair arranged in a second direction substantially perpendicular to the first direction, and the arrangement pattern includes the second differentially driven signal conductor pair disposed substantially equidistant from each of the first differentially driven signal conductor pair, and a ground structure located centrally with respect to both the first differentially driven signal conductor pair and the second differentially driven signal conductor pair, said ground structure being substantially equidistant to each conductor in the first differentially driven signal conductor pair and the second differentially driven signal conductor pair.