Patent ID: 6928135
Filing Date: 2005-08-09
Classification: G11C

Abstract:
1. A shift register comprising: an output circuit including a first transistor having a first conductive path between a first clock terminal and an output terminal, and a second transistor having a second conductive path between the output terminal and a voltage electrode; an input circuit including a third transistor having a third conductive path between an input terminal and a control electrode of the first transistor, and a fourth transistor having a fourth conductive path between the input terminal and a control electrode of the second transistor; a reset circuit including a fifth transistor having a fifth conductive path between a second clock terminal and the control electrode of the second transistor, and a sixth transistor having a sixth conductive path between the control electrode of the first transistor and the control electrode of the second transistor; and an anti-reversal circuit configured to prevent a voltage level at the control electrode of the second transistor from being reversed when a voltage level of a first clock signal inputted to the first clock terminal is reversed in the state where the first transistor is turned on and the second transistor is turned off, wherein the anti-reversal circuit further includes: a seventh transistor having a seventh conductive path between the control electrode of the first transistor and the voltage electrode; and an eighth transistor having a eighth conductive path between the control electrode of the second transistor, the first clock terminal and the seventh transistor.