Patent ID: 6987058
Filing Date: 2006-01-17
Classification: H01L

Abstract:
1. A method of packaging a semiconductor die assembly, comprising: providing at least one semiconductor die having an active surface with at least one bond pad exposed thereon, a back surface, and peripheral edges; providing a carrier substrate having a first surface with at least one contact pad exposed thereon, a second surface, and an opening between first and second surfaces; forming a dam on the first surface of the carrier substrate around the at least one contact pad and the opening; attaching the second surface of the carrier substrate to the active surface of the at least one semiconductor die with at least one adhesive element, the at least one adhesive element spacing the canrrier substrate and the at least one semiconductor die apart from each other; disposing at least one intermediate conductive element between the at least one bond pad and the at least one contact pad through the opening; orienting an assembly including the carrier substrate and the at least one semiconductor die such that the dam faces downwardly in an upwardly facing recess of a tool; and introducing a dielectric filler material between the at least one semiconductor die and the carrier substrate at one or more of the peripheral edges of the at least one semiconductor die, such that the dielectric filler material enters the opening, is laterally contained by the dam, and encapsulates the at least one intermediate conductive element.