Patent ID: 9048234
Filing Date: 2015-06-02
Classification: H01L

Abstract:
1. A method of fabricating a stacked microelectronic unit comprising: a) forming a structure including a first microelectronic element having a front face facing a carrier, said first microelectronic element having a first edge extending away from said front face and a first trace extending along said front face towards said first edge; b) removing material from said first edge until at least a portion of said first trace is exposed, said removing of material from said first edge forming an exposed portion of said first trace; c) aligning and joining a second microelectronic element with said structure such that a front face of said second microelectronic element overlies a rear face opposite said front face of said first microelectronic element, said second microelectronic element having a second edge and a second trace extending along said front face of said second microelectronic element towards said second edge; d) removing material from said second edge until at least a portion of said second trace is exposed, said removing of material from said second edge forming an exposed portion of said second trace; e) before step c), forming at least one dielectric layer directly onto said rear face of said first microelectronic element and at least a portion of the exposed portion of said first trace; and f) connecting a lead to at least one of said first and second traces, said lead extending along said at least one dielectric layer.