Patent ID: 6159839
Filing Date: 2000-12-12
Classification: H01L

Abstract:
A method for making polysilicon landing plugs and metal landing plugs with electrical interconnections for contacts on semiconductor integrated circuits comprising the steps of:providing a semiconductor substrate having device areas of a first type and device areas of a second type, and having devices with N.sup.- doped contacts in said device areas of a first type, and having N.sup.+ and P.sup.+ doped contacts in said device areas of a second type;depositing a conformal first etch-stop layer and partially etching back to form sidewall spacers on said devices and to protect said device areas;depositing an insulating layer which is planarized;etching first contact openings in said insulating layer to said first etch-stop layer over said N.sup.- doped contacts in said device areas of a first type, and selectively removing said first etch-stop layer in said first contact openings to expose said N.sup.- doped contacts, wherein said first openings are self-aligned to said devices;depositing an N.sup.+ doped polysilicon layer on said substrate and contacting said N.sup.- doped contacts;etching second openings in said polysilicon layer and said insulating layer to said first etch-stop layer over said N.sup.+ and said P.sup.+ contact regions in said device areas of a second type;selectively etching said first etch-stop layer in said second openings to expose said N.sup.+ and said P.sup.+ contact regions;depositing an electrically conducting barrier layer;depositing a metal layer over said barrier layer sufficiently thick to fill said first and said second openings, and to provide an essentially planar surface;depositing a second etch-stop layer;patterning said second etch-stop layer, said metal layer, said barrier layer, and said polysilicon layer to form interconnecting lines, and concurrently to form N.sup.+ doped said polysilicon landing plugs in said device areas of a first type, and forming said metal landing plugs to said N.sup.+ and said P.sup.+ contact regions in said device areas of a second type, and completing said polysilicon landing plugs and said metal landing plugs and said electrical interconnections.