Patent ID: 7858471
Filing Date: 2010-12-28
Classification: H01L

Abstract:
1. A method of fabricating an access transistor for an integrated circuit device, comprising: forming a doped region in a semiconductor substrate; forming at least one trench through at least a portion of the doped region and into a portion of the semiconductor substrate below the doped region; forming an oxide layer in the at least one trench; depositing a P-type workfunction gate material over at least a portion of the oxide layer in the at least one trench; forming a cap over the P-type workfunction gate material in the at least one trench, the cap having a planar elevationally outermost surface; forming a polysilicon-comprising plug on each of opposing lateral sides of the cap and P-type workfunction gate material; and forming a silicide contact onto each of the polysilicon-comprising plugs, each of said silicide contacts having a planar elevationally outermost surface which is coplanar with the planar elevationally outermost surface of the cap.