Patent ID: 6462399
Filing Date: 2002-10-08
Classification: H01L

Abstract:
A carrier substrate for a semiconductor element, comprising:a substrate with a substantially planar surface having at least one elongated, substantially linear mesa defined by two inclined sidewalls rising therefrom and extending to a top surface of said substrate substantially parallel to said substantially planar surface; an insulator overlying said substantially planar substrate surface and said at least one elongated, substantially linear mesa; and a plurality of traces comprising multiple trace segments each extending over said insulator, said multiple trace segments each oriented transversely to said at least one elongated, substantially linear mesa, said multiple trace segments each mutually parallel and laterally spaced, and each of said multiple trace segments overlying a first portion of said planar substrate surface on a first side of said at least one elongated, substantially linear mesa, over said at least one elongated, substantially linear mesa and onto a second portion of said substantially planar substrate surface on a second side of said at least one elongated, substantially linear mesa.