Patent ID: 6522512
Filing Date: 2003-02-18
Classification: H03K

Abstract:
An anti-latch-up circuit for protecting a signal-reception device from latch-up possibly triggered in the device, comprising: a voltage source activated separately from a signal-transmission device; a diode connected between said voltage source and an input conductor of said signal-reception device so as to become forward-biased when the over voltage in excess of the voltage of said voltage source is applied to said input conductor; buffer means for providing an output of a first logic level or a second logic level in response to a turn-off or turn-on, respectively, of said voltage source; and an output control means for blocking said signal-transmission device from providing an output when said buffer means provides an output of the first logic level and permitting said signal-transmission device to provide an output when said buffer means provides an output of the second logic level.