Patent ID: 7424650
Filing Date: 2008-09-09
Classification: G01R

Abstract:
1. A test circuit for measuring skew, comprising: first and second inverters each including an inverter output, the first inverter coupled to invert a circuit output of a first circuit block, the second inverter coupled to invert a circuit output of a second circuit block; and first and second flip-flops (“FFs”) each including a data input, a clock input, and a data output, the data input of the first FF coupled to the circuit output of the first circuit block, the clock input of the first FF coupled to the circuit output of the second circuit block, the data input of the second FF coupled to the inverter output of the second inverter, and the clock input of the second FF coupled to the inverter output of the first inverter, wherein the test circuit is coupled to measure skew between the circuit outputs of the first and second circuit blocks.