Patent ID: 6291277
Filing Date: 2001-09-18
Classification: H01L,Y10S

Abstract:
A method of manufacturing an integrated semiconductor device on a substrate, comprising steps to manufacture a stack of layers on the substrate, and steps to manufacture circuit elements by means of photolithography including the formation of a centering mask, the formation of a reference pattern through an opening in the mask, and the formation of masks defining circuit elements centered on this reference pattern, characterized in that the method comprises the manufacture of at least one circuit element provided with electrically insulating means in lateral regions, in that the formation of the centering mask of the masks defining the integrated circuit elements is achieved by a first mask defining the lateral insulation regions of this circuit element, in that no centering mask separate from the first mask is used, and in that the formation of the reference pattern is obtained by the pattern formed by etching, through the first mask, to a depth which does not exceed the thickness of the upper layer of the stack of layers in said lateral insulation regions.