Patent ID: 9116403
Filing Date: 2015-08-25
Classification: G02F

Abstract:
1. A display panel comprising: a first substrate at least divided into a first region and a second region; and a second substrate disposed opposite to the first substrate and having multiple data lines and multiple scan lines disposed as a matrix, at least one TFT, and an electrode, wherein, the at least one TFT respectively connects to a corresponding one of the scan lines, a corresponding one of the data lines, and the electrode; wherein, the first region of the first substrate is disposed correspondingly to the scan line and/or data lines on the second substrate, and the first region of the first substrate and the scan lines and/or the data lines form a non-capacitance structure; the second region of the first substrate is disposed correspondingly to a remaining region which is located outside the scan lines and/or the data lines on the second substrate, and the least one TFT and the electrode are disposed inside the remaining region, and at least a part of the second region which is disposed correspondingly to the remaining region is provided with an electrically conductive structure; wherein, the first substrate further comprises a glass substrate made of an insulation material; wherein, the display panel further comprises a liquid crystal interposed between the first substrate and the second substrate; the first substrate further comprises an electrically conductive film disposed inside the second region, and the electrically conductive film is not disposed within the first region; wherein the first substrate further comprises a color resist layer, wherein, the glass substrate, the color resist layer, and the electrically conductive film are stacked sequentially, and the color resist layer is only disposed inside the second region and not disposed at the first region; and wherein, the glass substrate located at the first region directly contacts with the liquid crystal.