Patent ID: 8312203
Filing Date: 2012-11-13
Classification: G06F

Abstract:
1. A semiconductor storage device, comprising: a plurality of flash memory chips; and a memory controller connected to the flash memory chips to control the plurality of flash memory chips, wherein each of the plurality of flash memory chips includes a plurality of physical blocks collectively erasable, wherein each of the plurality of physical blocks is composed of a plurality of physical pages that serve as units for writing instructed from the memory controller, wherein the memory controller divides the plurality of physical pages in each physical block of the plurality of physical blocks into a first physical page set and a second physical page set, wherein the memory controller divides a logical address space corresponding to the plurality of physical blocks into a plurality of logical groups, wherein the memory controller divides each logical group of the plurality of logical groups into a plurality of lines, wherein the memory controller allocates a number of physical blocks from each of the plurality of flash memory chips to each of the plurality of lines, wherein the memory controller creates a standard block unit which is configured by a predetermined number of the physical blocks in each of the plurality of flash memory chips, and manages a spare block unit which is configured by a predetermined number of the physical blocks in each of the plurality of flash memory chips other than the physical blocks of the standard block unit, wherein the memory controller allocates the standard block unit as to correspond to a logical group from the plurality of logical groups and stores the data for the corresponding logical group in the physical pages in the first physical page set in each of the physical blocks constituting the standard block unit, wherein the memory controller manages the physical pages in the second physical page set in each of the physical blocks constituting the standard block unit as unwritten physical pages for recording update data for the corresponding data stored in the first physical page set and updates data until no unwritten physical page remains in the second physical page set, wherein the memory controller copies valid update data in the standard block unit to the spare block unit, if no unwritten physical page remains in the second physical page set in the standard block unit, and alternates the spare block unit as a new standard block unit, the update data being designated as valid update data when the standard block unit stores the latest update data and invalid when the standard block unit stores old update data, wherein the memory controller determines, for each of the plurality of flash memory chips, the number of recorded pages for the valid update data, wherein, in response to a write command, the memory controller specifies one of the flash memory chips that has at least one unwritten physical page in the second physical page set belonging to the standard block unit corresponding to the logical group, wherein the specified flash memory chip is that which, of the plurality of flash memory chips, has the smallest number of recorded pages for the valid update data for the data in a certain line of the plurality of lines, and wherein the memory controller equally assigns all of the flash memory chips to serve as recording destinations for the valid update data which has an original logical address in the certain line.