Patent ID: 7847607
Filing Date: 2010-12-07
Classification: H03L

Abstract:
1. A phase locked loop (PLL) circuit, comprising: a phase comparator for comparing a phase of a reference signal with a phase of a feedback signal; an oscillator for outputting an output signal having a frequency in accordance with an output of the phase comparator; a feedback loop for returning the output signal of the oscillator and supplying the output signal as the feedback signal; a delay circuit for controlling a delay time of the output signal of the oscillator according to a phase difference between the reference signal and the feedback signal, wherein the delay circuit is provided outside the feedback loop; and a voltage/current converter for converting a voltage in accordance with an output of the phase comparator; wherein the oscillator is a current controlled oscillator that includes differential amplifiers coupled to one another in a ring shape, wherein an output current of the voltage/current converter is supplied as a bias current to the differential amplifiers included in the current controlled oscillator, and wherein the delay circuit includes a differential amplifier having a same configuration as the differential amplifiers of the current controlled oscillator.