Patent ID: 8305814
Filing Date: 2012-11-06
Classification: G11C

Abstract:
1. A sense amplifier comprising: A. a bit line; B. first inverter circuitry having a PMOS transistor and an NMOS transistor connected in series between VDD and ground, the PMOS and NMOS transistors having gate leads connected to the bit line, and the inverter having a node between the PMOS and NMOS transistors that is connected to a first output lead; C. second inverter circuitry having an input connected to the first output lead and having a second output lead; D. delay circuitry having an input connected to the second output lead and having a delay output lead; E. precharge circuitry having an input connected to the delay output lead, having a control input, and having an output connected to the bit line; and F. pull-up circuitry having an input connected to VDD, having an input connected to the node of the first inverter circuitry, and having an output connected to the bit line.