Patent ID: 7573955
Filing Date: 2009-08-11
Classification: H03L

Abstract:
1. A digital phase locked loop system, comprising: a digitally controlled oscillator for generating an output frequency; a phase detector device for detecting the phase difference between a reference frequency and a frequency which is dependent on the output frequency of the oscillator and for converting the phase difference into a digital control signal, where the phase detector device includes a delta-sigma frequency decision maker; a digital loop filter via which the digital control signal or a digital signal which is derived from the digital control signal is supplied to the digitally controlled oscillator in order to set the output frequency, wherein a stage for increasing the sampling rate is arranged between the digital loop filter and the digitally controlled oscillator; and wherein the delta-sigma frequency decision maker comprises a multimodulus frequency divider and a phase comparator connected downstream of the multimodulus frequency divider, where the output signal from the phase comparator is fed back to a control input of the multimodulus frequency divider in order to select the division factor for the multimodulus frequency divider.