Patent ID: 7379009
Filing Date: 2008-05-27
Classification: H03M

Abstract:
1. An AD converter, comprising: a first conversion stage, to which m pieces of input analog signals representing n-dimensional vectors (n<m<2n) can be inputted, including a converting section having a quantizing part configured to generate m parallel pieces of quantized signals from m pieces of analog signals, a decoding part configured to generate m pieces of decoded analog signals from the m parallel pieces of quantized signals, and a residual amplifying part configured to output m pieces of amplified residual signals by multiplying respective differences between each of the m pieces of analog signals and each of the m pieces of decoded analog signals by a constant multiplier, wherein the m pieces of input analog signals inputted to the first conversion stage serve as the m pieces of analog signals in the quantizing part; a second conversion stage including a converting section having a quantizing part configured to generate m parallel pieces of quantized signals from the m pieces of amplified residual signals; and a synthesizing part configured to generate m parallel pieces of digital signals by synthesizing each of the quantized signals in the first conversion stage and each of the quantized signals in the second conversion stage at each parallel position by delaying the quantized signals in the first-conversion stage by a delay amount of the quantized signals in the second conversion stage relative to the quantized signals in the first conversion stage.