Patent ID: 7310766
Filing Date: 2007-12-18
Classification: H03M,H04L

Abstract:
1. A method, in a data processing system, for protecting the integrity of data transferred between an input/output (I/O) bus and a network, the method comprising: connecting the I/O bus to a PCI-Express core interface; connecting an Ethernet adapter to the PCI-Express core interface, the Ethernet adapter for connecting to the network; data that is transmitted from the I/O bus to the network being transmitted as transmit data from the I/O bus to the PCI-Express core interface, the PCI-Express core interface transmitting the transmit data to the Ethernet adapter, and the Ethernet adapter transmitting the transmit data to the network; data that is transmitted from the network to the I/O bus being transmitted as receive data from the network to the Ethernet adapter, the Ethernet adapter transmitting the receive data to the PCI-Express core interface, and the PCI-Express core interface transmitting the receive data to the I/O bus; a transmit path for transmitting the transmit data from the I/O bus to the network including: a first CRC checker in the PCI-Express core interface, a first CRC generator in the PCI-Express core interface, a transmit buffer in the Ethernet adapter, and a second CRC generator/checker in the Ethernet adapter; a receive path for receiving the receive data by the I/O bus from the network including: a third CRC checker in the Ethernet adapter, a receive buffer in the Ethernet adapter, a fourth CRC checker in the PCI-Express core interface, and a third CRC generator in the PCI-Express core interface; protecting the integrity of a first data packet that is transmitted from the I/O bus to the network including: protecting the integrity of a second data packet that is transmitted from the network to the I/O bus including: