Patent ID: 9105655
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. A semiconductor device comprising: a pillar pattern including a plurality of pillars that is arranged in a zigzag pattern and includes a first pillar, a second pillar, and a third pillar; a stacked structure including an insulation film and a hard mask layer, the stacked structure being disposed between the first pillar and the second pillar; a first hole disposed between the insulation film and the second pillar; a passivation layer disposed against a sidewall of the first hole; a second hole disposed over the hard mask layer and below the first hole and the insulation film, the second hole being formed by partially etching the hard mask layer disposed below a lower part of the first hole; a bit line disposed in the second hole, the bit line comprising first and second opposing longitudinal sides; a first contact disposed at a lower part of the first pillar; a second contact disposed at a lower part of the second pillar; and a third contact disposed at a lower part of the third pillar, wherein the third pillar and the first pillar are arranged diagonally, and wherein the first contact and the second contact are disposed on the first side of the bit line, and the third contact is disposed on the second side of the bit line.