Patent ID: 7323894
Filing Date: 2008-01-29
Classification: G01R

Abstract:
1. A needle alignment verification circuit for a semiconductor device, comprising: a sensor pad for receiving a probe signal provided through a voltage channel of a tester, the sensor pad comprising an insulation part made of insulating material and a conduction part made of conductive material; a first transmission line electrically connected to the conduction part of the sensor pad and to an interior of the semiconductor device; a control element for asserting the first transmission line at a first logic state, and upon receiving the probe signal at the conductor part, transitioning to a second logic state; a data pad; a second transmission line for providing a predetermined signal to the data pad; and a response element for controlling the second transmission line so that the second transmission line has a state of a verification result voltage for a misalignment state in response to the second logic state of the first transmission line.