Patent ID: 6828617
Filing Date: 2004-12-07
Classification: H01L

Abstract:
A capacitor of a semiconductor device, comprising:a semiconductor substrate having a cell array region and a core/peripheral region; at least two gate lines disposed on the semiconductor substrate in the cell array region; a storage node contact pad formed of a first conductive material disposed between the at least two gate lines; a second conductive material layer disposed above the storage node contact pad and the at least two gate lines; an opening formed in the second conductive material layer above the storage node contact pad; a dielectric layer disposed only on inner sidewalls and portions of a bottom adjacent to the inner sidewalls of the opening; a conductive spacer comprised of a third conductive material disposed on the dielectric layer on the inner sidewalls and the portions of the bottom adjacent to the inner sidewalls of the opening; and a fourth conductive material filling a remainder of the opening to contact the storage node contact pad and the conductive spacer.