Patent ID: 8717791
Filing Date: 2014-05-06
Classification: H02M,Y02B,Y02P

Abstract:
1. A bridgeless boost power factor correction (PFC) system comprising: a first input for connection to a first line of an alternating current (AC) source; a second input for connection to a second line of the AC source; an output for delivering an output of the bridgeless boost PFC system; a first boost choke coupled to the first input; a second boost choke coupled to the second input; at least one current sensing resistor coupled in series with a source terminal of a semiconductor switch in each return path of the current through the first boost choke and the second boost choke during each half cycle of the AC source; a PWM controller adapted to control the semiconductor switch in each of said return paths, to further control the flow of current to a load to achieve power factor correction; at least one selection switch coupled to each of said current sensing resistors to alternately enable or prevent the transmission of sensed current signals to the PWM controller; a logic inverter adapted to change the state, alternately, of said selection switches during each half cycle of the AC source; and an AC polarity sensing circuit adapted to provide signals corresponding to each half cycle of the AC source to the PWM controller and said logic inverter.