Patent ID: 6657486
Filing Date: 2003-12-02
Classification: G06G,H03F

Abstract:
A MOS differential amplifier circuit comprising:a MOS differential pair having first and second MOS transistors and receiving an input differential voltage, source electrodes of said first and second MOS transistors being commonly coupled and being driven by a constant current source; and third and fourth MOS transistors which are load transistors of said first and second MOS transistors, respectively, and the gates of said third and fourth MOS transistors receive the sum of a predetermined constant voltage and a voltage obtained by subtracting a common source voltage of said first and second MOS transistors from a common mode voltage, wherein the source electrodes of said third and fourth MOS transistors are coupled to the drain electrodes of the first and second MOS transistors, respectively, and wherein the drain electrodes of said third and fourth MOS transistors are commonly coupled.