Patent ID: 7638847
Filing Date: 2009-12-29
Classification: H01L

Abstract:
1. An electrostatic discharge (ESD) protection structure comprising; a P-type region; a first N-type region and a second N-type region formed in said P-type region, said P-type region and said first N-type region forming a first P-N junction and said P-type region and said second N-type region forming a second P-N junction; a third N-type region formed in said P-type region and isolated from said first and second N-type regions, said P-type region and said third N-type region forming a third P-N junction; an insulating layer on said P-type region; a gate on said insulating layer between said first and second N-type regions; said first N-type region being connected to an input pad, said second N-type region being connected to ground and said third N-type region being connected to the input pad, whereby a positive voltage ESD event on the input pad causes avalanche breakdown of the third P-N junction resulting in injection of current into the P-type region that turns on a parasitic lateral bipolar transistor formed by the first and second P-N junctions.