Patent ID: 6767792
Filing Date: 2004-07-27
Classification: H01L

Abstract:
A fabrication method for forming a flash memory device provided with an adjustable sharp end structure of a L-shaped floating gate, said fabrication method comprising the following steps:providing a semiconductor substrate formed with a gate oxide layer thereon; forming a defined patterned first dielectric layer on a portion of said gate oxide layer, said first dielectric layer having a pair of opposing sidewalls; depositing a polysilicon layer on said semiconductor substrate to cover said gate oxide layer and said first dielectric layer, said polysilicon layer forming a raised portion with a pair of sloped sidewalls over said first dielectric layer; forming a second dielectric layer to cover said polysilicon layer, said second dielectric layer having a thickness; etching said second dielectric layer to form a dielectric spacer on each of said sloped sidewalls of said raised portion of said polysilicon layer, said dielectric spacers being positioned with respect to said sidewalls of said first dielectric layer selectively responsive to said thickness of said second dielectric layer; and etching said polysilicon layer using each said dielectric spacer as a mask to form a respective polysilicon spacer with an upwardly projecting sloped end structure disposed in spaced relationship from a corresponding one of said sidewalls of said first dielectric layer, wherein said polysilicon spacers are used as a floating gates.