Patent ID: 8816350
Filing Date: 2014-08-26
Classification: G02F,G09G

Abstract:
1. An array substrate, comprising: scanning signal lines; data signal lines to each of which a data signal is supplied; a first pixel region column; and a second pixel region column adjacent to the first pixel region column, each of the first and second pixel region columns including pixel regions, wherein: data signal lines corresponding to the first pixel region column are provided; data signal lines corresponding to the second pixel region column are provided; a gap between two adjacent data signal lines is provided, one of the two adjacent data signal lines being corresponding to the first pixel region column, and the other of the two adjacent data signal lines being corresponding to the second pixel region column; and a gap line is provided in the gap, below the gap, or above the gap, a signal different from the data signal being supplied to the gap line; the first pixel region column corresponds to a first pair of data signal lines; the second pixel region column corresponds to a second pair of data signal lines; each of the pixel regions includes one or more pixel electrodes; a pixel electrode included in the first pixel region column is connected via a transistor to either of the first pair of data signal lines corresponding to the first pixel region column; a pixel electrode included in the second pixel region column is connected via a transistor to either of the second pair of data signal lines corresponding to the second pixel region column; and the pixel electrodes included in the first pixel region column and the pixel electrodes included in the second pixel region column are each provided so as to overlap the gap line.