Patent ID: 6601131
Filing Date: 2003-07-29
Classification: G06F

Abstract:
A microcomputer with a built-in flash memory comprising:a flash memory for electrically writing or erasing data; a CPU for issuing a writing/erasing command to said flash memory; a monitor timer for producing a time-up signal when said CPU does not set said monitor timer within a predetermined time period; a clock generator for generating a clock signal for operating said CPU; a first interrupt controller for generating a monitor interrupt to said CPU when said monitor timer outputs the time-up signal; a flash controller for controlling writing/erasing of said flash memory in accordance with the command from said CPU; a waiting mode controller for implementing a waiting mode in response to a CPU rewriting mode designating signal and a busy signal which are output from said flash controller during writing/erasing of said flash memory; and a gate circuit for halting supply of the clock signal from said clock generator to said CPU in the waiting mode in response to a control signal supplied from said waiting mode controller.