Patent ID: 6703670
Filing Date: 2004-03-09
Classification: H01L

Abstract:
A semiconductor circuit comprising:a first transistor having: a first semiconductor region; spaced-apart source and drain regions formed in the first semiconductor region; a first channel defined between the source and drain regions, the first channel having a first channel length and a first dopant concentration; a layer of first gate oxide formed over the first channel, the layer of first gate oxide having a thickness; and a gate formed over the layer of first gate oxide; the first transistor conducting more than a leakage current when the gate, the source, and the first semiconductor region are connected to a same potential; a second transistor having: a second semiconductor region; spaced-apart source and drain regions formed in the second semiconductor region; a second channel defined between the source and drain regions formed in the second semiconductor material, the second channel having a second channel length and a second dopant concentration; a layer of second gate oxide formed over the second channel, the layer of second gate oxide having a thickness, the thickness of the layer of first gate oxide being substantially equal to the thickness of the layer of second gate oxide; and a gate formed over the layer of second gate oxide; the second transistor being substantially non-conductive when the gate of the second transistor, the source of the second transistor, and the second semiconductor material are connected to a same potential, the first channel length being approximately 30 percent to 80 percent as long as the second channel length; and a third transistor having: a third semiconductor region; spaced-apart source and drain regions formed in the third semiconductor region; a third channel defined between the source and drain regions formed in the third semiconductor material, the third channel having a third channel length and a third dopant concentration; a layer of third gate oxide formed over the third channel, the layer of third gate oxide having a thickness, the third transistor being substantially non-conductive when the gate of the third transistor, the source of the third transistor, and the third semiconductor material are connected to a same potential, the thickness of the layer of third gate oxide being greater than the thickness of the layer of second gate oxide.