Patent ID: 6982893
Filing Date: 2006-01-03
Classification: G11C

Abstract:
1. A memory module, comprising: a carrier substrate having terminals for supplying address and command signals; a plurality of integrated memory components, the memory components being arranged on the carrier substrate; an access control circuit the access control circuit being arranged separately from the memory components on the carrier substrate, the access control circuit being connected on the input side to the terminals for supplying the address and command signals, connected on the output side, to the plurality of integrated memory components, the access control circuit being designed such that, when supplying an address signal, the address signal having been generated outside the memory module, the access control circuit receiving an address for a memory access to a memory component which has been selected for the access, the access control circuit generating from the address received, at least one column address and one row address for accessing a bit line and a word line of the selected memory component, the access control circuit transmitting the addresses to the selected memory component.