Patent ID: 6397354
Filing Date: 2002-05-28
Classification: G06F

Abstract:
A system that provides the capability to observe one or more internal signals of a device under test by a time-sampling mode in which N states of an N-state window are sampled and captured during N executions of a repeatable test to generate N partial traces that are driven out of the device under test and merged into a composite trace external to the device under test, wherein N is any desired number, wherein N is any desired number, said system comprising:a control path that receives a clock signal of the device under test, a mode control signal, and a trigger signal, generates a sample clock, a capture clock, an external capture clock, and a synchronization control signal, and drives the synchronization control signal to a first observation element of the control path and the external capture clock to a second observation element of the control path, wherein when the trigger signal will assert and then de-assert after the occurrence of a programmable internal event of the device under test is programmable; and a data path that receives one or more internal signals of the device under test, samples a state of the one or more internal signals as controlled to by the sample clock generated by the control path to generate a partial trace of the N partial traces, captures and holds the partial trace as controlled by the capture clock generated by the control path, and drives the partial trace to a third observation element of the data path.