Patent ID: 9054679
Filing Date: 2015-06-09
Classification: H03K

Abstract:
1. A circuit comprising: a first terminal; a first inverter, a second inverter, a third inverter and a fourth inverter; a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; and a second terminal, wherein the first terminal is electrically connected to an input terminal of the first inverter, wherein an output terminal of the first inverter is electrically connected to an input terminal of the second inverter and one of a source and a drain of the second transistor, wherein an output terminal of the second inverter is electrically connected to one of a source and a drain of the first transistor, wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the fourth transistor, wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the fifth transistor, wherein one of a source and a drain of the third transistor is electrically connected to a power supply line, wherein the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor and one of a source and a drain of the fifth transistor, wherein the other of the source and the drain of the fourth transistor is electrically connected to an input terminal of the third inverter and an output terminal of the fourth inverter, and wherein the other of the source and the drain of the fifth transistor is electrically connected to the second terminal, an output terminal of the third inverter, and an input terminal of the fourth inverter.