Patent ID: 8581615
Filing Date: 2013-11-12
Classification: G01R,G09G

Abstract:
1. A method for checking alignment accuracy of a thin film transistor (TFT), comprising: providing a substrate having a pixel region and a test region defined thereon; forming a first conductive layer on the substrate and performing a first patterning process to the first conductive layer to form a gate electrode of a TFT in the pixel region and simultaneously to form a first terminal and a second terminal of a testing device in the test region, the first terminal and the second terminal being electrically isolated; forming a first insulating layer covering the gate electrode of the TFT and the first terminal and the second terminal of the testing device on the substrate; forming a first contact hole corresponding to the first terminal and the second terminal of the testing device in the first insulating layer; forming a pixel electrode in the pixel region and a connecting electrode of the testing device in the first contact hole in the test region; and performing a close/open circuit test; wherein when the first terminal, the connecting electrode and the second terminal construct a close circuit, alignment accuracy is confirmed and when the first terminal, the connecting electrode and the second terminal construct an open circuit, alignment inaccuracy is confirmed.