Patent ID: 6920528
Filing Date: 2005-07-19
Classification: G11C

Abstract:
1. A smart memory integrated-circuit device, comprising: a memory array section; a special-function section and special-function software used by the special-function section to provide a function other than an exclusive memory function, wherein the special-function section and special-function software are packaged with the memory array section in a single smart memory integrated-circuit package; and wherein said single smart memory integrated-circuit package incorporates all memory functions of a standard memory that are provided by the memory array section and special-function software in addition to a special function that is provided by the special-function section in the single integrated-circuit package; and wherein the special-function section that provides a function other than an exclusive memory function is connected to the memory array section through a common internal bus within the smart memory integrated-circuit package to thereby significantly reduce the need for the memory array section to communicate with another external, baseband integrated-circuit through an external common bus that has significantly greater propagation delay, parasitic capacitance, inductance, and resistance and that is required to be driven with higher current interface driving circuits.