Patent ID: 7468300
Filing Date: 2008-12-23
Classification: H01L,Y10S

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: forming a field area in a semiconductor substrate so as to define an active area in a high voltage region and a low voltage region; forming a nitride layer on the substrate, having an opening in the high voltage region; depositing an oxide layer over the substrate; anisotropically etching the oxide layer such that the oxide layer remains only on sidewalls of the opening; forming a first gate oxide layer on the substrate in the opening; removing the nitride layer; forming a second gate oxide layer over the substrate such that the second gate oxide layer has a relatively thinner thickness than the first gate oxide layer; forming gate electrodes in the high voltage region and the low voltage region; and forming source/drain around the gate electrodes in the active area of the substrate.