Patent ID: 7790620
Filing Date: 2010-09-07
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising: forming device isolation layers on a substrate; sequentially forming an anti-reflective coating layer and a photoresist layer on the substrate; patterning the anti-reflective coating layer and the photoresist layer to expose substrate regions in which active regions of a metal oxide semiconductor (MOS) transistor will be formed; and recessing the exposed substrate regions in a predetermined thickness by adding oxygen (O wherein a portion of the device isolation layers is formed higher than a highest portion of the active regions, wherein the exposed substrate regions are recessed at the same chamber where the anti-reflective coating layer and the photoresist layer are patterned, wherein during the recessing of the exposed substrate regions, an etch rate of the substrate is set faster than that of the device isolation layers, and wherein during the recessing of the exposed substrate regions, an etch ratio of the device isolation layers to the substrate is maintained between approximately 1:1.5 and approximately 1:2.5.