Patent ID: 6693494
Filing Date: 2004-02-17
Classification: H03L

Abstract:
A fractional-N frequency synthesizer, comprising:voltage controlled oscillator means for providing a frequency output signal; fractional-N frequency division means for dividing said frequency output signal; phase comparator means for comparing a reference clock signal with said fractional-N divided frequency output signal; loop filtering means for filtering a current, said loop filtering means providing a filtered current to said voltage controlled oscillator means, and comprising a capacitive element for receiving said current; and charge pump means for providing said current, said charge pump means being controllable by said phase comparator means, and successively being operable in a first operating mode in which said current has a first value, a second operating mode in which said current has a second value, and a third operating mode in which said current has a third value, said first value being substantially higher than said second and third values, in said first operating mode said charge pump means at least substantially being decoupled from said phase comparator means, and in said second and third operating modes said charge pump means being coupled to said phase comparator means; wherein said charge pump means comprises first current source means for providing said current of said first and second values, and second current source means for providing said current of said third value, said first operating mode and said second mode forming a speed-up operating mode of said fractional-N frequency synthesizer in which said frequency output signal is being locked to a predetermined frequency, and said third operating mode being a normal operating mode of said fractional-N frequency synthesizer in which said frequency output signal is within a given locking range.