Patent ID: 7734949
Filing Date: 2010-06-08
Classification: G06F

Abstract:
1. An apparatus comprising: a first memory device comprising an information store; a second memory device comprising a further information store, the information store being loaded with information from the further information store; an error detector operable to detect an error in information retrieved from the information store for use by a processor in a software execution flow; and an error recovery module operatively coupled to the error detector, the error recovery module being operable, responsive to an error detection by the error detector, to suspend the software execution flow of the processor, to disable use of the information store by the processor, to allow the software execution flow of the processor to resume, and to allow the processor to retrieve information for use in the resumed software execution flow directly from the further information store without retrieving the information for use in the resumed software execution flow from the information store; wherein the error recovery module is further operable to determine a history of errors detected by the error detector, and to abort resumption of the software execution flow where the error is detected by the error detector within a time threshold of a previous error detection by the error detector.