Patent ID: 8951916
Filing Date: 2015-02-10
Classification: H01L

Abstract:
1. A method for fabricating an active area contact within a semiconductor wafer, comprising: forming a number of first hard mask portions over a corresponding number of underlying gate structures such that each first hard mask portion vertically shadows a respective one of the underlying gate structures; forming a number of second hard mask filaments adjacent to each of the number of first hard mask portions such that a combined width of each first hard mask portion and its adjoining second hard mask filaments is greater than a width of the respective underlying gate structure, and such that a width of each second hard mask filament defines an active area contact-to-gate structure spacing; etching a passage between facing surfaces of neighboring second hard mask filaments and through a depth of the semiconductor wafer to an active area; and depositing an electrically conductive material within the passage to form the active area contact.