Patent ID: 7168056
Filing Date: 2007-01-23
Classification: G06F

Abstract:
1. A system for verifying trace distances of a printed circuit board (PCB) layout, comprising: a database for storing information on traces of the PCB layout; a computer, which is connected to the database, for calculating and verifying a shortest distance, the computer comprising: a segment receiving module for receiving segments contained in a selected trace from the database, and depositing the segments in a segment set; a segment selecting module for selecting an unverified segment from the segment set when each of verifications begins; a distance setting module for setting a searching distance for the unverified segment based on a preset distance parameter and a searching time; an area ascertaining module for ascertaining a rectangular area to cover the unverified segment based on a basic rectangle and the searching distance; segment searching module for searching any segments of other traces in the rectangular area according to a segment type of the unverified segment; a distance calculating module for calculating a distance between the unverified segment and each searched segment; a distance comparing module for comparing the calculated distances to obtain a shortest distance, and comparing the shortest distance with a preset benchmark distance; and a verification determining module for determining whether all segments of the selected trace have been verified.