Patent ID: 8208087
Filing Date: 2012-06-26
Classification: G02F

Abstract:
1. A thin film transistor (TFT) array substrate, comprising: a substrate, having a pixel region and a peripheral circuit region surrounding the pixel region, the peripheral circuit region having an outer area and an inner area, and the inner area being disposed between the pixel region and the outer area; a TFT array, disposed in the pixel region, the TFT array including a first conducting layer and a second conducting layer; a plurality of first lead lines, disposed in the peripheral circuit region, the first lead lines being formed of the first conducting layer; a plurality of second lead lines, disposed in the peripheral circuit region, the second lead lines formed of the second conducting layer; and a plurality of repair patterns, disposed in the inner area, wherein the repair patterns are sandwiched between the second lead lines and the substrate, and at least a pre-repair area is at a region where only one of the second lead lines and only one of the repair patterns are overlapped.