Patent ID: 8653600
Filing Date: 2014-02-18
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate of a first conductivity type; a pillar of the first conductivity type, the pillar having a vertical thickness that extends from a top surface down to the substrate, the pillar extending in first and second lateral directions in a loop shape, the loop shape having a pair of substantially parallel, elongated straight sections that extend in the first lateral direction, the pair of straight sections being connected at opposite ends by respective first and second semi-circular sections that span the second lateral direction; first and second dielectric regions disposed on opposite lateral sides of the pillar, respectively, the first dielectric region being laterally surrounded by the pillar, and the second dielectric region laterally surrounding the pillar; first and second field plates respectively disposed in the first and second dielectric regions, the first and second field plates being formed of a conductive material; a metal layer disposed on the top surface of the pillar only over each of the straight sections of the loop-shaped layout, the metal layer forming a Schottky diode with respect to the pillar; wherein when the substrate is raised to a high-voltage potential with respect to both the metal layer and the first and second field plates, the first and second field plates functioning capacitively to deplete the pillar of charge, thereby supporting the high-voltage potential along the vertical thickness of the pillar.