Patent ID: 7423445
Filing Date: 2008-09-09
Classification: G01R,G11C

Abstract:
1. A system for determining for each of a plurality of semiconductor devices under test (DUTs) which of a plurality of trim codes corresponding to voltage or current reference value adjustments is the preferred trim code to be used to cause the respective DUTs to provide voltage or current references having a preselected trimmed voltage or current value, comprising: a tester having a plurality of output lines in parallel configuration for feeding respective trim codes generated by the tester simultaneously to said plurality of DUTs to cause them to generate trimmed analog voltage or current references wherein the trim codes are capable of corresponding selectively either to references of progressively increasing magnitude or to references of progressively decreasing magnitude, and also having a plurality of output lines in parallel configuration for feeding a test analog voltage or current reference generated by the tester having a value corresponding to said preselected trimmed voltage or current value simultaneously to said plurality of DUTs; a comparator for each DUT which compares the value of said test analog voltage or current reference to the values of said trimmed analog voltage or current references to ascertain the crossing of the value of said test analog reference voltage or current reference by the values of said trimmed voltage or current references; and decision logic which establishes for each DUT the preferred trim code to be used for that DUT, which is the trim code corresponding to the value of the trimmed analog voltage or current reference immediately above the crossing in the case where the trim codes correspond to references of progressively increasing magnitude and to the reference immediately below the crossing in the case where the trim codes correspond to references of progressively decreasing magnitude.