Patent ID: 8499018
Filing Date: 2013-07-30
Classification: G06F,H03M

Abstract:
1. A computer-implemented storage method, comprising: responsive to a number received according to IEEE754, assembling, by a processor, a continuous exponent field from a combination field (G) and following exponent field (F) thereof and assembling a significand field from the combination field and from a trailing significand field, concatenating, by the processor, the significand field to the exponent field, wherein data of the exponent field occupies more significant bit positions as compared to the positions of the significant field, organizing, by the processor, consecutive BCD values of the concatenated fields into BCD triplets, for each consecutive triplet of BCD values, transforming, by the processor, the triplet into binary valuations of the decimal number represented by the triplet, each transformed triplet yielding a binary declet, transforming, by the processor, any remaining BCD values not included in a triplet into a binary valuation, and storing, by the processor, the transformed binary valuation in a memory along with a representation of the number's sign.