Patent ID: 8502558
Filing Date: 2013-08-06
Classification: H03K

Abstract:
1. An integrated circuit comprising: a ground power supply line; a plurality of circuit blocks containing transistors with transistor gates; memory elements that provide static output control signals to the transistor gates of the transistors, wherein the memory elements are each powered at a respective ground terminal that is coupled to the ground power supply line and at a respective positive power supply terminal; adjustable power supply circuitry having a first power supply output at which the adjustable power supply circuitry supplies a first adjustable positive power supply voltage and having a second power supply output at which the adjustable power supply circuitry supplies a second adjustable positive power supply voltage that is greater than the first adjustable positive power supply voltage; and a plurality of multiplexers each of which is associated with a respective one of the circuit blocks and each of which has a first input that receives the first adjustable positive power supply voltage, a second input that receives the second adjustable positive power supply voltage, and a multiplexer output to which a selected one of the first adjustable positive power supply voltage and the second adjustable positive power supply voltage is routed, wherein the multiplexer output of each multiplexer is connected to the positive power supply terminals of the memory elements in the circuit block with which that multiplexer is associated.