Patent ID: 6898123
Filing Date: 2005-05-24
Classification: G11C

Abstract:
1. A floating gate circuit, comprising: a) a first floating gate for storing charge thereon; b) a first steering capacitor coupled to said first floating gate for controlling the charge level on said first floating gate as a function of an input set voltage that is coupled through said first steering capacitor to said first floating gate during a set mode; c) a second floating gate for storing charge thereon; d) a first circuit coupled to said second floating gate for controlling the charge level on said second floating gate during said set mode; and e) a feedback circuit coupled between said second floating gate and said first floating gate for causing the charge level on said first floating gate to be modified during said set mode until the voltage on said first floating gate is a predetermined function of the voltage on said second floating gate, and such that at the conclusion of said set mode the difference in charge level between said first and second floating gates is a predetermined function of said input set voltage.