Patent ID: 8716100
Filing Date: 2014-05-06
Classification: H01L

Abstract:
1. A method of forming a metal-insulator-metal (MIM) capacitor within an integrated circuit (IC) comprising: forming at least one lower metal feature in an inter-metal dielectric (IMD) layer of a first thickness; forming at least one upper metal feature in a thick IMD layer of a second thickness, the second thickness being greater than the first thickness; forming a trench in the thick IMD layer; depositing a bottom electrode material over a first metal layer and along walls of the trench to form a bottom electrode; forming a dielectric layer adjacent to the bottom electrode material; forming a top electrode adjacent to the dielectric layer; forming a metal element in a third metal layer over the first metal layer; forming a connecting feature over and in electrical contact with the metal element; and forming a second metal layer over the third metal layer and over the top electrode, the second metal layer having a top plate electrically connected to the metal element by the connecting feature and electrically connected to the top electrode through at least the metal element.