Patent ID: 6184103
Filing Date: 2001-02-06
Classification: H01L

Abstract:
A method of fabricating a resistor element in a semiconductor device, the method comprising the following steps:providing a substrate having disposed thereon a plurality of layers of different composition, said plurality of layers of different composition being generally disposed one layer on top of another layer, a portion of said plurality of layers of different composition forming a plurality of transistors, interconnect lines and inter-level insulating layers, at least one contact hole opening formed through at least one of said plurality of layers of different composition;depositing a material layer on an uppermost layer of said plurality of layers of different composition;depositing a protective layer onto said material layer to form a protected material layer; andforming said resistor element in said protected material layer, the step of forming said resistor element including implanting dopant at dosage levels between 0 and 5*10.sup.13 ions/cm.sup.2, and at energy levels between 35 KeV and 80 KeV through said protective layer and into said material layer to control the resistivity and conductance of said resistor element; coating said protected material layer with a first photoresist material layer; masking, aligning, exposing, and developing said first photoresist material layer to form a patterned, developed first photoresist material layer that covers a masked portion of said protected material layer; etching an unmasked portion of said protected material layer that is not covered by said patterned, developed first photoresist material layer to form an etched surface portion; removing said patterned; developed first photoresist material layer from said masked portion of said protected material layer; coating said etched surface portion and said masked portion of said protected material layer, with a second photoresist material layer; masking, aligning, exposing, and developing said second photoresist material layer to form a patterned, developed second photoresist material layer that defines a plurality of highly conductive regions of said masked portion of said protected material layer; implanting dopant into said plurality of highly conductive regions of said masked portion of said protected material layer; and removing said patterned, developed second photoresist material layer.