Patent ID: 7050512
Filing Date: 2006-05-23
Classification: G06F,H03L,H03M,H04J,H04L

Abstract:
1. A receiver, comprising: a latching mechanism, coupled to receive a data stream comprising a plurality of data units and to receive a plurality of latching control signals, each data unit occupying a data period, said latching mechanism latching said data units in response to said latching control signals; a signal generator coupled to receive a reference signal, said signal generator generating said plurality of latching control signals responsive to said reference signal, where the plurality of latching control signals are offset; and an adjustable delay element coupled to receive a clock signal and delaying said clock signal according to a phase difference between said clock signal and said data stream to derive said reference signal, said reference signal so derived causing said signal generator to generate said latching control signals such that each of said latching control signals coincides approximately with a midpoint of a data period.