Patent ID: 6503826
Filing Date: 2003-01-07
Classification: H01L,Y10S

Abstract:
A method for manufacturing a semiconductor device, comprising the steps of:forming a first insulator film on a semiconductor substrate of a first conductivity type to define a device region; forming a gate insulator film on said semiconductor substrate within said device region; forming a gate electrode on said gate insulator film within said device region; forming a source region and a drain region of a second conductivity type opposite to said first conductivity type in said semiconductor substrate within said device region in self-alignment by using said gate electrode as a mask; forming a sidewall insulator film on a side wall of said gate electrode; forming a source lead-out region and a drain lead-out region of said second conductivity type in said semiconductor substrate within said device region in self-alignment by using said sidewall insulator film and said gate electrode as a mask; forming a protecting insulating film having at least one insulator film on the whole surface of said semiconductor substrate including said gate electrode and said sidewall insulator film; and forming an interlayer insulator film on the whole surface of said semiconductor substrate including said protecting insulating film for isolating said gate electrode from a metal interconnection formed on said interlayer insulator film, wherein the step of forming said protecting insulating film includes the steps of depositing a first oxide film having a thickness of 90 nm to 110 nm on the whole surface of said semiconductor substrate including said gate electrode and said sidewall insulator film by an atmospheric pressure chemical vapor deposition process, succeedingly depositing a nitride film having a thickness of 10 nm to 20 nm by a thermal chemical vapor deposition process, and thereafter, depositing a second oxide film having a thickness of 40 nm to 60 nm by a plasma chemical vapor deposition process.