Patent ID: 6504883
Filing Date: 2003-01-07
Classification: H04B,H04L

Abstract:
A synchronous detector used in a code division multiple access communication receiver comprising:a correlator for calculating a plurality of correlation values between a received signal spread with an x-chip sequence of a spread code and a first n-chip correlation coefficient for different phase timings, where x and n are positive integers and n is smaller than x, said correlator comprising a synchronous estimator for estimating a synchronous phase by calculating the correlation values between the received signal and the first n-chip correlation coefficients every cycle of the spread code and by accumulating the correlation values, said synchronous estimator comprising: a plurality of second n-chip correlation coefficient generators for generating second n-chip correlation coefficients at a phase timing indicated by timing control signals; a multiplexer for multiplexing the second n-chip correlation coefficients generated by the plurality of second n-chip correlation coefficient generators to obtain an n-chip multiplexed signal; n multipliers for multiplying the n-chip multiplexed signal and the received signal at the phase timing indicated by each of the timing control signals to obtain a multiplication signal; a demultiplexer for demultiplexing the multiplication signal to obtain an n-chip demultiplexed signal; and m accumulators for accumulating the n-chip demultiplexed signal; and a pre-synchronous decision circuit, coupled to said correlator, for generating at least one timing control signal indicating the phase timing corresponding to a highest correlation value.