Patent ID: 8482064
Filing Date: 2013-07-09
Classification: H01L

Abstract:
1. A termination for superjunction VDMOSFET (vertical double-diffused Metal-Oxide-Semiconductor field effect transistor), wherein: the termination comprises heavily doped N-type silicon substrate ( 4 ) which also works as drain region; drain metal ( 10 ) is disposed on a back surface of the heavily doped N-type silicon substrate ( 4 ); an N-type silicon epitaxial layer ( 5 ) is disposed on the heavily doped N-type silicon substrate ( 4 ); P-type silicon columns ( 6 ) and N-type silicon columns ( 7 ) are formed in the N-type silicon epitaxial layer ( 5 ); the P-type silicon columns ( 6 ) and the N-type silicon columns ( 7 ) are alternately arranged; a continuous silicon oxide layer ( 8 ) is disposed on a part of silicon surface of the termination; structures that block the drift of mobile ions are disposed on the other part of silicon surface of the termination; and the structures that block the drift of mobile ions are several discontinuous silicon oxide layers ( 9 ) arranged at intervals; the discontinuous silicon oxide layers ( 9 ) are arranged such that the discontinuous silicon oxide layers ( 9 ) are placed at intervals and parallel to each other; and each of the discontinuous silicon oxide layers passes across the surfaces of all the P-type silicon columns ( 6 ) and N-type silicon columns ( 7 ) alternately arranged.