Patent ID: 7613262
Filing Date: 2009-11-03
Classification: H04L

Abstract:
1. A signal processing apparatus comprising: a demodulator arranged to demodulate a received signal, which carries consecutive symbols at a symbol rate, wherein the demodulator is arranged, based on sample values of the received signal, to calculate an error value of a given symbol relative to a decision-directed determination of an expected symbol value; and a phase-shifter arranged to shift a phase of sampling points in time at which points in time, sample values of the received signal are provided to the demodulator; and a processor arranged to evaluate an error metric, at the symbol rate, for a given symbol as a function of the error value and symbol values, and to determine whether to shift the phase of the sampling points in time based on further evaluation of the error metric; wherein either the error metric is at least one of a function of the phase error value of a given symbol relative to the decision-directed determination of an expected symbol phase value, the phase value of a previous symbol, and the phase of a succeeding symbol; and a function of the phase error of the received symbol multiplied by a difference between the phase of a previous symbol and the phase of a succeeding symbol; or the error metric includes a first term representing that the sampling phase is advanced in time and a second term representing that the sampling phase is delayed in time relative to an optimal sampling phase, wherein the first term is the phase error of the received symbol multiplied by the phase of a succeeding symbol, and the second term is the phase error of the received symbol multiplied by the phase of a preceding symbol; or the error metric expresses Inter Symbol Interference based on an estimate, which is based on an estimated impulse response for a transmission channel over which the symbol is transmitted prior to being input to the signal processing apparatus.