Patent ID: 7901980
Filing Date: 2011-03-08
Classification: H01L

Abstract:
1. A method of forming a memory cell, the method comprising: forming at least one insulating layer over a substrate; forming a via in the insulating layer; forming a conductive lower block in the via; forming a step spacer of insulating material in the via above the conductive lower block, the step spacer including a passage with a bottom aperture and a top aperture, the bottom aperture being smaller than the top aperture; depositing phase change material in the via above the conductive lower block and within the step spacer; forming a conductive upper block over the phase change material; wherein forming the step spacer includes: depositing an insulating spacer layer within the via, the conformality of deposition of the insulating spacer layer being such that a cavity is formed by the insulating spacer layer; and etching the insulating spacer layer such that the area below the cavity forms a ridge within the step spacer.