Patent ID: 8428179
Filing Date: 2013-04-23
Classification: H04L

Abstract:
1. A crest factor reduction apparatus, the apparatus comprising: a difference calculation block which is configured to decompose an input time domain signal into a clipped signal comprising that portion of the input signal having a magnitude which is equal to or less than a threshold and a difference signal comprising that portion of the input signal which exceeds the threshold; a first transformation block coupled to the difference calculation block and configured to convert the time domain difference signal into a frequency domain difference signal; a processing block which is configured to apply a magnitude constraint to the frequency domain difference signal to generate a constrained frequency domain difference signal; a second transformation block coupled to the processing block and configured to convert the constrained frequency domain difference signal into a time domain signal; and an adder block which is configured to combine the time domain signal produced by the second transformation block with the clipped signal to generate an output time domain signal.