Patent ID: 8674725
Filing Date: 2014-03-18
Classification: H03K

Abstract:
1. A transmitter circuit comprising a waveform-equalizing load driving circuit which performs waveform equalization to transmitted data signals and outputs the waveform-equalized transmitted data signals to transmission paths, the waveform-equalizing load driving circuit being configured by a differential circuit including one current switching circuit and one or a plurality of current adder circuits, the current switching circuit including: the load portion performing waveform equalization of the transmitted data signals by converting a current obtained by adding the second driving current to the first driving current into a voltage, the first transistors, the second transistors, the third transistors, and the fourth transistors are configured by MOS transistors, the first current source and the second current source are configured by MOS transistors, upon an operation of inputting an ‘H’ level to a gate voltage of the MOS transistors of the first and third transistors and having an output voltage of an ‘L’ level (VOL), a gate voltage (VCAS) of the MOS transistors of the second and fourth transistors is set to be smaller than a value (VOL+Vth) obtained by adding a threshold voltage (Vth) of the MOS transistors to an output ‘L’ level, a gate voltage (VIN) of the MOS transistors of the first and third transistors is set to be smaller than a value (VSL+Vth) obtained by adding a threshold voltage (Vth) of the MOS transistors to a drain voltage (VSL), and a gate voltage (VBIAS) of the MOS transistors of the first and second current sources is set to be smaller than a value (Vds+Vth) obtained by adding a threshold voltage (Vth) of the MOS transistors to a drain voltage (Vds).