Patent ID: 8669658
Filing Date: 2014-03-11
Classification: H01L

Abstract:
1. A cross-talk free structure comprising: a substrate having a passivation layer thereon, the substrate comprising an integrated circuit coupled to a top metal contact, the top metal contact being exposed through the passivation layer, one or more dielectric layers on the passivation layer; a signal pin extending through the one or more dielectric layers to the top metal contact, the signal pin being exposed through the one or more dielectric layers for coupling a solder bump, the signal pin configured to receive an external signal; a ground ring formed in the one or more dielectric layers and spaced from the signal pin by a portion of the one or more dielectric layers, the ground ring having a portion exposed through the one or more dielectric layers, the ground ring encircling the signal pin and the end of the signal pin; a grounded solder bump coupled to the ground ring; and a package selected from a CSP (chip scaled package) and a WLCSP (wafer level chip scaled package), wherein the structure is implemented in the package.