Patent ID: 8232641
Filing Date: 2012-07-31
Classification: H01L

Abstract:
1. A wiring substrate comprising: a semiconductor chip on which a plurality of bumps are mounted, a plurality of connection pads which are joined to the bumps mounted on the semiconductor chip in a flip chip method, and a solder resist including: wherein connection pads of the plurality of connection pads on a peripheral portion of the wiring substrate are formed in a non-solder mask defined structure such that the connection pads are respectively within the area-frame-shaped opening portions and each opening portion is smaller than each connection pad, wherein a pitch of the connection pads of a peripheral portion of the plurality of connection pads of the wiring substrate is 100 μm or less; and a pitch of the connection pads of a center portion of the plurality of connection pads of the wiring substrate is 100 μm or less or more.