Patent ID: 7408818
Filing Date: 2008-08-05
Classification: G11C

Abstract:
1. A semiconductor device having a first operation mode and a second operation mode in which a positive voltage and a ground voltage are externally supplied and the positive voltage in said second operation mode is higher than the positive voltage in said first operation mode, comprising: a memory portion including a memory cell storing data; and a power supply circuit portion supplying a first voltage and a second voltage to said memory portion, wherein said memory portion writes data to or reads data from said memory cell based on said first voltage and said second voltage, and said power supply circuit portion includes: a boosted voltage generation circuit generating, based on said externally supplied positive voltage and ground voltage, a boosted voltage of said positive voltage; a negative voltage generation circuit generating a negative voltage based on said externally supplied positive voltage and ground voltage; and a switch circuit supplying, in said first operation mode, said boosted voltage as said first voltage and said negative voltage as said second voltage to said memory portion, and providing, in said second operation mode, a smaller voltage difference between said first voltage and said second voltage relative to said first operation mode.