Patent ID: 7960264
Filing Date: 2011-06-14
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: forming a stack, from bottom to top, of a gate dielectric layer, a gate conductor layer, a dielectric material layer, and a semiconductor layer on a semiconductor substrate; forming crystallographic facets joined by a ridge in said semiconductor layer by an anisotropic wet etch; forming a masking material layer on said crystallographic facets; forming implantation-damaged masking material portions by implanting dopant atoms or inert atoms into said masking material layer, whereby a portion of said masking material layer is not implanted by said dopant atoms or inert atoms to form an undamaged masking material portion; and removing an entirety of said implantation-damaged masking material portions selective to said undamaged masking material portion by employing an etch chemistry that provides different etch rates between said implantation-damaged masking material portions and said undamaged masking material portion; etching said semiconductor layer, said dielectric material layer employing said undamaged masking material portion as an etch mask.