Patent ID: 6373323
Filing Date: 2002-04-16
Classification: G05F,H02M

Abstract:
A semiconductor integrated circuit device, comprising:a substrate potential generating circuit operative on the basis of a control signal, for lowering a substrate bias of a P-type semiconductor substrate when activated; and a switch circuit operative on the basis of the control signal and turned on when said substrate potential generating circuit is deactivated, to set a potential of the P-type semiconductor substrate to a predetermined value; said switch circuit including: a first NMOSFET having a drain terminal to which a first supply voltage is applied, a source terminal connected to the P-type semiconductor substrate, and a gate terminal; a switching element operative on the basis of the control signal, and having a first terminal to which a second supply voltage is applied and a second terminal connected to the gate terminal of said first NMOSFET; and a pump circuit operative on the basis of the control signal, for pumping out P-type carriers, and having an output terminal connected to the gate terminal of the first NMOSFET.