Patent ID: 9159689
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor layer having a first surface and a second surface; a through electrode penetrating the semiconductor layer and having a protruding portion that protrudes over the second surface of the semiconductor layer by a predetermined height; a front-side bump disposed over the first surface of the semiconductor layer and electrically coupled to the through electrode; a passivation pattern including a first insulation pattern that surrounds a sidewall of the protrusion of the through electrode and extends onto the second surface of the semiconductor layer and a second insulation pattern that covers the first insulation pattern and has an etch selectivity with respect to the first insulation pattern, wherein a portion of the passivation pattern under the back-side bump has a first thickness and a portion of the passivation pattern on the second surface of the semiconductor layer that does not overlap with the back-side bump has a second thickness which is less than the first thickness; and a back-side bump covering an end surface of the protruding portion of the through electrode and extending over the passivation pattern.