Patent ID: 6058486
Filing Date: 2000-05-02
Classification: G01R,G06F

Abstract:
A timing generator for generating a timing signal based on timing data for testing IC devices by an IC tester, comprising:a data memory for storing the timing data which defines a time length of said timing signal relative to a timing signal in a previous cycle of operation in said IC tester, said timing data being formed of data which is a quotient of a division of said time length by a time period of a reference clock and fractional data which is a remainder of said division and is smaller than said time period of said reference clock;a counter for counting the number of pulses of said reference clock and producing a delay time expressed by said quotient which is an integer multiple of said time period of said reference clock when the number of counts of said pulses coincides with said quotient from said data memory;an accumulator for accumulating said fractional data from said data memory and data of said previous cycle and for generating a carry signal when an accumulated value in said accumulator exceeds said time period of said reference clock, said carry signal being provided to a cycle delay circuit for delaying an output of said counter by one cycle of said reference clock;a number converter which converts said timing data to said data memory based on a ratio of a first reference clock period and a second reference clock period so that said quotient and said remainder in said data memory are defined on the basis of said second reference clock period; anda means for providing a complementary number to the accumulator for compensating a time difference between the first and second reference clock periods.