Patent ID: 7411694
Filing Date: 2008-08-12
Classification: G06T,H04N

Abstract:
1. A data conversion apparatus, comprising: a data processing unit for processing a predetermined number of pieces of data in parallel, each of the data having a predetermined number of bits; a buffer memory unit connected to said data processing unit having memory areas for storing the data from an external of the data conversion apparatus and for inputting the stored data in the predetermined number of the bits and the pieces to said data processing unit in parallel; a control information memory unit for storing control information data specifying non-buffer functions and use areas of said memory areas in said buffer memory unit; and a buffer controller unit connected to said data processing unit, said buffer memory unit and said control information memory unit for defining the use areas for the non-buffer functions in said buffer memory unit based upon the control information data and for establishing a data transfer line between said buffer memory unit and said data processing unit so that each of the use areas of the non-buffer functions has parallel inputs from and outputs to said data processing unit.