Patent ID: 8433955
Filing Date: 2013-04-30
Classification: G06F

Abstract:
1. A microcontroller comprising: a plurality of data processing units, each of which having a central processing unit and a memory; a plurality of compressors compressing and retaining data, which is generated by the data processing units, for each of the data processing units; a comparator mutually comparing the data retained by the plurality of compressors; and a comparison result register retaining a comparison result of the comparator; wherein when the central processing unit of one of the data processing units executes a first processing, the central processing unit gives an instruction to execute the first processing to each of the central processing units of the other data processing units, and the comparison result register fetches in the comparison result of the comparator on a condition that enable signals are output from the central processing units of the data processing units, wherein each of the compressors comprises: a data register disposed in address space of the central processing unit of the corresponding data processing unit, and the central processing unit specifies an address and compresses the data written to the data register, a compression circuit which receives input of the data written to the data register and the data output from the central processing unit and compresses the data; and a selector which selects and receives input of the output data of the compression circuit or output data of the corresponding central processing unit and gives output to the data register, and wherein the data register functions as an accumulator.