Patent ID: 6784889
Filing Date: 2004-08-31
Classification: G09G

Abstract:
A graphics processing system, comprising:at least three banks of memory storing graphics data in memory pages, each bank of memory having separate read and write ports, the read and write ports inoperative simultaneously; a memory controller having input and output terminals coupled to the read and write ports of each bank of memory, respectively, and further having pre-process and post-process terminals, the memory controller adapted to read data from a first bank of memory and write post-processed data to a second bank of memory concurrently; and a synchronous graphics processing pipeline having input and output terminals coupled to the pre-process and post-process terminals, respectively, to process graphics data received from the memory controller and to provide post-processed graphics data back to the memory controller to be written to the bank of memory from which the graphics data processed to produce the post-processed graphics data was read, the graphics processing pipeline having a data length sufficient to contain the graphics data of a memory page.