Patent ID: 7033908
Filing Date: 2006-04-25
Classification: H01L

Abstract:
1. A method of forming an electronic device including a substrate and a raised pattern on the substrate, the method comprising: forming a first insulating layer on the raised pattern and on the substrate wherein forming the first insulating layer comprises forming a first portion of the first insulating layer using a first processing condition and forming a second portion of the first insulating layer using a second processing condition; after forming the first insulating layer including the first and second portions, removing portions of the first insulating layer to expose portions of the raised pattern while maintaining portions of the first insulating layer on the substrate; and after removing portions of the first insulating layer, forming a second insulating layer on the exposed portions of the raised pattern and on the maintained portions of the first insulating layer; wherein the first insulating layer includes closed voids therein, and wherein removing portions of the first insulating layer comprises opening the voids in the first insulating layer, and wherein openings in the voids are substantially at least as wide as any portions of the opened voids between the openings and the substrate; wherein the substrate comprises an integrated circuit substrate, wherein the raised pattern comprises a pattern of memory array bit lines, and wherein maintaining portions of the first insulating layer on the substrate comprises maintaining portions of the first insulating layer between memory array bit lines.