Patent ID: 7564288
Filing Date: 2009-07-21
Classification: H03K

Abstract:
1. A semiconductor integrated circuit that operates by receiving a plurality of power potentials including a first power potential and a second power potential higher than the first power potential, comprising: an internal circuit that operates by receiving of the first power potential; an inverter that inverts an output signal of the internal circuit by receiving of the first power potential; a level shift circuit, which inputs the output signal of the internal circuit into a first input terminal while inputting an output signal of the inverter into a second input terminal, which generates a level shift signal whose ski nal level has been shifted from the output signal of the internal circuit at one of a first output terminal and a second output terminal by receiving the second power potential, and which outputs the level shift signal from one terminal among the first output terminal and the second output terminals; an output circuit that operates by receiving of the second power potential, the output circuit operating based on the level shift signal output from the level shift circuit; and a potential fixing circuit that fixes potentials of the first input terminal and the second input terminal or potentials of one of the first input terminal and the second input terminal and one of the first output terminal and the second output terminal of the level shift circuit when the second power potential is supplied and the first power potential is not supplied.