Patent ID: 6054396
Filing Date: 2000-04-25
Classification: H01L

Abstract:
A semiconductor processing method of reducing thickness depletion of a deposited TiSi.sub.2 layer at a junction of different underlying material layers, the method comprising the following steps:providing a substrate comprising a first material and a second material, the first and second materials comprising outer portions and joining at a surface junction, the first and second materials being different from one another;exposing the substrate to a TiCl.sub.4 -comprising source gas, the exposing to the source gas being under temperature and pressure conditions effective to provide a nucleation layer comprising Ti at the outer portions of both of the first and second materials and at the surface junction; andafter the exposing, chemical vapor depositing the TiSi.sub.2 layer on the nucleation layer, the deposited TiSi.sub.2 being over the first and second materials and the surface junction.