Patent ID: 8860596
Filing Date: 2014-10-14
Classification: H03M

Abstract:
1. A redundant signed digit (RSD) analog to digital converter (ADC), comprising: an input circuit for receiving an input to the RSD ADC and having a first output and a second output; an amplifier; a first variable capacitance circuit having an input coupled to the first output of the input circuit and an output coupled to a first input of the amplifier; a second variable capacitance circuit having an input coupled to the second output of the input circuit and an output coupled to a second input of the amplifier; a third variable capacitance circuit having an input coupled to a first output of the amplifier; and a fourth variable capacitance circuit having an input coupled to a second output of the amplifier; wherein outputs of the third and fourth capacitance circuits are coupled together and to the input circuit, and capacitance values of the first, second, third and fourth variable capacitance circuits are higher when input to the RSD ADC corresponds to a selected number of more significant bits than when input to the ADC corresponds to a remaining number of less significant bits.