Patent ID: 8810025
Filing Date: 2014-08-19
Classification: H01L

Abstract:
1. A device comprising: a carrier substrate having a chip region and a periphery region spaced a lateral distance from and surrounding the chip region, wherein the chip region includes a plurality of bonding pads on a surface of the carrier substrate, and wherein the carrier substrate includes a core layer and a lamination carrier layer disposed on at least one surface of the core layer, the lamination layer including a dielectric material and a conductive layer disposed in the dielectric material; a reinforcement structure embedded within the periphery region of the carrier substrate, wherein the reinforcement structure contiguously extends through the core layer, the dielectric material and the conductive layer and wherein the reinforcement structure is a contiguous L-shaped structure that has an edge that parallels each of two sides of the carrier substrate that terminate in a corner of the carrier substrate; and a chip bonded to the chip region of the carrier substrate, wherein the chip is bonded to each of the plurality of bonding pads.