Patent ID: 6781199
Filing Date: 2004-08-24
Classification: H01L

Abstract:
A semiconductor device comprising:a first semiconductor layer of a first conductivity type having first and second major surfaces; a second semiconductor layer of a second conductivity type formed on the first major surface of said first semiconductor layer; a third semiconductor layer of the second conductivity type formed on said second semiconductor layer; a fourth semiconductor layer of the first conductivity type formed on said third semiconductor layer; at least one first trench and at least one second trench arranged to penetrate through at least said fourth semiconductor layer from a surface of said fourth semiconductor layer such that a bottom part of an external wall of said at least one second trench is in direct contact with a region of the second conductivity type; a first semiconductor region of the second conductivity type selectively formed in said surface of said fourth semiconductor layer vicinal to said at least one first trench; a first insulating film formed on an internal wall of said at least one first trench; a first material serving as a control electrode buried in said at least one first trench and formed on said first insulating film; a second material formed in said at least one second trench, the second material not being a control electrode; a first main electrode electrically connected to said second material formed in said at least one second trench and to at least a part of said first semiconductor region and formed over a surface of said fourth semiconductor layer; and a second main electrode formed on the second major surface of said first semiconductor layer.