Patent ID: 6904043
Filing Date: 2005-06-07
Classification: H04L

Abstract:
1. A multiport switch configured for controlling communication of data frames between stations, comprising: a plurality of receive devices corresponding to ports on the multiport switch, each of the receive devices configured to receive data frames and transmit the data frames on an internal bus to an external memory interface; a plurality of queues corresponding to ports on the multiport switch, the plurality of queues formed on a memory device that includes a write port and a read port to enable data to be written to and read from the memory device simultaneously, wherein each of the plurality of queues is configured to store frame header information received via the write port; a scheduler configured to allocate time slots to the plurality of queues; a decision making engine configured to receive the frame header information in successive time slots via the read port and to generate data forwarding information; and a read controller configured to transfer frame header information from the plurality of queues to the decision making engine via the read port, wherein the scheduler is configured to allocate the time slots based on a predetermined priority and the read controller is configured to transmit frame header information to the decision making engine during the allocated time slots.