Patent ID: 8934304
Filing Date: 2015-01-13
Classification: G11C

Abstract:
1. A method of operating a nonvolatile memory device, the nonvolatile memory device including a plurality of memory cells and a plurality of monitor cells connected to a same word line, the method comprising: erasing the plurality of memory cells and the plurality of monitor cells; programming at least one first memory cell among the plurality of memory cells to a first program state and program-verifying the at least one first memory cell using a first verification voltage; programming at least one first monitor cell among the plurality of monitor cells to the first program state and program-verifying the at least one first monitor cell using a first monitor verification voltage which is lower than the first verification voltage and higher than a first read voltage used to distinguish an erase state and the first program state; programming at least one second memory cell of the plurality of memory cells to a second program state and program-verifying the at least one second memory cell using a second verification voltage higher than the first verification voltage; programming at least one second monitor cell of the plurality of monitor cells to the first program state and program-verifying the at least one second monitor cell using a second monitor verification voltage higher than the first verification voltage and lower and a second read voltage used to distinguish the first program state and second program state; and programming at least one third monitor cell of the plurality of monitor cells to the second program state and program-verifying the at least one third monitor cell using a third monitor verification voltage higher than the second read voltage and lower than the second verification voltage; and refreshing data stored in the plurality of memory cells according to a result read from the at least one first monitor cell during a read operation of the at least one first monitor cell.