Patent ID: 6277237
Filing Date: 2001-08-21
Classification: H01J,Y10S

Abstract:
A process chamber for use in semiconductor fabrication, comprising:a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a sermiconductor wafer; anda chamber liner having a plasma confinement shield with a plurality of apertures, the plasma confinement shield having an annular configuration defining an inner circumference and an outer circumference, a cylindrical outer sidewall extending upwardly from the outer circumference of the plasma confinement shield for a first distance, a cylindrical inner sidewall extending upwardly from the inner circumference of the plasma confinement shield for a second distance, the first distance being longer than the second distance, and an outer flange extending outwardly from the outer sidewall, the outer flange extending beyond the chamber and into a space at atmospheric pressure.