Patent ID: 8492796
Filing Date: 2013-07-23
Classification: H01L

Abstract:
1. Apparatus, comprising: a semiconductor substrate including a first area and a second area on a same surface thereof, the first area covered by an insulating layer deposited on a portion of the same surface and the second area exposed from that insulating layer; a first semiconductor circuit and a second semiconductor circuit overlying the semiconductor substrate, the first and second semiconductor circuits formed on the same surface in the second area; and at least one MuGFET device formed on the insulating layer in the first area such that a fin, a source region, and a drain region of the at least one MuGFET device contact the insulating layer, the source region connected to the first semiconductor circuit and the drain region connected to the second semiconductor circuit, the at least one MuGFET device configured to provide a signal path between the first semiconductor circuit and the second semiconductor circuit in response to an input signal at a gate of the at least one MuGFET device.