Patent ID: 7155650
Filing Date: 2006-12-26
Classification: G01R

Abstract:
1. An integrated circuit comprising: A. a substrate of semiconductor material; B. functional circuitry formed on the substrate, the functional circuitry including functional registers providing stimulus outputs to the functional circuitry and response inputs from the functional circuitry; C. at least two serial scan paths formed of the functional registers, each scan path having a serial scan input and a serial scan output; D. at least two output devices formed on the substrate, each output device having a data input connected to the serial scan output of one scan path and having a data output with the data outputs of both output devices being connected together, each output device having a control input for selectively connecting a data signal at its data input to its data output; and E. scan path control circuitry formed on the substrate, the control circuitry having at least two separate control output leads, each control output lead being connected to one of the scan paths and to the control input of the output device connected to that scan path, the scan path control circuit including a state machine, the state machine having state circuitry providing: