Patent ID: 6181312
Filing Date: 2001-01-30
Classification: G09G

Abstract:
A drive circuit for driving an active matrix liquid crystal device (LCD) to operate for a picture writing period and a vertical blanking period, said drive circuit comprising:a memory circuit, responsive to a first clock signal, including a plurality of memory cells each disposed for a corresponding group of gate lines of the LCD device, said memory circuit storing a first data in each of said memory cells corresponding to selected groups of said gate lines;a plurality of cascaded transfer elements, each disposed for a corresponding one of said memory cells, for shifting clock pulses in a second clock signal along said transfer elements, said second clock signal being in synchrony with said first clock signal, anda gate line drive circuit including a plurality of logic units each disposed for a corresponding one of said memory cells, each of said logic units outputting a result signal based on a logic operation M.sub.n *S.sub.n *XBW+XM.sub.n *BW to a corresponding group of said gate lines, wherein Mn, XMn, Sn, BW, XBW and represent said first data from one of said memory cells corresponding to said each of said logic unit, the inverted first data, an output of one of said transfer elements corresponding to said each of said logic units, a control signal having a logic value depending on the picture writing period or the vertical blanking period, and an inverted control signal, respectively.