Patent ID: 6753868
Filing Date: 2004-06-22
Classification: G09G,G11C,H04N

Abstract:
A single-chip microcomputer comprising:a CPU for executing commands included in a CPU program, a CPU-side memory device whose memory contents are electrically erasable or rewritable and which stores a CPU program to be executed by the CPU, an OSD device which produces and outputs display signals relating to image information to be displayed on an external display device based on commands from the CPU to bring the external display device to display the image information, an OSD-side memory device whose memory contents are electrically erasable or rewritable and which stores image display data to be used when the OSD device produces the display signals, a CPU-side signal line which connects each of the CPU-side memory device, OSD device, and OSD-side memory device to the CPU and propagates signals between the CPU and these devices, an OSD-side signal line which is connected to the OSD-side memory device and OSD device and propagates image display data selected based on commands from the CPU and signals relating to their address data in the OSD-side memory device, and switching means for disconnecting the OSD device and OSD-side memory device from the CPU-side signal line when the CPU performs erasing or rewriting operation of memory contents of the CPU-side memory device via the CPU-side signal line.