Patent ID: 7615444
Filing Date: 2009-11-10
Classification: H01L

Abstract:
1. A method for forming an integrated circuit having a capacitor structure: providing a substrate having a contact pad and a dielectric mold thereover, the dielectric mold comprising at least one trench therein, thereby leaving exposed the contact pad; forming a first conductive layer on side walls of the trench in a top region of the trench, the conductive layer not contacting the contact pad; forming a first dielectric layer over the first conductive layer; forming a second conductive layer on the contact pad, and on the side walls of the trench over the first dielectric layer; forming a second dielectric layer over the second conductive layer; forming a third conductive layer over the second dielectric layer; and electrically connecting the first conductive layer and the third conductive layer, wherein the forming of the first conductive layer comprises: depositing the first conductive layer; depositing a masking layer over the first conductive layer selectively in the top region of the trench, thereby not overlying a bottom region of the trench; etching the first conductive layer in the bottom region of the trench; and removing the masking layer.