Patent ID: 7346484
Filing Date: 2008-03-18
Classification: G06F

Abstract:
1. A processor with a memory that produces a monitor manager that manages the execution of one or more monitors during the simulation of a digital design, comprising: an instance generator that creates at least one executable instance of each monitor, wherein each said executable instance further comprises a variable class construct that includes a status variable declared in said monitor and a reset function, each said executable instance returns with said status variable set to one of the following values: passed, failed, active, or error; an activation manager that assigns each said executable instance to be an active executable instance or an inactive executable instance; an execution unit that executes each said active executable instance, receives said status variable value returned by each said active executable instance, and maintains a hit count; and wherein the result is a monitor manager that manages the execution of one or more monitors during the simulation of a digital design.