Patent ID: 7264987
Filing Date: 2007-09-04
Classification: H01L

Abstract:
1. A method of fabricating an optoelectronic integrated circuit chip, comprising the steps of: (a) forming a sub-collector layer and a first semiconductor layer on an optical detector region and a transistor region in a substrate; (b) forming insulating layer mask patterns on the first semiconductor layer of the optical detector region and the transistor region, the insulating mask layer patterns having layer width and gap width; (c) forming an optical absorption layer as a second semiconductor layer between the insulating layer patterns in the optical detector region, and forming a collector layer thinner than the optical absorption layer as the second semiconductor layer between the insulating mask layer patterns in the transistor region; (d) removing the insulating mask patterns; and (e) forming an optical detector having the sub-collector layer, the optical absorption layer and a base layer in the optical detector region, and forming a transistor having the sub-collector layer, the collector layer, the base layer and an emitter layer in the transistor region.