Patent ID: 6218678
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A semiconductor integrated circuit comprising:a substrate;an active matrix circuit comprising a first plurality of thin film transistors formed over a first portion of said substrate, each of said first plurality of thin film transistors including a channel region comprising an amorphous semiconductor;a peripheral driving circuit comprising a second plurality of thin film transistors formed over a second portion of said substrate for driving said first plurality of thin film transistors, each of said second plurality of thin film transistors including a channel region comprising a crystalline semiconductor,wherein an active layer of each of said second plurality of thin film transistors comprises said channel region, a pair of impurity regions between which said channel region extends, and a pair of metal silicide regions doped with one conductivity type impurity at a first concentration adjacent to said impurity regions, said impurity regions having a higher resistance than said metal silicide regions,wherein said impurity regions are doped with an impurity having the same conductivity type as said one conductivity type impurity at a lower concentration than said first concentration and are not covered with said metal silicide regions.