Patent ID: 6605545
Filing Date: 2003-08-12
Classification: H01L

Abstract:
A method for applying hybrid low-k film stack to dual damascene process, said method comprising the steps of:providing a semiconductor substrate; forming a metal layer on said semiconductor substrate; forming a first cap layer on said metal layer; forming a first low dielectric constant layer on said first cap layer, wherein said first low dielectric constant layer is formed by chemical vapor deposition method; forming a second low dielectric constant layer on said first low dielectric constant layer, wherein said second low dielectric constant layer is formed by spin-on method; forming a second cap layer on said second low dielectric constant layer; forming a first hardmask layer on said second cap layer; forming a first bottom anti-reflective coating layer on said first hardmask layer; forming a first photoresist layer on said first bottom anti-reflective coating layer, wherein said first photoresist layer having a first trench opening; etching said first bottom anti-reflective coating layer and said first hardmask layer by using said first photoresist layer as a first mask such that said pattern is transferred into said first hardmask layer; etching said first cap layer and a portion of said second low dielectric constant layer to form a second trench opening, wherein said first cap layer of etch selectivity is different from said second low dielectric constant layer; forming a dielectric layer on said first hardmask layer and filling said dielectric layer in said second trench opening; forming a second hardmask layer on said dielectric layer; forming a second bottom anti-reflective coating layer on said second hardmask layer; forming a second photoresist layer on said second bottom anti-reflective coating layer, wherein said second photoresist layer having a first via opening; etching said second bottom anti-reflective coating layer, said second hardmask layer, said dielectric layer and said second low dielectric constant layer by using said second photoresist layer as a second mask such that said pattern is transferred into said second low dielectric constant layer; etching said first low dielectric constant layer such that said pattern is transferred into said first low dielectric layer; etching said dielectric layer to form a third trench opening on said first low dielectric constant layer; and etching a first cap layer to form a second via opening on said metal layer.