Patent ID: 6574693
Filing Date: 2003-06-03
Classification: G06F

Abstract:
An interrupt gating module comprises:an interrupt register operable to store an indication of activation for each of a plurality of interrupts; a masking register operable to store masking information for each of the plurality of interrupts; first logic circuitry operably coupled to a first portion of the interrupt register that corresponds to a first portion of the plurality of interrupts and to a first portion of the masking register that corresponds to the first portion of the plurality of interrupts, wherein the first logic circuitry provides a first indication as to whether at least one interrupt of the first portion of interrupts is active; second logic circuitry operably coupled to a second portion of the interrupt register that corresponds to a second portion of the plurality of interrupts and to a second portion of the masking register that corresponds to the second portion of the plurality of interrupts, wherein the second logic circuitry provides a second indication as to whether at least one interrupt of the second portion of interrupts is active; and enable circuitry operably coupled to the first and second logic circuitry and is operably coupled to receive an enable/disable signal, wherein the enable circuitry masks the first and second indications when the enable/disable signal is disabled.