Patent ID: 6922319
Filing Date: 2005-07-26
Classification: G01R

Abstract:
1. An adaptively controlled circuit comprising: an output buffer circuit having inputs and outputs and a bias control input: a sensing circuit having inputs and outputs of which two or more outputs turn to lower or higher level than a predetermined threshold level at the same time; a current conversion circuit composed of one or more set of cascaded transistors, of which inputs are connected to outputs of the sensing circuit and the output is connected to foresaid bias control input of the output buffer, wherein a output current of the current conversion circuit increases when signal level of the inputs of the sensing circuit become equal or close each other; wherein the sensing circuit has two or more differential pair transistors and having a voltage or current width as W sensing window and a response time T(second), and for a transition rate Vc(Volt or ampere/second) of foresaid input of differential pair transistors, in order to realize a relationship W>Vc*T two of the transistor in foresaid differential pair transistors have different conductance to each other.