Patent ID: 6701199
Filing Date: 2004-03-02
Classification: G05B,H01L,Y02P

Abstract:
A methodology to obtain integrated semiconductor device processing results prior to installing semiconductor device processing tools in a semiconductor device processing line, comprising:identifying at least one first existing semiconductor device processing tool being replaced in an existing semiconductor device processing line; assigning said at least one first existing semiconductor device processing tool to at least one first replacement sub-module comprising replacement processing tools; evaluating said at least one first replacement sub-module for performance; and simulating effects of down-stream and up-stream existing processing tools on said at least one first replacement sub-module, whereby down-stream existing processing tools precede said at least one first replacement sub-module in a sequence of semiconductor device processing steps while said up-stream existing processing tools follow said at least one first replacement sub-module in said sequence of semiconductor device processing steps.