Patent ID: 8982618
Filing Date: 2015-03-17
Classification: G11C

Abstract:
1. A method of operating a nonvolatile memory device comprising a nonvolatile memory chip comprising a static latch, first and second dynamic latches that receive data stored in the static latch through a floating node, and a memory cell configured to store multi-bit data, the method comprising: performing a refresh operation on the first dynamic latch where externally supplied first single bit data is stored in the first dynamic latch; performing a refresh operation on the second dynamic latch where externally supplied second single bit data is stored in the second dynamic latch; and programming the memory cell using the data stored in the first and second dynamic latches after the first and second single bit data are stored in the respective first and second dynamic latches, wherein the performing a refresh operation on the first dynamic latch includes: charging the floating node; developing the floating node according to a voltage level of a storage node in the first dynamic latch; and developing the storage node according to a voltage level of the floating node.