Patent ID: 6927986
Filing Date: 2005-08-09
Classification: H02M,Y02B

Abstract:
1. A power supply circuit, comprising: a DC-DC conversion circuit that controls an upper transistor and a lower transistor with a plurality of PWM signals, respectively, and generates a PWM-controlled DC output voltage, wherein the upper transistor and the lower transistor are serially connected between a power supply voltage and a reference potential; an error detection unit that compares the PWM-controlled DC output voltage with a reference voltage and outputs an error amount; and a plurality of PWM circuits that generate the plurality of PWM signals that provide PWM control for the DC-DC conversion circuit, wherein the PWM circuits receive an error signal from the error detection unit and generate the PWM signals using potential judging circuits that are mutually shifted by a half cycle, and wherein the PWM signals have a duty in a range of 0-100% according to the error output of the error detection unit.