Patent ID: 7545176
Filing Date: 2009-06-09
Classification: H03K

Abstract:
1. A circuit, comprising: a pair of complementary dynamic circuit nodes having substantial capacitance, wherein the complementary dynamic nodes can represent a state expressing a binary value; a logic input for receiving the binary value and for setting a next state of the complementary dynamic circuit nodes in conformity therewith; a change detector for detecting a change in the value as received at the input and generating a pulse at an output of the change detector in response to the detected value change, wherein the change detector generates the pulse when the next state of the complementary dynamic circuit nodes differs from a previous state of the complementary circuit nodes, and wherein the change detector does not generate the pulse when the next state of the complementary dynamic circuit nodes is the same as the previous state; a pass gate connected between the complementary dynamic circuit nodes and having a control input coupled to the output of the change detector for equalizing a voltage between the complementary dynamic circuit nodes during the pulse; and a pair of driver circuits each having an input coupled to the logic input and an output connected to corresponding one of the complementary dynamic circuit nodes for setting the next state of the complementary dynamic circuit nodes after the pulse has terminated.