Patent ID: 6429054
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A method of forming a semiconductor-on-insulator (SOI) device, comprising the steps of:providing an SOI wafer having a semiconductor active layer, a semiconductor substrate and a buried insulator layer disposed therebetween; defining an active region in the active layer; forming a source, a drain and body in the active region, at least one of the source and the drain forming a hyperabrupt junction with the body; forming a gate disposed on the body such that the source, drain, body and gate are operatively arranged to form a transistor; and forming a silicide region in the at least one of the source and drain forming the hyperabrupt junction with the body, the silicide region having a generally vertical interface, the generally vertical interface being laterally spaced apart from the hyperabrupt junction by about 60 Ã¥ to about 150 Ã¥.