Patent ID: 6970469
Filing Date: 2005-11-29
Classification: H04L,H04Q

Abstract:
1. Scheduling means for data switching apparatus having a plurality of input ports and a plurality of output ports, the scheduling means capable of processing a plurality of interconnection requests, each request requesting interconnection between a subset of said input ports and a subset of respective said output ports, and each request having a respective priority level (Pi) which is one of a predetermined number of priority levels; the scheduling means comprising: determination means for determining a first set of said requests selected from the plurality of requests, according to said respective priority levels; and a first pipeline stage for receiving only said first set of requests and satisfying at least one of the first set of requests; a priority mixer for determining a further set of said requests independently of said priority levels, the further set including requests of said first set which were not satisfied and requests included in said plurality of requests which were not part of said first set and which are of any of said priority levels; and an additional pipeline stage for identifying requests in said further set which can be satisfied, and for satisfying the identified requests.