Patent ID: 6545293
Filing Date: 2003-04-08
Classification: G02F,H01L

Abstract:
A thin film transistor (TFT) display, comprising:a substrate having at least a transistor area and a bonding pad area; a gate electrode and a gate pad respectively formed on the transistor area and the bonding pad area, the gate pad having a first area and a second area; an insulating layer formed on the substrate to cover the gate electrode and the-first area of the gate pad; a first semiconductor layer covering the insulating layer; a second semiconductor layer covering a predetermined area of the first semiconductor layer; a metal layer covering the second semiconductor layer to form a source electrode and a drain electrode, a channel being formed between the source and the drain electrodes; a first conductive layer formed on the surface of the drain electrode, the source electrode, and the substrate except for the surface of the gate pad; a protective layer formed on the transistor area and the bonding pad area, the protective layer filled into the channel and covering the first conductive layer above the source electrode and the drain electrode, and the first area of the gate pad; and a second conductive layer formed on the area uncovered by the protective layer and the second area of the gate pad, the second conductive layer connected with the first conductive layer for electrically connecting the gate pad and the metal layer, wherein the second conductive layer covers the second area of the gate pad and the first conductive layer on the transistor area, and the first conductive layer covers the surface and sidewall of the metal layer on the transistor area so that the gate pad is electrically connected to the metal layer by the first and the second conductive layers.