Patent ID: 6362671
Filing Date: 2002-03-26
Classification: G06F,G06K

Abstract:
A device in an integrated circuit for regenerating a clock signal from a serial bus and comprising:an acquisition stage connected to the serial bus for acquiring a period of the clock signal, said acquisition stage comprising a ring oscillator for providing n phases of a reference clock signal, a counter having an input for receiving at least one of the n phases for counting reference clock signal periods between a first pulse and a second pulse of the serial bus, and means for reading a current phase corresponding to measurement of a phase delay between the reference clock signal and the second pulse, said means for reading the current phase being activated by the second pulse; a regeneration stage connected to said acquisition stage for reproducing the reference clock signal periods counted and the current phase; and a pulse generator connected to said regeneration stage and being controlled thereby for providing the regenerated clock signal.