Patent ID: 8076175
Filing Date: 2011-12-13
Classification: H01L,Y02E,Y02P

Abstract:
1. A method, comprising: forming a diffused layer on a doped substrate of a thin crystalline silicon wafer in a thermal cycle, wherein the thermal cycle is performed in a furnace, and wherein the conductivity type of the diffused layer is opposite the conductivity type of at least an adjacent portion of the doped substrate thereby forming a p-n homojunction; injecting oxygen into the furnace to form a first oxide layer on a first surface of the crystalline silicon wafer proximate the diffused layer and to form a second oxide layer on a second surface of the crystalline silicon wafer opposite the diffused layer in the thermal cycle; removing the first and second oxide layers to expose the first and the second surfaces of the crystalline silicon wafer; forming a first undoped amorphous silicon layer to the first surface of the crystalline silicon wafer; forming a second undoped amorphous silicon layer to the second surface of the crystalline silicon wafer; forming a first doped amorphous silicon layer on the first undoped amorphous silicon layer, wherein the conductivity type of the first doped amorphous silicon layer is the same as the conductivity type of the diffused layer; and forming a second doped amorphous silicon layer on the second undoped amorphous silicon layer, wherein the conductivity type of the second doped amorphous silicon layer is opposite the conductivity type of the diffused layer.