Patent ID: 6673672
Filing Date: 2004-01-06
Classification: H01L

Abstract:
A semiconductor device manufacturing method comprising the steps of:forming a first insulating film over a semiconductor substrate; forming a first conductive film, a ferroelectric film, and a second conductive film sequentially on the first insulating film; forming an upper electrode of a capacitor by patterning the second conductive film; forming a dielectric film of the capacitor by patterning the ferroelectric film; forming a lower electrode of the capacitor by patterning the first conductive film; forming a first capacitor protection insulating film covering the dielectric film and the upper electrode; forming a second capacitor protection insulating film, which covers the first capacitor protection insulating film, by a chemical vapor deposition method in a state that a bias voltage is not applied to the semiconductor substrate; and forming a second insulating film on the second capacitor protection insulating film by the chemical vapor deposition method in a state that the bias voltage is applied to the semiconductor substrate.