Patent ID: 7907426
Filing Date: 2011-03-15
Classification: H02M,Y02B

Abstract:
1. A flyback circuit providing synchronized control including a primary side which has a primary winding and a secondary side which has a secondary winding that are induced to form opposite polarities, the secondary winding having a current ON period controlled by start/stop of a synchronized commutation switch, the flyback circuit further comprising: a pulse width modulation (PWM) unit to generate a driving signal to control ON period of a power switch of the primary winding and output a synchronized signal prior to generation of the driving signal that has time series ahead the driving signal; a synchronized control unit to receive the synchronized signal through an induction winding to set off the synchronized commutation switch; and an ON period limiting unit to start a period limiting time series after the synchronized commutation switch has been set ON; wherein the ON period limiting unit is reset to an initial condition after the synchronized commutation switch has been set off by the synchronized signal, the synchronized commutation switch being maintained in an ON condition until the period limiting time series end; the ON period limiting unit generating a forced ending signal to end the ON condition of the synchronized commutation switch so that the flyback circuit operates at a minimum duty frequency.