Patent ID: 6414880
Filing Date: 2002-07-02
Classification: G11C

Abstract:
A memory LSI, comprising:a data input/output terminal group for input/output of data; a memory section which writes and reads data entered or output via the data input/output terminal group; a multiple line buffer section which has a plurality of line buffers for retaining data previously read out from the memory section, said line buffers being accessed upon memory access; a control circuit which controls a total operation; and a write-back buffer which retains copies of the data in the line buffers; where the line buffer retaining the data read out from the memory section does not exist in a multiple line buffer section, the control circuit copies the data retained in any of the line buffers, causes the write-back buffer to temporarily retain the copies of data, then, causes the line buffer to retain the data read out from the memory section, and writes back the data temporarily retained in said write-back buffer to the memory section.