Patent ID: 7293208
Filing Date: 2007-11-06
Classification: G11C

Abstract:
1. A test method of using a test apparatus for testing a nonvolatile memory including n data terminals, where n is an integer greater than 1 , wherein the data terminals are commonly used for input and output of writing data and reading data, wherein the nonvolatile memory is configured such that an n-th data terminal among the n data terminals is also used to output a completion signal indicating a completion of a writing operation or a completion of an erasing operation within the nonvolatile memory, the test apparatus including n+1 input and output terminals, the test method comprising: providing the test apparatus; providing the nonvolatile memory; connecting n input and output terminals of the test apparatus to the n data terminals of the nonvolatile memory, respectively, and connecting the n-th data terminal of the nonvolatile memory to the (n-th+1) input and output terminal of the test apparatus as well as to the n-th input and output terminal of the test apparatus; outputting writing data from the n input and output terminals of the test apparatus, and writing the writing data to a predetermined memory area of the nonvolatile memory; and monitoring an output timing of the completion signal supplied from the nonvolatile memory after a completion of the writing of the writing data at the (n-th+1) input and output terminal of the test apparatus.