Patent ID: 7937691
Filing Date: 2011-05-03
Classification: G06F

Abstract:
1. A computer implemented method in an instruction cache of a data processing system for monitoring execution of instructions, the method comprising: receiving a bundle at an instruction cache unit, the bundle containing at least one instruction slot, wherein the instruction slot contains an instruction; responsive to receiving the bundle, determining by the instruction cache unit whether the bundle contains an indicator within at least one spare bit of the at least one instruction slot, wherein the indicator identifies the instruction as one that is to be monitored by a performance monitor unit; responsive to a determination that the bundle contains the indicator within the at least one instruction slot, sending a signal by the instruction cache unit to a performance monitor unit, wherein upon receiving the signal, the performance monitor unit increments a counter in the instruction cache unit that is associated with the instruction, the incrementing providing a count of a number of times the instruction is executed; and sending the bundle from the instruction cache unit to a functional unit for execution of the instruction.