Patent ID: 7138312
Filing Date: 2006-11-21
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device comprising a first inverter including a first load transistor and a first driver transistor, and a second inverter including a second load transistor and a second driver transistor, the method further comprising the steps of: forming over a semiconductor substrate a first gate interconnection including the gate electrode of the first load transistor, and the gate electrode of the first driver transistor; and a second gate interconnection including the gate electrode of the second load transistor and the gate electrode of the second driver transistor; forming a source/drain diffused layer in the semiconductor substrate of both sides of the respective gate electrodes; forming an insulation film over the semiconductor substrate, the first gate interconnection and the second gate interconnection; forming in the insulation film a first groove-shaped opening for integrally exposing the first gate interconnection, one of the source/drain diffused layer of the second load transistor and one of the source/drain diffused layer of the second driver transistor; and a second groove-shaped opening for integrally exposing the second gate interconnection, one of the source/drain diffused layer of the first load transistor and one of the source/drain diffused layer of the first driver transistor; and burying a contact layer in the first opening and the second opening.