Patent ID: 8735948
Filing Date: 2014-05-27
Classification: B81B,B81C,H01L,H04R

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a top surface and a bottom surface; a source region formed in a top layer portion of the semiconductor substrate; a drain region formed in the top layer portion of the semiconductor substrate and spaced apart from the source region; a gate insulating film formed on the semiconductor substrate; a gate electrode formed on the gate insulating film and opposing a region between the source region and the drain region; a wiring formed on the semiconductor substrate and connected to the source region, the drain region, or the gate electrode; and a MEMS (Micro Electro Mechanical System) sensor disposed on the semiconductor substrate, the MEMS sensor including: wherein the substrate has a hole penetrating therethrough between the top and bottom surfaces thereof; wherein an opening of the hole is formed in an area facing the first electrode on the top surface of the substrate; wherein the first electrode opposes the top surface of the semiconductor substrate at an interval equal to a thickness of the gate insulating film, so that the top surface of the semiconductor substrate is spaced away from the first electrode to define a second gap corresponding to the thickness of the gate insulating film between the first electrode and the top surface of the semiconductor substrate; wherein the first gap and the second gap communicate with each other through a communicating space extending in a direction perpendicular to the top surface of the substrate; wherein the second electrode has a plurality of holes that penetrate therethrough, and are arranged in a uniformly spaced relation at least in a region opposed to the opening of the hole of the substrate; wherein a lower surface and an upper surface of the lower coating film are flat at least in a region that the first electrode faces the second electrode; wherein a lower surface and an upper surface of the second electrode are flat at least in the region that the first electrode faces the second electrode; wherein a surface of the upper coating film is flat at least in the region that the first electrode faces the second electrode; and wherein sides of the second electrode perpendicular to the top surface of the semiconductor substrate are covered by the upper coating film.