Patent ID: 6180530
Filing Date: 2001-01-30
Classification: H01L

Abstract:
A method for fabricating a SAC structure, for a SRAM device, on a semiconductor substrate, comprising the steps of:providing a field oxide region in said semiconductor substrate;providing transfer gate transistors, comprised of polysilicon gate structures, on a thin gate insulator layer, and comprised of source and drain regions, in said semiconductor substrate, between said polysilicon gate structures;forming a dual shape SAC opening, in a first insulator layer, with said dual shape SAC opening comprised with a first portion featuring a narrow opening, exposing a portion of said source and drain regions located between said polysilicon gate structure, and with said dual shape SAC opening comprised with a second portion featuring a wide opening exposing a portion of said field oxide region;forming a SAC structure in said dual shape SAC opening;depositing a second insulator layer;opening a contact hole in said second insulator layer, exposing the top surface of said SAC structure, in a region in which said SAC structure resides in said second portion of said dual shape SAC opening;forming a metal contact structure, in said contact hole, wherein said metal contact structure, is comprised of a second tungsten plug, on a titanium nitride layer, with said second tungsten plug from a deposition of a tungsten layer, via LPCVD procedures and from a following anisotropic RIE procedure, using Cl.sub.2 as an etchant;forming a metal interconnect structure, overlying and contacting said metal contact structure.