Patent ID: 8391071
Filing Date: 2013-03-05
Classification: G11C

Abstract:
1. A readout circuit comprising a sense amplifier to compare a cell current, which changes according to whether a memory cell is on or off, to a reference current to output a comparison signal of a first logic value upon detecting that the cell current is smaller than the reference current, and to output a comparison signal of a second logic value upon detecting that the cell current is greater than the reference current, the readout circuit outputting a data output signal depending upon an output of the sense amplifier, wherein the reference current is set to be greater than a middle value between a first cell current, which flows when the memory cell is in an off-state, and a second cell current, which flows when the memory cell is in an on-state, the reference current is greater than the first cell current and is smaller than the second cell current, and the sense amplifier outputs the comparison signal of the second logic value unless the sense amplifier detects that the cell current is smaller than the reference current as a result of a comparison made between the cell current and the reference current, wherein the sense amplifier outputs the comparison signal of the second logic value regardless of whether the sense amplifier detects that the cell current is greater than the reference current.