Patent ID: 9059203
Filing Date: 2015-06-16
Classification: H01L

Abstract:
1. A field effect transistor comprising: a semiconductor substrate having a top surface; an insulator layer having a bottom surface on said top surface of said semiconductor substrate; a semiconductor layer on said insulator layer, said semiconductor layer comprising a source and drain diffusion regions and a channel region positioned laterally between said source and drain diffusion regions; voids in said semiconductor substrate at said top surface, said voids being below and immediately adjacent to said bottom surface of said insulator layer, each one of said voids being aligned below a corresponding one of said source and drain diffusion regions such that capacitance coupling between said source and drain diffusion regions and said substrate is less than capacitance coupling between said channel region and said substrate; and openings extending through said source and drain diffusion regions and said insulator layer to said voids, wherein portions of said openings within said source and drain diffusion regions are filled with an additional semiconductor layer.