Patent ID: 8417851
Filing Date: 2013-04-09
Classification: G06F

Abstract:
1. A method of controlling electronic input/output at a peripheral device of a computer system, the method comprising: transmitting a requested read or write operation from a processor to a memory-mapped input/output (MMIO) ring on the peripheral device allowing communication between a master and a plurality of slaves; the peripheral device identifying a requested value of a target register on the peripheral device as a precondition to performing the requested read or write operation; determining, by address, which of the plurality of slaves is responsible for the target register; suspending the slave responsible for the target register in response to determining that the polled value of the target register is not yet equal to the requested value of the target register; the peripheral device periodically internally polling the value of the target register while the slave responsible for the target register is suspended; and in response to the polled value of the target register having the requested value, un-suspending the slave responsible for the target register and performing the read or write operation, and using a free packet to provide a result of the read or write operation to the processor.