Patent ID: 6372621
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A method of forming a bonding pad on a semiconductor chip, the bonding pad being used to electrically connect an integrated circuit in the semiconductor chip with an external circuit, the method comprising:forming a uniform dielectric layer by using a first dielectric material on the surface of the semiconductor chip; performing photolithographic and etching processes to remove the first dielectric material outside of a predetermined area to form a first dielectric layer; forming a uniform dielectric layer by using a second dielectric material on the surface of the semiconductor chip and the first dielectric layer wherein the first dielectric material is harder than the second dielectric material; removing the second dielectric material positioned on the surface of the first dielectric layer to form a second dielectric layer wherein the surface of the second dielectric layer is coplanar with the surface of the first dielectric layer and adjacent to the first dielectric layer; and forming the bonding pad on the first dielectric layer.