Patent ID: 7368804
Filing Date: 2008-05-06
Classification: H01L

Abstract:
1. A semiconductor die comprising: a first dielectric layer over a substrate; a first conductive layer formed in the first dielectric layer, the first conductive layer comprising a plurality of conductive lines formed in the first dielectric layer, at least one of the conductive lines having a line width that is greater than a groundrule width; a second dielectric layer over the first dielectric layer and the first conductive layer; a second conductive layer formed in the second dielectric layer, the second conductive layer comprising a plurality of conductive lines formed in the second dielectric layer; and a plurality of vias formed through the second dielectric layer, one or more of the vias electrically connecting the first conductive layer to the second conductive layer; wherein a width of all vias that electrically connect at least one of the conductive lines having a line width greater than the groundrule width to the second conductive layer is greater than a groundrule size for the semiconductor die.