Patent ID: 7124232
Filing Date: 2006-10-17
Classification: G06F

Abstract:
1. A bus connection circuit, which is connected via a bus to a bridge circuit having a plurality of pre-fetch buffers for pre-fetching of data from an external device, and which receives data from said pre-fetch buffers after assertion of a request, comprising: a plurality of request queues; an arbiter which performs arbitration of the requests of said plurality of request queues; and a bus interface portion which outputs request signals indicating allocation of said pre-fetch buffers corresponding to requests arbitrated by said arbiter, and which receives corresponding grant signals from said bridge circuit, said bus interface portion being connected via said bus and a plurality of request lines, corresponding to the allocation of said pre-fetch buffers to said bridge circuit, and outputs respective request signals to said request lines corresponding to said requests arbitrated by said arbiter.