Patent ID: 6858904
Filing Date: 2005-02-22
Classification: H01L

Abstract:
1. An integrated circuit, comprising: a silicon substrate; an insulating layer formed on an upper surface of the substrate wherein a contact opening is formed in the insulating layer, wherein the contact opening extends from an upper surface of the insulating layer to the upper surface of the substrate; a conductive contact deposited in the opening in a manner such that the conductive contact directly contacts the upper surface of the substrate, wherein the conductive contact comprises a titanium layer interspersed with titanium silicide, wherein a substantial portion of the titanium silicide is interspersed in the titanium prior to the depositing in the opening such that the substantial portion of titanium silicide reduces the total amount of silicon from the substrate consumed in forming titanium silicide in the conductive contact; a conductive contact fill formed on an upper surface of the conductive contact, wherein the conductive contact fill comprises titanium nitride.