Patent ID: 9012287
Filing Date: 2015-04-21
Classification: H01L

Abstract:
1. A method of forming a semiconductor device having a static random-access memory (SRAM) cell array, wherein each SRAM cell comprises two pull-up (PU), two pass-gate (PG), and two pull-down (PD) FinFETs, the method comprising: patterning a plurality of fins including active fins and dummy fins, wherein each PG FinFET shares at least one active fin with a PD FinFET, wherein no dummy fin is disposed between PU FinFETs in a memory cell, a dummy fin is disposed between a PU FinFET and the at least one active fin shared by a PG and a PD FinFET, and wherein at least one dummy fin is disposed between the at least one active fin shared by a PG and PD FinFET across adjacent memory cells; and patterning and removing at least a portion of the dummy fins.