Patent ID: 8624382
Filing Date: 2014-01-07
Classification: H01L

Abstract:
1. A packaging substrate, comprising: a first dielectric layer having a first surface and an opposite second surface; a plurality of first conductive pads partially embedded in and exposed from the first surface of the first dielectric layer for a semiconductor chip to be disposed on the first conductive pads; a first circuit layer partially embedded in and exposed from the second surface of the first dielectric layer; a plurality of first metal bumps disposed in the first dielectric layer, each of the first metal bumps having a first end and an opposite second end, wherein the second end of the first metal bump is disposed on the first conductive pad, the first end of the first metal bump is embedded in the first circuit layer, and a conductive seedlayer is disposed between the first circuit layer and the first dielectric layer and between the first circuit layer and the first metal bump; a built-up structure disposed on the first circuit layer and on the second surface of the first dielectric; and a plurality of second conductive pads disposed on the built-up structure for an external electronic device to be disposed thereon.