Patent ID: 6157062
Filing Date: 2000-12-05
Classification: H01L

Abstract:
An integrated circuit device structure, comprising:first low voltage and second relatively high voltage transistors of the same conductivity type disposed on a single semiconductor chip, each of said first and second transistors having a pair of source/drain regions separated by a channel region and a gate region over and spaced from said channel region,said source/drain regions of said first transistor composed of first and second implants, one of said first and second implants being self aligned to the edges of its corresponding gate region and extending under said gate region and the other of said first and second implants being aligned to a sidewall spacer on said corresponding gate region of said first transistor and extending beneath said first implant; andsaid source/drain regions of said second transistor composed of said second and a third implant, both of said implants of said second transistor being aligned to a sidewall spacer on said corresponding gate region of said second transistor.