Patent ID: 6207486
Filing Date: 2001-03-27
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising:forming a gate electrode adjacent to a main surface of a semiconductor substrate;forming a source and a drain electrode in the main surface of the semiconductor substrate, the gate electrode disposed between the source electrode and the drain electrode;forming a first nitride layer over one of the gate electrode, the source electrode, and the drain electrode, the first nitride layer comprising insulator nitride, the insulator nitride being compound of nitrogen and a material;forming an interlayer insulator over the first nitride layer, and the interlayer insulator has a through-hole above one of the gate electrode, the source electrode, and the drain electrode;forming a second nitride layer comprising a conductive nitride, the second nitride layer being at a bottom of the through-hole; andforming a wiring layer in the through-hole, the wiring layer coupled to one of the gate electrode, the source electrode, and the drain electrode, through the second nitride layer,wherein bonding energy of the conductive nitride is higher than that of the insulator nitride.