Patent ID: 6245643
Filing Date: 2001-06-12
Classification: H01L

Abstract:
A method of forming a field oxide isolation region in a semiconductor device, comprising the steps of:forming a first pad oxide layer over a semiconductor substrate;forming a silicon nitride layer over said first pad oxide layer;patterning and etching said silicon nitride layer and said first pad oxide layer to expose a portion of said substrate substantially defining the boundaries of the isolation region, and simultaneously forming an undercut cavity by removing a portion of said first pad oxide layer under the exposed edges of said silicon nitride layer surrounding said exposed portion;forming a second pad oxide layer over said exposed portion of said substrate;depositing a layer of polysilicon over said second pad oxide layer, said silicon nitride layer, and said exposed edges, said polysilicon layer filling said undercut cavity and forming a polysilicon plug and inside said cavity;removing portions of said polysilicon layer lying over said silicon nitride layer and a central portion of said second pad oxide layer leaving a polysilicon spacer bounding said exposed edges;thermally oxidizing said substrate to substantially consume said polysilicon spacer but leave a polysilicon residual of said polysilicon plug, said thermal oxidation forming a thick oxide above said exposed portion of said substrate;substantially removing said silicon nitride layer;applying a first etching solution to said first pad oxide layer and said polysilicon residual, said first etching solution providing selective etching of said first pad oxide layer and said polysilicon residual so that said polysilicon residual is substantially removed and said first pad oxide layer is partially removed leaving a first pad oxide layer residual; andapplying a second etching solution to remove said first pad oxide layer residual, thereby leaving said thick oxide to form the isolation region.