Patent ID: 8040172
Filing Date: 2011-10-18
Classification: H03K

Abstract:
1. A logic level converter comprising: two first electronic switches coupled in a bi-stable flip-flop arrangement having at least one output line; a forcing circuitry including two second electronic switches to force switching of said two first electronic switches in said flip-flop arrangement, said forcing circuitry having an input terminal to receive a logic input signal having at least one level to produce switching of said flip-flop arrangement and generate at said at least one output line, a logic output signal having at least one level converted with respect to said at least one level of said logic input signal; and at least one respective cascode electronic switch interposed between each of said two first electronic switches in said flip-flop arrangement and a respective one of said two second electronic switches in said forcing circuitry, wherein said at least one respective cascode electronic switch limits the voltage across said two first electronic switches in said flip-flop arrangement, wherein said two first electronic switches are coupled via crossed coupling paths coupling the gates of each of said two first electronic switches to a source-drain line of the other of said two first electronic switches in said flip-flop arrangement, and wherein respective resistors are interposed in said crossed paths of the flip-flop arrangement, to increase the gate-source voltage of said two first electronic switches during switching transients.