Patent ID: 7966505
Filing Date: 2011-06-21
Classification: H03M,H04L

Abstract:
1. An apparatus for reducing power consumption in an iterative decoder, comprising: a memory device for storing a bit number difference indicating a number of bits that are different between a decoded codeword for a current iteration and a decoded codeword for a previous iteration, for each iteration of the iterative decoder prior to a maximum number of iterations; and an iteration termination device for comparing the bit number difference to a pre-specified bit number difference threshold value, incrementing a confidence value when the bit number difference is less than the pre-specified bit number difference threshold value, and terminating further iterations of the iterative decoder when the confidence value exceeds a pre-specified confidence threshold value; wherein said iteration termination device resets the confidence value to zero when the bit number difference is equal to or higher than the pre-specified bit number difference threshold value.