Patent ID: 6819137
Filing Date: 2004-11-16
Classification: H03K

Abstract:
A pseudo folded cascode level shifting circuit comprising:a first differential amplifier having first and second input terminals, first and second current sinking terminals, and first and second current sourcing terminals, the first input terminal for receiving a single-ended input signal, the second input terminal for receiving a single-ended reference signal; a second differential amplifier having first and second input terminals, first and second current sinking terminals, and first and second current sourcing terminals, the first and second input terminals of the second differential amplifier coupled to the first and second current sinking terminals of the first differential amplifier, respectively; a first current source having a control terminal for receiving a first bias control signal, and a current sinking terminal coupled to the first and second current sourcing terminals of the second differential amplifier; a second current source having a control terminal for receiving a second bias control signal, a current sinking terminal coupled to a power supply, and a current sourcing terminal coupled to the first current sinking terminal of the second differential amplifier; a third current source having a control terminal for receiving the second bias control signal, a current sinking terminal coupled to the power supply, and a current sourcing terminal coupled to the second current sinking terminal of the second differential amplifier; a first transistor having a control terminal for receiving a third bias control signal, a current sinking terminal coupled to the current sourcing terminal of the second current source and to the first current sinking terminal of the second differential amplifier, and a current sourcing terminal; a second transistor having a control terminal for receiving the third bias control signal, a current sinking terminal coupled to the current sourcing terminal of the third current source and to the second current sinking terminal of the second differential amplifier, and a current sourcing terminal; a first load coupled to the current sourcing terminal of the first transistor; and a second load coupled to the current sourcing terminal of the second transistor.