Patent ID: 6640264
Filing Date: 2003-10-28
Classification: H02P

Abstract:
In a programmable controller for implementing logic based program control sequences of an operating system, wherein a process is applied to convert non-discrete intermediate state conditions into discrete incremental logic states for judging one incremental state against another in a device further comprising:a read only memory (ROM) to store operating system for orchestrating system level operations; a random access memory (RAM) to store operational status and user-defined control sequences for executing logical functions responsible for generating response activities; a processor to execute instruction sequences from memory for directing data flow between hardware elements of a system that encompasses a programmable controller device; inputs and outputs for connectivity to external devices and user interfaces to satisfy input/output (I/O) parameters of a control or operating sequence; means to sample non-discrete intermediate values of an input signal source for voltage, resistance, or current; means to apply user-defined compression ratios to sampled inputs for producing discrete states in equal increments between fixed minimum and maximum values whereby non-discrete intermediate state values are compressed into a subset of their original values; means to apply user-defined hysteresis to select transition points from one incremental state to another; means to represent magnitude values for voltage, resistance, or current, in incremental logic states for integrating non-discrete intermediate signal sources with logic based control sequences.