Patent ID: 7584344
Filing Date: 2009-09-01
Classification: G06F

Abstract:
1. A method for operating an integrated circuit having a processor, the method comprising: representing an instruction of the processor using a plurality of bits; using a first portion of the plurality of bits to determine that the instruction is a conditional yield instruction; using a second portion of the instruction to determine where at least one priority selection bit is located; when the second portion of the instruction determines that the at least one priority selection bit is located in the instruction itself, using a third portion of the instruction to store the at least one priority selection bit; when the second portion of the instruction determines that the at least one priority selection bit is not located in the instruction itself, using a register to store the at least one priority selection bit; using the at least one priority selection bit to select a selected priority criterion from a plurality of priority criteria; when the selected priority criterion is a first criterion, comparing a priority of a currently executing thread with a priority of a second thread that is ready to run to produce a comparison result; and when the selected priority criterion is the first criterion, using the comparison result to determine if the currently executing thread should yield to the second thread, wherein the step of using the comparison result to determine if the currently executing thread should yield to the second thread comprises yielding to the second thread when the priority of the second thread is higher than the priority of the currently executing thread, wherein none of the plurality of priority criteria produce a change in priority of any thread.