Patent ID: 6017273
Filing Date: 2000-01-25
Classification: A63F,G06F

Abstract:
An adapter card for interfacing between a host bus of a host central processing unit (CPU) and an analog output device comprising a variable resistor having a bias voltage input and a wiper output, said adapter card comprising:a programmable resistor connected in series between said wiper output of said analog output device and a voltage return terminal;an analog-to-digital converter (ADC) having a digital output and an analog input coupled to a connection point between said wiper output and said programmable resistor;a processor apparatus coupled to said programmable resistor and to said analog-to-digital converter and adapted to:(a) provide data transfer from said digital output to said host bus, and(b) program the resistance of said programmable resistor in accordance with a predetermined divider resistor value of said wiper output.