Patent ID: 7388284
Filing Date: 2008-06-17
Classification: H01L

Abstract:
1. An integrated circuit package comprising: a substrate having a plurality of metal layers comprising embedded conductors, wherein an embedded conductor of a metal layer is exposed on a surface; a recess adjacent to said embedded conductor exposed on said surface and extending to a layer of said substrate below said embedded conductor exposed on said surface, wherein said recess and said embedded conductor exposed on said surface are positioned on an outer edge of said substrate; a lid comprising a plurality of conductive portions having a contact surface of a foot portion of a wall extending around the perimeter of said substrate and positioned over said embedded conductor exposed on said surface, said lid comprising a flange extending along the perimeter of said lid from said contact surface to an end, wherein said contact surface is positioned adjacent to said embedded conductor and said end of said flange is positioned within said recess and adjacent to said layer of said substrate below said embedded conductor exposed on said surface; and a solder bond between said embedded conductor exposed on said surface and a conductive portion of said plurality of conductive portions of said lid.