Patent ID: 6225161
Filing Date: 2001-05-01
Classification: H01L,Y10S

Abstract:
A method for forming a semiconductor device comprising:ion implanting a well junction region in a semiconductor substrate;etching a trench having substantially vertical sidewalls, a bottom surface, and a first depth in the well junction region;forming a trench-to-gate dielectric layer inside the trench;forming a trenched floating gate electrode on the trench-to-gate dielectric layer inside the trench;forming an inter-gate dielectric layer on the trenched floating gate electrode inside the trench;forming a trenched control gate electrode on the inter-gate dielectric layer inside the trench by depositing a layer of conductive material on the semiconductor substrate; and planarizing the layer of conductive material until a top surface of the conductive material is substantially planar with a top surface of the semiconductor substrate; andforming a buried source region and a buried drain region in the well junction region with a source junction disposed along portions of the sidewall and bottom of the trench; and with the buried drain region having a lower boundary which has a depth that is approximately less than the first depth of the trench.