Patent ID: 6472281
Filing Date: 2002-10-29
Classification: H01L

Abstract:
A method for fabricating a semiconductor device functioning as an MOS field effect transistor, the method comprising the steps of:a) forming a gate insulator film and a gate electrode on a semiconductor substrate in this order; b) forming a CVD insulator film to cover an exposed surface of the gate electrode by performing a CVD process; c) etching anisotropically the CVD insulator, film to form sidewalls made from the CVD insulator film on the side faces of the gate electrode after the step b) has been performed; d) forming impurity layers of a first conductivity type in the semiconductor substrate by implanting dopant ions into the semiconductor substrate from above the gate electrode and the sidewalls made from the CVD insulator film; e) forming a diffusion layer composed of a punch through stopper of a second conductivity type in the semiconductor substrate by implanting dopant ions into the semiconductor substrate before or after the step d) has been performed; f) forming sidewall spacers over the side faces of the gate electrode with sidewalls made from the CVD insulator film interposed therebetween, after the steps d and e) have been performed; and g) forming source/drain layers of the first conductivity type in the semiconductor substrate, after the step f) has been performed; wherein the impurity layers of the first conductivity type over-lapped the gate electrode.