Patent ID: 6982491
Filing Date: 2006-01-03
Classification: B81B,H01L

Abstract:
1. An integrated circuit package comprising: a substrate having conductive traces therein, the substrate including a cavity therein; a semiconductor die mounted to a first surface of the substrate, in a flip-chip orientation such that a sensor portion of said semiconductor die is aligned with said cavity and conductive interconnects connect pads of the semiconductor die to said conductive traces of said substrate; an underfill material surrounding said interconnects; a plurality of conductive balls disposed on said first surface of said substrate, said conductive balls being electrically connected to said conductive traces such that ones of said conductive balls are connected to ones of said pads of said semiconductor die via said conductive traces; and an overmold material covering a back side of said semiconductor die and said plurality of conductive balls such that portions of said conductive balls are exposed.