Patent ID: 6963504
Filing Date: 2005-11-08
Classification: B82Y,G11C

Abstract:
1. A method for programming a memory array of antifuse memory cells coupled between a respective array line on one memory array layer and a respective array line on another memory array layer, said memory cells comprising two opposite conductivity type semiconductor regions, one being more lightly-doped than the other, said method comprising: pulsing for a first time period a first selected array line coupled to the more heavily-doped region of a selected memory cell from an unselected bias voltage to a selected bias voltage; and pulsing for a second time period a second selected array line coupled to the more lightly-doped region of the selected memory cell from an unselected bias voltage to a selected bias voltage; wherein the first and second array line pulses are arranged so that the selected memory cell, once programmed, is reversed biased whenever the second selected array line is biased at an intermediate voltage closer to its unselected bias voltage than its selected bias voltage.