Patent ID: 8730143
Filing Date: 2014-05-20
Classification: G09G

Abstract:
1. A liquid crystal display device comprising: a liquid crystal panel including a plurality of pixel regions defined by gate lines and data lines; a timing controller configured to output a plurality of data control signals, a plurality of clock pulses and a start pulse; a time-divisional switching unit configured to time-divide each clock pulse into at least two time-divisional clock pulses, and output a plurality of time-divisional clock pulses to a gate driving unit; a data driving unit configured to drive the data lines according to the plurality of data control signals; and the gate driving unit including a plurality of stages configured to sequentially output scan pulses according to the start pulse and the plurality of time-divisional clock pulses, wherein the plurality of stages is grouped into a plurality of blocks, and each block receives at least two time-divisional clock pulses, wherein each time-divisional clock pulse is time-divided from one of the plurality of clock pulses, and has the one clock pulse for 1/n frame and a low level signal for (n−1)/n frame, wherein n is a natural number, and wherein the one clock pulse alternates equally between high and low levels.