Patent ID: 6399495
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method for forming a metal-insulator-metal (MIM) capacitor and an interconnect in integrated circuits, said method comprising:providing a substrate with a plurality of conductive blocks under a surface of said substrate; depositing a first nitride layer on said substrate; forming a first inter-metal-dielectric (IMD) layer on said first nitride layer; depositing a second nitride layer on said first IMD layer; forming a second IMD layer on said second nitride layer; forming a first mask on said second IMD layer with a first opening to expose said second IMD layer; using a first etching process to form a via through said second IMD layer, said second nitride layer, said first IMD layer and said first nitride layer in said first opening to expose one of said conductive blocks; using a second etching process to form a hole to expose said first nitride layer, wherein said hole above one of said conductive blocks; and filling a conductive material into said via and said hole to respectively form said interconnect and said MIM capacitor.