Patent ID: 6590449
Filing Date: 2003-07-08
Classification: H03F

Abstract:
A predistortion circuit comprising:a divider for branching an input signal into plural branched signals; a delay circuit for delaying one of the branched signals by a predetermined delay time; a distortion generating circuit for receiving the other branched signal and for generating a distortion signal; a vector adjustment circuit for varying an amplitude and a phase of the distortion signal; and a combining circuit for combining an output signal of the delay circuit and an output signal of the vector adjustment circuit and for outputting a combined signal to circuit means as a subject of linearization to be provided downstream of and connected directly or indirectly to the combining circuit, wherein the delay time of the delay circuit is set based on a phase difference of a distortion that would be generated by the circuit means if the vector adjustment circuit did not produce the output signal, and wherein the delay time of the delay circuit is set based on the phase difference in such a manner that a first delay time is so set that a difference between the first delay time and a second delay time is substantially equivalent to or corresponding to the phase difference, where the first delay time is the delay time itself and the second delay time is a delay time of a signal that is input to the combining circuit via the distortion generation circuit and the vector adjustment circuit.