Patent ID: 8575670
Filing Date: 2013-11-05
Classification: H01L

Abstract:
1. A method of forming a memory device comprising: providing a semiconductor on insulator (SOI) substrate including a semiconductor on insulator (SOI) layer over a buried dielectric layer, wherein the buried dielectric layer has a thickness of less than 100 nm and is present on a base semiconductor layer; forming a trench through the SOI layer and the buried dielectric layer and into the base semiconductor layer; forming a capacitor in the trench; recessing the capacitor in the trench to a depth that is below the buried dielectric layer; forming a dielectric spacer on the sidewalls of the trench, wherein the dielectric spacer is present on portions of the trench where said sidewalls are provided by the SOI layer and the buried dielectric layer; filling the trench with a connecting conductive material that is present on the capacitor; and forming a semiconductor device on the SOI layer, wherein the semiconductor device is present in electrical communication with the capacitor through the connecting conductive material.