Patent ID: 6608379
Filing Date: 2003-08-19
Classification: H01L

Abstract:
A chip scale package for connecting a flip chip die having alternating signal and ground connections to a primary circuit board, said chip scale package comprising:a substrate comprising a top side for mounting the flip chip die and a bottom side for mounting said substrate to the primary circuit board; a set of top-side pads on said top side of said substrate, respective ones of said top-side pads corresponding to respective ones of the substantially alternating signal and ground connections of the flip chip die; a set of bottom-side pads on said bottom side of said substrate for electrically connecting with the primary circuit board, respective ones in said set of bottom-side pads corresponding to respective ones in said set of top-side pads; a plurality of conductive paths extending through said substrate from said top side to said bottom side and electrically coupling respective ones in said set of top-side pads to respective ones in said set of bottom-side pads, said conductive paths arranged to maintain alternating signal and ground connections between respective ones of said top-side pads and respective ones of said bottom-side pads a ground plane disposed on said bottom-side of said substrate within a central area of said bottom side of said substrate, said bottom side pads disposed generally about said ground plane; a plurality of thermal solder balls coupled to said ground plane to electrically and thermally couple said ground plane with the primary circuit board; a plurality of thermal vias projecting upward from said ground plane through said substrate to said top side of said substrate such that said plurality of thermal vias are beneath the flip chip die when the flip chip die is mounted to said top side; and conductive traces coupling selected ones of said conductive paths that are connected to electrical ground to said thermal vias.