Patent ID: 7682844
Filing Date: 2010-03-23
Classification: G01N,H01J

Abstract:
1. A silicon substrate processing method which reduces thickness of an area of a silicon substrate on which a metal layer is formed to implement a semiconductor integrated circuit, comprising the steps of: (A) evenly reducing thickness of a backside of the silicon substrate to an extent where mechanical strength is maintained and the metal layer on the silicon substrate remains intact; (B) detecting a defect from the backside of the silicon substrate after the step (A); (C) further reducing the thickness of an area of the silicon substrate containing the defect by processing the backside of the silicon substrate; (D) measuring the thickness of the defect-containing area of the silicon substrate which is reduced in the step (C), and determining whether interference fringes are formed by irradiating the silicon substrate from the backside with a light, and if interferences are not formed, repeating steps (C) and (D), wherein the step (D) of measuring the thickness of the defect-containing area of the silicon substrate includes a step which measures the thickness based on the interference fringe formation and electron acceleration energy which is detected when a pattern on a front side of the defect-containing area is observed from the backside of the silicon substrate by using a SEM.