Patent ID: 6150255
Filing Date: 2000-11-21
Classification: H01L,H05K

Abstract:
A method of manufacturing a substrate for the removable reception of an integrated circuit (I/C) chip thereon, comprising the steps of:providing a dielectric substrate having a top surface with a plurality of top surface metallurgy (TSM) pads therein, and wherein said top surface has a curvilinear configuration over at least the portion thereof where the TSM pads are located,applying to the top surface of said substrate over said TSM pads a compliant photoimagable material having an exposed surface thereon,photoimaging and developing said photoimagable material to provide a plurality of vias corresponding to the TSM pads and extending from the exposed surface to said underlying TSM pads,depositing electrically conducting material in said vias in contact with said TSM pads, and extending at least to the exposed surface of said photoimagable material,planarizing said exposed surface and said conducting material in said vias to an essentially flat planar configuration of the exposed surface and the top surface of said conducting material in the region of said vias, andproviding releasable electrical connections on said conducting material in said vias projecting from said planarized exposed surface of said photoimagable material.