Patent ID: 6500752
Filing Date: 2002-12-31
Classification: C23C,H01L

Abstract:
A semiconductor device manufacturing method of manufacturing a semiconductor device which comprises a lower wiring-buried insulating film, an inter-wiring layer insulating film, an upper wiring-buried insulating film that are laminated in this order from a lower side, and further comprising a lower wiring formed of a copper film or formed mainly of a copper film buried in the lower wiring-buried insulating film, and an upper wiring formed of a copper film or formed mainly of a copper film buried in the upper wiring-buried insulating film,wherein the inter-wiring layer insulating film is formed by plasmanizing a film forming gas, that consists of any one selected from a group consisting of alkoxy compound having Siâ€”H bonds and siloxane having Siâ€”H bonds and any one oxygen-containing gas selected from a group consisting of O2, N2O, NO2, CO, CO2, and H2O, to react.