Patent ID: 6248619
Filing Date: 2001-06-19
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:defining a cell region for an NMOS element and a peripheral circuit region for NMOS and PMOS elements on a semiconductor substrate;forming a sacrifice oxide film and an ion barrier oxide film on the entire structure after the defining process;performing ion injection process on the cell region and the peripheral circuit region, thereby forming a low concentration impurity injection region therein;removing said ion barrier oxide film formed on the cell region and the peripheral circuit region;performing ion injection process on selected regions of the cell region and the peripheral circuit region;injecting ions for adjusting a threshold voltage into selected regions of the cell region and the peripheral circuit region;performing ion injection process on said low concentration impurity regions of the cell region and the peripheral circuit region, thereby to form a R-well region and a P-well region, respectively;removing said ion barrier oxide film on the peripheral circuit region; andperforming ion injection process for adjusting the threshold voltage on the cell region and the peripheral circuit region.