Patent ID: 7861043
Filing Date: 2010-12-28
Classification: G11C

Abstract:
1. A semiconductor memory device comprising: a data input unit to which input data is inputted from an outside of the semiconductor memory device; a memory unit in which data is stored; an operation unit processing a predetermined operation on the input data and read data read out from the memory unit; a data output unit outputting operation result data obtained by the operation unit to the outside; and a control unit detecting a non-operation command and an logical operation command, wherein, when the non-operation command is detected, a first address and first input data is supplied, the first data is stored into the memory unit based on the first address and the operation unit does not process the predetermined logical operation, and when the logical operation command is detected, a second address and second data are supplied, the first data is read from the memory based on the second address and the operation unit process the predetermined logical operation on the first data and the second data.