Patent ID: 8381175
Filing Date: 2013-02-19
Classification: G06F

Abstract:
1. A process for verifying operation of a low-level rewriter, the process utilizing a device which has at least one logical processor in operable communication with at least one memory, the process comprising the steps of: obtaining initial low-level file(s) containing code and metadata; generating rewritten low-level file(s) from the initial low-level file(s) by applying the low-level rewriter to the initial low-level file(s) independently of any low-level code transformation; and comparing metadata of the initial low-level file(s) with matching metadata of the rewritten low-level file(s) for semantic equivalence, wherein the comparing step comprises at least one of the following: testing for equality between flag(s) of a metadata entity of the initial low-level file(s) and flag(s) of a matching metadata entity of the rewritten low-level file(s); testing for equality between a string of a metadata entity of the initial low-level file(s) and a string of a matching metadata entity of the rewritten low-level file(s); testing for equality between field(s) of a metadata entity of the initial low-level file(s) and field(s) of a matching metadata entity of the rewritten low-level file(s); testing for equality between method(s) of a metadata entity of the initial low-level file(s) and method(s) of a matching metadata entity of the rewritten low-level file(s).