Patent ID: 6058491
Filing Date: 2000-05-02
Classification: G06F

Abstract:
A fault-tolerant computer system, comprising:a system bus;a first processor, coupled to said system bus, for producing a first output;a second processor, coupled to said system bus, for producing a second output, wherein said second processor operates at a same clock speed as said first processor and lags behind said first processor during operation of said computer system;a comparator for comparing said first output and said second output such that a first retry operation will be performed beginning from a first checkpoint if said first output is not the same as said second output; anda retry logic block, coupled to said comparator, for resetting said first processor to a second checkpoint preceding said first checkpoint and performs a second retry operation if said first output is still not the same as said second output after said first retry operation, such that said computer system continues to operate with said first processor lagging behind said second processor after said second retry operation.