Patent ID: 9141465
Filing Date: 2015-09-22
Classification: G06F,H04L

Abstract:
1. A reception circuit that receives data and redundant data for the received data by serial communication in a plurality of lanes, the reception circuit comprising: a plurality of error checking units each of which checks presence of an error in the received data or the received redundant data, and is provided for each lane; a plurality of memories each of which stores the checked received data or the checked received redundant data, and is provided for each lane; a processing unit that reads the checked received data from the plurality of memories at a same reading timing, and outputs a read data; a plurality of write pointer units each of which outputs a write pointer value that indicates a writing position of the checked received data to the memory and is provided for each lane; and a plurality of data monitoring units each of which reports reception termination of the checked received data to the corresponding one of the plurality of write pointer units and is provided for each lane, wherein the plurality of lanes include a redundant lane that transmits the redundant data, the checked received data or the checked received redundant data is stored in a first area of a plurality of areas that are included in each of the plurality of memories, and other checked received data that is received next to the received data is stored in a second area of the plurality of areas, when there is an error in any one of the pieces of checked received data that are stored in the respective first areas of the plurality of memories, the processing unit generates correct data using the checked redundant data that is stored in the first area of the memory, and outputs the correct data instead of the received data with the error therein, each of the plurality of write pointer units outputs an address of the first area in which the checked received data is stored as the write pointer value, and outputs an address of the second area as the write pointer value when reception termination of the checked received data is reported, and the memories store data that is input in a position that is indicated by the write pointer value.