Patent ID: 6425029
Filing Date: 2002-07-23
Classification: G06F

Abstract:
An apparatus that selectively switches a plurality of peripheral devices between a plurality of buses in order to improve computer system performance, comprising:a first peripheral device; a second peripheral device; a first bus; a second bus; a configuration register for storing configuration information specifying whether the first peripheral device is coupled to the first bus or the second bus, and whether the second peripheral device is coupled to the first bus or the second bus, the configuration register being configured to receive the configuration information from a processor executing a program; a switching mechanism operating under control of the configuration register for coupling the first peripheral device to either the first bus or the second bus, and for coupling the second peripheral device to either the first bus or the second bus; and a tracking mechanism that is configured to track a usage of the first peripheral device and the second peripheral device and to determine which one of the first peripheral device and the second peripheral device is most active; and a writing mechanism that writes the configuration information to the configuration register to specify that the most active peripheral device is to be coupled to the second bus so that the most active peripheral device has exclusive access to the second bus.