Patent ID: 6846719
Filing Date: 2005-01-25
Classification: H01L

Abstract:
1. A wafer bump fabrication process comprising: providing a wafer comprising a plurality of bonding pads and a passivation layer on a surface of the wafer, wherein the passivation layer exposes the bonding pads and a surface of each bonding pad has an under bump metallurgy layer; forming a patterned photoresist layer on the surface of the wafer, wherein the patterned photoresist layer has a plurality of openings that expose the under bump metallurgy layer; performing a curing process to cure the patterned photoresist layer after the openings are formed therein; performing a first ashing process after the curing process to remove oxide formed on a surface of the under bump metallurgy layer; performing a solder paste fill-in process to fill the solder paste into the openings; performing a first reflow process to form a plurality of bumps from the solder paste within the openings; and removing the patterned photoresist layer.