Patent ID: 6172552
Filing Date: 2001-01-09
Classification: H03K

Abstract:
A FET device, comprising:a pair of input terminals which are given a single control signal;a pair of output terminals which supply a single output signal;a plurality of FETs which are connected between the output terminals, and each of which has a source electrode, a drain electrode and a gate electrode; anddriving circuits which are independently connected between the input terminals and said FETs, respectively;either one of the source electrode and the drain electrode of at least one FET among said FETs being electrically connected to either one of the source electrode and drain electrode of the other FET to each other,said driving circuit having such a circuit structure that the gate electrodes of said FETs are not electrically short-circuited to each other,said FET being turned on and off in response to the single control signal.