Patent ID: 9190353
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A semiconductor chip package, comprising: a lead frame having a paddle, a plurality of leads surrounding the paddle and a central window through the paddle; a packaged device including a first semiconductor chip attached and electrically connected to a substrate and a first mold compound covering at least portions of the first semiconductor chip and the substrate, the packaged device having a base side and a superior side, a peripheral portion of the base side secured to the paddle and a central portion of the base side exposed through the central window; a second semiconductor chip secured to the superior side of the packaged device, wherein the second semiconductor chip is electrically connected to the plurality of leads; and a second mold compound covering the packaged device, the second semiconductor chip and at least portions of the lead frame, wherein the central portion of the packaged device includes a substrate ball grid array pad.