Patent ID: 7428683
Filing Date: 2008-09-23
Classification: G01R

Abstract:
1. A linearity measurement circuit, comprising: a. a test pattern generator for generating a first sine wave pattern, a second sine wave pattern, and a third sine wave pattern, each sine wave pattern in the form of a digital signal, wherein the first sine wave pattern and the second sine wave pattern are summed by an adder and supplied to a D-A converter and an analog circuit under test; b. an A-D converter operative to convert an analog signal outputted from the analog circuit under test to a digital output signal; and c. an output response analyzer including a first multiplier and accumulator pair for multiplying and accumulating the digital output signal and the second sine wave pattern to generate a first signal power, and a second multiplier and accumulator pair for multiplying and accumulating the digital output signal and the third sine wave pattern to generate a second signal power.