Patent ID: 7425759
Filing Date: 2008-09-16
Classification: H01L

Abstract:
1. A semiconductor chip assembly, comprising: a semiconductor chip that includes first and second opposing surfaces, wherein the first surface of the chip includes a conductive pad; a conductive trace that includes a routing line, a bumped terminal and a filler, wherein the bumped terminal includes a cavity; a connection joint that electrically connects the routing line and the pad; and an encapsulant that includes first and second opposing surfaces, wherein the first surface of encapsulant faces in a first direction, the second surface of the encapsulant faces in a second direction opposite the first direction, the chip is embedded in the encapsulant, the routing line contacts the bumped terminal, contacts the filler within a periphery of the cavity, extends laterally beyond the bumped terminal and the filler, extends vertically beyond the bumped terminal and the filler in the first direction where the routing line contacts the bumped terminal and the filler and extends vertically beyond the chip in the second direction, the bumped terminal extends vertically beyond the routing line in the second direction and does not extend vertically beyond the routing line in the first direction, the cavity extends through the bumped terminal in the first and second directions, the filler contacts the bumped terminal in the cavity and extends vertically beyond the routing line in the second direction, the bumped terminal, the cavity and the filler are laterally aligned with one another at a lateral surface that faces in the second direction and are not covered in the second direction by the encapsulant or any other insulative material of the assembly, the bumped terminal surrounds the filler and only the filler at the lateral surface, is adjacent to the filler at the lateral surface and has a smaller surface area than the filler at the lateral surface, and the assembly is devoid of a printed circuit board.