Patent ID: 7786021
Filing Date: 2010-08-31
Classification: H01L

Abstract:
1. In a thin-film transistor (TFT) fabrication process, a method for forming a gate insulator, the method comprising: forming a channel, first source/drain (S/D) region, and a second S/D region in a Silicon (Si) active layer; in an atmosphere including oxygen and inert gas, where oxygen is less than 10% of the atmosphere and the pressure is 500 mTorr or less, and using a high-density plasma (HDP) source that creates an electron concentration of greater than 1×10 growing a first layer of Silicon oxide (SiOx) from the Si active layer, to a first thickness, where x is less than, or equal to 2; depositing a second layer of SiOx having a second thickness, greater than the first thickness, overlying the first layer of SiOx; using the HDP source, a less than 10% oxygen atmosphere, and a pressure of 500 mTorr or less, generating oxygen radicals; additionally oxidizing the previously deposited second layer of SiOx, wherein the first and second SiOx layers form a gate insulator; and, forming a gate electrode adjacent the gate insulator.