Patent ID: 7651941
Filing Date: 2010-01-26
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device having a multilayer interconnection formed in a damascene structure, comprising: forming a lower wiring in a first interlayer insulation film; forming a conductive barrier film on the lower wiring; forming a second interlayer insulation film covering the first interlayer insulation film and the conductive barrier film; forming a via hole, which reaches the lower wiring, in the second interlayer insulation film and the conductive barrier film, wherein the forming the via hole includes removing a reaction layer formed between the conductive barrier film and the lower wiring; forming a barrier metal film on an entire surface, during a period between the formation of the via hole in the second interlayer insulation film and the formation of the via hole in the conductive barrier film, so that the barrier metal film should cover the via hole in the second interlayer insulation film; and removing a barrier metal film from a bottom of the via hole during the period.