Patent ID: 6653906
Filing Date: 2003-11-25
Classification: H01L,H03B

Abstract:
A controllable oscillator suitable for digital signal clock recovery, the oscillator comprising:a SAW oscillator circuit for generating a controlled-frequency output signal and having a voltage-variable control input for adjusting a frequency of the controlled-frequency output signal, the oscillator circuit including a voltage variable capacitive element responsive to the control input, a surface acoustic wave (SAW) resonator operably linked to the voltage variable capacitive element, and a gain stage for energizing the SAW resonator; a sinewave-to-logic level translator circuit operably linked to the SAW oscillator circuit for generating a digital logic output signal having substantially the same frequency as the controlled-frequency output signal; a double-sided package including a platform having a central portion and an outer portion, sidewalls extending substantially upwardly and substantially downwardly from the outer portion of the platform, the upwardly extending sidewalls and the platform forming a first cavity adapted to receive and electrically connect the SAW resonator, the downwardly extending sidewalls and the platform forming a second cavity adapted to receive and electrically connect at least one electronic component; and a cover coupled with the first cavity defining a hermetic environment for containing the SAW resonator.