Patent ID: 6054365
Filing Date: 2000-04-25
Classification: H01L,Y10S

Abstract:
A process for fabricating a trench structure of a semiconductor device, said process comprising the steps of:forming a masking layer on a top surface of a silicon substrate;patterning and etching away selected regions of said masking layer to form a plurality of spaced openings therein;etching away portions of said silicon substrate which are located beneath said plural openings in said masking layer to form a trench in said silicon substrate;removing said masking layer;forming a first liner insulation layer on the interior walls and bottom surface of said trench and on said top surface of said silicon substrate;etching away a portion of said first liner insulation layer that is atop said silicon substrate and that covers an upper portion of the interior walls of said trench, thereby removing any re-entrant structure in said upper portion of said first insulation layer and in said interior walls of said trench that is located at an entrance to said trench;depositing a layer of polysilicon on said top surface of said substrate and in said trench such that said trench is filled; andremoving a portion of said polysilicon layer that is formed atop said top surface of said substrate.