Patent ID: 7952204
Filing Date: 2011-05-31
Classification: H01L,H05K

Abstract:
1. A semiconductor die package comprising: a first major surface and a second major surface opposite to the first major surface; a first substrate disposed between the first and second major surfaces, the first substrate having a plurality of electrically conductive regions; a second substrate disposed between the first and second major surfaces, the second substrate having a plurality of electrically conductive regions; at least one semiconductor die disposed on the first substrate and electrically coupled to at least one of the first substrate's conductive regions; at least one packaged electrical component disposed on the second substrate and electrically coupled to at least one of the second substrate's conductive regions; a plurality of electrical connections between the first and second substrates; and a plurality of electrical connection points to the package, each connection point being disposed at one of the major surfaces and electrically coupled to at least one of the semiconductor die and packaged electrical component; wherein the at least one semiconductor die is disposed between the first substrate and one of the major surfaces of the semiconductor die package, and wherein both of the first and second substrates are disposed between the at least one semiconductor die and the other of the major surfaces of the semiconductor die package.