Patent ID: 6017798
Filing Date: 2000-01-25
Classification: H01L

Abstract:
A method for fabricating a low power field effect transistor having punchthrough resistance and threshold voltage control comprising the steps of:providing a semiconductor substrate of a first conductivity type and having a major surface;forming a gate structure on the major surface of the semiconductor substrate, having a first edge and a second edge;forming a first halo region of the first conductivity type such that first halo region extends a first vertical distance below the major surface and a first lateral distance under the gate structure;forming a second halo region of the first conductivity type such that second halo region extends a second vertical distance below the major surface and a second lateral distance under the gate structure, wherein the first halo region and the second halo region provide a flat dopant profile under a portion of the gate structure;forming a source region of a second conductivity type in the semiconductor substrate such that the source region is aligned to the first edge of the gate structure and extends a third vertical distance below the major surface and a third lateral distance under the gate structure; andforming a drain region of the second conductivity type in the semiconductor substrate such that the drain region is aligned to the second edge thereby forming a channel region under the gate structure.