Patent ID: 8847867
Filing Date: 2014-09-30
Classification: G09G

Abstract:
1. A driving circuit for liquid crystal display, comprising a time sequence controller, a first data driving chip and a second data driving chip connected to the time sequence controller, and a reference voltage buffer connected to the first data driving chip and the second data driving chip respectively, wherein the time sequence controller is used to decode a received low voltage differential signal to generate a data display signal and a time sequence control signal, divide the data display signal into a first data display signal and a second data display signal according to the time sequence control signal, transmit the first data display signal to the first data driving chip, transmit the second data display signal to the second data driving chip, and transmit the time sequence control signal to the first data driving chip and the second data driving chip respectively; the reference voltage buffer is used to generate a first reference voltage and a second reference voltage, provide the first reference voltage to the first data driving chip, and provide the second reference voltage to the second data driving chip; and the first data driving chip and the second data driving chip alternately drive a same pixel of a liquid crystal display panel at intervals of a frame; the first data driving chip is used to perform processing on the first data display signal according to the first reference voltage and the time sequence control signal to generate and output a pixel voltage signal of negative polarity to the liquid crystal display panel; the second data driving chip is used to perform processing on the second data display signal according to the second reference voltage and the time sequence control signal to generate and output a pixel voltage signal of positive polarity to the liquid crystal display panel; the pixel voltage signal of negative polarity is lower than a common voltage signal of the liquid crystal display panel, and the pixel voltage signal of positive polarity is higher than the common voltage signal of the liquid crystal display panel, and wherein the time sequence controller comprises a low voltage differential signal receiving module, a data display signal retransmitting module and a time sequence control signal retransmitting module connected to the low voltage differential signal receiving module, a first data driving chip retransmitting module and a second data driving chip retransmitting module connected to the data display signal retransmitting module, the low voltage differential signal receiving module is used to receive the low voltage differential signal, decode the low voltage differential signal to generate the data display signal and the time sequence control signal, transmit the data display signal to the data display signal retransmitting module, and transmit the time sequence control signal to the time sequence control signal retransmitting module; the time sequence control signal retransmitting module is used to transmit the time sequence control signal to the data display signal retransmitting module, and retransmit the time sequence control signal to the first data driving chip and the second data driving chip at the same time; the data display signal retransmitting module is used to divide the data display signal into the first data display signal and the second data display signal according to the time sequence control signal, transmit the first data display signal to the first data driving chip retransmitting module, and transmit the second data display signal to the second data driving chip retransmitting module; the first data driving chip retransmitting module is used to retransmit the first data display signal to the first data driving chip; and the second data driving chip retransmitting module is used to retransmit the second data display signal to the second data driving chip.