Patent ID: 6469344
Filing Date: 2002-10-22
Classification: H01L

Abstract:
A semiconductor device, comprising:a first-conductivity-type first base region; a gate electrode formed on a gate insulating film within a longitudinal groove having a bottom and two opposing sides, such that the gate electrode is formed in a selected elongate portion of a surface layer of the first base region; one or more second-conductivity-type second base region formed in one or more selected portion of the surface layer of the first base region, such that the second base region has a smaller depth than the groove, and is located adjacent to the groove; each of one or more source region formed in one of one or more selected portion of a surface layer of the second base region, to be located adjacent to the groove; one or more second-conductivity-type third base region that is formed in one or more selected portion of the surface layer of the first base region, apart from the second base region, to be located adjacent to the groove; one or more first main electrode, each of said one or more first main electrode formed in contact with one of said one or more second base region and one of said one or more source region within said one of said one or more second base region; a collector region formed in a rear surface layer of the first base region; and a second main electrode formed on the collector region; wherein one of said one or more second base region and one of said one or more third base region are alternately formed along at least one side of the groove in a longitudinal direction of the groove.