Patent ID: 7102387
Filing Date: 2006-09-05
Classification: H03K

Abstract:
1. A field programmable gate array having 1-input Boolean lookup table-based architecture comprising: one or more arrays, each said array comprising a plurality of cells arranged in a directed, repeatable x-column, y-row grid propagating in the positive y direction, with each said cells having only nearest neighbor connections to other cells and not any other bridging structures except at the boundaries, the definition of each cell behavior in an array being allowed to be distinct and individually programmable for a particular logic function; each said cell being identical and having identical connection geometries, and each said cell further comprising two independent 1-input look tables, with each of said independent 1-input lookup tables having a dedicated resistor in series, and each said cell having a separate output; each of said arrays having no specialized routing structures, since logic functions can imitate wiring from any lookup table input to an output, allowing the lookup table to emulate both logic and virtual wiring; and periodic, alternating neighborhood templates in both horizontal and vertical directions for all lookup tables in a particular array.