Patent ID: 6396823
Filing Date: 2002-05-28
Classification: H04B,H04W

Abstract:
An apparatus, comprising:a plurality of first preprocessing units receiving and then scrambling first control data, signal data, and traffic data, packetizing the scrambled data to divide the scrambled data into packets, generating frequency control data controlling hopping frequencies, and outputting said packetized data and said frequency control data; a first signal switch switching said packetized data and said frequency control data output from said plurality of first preprocessing units, and outputting primary signals corresponding to said switched data; a plurality of first postprocessing units lowpass-filtering said primary signals output from said first signal switch, frequency modulating said lowpass-filtered signals with a secondary signal synthesizing transmission frequency, and filtering and amplifying said frequency modulated signals at a transmission frequency band; a selection unit selecting a path from among a transmission path and a reception path; a plurality of second preprocessing units demodulating received signals selected by said selection unit with a tertiary signal synthesizing reception frequency to restore clock and data, and detecting a received signal strength indication signal; a second signal switch switching signals output from said plurality of second preprocessing units; a plurality of second postprocessing units measuring signal-to-noise ratios of signals output from said second signal switch, and de-packetizing and unscrambling said signals output from said second signal switch to divide said signals into said first control data, said signal data, and said traffic data; and a control unit being coupled to said selection unit and generating a timing control signal utilizing time division duplexing to control said selection unit wherein said apparatus corresponds to a base station transceiver for a frequency hopping code division multiple access system.