Patent ID: 6534864
Filing Date: 2003-03-18
Classification: H01L,Y10S

Abstract:
A semiconductor memory device comprising memory cells each of which includes two load transistors, two driver transistors and two transfer transistors, the semiconductor memory device comprising:a semiconductor substrate on which transistors are formed; a first interlayer dielectric formed on the semiconductor substrate; first contact portions formed in the first interlayer dielectric; and first wiring layers formed on the first interlayer dielectric, wherein the first contact portions include metal layers made of a refractory metal nitride layer directly on a refractory metal layer, and plug layers, the first wiring layers include lower conductive layers having the metal layers made of the refractory metal nitride layer directly on the refractory metal layer, and upper conductive layers formed on the lower conductive layers, wherein the upper conductive layers include other metal layers made of another refractory metal nitride layer directly on another refractory metal layer.