Patent ID: 7923825
Filing Date: 2011-04-12
Classification: H01L

Abstract:
1. An integrated circuit package, comprising: an integrated circuit die, the die having an active surface and a back surface substantially opposite the active surface, the active surface including a plurality of I/O pads; a plurality of lower contact leads, each lower contact lead having a first solder-wettable surface and a second surface substantially opposite the first solder-wettable surface; and an insulating substrate having a plurality of electrically conducting upper routing traces formed on a bottom surface thereof, wherein ones of the traces have at least one inner solder-wettable portion and at least one peripheral solder-wettable portion, each inner solder-wettable portion being physically and electrically connected with an associated I/O pad with an associated solder joint, each peripheral solder-wettable portion being physically and electrically connected with an associated solder-wettable surface on a lower contact lead with an associated solder joint such that each trace electrically couples an associated I/O pad with an associated lower contact lead.