Patent ID: 7523376
Filing Date: 2009-04-21
Classification: G11B

Abstract:
1. An apparatus for accessing and transferring optical data, the apparatus performing an error correction process on an error correction block, and the error correction block comprising a data matrix with a plurality of columns and a plurality of rows, wherein each column of the data matrix is a decoding set the data matrix is recorded on an optical storage medium in a row direction to form an error correction modulation block, and an data arrangement order of the error correction modulation block has a relation to a data arrangement order in the rows of the error correction block, the apparatus comprising: a first memory used to store the data of the error correction block, the first memory having a plurality memory banks and supporting a page-mode function and an alternate-bank-access function, each of the memory banks having a plurality of logical memory sections, each of the logical memory sections forming a memory matrix having M memory columns and N memory rows, and the memory matrix being formed by memory units located at a common memory page, wherein M and N are natural numbers and each of the memory columns has a predetermined number of the memory units that have consecutive addresses; a memory controller used to control the first memory, the memory controller using the alternate-bank-access function of the first memory to access the data matrix of the error correction block along the row direction of the data matrix and write each row of the data matrix into the logical memory sections along a column direction of the logical memory sections, thus each column of the data matrix of the error correction block accessed from the optical storage medium being stored into the logical memory sections along a row direction of the logical memory sections; an error correction decoder using the page-mode function of the first memory to access each column of the data matrix of the error correction block from the logical memory sections along the row direction of the logical memory sections; and a transmission interface using the page-mode function of the first memory to access each column of the data matrix of the error correction block, which has been corrected, from the logical memory sections along the row direction of the logical memory sections and then output the same.