Patent ID: 6519748
Filing Date: 2003-02-11
Classification: G06F

Abstract:
A signal delay time calculation method based on Asymptotic Waveform Evaluation (AWE) of calculating an approximate signal delay time in a semiconductor integrated circuit (LSI) by calculating a voltage waveform of a signal by using terms of an admittance up to n-th order obtained by performing Laplace transform for the LSI,the signal delay time calculation method comprising: first step of calculating an admittance of the LSI by performing Laplace transform; second step of calculating a first voltage waveform obtained by Laplace transform of a power source voltage for driving the admittance obtained by Laplace transform in the first step; third step of calculating a second voltage waveform obtained by Laplace transform of a voltage at an optional point in the LSI based on the admittance obtained in the first step and the first voltage waveform obtained in the second step; fourth step of calculating a real-time approximate voltage waveform of the second voltage waveform by obtaining poles and residues of the second voltage waveform; fifth step of calculating a signal delay time in the LSI based on the real-time voltage waveform obtained in the fourth step; and sixth step of judging whether the signal delay time obtained in the fifth step is within an acceptable precision range when one or more poles obtained in the fourth step include a real-number part of more than zero.