Patent ID: 6975651
Filing Date: 2005-12-13
Classification: H04L,H04Q

Abstract:
1. An apparatus for executing processing for switching a short-packet, comprising: means for judging whether the length of the short packet is larger than length L bytes, where L bytes can be accommodated in one ATM cell; means for splitting the short packet, which has a length greater than the length L bytes, into short-packet portions so as to be accommodated respectively in first and second ATM cells; cell creation means for accommodating significant data containing one of the short-packet portions and short-packet length information in a payload area of the first ATM cell, accommodating remaining significant data including another short-packet portion, the remaining significant data could not be accommodated in the first ATM cell, in a payload area of the second ATM cell, and inputting the first and second ATM cells to an ATM switch; restoration means for extracting short-packet portions accommodated in respective ones of first and second ATM cells upon referring to said short-packet length information that has been accommodated in the first ATM cell output from the ATM switch, restoring the original short packet having the length greater than L bytes, and sending the original short packet to a line; and means for generating sequence-number information for identifying the first and second ATM cells; said cell creation means adding on the sequence number information in a specific area of each of the first and second ATM cells, and said restoration means detecting absence or presence of cell discard upon referring to the sequence-number information of a received ATM cell.