Patent ID: 6750084
Filing Date: 2004-06-15
Classification: H01L,H05K,Y02P

Abstract:
A method of attaching a leadless package to a substrate having a substrate thermal pad on a first surface thereof, a plurality of contact pads on the first surface and surrounding the substrate thermal pad, and at least one plated via in the substrate thermal pad and extending through the substrate to an oppositely-disposed second surface of the substrate, the method comprising the steps of:depositing a solder mask on the first surface of the substrate so that at least a first portion of the solder mask is on the substrate thermal pad and surrounds the plated via but does not block the plated via; depositing solder on the contact pads and on regions of the substrate thermal pad exposed by the first portion of the solder mask, the solder being deposited on the exposed regions of the substrate thermal pad to a thickness greater than the thickness of adjacent portions of the solder mask; placing a leadless package on the first surface of the substrate, the leadless package comprising a package thermal pad disposed at a surface of the leadless package, a plurality of input/output pads surrounding the package thermal pad, and an integrated circuit device electrically connected to the input/output pads, the leadless package being placed on the substrate so that the input/output pads contact the solder on the contact pads of the substrate and so that the package thermal pad contacts the solder deposited on the exposed regions of the substrate thermal pad; and reflowing the solder to form at least one solder joint that thermally connects the package thermal pad to the substrate thermal pad and multiple solder joints that electrically connect the input/output pads of the leadless package to the contact pads of the substrate, the first portion of the solder mask preventing the solder from flowing into the plated via during the reflow step and thereby promoting the thickness of the multiple solder joints.