Patent ID: 7659198
Filing Date: 2010-02-09
Classification: H01L

Abstract:
1. A method for forming an interconnect structure, the method comprising: providing a dielectric layer; forming a trench in the dielectric layer; depositing a barrier layer in the trench; forming a first sub-layer of a conductor over the barrier layer, wherein a first control parameter is applied to achieve a first impurity concentration in the first sub-layer; forming a second sub-layer of the conductor on the first sub-layer, wherein a second control parameter is applied to achieve a second impurity concentration in the second sub-layer, and wherein the first and the second impurity concentrations have a ratio of greater than about two or less than about 0.5; and forming a third sub-layer of the conductor on the second sub-layer, wherein a third control parameter is applied to achieve a third impurity concentration in the third sub-layer, and wherein the third and the second impurity concentrations have a ratio of greater than about two or less than about 0.5.