Patent ID: 8772863
Filing Date: 2014-07-08
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory transistor comprising: an island-shaped semiconductor having a source region, a channel region, and a drain region in order from surface of a substrate; a hollow pillar-shaped charge storage layer surrounding an outer periphery of the channel region and a tunnel insulating film between the charge storage layer and the channel region, the hollow pillar-shaped charge storage layer having a circumferential recess therein; and a hollow pillar-shaped control gate surrounding an outer periphery of the charge storage layer and at least partially within the circumferential recess; and an insulating film residing in the circumferential recess between the control gate and the charge storage layer, wherein the insulating film resides between the charge storage layer and an upper surface, a lower surface, and a lateral side surface of the control gate, wherein the control gate faces the charge storage layer in the recess and the lateral side surface of the control gate does not face the island-shaped semiconductor in a vertical direction, and wherein the upper surface of the charge storage layer does not face the island-shaped semiconductor in the vertical direction.