Patent ID: 6507098
Filing Date: 2003-01-14
Classification: H01L

Abstract:
A multi-chip packaging structure, comprising:a substrate having a top surface and a bottom surface, the substrate having an opening defined substantially in a middle section of the substrate through the top surface and the bottom surface, wherein the substrate includes at least one via contact; a first chip having a first active surface and a first non-active back surface, wherein the first chip has a plurality of first bonding pads on the first active surface, the first chip is attached to the bottom surface of the substrate such that the first chip is electrically connected to the top surface of the substrate through the opening; at least one second chip having a second active surface and a second non-active back surface, wherein the second chip has a plurality of second bonding pads on the second active surface, the second chip is attached to the top surface of the substrate by its second non-active back surface and electrically connected to the top surface of the substrate, and wherein the second chip is externally electrically connected to an external unit through the via contact; and a heat sink directly attached on the first back non-active surface of the first chip and thermally coupled with the first chip, wherein the heat sink is not in direct contact with the bottom surface of the substrate.