Patent ID: 6353356
Filing Date: 2002-03-05
Classification: H02M

Abstract:
A charge pump circuit, comprising:a plurality of boosting stages to boost a voltage signal; an output stage coupled to the plurality of boosting stages to output the voltage signal; a gating circuit coupled to the output stage to control the output stage; and a parasitic inhibitor circuit coupled to the output stage to inhibit at least one parasitic effect in the output stage, the parasitic inhibitor circuit comprising: a transistor having a drain, a source, a gate, and a well-bias, the drain coupled to the well-bias, and wherein an output is taken from the drain of the transistor; a square-law device having an input and an output, the input of the square-law device coupled to the gate of the transistor, the output of the square-law device coupled to the source of the transistor; and a capacitor having a first plate and a second plate, the first plate coupled to the well-bias of the transistor, and the second plate coupled to ground.