Patent ID: 6174760
Filing Date: 2001-01-16
Classification: H01L

Abstract:
A method for forming a semiconductor device, said method comprising:providing a semiconductor substrate incorporating a device, wherein said device is defined metal oxide semiconductor (MOS) region and bipolar junction transistor (BJT) region;forming a conductivity-type well region on the semiconductor substrate;forming a gate oxide layer on said conductivity-type well region of MOS region;depositing a polysilicon layer on said gate oxide layer of MOS region;using photolithographic and etching process to define a gate structure, wherein the polysilicon layer is used as said gate of MOS region;implanting ions of a first conductive type into the semiconductor substrate of MOS region;forming a first dielectric layer on side wall of the gate, wherein said first dielectric layer is used as a spacer of MOS region;forming a first photoresist layer over semiconductor substrate of BJT region to define a emitter of BJT;implanting second ions of the first conductive type into the semiconductor substrate of MOS region to form source/drain regions by using said spacer as a mask;simultaneously implanting second ions of the first conductive type into the semiconductor substrate to form said emitter of BJT;depositing a second photoresist layer over the device of the MOS region; andimplanting third ions of the first conductive type into said emitter of BJT inside the semiconductor substrate.