Patent ID: 7772668
Filing Date: 2010-08-10
Classification: H01L

Abstract:
1. A field effect transistor (FET) comprising: a pair of trenches extending into a semiconductor region; a first shield electrode in a lower portion of each trench; a gate electrode in an upper portion of each trench over but insulated from the shield electrode by an inter-electrode dielectric; and first and second well regions of a first conductivity type laterally extending in the semiconductor region between the pair of trenches, each of the first and second well regions abutting sidewalls of the pair of trenches, the first and second well regions being vertically spaced from one another by a first drift region of a second conductivity type, wherein the gate electrode and the first shield electrode are positioned relative to the first and second well regions such that a channel is formed in each of the first and second well regions when the FET is biased in the on state.