Patent ID: 6229382
Filing Date: 2001-05-08
Classification: G05F,H01L,H03F

Abstract:
A MOS semiconductor integrated circuit comprising:a current mirror circuit including an input transistor of a first conductivity type for receiving an input current from an input current source and an output transistor of the first conductivity type for supplying current corresponding to the input current to an output of the current mirror circuit;a serial transistor of the first conductivity type connected between the drain of the output transistor and the output of the current mirror circuit, the source of the serial transistor being connected to the drain of the output transistor, a reference voltage being applied to the gate of the serial transistor; andcontrol means for controlling the reference voltage so that the reference voltage is set equal to a power supply voltage until the power supply voltage reaches a predetermined voltage associated with the reference voltage, and the reference voltage is set equal to the associated predetermined voltage when the power supply voltage exceeds the associated predetermined voltage.