Patent ID: 9166019
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device comprising the steps of: forming a first electrode layer and a second electrode layer; forming an oxide semiconductor layer over the first electrode layer and the second electrode layer; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode layer and a first insulating layer over the gate insulating layer to overlap with the oxide semiconductor layer; introducing an impurity element into the oxide semiconductor layer using the gate electrode layer and the first insulating layer as masks so that a first region, a second region and a channel formation region between the first region and the second region are formed; forming a second insulating layer over the first insulating layer to cover side surfaces of the gate electrode layer; forming a conductive film over the oxide semiconductor layer, the gate electrode layer, the second insulating layer, and the first insulating layer; forming a first insulating film over the conductive film; forming a source electrode layer, a drain electrode layer, and a third insulating layer by removing parts of the first insulating film and the conductive film by a chemical mechanical polishing method until the first insulating layer is exposed so that the conductive film is divided; and forming a fourth insulating layer over the first insulating layer, the second insulating layer, the source electrode layer, the drain electrode layer, and the third insulating layer.