Patent ID: 6593235
Filing Date: 2003-07-15
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, said method comprising the steps of:forming a semiconductor film on an insulating surface; forming a gate electrode adjacent to the semiconductor film with a gate insulating film interposed therebetween; introducing an impurity into the semiconductor film to form at least a source region, a drain region and a channel region between the source and drain regions; forming a first insulating film comprising silicon nitride and on and in direct contact with the semiconductor film; forming a second insulating film comprising silicon oxide and on the first insulating film, said second insulating film including: a first dielectric layer farmed on the first insulating film, a second dielectric later formed on the first dielectric layer; forming a contact hole in the first and second insulating films to reach one of the source and drain regions, wherein each of the first and second dielectric layers of the second insulating film is formed through plasma CVD, wherein the second dielectric layer is formed with a smaller radio frequency power than the first dielectric layer, wherein the second dielectric layer has a higher etching rate than the first dielectric layer, wherein the contact hole has a tapered configuration, wherein a diameter of the contact hole increases from a lower portion thereof to an upper portion thereof.