Patent ID: 7392516
Filing Date: 2008-06-24
Classification: G06F

Abstract:
1. A method of performing dynamic by-pass instruction scheduling utilizing a data dependency graph (DDG), said DDG including at least one by-pass pair of nodes (A i p , A i s ) comprising a predecessor node A i p and a successor node A i s connected by a by-pass edge, said method comprising: computing a ranking of nodes in said DDG after setting all delays for by-pass pairs of nodes (A identifying all successor nodes A annotating each successor node A setting a delay DAi for all by-pass pairs (A removing from said by-pass list BPL(A selecting from said by-pass list BPL(A re-computing a ranking for each node in said DDG so that an earliest time for said given predecessor node A scheduling nodes in said DDG so that, each time said given predecessor node A wherein said ranking of nodes in said DDG is computed and re-computed based on a critical path of said nodes, and said selecting a predecessor node A