Patent ID: 6707102
Filing Date: 2004-03-16
Classification: H01L,H03F

Abstract:
A semiconductor device including an insulated gate type field effect transistor, said insulated gate type field effect transistor comprising:a semiconductor substrate having a first main surface and a second main surface opposing to each other, said first main surface having a semiconductor region of a first conductivity type; a gate electrode made of a first conductive film formed via a gate insulating film over a channel forming region in said first main surface of said semiconductor substrate; a source semiconductor region of a second conductivity type formed at one end side of said gate electrode and formed in the semiconductor region of the first conductivity type at the first main surface of said semiconductor substrate; a drain semiconductor region of a second conductivity type formed at the other end side of said gate electrode opposite to said one end side and kept away from said gate electrode, and formed in the semiconductor region of the first conductivity type at the first main surface of said semiconductor substrate; a drain-offset semiconductor region of a second conductivity type formed at the other end side of said gate electrode, formed in the semiconductor region of the first conductivity type at the first main surface located between said gate electrode and said drain semiconductor region; a shield conductive film made of a second conductive film and formed over a surface of said drain-offset semiconductor region through an insulating film, said shield conductive film being electrically connected to said source semiconductor region; a second insulating film covering said source and drain semiconductor regions and said shield conductive film, said second insulating film having contact holes on said source and drain semiconductor regions and said shield conductive film; a source electrode made of a first metal film which is formed on said second insulating film and electrically connected to said source semiconductor region via the contact hole; a drain electrode made of the first metal film which is formed on said second insulating film and electrically connected to said drain semiconductor region via the contact hole; a first wiring made of the first metal film which is formed on said second insulating film and electrically, connects said source semiconductor region and said shield conductive film in common via the contact holes; and a gate shunt wiring of the first metal film formed on said second insulating film for providing an electric shunt between two end portions of said gate electrode which are located apart from each other, said gate electrode and said gate shunt wiring being electrically connected via parts of said gate shunt wiring formed in contact holes passing through said first insulating film and said second insulating film, wherein the second conductive film constituting said shield conductive film has a thickness smaller than said first conductive film constituting said gate electrode, and wherein said insulating film for covering said drain-offset semiconductor region and underlying said shield conductive film comprises a lower film constituted of said gate insulating film and an upper film of a first insulating film.