Patent ID: 6493808
Filing Date: 2002-12-10
Classification: G11C

Abstract:
Test process for reprogramable non-volatile memory, performed by a device for testing a reprogramable non-volatile memory having dedicated areas protectable in reading, writing and/or erasing and whose access rights consist of configuration words (MC) saved in a configuration area of the memory, the device comprising message transmission/reception means (10) and a received message logic control unit (11) and access controls to the memory, the device comprising at least one temporary register (13) ensuring an emulation of these access rights, so as to render access protections reversible or irreversible, the temporary register comprising a configuration register (RC) of size and structure identical to those of the memory configuration area and a test indication register (RIT), characterized in that the process comprises:a) reading (20) the content of the memory configuration area, transferring the content into the temporary register and initializing the test indication register, b) performing (27-34) at least one modification control of the configuration register of the temporary register whilst checking the access rights contained in the temporary register, and c) testing (21-26) the modification of the configuration register by the reading and/or writing and/or erasing controls on the configuration and user memory areas (MC, MU).