Patent ID: 9034748
Filing Date: 2015-05-19
Classification: H01L,Y10S

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: depositing a first layer on a substrate; depositing a hard mask layer over at least a portion of the first layer, the hard mask layer including a lower hard mask layer over the first layer, a hard mask stop layer over the lower hard mask layer, and an upper hard mask layer over the hard mask stop layer; patterning the hard mask layer and the first layer; depositing a spacer on a sidewall of the patterned first layer and hard mask layer; removing the upper hard mask layer and a top portion of the spacer by selectively etching the upper hard mask layer and the spacer with respect to the hard mask stop layer until reaching the hard mask stop layer, the upper hard mask layer possessing sufficient thickness such that when the hard mask stop layer is reached, the remaining spacer material extends at least to a first predetermined position on the sidewall; removing the hard mask stop layer by selectively etching the hard mask stop layer with respect to the lower hard mask layer and spacer until reaching the lower hard mask layer; and removing the lower hard mask layer and a top portion of the spacer by selectively etching the lower hard mask layer and the spacer with respect to the first layer until reaching the first layer, the lower hard mask layer possessing sufficient thickness such that when the first layer is reached, the remaining spacer material extends to at least a second predetermined position on the sidewall.