Patent ID: 6094393
Filing Date: 2000-07-25
Classification: G06F,G11C,Y02D

Abstract:
A stacked sense-amp cache memory system comprising:a memory cell array comprising a plurality of memory cells arranged in rows and columns with each memory cell operable to store and output a data signal;a cache system comprising a sense-amp memory cell coupled to each column of memory cells, the cache system operable to store the recently output data signals from each column of memory cells and output the data signals, the cache system also operable to output a stored data output signal that corresponds to a previously stored data signal;a column select system coupled to the cache system, the column select system operable to select a single data signal or a single stored output data signal that corresponds to a specific column;a sense-amp system coupled to the column select system, the sense-amp system operable to sense and amplify the selected data signal from the column select system and output an amplified data output signal; anda switching system coupled to the cache system and the sense-amp system, the switching system operable to output either the amplified data output signal or the stored data output signal.