Patent ID: 8394701
Filing Date: 2013-03-12
Classification: H01L

Abstract:
1. A method for fabricating an electronic structure with a plurality of interconnects, comprising: forming a first dielectric layer; forming first and second interconnects, wherein said first and said second interconnects are formed above said first dielectric layer, and wherein said first interconnect is spaced apart from said second interconnect; depositing a spacer-forming dielectric layer above said first and said second interconnects, along the sidewalls of said first and said second interconnects and above the top surface of said dielectric layer in between said first and said second interconnects, wherein said spacer-forming dielectric layer is comprised of a boron-doped carbon nitride layer, and wherein said boron-doped carbon nitride layer is formed by reacting the gases methane, diborane, and ammonia; removing a portion of the regions of said spacer-forming dielectric layer that are above said first and said second interconnects and that are above the top surface of said first dielectric layer in between said first and said second interconnects, to form dielectric spacers adjacent to the sidewalls of said first and said second interconnects with a gap in between the dielectric spacers that are between said first and said second interconnects; and forming a second dielectric layer above said first and said second interconnects, above said gap in between the dielectric spacers that are between said first and said second interconnects and above said dielectric spacers adjacent the sidewalls of said first and said second interconnects.