Patent ID: 8237251
Filing Date: 2012-08-07
Classification: H01L

Abstract:
1. An apparatus comprising: a first semiconductor device including a first wiring board that includes first and second surfaces opposing to each other, a first semiconductor chip mounted on the first surface of the first wiring board, and a plurality of first solder bumps disposed on the second surface of the first wiring board; and a second semiconductor device including a second wiring board that includes third and fourth surfaces opposing to each other, a second semiconductor chip mounted on the third surface of the second wiring board, and a plurality of second solder bumps disposed on the fourth surface of the second wiring board, the second semiconductor chip being thicker in thickness than the first semiconductor chip, the second semiconductor device being stacked over the first semiconductor device such that the second solder bumps are in contact with the first surface of the first wiring board of the first semiconductor device.