Patent ID: 6350657
Filing Date: 2002-02-26
Classification: H01L

Abstract:
A method of manufacturing a silicon on insulator (SOI) wafer, comprising the steps of:selective anisotropic etching to form trenches, in a monocrystalline silicon substrate, which extend to a predetermined depth from an upper surface of the substrate and which define portions of the substrate therebetween; selective isotropic etching to enlarge the trenches, beginning at a predetermined distance from the upper surface, thus reducing the thicknesses of the portions of the substrate between adjacent trenches; selective oxidation to convert the substrate portions of reduced thickness into silicon dioxide and to fill the trenches with silicon dioxide, substantially from the predetermined distance from the upper surface to thereby obtain silicon tip portions on the silicon dioxide; and epitaxially growing silicon around and above the silicon tip portions to form a silicon layer on the upper surface of the substrate.