Patent ID: 7718513
Filing Date: 2010-05-18
Classification: H01L

Abstract:
1. A method comprising: forming a polysilicon germanium (poly SiGe) pedestal over a gate dielectric over a substrate; forming a poly SiGe layer over the poly SiGe pedestal, the poly SiGe layer having a thickness greater than the poly SiGe pedestal; doping the poly SiGe layer; simultaneously forming a gate and a contact to each side of the gate from the poly SiGe layer, the gate positioned over the poly SiGe pedestal; performing a thermal anneal; then performing a halo and extension implantation; then performing a laser anneal; wherein the thermal and laser annealing drives the dopant from the gate and the contacts into the substrate to form a source/drain region below the contacts; filling a space between the gate and the contacts; and forming silicide in the gate and the contacts, wherein the silicide forming includes forming silicide fully in the contacts, and forming silicide fully in the gate stopping adjacent to the poly SiGe pedestal, and wherein the silicide forming of the contacts includes forming silicide in at least a portion of the source/drain region.