Patent ID: 6791415
Filing Date: 2004-09-14
Classification: H03F

Abstract:
An integrated circuit arrangement, in particular, in accordance with the CMOS technology, with at least one transconductance amplifier (1) in order to generate a current signal (outp, outm) from an input voltage signal (inp-inm),wherein the transconductance amplifier comprises a first transconductance stage (gm1) and a second transconductance stage (gm2) that are connected in parallel, with the input (p1, m1) of the first transconductance stage being connected to the input (p2, m2) of the second transconductance stage and the output (op1, om1) of the first transconductance stage being connected to the output (op2, om2) of the second transconductance stage, wherein the first transconductance stage (gm1) has a transconductance that is essentially defined by an ohmic resistance (R), with the second transconductance stage (gm2) having an adjustable transconductance that is essentially defined by a transistor arrangement (T), and wherein the transconductance of the first transconductance stage (gm1) is higher than the transconductance of the second transconductance stage (gm2).