Patent ID: 6335566
Filing Date: 2002-01-01
Classification: H01L

Abstract:
A semiconductor device, comprising:a wiring board having a plurality of wires; a semiconductor chip having a plurality of semiconductor elements and a plurality of electrodes provided over a main surface thereof, said semiconductor chip having a main surface placed over a first main surface of said wiring board so as to be opposite to the first main surface; and a plurality of external terminals provided over a second main surface of said wiring board, which is opposite to the first main surface thereof; and wherein said plurality of external terminals have a plurality of signal terminals and a plurality of power terminals, said plurality of signal terminals are arranged along the periphery of said wiring board, said plurality of power terminals are arranged along the inside of a row comprising said plurality of signal terminals, chip capacitors are placed over the main surface of said semiconductor chip, corresponding to an area lying inside a row comprising said plurality of power terminals, the plurality of electrodes of said semiconductor chip and the plurality of signal terminals and power terminals are connected to one another by the plurality of wires formed over said wiring board.