Patent ID: 6239839
Filing Date: 2001-05-29
Classification: H01L,H04N

Abstract:
An MOS-type solid-state imaging apparatus comprising:unit cells arranged in an array;a selector configured to select one row of the unit cells;selection lines connected to said selector, to which a selection signal is supplied, the selection signal having two levels;reset lines connected to said selector and each row of said unit cells, to which a reset signal is supplied, the reset signal having two levels; andvertical signal lines to which outputs from said unit cells in each column are supplied,wherein each of said unit cells comprises:a photoelectric conversion portion;an amplification transistor having a gate to which an output from said photoelectric conversion portion is supplied, a source connected to said vertical signal line, and a drain connected to said selection line;an address capacitor connected between the gate of said amplification transistor and said selection line, configured to turn on said amplification transistors of said one row of the unit cells in response to the selection signal; anda reset transistor connected in parallel with said address capacitor, and having a gate connected to said reset line.