Patent ID: 8433985
Filing Date: 2013-04-30
Classification: G06F,G11C,H03M

Abstract:
1. A method comprising: receiving a syndrome corresponding to a codeword of data; indicating that there is no error in the codeword if the syndrome is zero; indicating an error in the codeword if the syndrome is non-zero; generating an error location polynomial for the codeword based on the syndrome utilizing at least a conditional Berlekamp-Massey Algorithm (BMA) by utilizing at least a configurable semi-parallel shared multiplier architecture, wherein the configurable semi-parallel shared multiplier architecture comprises a plurality of multiplier circuits receiving as a first input a selected one of a previous discrepancy, a current discrepancy value, and a partial syndrome value and receiving as a second input a selected one of an error locator polynomial coefficient value and an auxiliary polynomial coefficient value; analyzing the error location polynomial to determine bit error locations; correcting bit errors in the codeword as indicated by the bit error locations; and storing the codeword with the corrected bits.