Patent ID: 7795648
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A semiconductor memory device having a capacitor comprising: a semiconductor substrate having a major surface; a field effect transistor formed on the major surface of said semiconductor substrate, said field effect transistor having a gate electrode, a source region and a drain region; a conductive plug electrically connected to said source region or said drain region of said field effect transistor; an interlayer insulating film formed above said conductive plug, and having an opening exposing an upper surface of said conductive plug, a first electrode formed along an inner surface of said opening and electrically connected to said conductive plug; and a second electrode provided over said first electrode with a dielectric film between said first electrode and said second electrode; wherein said interlayer insulating film includes a first insulating film and a second insulating film located over said first insulating film, and said first insulating film has an etching rate larger than the etching rate of said second insulating film.