Patent ID: 6645858
Filing Date: 2003-11-11
Classification: H01L

Abstract:
A method of manufacturing a copper metal wiring in a semiconductor device, comprising the step of:forming an interlayer insulating film on a substrate in which an underlying structure is formed; forming a damascene pattern on the interlayer insulating film to provide a contact hole through the interlayer insulating film to the substrate; performing a cleaning process; forming a diffusion barrier layer on entire structure; performing a plasma process without exposing the interlayer insulating film or substrate disposed beneath the diffusion barrier layer; performing a chemical pre process on the diffusion barrier layer using a chemical enhancer selected from the group consisting of: an iodine-containing liquid compound, an iodine-containing gas, an iodine-containing water vapor, and a compound comprising at least one group VII element; to provide a catalyzed diffusion barrier layer; depositing copper on the catalyzed diffusion barrier layer to fill the damascene pattern; and performing a chemical mechanical polish process forming a copper metal wiring only within the damascene pattern.