Patent ID: 6803995
Filing Date: 2004-10-12
Classification: G03F

Abstract:
A process for controlling focus parameters in a lithographic process used in manufacture of microelectronic circuits comprising:providing a semiconductor wafer substrate on which there are to be lithographically formed functional circuit elements; providing a lithographic mask having a target mask portion containing a measurable dimension sensitive to defocus; projecting an energy beam through the target mask portion onto a first location of the substrate at a first focus setting; lithographically forming a first focus setting target on the substrate corresponding to the first focus setting, the first target containing a measurable dimension sensitive to defocus; projecting an energy beam through the target mask portion onto a second location of the substrate at a second focus setting; lithographically forming a second focus setting target on the substrate corresponding to the second focus setting, the second target containing a measurable dimension sensitive to defocus; measuring the defocus sensitive dimension for each of the first and second targets on the substrate and comparing the defocus sensitive dimension of the first and second targets; and determining a desired focus setting of the energy beam based on the comparison of the dimensions of the first and second focus setting target; and using the determination of the desired focus setting of the energy beam to correct energy beam focus during lithographic forming of the functional circuit elements on the wafer substrate.