Patent ID: 7649267
Filing Date: 2010-01-19
Classification: H01L,H05K,Y02P

Abstract:
1. A package comprising: a semiconductor chip; and a mounting substrate above which the semiconductor chip is mounted, wherein a plurality of electrode terminals are formed on the surface of the semiconductor chip opposing the mounting substrate side, connection terminals corresponding to the plurality of electrode terminals, respectively, are formed on the mounting substrate, the connection terminals on the mounting substrate and the electrode terminals are electrically connected collectively by solder bumps formed in self-assembly, and an electrode pattern not connected to the electrode terminals and the connection terminals is formed on at least either of the chip surface and the surface of the mounting substrate corresponding to the chip surface, and solder is accumulated on the electrode pattern, wherein resin fills a space between the semiconductor chip and the mounting substrate, and each of the solder bumps is made of solder powders formed in self-assembly between the electrode terminal and the connection terminal, the solder powders being contained in the resin in a dispersed state.