Patent ID: 6248639
Filing Date: 2001-06-19
Classification: H01L

Abstract:
A method for forming transistor for protecting against electrostatic discharge comprising the steps of:forming a semiconductor body of a first conductivity type to serve as a collector of the transistor;forming a first doped region of a second conductivity type in the semiconductor body to serve as a base of the transistor and form a collector-to-base junction with the semiconductor body;forming a second doped region of the first conductivity type in the first doped region to serve as an emitter of the transistor and form a base-to-emitter junction with the first doped region of second conductivity type;said method of forming the first doped region further comprising the steps of:forming a generally H-shaped doped region, andforming a generally ring-shaped doped region and forming an opening in which the second doped region serving as the emitter is received, and forming the opening to expose a portion of the H-shaped doped region to the second doped region serving as the emitter, wherein said H-shaped doped region is formed to have a deeper junction depth than the ring-shaped doped region and a dopant concentration that is less than a dopant concentration of the ring-shaped doped region so that when the first and second doped regions are connected, the H-shaped doped region achieves a low collector-to-base breakdown voltage and the ring-shaped doped region achieves a low snap-back voltage when the transistor is placed in a circuit subject to electrostatic discharge.