Patent ID: 6489218
Filing Date: 2002-12-03
Classification: H01L

Abstract:
A singulation method used in a process for making a plurality of leadless semiconductor packages, the singulation method comprising the following steps:providing a molded product including a plurality of semiconductor chips attached and electrically coupled to an upper surface of a lead frame wherein a lower surface of the lead frame is exposed from the bottom of the molded product, the lead frame including a plurality of units in an array arrangement and a plurality of cutting streets between the units, each unit having a die pad and a plurality of leads arranged at the periphery of the die pad, a first metal layer formed on the entire lower surface of the lead frame except the cutting streets; etching the lower surface of the lead frame using the first metal layer as a mask such that the cutting streets are etched away to form a plurality of grooves; and cutting the etched molded product along the grooves to obtain the leadless semiconductor packages.