Patent ID: 6091150
Filing Date: 2000-07-18
Classification: H01L

Abstract:
Integrated circuitry comprising:an electrically insulative substrate;a pair of spaced electrically conductive lines provided over the electrically insulative substrate, the electrically conductive lines being spaced from one another, each of the lines having a top, an opposing pair of sidewalls, a bottom, a maximum cross-sectional width and a maximum cross-sectional height, the maximum cross-sectional width being defined as a distance between the opposing sidewalls, and the maximum cross-sectional height being defined as a distance between the top and bottom;an electrically insulative material over the tops, sidewalls and bottoms of the lines;an electrically conductive material over the insulative material and surrounding the tops, sidewalls and bottoms of the lines; the electrically conductive material being substantially equidistantly spaced from the top, bottom and sidewalls of each of the lines, the electrically insulative material being between the electrically conductive material and each of the lines and comprising a substantially uniform thickness over the tops, sidewalls and bottoms of the lines, the thickness of the electrically insulative material between the electrically conductive material and the lines being less than either of the maximum cross-sectional heights or maximum cross-sectional widths of the lines; andthe electrically conductive material extending between the lines, a portion of the electrically conductive material between the lines having an upper surface beneath the tops of the lines.