Patent ID: 7518431
Filing Date: 2009-04-14
Classification: H02M

Abstract:
1. A semiconductor integrated circuit comprising: a power source input terminal that inputs a power source voltage; a GND input terminal that inputs a GND potential; a control voltage input terminal that inputs an ON/OFF control voltage; an oscillation circuit that outputs a clock signal; a charge pump circuit that is connected to a capacitor and operates based on the ON/OFF control voltage and the clock signal, the charge pump circuit causing the capacitor to charge or discharge repeatedly based on the clock signal when the ON/OFF control voltage is ON; a first delay circuit that delays the ON/OFF control voltage; a switch that is connected between the charge pump circuit and the GND input terminal and operates based on the ON/OFF control voltage outputted from the first delay circuit, the switch shorting the output terminal of the charge pump circuit and the GND input terminal when the ON/OFF control voltage is OFF, and opening when the ON/OFF control voltage is ON; a first circuit block that is driven by a power voltage which is supplied from the power source input terminal and the output terminal of the charge pump circuit; and a second circuit block that is driven by a power voltage which is supplied from the power source input terminal and the GND input terminal; wherein the first circuit block and the second circuit block are mounted on the same semiconductor integrated circuit chip.