Patent ID: 9165609
Filing Date: 2015-10-20
Classification: G11C,H01L

Abstract:
1. A semiconductor device, comprising: a first set of stacked structures including alternately stacked insulating layers and conductive layers, wherein the alternately stacked layers are disposed on a substrate, and arranged in a generally parallel configuration with respect to each other; a second set of stacked structures including alternately stacked insulating layers and conductive layers, wherein the alternately stacked layers are disposed on the substrate between the first stacked structures, and arranged in a generally parallel configuration with respect to each other; a first wiring structure configured to electrically couple conductive layers disposed on the same layer of different stacked structures of the first set of stacked structures; a second wiring structure configured to electrically couple conductive layers disposed on the same layer in different second stacked structures of the second set of stacked structures; and a third wiring structure configured to electrically couple the first wiring structure and the second wiring structure with an operation circuit.