Patent ID: 9015421
Filing Date: 2015-04-21
Classification: G06F,G11C

Abstract:
1. A memory system comprising: a random access memory capable of storing a plurality of data supplied from a host apparatus; a nonvolatile memory including a plurality of blocks, each one of the plurality of blocks being a data erasing unit and including a plurality of pages, each one of the plurality of pages being a data programming unit; and a controller configured to decide to flush first data stored in the random access memory to the nonvolatile memory, the first data being managed with a first management unit smaller than a size of one block, when a size of the first data is less than a size of one block, add second data to the first data until a size of third data including the first data and the second data reaches an integer times as large as a size of one block, the second data being stored in the random access memory, and flush the third data to the nonvolatile memory.