Patent ID: 8077124
Filing Date: 2011-12-13
Classification: G09G

Abstract:
1. An image display device having a display portion formed by disposing pixel circuits in a matrix, and a signal line driving circuit and a scanning line driving circuit for driving said pixel circuits through signal lines and scanning lines of said display portion, said display portion, said signal line driving circuit and said scanning line driving circuit being formed on an insulating substrate, said pixel circuit comprising at least: a light emitting element; a drive transistor for current-driving said light emitting element by a drive current corresponding to a gate-to-source voltage of said drive transistor; a hold capacitor composed of either one capacitor or a plurality of coupling capacitors for holding the gate-to-source voltage; and a write transistor adapted to be turned ON/OFF in accordance with a write signal outputted from said scanning line driving circuit, for setting a voltage developed across terminals of said hold capacitor at a voltage of corresponding one of said signal line; wherein said signal line driving circuit alternately outputs a voltage for gradation setting used to instruct a gradation of said pixel circuit connected to the corresponding one of said signal lines, and a fixed voltage for threshold voltage correction to the corresponding one of said signal lines, in said pixel circuit, said write transistor is turned ON to set the voltage developed across said terminals of said hold capacitor at the fixed voltage, for setting the voltage developed across said terminals of said hold capacitor at a voltage equal to or higher than a threshold voltage of said transistor, a discharging operation for discharging electric charges corresponding to the voltage developed across said terminals of said hold capacitor through said drive transistor in a state in which said write transistor is turned ON to hold a voltage at one terminal of said hold capacitor at a given voltage for a time period for which a voltage of the corresponding one of said signal lines is set at the fixed voltage, and a turn-OFF operation of said write transistor for a time period for which the corresponding one of said signal lines is set at the voltage for gradation setting are repetitively carried out, the discharging operation is carried out at least twice or more, for setting the voltage developed across said terminals of said hold capacitor at a voltage depending on the threshold voltage of said drive transistor, said write transistor is turned ON to set the voltage developed across said terminals of said hold capacitor at the voltage for gradation setting, and for a time period for which the voltage of the corresponding one of said signal lines is set at the voltage for gradation setting within a time period from a time point at which the voltage developed across said terminals of said hold capacitor is set at the voltage equal to or higher than the threshold voltage to a time point at which the voltage developed across said terminals of said hold capacitor is set at the voltage for gradation setting, the voltage developed across said terminals of said hold capacitor is made variable from the fixed voltage by utilizing running between wiring patterns formed on said insulating substrate, for reducing the gate-to-source voltage of said write transistor as compared with that at a time point of end of the time point for which the voltage of the corresponding one of said signal lines is set at the fixed voltage.