Patent ID: 8018050
Filing Date: 2011-09-13
Classification: H01L

Abstract:
1. An integrated circuit package, comprising: a die, the die having an active surface and a back surface, the active surface including a plurality of I/O pads formed thereon; a thermal interface material layer, the thermal interface material layer having a first surface and a second surface substantially opposite the first surface, the first surface of the thermal interface material layer being attached to the back surface of the die; a heat sink, the heat sink including a base, a multiplicity of heat dissipation structures and a partition that extends from a top surface of the base, the base including a planar top surface and an opposing planar bottom surface and forming a substantially flat and solid metal layer such that all space directly between the top and bottom surfaces of the base are filled with metal, the back surface of the base being directly attached to the second surface of the thermal interface material layer, the partition extending around the periphery of the base and being offset from outer side surfaces of the base such that the partition and base form a ledge region that surrounds the periphery of the base, the ledge region being a portion of the top surface of the base, wherein inner surfaces of the partition define an inner region on the top surface of the base, the multiplicity of heat dissipation structures extending out from the inner region on the top surface of the base; and a molding material that encapsulates and covers at least portions of the die and the ledge region around the periphery of the heat sink while leaving the inner region of the heat sink unencapsulated by molding material and exposed, wherein the molding material covering the ledge region provides a locking feature that secures the heat sink in the package.