Patent ID: 7687364
Filing Date: 2010-03-30
Classification: H01L,Y10S

Abstract:
1. A method of making a semiconductor structure comprising: forming a gate electrode above the top surface of a substrate, said gate electrode having a sidewall; forming a source/drain region adjacent to, but separated by a trench from, said gate electrode, said source/drain region having a sidewall and having a top surface above the top surface of said substrate; forming, in said trench and directly adjacent to said sidewall of said gate electrode and directly adjacent to said sidewall of said source/drain region, a first portion of a multi-component dielectric spacer, said first portion having a height less than the height of said sidewall of said gate electrode; and forming a second portion of said multi-component dielectric spacer, said second portion disposed directly above said first portion and directly adjacent to said sidewall of said gate electrode, wherein the dielectric constant of said first portion is lower than the dielectric constant of said second portion.