Patent ID: 6506626
Filing Date: 2003-01-14
Classification: H01L

Abstract:
A method for fabricating a semiconductor package, comprising the steps of:preparing a substrate having a front surface and a back surface; mounting a thermally-conductive stiffener over the front surface of the substrate, wherein the stiffener is formed with a centrally-hollowed portion and at least an outwardly-extending passage connected to the centrally-hollowed portion, allowing a portion of the front surface of the substrate to be exposed to the centrally-hollowed portion of the stiffener; mounting a semiconductor chip in a flip-chip manner onto the exposed portion of the front surface of the substrate by means of first solder balls through the centrally-hollowed portion of the stiffener, wherein a gap is formed between the semiconductor chip and the substrate; injecting a cleaning solvent through the outwardly-extending passage of the stiffener into the gap between the semiconductor chip and the substrate; performing a flip-chip underfill process to form an underfill layer in the gap between the semiconductor chip and the substrate; and implanting a plurality of second solder balls on the back surface of the substrate.