Patent ID: 6653670
Filing Date: 2003-11-25
Classification: H01L

Abstract:
A silicon-on-insulator diode, comprising:a substrate; an insulating layer formed on said substrate; two shallow trench isolations formed on said insulating layer; a PN junction diode formed of a first well with a first conductive type having either of N type and P type and a second well with a second conductive type opposite to said first conductive type adjacent thereto formed between said two shallow trench isolations, said first well having a first lightly doped diffusion region with said first conductive type formed at the upper corner thereof adjacent to one said shallow trench isolation and said second well having a second lightly doped diffusion region with said second conductive type formed at the upper corner thereof adjacent to the other said shallow trench isolation; and a MOS-like gate formed on said first well and said second well, said MOS-like gate comprising a dielectric layer and a conducting layer formed thereon and two dielectric spacers formed respectively along each side of said MOS-like gate, wherein said conducting layer comprises a third lightly doped diffusion region with said first conductive type and a fourth lightly doped diffusion region with said second conductive type, said third lightly doped diffusion region being electrically shorted to said fourth lightly doped diffusion region, and said first lightly doped diffusion region and said second lightly doped diffusion region are respectively self-aligned said third lightly doped diffusion region and said fourth lightly doped diffusion region.