Patent ID: 8713387
Filing Date: 2014-04-29
Classification: G06F,G11C

Abstract:
1. A computer implemented method comprising: detecting whether a chip error has occurred in one of a plurality of memory chips in a first memory channel of a plurality of memory channels, the detecting spanning across at least one rank of the plurality of memory channels, and generating chip mark data based on the chip error occurring; receiving, by a marking module, the chip mark data; determining whether a number of chip errors in the at least one rank exceeds a chip mark threshold based on the chip mark data and a mark table of the marking module, wherein the chip mark threshold comprises a number of available chip marks in the mark table; based on determining that the number of chip errors in the at least one rank exceeds the chip mark threshold, determining whether one of the plurality of memory channels comprises a marked channel; based on determining that none of the plurality of memory channels comprises a marked channel, determining, based on the mark table, whether there are multiple chip marks in any channel of the plurality of memory channels; and based on determining that there are not multiple chip marks in any channel of the plurality of memory channels, marking the first channel as a marked channel.