Patent ID: 6489180
Filing Date: 2002-12-03
Classification: H01L,Y10S

Abstract:
A flip-chip packaging process, comprising the steps of:(1) preparing a semiconductor chip and a substrate for flip-chip application; the semiconductor chip being formed with a plurality of solder bumps while the substrate being formed with a plurality of bond pads; (2) providing a plurality of electrically-conductive sharp-pointed studs respectively over the substrate-side bond pads; (3) dispensing an underfill material over the substrate so as to form a no-flow underfill layer which covers the substrate-side bond pads and the electrically-conductive sharp-pointed studs; (4) mounting the semiconductor chip in a flip chip manner onto the substrate, with the solder bumps thereon being aligned respective to the substrate-side bond pads and forcibly pressed down against the electrically-conductive sharp-pointed studs; and (5) performing a solder-reflow process to reflow the solder bumps over the substrate-side bond pads.