Patent ID: 6999055
Filing Date: 2006-02-14
Classification: G09G

Abstract:
1. A display device comprising: a panel having gate lines in rows, signal lines in columns, and pixels arrayed to form a matrix in the intersections of such rows and columns; a vertical driving circuit connected to said gate lines and selecting the row of the pixels sequentially; a horizontal driving circuit connected to said signal lines and, in response to a clock signal of a predetermined period, writing a video signal sequentially in the pixels of the selected row; and a clock generating means for generating a first clock signal used as a reference to the operation of said horizontal driving circuit, and also generating a second clock signal equal in period to but smaller in duty ratio than the first clock signal; wherein said horizontal driving circuit has a shift register for outputting shift pulses sequentially from respective shift stages thereof by performing a shift operation synchronously with the first clock signal; a first switch group for extracting the second clock signal in response to the shift pulses outputted sequentially from said shift register; and a second switch group for sampling the input video signal sequentially in response to the second clock signal extracted by the switches of said first switch group, and supplying the sampled signal to each signal line; and said clock generating means is divided into an external clock generating circuit disposed outside the panel and supplying the second clock signal externally, and an internal clock generating circuit formed within the panel and supplying the first clock signal to said horizontal driving circuit in accordance with the second clock signal; and wherein said external clock generating circuit is capable of variably adjusting the duty ratio of the second clock signal.