Patent ID: 6173350
Filing Date: 2001-01-09
Classification: G06F,H01M,H02J,Y02E

Abstract:
A method for writing data to a serial bus from a smart battery acting as a bus master, said serial bus having a data line and a clock line, and said smart battery having an error register in which all error bits therein have been initially cleared, comprising the steps of:(a) checking the bus for an idle condition, including the step of first arming a clock latch to capture any transmissions which may occur on the clock line;(b) generating a start condition;(c) sending a byte of data;(d) checking whether the byte was acknowledged;(e) if the byte was acknowledged, repeating steps (c) and (d) until all bytes have been sent;(f) performing a stop condition;(g) tristating the clock and data lines;(h) disarming the clock latch;(i) registering occurrence of errors in any of steps (a)-(h) in said error resister; and(j) if any errors are registered in said error register, terminating transmission.