Patent ID: 6331221
Filing Date: 2001-12-18
Classification: H01L,Y10T

Abstract:
A process for providing electrical connection between a semiconductor die and a semiconductor die receiving member, said process comprising:providing said semiconductor die receiving member, wherein said semiconductor die receiving member is capable of receiving a respective semiconductor die which can be mounted either through flip-chip mounting or wirebonding and includes:a plurality of first contact sites configured to lie underneath said semiconductor die when said semiconductor die is proximate said die receiving member; anda plurality of second contact sites configured to lie adjacent said semiconductor die when said semiconductor die is proximate said die receiving member, each first contact site of said plurality of first contact sites being in electrical connection with an adjacent second contact site of said plurality of second contact sites;providing said semiconductor die, wherein said semiconductor includes a first face, an opposite second face, and a plurality of bond pads on said first face capable of flip-chip mounting or wirebonding; andmounting said semiconductor die onto said semiconductor die receiving member in one of:flip-chip mounting, wherein said flip-chip mounting comprises:disposing said first face proximate said die receiving member; andelectrically connecting each of said plurality of bond pads with a corresponding first contact site of said plurality of first contact sites; andwirebonding, wherein said wirebonding comprises:disposing said second face proximate said die receiving member; andelectrically connecting each of said plurality of bond pads with a corresponding second contact site of said plurality of second contact sites.