Patent ID: 6667916
Filing Date: 2003-12-23
Classification: G11C

Abstract:
A mode control circuit for a semiconductor device, the mode control circuit comprising:a mode entrance portion for outputting an output signal in response to an external control signal; a mode entrance control portion for generating a mode entrance enable signal for controlling entry of a specific mode of operation by the semiconductor device, wherein the specific mode is a test mode for testing electrical functions of the semiconductor device and a logic portion for logically combining the output signal of the mod entrance portion and the mode entrance enable signal to generate a mode signal for setting the specific mode; wherein the mode entrance control portion comprises: a first fusing portion including a first fuse; a second fusing portion including a second fuse; and a mode entrance control signal generating portion for activating the mode entrance enable signal in a first case where the first and second fuses are maintained at an initial state or are changed from the initial state, and deactivating the mode entrance enable signal in a second case where only one of the first and second fuses is changed from the initial state.