Patent ID: 6630388
Filing Date: 2003-10-07
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, comprising the steps of:providing a substrate having a semiconductor layer separated by a first insulation layer from said substrate, said semiconductor layer having an etching stop layer thereon; forming a trench in said semiconductor layer through said etching stop layer, said trench having a depth extending to a surface of said first insulation layer so as to leave a first island portion that comprises a part of said semiconductor layer and a part of said etching stop layer and has a portion of specified width for determining a channel thickness of said semiconductor device, said portion having at least two sides that are exposed to said trench; forming a second insulation layer on each of side surfaces of said semiconductor layer exposed to said trench; using a first material to bury said trench and planarizing said trench, with said etching stop layer used as a mask so that said first island portion remains substantially unchanged; removing said first material from said trench using a plane geometry pattern that cuts across said portion of said first island portion, with said etching stop layer and said second insulation layer used as masks, to leave two second island portions of said first material that face each other across said first island portion in said trench; removing said second insulation layer from each of the side surfaces of said semiconductor layer, with said second island portions used as masks, to expose the side surfaces to said trench and consequently leave second insulation layers on the side surfaces of said semiconductor layer; introducing dopant from the side surfaces, with said etching stop layer and said second island portion used as masks; using a third insulating material to bury said trench; and planarizing said trench, with said first etching stop layer used as a mask.