Patent ID: 7095085
Filing Date: 2006-08-22
Classification: H01L,Y10S

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a semiconductor substrate having a peripheral circuit region and a memory cell region; a plurality of erasable and programmable memory cell transistors each having a gate electrode and provided in the memory cell region; a selection transistor having a gate electrode and provided in the memory cell region; a peripheral transistor having a gate electrode and provided in the peripheral circuit region; a post-oxidation film provided on (1) the gate electrode of all of the plurality of erasable and programmable memory cell transistors, (2) the gate electrode of the selection transistor, and (3) the gate electrode of the peripheral transistor; and an insulating film covering the plurality of erasable and programmable memory cell transistors, the selection transistor, and the peripheral transistor, the insulating film being harder for an oxidizing agent to pass therethrough than a silicon oxide film, the insulating film having an oxidized region, and the insulating film covering a side surface of the gate electrode of the selection transistor along the gate electrode of the selection transistor, wherein the insulating film comprises a silicon nitride film, and the oxidized region is provided in a surface of the silicon nitride film.