Patent ID: 7179734
Filing Date: 2007-02-20
Classification: H01L

Abstract:
1. A method for forming a dual damascene pattern, comprising the steps of: forming a lower conductive structure on a lower insulating layer; forming a first protective film, a second insulating layer, and a second protective film, sequentially, on the lower insulating layer and the lower conductive structure, wherein the second insulating layer consists essentially of a first insulating film, a low dielectric constant layer, and a third insulating film, the low dielectric constant layer consisting of a single material and having a thickness greater than those of the first insulating film or the third insulating film; forming a via hole up to a first predetermined depth by removing a partial thickness of the low dielectric constant layer in the second insulating layer through the second protective film; forming a trench up to a second predetermined depth of the second insulating layer through the second protective film, and simultaneously, extending the via hole up to a point at which the first protective film is exposed; and selectively etching the first protective film exposed through the via hole to expose the lower conductive pattern and form the dual damascene pattern.