Patent ID: 7214568
Filing Date: 2007-05-08
Classification: H01L,Y10T

Abstract:
1. A method for separating at least one integrated circuit die from an associated semiconductor wafer, the method comprising the steps of: forming one or more v-shaped grooves in an upper surface of the semiconductor wafer by an etching process, the one or more v-shaped grooves defining perimeter edges of the at least one integrated circuit die; removing a back surface of the semiconductor wafer opposite the upper surface of the wafer until at least a portion of the one or more v-shaped grooves are exposed; and forming at least one chamfer in the at least one integrated circuit die, the chamfer extending from a top surface of the integrated circuit die to an intersection of first and second adjacent sides of the at least one integrated circuit die, the chamfer having an upper surface which is angled relative to the first and second adjacent sides; wherein a sidewall of each of the one or more v-grooves forms a beveled perimeter edge of the separated at least one integrated circuit die.