Patent ID: 7767520
Filing Date: 2010-08-03
Classification: H01L

Abstract:
1. A method for making a MOS transistor, comprising the steps of: a) forming a plurality of semiconductor islands on an electrically functional substrate; b) printing a first dielectric layer on or over a first subset of said semiconductor islands and a second dielectric layer on or over a second subset of said semiconductor islands, said first dielectric layer containing a first dopant and said second dielectric layer containing a second dopant different from said first dopant, such that said first and second dielectric layers are laterally adjacent to each other and do not overlap each other over the active region of said MOS transistor; and c) annealing said dielectric layer(s), said semiconductor islands and said substrate sufficiently to diffuse said first dopant into said first subset of semiconductor islands and said second dopant into said second subset of semiconductor islands.