Patent ID: 8274162
Filing Date: 2012-09-25
Classification: H01L

Abstract:
1. An integrated circuit, comprising: a laminate substrate; and one or more die attach pads disposed on the laminate substrate, the one or more die attach pads including one or more metal oxide regions and one or more non-oxidized metal regions, the one or more metal oxide regions and the one or more non-oxidized metal regions being directly disposed on a common surface area of each of the one or more die attach pads, wherein the one or more metal oxide regions and the one or more non-oxidized metal regions are disposed in a pattern such that current is configured to flow predominately through the one or more non-oxidized metal regions of the pattern, wherein the one or more metal oxide regions and the one or more non-oxidized metal regions of the one or more die attach pads are configured to receive a die attach epoxy material to facilitate coupling of an integrated circuit die with the laminate substrate.