Patent ID: 9159643
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A method of making a plurality of integrated circuit packages, comprising: providing a substrate array comprising a plurality of flip chip mounted integrated circuit die, each having a first surface that is attached to a first surface of the substrate array using flip chip bumps and a second surface which is formed a compliant thermally conductive interface layer; providing a heat spreader lid array comprising a plurality of heat spreader lids having planar upper lid surfaces connected together by connection spars to define one or more openings between adjacent heat spreader lids defining singulation cut areas around each head spreader lid; attaching the heat spreader lid array to the substrate array by pressing the heat spreader lid array to compress the compliant thermally conductive interface layer formed on each integrated circuit die to expand laterally to form a compressed thermally conductive interface layer which completely covers the second surface of the die and make direct contact therebetween; encapsulating the plurality of flip chip mounted integrated circuit die and the heat spreader lid array with encapsulant wherein the upper planar upper lid surfaces of the plurality of heat spreader lids are exposed; and curing the encapsulant to form an array of molded packages, each having a portion of the substrate array exposed on a first side and a planar upper lid surface of a heat spreader lid exposed on a second side.