Patent ID: 7259455
Filing Date: 2007-08-21
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor chip which comprises a semiconductor substrate and a multilayer interconnection structure formed thereon, the multilayer interconnection structure including an interlayer insulating film smaller in relative dielectric constant than an SiO2 film; an encapsulating resin layer which covers a first major surface of the semiconductor chip on a side of the multilayer interconnection structure and covers a side surface of the semiconductor chip; and a stress relaxing resin layer which is interposed between the semiconductor chip and the encapsulating resin layer, covers at least a part of an edge of the semiconductor chip on the side of the multilayer interconnection structure, and is smaller in Young's modulus than the encapsulating resin layer, the stress relaxing resin layer covering the first major surface only at a periphery thereof.