Patent ID: 8949298
Filing Date: 2015-02-03
Classification: G06F

Abstract:
1. Polynomial circuitry for calculating a polynomial having terms including powers of an input variable, said input variable represented by a mantissa and an exponent, said circuitry having a number of bits of precision and comprising: a plurality of coefficient memories, each respective one of said coefficient memories corresponding to a respective one of said terms of said polynomial, wherein: for each respective one of said terms of said polynomial, said respective one of said coefficient memories that corresponds to said respective one of said terms of said polynomial is loaded with a plurality of instances of a respective coefficient for said respective one of said terms of said polynomial, and said instances of said respective coefficient for said respective one of said terms of said polynomial are multiple versions of said respective coefficient for said respective one of said terms of said polynomial, each version being shifted by a different number of bits; and respective address circuitry associated with each respective one of said coefficient memories, said respective address circuitry selecting one of said instances of said respective coefficient for said respective one of said terms of said polynomial based on said exponent.