Patent ID: 7005358
Filing Date: 2006-02-28
Classification: H01L

Abstract:
1. A method, comprising: forming a recessed first sidewall spacer adjacent to a sidewall of a polysilicon line formed above a substrate, said first sidewall spacer exposing an upper sidewall portion of said polysilicon line; forming a second sidewall spacer comprised of silicon dioxide adjacent to said first sidewall spacer, said second sidewall spacer having a predefined etch selectivity with respect to said polysilicon line and said substrate, wherein forming said second sidewall spacer includes depositing a silicon dioxide layer over said polysilicon line and said first recessed sidewall spacer and anisotropically etching said silicon dioxide layer, whereby an etch chemistry is selective to silicon; reducing a size of said second sidewall spacer by a selective etch process according to said predefined etch selectivity so as to expose at least said upper sidewall portion; and forming a metal silicide region at least on said exposed upper sidewall portion.