Patent ID: 6829166
Filing Date: 2004-12-07
Classification: G11C

Abstract:
A control method of a non-volatile memory, the non-volatile memory comprising a plurality of memory cells, each memory cell comprising:a substrate; a storage unit positioned on the substrate for storing data, the storage unit comprising: a floating gate for storing charges; and a control gate for receiving an operational voltage to induce a conductive channel on the surface of the substrate, the conducting channel being related to a total number of charges stored on the floating gate; and a control unit positioned on the substrate, a parasitic capacitor between the control unit and the storage unit being affected by establishment of the conducting channel, the control unit is a metal-oxide-semiconductor (MOS) transistor comprising: a first electrode for receiving a control voltage to control conductivity of the control unit; a second electrode for receiving a first predetermined voltage, a second predetermined voltage, and a third predetermined voltage to adjust charges stored in the parasitic capacitor so that corresponding data represented by amounts of the charges are stored; and a third electrode electrically connected to the parasitic capacitor; the control method comprising: applying a first predetermined voltage to the control unit; and measuring a voltage shift of the first predetermined voltage to determine data stored in the storage unit after the first predetermined voltage is passed through the parasitic capacitor.