Patent ID: 6075829
Filing Date: 2000-06-13
Classification: H03B,H03D,H03J,H03L,H04H

Abstract:
A digital receiver comprising:a PLL for generating a local oscillation signal based on phase detection and comparison with a reference frequency signal;a mixer for converting a QPSK (quaternary phase-shift keying) modulated signal into a first intermediate frequency signal based on the local oscillation signal;a bandpass filter for extracting a second intermediate frequency signal from the first intermediate frequency signal;orthogonal detector for detecting an in-phase component I and a quadrature component Q of the second intermediate frequency signal and for continuously compensating a frequency drift of the second intermediate frequency signal;an A/D converter for converting the in-phase component signal I and the quadrature component signal Q of the second intermediate frequency signal to a digital in-phase component signal and a digital quadrature component signal;QPSK demodulator for digitally demodulating the digital in-phase component signal and the digital quadrature component signal and for producing an encoded and multiplexed signal;error correction means for correcting transmission errors of the encoded and multiplexed signal; anda demultiplexer for demultiplexing the output of said error correction means and for producing a system clock signal,wherein the reference frequency signal for phase detection and comparison by said PLL is calculated by dividing the system clock signal produced by said demultiplexer.