Patent ID: 6294407
Filing Date: 2001-09-25
Classification: H01L,H05K

Abstract:
A method of fabricating a microelectronic package, comprising the steps of:forming a release layer on a substrate;forming a thin film decal on the release layer, the thin film decal including first and second opposing decal faces, a plurality of first decal input/output pads on the first decal face, a plurality of second decal input/output pads on the second decal face and at least one internal wiring layer that is electrically connected to at least one of the first and second decal input/output pads, the first decal input/output pads being adjacent the release layer and the second decal input/output pads being remote from the release layer;forming on the second decal face, a dielectric adhesive layer that includes first and second opposing dielectric adhesive layer faces and a plurality of conductive vias therein that extend between the first and second opposing dielectric adhesive layer faces, the first dielectric adhesive layer face being adjacent the second decal face and the second adhesive dielectric layer face being remote from the second decal face, such that at least one of the conductive vias electrically connects to at least one of the second decal input/output pads;adhesively bonding the dielectric adhesive layer second face to a second level substrate including a plurality of second level substrate input/output pads on a face thereof, such that at least one of the conductive vias electrically connects to at least one of the second level substrate input/output pads; andprocessing the release layer to thereby release the substrate from on the first face of the thin film decal.