Patent ID: 8598001
Filing Date: 2013-12-03
Classification: H01L

Abstract:
1. A method for forming a non-volatile memory structure, the method comprising: providing a semiconductor substrate including a surface region; forming a gate dielectric layer overlying the surface region; forming a polysilicon gate structure overlying the gate dielectric layer; forming an undercut region underneath the polysilicon gate structure in a portion of the gate dielectric layer; subjecting the polysilicon gate structure to an oxidizing environment to cause formation of a first silicon oxide layer overlying an entire periphery of the polysilicon gate structure; depositing a hafnium oxide material overlying the first silicon oxide layer including filling the undercut region, the hafnium oxide material being formed by depositing a first hafnium oxide layer overlying the first silicon oxide layer, depositing a nanocrystalline silicon material overlying the first hafnium oxide layer and depositing a second hafnium oxide layer overlying the nanocrystalline silicon material; subjecting the hafnium oxide material to a selective etching process while maintaining the hafnium oxide material in an insert region in a portion of the undercut region and the first silicon oxide layer on the entire periphery of the polysilicon gate structure; and forming a sidewall structure overlying a side region of the polysilicon gate structure.