Patent ID: 6306695
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A method to form an ESD circuit within a substrate comprising the steps of:providing said substrate whereby substrate is lightly doped with a material of a first conductivity type;forming within the surface of the substrate a plurality of source diffusions having a heavily doped concentration of a material of a second conductivity type, whereby pairs of the source diffusions are formed in closed proximity;forming within the surface of the substrate a plurality of drain diffusions having the heavily doped concentration of the material of the second conductivity type and being placed at a distance from the source diffusion thus forming MOS FET's;forming within the surface of the substrate isolation diffusions having a heavily doped concentration of the material of the first conductivity type such that each isolation diffusion is placed between and contiguous to the two source diffusions of the pairs of source diffusions;electrically floating the isolation diffusions;connecting the plurality of drain diffusions to a signal terminal on the surface of the substrate;connecting the plurality of source diffusions to a ground reference potential; andconnecting the substrate to a ground reference potential;whereby the plurality of drain diffusions form collectors of a plurality of parasitic bipolar junction transistors, the plurality of source diffusions form emitters of the plurality of parasitic bipolar junction transistors, the region of the substrate between the drain diffusions and the source diffusions forms the bases of the parasitic bipolar junction transistor, a region in proximity to said bases of said substrate forms first bulk resistors, each first bulk resistor having a first terminal connected to each of said bases, a second region of said substrate forms second bulk resistors, each second bulk resistor having a first terminal connected to a junction of second terminals of a pair of first bulk resistors connected to the bases of the parasitic bipolar junction transistors having emitters formed of the pairs of source diffusions, and second terminals connected to the ground reference potential.