Patent ID: 8468397
Filing Date: 2013-06-18
Classification: G06F,H04L

Abstract:
1. An error controlling system, comprising: a plurality of error generation target circuits each reading and writing data; a plurality of pseudo error generating devices each having a pseudo error content holding register that holds directed pseudo error content, each plurality of pseudo error generating device generates a pseudo error corresponding to a pseudo error content held in a respective pseudo error content holding register in at least one of data to be written to one of the plurality of error generation target circuits and data to be read from one of the plurality of error generation target circuits upon being directed to generate the pseudo error; and a pseudo error controlling device that selectively directs one of the plurality of pseudo error generating devices to generate a pseudo error corresponding to a respective pseudo error content held in the respective pseudo error content holding register based on a distance between the one of the pseudo error generating devices and a pseudo error generation target.