Patent ID: 7127590
Filing Date: 2006-10-24
Classification: G06F

Abstract:
1. A computer processor, comprising: a plurality of processing units; and communication means including a common bus to which each of the plurality of processing units are interconnected for communication of packetized information over said common bus, said communication means being dynamically configurable based on a processing of a computer program to thereby selectively arrange communication paths for said packetized information between the processing units in at least first and second distinct configurations, the first distinct configuration having a larger number of the processing units arranged in parallel than the second distinct configuration, and the second distinct configuration having a deeper pipeline depth than the first distinct configuration, wherein subject data to be processed by the computer processor includes image data, the first configuration being used for executing a first type of image processes having no necessity for feed-forward of data calculations whilst the second configuration is used for executing a second type of image processes having a necessity for feed-forward of data calculations.