Patent ID: 9197574
Filing Date: 2015-11-24
Classification: H04J,H04L

Abstract:
1. A method of line speed sequence number checking of frames, the method including: in a first process, using a lowest order bit of a frame sequence number of a frame to assign the frame to an odd or even second process and dispatching at least the frame sequence number for processing by the assigned second process; in the first process, further flagging as a first sequence error type occurrences of assigning consecutively processed frames to the same odd or even second process; in the odd and even second processes, checking the frame sequence number of an incoming frame, flagging as a second sequence error type non-consecutive frame sequence numbers in consecutively processed incoming frames, and dispatching the frame for additional downstream processing; in a hierarchy of tiers of processes, wherein tier T in the tiers includes 2^(T-1) processes, Tier 1 includes the first process, and Tier 2 includes the odd and even second processes, using a particular bit of a frame sequence number of an incoming frame to a process in Tier T to assign the incoming frame to one of 2^T processes in Tier (T+1); and in the processes in Tier (T+1), checking the frame sequence number of the incoming frame, flagging as a third sequence error type frame sequence numbers of two consecutively processed incoming frames differing by a value other than two (2) to the power of (T−1), and dispatching the frame for additional downstream processing.