Patent ID: 6400004
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A leadless semiconductor package having side surfaces and a bottom surface with a plurality of edges comprising:a die pad and a plurality of leads arranged about the periphery of the die pad, each of the leads having a cutting end exposed from one of the side surfaces of the package, and opposing upper and lower surfaces, the lower surface of each lead having an indentation formed at a location corresponding to one of the edges of the bottom surface of the package such that the cutting ends of the leads do not show at the bottom surface of the package; a plurality of tie bars connecting to the die pad; a semiconductor chip disposed on the die pad and electrically coupled to the leads; and a package body formed over the semiconductor chip, the leads and the tie bars, wherein the lower surface of each lead is exposed from the bottom surface of the package except the indentation thereof.