Patent ID: 6239733
Filing Date: 2001-05-29
Classification: H03M

Abstract:
An interpolation circuit for use in an analog-to-digital converter (ADC), said interpolation circuit comprising:a plurality of folding amplifiers for converting a plurality of reference input voltages into a plurality of positive current signals and a plurality of negative current signals;two current dividers, one of said current dividers being configured to receive said plurality of positive current signals for generating a plurality of generated positive current signals having a quantity larger than said positive current signals, the other of said current dividers being configured to receive said plurality of negative current signals for generating a plurality of generated negative current signals having a quantity larger than said negative current signals; anda plurality of current comparators, each of said current comparators having a first input terminal coupled to receive one of said generated positive current signals, and having a second input terminal coupled to receive one of said generated negative current signals, wherein differential current between the first input terminal and the second input terminal of each current comparator is then transformed into a differential voltage signal which is used as one of interpolated levels.