Patent ID: 6188127
Filing Date: 2001-02-13
Classification: H01L

Abstract:
A semiconductor package stack module comprising:a plurality of carriers stacked one upon the other, each of said plurality of carriers having first through holes associated with said carrier;a conductor pattern on at least a front face of said carrier and electrically connected to said first through holes;pads for inner bonding on a rear face of said carrier, and electrically connected to said first through holes;an LSI chip mounted face down on said carrier and connected thereto by said pads, said plurality of carriers being connected tridimensionally by said first through holes,wherein first said through holes are formed in said carriers, said plurality of carriers being electrically and tridimensionally connected to each other by bumps formed on said through holes;further comprising second through holes formed in fine pitch arrays in the edge of each of said carriers portions of said carrier; andsaid second through holes being connected to ground without exception.