Patent ID: 9160322
Filing Date: 2015-10-13
Classification: H03K

Abstract:
1. A clock edge detection device capable of detecting the positive and negative edges of a target clock, comprising: a delay circuit including a plurality of delay units connected in series for receiving and transmitting the target clock by a predetermined transmission arrangement; a register circuit including a plurality of registers coupled to the delay circuit for recording and outputting target clock levels of the target clock in accordance with a working clock whose frequency is higher than the frequency of the target clock, wherein each of the registers includes a data input end for receiving the target clock from one of the delay units, a data output end, and a working clock reception end for receiving the working clock; a positive edge detection circuit including a plurality of positive edge detectors coupled to the data output ends of the register circuit for detecting the positive edge of the target clock, wherein each of the positive edge detectors includes a positive edge detection unit for generating a positive edge detection value according to the target clock levels from adjacent two of the registers; and a negative edge detection circuit including a plurality of negative edge detectors coupled to the data output ends of the register circuit for detecting the negative edge of the target clock, wherein the configuration of the negative edge detection circuit is not identical to the configuration of the positive edge detection circuit in consideration of the predetermined transmission arrangement and each of the negative edge detectors includes a negative edge detection unit for generating a negative edge detection value according to the target clock levels from adjacent two of the registers, wherein the positive edge detection values record at least two positive edges and the negative edge detection values record at least one negative edge, or the negative edge detection values record at least two negative edges and the positive edge detection values record at least one positive edge.