Patent ID: 8321170
Filing Date: 2012-11-27
Classification: G01D

Abstract:
1. A structure, comprising an integrated circuit, the integrated circuit comprising: a power bus; a transducer and transducer circuitry which form a sensor; a first power supply terminal coupled to the power bus and for being coupled to a power supply external to the integrated circuit; a second power supply terminal for being coupled to the power supply external to the integrated circuit; a logic function circuit, for being powered from the power bus, having a first input coupled to the second power supply terminal, a second input for receiving a lock bit, and an output; an automatic calibration circuit, for being powered by the power bus, having an input coupled to the output of the logic function circuit; logic circuitry, for being powered from the power bus, coupled to the transducer and transducer circuitry and to the automatic calibration circuit for coordinating with the automatic calibration circuit to perform a calibration test on the sensor; and a non-volatile memory, for being powered from the power bus, coupled to the automatic calibration circuit for storing calibration information including the lock bit that when asserted indicates that the calibration test on the sensor has been performed in response to the second power supply terminal being coupled to the power supply external to the integrated circuit.