Patent ID: 9170297
Filing Date: 2015-10-27
Classification: G01R,G06K,H04L

Abstract:
1. A contactless smartcard integrated circuit comprising: a digital module; a first pin for inputting a clock signal, the first pin being electrically coupled to the digital module; a second pin for both inputting a test scan sequence and outputting scan data, the second pin being electrically coupled to the digital module; and a test control logic for controlling both input to the second pin and output from the second pin, wherein the digital module comprises a scan chain compactor configured to create a single scan chain, wherein the scan chain compactor is electrically coupled to a first input of a comparative logic and an output of the comparative logic is electrically coupled to a signature generator, wherein a second input of the comparative logic is electrically coupled to an input buffer, the input buffer being electrically coupled to the second pin such that mask data may be provided to the second input of the comparative logic from the second pin.