Patent ID: 8928303
Filing Date: 2015-01-06
Classification: H02M

Abstract:
1. An apparatus comprising: a first circuit configured to receive an oscillating reference signal, a first compensation signal, a second compensation signal, and a third compensation signal, wherein the first circuit is configured to generate a comparison signal having a waveform comprising a plurality of pulses having pulse durations based at least partly on a combination of the periodic reference signal, the first compensation signal, the second compensation signal, and the third compensation signal, wherein the first compensation signal is indicative of an error between an output voltage of a power converter and a reference voltage, wherein the second compensation signal is indicative of the error relative to a threshold, and wherein the third compensation signal is indicative of an output current of the power converter; and a second circuit configured to receive a clock signal and the comparison signal, wherein the second circuit is configured to generate a drive signal for activation and deactivation of a driver transistor, wherein the second circuit is configured to generate the drive signal such that the drive signal activates the driver transistor based at least partly a characteristic of the clock signal, and wherein the second circuit is configured to generate the drive signal such that the drive signal deactivates the driver transistor based at least partly a characteristic of the comparison signal.