Patent ID: 8445968
Filing Date: 2013-05-21
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate including a strained-channel analog NMOS transistor; a first etch stop liner (ESL) which extends over a top surface of the substrate and has a hydrogen concentration of less than 1×10 a gate of the strained-channel analog NMOS transistor disposed between the first ESL and the substrate, wherein the first ESL is a neutral ESL, the NMOS transistor is a strained-channel transistor, the substrate has a groove therein at sides of the gate of the strained-channel NMOS transistor, and the strained-channel NMOS transistor has a tensile epitaxial semiconductor layer which fills the groove in the substrate, and source/drain regions that extend in the tensile epitaxial semiconductor layer, said tensile epitaxial semiconductor layer and said source/drain regions inducing tensile strain in a channel region of the NMOS transistor.