Patent ID: 6542423
Filing Date: 2003-04-01
Classification: G11C

Abstract:
In a register array system comprising at least one column of data registers, each data register for storing a data value, a read bit line corresponding to each column of data registers, and a pull down device corresponding to each data register and configured to discharge, in response to being turned on, the read bit line corresponding to the same data register, a method for reading the data value stored in a data registers, comprising:providing a clock signal and a read enable signal; in response to the clock signal having a low value, precharging the corresponding read bit line to a voltage VDD; in response to the clock signal, the read enable signal, and the data value each having a high value, turning on the pull down device to discharge the corresponding read bit line; in response to the clock signal having a low value, turning off the pull down device; in response to the read enable signal having a low value, turning off the pull down device; and in response to the data value being low, turning off the pull down device.