Patent ID: 7711512
Filing Date: 2010-05-04
Classification: G01R

Abstract:
1. A semiconductor device test method using a test apparatus including a frequency generation unit and a plurality of block test units, each of the block test units including a test data generation unit and a data determination unit, said method comprising: generating via the frequency generation unit a plurality of signals with different frequencies in response to a user's command; generating via the test data generation unit a plurality of test data in response to the respective signals; receiving the plurality of test data and outputting a plurality of input test data to a plurality of ports of a semiconductor device, respectively; receiving a plurality of output test data from the plurality of ports of the semiconductor device and outputting test result data; and comparing via a data determination unit the test result data with previously stored test expectation data and determining if the semiconductor device is normal, wherein generating the signals comprises: generating a stable low-frequency signal; determining use or disuse of multiple frequencies in response to a user's command to output a multi-frequency control signal; outputting a plurality of information data for designating frequencies of the signals in response to the multi-frequency control signal; and generating the plurality of signals in response to the plurality of information data, respectively.