Patent ID: 7687893
Filing Date: 2010-03-30
Classification: H01L

Abstract:
1. A semiconductor package comprising: a die pad defining opposed top and bottom pad surfaces, and including at least one anchor pad which protrudes from the bottom pad surface and defines a distal surface, the bottom pad surface being of a first area, and the distal surface being of a second area which is less than the first area; a plurality of leads which each define opposed top and bottom lead surfaces and extend at least partially about the die pad in spaced relation thereto; at least one semiconductor die attached to the top pad surface of the die pad and electrically connected to at least one the leads; and a package body defining a generally planar bottom surface and multiple side surfaces, the package body at least partially encapsulating the die pad, the leads and the semiconductor die such that at least the distal surface of the anchor pad and the bottom lead surfaces of the leads are exposed in the bottom surface of the package body.