Patent ID: 8497666
Filing Date: 2013-07-30
Classification: H01L,H02M

Abstract:
1. A semiconductor device comprising: a first transistor and a second transistor constituting a high side transistor and a low side transistor of a DC/DC converter, respectively; a first node; a charge and discharge circuit including a constant current source which charges and discharges the first node and determines a charge rate or a discharge rate, and a changeover switch switching between charge and discharge; a clock signal generation circuit which generates a first clock signal by determining a voltage level of the first node; a second node for transmitting a common clock signal; a first switch which, when turned on, couples the clock signal generation circuit to the second node and transmits the first clock signal as the common clock signal; a third node to which a pulse input signal is input; a fourth node for outputting a pulse output signal; a pulse signal generation circuit which generates a delayed pulse signal by delaying the pulse input signal by a predetermined cycles of the common clock signal, and transmits the delayed pulse signal as the pulse output signal; and a PWM control circuit which controls switching of the first and second transistors using a PWM signal, with the pulse input signal or the pulse output signal as a starting point.