Patent ID: 6653967
Filing Date: 2003-11-25
Classification: H03M

Abstract:
A fully differential sampling circuit, comprising:first and second sampling capacitors each composed of an upper layer and a lower layer electrode formed on a semiconductor substrate and a dielectric film between said electrodes, a first switch group for charging and discharging said first sampling capacitor, a second switch group for charging and discharging said second sampling capacitor, and a fully differential operational amplifier which connects a first integral capacitor between a negative input terminal and a positive output terminal and connects a second integral capacitor between a positive input terminal and a negative output terminal, wherein said first switch group connects said first sampling capacitor between a first input terminal and a ground in a first period and between a second input terminal and said negative input terminal of said fully differential operational amplifier in a second period, said second switch group connects said second sampling capacitor between said second input terminal and the ground in said first period and between said first input terminal and said positive input terminal of said fully differential operational amplifier in said second period, and the upper layer and lower layer of the first sampling capacitor being connected between the first input terminal and the differential operational amplifier in a direction opposite to the connection of the upper layer and lower layer of the second sampling capacitor between the second input terminal and the differential operational amplifier.