Patent ID: 7280591
Filing Date: 2007-10-09
Classification: H04L

Abstract:
1. An integrated reduced media independent interface (Integrated RMII) for interconnecting a medium access control circuit (MAC Circuit) and a physical circuit (PHY Circuit), the integrated reduced media independent interface (Integrated RMII) comprising: a transmission data interface (TXD) for transmitting data from the medium access control circuit (MAC Circuit) to the physical circuit (PHY circuit); a transmission-enabling interface (TX_EN) for controlling the transmission data interface (TXD); a reference clock (REF_CLK) interface for providing a reference clock to the integrated reduced media independent interface (Integrated RMII); a receiving-enabling interface (CRS_DV) for detecting a low-voltage indicating an error-detection mode and an idle mode, and a high voltage indicating a transmission-enabling mode; and a data receiving interface (RXD) for transmitting the data from the physical circuit (PHY circuit) to the medium access control circuit (MAC circuit), wherein the medium access control circuit (MAC circuit) receives the data transmitted from the data receiving interface (RXD) when the receiving-enabling interface (CRS_DV) detects a high voltage and rejects the data transmitted from the data receiving interface (RXD) when the receiving-enabling interface (CRS_DV) detects a low voltage.