Patent ID: 6167498
Filing Date: 2000-12-26
Classification: G09G

Abstract:
For use in connection with an information processing system including at least one host CPU and a host memory, said host memory being addressable in a first addressing format, and a subsystem for performing a predetermined aspect of information processing operations being performed by said information processing system, said subsystem including a subsystem memory section addressable in a second addressing format, a method for implementing a data storage and retrieval process for managing data requests in said second format to read and write information between said information processing system and said subsystem, said method comprising:generating a data read request from the host CPU for a data read transaction between the subsystem and the host memory, said request being presented as a requested address in said second addressing format;calculating within said subsystem an equivalent host memory target address in said first addressing format equivalent to said request in said second format;accessing a host memory location at the host memory target address;transferring data between said host memory location at the host memory target address and said subsystem in response to said data read request; andstoring said host memory target address until said accessing step is completed.