Patent ID: 6598197
Filing Date: 2003-07-22
Classification: G11B

Abstract:
A method for concealing errors in stored digital samples, comprising the steps of:receiving a multibit digital input sample; calculating an error detecting code, corresponding to the input sample, containing a predetermined number of bits; forming a multibit digital storage sample by substituting a predetermined number of error detecting code bits for a predetermined number of least significant bits of the input sample; storing the storage sample in a memory device; retrieving a previously stored sample from the memory device; examining the retrieved sample to detect an error; and if an error is detected, producing a substitute sample for the retrieved sample, otherwise producing the retrieved sample; wherein the step of calculating an error detecting code comprises the steps of: partitioning the input sample into a plurality of sets of bits; and calculating a plurality of parity bits respectively corresponding to the plurality of sets of bits, as the error detecting code.