Patent ID: 7271633
Filing Date: 2007-09-18
Classification: H03L

Abstract:
1. A charge pump and loop filter circuit of a phase locked loop, comprising: a first input current source electrically connected to a first node of the circuit for supplying a first current to the circuit, the first current being equal to a predetermined amount of current multiplied by a first factor; a second input current source electrically connected to a second node of the circuit for supplying a second current to the circuit, the second current being equal to the predetermined amount of current multiplied by a second factor; a first output current source electrically connected to a third node of the circuit for outputting the first current from the circuit; a second output current source electrically connected to a fourth node of the circuit for outputting the second current from the circuit; a unit gain buffer electrically connected between an intermediate node of the circuit and a fifth node of the circuit for supplying a voltage of the intermediate node to the fifth node; a first capacitor electrically connected between the intermediate node and a reference level of the circuit; a resistor electrically connected between the fifth node and an output node of the circuit; a second capacitor electrically connected between the output node of the circuit and the reference level; a plurality of up pulse switches controlled by an up pulse control signal for controlling current flow such that in a charging mode of the circuit, the second current flows from the second node through the output node and through the resistor to the fifth node, and the first current flows from the first node through the intermediate node to the first capacitor for charging the first capacitor; and a plurality of down pulse switches controlled by a down pulse control signal for controlling current flow such that in a discharging mode of the circuit, the second current flows from the fifth node through the resistor and out through the second output current source, and the first current flows from the first capacitor through the intermediate node and out through the first output current source for discharging the first capacitor.