Patent ID: 6683810
Filing Date: 2004-01-27
Classification: G11C

Abstract:
A non-volatile memory device comprising:a plurality of non-volatile memory cells; a plurality of word lines each of which couples to corresponding ones of said non-volatile memory cells; and a control circuit, wherein each of said non-volatile memory cells is capable of storing multi bit data as a threshold voltage within one of a plurality of threshold voltage distributions, wherein one of said threshold voltage distributions indicates an erase state and others of said threshold voltage distributions indicate program states, and wherein in an operation of programming, said control circuit controls a plurality of program voltage supplying phases, including a first program voltage supplying phase in which said control circuit controls supplying program voltage to one of said word lines a plurality of times and verifying, and other program voltage supplying phases in which said control circuit controls supplying of program voltage to said one of word lines one time and verifying.