Patent ID: 6839833
Filing Date: 2005-01-04
Classification: G06F

Abstract:
1. For use in a data processing system having an instruction processor to execute instructions included in the instruction set of the instruction processor, the instruction processor having an instruction pipeline capable of initiating simultaneous execution on a variable number of the instructions, up to a predetermined maximum number of instructions, in a predetermined period of time, a system for programmably controlling the variable number of the instructions beginning execution within the instruction pipeline during the predetermined period of time, comprising: a first storage device to receive and to store a programmable count value indicative of a predetermined number of instructions; and a logic sequencer coupled to said first storage device to receive said programmable count value, and in response thereto, to generate a pipeline control signal provided to the instruction pipeline to cause the instruction pipeline to receive, and to initiate concurrent execution on, the predetermined number of the instructions in the predetermined period of time, whereby up to said predetermined maximum number of instructions may be executing simultaneously within the instruction pipeline.