Patent ID: 6750093
Filing Date: 2004-06-15
Classification: H01L

Abstract:
A method for manufacturing a semiconductor integrated circuit, comprising:forming a first insulating film on a semiconductor substrate, said first insulating film having a flattened surface; forming a first groove in said first insulating film; depositing a first electrode film on said first insulating film, and flattening a surface of said first electrode film, thereby forming a first electrode in said first groove; depositing a second insulating film on said first electrode and said first insulating film; forming a second groove in a portion of said second insulating film which is located above said first electrode; and depositing a ferroelectric film and a second electrode film successively in said second groove, and flattening a surface of said ferroelectric film and a surface of said second electrode film, thereby forming a second electrode on said ferroelectric film, in said second groove, wherein said first electrode, said ferroelectric film and said second electrode comprise a ferroelectric capacitor of a ferroelectric memory.