Patent ID: 8984320
Filing Date: 2015-03-17
Classification: G11C

Abstract:
1. A command path, comprising: a command receiver configured to receive a command; a command buffer coupled to the command receiver and configured to receive the command and provide a buffered command; a command block coupled to the command buffer to receive the buffered command, the command block configured to provide the buffered command responsive to a clock signal and further configured to add a delay to the buffered command, the delay based at least in part on a shift count; a timing calibration block coupled to the command block and configured to provide the shift count, the timing calibration block including a model delay path having a model path delay based at least in part on a command path delay and a data circuit path delay, wherein the shift count based at least in part on the modeled path delay; and a command tree coupled to the command block to receive the buffered command and configured to distribute the buffered command to a data block.