Patent ID: 9223919
Filing Date: 2015-12-29
Classification: G06F

Abstract:
1. A computer implemented method comprising: accessing a three-dimensional integrated circuit (3D-IC) model stored in a tangible, non-transitory machine readable medium, the model comprising a plurality of elements representing a 3D-IC design to be fabricated and to operate under a condition; processing the 3D-IC model in a computer processor, wherein the processor is programmed to analyze the 3D-IC to calculate a temperature at each of a plurality of points of the 3D-IC operating under the condition; identifying a respective electrical resistance at each of the plurality of points based on the calculated temperatures; calculating and outputting from the processor data representing temperature-dependent power consumption at each of the plurality of points of the 3D-IC based on the temperature at each of the plurality of points and the respective electrical resistance at each of the plurality of points; identifying a potential electromigration violation based on the temperature-dependent power consumption at each of the plurality of points of the 3D-IC, wherein an indicator representing the potential electromigration violation at a corresponding location is output, when a power index representing power consumption at a corresponding location is higher than an assigned power budget at the corresponding location; and changing the 3D-IC design to mitigate the potential electromigration violation.