Patent ID: 6658014
Filing Date: 2003-12-02
Classification: H04L

Abstract:
A packet buffer device to store ATM cells multiplexed and input via multiple logical channels, and to assemble ATM cells corresponding to each logical channel into packets in a buffer, comprising:a discrete buffer controller to generate a discrete buffer from a common buffer; a buffer type determination unit to determine a buffer type to store an ATM cell for each input ATM cell; a packet buffer controller to assign the ATM cell to the common buffer or to the discrete buffer according to the buffer type, wherein the packet buffer controller acquires a buffer from an empty buffer of a common buffer in response to determining that there is no empty discrete buffer to acquire, and performs control of packet assembly, and wherein the packet buffer controller further comprises a device to assess a discrete buffer increase indication from the discrete buffer controller, to rewrite a buffer type within the buffer management unit corresponding to a buffer acquired from an empty buffer of a common buffer to a buffer type designating a relevant discrete buffer in response to the discrete buffer increase indication, and to modify several buffers acquired from a common buffer to discrete buffers.