Patent ID: 8890250
Filing Date: 2014-11-18
Classification: H01L

Abstract:
1. An electrostatic discharge protection structure, comprising: a semiconductor substrate; a first well region disposed in the semiconductor substrate, and containing first type conducting carriers; a gate structure disposed over a surface of the first well region; a second well region disposed within the first well region, and located at a first side of the gate structure, wherein the second well region contains second type conducting carriers; a first conductive region disposed on the surface of the first well region, and arranged between the gate structure and the second well region, wherein the first conductive region contains the second type conducting carriers; a second conductive region disposed on the surface of the first well region, and located at a second side of the gate structure, wherein the second conductive region contains the second type conducting carriers; a deep well region disposed under the second well region and the first conductive region, and contacted with the second well region, wherein the deep well region is separated from the first conductive region by the first well region, wherein the deep well region contains the second type conducting carriers; and a third conductive region arranged between the second well region, the first conductive region and the deep well region, wherein the third conductive region is contacted with a bottom surface of the first conductive region.