Patent ID: 6678783
Filing Date: 2004-01-13
Classification: G06F

Abstract:
An inter-device coupler for arbitrating data transfer between an arithmetic logical unit and a memory operating at different speeds, comprising:a first input circuit operating at the same speed as said arithmetic logical unit and receiving as input and outputting output data of said arithmetic logical unit; a second input circuit operating at the same speed as said memory and receiving as input and outputting output data of said first input circuit to said memory; a first output circuit operating at the same speed as said memory and receiving as input and outputting read data of the memory; a second output circuit operating at the same speed as said arithmetic logical unit and outputting input data to said arithmetic logical unit; and a path selector for inputting at least one of the output data of said first input circuit or the output data of said first output circuit to said second output circuit in accordance with a value of a path selection signal.