Patent ID: 8420530
Filing Date: 2013-04-16
Classification: B82Y,H01L

Abstract:
1. A method for forming interconnects from a micron to an atomic scale to interconnect an atomic or molecular circuit at a surface of a substrate, the substrate comprising a semiconductor layer on an oxide layer on a bulk substrate forming a silicon-on-oxide substrate, the semiconductor layer having formed thereon a layer of a thermal oxide and a layer of a dielectric, the method comprising: opening a window from a first side of the substrate extending to the oxide layer by removing a portion of the bulk substrate to expose the oxide layer, the oxide layer being between the first side and the semiconductor layer; forming a plurality of buried metal electrodes in the dielectric layer, each buried metal electrode having an inner end, the inner ends facing each other with a gap therebetween; the dielectric remaining between the plurality of buried metal electrodes, and between the inner ends; forming nano-electrodes on the inner ends and extending towards each other with a nano-gap therebetween; forming a plurality of holes where the portion of the bulk substrate has been removed into the substrate to the semiconductor layer, the plurality of holes being formed through the nano-electrodes, the dielectric layer and the thermal oxide layer; and metalizing the plurality of holes to form the interconnects.