Patent ID: 6265765
Filing Date: 2001-07-24
Classification: H01L,H05K

Abstract:
A semiconductor chip assembly comprising:(a) a subassembly including a semiconductor chip having a front surface with contacts thereon and a package element having a central region attached to the chip and a peripheral region extending outwardly away from the chip in horizontal directions generally parallel to the front face of the chip;(b) a substantially imperforate dielectric clement overlying the subassembly, said dielectric element including a central region overlying the central region of the package element adjacent the chip, and a peripheral region extending outwardly from the central region of said dielectric element and overlying the peripheral region of the package element, said dielectric element having a top surface facing away from the subassembly and a bottom surface facing toward the subassembly and electrically conductive terminals on the top surface, at least some of the terminals being disposed in said peripheral region of said dielectric element;(c) a compliant layer disposed between the subassembly and dielectric element and supporting the dielectric element above the subassembly; and(d) vertically-extensive flexible first leads embedded in said compliant layer and extending upwardly from the contacts on the chip to the central region of the dielectric element, the flexible leads being electrically connected to the terminals.