Patent ID: 6205537
Filing Date: 2001-03-20
Classification: G06F

Abstract:
A complexity-adaptive hardware/software system for a microprocessor to execute any of a plurality of diverse applications according to a predetermined instruction set architecture, said system comprising dynamic hardware structures of the microprocessor for executing any particular application among said plurality of diverse applications; said dynamic hardware structures being adaptable to be organized in any of a plurality of potential configurations which are selectable according to the particular application to be executed, wherein each of the plurality of potential configurations has a unique complexity of hardware; and configuration means responsive to the particular application to be executed, the instruction set architecture, and the potential configurations in which the dynamic hardware structures maybe organized, for configuring said dynamic hardware structures to be organized in one of the plurality of potential configurations, and for reconfiguring said dynamic hardware structures to be organized in a different one of the plurality of potential configurations when another of said diverse applications is being executed, whereby to adapt hardware implementation and thereby optimize performance of the microprocessor according to each particular application being executed among the plurality of diverse applications that may be executed.