Patent ID: 8972755
Filing Date: 2015-03-03
Classification: G06F,H02M,Y02D

Abstract:
1. An integrated circuit, comprising: one or more voltage supply pins configured to receive a supply voltage from a voltage regulator; an analog sense pin coupled to a voltage feedback pin of the voltage regulator, the voltage feedback pin being separated from the one or more voltage supply pins, the analog sense pin configured to output a sense voltage to the voltage feedback pin of the voltage regulator; and a controller configured to drive the analog sense pin to output the sense voltage at a first voltage level that is set to cause the voltage regulator to reduce a voltage supplied to the integrated circuit, wherein the sense voltage is set higher than a target voltage of the voltage regulator for decreasing the supply voltage of the voltage regulator when a speed of the integrated circuit exceeds a first timing performance requirement of the integrated circuit, and to drive the analog sense pin to output the sense voltage at a second voltage level that is set to cause the voltage regulator to increase voltage supplied to the integrated circuit when a speed of the integrated circuit fails to meet a second timing performance requirement.