Patent ID: 8842945
Filing Date: 2014-09-23
Classification: G02B,H01L

Abstract:
1. A method of fabricating a three dimensionally integrated semiconductor system, comprising: providing a semiconductor-on-insulator (SeOI) substrate comprising a layer of semiconductor material and a layer of electrically insulating material disposed adjacent a major surface of the layer of semiconductor material; forming at least one photoactive device on the layer of semiconductor material of the SeOI substrate; forming at least one waveguide comprising a portion of the layer of semiconductor material of the SeOI substrate, and operatively coupling the at least one waveguide with the at least one photoactive device; forming at least one current/voltage converter over the layer of semiconductor material of the SeOI substrate; electrically coupling the at least one photoactive device and the at least one current/voltage converter; bonding at least one semiconductor device over the SeOI substrate by a direct bonding process at a temperature of 500° C. or less, wherein the at least one semiconductor device and the at least one photoactive device are disposed on opposing sides of the layer of electrically insulating material of the SeOI substrate; and electrically coupling the at least one current/voltage converter and the at least one semiconductor device bonded over the SeOI substrate.