Patent ID: 6697968
Filing Date: 2004-02-24
Classification: G06F

Abstract:
A method for collecting high speed processor signals over a period of time sufficient for steady state effects to become manifest in a tracing of such signals comprising:a. connecting to a high speed interconnect from which to receive processor signals, b. receiving signals from said high speed interconnect at a clock speed matching said high speed interconnect in a collector computer system, c. setting up said collector computer system to receive said signals upon initiation whereupon said collector computer system is enabled to monitor said signals for an alignment reference so as to enable alignment of processor words from said signals when a said alignment reference appears in said signals, d. aligning all signals associated with each alignment reference to form an entry word signal, responsive to appearance of an alignment reference, e. generating a time stamp value for each alignment reference, and associating each generated time stamp value with a said entry word signal, and f. storing only entry word signals associated with each said alignment reference appearance during a tracing period into a high speed FIFO memory together with its associated time stamp value as entry signals.