Patent ID: 7800427
Filing Date: 2010-09-21
Classification: H03H,H03M

Abstract:
1. A switched capacitor circuit comprising: an amplifier that is a single-ended inverter with a single input and a single output; a charging unit, coupled between an input node and a first node, for accumulating charge corresponding to an input signal during a sampling mode; an offset unit, coupled between the first node and the single input of the inverter, for maintaining the first node to be a virtual ground during an integrating mode; and an integrating unit, coupled between the first node and the single output of the inverter, for receiving charge from the charging unit during the integrating mode; wherein the charging unit includes: and wherein the charging unit further includes: and wherein the integrating unit includes: and wherein the first and third switches are controlled according to a first signal, and wherein the second and fourth switches are controlled according to a second signal.