Patent ID: 6551914
Filing Date: 2003-04-22
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:forming a first metal interconnection on a semiconductor substrate by the interposition of a silicon oxide film; forming an interlevel insulating film on the semiconductor substrate; forming a protective layer with a low polishing rate in chemical mechanical polishing in a surface of said interlevel insulating film by performing, for the surface of said interlevel insulating film, plasma processing using a gas selected from the group consisting of NH3 gas, N2 gas, and a mixture thereof; forming a hole through said protective layer and in said interlevel insulating film to reach an upper surface of said first metal interconnection; forming a barrier metal film on the surface of said interlevel insulating film including side wall and bottom wall surfaces of the hole; forming an interconnection film material on said barrier metal film; forming an interconnection by applying chemical mechanical polishing to said interconnection film material and said barrier metal film, in which the polishing is also applied to at least a surface of said protective layer without polishing the surface of said interlevel insulating film, so as to leave interconnection material and barrier metal in only the hole; and forming a second metal interconnection on the surface of said protective layer.