Patent ID: 6784489
Filing Date: 2004-08-31
Classification: H01L

Abstract:
A method of operating a vertical DMOS transistor in a complex integrated circuit, the vertical DMOS transistor including an epitaxial layer of a first conductivity type formed over a substrate of a second conductivity type; a drain region of the first conductivity type formed within the epitaxial layer; a body region of the second conductivity type formed within the epitaxial layer and forming a pn junction diode with the drain region; a source region of the first conductivity type formed within the body region; a gate electrode positioned above the source region, the body region, and the epitaxial layer; a conductive drain contact coupled to the drain region; and a metallic source contact coupled to the source region and to the epitaxial layer, the metallic source contact having contact with the epitaxial layer at a surface of contact, the surface of contact forming a rectifying barrier in the form of a Schottky diode, the method of operating comprising:conducting current through the Schottky diode when a forward bias is applied from the metallic source contact to the conductive drain contact.