Patent ID: 9013229
Filing Date: 2015-04-21
Classification: H02M

Abstract:
1. A charge pump circuit, comprising: a plurality of three or more serially coupled stages, wherein a voltage output of a first of the stages is connected to a voltage input of a second of the stages, and a voltage output of the second of the stages is boosted relative to a voltage input of the third of the stages, each of the stages comprising: a plurality of at least a first and second clock drivers, wherein each of the first and second clock drivers drives a first clock signal and a second clock signal, respectively, to the pumping capacitor of at least one of the stages, and wherein a voltage of the second clock signal provided to the second of the stages is derived from the voltage input of the second of the stages, and wherein each of the plurality of clock drivers each contain a first control circuitry and a second control circuitry, that is employed to provide an upper and lower bound of a voltage value of the first clock signal and a second clock, wherein at least one upper or lower bound is determined from a voltage across at least one capacitor of the charge pump circuit.