Patent ID: 8227318
Filing Date: 2012-07-24
Classification: H01L

Abstract:
1. A method of forming an isolation region comprising: forming a first pad dielectric layer on an upper surface of a semiconductor substrate; forming a trench through the first pad dielectric layer into the semiconductor substrate; laterally etching the first pad dielectric layer to expose an upper surface of the semiconductor substrate adjacent the trench; filling the trench with a trench dielectric material, wherein the trench dielectric material extends atop the upper surface of the semiconductor substrate adjacent the trench and abuts the pad dielectric layer; removing the first pad dielectric layer to provide an exposed portion of the upper surface of the semiconductor substrate that is adjacent the trench dielectric material that extends atop the upper surface of the semiconductor substrate that is adjacent to the trench; and forming a conformal dielectric layer overlying the exposed portion of the semiconductor substrate and the trench dielectric material.