Patent ID: 7069389
Filing Date: 2006-06-27
Classification: G06F

Abstract:
1. A method of clearing obsolete entries from a first one of a plurality of mapping caches, each of the plurality of mapping caches being associated with a corresponding one of a plurality of processing units of a computing device, each of the caches being used to translate virtual addresses to physical addresses and storing mappings based on an address translation map, the method comprising: maintaining a counter; updating said counter each time the first one of the plurality of mapping caches is flushed; recording said counter's value in response to a change in the address translation map, whereby a recorded counter value is stored; determining, based on a comparison of said counter's value with the recorded counter value, that the first one of the plurality of mapping caches has not definitely been flushed since said change in the address translation map occurred; and flushing the first one of the plurality of mapping caches; wherein a policy defines permissible access to a memory, and wherein the method further comprises: controlling the content of the address translation map such that the address translation map does not expose to an entity virtual address mappings that would permit said entity to access said memory in violation of said policy; wherein said change comprises either a modification to the map that places or maintains the map in conformance with said policy, or a modification to the map that limits said entity's write access to the map.