Patent ID: 6901568
Filing Date: 2005-05-31
Classification: H01L

Abstract:
1. A method for fabricating a transistor with a predetermined threshold voltage, comprising the steps of: forming a gate film of a transistor and measuring a film thickness of the gate film (S forming a gate electrode of the transistor on the gate film and measuring a gate length of the gate electrode (S inputting a fabrication parameter in fabrication of the transistor (S determining whether or not the fabrication parameter deviates from a predetermined value of a fabrication parameter (S when the fabrication parameter varies from the predetermined value, calculating a fabrication parameter discrepancy between the fabrication parameter and the predetermined value and predicting a deviation of the fabrication parameter (S in a lamp-annealing step of the transistor to be subsequently fabricated, deciding an oxygen concentration in inert gas of the lamp annealing, corresponding to the variation of the fabrication parameter (S forming source and drain regions of the transistor, respectively, by ion implantation (S in the case where the fabrication parameter does not deviate from the predetermined value in the Step S