Patent ID: 6100715
Filing Date: 2000-08-08
Classification: H03K

Abstract:
A method for multiplexing one of a plurality of signals into a shared line-driver within an FPGA, where said plurality of signals can be respectively supplied from plural variable grain blocks (VGB's) of said FPGA, where each VGB is programmably-configurable, where said FPGA further has disposed between said programmably-configurable VGB'S, a dynamic multiplexer having plural input terminals capable of respectively receiving said plurality of signals from the VGB's, and where said dynamic multiplexer further has a dynamically-controllable select terminal capable of dynamically selecting a signal on one of said plural input terminals for output from an output terminal of the dynamic multiplexer to the line-driver, said method comprising the steps of:(a) configuring at least one of said VGB's to supply a selection signal to the select terminal of the dynamic multiplexer; and(b) configuring at least two of said VGB's to supply said plurality of signals respectively to the plural input terminals of the dynamic multiplexer.