Patent ID: 6901359
Filing Date: 2005-05-31
Classification: G06F

Abstract:
1. In a software driven emulator comprised of a plurality of printed circuit boards each having a module, each of said modules including a processor chip and at least one SDRAM coupled to the processor chip, a maintenance bus coupled to said SDRAM, and a memory controller coupled to said maintenance bus, a method of executing bulk data transfers to said SDRAM via said maintenance bus, comprising: setting a latch in said memory controller to halt data transfer between said SDRAM and said processor chip, said processor chip including a plurality of emulation processors; transferring data in bursts to said SDRAM from the plurality of emulation processors via said maintenance bus on each clock cycle for a predetermined number of clock cycles in succession; halting the transfer of data after said predetermined number of clock cycles; initiating a SDRAM refresh cycle after said halting; resuming said transferring data in bursts upon receipt of a done signal after said refresh cycle.