Patent ID: 7892927
Filing Date: 2011-02-22
Classification: H01L

Abstract:
1. A method for fabricating a metal-oxide semiconductor (MOS) transistor, the method comprising: forming a sacrificial layer on a substrate between two insulation regions, wherein the sacrificial layer is formed by facetless epitaxy; disposing an intermediate layer on the sacrificial layer between the two insulation regions, wherein the intermediate layer comprises an alloy of silicon and germanium and is formed by facetless epitaxy; disposing a source, a drain and an insulated gate region above the intermediate layer; and thereafter etching the two insulation regions to expose side ends of the sacrificial layer, etching the sacrificial layer to expose a lower surface of the intermediate layer, and oxidizing the intermediate layer from the lower surface of the intermediate layer, wherein the oxidizing increases a concentration of the germanium in proximity to the insulated gate region, thereby forming a germanium-rich channel.