Patent ID: 6268646
Filing Date: 2001-07-31
Classification: H01L

Abstract:
A lead frame for lead on chip, for mounting a single semiconductor chip in a chip mounting region of the lead frame, said lead frame comprising:a plurality of inner leads to be connected to said single semiconductor chip, said plurality of inner leads being arranged in opposing pairs with a first inner lead of each opposing pair having an inner tip and disposed in a central portion of the chip mounting region and extending outward from said central portion in a first direction and a second inner lead of each opposing pair having an inner tip end disposed in the central portion of the chip mounting region, opposed to the tip end of the first inner lead, and extending outward from said central portion in a second direction, opposed to the first direction;a plurality of outer leads to be connected to an outer circuit; anda varnish-like insulative adhesive provided on at least two longitudinal positions of each of the first and second inner leads of each opposing pair of inner leads for mounting said single semiconductor chip to said lead frame, said at least two longitudinal positions of each of the first and second inner leads of each opposing pair of inner leads being covered by said single semiconductor chip when said single semiconductor ship is mounted to said lead frame in said chip mounting region.