Patent ID: 6914455
Filing Date: 2005-07-05
Classification: H03F

Abstract:
1. A signal amplitude limiting circuit comprising: a first differential circuit having a positive input terminal, a negative input terminal, a positive output terminal and a negative output terminal; a feedback circuit connected to the first differential circuit, the feedback circuit comparing voltages at the positive and negative output terminals with a reference voltage received thereto and outputting a comparison signal in response to the comparison thereof; and a first voltage supply circuit connected to the first differential circuit and the feedback circuit, the first voltage supply circuit providing a current to the first differential circuit in response to the comparison signal, wherein the feedback circuit includes wherein the second differential circuit includes a first MOS transistor having a gate connected to the first input terminal of the second differential circuit, a drain and a source, and a second MOS transistor having a gate connected to the second input terminal of the second differential circuit, a drain and a source connected to the source of the first MOS transistor, and wherein the third differential circuit includes a third MOS transistor having a gate connected to the first input terminal of the third differential circuit, a drain connected to the drain of the first MOS transistor and a source, and a fourth MOS transistor having a gate connected to the second input terminal of the third differential circuit, a drain connected to the drain of the second MOS transistor and a source connected to the source of the third MOS transistor, and wherein the second voltage supply circuit includes a fifth MOS transistor having a source connected to a first potential source, and a gate and a drain connected to the drains of the first and third MOS transistors, and a sixth MOS transistor having a source connected to the first potential source, and a gate and a drain connected to the drains of the second and fourth MOS transistors.