Patent ID: 8575981
Filing Date: 2013-11-05
Classification: H03L

Abstract:
1. A frequency synthesizer, comprising: a phase-locked loop (PLL) frequency generator configured to generate a periodic output signal in response to a periodic input signal, said PLL frequency generator comprising a feedback divider responsive to a feedback divider code; and a code generation circuit configured to generate the feedback divider code, said code generation circuit comprising: an analog-to-digital (ADC) converter configured as a cascaded arrangement of a delta-sigma modulator and a multi-stage digital filter configured to generate a corresponding plurality of divider codes from the multiple stages thereof; and a selection circuit configured to use a first of the plurality divider codes to generate the feedback divider code when said PLL frequency generator is unlocked and use a second of the plurality of divider codes to generate the feedback divider code when said PLL frequency generator is locked.