Patent ID: 7281119
Filing Date: 2007-10-09
Classification: G06F

Abstract:
1. A method of operating a computer system in which a plurality of instructions are obtained from memory, decoded, and supplied in a common machine cycle to respective parallel execution pipelines, said instructions being grouped in at least two different instruction modes, one being a superscalar mode and another being a very long instruction word (VLIW) mode, which method includes acts of: operating first circuitry in the pipelines to carry out vertical dependency checks and resolve vertical dependencies between all instructions that were supplied in successive machine cycles; and operating second circuitry to carry out a horizontal dependency check before the instructions are supplied to the pipelines, between instructions supplied in the same machine cycle for instructions in both the superscalar mode and the VLIW mode to determine if one of the instructions is dependent on a result of another of the instructions supplied in the same machine cycle, and to resolve, in the pipelines, any horizontal dependency between instructions in the superscalar mode.