Patent ID: 7295488
Filing Date: 2007-11-13
Classification: G11C

Abstract:
1. An apparatus for generating a column select line signal in a semiconductor memory device, comprising: a column select line signal generator configured to generate a column select line signal in response to a column select line enable signal, the column select line signal having a first pulse width when the column select line signal generator is in a first operational mode and a second pulse width when the column select line signal generator is in a second operational mode, wherein the second pulse width is longer than the first pulse width a command buffer configured to receive an operation command and responsively generate an operation activation signal; and a column select line enabling unit configured to receive the operation activation signal and responsively generate a column select line enable signal; wherein the column select line signal generator is in the first operational mode when an operation command is applied to the command buffer within a predetermined number of clock cycles after a write command is applied to the command buffer, and the column select line generator is in the second operational mode when an operation command is not applied to the command buffer within the predetermined number of clock cycles after a write command is applied to the command buffer.