Patent ID: 9203019
Filing Date: 2015-12-01
Classification: G11C,H01L

Abstract:
1. An electronic device including a semiconductor memory, the semiconductor memory comprising: a plurality of first lines extending in a first direction; a plurality of second lines extending in a second direction crossing the first direction; a resistance variable layer interposed between the first lines and the second lines; a tunnel barrier layer interposed between the resistance variable layer and the first lines so that the resistance variable layer and the first lines are spaced apart from each other by the tunnel barrier layer; and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer so that the resistance variable layer and the tunnel barrier layer are spaced apart from each other by the intermediate electrode layer, wherein a plurality of intersection regions are defined by the first lines and the second lines, and each of the tunnel barrier layer and the intermediate electrode layer overlaps with at least two neighboring intersection regions of the plurality of intersection regions and a region between the two neighboring intersection regions.