Patent ID: 7038603
Filing Date: 2006-05-02
Classification: H01L,H03F,H03G

Abstract:
1. An analog-to-digital converter (ADC), comprising: a signal input node; a signal output node; a plurality N of processing circuits coupled in parallel between said signal input node and a digital encoding logic block, the digital encoding logic block having a plurality N of inputs and an output coupled to said signal output node, said plurality N of processing circuits each having an amplifier circuit coupled between said signal input node and an amplifier output node; and a corresponding plurality N of comparators coupled respectively between said amplifier output nodes and corresponding inputs to the digital encoding logic block, wherein at least one said amplifier circuit includes a transistor having a source, a drain and a floating gate, the source of the transistor electrically coupled to a source of electrical power, the drain of the transistor electrically coupled to said signal output node, and the floating gate of the transistor electrically coupled to said signal input node, and wherein at least one said amplifier circuit includes: a p-channel floating gate transistor having a source, a drain and a floating gate; and an n-channel floating gate transistor having a source, a drain and a floating gate, wherein the source of the p-channel floating gate transistor is electrically coupled to a source of electrical power of a first electrical potential, the source of the n-channel floating gate transistor is electrically coupled to a source of electrical power of a second electrical potential, the drains of the p-channel floating gate transistor and the n-channel floating gate transistor are electrically coupled to said amplifier output node, and the floating gates of the n-channel floating gate transistor and the p-channel floating gate transistor are electrically coupled to said signal input node.