Patent ID: 6413851
Filing Date: 2002-07-02
Classification: H01L

Abstract:
A method of fabrication of solder bumps on a semiconductor wafer provided with metal bond pads comprising the steps of:(a) applying a metal plating buss layer over at least said bond pads; (b) forming a layer of a resist in a predefined pattern defining openings therein over said bond pads; (c) applying a layer of solder-wettable metal into said openings over the plating buss layer; (d) removing a volume of resist from the regions of the openings to create an opening between an edge of the layer of wettable metal and the resist; (e) applying a layer of a barrier metal over the layer of solder-wettable metal including said openings created at step (d) which encapsulates the layer of wettable metal; (f) fabricating a solder bump onto the layer of barrier metal; (g) removing the resist material; and (h) removing any exposed plating buss layer.