Patent ID: 6310571
Filing Date: 2001-10-30
Classification: H03M

Abstract:
A circuit comprising:an analog-to-digital (A/D) converter comprising:a first signal generator for generating a first signal having a plurality of levels;a comparator having a first input terminal connected to receive said first signal, said comparator having a second input terminal connected to receive a plurality of analog input signals, each analog input signal to be converted into a digital value, and a third input terminal for receiving a plurality of input select signals, said comparator including a multiplexer coupling said plurality of analog input signals to a plurality of corresponding input signal paths, said multiplexer selecting one of said plurality of input signal paths based on said plurality of input select signals;a binary signal generator for generating a series of binary signals; anda latch having a first input terminal coupled to receive an output signal of said comparator, said latch having a data input terminal coupled to receive said series of binary signals, an output signal of said comparator controlling when said latch provides an output signal corresponding to a binary signal applied to said data input terminal;wherein said latch provides at least a portion of an N-bit digital code representing at least one of said analog input signals applied to said second input terminal of said comparator.