Patent ID: 6562716
Filing Date: 2003-05-13
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, the method comprising the steps of:forming, on a silicon substrate, a patterned polysilicon film composing a gate electrode and forming, in surface portions of the silicon substrate located on both sides of the polysilicon film, impurity diffused layers each serving as a source or drain region, while forming sidewalls composed of a first insulting film on side surfaces of the polysilicon film on the silicon substrate; removing a surface portion of the polysilicon film to form a depressed portion over the polysilicon film and internally of the sidewalls; forming a cobalt silicide layer in a surface portion of each of the polysilicon film and the impurity diffused layers; forming a liner film composed of a second insulating film such that the liner film extends along an upper surface of the cobalt silicide layers on the polysilicon film, inner and outer wall surfaces of the sidewalls, and an upper surface of the cobalt silicide layer in each of the impurity diffused layers; depositing in interlayer insulating film on the liner film; and performing selective etching with respect to the interlayer insulating film and the liner film to form a contact hole for exposing therein the cobalt silicide layer in each of the impurity diffused layers.