Patent ID: 6562680
Filing Date: 2003-05-13
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising:(a) forming a first gate insulating film, a floating gate silicon film, a second insulating film between gates, and a control gate silicon film in this order on a silicon substrate and forming thereon a third insulating film; (b) etching said films until the silicon substrate is exposed to form a gate electrode and to open regions for a source and a drain; (c) removing a portion of the third insulating film from on at least a portion of a top of the gate electrode while leaving a remaining part of the third insulating film on one top end or both top ends of the gate electrode in the direction of channel length so that the control gate silicon film is only partially exposed at the top of the gate electrode; (d) forming sidewall spacers on sidewalls of the gate electrode and the third insulating film remaining on top of the gate electrode; (e) depositing a refractory metal film; (f) performing a thermal treatment for silicidation of the refractory metal film to form a metal silicide layer on each of the exposed control gate silicon film and the silicon substrate; and providing a device isolation region in the silicon substrate for separating active regions prior to the step (a), wherein the device isolation region on the region for forming the source is removed and a region for forming the metal silicide layer on the control gate silicon film is defined at the same time when the third insulating film is removed in the step (c).