Patent ID: 6583462
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A memory device, comprising:a substrate having a trench, the trench having a lower portion and a side wall; a signal storage node including a refractory metallic storage node conductor disposed in the lower portion of the trench, a doped polycrystalline silicon disposed on the node conductor, a node dielectric, and a collar oxide disposed above the node dielectric, the metallic storage node conductor being isolated from the side wall by the node dielectric; a buried strap coupled to the doped polycrystalline silicon and contacting a portion of the side wall of the trench above the collar oxide; a trench-top dielectric having a trench-top dielectric thickness formed upon the buried strap; and a signal transfer device including: a first diffusion region extending into the substrate adjacent the portion of the trench side wall contacted by the buried strap, a gate insulator having a gate insulator thickness formed on the trench side wall above the buried strap, wherein the gate insulator thickness is less than the trench-top dielectric thickness, and a gate conductor formed within the trench upon the trench-top dielectric and adjacent the gate insulator.