Patent ID: 6432743
Filing Date: 2002-08-13
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:laminating a semiconductor wafer having a plurality of semiconductor elements on a first surface thereof onto a first wafer holding substrate by using a first adhesive go as to contact said first surface to said first wafer holding substrate; grinding a second surface of said semiconductor wafer on which the semiconductor elements are not formed to form a semiconductor wafer of a prescribed thickness; coating a first conductive layer on the whole second surface of said semiconductor wafer; selectively forming a second conductive layer on said first conductive layer in regions aligning to the semiconductor elements formed on said first surface of said semiconductor wafer; laminating a second wafer holding substrate on the first conductive layer and second conductive layer by using a second adhesive; melting the first adhesive to peel off the first wafer holding substrate from the semiconductor wafer and expose the first surface of the semiconductor wafer; selectively etching the semiconductor wafer from the exposed surface so as to be separated into semiconductor elements and partially expose the first conductive layer, evaluating the semiconductor elements so as to be sorted into non-defectives and defectives; selectively etching the exposed portion of the first conductive layer; and removing the second adhesive to peel off the second wafer holding substrate from the first and the second conductive layers.