Patent ID: 6323099
Filing Date: 2001-11-27
Classification: H01L

Abstract:
A method of manufacturing an integrated circuit including an internal de-coupling capacitor, the method comprising:providing an insulative layer;providing a dielectric layer disposed over the insulative layer, the dielectric layer composed of a first dielectric material;providing a first pattern over the dielectric layer;selectively removing a portion of the dielectric layer according to the first pattern, wherein a first aperture and a second aperture are opened in the dielectric layer;forming a first conductive line in the first aperture and forming a second conductive line in the second aperture;removing a portion of the dielectric layer between the first conductive line and the second conductive line, whereby a third aperture is opened between the first conductive line and the second conductive line; andproviding a second dielectric material in the third aperture, whereby the capacitor is formed between the first conductive line and the second conductive line separated by the second dielectric material.