Patent ID: 6661095
Filing Date: 2003-12-09
Classification: H01L

Abstract:
A semiconductor device, comprising:a semiconductor substrate; a resistance element formed above or within said semiconductor substrate; an interlayer insulation film formed on said resistance element a first contact hole penetrating said interlayer insulation film vertically and connected to said resistance element; a second contact hole penetrating said interlayer insulation film vertically and connected to said resistance element; a first interconnection layer formed on said interlayer insulation film and connected to said first contact hole; and a second interconnection layer formed on said interlayer insulation film and connected to said second contact hole; wherein above a region between said first contact hole and said second contact hole, said first interconnection layer and said second interconnection layer are formed not in symmetry to a prescribed plane perpendicular to said semiconductor substrate, but formed as layers of the same thickness at the same height and in point symmetry on a plane parallel to said semiconductor substrate.