Patent ID: 6687728
Filing Date: 2004-02-03
Classification: G06F,G06Q,H04L

Abstract:
An operation apparatus for calculating a remainder R of data Z having Bz bits divided by data I represented by a following equation:I=CQnÂ±1 (M is a number of bits of a basic operational unit; Q is a natural number equal to or more than 2; n is n&gE;M; and C is 1M) the operation apparatus comprising:(1) a data Zl storing region for storing data Zl of lower n bits of the data Z; (2) a data Zh storing region for storing data Zh of higher Bzâˆ’n bits of the data Z; (3) a quotient calculating unit for calculating a quotient q and a remainder r by dividing the data Zh with the data C; and (4) an addition/subtraction unit for calculating the remainder R by adding the remainder r as a basic operational unit higher than the data Zl to the data Zl, and adding/subtracting the quotient q to/from an added result.