Patent ID: 7642633
Filing Date: 2010-01-05
Classification: H01L

Abstract:
1. A semiconductor device comprising: a capsule type semiconductor package including: an interposer substrate having electrodes on a first primary surface and a second primary surface opposing to one another, and also having desired internal electrical connections provided among the electrodes of said both primary surfaces, and a first semiconductor chip having electrodes formed on a front surface thereof and being provided over the first primary surface of the interposer substrate, first bonding wires connecting the electrodes of the first semiconductor chip to the electrodes on the first primary surface of the interposer substrate, and a first resin sealing the first semiconductor chip and the first bonding wires to the first primary surface of the interposer substrate, the first resin having an upper surface parallel to a first primary surface of a main substrate and being in a higher position than the front surface of the first semiconductor chip with respect to the first primary surface of the interposer substrate; a second semiconductor chip having electrodes on a front surface thereof and being provided over the capsule type semiconductor package, the main substrate having electrodes provided on the first primary surface and a second primary surface opposing to each other, and having desired internal electrical connections among the electrodes of said both primary surfaces, the capsule type semiconductor package being so disposed between the main substrate and the second semiconductor chip to electrically connect to a first group of the electrodes on the first primary surface of the main substrate, second bonding wires connecting the electrodes of the second semiconductor chip to a second group of the electrodes on the first primary surface of the main substrate; and a second resin sealing the capsule type semiconductor package, the second semiconductor chip and the second bonding wire to the first primary surface of the main substrate, the second resin having an upper surface in a higher position than the front surface of the second semiconductor chip with respect to the first primary surface of the main substrate, wherein the second semiconductor chip is an uppermost semiconductor chip spaced from the main substrate in the second resin, wherein a distance from a top position of the second bonding wires, which is the farthest position from the first primary surface of the main substrate in a direction vertical to the first primary surface of the main substrate, to the upper surface of the second resin is larger than a distance from a top position of the first bonding wires, which is the farthest position from the first primary surface of the interposer substrate in a direction vertical to the first primary surface of the interposer substrate, to the upper surface of the first resin, wherein the width of the first resin as seen in a cross-sectional view is smaller than a width of the interposer substrate, wherein a plurality of second electrodes are formed around the first resin on the first primary surface of the interposer substrate, and third bonding wires connect the electrodes of the second semiconductor chip to the second electrodes on the first primary surface of the interposer substrate.