Patent ID: 7706116
Filing Date: 2010-04-27
Classification: H02H

Abstract:
1. A solid state power controller trip apparatus with thermal memory, said apparatus comprising: a trip module including a first capacitor, a switch and a counter, wherein when said first capacitor charges to a level greater than set by a reference voltage, multiple times when an overcurrent event occurs, said counter accumulates a count related to said charging of said first capacitor to said level greater than said reference voltage for each of said multiple times, to indicate a temperature increase in a wire for detection of a trip condition and said switch closes to discharge said first capacitor for each of said multiple times; and a discharging module connected to said trip module, said discharging module including a resistor and a second capacitor, wherein an electrical parameter associated with said count decays with time using said resistor and said second capacitor, wherein said electrical parameter controls a pulse rate feeding to a count-down input of said counter, to produce a discharge timing effect in said trip module, wherein said trip apparatus is activated when said counter reaches a predetermined number of counts.