Patent ID: 7178044
Filing Date: 2007-02-13
Classification: G06F,H01L,Y02D

Abstract:
1. A system-on-chip (SoC) comprising: a plurality of blocks, each block including a power control module to selectively control the power dissipated by the block, and a respective power control register to receive power control instructions to selectively control the power control module; and at least one power control unit for writing respective power control instructions into the power control registers of the plurality of blocks, so that the power dissipated by the blocks is controlled individually and independently for each of said plurality of blocks under the centralized control of the at least one power control unit; each block further comprising a power status register to receive status information concerning power control within the respective block, and wherein said at least one power control unit reads the status information from the power status registers of the plurality of blocks; the at least one power control unit defining a master block of the plurality of blocks for reading the status information from said power status registers of the plurality of blocks.