Patent ID: 7586143
Filing Date: 2009-09-08
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first wiring layer formed on a semiconductor substrate; an interlayer insulating film formed on the first wiring layer; a hole having an opening in an upper surface of the interlayer insulating film and formed in the interlayer insulating film; a first metal layer covering an internal surface of the hole; a second metal layer embedded into and filling the hole covered with the first metal layer; a dielectric insulating film formed on the first metal layer, wherein a surface of the dielectric insulating film formed above an area of the hole is higher than a surface of the interlayer insulating film outside of the hole; and a second wiring layer formed on the dielectric insulating film, wherein a capacitor having a lower electrode including the first metal layer covering the internal wall surface of the hole and an upper electrode including an area of the second wiring layer, facing the lower electrode is embedded.