Patent ID: 8835987
Filing Date: 2014-09-16
Classification: H01L

Abstract:
1. An insulated gate bipolar transistor, comprising: a substrate having a first conductivity type; a drift layer on the substrate and having a second conductivity type opposite the first conductivity type; a current suppressing layer on the drift layer, the current suppressing layer having the second conductivity type and having a doping concentration that is larger than a doping concentration of the drift layer; a well region in the current suppressing layer and having the first conductivity type, wherein the well region has a junction depth that is less than a thickness of the current suppressing layer, and wherein the current suppressing layer extends laterally beneath the well region; and an emitter region in the well region and having the second conductivity type; wherein the current suppressing layer has a thickness and doping concentration that are configured to reduce current gain of a bipolar transistor portion of the transistor formed by the well region, the drift layer and the substrate, and thereby enhance carrier accumulation in a channel region of the transistor.