Patent ID: 6642769
Filing Date: 2003-11-04
Classification: H03K

Abstract:
A high speed voltage level shifter with a low input voltage comprising:a first P-type MOS transistor with a gate electrode electrically connected to an output terminal and a source electrode electrically connected to a first voltage level; a second P-type MOS transistor with a gate electrode electrically connected to a drain electrode of the first P-type MOS transistor, a drain electrode used as the output terminal, and a source electrode electrically connected to the first voltage level; a first N-type MOS transistor with a gate electrode electrically connected to a reference voltage level and a drain electrode electrically connected to the drain electrode of the first P-type MOS transistor; a second N-type MOS transistor with a gate electrode electrically connected to the reference voltage level and a drain electrode electrically connected to the output terminal; a third N-type MOS transistor with a gate electrode electrically connected to a second voltage level and a drain electrode electrically connected to a source electrode of the first N-type MOS transistor; a fourth N-type MOS transistor with a gate electrode electrically connected to the second voltage level and a drain electrode electrically connected to a source electrode of the second N-type MOS transistor; a fifth N-type MOS transistor with a gate electrode used as an input terminal, a source electrode grounded, and a drain electrode electrically connected to a source electrode of the third N-type MOS transistor; a sixth N-type MOS transistor with a source electrode grounded and a drain electrode electrically connected to a source electrode of the fourth N-type MOS transistor; and an inverter with an input node electrically connected to the input terminal and an output node electrically connected to a gate electrode of the sixth N-type MOS transistor, wherein: the first voltage level is higher than the second voltage level; the reference voltage level is larger than a threshold voltage of the first N-type MOS transistor and equal to or smaller than a sum of twice of the second voltage level and the threshold voltage of the first N-type MOS transistor; each of the first and second N-type MOS- transistors has an gate oxide layer with a thickness larger than that of an gate oxide layer of each of the third, fourth, fifth, and sixth N-type MOS transistors; and each of the first and second N-type MOS transistors has a threshold voltage larger than that of each of the third, fourth, fifth, and sixth N-type MOS transistors.