Patent ID: 6145027
Filing Date: 2000-11-07
Classification: G06F

Abstract:
A data processing device, comprising:a central processing unit (CPU) operable to execute software instructions stored in a program memory circuit connected to the central processing unit;a data memory circuit operable to store data to be processed by the processing device;a direct memory access (DMA) controller having read address circuitry and write address circuitry, operable to transfer data from or to the data memory circuit, the DMA controller further having DMA interrupt circuitry operable to interrupt the central processing unit;a peripheral device having address generation circuitry, the address generation circuitry operable to provide an address for transferring data to or from the data memory circuit; andauxiliary channel control circuitry operable to transfer a first data word to the data memory circuit from the peripheral device using the address generation circuitry of the peripheral device and to interrupt the central processor using the DMA interrupt circuitry of the DMA controller.