Patent ID: 8298931
Filing Date: 2012-10-30
Classification: H01L

Abstract:
1. A method for fabricating a 3-D monolithic memory device, comprising: first patterning of a first insulating layer, forming a via therein, the first patterning using a first amorphous carbon hard mask, the via extends through at least two levels of the 3-D monolithic memory device, each of the at least two levels includes memory cells, and the via extends down to a landing pad and has a depth of more than 1.5 μm; applying amorphous carbon filling in at least a portion of the via and providing an amorphous carbon layer above the first insulating layer; second patterning of the first insulating layer, using at least the amorphous carbon layer as a second amorphous carbon hard mask, forming a trench in the first insulating layer aligned with the via, the via extends below the trench; and filling the trench and via with a conductive material.