Patent ID: 6579650
Filing Date: 2003-06-17
Classification: G01N

Abstract:
A method for measuring the linearity of a pattern printed on a semiconductor wafer having a photoresist layer into which the pattern is transferred and having at least one layer located beneath the photoresist layer, the pattern having a plurality of pattern features with at least two edges, the method comprising:determining expected pattern edges for each of the plurality of pattern features from a design criteria; formulating measuring patterns on the semiconductor wafer in the at least one layer located beneath the photoresist layer, each measuring pattern corresponding to one of the plurality of pattern features and comprising a series of parallel lines having a pre-determined pitch and oriented at an angle with respect to at least one of the expected pattern edges of the corresponding pattern feature; magnifying the semiconductor wafer; analyzing the magnified semiconductor wafer in a top down view; measuring the number of parallel lines in each measuring pattern which are obscured by one of the at least two edges of the corresponding pattern feature; and deriving the linearity of the pattern based upon the number of obscured parallel lines and the pitch of said parallel lines for each measuring pattern.