Patent ID: 6836842
Filing Date: 2004-12-28
Classification: G06F

Abstract:
A computer-implemented method for run-time reconfiguration of a programmable logic device (PLD) that is coupled to a host data processing arrangement, the host configured with a run-time reconfiguration programming interface, comprising:executing on the host arrangement a run-time reconfiguration program that, via the programming interface, specifies a circuit design, generates configuration data that implements the circuit design on the PLD, and configures the PLD with the configuration data; saving a copy of the configuration data on the host arrangement via the programming interface; activating the PLD; updating selected portions of the configuration data via the programming interface; designating portions of the configuration data changed in the updating step as dirty portions by the programming interface; and automatically selecting the dirty portions of the configuration data by the programming interface for partially reconfiguring the PLD responsive to the run-time reconfiguration program.