Patent ID: 8129798
Filing Date: 2012-03-06
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; an electric circuit comprising a first transistor in a first Fin region on the semiconductor substrate; a power supply circuit in a second Fin region on the semiconductor substrate, the power supply circuit comprising a second transistor connected between the electric circuit and a power supply line, wherein an on/off state of the second transistor controls a total voltage provided to a source of the first transistor, such that when the second transistor is in an on state, voltage from the power supply line is provided to the source of the first transistor, and when the second transistor is in an off state, only a first power supply voltage connected to the source of the first transistor provides voltage to the source of the first transistor; and a substrate contact electrically connected to the semiconductor substrate and configured to apply a substrate voltage to the semiconductor substrate, wherein a Fin width of the first Fin region in a cross section of the first Fin region perpendicular to a channel length direction of the first transistor is equal to or smaller than a twofold of a largest depletion region width of a depletion layer formed in a channel part of the first transistor, and a Fin width of the second Fin region in a cross section of the second Fin region perpendicular to a channel length direction of the second transistor is larger than a twofold of a largest depletion layer width of a depletion layer in a channel part of the second transistor.