Patent ID: 6707159
Filing Date: 2004-03-16
Classification: H01L

Abstract:
A semiconductor chip, comprising:a substrate; at least one internal interconnection connected to the substrate; a surface protective film covering the substrate and partially covering the at least one internal interconnection to form a partially exposed portion of the at least one internal interconnection; a bump electrically connected to the at least one internal interconnection via the partially exposed portion and projecting outwardly from the surface protection film to define a height from the surface protection film; an electrically conductive element; and a surface interconnection integrally formed with the bump and disposed such that at least a portion of the surface protection film is sandwiched between the surface interconnection and the substrate, the surface interconnection extending laterally relative to the bump across the semiconductor chip and outwardly relative to the surface protection film yet positioned below the height of the bump to electrically connect the bump and the electrically conductive element, wherein the electrically conductive element is another at least one internal interconnection.