Patent ID: 6201378
Filing Date: 2001-03-13
Classification: G11C

Abstract:
A semiconductor integrated circuit producing a given output voltage, comprising:a first operational amplifier and a second operational amplifier for detecting a voltage difference between a voltage applied to an input terminal and at least one reference voltage; anda first transistor and a second transistor which are turned ON and turned OFF according to the levels of voltages output from said first and second operational amplifiers;wherein said first operational amplifier receives said output voltage at the input terminal,when the level of the output voltage becomes less than said at least one reference voltage, said first operational amplifier allows said first transistor to operate so as to raise said output voltage; andsaid second operational amplifier receives said output voltage at the input terminal,when the level of said output voltage exceeds said at least one reference voltage, said second operational amplifier allows said second transistor to operate so as to lower said output voltage,wherein said first and second operational amplifiers include a first current mirror circuit and a second current mirror circuit, respectively, and each of said first and second operational amplifiers are connected to a pair of transistors functioning as a differential amplifier, respectively;the reference voltage is applied to a gate of one of said pair of transistors in each of said first and second operational amplifiers, and said output voltage is applied to a gate of the other transistor of said pair of transistors, and the voltage of an output terminal of each of said first and second operational amplifiers is output from a drain of one of said pair of transistors;a gate of said first transistor is connected to said output terminal of said first operational amplifier, and a source and a drain thereof are connected to a first power supply for providing a voltage higher than the reference voltage, and to a common node, respectively;a gate of said second transistor is connected to said output terminal of said second operational amplifier, and a drain of and a source thereof are connected to said common node, and to a second power supply for providing a voltage lower than the reference voltage, respectively; andsaid common node outputs said output voltage, and is connected to a gate of the other transistor of said pair of transistors in each of said first and second operational amplifiers.