Patent ID: 6433419
Filing Date: 2002-08-13
Classification: H01L,H05K

Abstract:
A semiconductor assembly comprising:a) a semiconductor chip having a front surface, a rear surface and contacts on said front surface, said semiconductor chip having a coefficient of thermal expansion; b) a substrate adapted to physically support the chip and electrically interconnect the chip with other elements of a circuit, said substrate having a set of contact pads thereon, said substrate having a coefficient of thermal expansion, said semiconductor chip overlying said substrate so that said chip overlies at least some of said contact pads of said set and so that said rear surface of said chip faces toward said substrate and said contact pads; c) a backing element having electrically conductive terminals and electrically conductive lead portions electrically connected to said terminals and to said contacts on said chip, said backing element having a central region aligned with said chip and disposed between said rear surface of said chip and said substrate, said terminals of said backing element being bonded to said contact pads on said substrate, at least some of said terminals of said backing element being disposed in said central region of said backing element and being movable with respect to the chip to compensate for differential thermal expansion of the chip and substrate.