Patent ID: 7684230
Filing Date: 2010-03-23
Classification: G11C

Abstract:
1. A semiconductor memory device comprising: a memory cell including a flip-flop; and a memory cell power supply circuit for supplying a cell power supply voltage to the memory cell, wherein: the memory cell power supply circuit supplies a cell power supply voltage in a first period and a different cell power supply voltage in a second period; the memory cell power supply circuit supplies a predetermined first power supply voltage in a first case where the cell power supply voltage is supplied in a data read cycle and in a second case where data is not written to a memory cell to which the cell power supply voltage is supplied in a write cycle; the memory cell power supply circuit supplies a second power supply voltage lower than the first power supply voltage in a third case where data is written to a memory cell to which the cell power supply voltage is supplied in a write cycle, the memory cell power supply circuit outputs the second power supply voltage by dividing a predetermined voltage; the memory cell power supply circuit includes a first transistor, a second transistor, and a third transistor; the first transistor has a predetermined driving capability, and outputs the first power supply voltage; a voltage divided by the first transistor and the second transistor is output as the second power supply voltage; the first transistor and the second transistor have the same polarity as a load transistor of the flip-flop; and the third transistor supplies the first power supply voltage to the memory cell in the first case and the second case.