Patent ID: 9006730
Filing Date: 2015-04-14
Classification: H01L

Abstract:
1. A metal oxide semiconductor structure, comprising: a substrate; a gate electrode, being made of metal and deposited on said substrate, for coupling to a gate driving signal; a gate insulation layer, being an insulation layer deposited over said gate electrode and said substrate; an IGZO layer, being an In—Ga—Zn—O layer deposited on said gate insulation layer, for functioning as a channel; a source electrode, being made of metal and deposited at one side of said IGZO layer, for coupling to a source driving signal; a drain electrode, being made of metal and deposited at another side of said IGZO layer, for coupling to a pixel electrode; a first passivation layer, being a first silicon compound layer deposited over said source electrode, said IGZO layer, and said drain electrode; a second passivation layer, being a second silicon compound layer, the second silicon layer is a single continuous layer deposited over and completely covering an upper surface of said first passivation layer, said first silicon compound layer and said second silicon compound layer are different compounds; and a resin layer, said resin layer being an opaque resin layer deposited over and directly connected to said source electrode, said first passivation layer, said second passivation layer, and said drain electrode.