Patent ID: 6148043
Filing Date: 2000-11-14
Classification: G11B,H03M

Abstract:
A Viterbi decoder, comprising:calculation circuit means for calculating a plurality of branch metric values using a sample value of a reproduction signal and each of a plurality of reference levels;selection circuit means for selecting a particular value from sum data of said plurality of branch metric values output by said calculation circuit means and a plurality of path metric values corresponding to said plurality of branch metric values;metric memory means for storing the particular value selected by said selection circuit means as one of said plurality of path metric values: andpath memory means for storing path data according to selection made by said selection circuit means,wherein said calculation circuit means calculates said plurality of branch metric values by squaring a difference between said sample value and said each of said plurality of reference levels and subtracting a square of said sample value plus a predetermined constant from the squared difference.