Patent ID: 7821008
Filing Date: 2010-10-26
Classification: H01L

Abstract:
1. A semiconductor device comprising: an n-channel TFT and a p-channel TFT formed over a substrate, each of the n-channel TFT and the p-channel TFT having a semiconductor layer including a channel forming region, a source region, a drain region, and a gettering region which are located on an insulating film, a gate insulating film located on the semiconductor layer, and a gate electrode located on the gate insulating film, wherein the gettering region is formed outside a region to which either one of electrons and holes move in the source region and the drain region, wherein the gettering region contains an n-type impurity element and a p-type impurity element, wherein a concentration of the n-type impurity element in the gettering region of the p-channel TFT is the same as a concentration of an n-type impurity element in the source region or the drain region of the n-channel TFT, and wherein a concentration of the p-type impurity element in the gettering region of the n-channel TFT is the same as a concentration of a p-type impurity element in the source region or the drain region of the p-channel TFT.