Patent ID: 7663857
Filing Date: 2010-02-16
Classification: F23Q,H01L

Abstract:
1. A load driver circuit controlling a current that flows in a load, the load driver circuit comprising: a switch portion including a semiconductor switching element that controls the current; and a control circuit portion having an input terminal, a ground terminal, a control circuit that outputs a control signal driving the semiconductor switching element on the basis of a drive signal input from the input terminal, and a protection circuit for protecting the control circuit from a surge current, wherein the protection circuit is disposed between the input terminal and the ground terminal, the protection circuit constituted by a reverse transistor system including one or more transistors each having an emitter connected to the input terminal side and a collector connected to the ground terminal, each of the one or more transistors having a base electrically connected to the collector such that the base and the collector have the same potential, wherein the one or more transistors include: a collector layer of a first conductivity type formed on a substrate, the collector layer constituting one or more collectors associated respectively with the one or more transistors; one or more base layers of a second conductivity type arranged side by side in a longitudinal direction, the one or more base layers having a stripe shape, the one or more base layers constituting one or more bases associated respectively with the one or more transistors; and one or more emitter layers of the first conductivity type arranged side by side in the longitudinal direction, the one or more emitter layers having a stripe shape, the one or more emitter layers constituting one or more emitters associated respectively with the one or more transistors, the one or more emitter layers formed within the one or more base layers, and wherein the one or more transistors further includes: one or more emitter wiring patterns connected respectively to the one or more emitter layers; one or more base wiring patterns connected to the plural base layers, respectively; one or more collector wiring patterns connected to portions of the collector layer which are adjacent to the one or more base layers; a first common wiring connecting the one or more emitter wiring patterns together; and a second common wiring connecting the one or more base wiring patterns and the one or more of collector wiring patterns together, wherein the first common wiring and the second common wiring are symmetrically disposed at both ends of the one or more base layers and the one or more emitter layers in the longitudinal direction across the one or more base layers and the one or more emitter layers, wherein the one or more emitter wiring patterns extend from the first common wiring along a direction perpendicular to the longitudinal direction and project from the first common wiring in a comb shape having spaces, and wherein the one or more of base wiring patterns and the one or more collector wiring patterns extend from the second common wiring along the direction perpendicular to the longitudinal direction from an opposite side and project from the first common wiring in the comb shape into the spaces.