Patent ID: 6346029
Filing Date: 2002-02-12
Classification: B24B,G11B

Abstract:
A method for lapping sliders in a foremost slider row in a wafer quadrant against a lapping surface, the method comprising:bonding the wafer quadrant onto an extender tool; mounting said extender tool in a carrier assembly; positioning the carrier assembly such that the foremost slider row is brought into suitable contact with said lapping surface to initiate lapping; the foremost slider row, said extender tool, and said carrier assembly all having left and right orientations defined such that the foremost slider row has a left end and a right end, and said extender tool has a left edge and a right edge, and said carrier assembly has a left side and a right side; and compensating for non-linear distortion in the foremost slider row by: applying a left balance pressure on said left side and a right balance pressure on said right side of said carrier assembly such that pressures on said left end and said right end of the foremost slider row are selectively controllable; and distorting said extender tool artificially with a first lateral force applied proximate to said left edge of said extender tool and directly applied substantially in parallel with the lapping surface a second lateral force applied proximate to said right edge of said extender tool and directly applied substantially in parallel with the lapping surface; monitoring the progress of lapping of the foremost slider row; and adjusting said left balance pressure, said right balance pressure, said first lateral force, and said second lateral force actively to dynamically compensate for said non-linear distortion in the foremost slider row as lapping progresses.