Patent ID: 6535045
Filing Date: 2003-03-18
Classification: G06F

Abstract:
Integrated circuit interconnect circuitry comprising:a transmitter circuit comprising, a first flip-flop circuit adapted to receive a first input signal, a second flip-flop circuit adapted to receive a second input signal, and logic circuitry coupled to the first and second flip-flop circuits to transmit an interconnect signal comprising the first and second input signals on an interconnect line, the interconnect signal comprising the first input signal while a clock signal is in a first state and the second input signal while the clock signal is in a second state; and a receiver circuit coupled to the interconnect line comprising, a third flip-flop circuit adapted to receive the interconnect signal and provide a first output signal corresponding to the first input signal, and a fourth flip-flop circuit adapted to receive the interconnect signal and provide a second output signal corresponding to the second input signal.