Patent ID: 7705468
Filing Date: 2010-04-27
Classification: H01L

Abstract:
1. A stacked semiconductor package comprising: a substrate having first contact pads and second contact pads; a first stacked package group disposed on the substrate and comprising a plurality of first semiconductor chips, each first semiconductor chip having a plurality of first edge bonding pads formed on a first edge of an upper surface of the semiconductor chip, wherein the first semiconductor chips are stacked such that the first semiconductor chips overlap in a stair form to expose the first edge bonding pads; first conductive wires electrically coupling the first edge bonding pads and the first contact pads; an adhesive member disposed on an uppermost first semiconductor chip; a second stacked package group disposed on the adhesive member and comprising second semiconductor chips having a plurality of second edge bonding pads formed on a second edge of an upper surface of the second semiconductor chips, wherein the second semiconductor chips are stacked to overlap in a stair form to expose the second edge bonding pads; wherein a lowermost second semiconductor chip is aligned with the uppermost first semiconductor chip; and second conductive wires electrically coupling the second edge bonding pads and the second contact pads.