Patent ID: 7696775
Filing Date: 2010-04-13
Classification: G11C,H03K,H04L

Abstract:
1. An output driver, located in a chip, having an output end for outputting an output signal comprising: an output data generator, for generating an output data signal; an output stage, having a plurality of logic elements and a cascade of MOS transistors that are electrically coupled to the output data generator, for generating the output signal according to the output data signal, and receiving a first control signal to adjust an impedance of the output stage; an impedance unit, electrically coupled between the output stage and the output end and having a plurality of MOS transistors connected in parallel, for receiving a second control signal to adjust an impedance of the impedance unit; and a calibration circuit, electrically coupled to the output stage and the impedance unit, the calibration circuit having two groups of control signals, wherein the first group of control signals are electrically connected to the logic elements for controlling a number of electrically connected MOS transistors of the output stage, wherein the second group of control signals are connected to the plurality of MOS transistors of the impedance unit, to control the output stage and the impedance unit such that a sum of impedances of the output stage and the impedance unit is adjusted to compensate an environment factor of the chip.