Patent ID: 8551844
Filing Date: 2013-10-08
Classification: H01L

Abstract:
1. A method of forming a semiconductor construction, comprising: forming a first electrically insulative material to extend across a memory region of a semiconductor substrate, and to extend across a peripheral region of the substrate adjacent the memory region; a plurality of spaced-apart electrically conductive structures being within the memory region, and being covered with electrically insulative caps; the first electrically insulative material extending over the caps; the first electrically insulative material being at a first level over the memory region and dropping to a second level, below the first level, over the peripheral region; forming a second electrically insulative material over the first electrically insulative material, with the second electrically insulative material having a different composition from the first electrically insulative material; the second electrically insulative material forming a structure having a higher portion over the memory region, and having a lower portion over the peripheral region; forming a third material over the second electrically insulative material; removing the third material from over the higher portion of the second electrically insulative structure to expose said higher portion while leaving the third material over the lower portion of the second electrically insulative material structure; removing the exposed higher portion of the second electrically insulative material structure while protecting the lower portion with the third material; and after removing the exposed higher portion, removing the first electrically insulative material from over the caps while removing the third material from over the lower portion of the second electrically insulative material structure.