Patent ID: 6699746
Filing Date: 2004-03-02
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, comprising the steps of:forming a first insulating film on a semiconductor substrate having a cell region and a peripheral circuit region, each region having a gate electrode formed thereon; forming an LDD region on the semiconductor substrate at both sides of the gate electrode; forming a first interlayer insulating film on the entire surface of the resultant structure; forming a first insulating film spacer on the sidewalls of the gate electrode in the cell region by etching the first interlayer insulating film and the first insulating film in the cell region using a contact mask exposing a bit line and storage electrode contact region as an etching mask; forming a conductive layer electrically connected to the exposed bit line and storage electrode contact region; removing the first interlayer insulating film in the peripheral circuit region; forming a second insulating film on the entire surface of the resultant structure; forming a second insulating film spacer on the sidewalls of the gate electrode in the peripheral circuit region by etching the second insulating film and the first insulating film; forming a source/drain region by ion-implanting a high concentration impurity into the semiconductor substrate at both sides of the second insulating film spacer; forming a second interlayer insulating film on the entire surface of the resultant structure; and forming a contact plug by planarizing the second interlayer insulating film, the first interlayer insulating film and the conductive layer.