Patent ID: 9209688
Filing Date: 2015-12-08
Classification: H02M,Y02B

Abstract:
1. An electronically-implemented method of current limiting, the method comprising: sampling a signal associated with an inductor current of a switching regulator to generate a sampled level, wherein timing of sampling is performed relative to one of switching on or off of a transistor configured to pass current through an inductor to a load, and wherein said sampling is performed while current flowing through the inductor is increasing; adjusting a current limit threshold based at least partly on a comparison between the sampled level and a reference level; comparing the signal to the current limit threshold using a current limiting comparator; generating a control signal based on a node in a signal path between the current limiting comparator and a control terminal of the transistor, wherein there is at least one intervening circuit element between the current limiting comparator and the node in the signal path, and wherein said sampling occurs when the control signal is asserted; and limiting an output current of the switching regulator based at least partly on said comparing.