Patent ID: 6154097
Filing Date: 2000-11-28
Classification: H03L

Abstract:
A phase locked loop (PLL) oscillating circuit comprising:a first oscillating circuit which generates an oscillation signal with a first frequency, and controls said first frequency based on a reference signal;a lock detector for detecting phase lock between said oscillation signal and said reference signal to provide a lock detection signal; anda reference oscillating circuit which includes,a crystal oscillation element,an oscillating circuit, coupled to the crystal oscillation element, for oscillating to generate a first signal,a frequency divider for dividing said first signal in frequency to generate said reference signal, anda control circuit for controlling said oscillating circuit in response to a start signal to oscillate with a first transconductance and for controlling said oscillating circuit in response to said lock detection signal to oscillate with a second transconductance which is smaller than said first transconductance, such that an oscillation state of said reference oscillating circuit is controlled based on said lock detection signal.