Patent ID: 6174796
Filing Date: 2001-01-16
Classification: H01L

Abstract:
A semiconductor device manufacturing method comprising the steps of:forming a wiring on a first insulating film which is formed on a semiconductor substrate;forming a second insulating film for covering the wiring;forming a third insulating film, which is made of material different from the second insulating film, on the second insulating film;coating a resist on the third insulating film, and then forming an opening over the wiring by exposing and developing the resist;forming a hole or groove in the third insulating film by etching the third insulating film via the opening with a reactive ion etching method;removing the resist;forming an inclined surface by etching an upper edge portion of the third insulating film around the hole or groove to thus extend an upper portion of the hole or groove;after forming the inclined surface, removing a part of the second insulating film via the hole or groove by the reactive ion etching method; andforming a metal film in the hole or groove.