Patent ID: 8686785
Filing Date: 2014-04-01
Classification: H03K

Abstract:
1. A level shifter comprising: a first resistor having a first end connected to a power source of the level shifter; a first n-type MOSFET having a drain connected to a second end of the first resistor and a source connected to the ground; a second resistor having the same resistance as the first resistor and having a first end connected to the power source; a second n-type MOSFET having a drain connected to a second end of the second resistor and a source connected to the ground; a pulse generator configured to control ON/OFF of the first and second n-type MOSFETs according to an input signal; a controller configured to generate a set signal when the first n-type MOSFET is ON, the controller including: a third resistor having a first end connected to the power source of the level shifter; a third n-type MOSFET having a drain connected to a second end of the third resistor and a set terminal of the flip-flop, a source connected to the drain of the first n-type MOSFET, and a gate connected to the drain of the second n-type MOSFET; a fourth resistor having the same resistance as the third resistor and having a first end connected to the power source of the level shifter; and a fourth n-type MOSFET having a drain connected to a second end of the fourth resistor and a reset terminal of the flip-flop, a source connected to the drain of the second n-type MOSFET, and a gate connected to the drain of the first n-type MOSFET; a flip-flop providing an output signal that is a level-shifted signal of the input signal to operate a switching element according to the set and reset signals generated by the controller; and a switching operation controller configured to detect when reference potential of the level shifter at a negative electrode of the power source decreases to negative and stop the operation of the switching element, the switching operation controller including: wherein according to the output from the second inverter, the set signal stops the operation of the switching element when the voltage across one of the third and fourth resistors is greater than the voltage difference between the power source potential and the first threshold and smaller than a voltage difference between the power source potential and the second threshold.