Patent ID: 8145928
Filing Date: 2012-03-27
Classification: G06F,Y02D

Abstract:
1. A data processing system on a monolithic semiconductor substrate which provides a system on a chip (SOC), the data processing system comprising: a general purpose processing unit; a graphics processing unit; at least one peripheral interface controller; at least one bus coupled to the general purpose processing unit, the graphics processing unit, and the at least one peripheral interface controller; a power controller coupled to at least the general purpose processing unit and the graphics processing unit, the power controller being configured to turn power off for the general purpose processing unit in response to a first state of an instruction queue of the general purpose processing unit, and the power controller being configured to turn power off for the graphics processing unit in response to a second state of an instruction queue of the graphics processing unit, wherein the first state and the second state represent an instruction queue having either no instructions or instructions for only future events or actions and wherein the graphics processing unit has its power turned off while an image, generated by the graphics processing unit, is being displayed by the data processing system, and wherein a software driver of the graphics processing unit provides, in response to the second state, a message, representing the second state, to the general purpose processing unit and the general purpose processing unit, in response to the message, causes the power controller to turn power off for the graphics processing unit, and wherein power for the graphics processing unit is turned off without using a timer to time a duration of non-use of the graphics processing unit.