Patent ID: 6747295
Filing Date: 2004-06-08
Classification: H01L

Abstract:
A semiconductor device with a trench gate, comprising:a first base layer of a first conductivity type; a collector layer of a second conductivity type disposed on the first base layer; a plurality of trenches disposed in the first base layer at intervals to partition a first main cell, a first dummy cell, a second main cell, and a second dummy cell in this order, at a position remote from the collector layer; a second base layer of the second conductivity type disposed on the first base layer in each of the first and second main cells; an emitter layer of the first conductivity type disposed on the second base layer; a guard layer of the second conductivity type disposed on the first base layer in each of the first and second dummy cells; a gate electrode disposed in each of the trenches to face, through a gate insulating film, a portion of the second base layer sandwiched between the first base layer and the emitter layer; a collector electrode disposed on the collector layer; an emitter electrode disposed on the second base layer and the emitter layer; and an insulating layer disposed on the guard layer and configured to prevent an electric current from flowing from the first base layer through the guard layer to the emitter electrode in an ON state of the device, wherein each of the first and second main cells forms a current passage narrow enough to provide, in an on-state of the device, an increase in resistance against flow of carriers of the second conductivity type from the first base layer into the emitter electrode through the second base layer, thereby improving injection efficiency of carriers of the first conductivity type from the emitter layer into the first base layer, and at least one of the first and second dummy cells comprises a deep guard layer as the guard layer, which has a resistivity lower than that of the second base layer, and is formed to at least a depth near bottom portions of the trenches, such that the first base layer and the deep guard layer form a pn-junction.