Patent ID: 6140176
Filing Date: 2000-10-31
Classification: H01L

Abstract:
A method of fabricating a self-aligned node contact window, wherein a substrate having a transistor is provided and the transistor includes a first source/drain region and a second source/drain region, the method comprising:forming a bit line coupled electrically with the first source/drain region of the transistor, wherein the bit line has a sidewall, and a cap layer and a first conductive layer are formed on the bit line;forming an insulating layer conformal to a structure comprising the bit line, the cap layer and the first conductive layer;forming a conductive spacer on the insulating layer of the sidewall of the bit line, the cap layer and the first conductive layer; andforming the self-aligned node contact window by using the first conductive layer and the conductive spacer as a mask to perform an etching process to expose the second source/drain region.