Patent ID: 8962426
Filing Date: 2015-02-24
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: providing a semiconductor layer of a first conductivity type; forming a semiconductor layer of a second conductivity type on the semiconductor layer of the first conductivity type; forming an insulator layer on the semiconductor layer of the second conductivity type; etching one or more trenches into at least the semiconductor layer of the second conductivity type; forming a second insulator layer in the one or more trenches; implanting ions into the second insulator layer; forming a third insulator layer, thereby filling at least a portion of the one or more trenches; etching an additional trench into at least the semiconductor layer of the second conductivity type; forming a gate oxide layer in the additional trench; forming a gate material in the additional trench; forming one or more device regions; forming a source metal layer; wherein the ions comprise cesium ions; and further comprising performing a thermal treatment to anneal the cesium ions.