Patent ID: 8255610
Filing Date: 2012-08-28
Classification: G11C,H03K

Abstract:
1. Crossbar circuitry for interconnecting a plurality of source circuits and a plurality of destination circuits such that data input to the crossbar circuitry from any of said plurality of source circuits can be output to any of said plurality of destination circuits, the crossbar circuitry comprising: a plurality of data input paths passing through said crossbar circuitry, each data input path being connectable to one of said plurality of source circuits and providing a plurality of word lines; a plurality of data output paths passing through said crossbar circuitry transverse to the plurality of data input paths, each data output path being connectable to one of said plurality of destination circuits and providing a plurality of bitlines; and a crossbar cell associated with each intersection between one of said data input paths and one of said data output paths, each crossbar cell comprising: the crossbar circuitry further comprising arbitration circuitry configured, in an arbitration mode of operation, to perform an arbitration process to detect the presence of multiple asserted transmission requests for said same data output path, and in the event of such multiple asserted transmission requests to implement a predetermined priority scheme to select a winning transmission request from amongst said subset of said multiple asserted transmission requests to cause the configuration storage circuitry of only one crossbar cell associated with said same data output path to have its routing value programmed to said first value, thereby resolving conflict between said multiple asserted transmission requests according to said predetermined priority scheme and allowing said winning transmission request to proceed.