Patent ID: 6643785
Filing Date: 2003-11-04
Classification: G06F

Abstract:
An interruption control circuit comprising:a group of key matrices, each having keys and designed to generate different voltages when the keys are operated; an analog-to-digital converter section for converting the voltages applied from the key matrices to digital data; a control section designed to activate the analog-to-digital converter section in a normal mode, deactivate the same in an idle mode, stop operating in the idle mode, and determine, in the normal mode, which key of any key matrix has been pushed, from the digital data supplied from the analog-to-digital converter section; a plurality of buffer circuits for receiving the voltages applied from the key matrices, respectively, each buffer circuit having a threshold voltage and designed to output a first-level signal when the voltage is equal to or higher than the threshold voltage and to output a second-level signal when the voltage is lower than the threshold voltage; a logic circuit for receiving signals output from the buffer circuits and generating a detection signal when the signal output from any one of the buffer circuits changes; and an interrupt-signal generating circuit connected to the logic circuit, for generating a signal for releasing the idle mode and supplying the same to the control circuit when the logic circuit generates the detection signal.