Patent ID: 6772322
Filing Date: 2004-08-03
Classification: G06F

Abstract:
An apparatus to monitor performance of a processor, comprising:a performance specifier to specify a performance data corresponding to the performance, the performance data including an event and an instruction causing the event; a tag generator coupled to the performance specifier to generate a performance tag associated with the instruction, the performance tag being stored in a storage; and a retirement performance monitor coupled to the storage to extract the performance tag when the instruction is retired, wherein the retired instruction is one of correctly or incorrectly predicted, and a bogus tag is associated with the retired instruction to indicate whether the retired instruction was correctly or incorrectly predicted and if the retired instruction was incorrectly predicted the retired instruction is a bogus instruction; wherein only the performance tag associated with the bogus instruction is reported to a performance counter coupled to the retirement performance monitor to count the performance tag such that performance data is counted.