Patent ID: 6741118
Filing Date: 2004-05-25
Classification: H02M

Abstract:
A semiconductor integrated circuit device comprising:a charge pump circuit for outputting a predetermined negative voltage to a negative voltage node; a voltage detection circuit for generating a first detection signal when the voltage of the negative voltage node has reached a first detection voltage and for generating a second detection signal when the voltage of the negative voltage node has reached second detection voltage; an oscillator that is driven in response to the first detection signal so as to generate a signal for driving the charge pump circuit; and a negative voltage raising circuit that has an output terminal connected to the negative voltage node, and that is driven in response to the second detection signal so as to raise the voltage of the negative voltage node through the output of its output terminal; wherein the voltage detection circuit comprises: a first comparison voltage generating circuit for outputting a first comparison voltage and a second comparison voltage in response to the voltage of the negative voltage node; a reference voltage generating circuit for outputting a reference voltage; a first amplifier for comparing the reference voltage and the first comparison voltage and amplifying the voltage difference between them to generate the first detection signal; and a second amplifier for comparing the reference voltage and the second comparison voltage and amplifying the voltage difference between them to generate the second detection signal.