Patent ID: 6658368
Filing Date: 2003-12-02
Classification: G01R,G06F,H03M

Abstract:
Circuitry for generating a histogram of output codes produced by an analog/digital converter (ADC) on an integrated circuit chip, the ADC producing the output codes at an output rate determined by a clock signal coupled to the ADC, responsive to an input signal applied to the ADC, the circuitry comprising:a comparator, disposed on the chip together with the ADC, and comprising: a first input coupled to receive the output codes from the ADC; a second input coupled to receive a sequence of target codes covering at least a portion of a range of the output codes; and an output, configured to assume a first state whenever the output and target codes are equal, and a second state when they are not equal; and a pulse generator, disposed on the chip together with the ADC and the comparator, and coupled to receive the output of the comparator and, when the output is in the first state, to generate pulses for output from the chip at a pulse rate determined by the clock signal.