Patent ID: 8698555
Filing Date: 2014-04-15
Classification: H03F,H03G

Abstract:
1. An apparatus comprising: an amplifier having an input node and an output node, wherein the amplifier is configured to receive an asymmetric signal; a first resistance connected between (i) the input node of the amplifier and (ii) the output node of the amplifier, wherein the input node of the amplifier is configured to receive the asymmetric signal; a second resistance connected to the input node of the amplifier, wherein the second resistance comprises a linear resistor; and a third resistance connected to the second resistance, wherein a resistance of the third resistance is adjustable to (i) adjust an amount of asymmetric correction provided by the amplifier, and (ii) correct, based on the amount of asymmetric correction, the asymmetric signal at the output node of the amplifier, and wherein the amount of asymmetric correction is a function of (i) the first resistance, and (ii) a combination of the second resistance and the third resistance, wherein the third resistance comprises (i) a fourth resistance configured to receive a first input voltage, and (ii) a fifth resistance configured to receive a second input voltage.