Patent ID: 6253291
Filing Date: 2001-06-26
Classification: G06F

Abstract:
A method for maintaining consistency between a plurality of copies of data which may exist in various locations in a computer system having an inclusive asynchronous memory architecture with a plurality of processors connected to a common system bus for processing requests that contain coherence transaction information, the method comprising:maintaining a copy of all the data found in a plurality of caches associated with a local processor of a plurality of processors in one of the plurality of caches associated with the local processor;receiving snoop requests from the plurality of processors other than local processor into a FIFO buffer associated with the local processor through the common system bus;filtering out all snoop requests that are not related to the data associated with the local processor;relaying related snoop read requests from the cache address tag directory to a first queue;dispatching related snoop write requests from the cache address tag directory to a FIFO queue;forwarding local processor requests to the FIFO queue; andprocessing all requests in the first queue with a processing constraint not to process a particular request stored in the first queue if any given request stored in the FIFO queue references the same memory location as does the particular request and the given request was received before the request in the first queue.