Patent ID: 6433983
Filing Date: 2002-08-13
Classification: H01L

Abstract:
A CMOS buffer having a power supply terminal, a ground terminal, an input terminal and an output terminal, the CMOS buffer comprising:a first p-channel transistor having a source, a drain, a gate, and a body, the source of the first p-channel transistor is coupled to the power supply terminal, the gate of the first p-channel transistor is controlled by the input terminal of the CMOS buffer; a first n-channel transistor having a source, a drain, a gate, and a body, the source of the first n-channel transistor is coupled to the ground terminal of the CMOS buffer, the gate of the first n-channel transistor is controlled by the input terminal of the CMOS buffer, and the drain of the first n-channel transistor is coupled to the drain of the first p-channel transistor and further coupled to the output terminal of the CMOS buffer; first coupling means for coupling the body of the first p-channel transistor to the output terminal of the CMOS buffer when the gate of the first p-channel transistor is low, and for coupling the body of the first p-channel transistor to the power supply terminal of the CMOS buffer when the gate of the first p-channel transistor is high; and second coupling means for coupling the body of the first n-channel transistor to the output terminal of the CMOS buffer when the gate of the first n-channel transistor is high, and for coupling the body of the first n-channel transistor to the ground terminal of the CMOS buffer when the gate of the first n-channel transistor is low.