Patent ID: 6272452
Filing Date: 2001-08-07
Classification: G06F

Abstract:
A universal asynchronous receiver transmitter (UART) emulation stage for modem communication comprising:a digital signal processor containing a software UART control program for sending UART control signals over a bus and for communicating to a modem application interface program that is under control of a host processor;UART emulation circuitry operatively coupled to the digital signal processor via the bus and responsive to the control signals from the digital signal processor based software UART control program, including at least dedicated transmit and receive FIFO buffer memory for storing modem data and programmable interrupt generation logic controllable by the digital signal processor, to generate an interrupt for the digital signal processor when the receive FIFO buffer memory is at a predetermined threshold; and further includes programmable control logic for facilitating host processor interrupt pacing to facilitate overriding of the interrupt from the UART emulation circuitry to the host processor due to write bursts from the digital signal processor.