Patent ID: 9123577
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A method of fabricating non-volatile storage, comprising: forming a plurality of layer stack columns over a substrate and a plurality of isolation trenches in the substrate separating adjacent active areas, each active area of the substrate underlying one layer stack column, each layer stack column having a strip of charge storage material separated from the substrate by a strip of dielectric material; forming a first sacrificial film at least partially in the plurality of isolation trenches and a second sacrificial film over the first sacrificial film at least partially between adjacent layer stack columns, the first sacrificial film having a first etch rate and the second sacrificial film having a second etch rate that is lower than the first etch rate; etching back the second sacrificial film; forming an intermediate dielectric layer and a control gate layer after etching back the second sacrificial film; and etching orthogonally to the layer stack columns to form a plurality of layer stack rows, each layer stack row including a control gate etched from the control gate layer that extends over a row of charge storage regions from the strips of charge storage material; wherein etching orthogonally to the layer stack columns includes removing at least a portion of the first sacrificial film to form a bit line air gap at least partially in each isolation trench.