Patent ID: 6969653
Filing Date: 2005-11-29
Classification: H01L

Abstract:
1. A method for manufacturing a flash memory device, the method comprising: forming a tunnel oxide layer on a semiconductor substrate; forming a floating gate on the tunnel oxide layer; forming a source/drain region at both sides of the floating gate by implanting ions into the semiconductor substrate including the floating gate; forming spacers on sidewalls of the floating gate; depositing a sacrificial layer on the resulting substrate; exposing some part of the substrate and the floating gate by removing some part of the sacrificial layer and the tunnel oxide layer; forming a first trench on the exposed part of the substrate and a second trench on the exposed part of the floating gate; depositing an oxide layer to fill the first and second trenches with the oxide layer; removing the oxide layer and the sacrificial layer until the floating gate is exposed; removing the spacers and the remaining sacrificial layer to form a floating gate with the second trench and a trench-type device isolation layer; and depositing a gate insulating layer and a second polysilicon layer for a control gate on the resulting substrate.