Patent ID: 6707135
Filing Date: 2004-03-16
Classification: H01L,Y10T

Abstract:
A semiconductor device comprising:a leadframe comprising a chip mount pad and a plurality of support members, each attached internally to the perimeter of said pad and externally to said leadframe; said leadframe further comprising lead segments arranged in alternating order into first and second pluralities, said segments having their inner tips near said mount pad and their outer tips remote from said mount pad, said outer tips having a solderable surface; said leadframe mount pad, support members, and inner tips being substantially in one plane; all said outer tips bent away from said plane into the direction towards the intended attachment locations on an outside part such that said first segment plurality forms an angle of about 70Â±1Â° from said plane and said second segment plurality forms an angle of about 75Â±1Â° from said plane, whereby said outer tips create a staggered lead pattern suitable for solder attachment to an outside part; an integrated circuit chip, having an active and a passive surface, said passive surface attached to said mount pad; conductors interconnecting said active chip surface and said inner tips of said lead segments; and encapsulation material surrounding said chip, said conductors, and said inner segment tips, while leaving said outer segment tips exposed, whereby said outer segment tips are suitable for solder attachment to an outside part.