Patent ID: 6429476
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A semiconductor integrated circuit device comprising:memory cells, which are located at the intersections of word lines that extend in a first direction of the major surface of a semiconductor substrate and bit lines that extend in a second direction that intersects the first direction at a right angle, and which include; a memory-cell-selecting MISFET with a gate electrode that is configured in a single unit with the word line; and a data-storage capacitor connected to the MISFET in series; characterized in that the bit lines are formed over the memory-cell-selecting MISFET via a first insulating film and the data-storage capacitor is formed over the bit lines via a second insulating film; wherein the bit lines are made of a first conductive film made of molybdenum or a molybdenum compound and a second conductive film made of tungsten that is deposited on the first conductive film.