Patent ID: 9105468
Filing Date: 2015-08-11
Classification: G11C,H01L

Abstract:
1. A non-volatile storage system, comprising: a substrate that extends horizontally; a three dimensional memory array of memory cells; a plurality of word lines coupled to the memory cells; a plurality of global bit lines; a plurality of vertically oriented bit lines coupled to the memory cells, wherein the vertically oriented bit lines are oriented vertically with respect to the substrate; a plurality of vertically oriented thin film transistor (TFT) select devices between the substrate and the three dimensional memory array, wherein the vertically oriented TFTs are oriented vertically with respect to the substrate, wherein each of the vertically oriented TFT select devices is located between an associated vertically oriented bit line of the plurality of vertically oriented bit lines and an associated global bit lines of the plurality of global bit lines; each of the vertically oriented TFT select devices comprising: a plurality of select lines, wherein each of the select lines is coupled to the gates of a group of the plurality of vertically oriented TFTs; and a plurality of select line drivers associated with the plurality of select lines, wherein each of the select line drivers is configured to apply a signal to its associated select line to cause a given vertically oriented TFT select device to connect or disconnect its associated vertically oriented bit line to or from its associated global bit line.