Patent ID: 8928707
Filing Date: 2015-01-06
Classification: G09G

Abstract:
1. A liquid crystal display device, characterized in that: comprising: a scan driving module for generating a first scan signal; a data driving module for generating a gray scale signal; pixels, each of which displays the gray scale signal according to the first scan signal, each pixel comprising at least two sub-pixels and pixel capacitors for re-assigning the gray scale signal to the sub-pixels; data lines connected with the data driving module and the pixels, respectively, each of the data lines controlling a charging voltage for the pixel according to the gray scale signal; shift register modules, each of which generates a second scan signal corresponding to one of the first scan signal based on the first scan signal; and scan lines including: type 1 scan lines connected with the scan driving module and the pixels, respectively, each of the type 1 scan lines controlling charging time for the pixel according to the first scan signal; and type 2 scan lines connected to the pixels, each of the type 2 scan lines controlling driving time for the sub-pixels of the pixel according to the second scan signal; the shift register module is connected with the type 1 scan line and the type 2 scan line corresponding to the type 1 scan line, respectively; the type 1 scan lines and the type 2 scan lines are mixedly arranged in turn, the type 1 scan line is separated from the corresponding type 2 scan line by A scan lines, wherein A is a positive integer greater than 0; the shift register modules receives the first scan signal at time t, the shift register modules generates the second scan signal corresponding to the first scan signal at time t+T, wherein T is a predetermined delay time; the shift register module is a single shift register, the shift register comprises a signal input pin, a clock input pin, an output pin and a feedback pin, the signal input pin is connected with the type 1 scan line, the output pin and the feedback pin are respectively connected with the type 2 scan line, the dock input pin is used for being inputted with the predetermined delay time T.