Patent ID: 7291896
Filing Date: 2007-11-06
Classification: G06F,H01L

Abstract:
1. An integrated electronic circuit apparatus, comprising: An integrated circuit chip containing a plurality of integrated semiconductor and other electronic devices; An electronic package including the integrated circuit chip, with an array of electrical terminals accessible at a first surface of the package for the attachment of capacitor devices, and an array of terminals on a second surface, opposite to the first surface, for the attachment of the electronic package to a substrate, and wherein the package has dimensions and electrical terminals are designed to match exactly with those of the capacitor devices attached to it; One or more active devices attached to the electronic package at its first surface; One or more capacitor devices attached to the barren surface of one or more active devices to form a stacked package on the electronic package with one or more active devices; A first input node of the electronic package, connecting to a terminal of the capacitor device through one or more active devices and to one channel terminal of a first transistor on the integrated circuit chip; A second output node of the chip, connecting to the other channel terminal of the first transistor and to one or more terminals at the second surface of the electronic package; And a third ground node connecting to terminals at the first and second surfaces of the electronic package.