Patent ID: 6355510
Filing Date: 2002-03-12
Classification: H01L

Abstract:
A method for manufacturing a thin film transistor, the method comprising:forming source and drain metal lines on an insulating substrate; forming a first protective layer covering the source and drain metal lines; sequentially depositing a buffer layer and a semiconductor layer on the first protective layer; forming an active layer by patterning and etching the semiconductor layer; etching the buffer layer using the active layer as a mask; performing a cleaning process before depositing a gate insulating layer on an exposed surface of the substrate; forming the gate insulating layer and a gate electrode on the active layer; forming source and drain regions in the active layer by doping the active layer with impurities using the gate insulating layer as a mask; forming a second protective layer covering the exposed entire surface of the substrate including the gate electrode; forming contact holes in the first and second protective layers, thereby exposing the source and drain metal lines and the source and drain regions; and forming a first metal line connecting the source metal line and the source region, and a second metal connecting the drain metal line and the drain region.