Patent ID: 6147395
Filing Date: 2000-11-14
Classification: G11C,H01L

Abstract:
An integrated circuit device comprising:a substrate having a primary surface;a first conductive layer of substantially uniform thickness provided on said primary surface, said first conductive layer having an integral raised portion extending therefrom, said raised portion having a first portion and a second portion, a width of said raised portion narrowing continuously in a direction from the second portion to the first portion;an insulative layer overlying said first conductive layer and exposing part of said width of said first portion, wherein said insulative layer is planarized with said exposed part of said width; anda layer of programmable resistive material provided in contact with said exposed part of said raised portion of said first conductive layer, said exposed part of said raised portion being narrower than a remaining part of said raised portion of said first conductive layer.