Patent ID: 7259807
Filing Date: 2007-08-21
Classification: G02F

Abstract:
1. A method for manufacturing a thin film transistor array panel, the method comprising: forming a gate line including a gate electrode on a substrate; depositing a gate insulating layer; forming a semiconductor layer on the gate insulating layer; forming an ohmic contact layer on the semiconductor layer; forming a data line including a source electrode and a drain electrode on the ohmic contact layer at least in part; forming an alignment key in the same layer as the data line; coating a first photosensitive film for a color filter; aligning a mask for color filter with the substrate provided with the first photosensitive film using the alignment key; forming a first color filter by light exposure and developing the first photosensitive film; and, forming a pixel electrode connected to the drain electrode, wherein the semiconductor layer, the ohmic contact layer, the data line, and the drain electrode are formed by a single photolithography step.