Patent ID: 7180333
Filing Date: 2007-02-20
Classification: H03K

Abstract:
1. A circuit comprising: a current mode logic (CML) driver that generates an output signal that includes a common mode voltage (VCM), wherein the current mode logic (CML) driver includes an output node and a complementary output node; and a level shifting mechanism, coupled to the output node and the complementary output node of the CML driver, that adjusts the common mode voltage (VCM) of the output signal; wherein the level shifting mechanism includes a VCM pull up mechanism that pulls up the common mode voltage (VCM); wherein the VCM pull up mechanism includes a first current source coupled to the output node that injects a first level shifting current into the output node; and a second current source coupled to the complementary output node that injects a second level shifting current into the complementary output node.