Patent ID: 6102961
Filing Date: 2000-08-15
Classification: G06F

Abstract:
A method for determining a group of IP Blocks from a first plurality of IP Blocks to incorporate into a circuit design, the method comprising:determining a circuit architecture to be implemented by the circuit design;determining an architecture profile for implementing the circuit architecture;determining a first design profile for designing the circuit architecture with a first group of IP Blocks from the first plurality of IP Blocks, and a second design profile for designing the circuit architecture with a second group of IP Blocks from the first plurality of IP Blocks;determining a first integration profile for implementing a first implementation of the circuit architecture with the first group of IP Blocks, and a second integration profile for implementing a second implementation of the circuit architecture with the second group of IP Blocks;determining a first verification profile for verifying the first implementation of the circuit architecture, and a second verification profile for verifying the second implementation of the circuit architecture;determining a first technical profile for the circuit architecture with the first implementation in response to the architecture profile, to the first design profile, the first integration profile and the first verification profile;determining a second technical profile for the circuit architecture with the second implementation in response to the architecture profile, the second design profile, the second integration profile and the second verification profile; andselecting one of said first and said second groups of IP blocks as the group of IP blocks.