Patent ID: 6261949
Filing Date: 2001-07-17
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device comprising the steps of:forming a first interlayer insulation film on a conductive material;forming an etching stopper film on said first interlayer insulation film;forming a first photoresist film on said etching stopper film;forming a contact hole in said first photoresist film to expose said etching stopper film;then forming a contact hole in said etching stopper film and said first interlayer insulation film to expose the conductive material;forming a second interlayer insulation film on said first interlayer insulation film while making said contact hole remain as a cavity;forming a second resist film for a wiring groove pattern on said second interlayer insulation film;forming a wiring groove in said second interlayer insulation film by etching said second interlayer insulation film with said second resist film used as a mask and thereby opening the contact hole confined by said second interlayer insulation film; andforming a wiring and a contact by embedding metal material into said wiring groove and said contact hole.