Patent ID: 7947980
Filing Date: 2011-05-24
Classification: H01L

Abstract:
1. A method of programming a non-volatile memory cell comprising: applying a programming signal to a programming terminal of a three-terminal non-volatile memory element and to a first terminal of a capacitive storage element; wherein the three-terminal non-volatile memory element has gate, source, and drain terminals and a channel region between the source and drain terminals, and the programming terminal is the gate terminal; transferring energy from the capacitive storage element to the programming terminal during breakdown of a dielectric layer of the three-terminal non-volatile memory element; applying bias voltages to the source and drain terminals of the non-volatile memory element while applying the programming signal to the gate terminal, wherein a voltage differential between the gate terminal and the channel region is greater than a voltage differential between the gate terminal and the source terminal and greater than a voltage differential between the gate terminal and the drain terminal; and forming a non-volatile low-resistance path between a source terminal and a drain terminal of the three-terminal non-volatile memory element.