Patent ID: 8775149
Filing Date: 2014-07-08
Classification: G01R,G06F

Abstract:
1. A computer implemented method for implementing parallel execution of an independent parameterized measurement block, comprising: using at least one processor to perform a process, the process comprising: specifying one or more stimuli for a test fixture; creating an independent processing environment of multiple independent processing environments for each of a plurality of iterates in the loop processing; performing language independent parallel execution of simulation or emulation upon the test fixture with the independent parameterized measurement block of multiple independent parameterized measurement blocks, while avoiding serial loop processes, by using a loop processing within each of the multiple independent processing environments to sweep over a range of parameter values in multiple iterations performed in parallel, without one iterate accessing results of another iterate, wherein the act of performing the simulation or emulation by using the loop processing comprises: analyzing results by at least using one or more statements in the independent parameterized measurement block to extract an output from the simulation or emulation to compute a desired performance metric.