Patent ID: 8999761
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a leadframe having: a first surface; a second surface opposite to the first surface; a device forming portion having a first region of the first surface and a first region of the second surface; a frame portion having a second region of the first surface and a second region of the second surface and formed around the device forming portion in plan view; a main-runner portion formed over the first surface of the frame portion along a first direction; a gate portion linked with the device forming portion; a sub-runner portion formed over the first surface of the frame portion so as to link the gate portion with the main-runner portion; a main-through-hole formed in the main-runner portion so as to extend from one of the first surface and the second surface to the other; and a sub-through-hole formed in the sub-runner portion so as to extend from one of the first surface and the second surface to the other, wherein the sub-through-hole has, along a second direction along which the sub-runner portion extends, a first portion located on the side of the main-runner portion and a second portion located on the side of the gate portion relative to the first portion, wherein in plan view, a maximum opening width of the sub-through-hole in the second direction is greater than a maximum opening width of the sub-through-hole in a third direction perpendicular to the second direction, and wherein in plan view, an opening width of the sub-through-hole in the third direction gradually decreases from the first portion to an end portion of the second portion on the side of the gate portion, (b) after the step (a), arranging a semiconductor chip over the device forming portion; (c) after the step (b), supplying a resin into a cavity of the molding die covering the semiconductor chip at the device forming portion through a main-runner of a molding die covering the main-runner portion, a sub-runner of the molding die covering the sub-runner portion, and the gate portion of the leadframe, thereby forming a device sealing portion that seals the semiconductor chip at the device forming portion, a main-runner sealing portion at the main-runner portion, and a sub-runner sealing portion at the sub-runner portion; and (d) after the step (c), inserting a pin into each of the main-through-hole and the sub-through-hole from the second surface side of the leadframe and thereby separating the main-runner sealing portion and the sub-runner sealing portion from the leadframe.