Patent ID: 6212187
Filing Date: 2001-04-03
Classification: H04L

Abstract:
A multiprocessor ATM exchange constructed so that an initial address message received in a common signaling processor is processed by one of a plurality of call control processors allocated to an identical node,wherein said common signaling processor includes transfer means for transferring said initial address message from a preceding exchange to one of said plurality of call control processors, andwherein each of said plurality of call control processors include:incoming call control means for receiving an initial address message and generating an origination signaling identifier from a unique call reference number within the call control processor and a call processor number and sending an acknowledgement message with said origination signaling identifier to said preceding exchange; andoutgoing call control means for generating an origination signaling identifier from an outgoing internal reference call number and the call control processor number and sending said initial address message with said origination signaling identifier to a succeeding exchange, andsaid common signaling processor further includes means for extracting the call control processor number from received destination signal identifier and transferring said initial address message to the call control processor based on an extracted call control processor number.