Patent ID: 8698312
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a substrate; a first metal line layer formed above said substrate, said first metal line layer comprising a plurality of first metal lines laterally embedded in a first single layer of a first dielectric material with a first relative permittivity; a second metal line layer formed above said first metal line layer, said second metal line layer comprising a plurality of second metal lines laterally embedded in a second single layer of said first dielectric material; and a via connecting at least one of said first metal lines with at least one of said second metal lines, said via being laterally embedded in a single layer of a second dielectric material having a second relative permittivity that is higher than said first relative permittivity, said single layer of said second dielectric material having an upper surface that contacts a bottom surface of said second single layer of said first dielectric material of said second metal line layer, said single layer of said second dielectric material having a thickness that substantially corresponds to a distance between the first and second metal lines, and said second dielectric material having increased mechanical stability or strength relative to the first dielectric material.