Patent ID: 7662660
Filing Date: 2010-02-16
Classification: H01L

Abstract:
1. A method for forming a thin film transistor array substrate, comprising: providing a substrate; forming a gate electrode on the substrate; forming a gate dielectric layer on the substrate and the gate; forming a light shielding layer on the gate dielectric layer; removing a portion of the light shielding layer on the gate electrode to form an opening in the gate dielectric layer; forming a semiconductor layer on the light shielding layer and filling the opening, wherein the semiconductor layer comprises a channel; forming a doped semiconductor layer on the semiconductor layer; patterning the doped semiconductor layer and the semiconductor layer, wherein at least one side of the patterned doped semiconductor layer and the pattern semiconductor layer extend beyond the gate electrode; etching the light shielding layer using the patterned doped semiconductor layer as a mask; forming a source electrode electrically connecting a portion of the semiconductor layer on one side of the channel; and forming a drain electrode electrically connecting a portion of the semiconductor layer on the other side of the channel, wherein the drain electrode does not overlap the gate electrode.