Patent ID: 6084817
Filing Date: 2000-07-04
Classification: G11C

Abstract:
A semiconductor device comprising:at least three data holding devices each having bank addresses different from each other;a plurality of data amplifying transfer buffers, each coupled to said data holding devices, said plurality of data amplifying transfer buffers being divided into a plurality of groups;a plurality of data lines provided such that each data amplifying transfer buffer in a respective group of said plurality of data amplifying transfer buffers is coupled to a same corresponding one of said plurality of data lines, the respective group including at least one data amplifying transfer buffer for each of said data holding devices; anda control portion provided at each of said data holding devices, said control portion transmitting the data on a predetermined output terminal of the data holding device associated therewith to a corresponding data amplifying transfer buffer based on a control signal, transmitting predetermined data in said corresponding data amplifying transfer buffer to said corresponding one of data lines thereafter, and presetting said data amplifying transfer buffer thereafter.