Patent ID: 8541870
Filing Date: 2013-09-24
Classification: H01L

Abstract:
1. A semiconductor package comprising: a leadframe having a plurality of leads and a die pad, wherein each lead has a first inner lead and the die pad has a through hole; a tape attached beneath the leadframe adjacent to the first inner leads, the tape fixes the die pad and at least an adjacent one of the leads in a manner that the through hole covered by the tape has a first opening not completely covered by the tape; a first chip disposed on the leads and the die pad, the first chip having a plurality of first bonding pads electrically connected to the first inner leads; and an encapsulant encapsulating the die pad, the tape, and the first chip with the leads being insulatedly bonded, wherein the encapsulant completely fills into the through hole through the first opening, wherein the die pad is aligned to a non wire-bonding gap between the first bonding pads of the first chip.