Patent ID: 6204787
Filing Date: 2001-03-20
Classification: H03M

Abstract:
Analog modulator circuitry comprising:an integrator having first and second inputs;first switched-capacitor circuitry for selectively sampling a first amount of charge from a feedback signal to first and second feedback capacitors during a first timing phase and coupling said first amount of charge from said first and second feedback capacitors to said first and second inputs of said integrator stage during a second timing phase;second switched-capacitor circuitry for selectively sampling a second amount of charge from said feedback signal to third and fourth capacitors in parallel with said first and second capacitors during said first timing phase and coupling said second amount of charge from said third and fourth capacitors during said second timing phase to said first and second inputs of said integrator stage to selectively compensate for an offset of an input signal to said integrator stage with respect to a reference voltage; andswitching circuitry for selectively cross-coupling said third and fourth capacitors with said inputs of said integrator.