Patent ID: 8661230
Filing Date: 2014-02-25
Classification: G06F

Abstract:
1. A microprocessor comprising: a plurality of physical registers; a plurality of counters, wherein a number of the plurality of counters is less than a number of the plurality of physical registers; a mapper unit operative to assign a particular counter from among the plurality of counters currently in a counter free pool to count a number of mappings of logical registers from among a plurality of logical registers to a particular physical register responsive to an execution of an instruction by the mapper unit mapping a second logical register from among the plurality of logical registers to the particular physical register, wherein a first logical register from among the plurality of logical registers is currently mapped to the particular physical register; the mapper unit, responsive to the counted number of mappings of logical registers to the particular physical register decremented to less than a minimum value, operative to return the particular counter to the counter free pool.