Patent ID: 6169765
Filing Date: 2001-01-02
Classification: H03K,H04L

Abstract:
An output signal pulse width error correction circuit comprising: a circuit input terminal for receiving an input signal from a receiver circuit; a circuit output terminal; a low-pass filter coupled to the circuit input terminal and configured to receive the input signal and produce a ramped signal having sloped edges responsive thereto; a variable pulse width comparator interposed between the low-pass filter and the circuit output terminal, the variable pulse width comparator being configured to compare the ramped signal to a pulse width control voltage and produce a digital output signal at the circuit output terminal responsive thereto; and an error integrator amplifier coupled to the circuit output terminal and configured to integrate the digital output signal to obtain an average voltage of the digital output signal, compare the average voltage to a pulse width reference voltage and produce the pulse width control voltage responsive thereto.