Patent ID: 7915916
Filing Date: 2011-03-29
Classification: H03K

Abstract:
1. An antifuse circuit fabricated on a semiconductor substrate, comprising: a terminal; a program voltage coupled to the terminal; a plurality of antifuses fabricated on the semiconductor substrate; a disconnect transistor fabricated on the semiconductor substrate and coupled between the terminal and a programming node and having a gate terminal coupled to receive a first select signal, the disconnect transistor having an associated breakdown voltage that is greater than the program voltage; a plurality of select transistors fabricated on the semiconductor substrate, each of the select transistors being coupled in series with a respective one of the antifuses between the programming node and a voltage node and having a gate terminal coupled to receive a respective second select signal, each of the select transistors having an associated breakdown voltage that is less than the program voltage and being operable to operate in the snapback mode of operation responsive to an assertion of the first select signal and the respective second select signal; and control logic fabricated on the semiconductor substrate and operable to sequentially assert the second select signals to program the respective antifuses, to assert the first select signal when each of the second select Signals is asserted and to deassert the first select signal after the programming of each of the antifuses to isolate the select transistor from the terminal.