Patent ID: 8278212
Filing Date: 2012-10-02
Classification: C23C,H01L

Abstract:
1. A method of manufacturing a semiconductor memory device, comprising: a first step of forming a chalcogenide material layer; and a second step of forming an electrode layer on the chalcogenide material layer by sputtering through the use of a mixture gas of a reactive gas which is a nitrogen gas and an inert gas, while applying a cathode voltage to a target which is made up of titanium or tungsten, wherein the target is a target capable of performing sputtering in a metal mode, in the second step, introduction of the reactive gas is carried out at a flow rate ratio of the reactive gas in the mixture gas corresponding to a hysteresis area appearing in a curve of the cathode voltage with respect to a flow rate ratio of the reactive gas in the mixture gas, the hysteresis area is an area in which a first curve of the cathode voltage when the flow rate ratio of the reactive gas in the mixture gas is increased, and a second curve of the cathode voltage when the flow rate ratio of the reactive gas in the mixture gas is decreased, are different from each other, and the cathode voltage of the first curve at a predetermined flow rate ratio in the hysteresis area is smaller than that of the second curve at the predetermined flow rate ratio, and in the second step, the cathode voltage is included in the first curve.