Patent ID: 6639282
Filing Date: 2003-10-28
Classification: H01L

Abstract:
A semiconductor device on a silicon-on-insulator (SOI) comprising:a semiconductor wafer having a SOI structure and including an insulating layer having a predetermined thickness and a monocrystalline silicon layer formed on the insulating layer; an isolation insulating layer formed on the insulating layer on the semiconductor wafer;a gate comprised of a gate dielectric layer and a gate conductive layer, which are sequentially stacked on the monocrystalline silicon layer; insulating layer spacers formed at the sidewalls of the gate; and a source junction and a drain junction asymmetrically formed at either side of the gate between the isolation insulating layer spacers and the insulating layer, the drain junction being coupled to a reinforced drain junction which extends under the drain junction into the isolation insulating layer to a depth that is deeper than the source junction and the drain junction.