Patent ID: 7507622
Filing Date: 2009-03-24
Classification: H01L

Abstract:
1. A manufacturing method of semiconductor device, the method comprising: (a) preparing a semiconductor layer with an element formation region established; (b) forming an insulated-gate field effect transistor in the semiconductor layer; (c) forming a protective film with a prescribed pattern above the insulated-gate field effect transistor; (d) forming an etching stopper film on the insulated-gate field effect transistor including the protective film; (e) removing the etching stopper film located outside a gate insulating layer and above an area at a position other than a position sandwiched by the gate insulating layer and an impurity region that constitutes a source region or a drain region, to form the removed region; and (f) forming an interlayer insulating layer to cover the insulated-gate field effect transistor; wherein in the (c), the protective film with a pattern that overlaps at least a pattern of the removed region is formed.