Patent ID: 8736291
Filing Date: 2014-05-27
Classification: G01R,G11C

Abstract:
1. A method of testing electrical continuity for externally accessible interconnects of an integrated circuit, the method comprising: coupling a test signal to a first path within the integrated circuit, wherein the first path is intended to have electrical continuity at least between a first externally accessible interconnect under test and a first input buffer; coupling the test signal through the first input buffer; electronically coupling the test signal from an output of the first input buffer to a second path within the integrated circuit, wherein the second path is intended to have electrical continuity at least between a second externally accessible interconnect under test and a second input buffer; coupling the test signal through the second input buffer, wherein an input of the second input buffer is electrically connected to the second path; and monitoring an output of the second input buffer as a test for the first externally accessible interconnect and the second externally accessible interconnect.