Patent ID: 6628349
Filing Date: 2003-09-30
Classification: H01L

Abstract:
A liquid crystal display substrate comprising:a substrate on which an image display area and a peripheral circuit area are defined, the peripheral circuit area being disposed at a side of the image display area; a plurality of gate bus lines extending in a row direction and formed on the substrate in the image display area; a plurality of drain bus lines extending in a column direction and formed on the substrate in the image display area, said drain bus lines being electrically insulated from said gate bus lines in cross areas in which said drain bus lines cross with said gate bus lines; pixel electrodes positioned between cross areas in which said drain bus lines cross with said gate bus lines; first thin film transistors associated with the cross areas in which said drain bus lines cross with said gate bus lines, each of said first thin film transistors connecting corresponding drain bus line and pixel electrode, each of said first thin film transistors including a channel region for flowing current in a first direction, a first impurity doped region having a first impurity concentration, and a second impurity doped region having a second impurity concentration higher than the first impurity concentration, said first impurity doped region and said second impurity doped region sandwiching said channel region, current flowing in the channel region being controlled by a corresponding gate bus line, and the first impurity doped region being electrically connected to a corresponding one of said drain bus lines; and a second thin film transistor formed on the substrate in the peripheral circuit area and including a channel region for flowing current in a second direction perpendicular to the first direction, and third impurity doped regions having a third impurity concentration and disposed on both sides of the channel region.