Patent ID: 7117143
Filing Date: 2006-10-03
Classification: G06F

Abstract:
1. A method for programming an emulator to emulate an integrated circuit (IC) clocked by at least one primary clock signal provided as input to the IC, the IC being described by a netlist as including logic blocks that communicate through synchronizing circuits, wherein the synchronizing circuits include input clock sinks for conveying input signals into logic blocks and output clock sinks for conveying output signals out of logic blocks, and wherein the synchronizing circuits employ clock signals derived from the at least one primary clock signal to clock the input and output clock sinks, the method comprising the steps of: a. analyzing the netlist to determine a domain, a sub-domain and a phase of each clock signal each synchronizing circuit employs to clock its input and output clock sinks; b. analyzing the netlist to determine a type of each synchronizing circuit based on relationships between the determined domain, sub-domain and phase of the clock signals the synchronizing circuit employs to clock its input and output sinks, wherein synchronizing circuit types comprise: c. modifying the netlist description of each type B synchronizing circuit so that it becomes a type A synchronizing circuit wherein clock signals that clock the synchronizing circuit's input and output sinks are derived from the at least one primary clock signal provided as input to the IC and are of similar domain, similar subdomain, and similar phase.