Patent ID: 7679411
Filing Date: 2010-03-16
Classification: G06F,H03K

Abstract:
1. A reset signal generation circuit for generating a first reset signal provided to a synchronous circuit that operates in accordance with a clock signal, the reset signal generation circuit comprising: an operation detection circuit for detecting an operation state of the synchronous circuit and generating an operation detection signal; a signal control circuit, connected to the operation detection circuit, for generating the first reset signal that is synchronous or asynchronous to the clock signal based on the operation detection signal; an asynchronous circuit responsive to a second reset signal that is asynchronous to the clock signal, wherein the signal control circuit generates the second reset signal based on a system reset signal for resetting the synchronous circuit and the asynchronous circuit; and a power on reset circuit, connected to the signal control circuit, for generating a power on reset signal for stopping operation of the synchronous circuit and the asynchronous circuit until the power supply voltage reaches a predetermined voltage, wherein the signal control circuit generates the second reset signal in response to the power on reset signal; wherein the synchronous circuit generates a control signal, the reset signal generation circuit further comprising: a function control circuit for performing or stopping the generation of the first reset signal and the second reset signal that are asynchronous to the clock signal with the signal control circuit based on the control signal and a voltage detection signal.