Patent ID: 9059074
Filing Date: 2015-06-16
Classification: H01L

Abstract:
1. A method of manufacture of an integrated circuit package system comprising: mounting an integrated circuit die adjacent to a lead, forming a first encapsulation in direct contact with the integrated circuit die and the lead, the first encapsulation exposing an active side of the integrated circuit die and the lead; forming a planar interconnect having an interconnect top side in direct contact with the active side of the integrated circuit die, the lead bottom side of the lead, and the first encapsulation; and forming a second encapsulation covering a non-horizontal side of the planar interconnect, the second encapsulation in direct contact with the active side of the integrated circuit die, the lead bottom side of the lead, and the bottom side of the planar interconnect opposite from the interconnect top side, and the second encapsulation is a transparent laminated epoxy layer, a transparent screen printed epoxy layer, or a transparent stencil printed epoxy layer for image sensor applications and electromagnetic wave activation applications, wherein a top surface of the second encapsulation coplanar with the lead bottom side of the lead, the interconnect top side, and the active side of the integrated circuit die.