Patent ID: 8466061
Filing Date: 2013-06-18
Classification: H01L

Abstract:
1. A method for forming a through via in a semiconductor element, the method comprising: providing a semiconductor element having an electronic circuitry integrated on or in a main side thereof, the semiconductor element comprising an etch stop layer and a conductive region, wherein the conductive region is arranged between the etch stop layer and the main side of the semiconductor element; selectively etching a through hole from a backside of the semiconductor element, opposite to the main side of the semiconductor element, to the etch stop layer, thereby exposing a portion of the etch stop layer in the through hole; removing the exposed portion of the etch stop layer in the through hole in order to expose the conductive region to the backside of the semiconductor element; and filling at least partially the through hole with a conductive material so as to form the through via, wherein the conductive material is electrically connected to the conductive region and electrically isolated from the remaining semiconductor element, wherein the provision of the semiconductor element is performed so that the conductive region comprises a metal with a melting point higher than 700° C.