Patent ID: 6389381
Filing Date: 2002-05-14
Classification: G06F

Abstract:
A method of computing delay times of circuit elements of a semiconductor device, comprising:preparing at least two coefficient tables storing a plurality of delay time ratio coefficient values, one of which being a first delay time ratio coefficient value, each of the delay time ratio coefficient values representing a ratio of a delay time determined by values of a plurality of dependency factors having a close correlation with one another to a predetermined reference delay time of a circuit element, the first coefficient table having a first matrix table of the plurality of delay time ratio coefficient values respectively associated with the plurality of dependency factors, one of which being a first dependency factor, and the second coefficient table having a second matrix table of the first delay time ratio coefficient value and a second delay time ratio coefficient value, the first delay time ratio coefficient value being associated with the first dependency factor, and the second delay time ratio coefficient value being associated with a second dependency factor having a close correlation with the first dependency factor; acquiring at least one of the delay time ratio coefficient values from the first coefficient table and acquiring at least one of the first and second delay time ratio coefficient values from the second coefficient table; computing a delay time of a circuit element using the acquired delay time ratio coefficient values and a reference delay time; and performing a circuit timing simulation using the delay time.