Patent ID: 9135672
Filing Date: 2015-09-15
Classification: G06T,G09G

Abstract:
1. A display system, comprising: an audio and video (AV) source, providing an AV control signal and an AV data signal; a display device, comprising: a frame buffer; a timing controller, coupled to the AV source and the frame buffer to receive the AV control signal and the AV data signal and output display data; a display panel; and a driver circuit, coupled to the timing controller and the display panel to drive the display panel according to the display data, wherein when a first frame stored in the frame buffer is identical to a second frame to be output from the AV source, the AV source sets the AV control signal corresponding to a self-refresh mode, and the timing controller is controlled by the AV control signal to read the first frame stored in the frame buffer to output the display data, when the first frame stored in the frame buffer is different from the second frame to be output from the AV source, the AV source sets AV control signal corresponding to a data update mode and sets the AV data signal according to the second frame, and the timing controller is controlled by the AV control signal to store the second frame in the frame buffer and determine to output the display data corresponding to either the first frame or the second frame according to a timing sequence of the AV data signal and a timing sequence of the display data, wherein when a start time of a frame displaying period of a frame period corresponding to the second frame falls within a frame displaying period of a frame period corresponding to the first frame, the timing controller continuously reads the first frame stored in the frame buffer to output the display data, wherein when an access speed of the frame buffer is less than a sum of a bit rate of the AV data signal and a bit rate of the display data, the timing controller reduces the bit rate of the display data so as to enable the access speed of the frame buffer to be greater than a sum of the bit rate of the AV data signal and the reduced bit rate of the display data.