Patent ID: 7963031
Filing Date: 2011-06-21
Classification: H01L,H05K,Y10T

Abstract:
1. A method of manufacturing a package for a semiconductor device, comprising the steps of: preparing a first metal plate and a second metal plate, whereby each metal plate includes a first through hole, a second through hole, a projection extending from one side of the metal plate, a convex portion extending from the other side of the metal plate, and an insulating layer formed on a surface of each metal plate; forming a core substrate by stacking the first metal plate and the second metal plate while entering the projection of the first metal plate into the second through hole of the second metal plate and entering the projection of the second metal plate into the second through hole of the first metal plate, and forming a through hole penetrating the core substrate by the first through holes of the first metal plate and the second metal plate; forming a first terminal portion and a second terminal portion by exposing a tip end of the projection from the first metal plate and a tip end of the convex portion from the second metal plate respectively on a same surface of the second metal plate such that the tip end of the projection and the tip end of the convex portion are flush with the insulating layer; forming a first terminal portion and a second terminal portion by exposing a tip end of the projection from the second metal plate and a tip end of the convex portion from the first metal plate respectively on a same surface of the first metal plate such that the tip end of the projection and the tip end of the convex portion are flush with the insulating layer; forming a conducting portion on the through hole penetrating the core substrate; and forming wiring patterns to be electrically connected through the conducting portion on both surfaces of the core substrate.