Patent ID: 6351229
Filing Date: 2002-02-26
Classification: H03M

Abstract:
Delta sigma modulator circuitry comprising:(a) a delta sigma modulator including i. a first summing circuit having a first input connected to receive an input signal, ii. analog loop filter circuitry having an input coupled to an output of the first summing circuit, iii. a second summing circuit having a first input coupled to an output of the analog loop filter circuitry, and iv. comparator circuitry having an input coupled to an output of the second summing circuit and also having an output coupled to an output of the delta sigma modulator circuitry; and (b) density-modulated dynamic dithering circuitry including i. a digital level estimator and comparator circuit having an input coupled to the output of the comparator, and ii. a one-bit digital-to-analog converter having a first input coupled to an output of the digital level estimator and comparator circuit, a second input coupled to receive a pseudo-random sequence signal, and an output applying a tri-level dither signal to a second input of the second summing circuit.