Patent ID: 7880659
Filing Date: 2011-02-01
Classification: H03M

Abstract:
1. A pipeline analog-to-digital converter comprising: a conversion unit receiving an analog input signal and outputting a plurality of digital signals corresponding to quantization values obtained by quantizing the analog input signal, the conversion unit including a plurality of stages that output the plurality of digital signals, the plurality of stages being connected in a cascade manner, each of the stages receiving a residue analog signal from a previous stage, and a first stage receiving the analog input signal; and a digital correction logic receiving the plurality of digital signals, correcting an error therein, and outputting a digital output signal corresponding to the analog input signal, wherein a first reference voltage is applied to the plurality of stages, wherein at least a second stage that follows the first stage includes a plurality of unit capacitors that sample the residue analog signal, and wherein a second reference voltage, which is different from the first reference voltage and from a ground voltage, is applied to a first unit capacitor of the second stage and not to other unit capacitors of the plurality of unit capacitors of the second stage.