Patent ID: 6781435
Filing Date: 2004-08-24
Classification: H03K,H03M

Abstract:
A circuit for converting an ordered n-bit binary number into an equivalent single-bit sequence comprising:n switching elements, each switching element having an input port, an output port and a control port for controlling the passage of a signal between the input port and the output port; where n is a an integer greater than one; means for applying each bit of the n-bit word to the control port of a different one of said n switching elements; the n-bit word being ordered from a least significant bit (LSB) to a most significant bit (MSB); a clock signal of frequency f; a frequency divider circuit responsive to said clock signal for producing n different binary sub-harnonics of the frequency f from f/2 to f/2n; means for applying each sub-harmonic to the input port of a different switching element with each higher frequency signal being applied to the input port of a switching element having a higher order bit applied thereto, whereby the highest frequency signal (f/2) is applied to the input port of the switching element to which the MSB is applied and the lowest frequency signal is applied to the input port of the switching element to which the LSB is applied; and means coupling the output port of said switching elements to a common point for producing thereat a serial single-bit data sequence.