Patent ID: 7663204
Filing Date: 2010-02-16
Classification: H01L

Abstract:
1. A substrate for multi-chip stacking comprising: a first wire-bonding finger adjacent to a die-attaching area; a second wire-bonding finger adjacent to the die-attaching area and to the first wire-bonding finger; a trace configured for electrical transmission; a loop wiring connecting in series with the first wire-bonding finger and the second wire-bonding finger and connected to the trace; and a first fuse, a second fuse and a third fuse disposed in the loop wiring, wherein the first fuse is connected in series between the first wire-bonding finger and the trace, the second fuse is connected in series between the first wire-bonding finger and the second wire-bonding finger and the third fuse is connected in series between the second wire-bonding finger and the trace.