Patent ID: 6208033
Filing Date: 2001-03-27
Classification: C23C,H01L

Abstract:
A memory, comprising:a memory array;a control circuit, operatively coupled to the memory array; andaddress logic, operatively coupled to the memory array and the control circuit;wherein at least one of the memory array, the control circuit, and the address logic includes a contact comprising:titanium silicide, wherein the titanium silicide is produced by a method comprising forming titanium silicide by plasma-assisted chemical vapor deposition (CVD) in a CVD chamber according to a first chemical process described by TiCl.sub.4 +Si.sub.n H.sub.2n+2 +H.sub.2.fwdarw.TiS.sub.x +HCl, and a second chemical process described by TiCl.sub.4 +Si+H.sub.2.fwdarw.TiSi.sub.x +HCl, wherein n is greater than or equal to 1, and x is less than or equal to 2;titanium nitride on the titanium silicide; anda plug material on the titanium nitride.