Patent ID: 6160451
Filing Date: 2000-12-12
Classification: H03F

Abstract:
An apparatus for buffering and isolating a signal source from an external load, said apparatus having a signal input terminal for receiving an input signal from said signal source and a signal output terminal for providing an output signal, corresponding to said input signal, to said external load, comprising,a first bias current source providing a first emitter current to a first driver transistor and a first bias current to a first output transistor;a second bias current source receiving a second emitter current from a second driver transistor and a second bias current from a second output transistor, said input signal biasing said first driver transistor and said second driver transistor, and said output terminal being electrically coupled to an emitter of said first output transistor and to an emitter of said second output transistor; and,a control voltage source characterized by a control voltage across the control voltage source and a control current flowing through the control voltage source, wherein said control voltage remains constant for different values of control current, said control voltage source being electrically coupled between an emitter of said first driver transistor and an emitter of said second drive transistor, wherein said first bias current and said second bias current vary as a predetermined function of said control voltage.