Patent ID: 6449325
Filing Date: 2002-09-10
Classification: H04L,H04N

Abstract:
A digital television receiver comprising:demodulation circuitry for supplying baseband symbol code responsive to a received digital television signal carrier modulation; a bin amplitude comparator for performing bin amplitude comparisons on said baseband symbol code at symbol rate for determining which amplitude slice a current symbol reposes in and for supplying concurrent bin occupancy results for an amplitude slice including a value +S and for an amplitude slice including a value âˆ’S, which values +S and âˆ’S define the positive and negative excursions respectively of a binary data synchronization signal; a shift register with a plurality of successive stages each capable of temporarily storing a respective two-parallel-bit group, said shift register arranged to receive as serial input signal thereto successive two-parallel-bit groups formed from said concurrent bin occupancy results supplied from said bin amplitude comparator; and match filtering circuitry responsive to a number of bits each selected from a respective one of said successive parallel-bit groups as currently supplied from said bin amplitude comparator and as temporarily stored in stages of said shift register and supplying a pulse when said number of bits are at least substantially the same as those resulting from decoding a particular symbol code sequence used for data synchronization.