Patent ID: 6285603
Filing Date: 2001-09-04
Classification: G11C

Abstract:
A repair circuit of a semiconductor memory device comprising:a first operation switch having an output for outputting a supply voltage in accordance with a CAS-before-RAS signal;a first fuse selector, including a first plurality of fuses connected to the output of said first operation switch, to output a sub-block select signal in accordance with the output voltage of said first operation switch and a spare column enable signal;a second operation switch having an output for outputting the supply voltage in accordance with the sub-block select signal output from said first fuse selector and an address transition detection signal for performing a pre-charge function during a normal operation mode of a DRAM device;a second fuse selector, including a second plurality of fuses connected to the output of said second operation switch, to generate a repair column select signal in accordance with the sub-block select signal output from said first fuse selector; anda current blocking circuit, including a programmable anti-fuse, to generate a repair value signal for controlling the operation of said second operation switch based on a programming status of the anti-fuse.