Patent ID: 8184483
Filing Date: 2012-05-22
Classification: G11C

Abstract:
1. A nonvolatile memory device, comprising: a memory cell array configured to comprise a first memory cell group and a second memory cell group, the first memory cell group being coupled to bit lines and word lines and configured to store data, and the second memory cell group being configured to store operation information comprising first and second program start voltages; a page buffer unit configured to comprise page buffers, each being coupled to one or more of the bit lines and configured to temporarily store data to be programmed into memory cells or to store data read from the memory cells; and a control unit configured to, when a program operation is first performed after power is supplied, count a number of program pulses until a verification operation using a first verification voltage is a pass, compare the counted number of program pulses and a first number of program pulses included in the operation information, select any one of the first and second program start voltages according to a result of the comparison, and control the program operation to be performed using the selected program start voltage until the power is off.