Patent ID: 6534827
Filing Date: 2003-03-18
Classification: H01L

Abstract:
A semiconductor device having one or more MOS transistors, each MOS transistor comprising:a field oxide film formed on a semiconductor substrate having a first conductivity type; a channel stop region having the first conductivity type formed in the semiconductor substrate under the field oxide film; a gate insulating film formed on the semiconductor substrate; a gate electrode formed on the gate insulating film low impurity concentration source and drain regions of a second conductivity type opposite the first conductivity type formed in the semiconductor substrate surrounded by the field oxide film and the gate electrode; an interlayer insulating film for electrically insulating the gate electrode and the source and drain regions; a wiring layer formed on the interlayer insulating film; a pair of contact holes extending through the interlayer insulating film to expose a portion of the source and drain regions for electrically connecting the wiring layer, the gate electrode, and the source and drain regions; and a high impurity concentration diffusion layer of the second conductivity type formed only in the exposed portion of each of the source and drain regions.