Patent ID: 8942050
Filing Date: 2015-01-27
Classification: G11C

Abstract:
1. A method of inspecting a variable resistance nonvolatile memory device, the variable resistance nonvolatile memory device including: a memory cell array having a plurality of memory cells each including a variable resistance element and a current steering element that are connected in series, each of the memory cells being located at a three-dimensional cross point of one of a plurality of word lines and one of a plurality of bit lines, the variable resistance element changing at least between a low resistance state and a high resistance state, and the current steering element carrying a current from which the current steering element is assumed to be conducting as a result of an application of a voltage exceeding a predetermined threshold voltage; a memory cell selection circuit that selects one of the memory cells by selecting at least one of the word lines and at least one of the bit lines; and a read circuit that reads a resistance state of the selected memory cell by performing voltage application on the selected memory cell so that a first voltage higher than the threshold voltage and a second voltage lower than the threshold voltage are applied to the current steering element of the selected memory cell, and the method comprising: determining that the current steering element has a short-circuit fault in the case where a value of a current passing through the current steering element is higher than or equal to a predetermined value, when the resistance state of the memory cell is read by the application of the second voltage; and determining whether the variable resistance element is in the low resistance state or the high resistance state, when the resistance state of the memory cell is read by the application of the first voltage.