Patent ID: 8933502
Filing Date: 2015-01-13
Classification: G11C,H01L

Abstract:
1. A 3D stacked non-volatile memory device, comprising: a substrate; a stacked non-volatile memory cell array carried by the substrate, the stacked non-volatile memory cell array comprising: alternating stacked layers of dielectric and conductive material, the alternating stacked layers comprising a topmost layer and a bottommost layer, first and second cell areas, the first and second cell areas comprising rows of vertical columns, the vertical columns comprise NAND cells and extend through the alternating stacked layers of dielectric and conductive material, and at least one interconnect area which is adjacent to and between the first and second cell areas, the at least one interconnect area comprising first and second insulation-filled slits which run a full length and height of the stacked non-volatile memory cell array and at least one metal silicide interconnect between the first and second insulation-filled slits, the at least one metal silicide interconnect extends through the alternating stacked layers of dielectric and conductive material, from the bottommost layer to the topmost layer and does not comprise vertical columns of NAND cells, the first insulation-filled slit is adjacent to the first cell area, the second insulation-filled slit is adjacent to the second cell area, and the at least one metal silicide interconnect is adjacent to at least one of the first or second insulation-filled slits; at least one lower metal layer carried by the substrate, below the stacked non-volatile memory cell array; and at least one upper metal layer, above the stacked non-volatile memory cell array, the at least one metal silicide interconnect is electrically connected to at least one contact structure of the at least one lower metal layer, and to at least one contact structure of the at least one upper metal layer, and the at least one contact structure of the at least one lower metal layer is directly below the stacked non-volatile memory cell array.