Patent ID: 8645404
Filing Date: 2014-02-04
Classification: G06F,G11C

Abstract:
1. A method, comprising: reading, via a processor from a displaced-read memory offset address adjusted relative to word-aligned memory operations of a memory access system that utilizes word-aligned address boundaries within a memory, a split data word from the memory comprising a portion of each of two word-aligned data words stored by the memory access system within the memory using the word-aligned memory operations at two of the word-aligned address boundaries within the memory, where reading the split data word from the displaced-read memory offset address comprises a first level of a two-level memory search; comparing the portions of each of the two word-aligned data words within the split data word with corresponding portions of a word-aligned search pattern; determining that a potential complete match for the word-aligned search pattern exists within at least one of the two word-aligned data words based upon an identified match of at least one of the portions of the two word-aligned data words within the split data word with a corresponding at least one portion of the word-aligned search pattern; iterating processing of the first level of the two-level memory search through the memory; performing a second level of the two-level memory search in response to each determined potential complete match for the word-aligned search pattern, comprising: where the two-level memory search comprises a specified memory search address range, and further comprising: