Patent ID: 6549054
Filing Date: 2003-04-15
Classification: H03F,H03K,H04B

Abstract:
A DC offset cancellation circuit which is inserted between a pair of differential output terminals and a pair of differential input terminals of a differential amplification circuit that amplifies a pair of differential input signals inputted to the differential input terminals and outputs a pair of differential output signals from the differential output terminals, and which cancels a DC offset voltage between the differential output signals, comprising:a low-pass filter which performs low-pass filtration on the differential output signals inputted thereto so as to output a filtered signal; a hold circuit which outputs a hold filtered signal instead of the filtered signal of the low-pass filter, and which outputs the hold filtered signal corresponding to the filtered signal of the low-pass filter at the time of changing the filtered signal to the hold filtered signal; a mixing circuit that outputs a pair of mixed differential input signals, which are generated by mixing the filtered signal or the hold filtered signal into the pair of differential input signals such that a negative feedback is performed, to the pair of differential input terminals of the differential amplification circuit; and a changeover circuit which alternately performs changeover to a filtering state in which the pair of differential output signals are inputted to the low-pass filter and the filtered signal is outputted to the mixing circuit, and changeover to a hold state in which an input of the differential output signals to the low-pass filter are cut off and the hold filtered signal is outputted to the mixing circuit.