Patent ID: 7149257
Filing Date: 2006-12-12
Classification: H03F

Abstract:
1. A digital predistorter adapted to receive a digital quantized, time-sampled input signal and output a predistorted digital signal, the digital predistorter comprising: an input coupled to receive the digital quantized, time-sampled input signal; a first signal path coupled to the input and comprising a delay circuit and a combiner circuit coupled to the an output of the delay circuit; a second signal path, coupled to the input in parallel with said first signal path, comprising a first digital predistorter circuit providing a first predistortion operation on the input signal, wherein said first digital predistorter circuit provides said first predistortion operation modeling memoryless distortion effects employing only a current sample of the digital input signal; and a third signal path, coupled to the input in parallel with said first and second signal path, comprising a second digital predistorter circuit providing a second different predistortion operation on the input signal, wherein said second digital predistorter circuit provides said second predistortion operation modeling memory distortion effects employing plural samples of the digital input signal; wherein the combiner circuit receives and combines the outputs of the first and second digital predistorter circuits with the output of the delay circuit of the first signal path to provide a predistorted digital output signal.