Patent ID: 7412695
Filing Date: 2008-08-12
Classification: G06F

Abstract:
1. A method of detecting transient state points in a digital integrated circuit, the method comprising: (a) providing a schematic of the digital integrated circuit containing stable state points; (b) defining a graph G=(V, E (c) creating the all pairs shortest path matrix of the graph G using only the directed edges; (d) for each stable state node in the digital integrated circuit, making a peer list of all its peers in the graph G; (e) for each peer, checking to determine if said peer is an input or a stable state node, and, in the event that said peer is an input or a stable state node, then checking the next peer in said peer list, and, in the event that said peer is not an input or a stable state node, then making a parent list of all parents of said peer; (f) for each said parent,