Patent ID: 8216909
Filing Date: 2012-07-10
Classification: H01L

Abstract:
1. A method of making a field effect transistor (FET), the FET having a drain, a source, a body, a gate, wherein the gate is co-planar with the drain and the source, the method comprising: forming the gate in a first plane; forming the drain in the first plane; forming the source in the first plane; forming the body in the first plane; separating at least a portion of the gate from at least a portion of the body by an air gap formed in the first plane, separating including: forming an oxide layer between the first and second strips; covering the oxide layer with a nitride layer; covering the nitride layer with a layer of a diblock copolymer; heating the layer or diblock copolymer to cause the diblock copolymer layer to self organize into a pattern; and chemically removing one of the polymers of the diblock copolymer to create a porous structure above the nitride layer.