Patent ID: 6223265
Filing Date: 2001-04-24
Classification: G06F,H04W,Y02D

Abstract:
A single-chip microcomputer for use with an external memory, wherein the external memory has a clock signal input terminal and a clock enable signal input terminal and operating in synchronization with a first clock signal having a first frequency and first phase, the first clock signal received at the clock signal input terminal, the single-chip microcomputer comprising:a central processing unit which operates in accordance with a second clock signal having the first frequency and a second phase;a clock signal providing circuit which provides the second clock signal to the central processing unit and which provides a clock signal as the first clock signal to the clock signal input terminal of the external memory via the first external clock terminal;a second external terminal; anda memory control unit which provides to the second external terminal a clock enable signal to be received by the clock enable signal input terminal of the external memory, wherein the clock enable signal indicates to the external memory whether the first clock signal is enabled;wherein the external memory is controlled in a synchronous manner responsive to the first clock signal based on the clock enable signal.