Patent ID: 6300554
Filing Date: 2001-10-09
Classification: G01J,H01L

Abstract:
A method of manufacturing a thermoelectric sensor comprising:providing a silicon substrate;depositing a first isolation layer on a surface of the silicon substrate;depositing a material layer on a surface of the first isolation layer;patterning and etching the part of a material layer to form a first thermocouple element line;depositing a second isolation layer on a surface of the first thermocouple element line and the first isolation layer;patterning part of the second isolation layer to form a plurality of contact windows;depositing a first metal layer on a surface of the second isolation layer;patterning and etching part of the first metal layer to form a second thermocouple element line, and the second thermocouple element line being in contact with the first thermocouple element line by a plurality of hot junctions and cold junctions which permeate the contact windows;depositing a third isolation layer on the surface of the second thermocouple element line and the second isolation layer;etching part of the third isolation layer and the second isolation layer, a last part of the second thermocouple element line being exposed to thereby be coupled electrically to a second metal pad, and a first part of the first thermocouple element line being electrically coupled to a first metal pad by the second thermocouple element line;depositing a second metal layer above the third isolation layer;etching part of the second metal layer and forming the first metal pad and second metal pad;depositing a fourth isolation layer above the third isolation and the second metal layer;depositing a third metal layer above the fourth isolation layer, and defining a radiation absorber layer by, etching or lifting off to thereby enable absorption of infrared rays;depositing a fifth isolation layer on a surface of the fourth isolation layer and the radiation absorber layer;etching part of the fourth isolation layer and the fifth isolation layer, and forming a front side wet etching window with the first metal pad and the second metal pad being exposed;forming etching windows and a hole, passing through the fifth isolation layer, the fourth isolation layer, the third isolation layer, the second isolation layer, and the first isolation layer to expose a surface of the silicon substrate; andetching the silicon substrate via the etching hole by a front side silicon anisotropic wet etching technique to thereby undercut the silicon substrate.