Patent ID: 6436772
Filing Date: 2002-08-20
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device having memory cell transistors, comprising the steps of:forming a plurality of diffusion layers extending in a first direction at a surface of a semiconductor substrate in a cell region to be provided with said memory cell transistors; forming a plurality of gate electrodes extending in a second direction perpendicular to said first direction on the semiconductor substrate in said cell regions; forming an interlayer insulating film on said semiconductor substrate; forming a first resist film on said interlayer insulating film, said first resist film being provided with openings in positions in alignment with regions between adjacent diffusion layers among said plurality of diffusion layers; forming a second resist film provided with openings previously designed in an arbitrary manner on said first resist film; and implanting ions in said cell region using said first and second resist films as a mask.