Patent ID: 6686652
Filing Date: 2004-02-03
Classification: H01L

Abstract:
A leadless leadframe semiconductor package comprising:a die attach pad having an interior support surface, an opposite pad exposed surface and a peripheral side wall extending between the support surface and the exposed surface, said side wall intersecting said exposed surface to define a peripheral edge thereof, said attach pad further including a locking ledge portion extending peripherally outward from said side wall, and beyond at least a portion of the exposed surface peripheral edge; a plurality of contacts positioned peripherally around and adjacent to the die attach pad, each contact having an interior surface and an opposed, spaced-apart exposed contact surface, each said contact further having a peripheral contact side surface extending between the interior surface and the opposed contact surface, each said contact side surface intersecting said contact surface to define a contact surface peripheral edge thereof, each said contact side surface further including an exposed contact side wall portion defined by a portion of the contact side surface and by a side wall peripheral edge thereof, said contact side wall protion and said exposed contact surface intersecting such that said side wall peripheral edge and said contact surface peripheral edge share an exposed common contact edge portion, each said contact further including at least one tab member having a locking first shoulder portion and a locking second shoulder portion, said first shoulder portion extending peripherally outward from said contact side surface, and beyond at least a portion of the contact surface peripheral edge, and said locking second shoulder portion extending peripherally outward from said contact side surface, and beyond at least a portion of the side wall peripheral edge, an integrated circuit die attached to the support surface of the die attach pad, and having a plurality of bond pads thereon; a plurality of bonding wires that electrically couple the respective bond pads to the interior surfaces of associated ones of the contacts; and an encapsulating cap that is unitarily molded over the integrated circuit die, the die attach pad and the contacts thereby encapsulating the bonding wires, said cap having a bottm molding surface and a plurality of side walls, and the cap bottom molding surface and cap side walls intersecting to define a cap peripheral edge thereof, the cap being configured such that the pad exposed surface of the die attach pad and the exposed contact surface of each contact beint exposed and substantially coplanar with the cap bottom molding surface, and each exposed contact side wall portion of a respective contact being substantially flush with a respective side wall of the encapsulating cap, while said cap substantially completely covering the interior surfaces of the contacts, and such that each exposed common contact edge portion of the respective contact is in linear alignment with the cap peripheral edge, wherein the locking ledge portion of the die attach pad is subtended in the cap in a manner substantially preventing a pull-out of the attach pad in a direction away from the cap bottom molding surface, wherein the first shoulder portion of the tab member of each contact is subtended in the cap in a manner substantially preventing a pull-out of the contact in a direction away from the cap bottom molding surface, and wherein the second shoulder portion of the tab member of each contact is subtended in the cap in a manner substantially preventing a pull-out of the contact in a direction away from the cap side wall.