Patent ID: 7358565
Filing Date: 2008-04-15
Classification: H01L

Abstract:
1. An insulated gate semiconductor device comprising: a semiconductor substrate having a first major surface and a second major surface; a first base layer of a first conductivity type formed between said first major surface and said second major surface of said semiconductor substrate; a second base layer of a second conductivity type formed on said first major surface of said semiconductor substrate; a carrier stored layer of a first conductivity type formed between said first base layer and said second base layer of said semiconductor substrate, and having a high-concentration impurity layer that has a higher impurity concentration than said first base layer; an emitter layer selectively formed in said second base layer of said semiconductor substrate, and having a predetermined distance from said carrier stored layer; a trench extending from said first major surface of said semiconductor substrate through said emitter layer and said second base layer; an insulating film covering the inner surface of said trench; an electrode buried in said trench through said insulating film; and a collector layer of a second conductivity type formed on said second major surface of said semiconductor substrate, wherein said high-concentration impurity layer has a thickness of 1.5 μm or more, and the impurity concentration of said high-concentration impurity layer has a constant value of 1.0×10