Patent ID: 9081698
Filing Date: 2015-07-14
Classification: G06F

Abstract:
1. A method of storing data in and reading data from a memory having a data storage element having a plurality of lines, each of said plurality of lines having a plurality of segments, each of said plurality of segments having a plurality of data bits, a plurality of error correction codes each associated with said plurality of segments associated with each one of said plurality of lines, and a plurality of validity bits each associated with one of said plurality of lines, comprising the steps of: storing a plurality of data bits into one of said plurality of segments of one of said plurality of lines without modifying any of said plurality of data bits associated with other of said plurality of segments associated with said one of said plurality of lines and without generating said plurality of error correction codes associated with said one of said plurality of lines; marking, as a result of said storing step, one of said plurality validity bits associated with said one of said plurality of lines to indicate that said one of said plurality of error correction codes associated with said one of said plurality of lines as being invalid; then periodically and subsequent to said storing step, generating one of said plurality of error correction codes for all of said plurality of data bits in said plurality of segments associated with said one of said plurality of lines; and then marking one of said plurality validity bits associated with said one of said plurality of lines to indicate that said one of said plurality of error correction codes associated with said one of said plurality of lines as being valid; reading a plurality of data associated with one of said plurality of segments wherein all of said plurality of data bits associated with said plurality of lines is activated during said reading step.