Patent ID: 7180129
Filing Date: 2007-02-20
Classification: C23C,H01L

Abstract:
1. A semiconductor device comprising: a substrate; a first gate electrode formed at an upper portion of the substrate; a source and a drain formed in the substrate at both sides of the first gate electrode; an etch stop layer formed on the substrate, including on the first gate electrode; an undoped insulating layer formed on the etch stop layer; and a doped insulating layer formed on the substrate, the etch stop layer, the undoped insulating layer, and the first gate electrode, wherein, for the doped insulating layer composition, a ratio of an oxidizing gas flow rate, a first carrier gas flow rate, a second carrier gas flow rate, a silicon source flow rate, a first impurity flow rate, and a second impurity flow rate is about 2.00–2.50:0.70–0.95:1:0.15–0.25:0.040–0.045:0.013–0.014, and wherein a flow rate of a second carrier gas is at least 4,000 sccm.