Patent ID: 7292474
Filing Date: 2007-11-06
Classification: G11C

Abstract:
1. A semiconductor integrated circuit device comprising: a memory cell array which has a non-volatile semiconductor memory arranged therein and includes a plurality of pages, each of the plurality of pages including an user region in which data can be rewritten by an user and a page flag region in which page flag data indicative of a current state of a corresponding page is written; a page buffer which temporarily holds data in units of page which is read from the memory cell array and data in units of page which is written in the memory cell array, the page buffer including an user page buffer section which temporarily holds user data which is written in the user region and read from the user region and a page flag page buffer section which temporarily holds page flag data which is written in the page flag region and read from the page flag region, the page flag data being recorded in the form of two levels in the nonvolatile semiconductor memory cell arranged in the page flag region, the user data being recorded in the form of mulutilevel in the non-volatile semiconductor memory cell arranged in the user region; and a plurality of bit lines which electrically connect the page buffer with the memory cell array.