Patent ID: 8482063
Filing Date: 2013-07-09
Classification: H01L

Abstract:
1. A high voltage semiconductor device, comprising: a substrate; a first-polarity buried layer formed in the substrate; a first second-polarity well region formed in the substrate, and located over the first-polarity buried layer; a second-polarity base region formed in the substrate, and disposed within the first second-polarity well region; a source region formed in the substrate, and disposed within the second-polarity base region; a first first-polarity well region formed in the substrate, and located over the first-polarity buried layer and closely around the first second-polarity well region; a first-polarity drift region formed in the substrate, and disposed within the first first-polarity well region; a gate structure disposed over the substrate, and located around the source region; a second second-polarity well region formed in the substrate, and located over the first-polarity buried layer and closely around the first first-polarity well region; a second first-polarity well region formed in the substrate, and located over the first-polarity buried layer and closely around the second second-polarity well region; and a drain contact region disposed within the first-polarity drift region.