Patent ID: 6498824
Filing Date: 2002-12-24
Classification: H03D,H04L

Abstract:
A clock recovery circuit, comprising:a voltage control oscillator; a filter circuit coupled to the voltage control oscillator; and a phase detector coupled to the filter circuit, the phase detector including a first latch having a data input, a clock input, and an output, a first multiplexer having at least first and second data inputs, a data output, and a select input coupled to ground such that the first multiplexer always selects the first data input of the first multiplexer, a second multiplexer having a first input coupled in parallel with the data input of the first multiplexer, a second input coupled to the output of the first latch, a select input coupled in parallel with the clock input of the first latch, and an output, and an exclusive-or gate having a first input coupled to the data output of the first multiplexer, a second input coupled to the output of the second multiplexer, and an output.