Patent ID: 6015726
Filing Date: 2000-01-18
Classification: H01L,Y10S

Abstract:
A method of producing a semiconductor device having a bipolar transistor and a CMOS transistor on a single semiconductor substrate, said method comprising the steps of:(a) forming a first conductivity type buried layer and a second conductivity type buried layer on said semiconductor substrate, and growing an epitaxial layer over an entire surface of said substrate;(b) forming a first insulation film for delimiting an active region of a bipolar transistor, an active region of a first conductivity type MOS transistor, and an active region of a second conductivity type MOS transistor;(c) forming a first conductivity type or a second conductivity type well to separate said active regions of said first and second conductivity type MOS transistors and said bipolar transistor;(d) forming a second insulation film on surfaces of said active regions of said bipolar transistor, said first conductivity type MOS transistor, and said second conductivity type MOS transistor;(e) forming an emitter contact hole through said second insulation film above said active region of said bipolar transistor and a collector contact hole through said first insulation film between said active region of said bipolar transistor and one of said active regions of said first and second conductivity type MOS transistors, the collector contact hole extending to said epitaxial layer;(f) forming a polysilicon layer over the second insulation film and within the emitter and collector contact holes; and(g) etching said polysilicon layer to form an emitter electrode above said active region of said bipolar transistor and gate electrodes above said active regions of said CMOS transistor.