Patent ID: 7148871
Filing Date: 2006-12-12
Classification: G09G

Abstract:
1. A liquid crystal display device driving method wherein said liquid crystal display device comprises: a pixel matrix having pixels including gate lines, data lines disposed orthogonally to said gate lines, and pixel transistors arranged at intersections between said gate lines and said data lines; a data driver circuit for supplying video signals from a video signal corresponding to a first pixel time period up to a video signal corresponding to a final pixel time period to different data lines every horizontal time period; a gate driver circuit for supplying a gate signal to a corresponding gate line every horizontal time period; a matrix substrate on which said data driver circuit and said gate driver circuit are formed; a liquid crystal sandwiched between said matrix substrate and a counter substrate on which a counter electrode common to all said pixels on said matrix substrate is arranged, wherein said data driver circuit comprises N switching blocks each having M switching elements, a scanning circuit for outputting an open/close control signal for each switching block, and M×P (P is a natural number) video signal wirings forming one set of M×N video signals from said video signal corresponding to a first pixel time period up to said video signal corresponding to a final pixel time period within the horizontal time period as one set; said M video signal wirings of an i-th set (one of i=1, 2, . . . , P) of the M×P video signal wirings are respectively connected to input terminals of the M switching elements of the i-th switching block, when viewed from the first switching block, and wherein said data lines are divided into blocks each having M data lines, wherein said M data lines of each block are respectively connected to output terminals of said M switching elements within each of the switching blocks from a first switching block up to a final switching block of the N switching blocks defined in blocks from a first block up to a final block, said driving method comprising: an outputting step wherein said scanning circuit outputs the open/close control signal synchronously with the M video signals supplied successively every P sets, and successively outputs every set of the P sets simultaneously within the set through the M×P video signal wirings in an arbitrary horizontal time period; a sampling step wherein the M video signals, which are supplied successively every P sets, successively every set of the P sets and simultaneously within the set, are sampled to the M data lines connected to the M switching elements so as to simultaneously conduct in the M switching elements of the switching block, wherein at a time instant when a first time period of a conduction time period when each of the M switching elements is in the conducting state elapses from a time instant of start of the conduction of the M switching elements of the switching block which are formerly caused to simultaneously conduct with the open/close control signal supplied from the scanning circuit, the open/close control signal is supplied from the scanning circuit to the switching block in which the M switching elements simultaneously conduct subsequent to M switching elements of the switching block which are formerly caused to simultaneously conduct with the open/close control signal supplied from the scanning circuit; and a writing step wherein the M video signals that are sampled individually are respectively written to the M pixels of the set including the M pixel transistors, and are caused to simultaneously conduct through the M pixel transistors of the set every set of M pixel transistors which are connected to the gate lines through which the gate driver circuit supplies the gate signal during the arbitrary horizontal time period and which simultaneously conduct, wherein the M video signals supplied through the M video signal wirings for each set of the P sets are the video signals the polarity of which is changed with respect to the counter electrode between the first time period and a second time period as the remaining time period of the conduction time period following the first time period.