Patent ID: 7683972
Filing Date: 2010-03-23
Classification: G09G,H04N

Abstract:
1. A video signal processing apparatus comprising: a first clock generation circuit for generating a first clock synchronized with an input signal; a first video signal processing circuit for performing video signal processing using the first clock; a second clock generation circuit for generating a second clock according to a resolution of a pixel display; a writing control circuit for controlling writing of data into a memory by the first clock; a clock switch circuit for generating a sync signal that is switched to the second clock, using the sync signal generated with the first clock; a reading control circuit for controlling reading of data outputted from the memory, using the second clock; and a second video signal processing circuit for performing video signal processing using the second clock; an accumulation circuit for inputting a set value as a reference of an output frequency, and adding the set value for each reference clock; a memory for previously storing sinusoidal data or periodical data, and taking out the data according to an output value of the accumulation circuit; a D/A converter for converting the output data from the memory into an analog signal; a filter processing circuit for reducing quantization noise in the analog signal; and a multiply circuit for multiplying, by N (N: integer), a signal which has periodicity and is output from the filter processing circuit; and said second clock generation circuit generates a second clock.