Patent ID: 6096633
Filing Date: 2000-08-01
Classification: H01L

Abstract:
A method of forming a local interconnect that uses a dual damascene process, the method comprising the steps of:providing a substrate;forming a first insulating layer over the substrate;forming a pillar-shaped second insulating layer over the first insulating layer, wherein the first insulating layer and the second insulating layer are made from different materials;forming a first conductive layer over the first insulating layer and the second insulating layer;forming a third insulating layer over the first conductive layer, wherein the third insulating layer and the second insulating layer are made from different materials;polishing away a portion of the third insulating layer and the first conductive layer using a chemical-mechanical polishing method, stopping at an upper surface of the second insulating layer;forming a fourth insulating layer over the third insulating layer, the second insulating layer and the first insulating layer, wherein the fourth insulating layer and the second insulating layer are made from the same material;etching the fourth insulating layer using a mask layer to remove a portion of the fourth insulating layer over the second insulating layer and the entire second insulating layer to form a self-aligning via;forming a second conductive layer over the substrate such that the second conductive layer also fills completely the self-aligning via; andpolishing away a portion of the second conductive layer using a chemical-mechanical polishing method, stopping at an upper surface of the fourth insulating layer.