Patent ID: 8188537
Filing Date: 2012-05-29
Classification: H01L

Abstract:
1. A semiconductor device including a MOS transistor, comprising: a first MOS transistor, comprising: a first semiconductor pillar; one of a first drain region and a first source region formed in contact with a lower part of the first semiconductor pillar; a first gate formed around a sidewall of the semiconductor pillar through a first dielectric film therebetween; and an epitaxial semiconductor layer formed on a top surface of the first semiconductor pillar, wherein the other of the first source region and the first drain region is formed so as to be at least partially in the epitaxial semiconductor layer, and wherein: the other of the first source region and the first drain region has a top surface having an area greater than that of the top surface of the semiconductor pillar; and a second MOS transistor, comprising: a second semiconductor pillar; and one of a second drain region and a second source region formed in contact with a lower part of the second semiconductor pillar and directly connected with one of the first drain region and the first source region without a field oxide; and the other of the second source region and the second drain region; wherein the other of the first source region and the first drain region has an opposite conductivity type to that of the other of the second drain region and the second source region and the other of the first source region and the first drain region forms no junction with the other of the second drain region and the second source region.