Patent ID: 6562697
Filing Date: 2003-05-13
Classification: H01L

Abstract:
A method of forming integrated circuits having active areas and isolation structures, the method comprising:forming a recess in an integrated circuit substrate; forming a layer that fills the recess and extends onto the substrate adjacent to a mask on the substrate to provide an isolation structure; removing a portion of the layer from an area of the substrate adjacent to the isolation structure and avoiding removing the mask on an active area of the substrate, wherein removing a portion of the layer comprises isotropically etching the layer; implanting first ions into the active area using the mask to provide a first concentration of ions in the area adjacent to the isolation structure and between a source region and a drain region of the integrated circuit; removing the mask; and implanting second ions into the active area to provide a second concentration of ions in the active area and to increase the first concentration to a third concentration of ions in the area of the substrate adjacent to the isolation structure that is greater than the second concentration; the method further comprising forming an oxide layer in the recess and on the active area outside the recess and adjacent to the mask; and removing a portion of the oxide layer to reduce the oxide layer to a level that is less than a height of the mask.