Patent ID: 7659837
Filing Date: 2010-02-09
Classification: H03M,H04L

Abstract:
1. An operation processing apparatus for performing a data conversion on input bits, comprising: a logic circuit including a plurality of selectors arranged in hierarchical layers having a bottom layer and a top layer, the plurality of selectors being controlled by select signals that are based on the input bits and are inputted into the selectors, wherein selectors in the bottom layer receive constant values and select a set of the constant values based on the select signals, the selected constant values being transferred to selectors in layers higher than the bottom layer, such that an output bit corresponding to the input bits is outputted by a selector in the top layer; and a control unit for controlling the data conversion process such that a pre-charge phase and an evaluation phase are performed alternately in the logic circuit, wherein input values represented by the select signals are set to be equal during the pre-charge phase, and the output bit is generated during the evaluation phase, the evaluation phase being performed when the select signals are switched to change the pre-charge phase.