Patent ID: 6879522
Filing Date: 2005-04-12
Classification: G11C

Abstract:
1. A method of manufacturing a memory device comprising: forming a first array of memory cells on a first substrate; forming a first read only memory device on said first substrate; programming a first plurality of micro-instructions into said first read only memory device; forming a first write-state machine circuit on said first substrate, said first write-state machine adapted to operate according to said first plurality of micro-instructions to produce a first result on said first array of memory cells; forming a second array of memory cells on a second substrate; forming a second read-only memory device on said second substrate; programming a second plurality of micro-instructions, different from said first plurality of micro-instructions, into said second read-only memory device; and forming a second write-state machine circuit on said second substrate, said second write-state machine circuit being substantially identical to said first write-state machine circuit, said second write-state machine adapted to operate according to said second plurality of micro-instructions to produce a second result on said array of memory cells, said first and second results differing according to said difference between said first plurality of micro-instructions and said second plurality of micro-instructions.