Patent ID: 6780023
Filing Date: 2004-08-24
Classification: H01L,H05K,Y02P,Y10S

Abstract:
A printed wiring board comprising:a substrate having a packaging area to mount a ball grid array type semiconductor package, the packaging area including a stepped concave surface comprising a plurality of pad support portions in which the depths increase in stages from a periphery towards a center direction, the semiconductor package comprising: a package substrate to mount an IC chip; and a plurality of solder balls arranged in a grid on the package substrate, wherein the diameters of the solder balls become smaller in stages from a center of the packaging area toward a periphery direction; a plurality of pads arranged in a grid on the pad support portions of said stepped concave surface, said pads being electrically connected to the solder balls of the semiconductor package, wherein the size of said pads becomes smaller in stages from a center of the packaging area towards a periphery direction thereby making each pad connect equally with a corresponding solder ball of the semiconductor package; and a plurality of conductive patterns formed on the packaging area and connected to each of said pads, wherein at least a few of said conductive patterns are led out of said packaging area passing through adjacent pads.