Patent ID: 6067536
Filing Date: 2000-05-23
Classification: G06K,G06N,G10L

Abstract:
A neural network circuit comprising a plurality of neurons composing at least one layer and each having an output terminal and a plurality of input terminals, in which a set of input data are given to each of the input terminals of the neurons to obtain respective outputs of the neurons and are recognized on the basis of the respective outputs, said neural network circuit comprising:a weight memory for storing a plurality of initially learned weight values which respectively correspond to the input terminals of the neurons, the weight memory being formed of a read-only memory (ROM);a difference value memory for storing difference values between the respective initially learned weight values stored in the weight memory and respective additionally learned weight values which respectively correspond to the initially learned weight values stored in the weight memory, the difference value memory being formed of a random-access memory (RAM) from which data can be read and into which data can be written; andcalculating means for calculating respective output values of the neurons on the basis of the set of input data given, the initially learned weight values of the weight memory and the difference values of the difference value memory when recognizing the set of input data.