Patent ID: 6472324
Filing Date: 2002-10-29
Classification: H01L

Abstract:
A method of manufacturing a trench type semiconductor element isolation structure comprising steps of:(i) forming a silicon oxide film on a silicon substrate and forming a silicon nitride film on the silicon oxide film; (ii) forming a trench penetrating the silicon nitride film and the silicon oxide film, said trench reaching an interior of the silicon substrate; (iii) forming a thermal silicon oxide film on an inner wall of said trench; (iv) depositing a silicon oxide in said trench; (v) subjecting said silicon oxide to a polishing treatment with the silicon nitride film used as a stopper layer leaving said silicon oxide only in the trench; (vi) etching the silicon oxide by an amount according to at least one of the thickness of the silicon nitride film after the steps (i), (ii) and (v) and heights of the silicon oxide after the steps (iv) and (v); (vii) etching the silicon nitride film after completing the step (vi); and (viii) etching the silicon oxide film after completing the step (vii).