Patent ID: 7433438
Filing Date: 2008-10-07
Classification: H04N

Abstract:
1. A vestigial side band (VSB) synchronization (sync) signal detection circuit, comprising: a data selector selecting one of a first data signal and a second data signal for output; a pseudo-random number a comparison buffer unit receiving the correlation values exceeding the first threshold from the PN a sync signal position determination unit receiving the second control signal, determining positions of a next field sync signal and one or more segment sync signals, and generating a fourth control signal containing information regarding the positions of the next field sync signal and one or more segment sync signals based on the received second control signal; a sync signal valid determination unit receiving the third and fourth control signals and generating at least one valid detection signal indicating that a generated field sync signal is valid based on a level of the third control signal and a level of the fourth control signal; a finite state machine (FSM) that generates an internal lock signal in response to a valid detection signal, wherein the internal lock signal is fed back to the sync signal valid determination unit; a pseudo-random number a sync signal generator outputting one or more distinct types of sync signals in response to the first control signal, fourth control signal, fifth control signal, and internal lock signal.