Patent ID: 6426654
Filing Date: 2002-07-30
Classification: G06F,H03K,H04L

Abstract:
A signal transmission circuit for transmitting signals represented in plural bits from a first circuit block placed on a semiconductor chip to a second circuit block placed thereon, wherein signal paths for the respective bits are identical in circuit configuration to one another, and the respective signal paths are partitioned into a plurality of signal transmission sections connected in tandem,each of the signal transmission sections corresponding to odd numbers in said plurality of signal transmission sections of the signal paths for the respective bits including, a first signal line for transmitting a signal to a circuit corresponding to a subsequent stage; first precharge means connected to a plurality of nodes of said first signal line and for precharging said first signal line to a first potential through each individuals of said plurality of nodes; and first driving means for driving said signal line to a second potential according to an input from a circuit corresponding to a preceding stage; each of the signal transmission sections corresponding to even numbers in said plurality of signal transmission sections of the signal paths for the respective bits including, a second signal line for transferring a signal to a circuit corresponding to a subsequent circuit; second precharge means connected to a plurality of nodes of said second signal line and for precharging said second signal line to the second potential through each individuals of said plurality of nodes; and second driving means for driving said signal line to the first potential according to an input from a circuit corresponding to a preceding stage.