Patent ID: 6622204
Filing Date: 2003-09-16
Classification: G11C

Abstract:
An apparatus comprising:a programmable logic device comprising one or more memory blocks configured as content-addressable memory, each memory block comprising a plurality of memory words and having arbitrarily adjustable tag and data widths, wherein (i) when said tag width is equal to or less than a word size of said content-addressable memory, said tag is matched to any word of said content-addressable memory, (ii) when said tag width is larger than said word size of said content-addressable memory, a first portion of said tag is matched to each word of said content-addressable memory having a start of tag indicator, and (iii) when a match is found to said first portion of said tag, one or more remaining portions of said tag is matched to each word of said content-addressable memory without said start of tag indicator.