Patent ID: 9159579
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A method for patterning a semiconductor device comprising: forming a plurality of mandrels over a substrate; forming a multilayer spacer layer over the plurality of mandrels, the forming the multilayer spacer layer comprising: conformably depositing a first spacer layer over the plurality of mandrels; wherein the conformably depositing the first spacer layer comprises conformably depositing the first spacer layer to have a first width, and treating the first spacer layer with plasma prior to any etching of the first spacer layer, wherein after the treating the first spacer layer with plasma, a lateral portion of the first spacer layer disposed between first and second mandrels of the plurality of mandrels has a second width thinner than the first width; and forming a multilayer spacer by removing a top portion of the multilayer spacer layer to expose the plurality of mandrels.