Patent ID: 6226758
Filing Date: 2001-05-01
Classification: G11B,H03H

Abstract:
A sample rate converter for converting an input sample frequency F.sub.s1 of a signal carrying digital data formatted in blocks of a predetermined size to an output sample frequency F.sub.s2 comprising:a first register receiving digital data, the first register is clocked by a first clock signal having a frequency F.sub.s1 ;a memory coupled to an output of the first register, the memory partitioned into at least three pages, each of the at least three pages having sufficient capacity to store a block of the digital data;a second register coupled to an output of the memory, the second register is clocked by a second clock signal having a frequency F.sub.s2 ; anda controller coupled to the memory, the controller arbitrating access requests to the memory, the controller performing the access requests including transferring data from the first register to the memory, transferring the block of the digital data between the at least three pages, performing read and write operations on the block of the digital data contained in the memory, and transferring the block of the digital data from the memory to the second register, so that the frequency F.sub.s1 of a signal carrying the block of the digital data is converted to another signal having the frequency F.sub.s2.