Patent ID: 6787908
Filing Date: 2004-09-07
Classification: H01L

Abstract:
A semiconductor chip having circuitry, the semiconductor chip comprising:a metal bond pad over the circuitry and insulated on at least two sides by passivation material; a diffusion barrier layer over the metal bond pad, at least two entire sides of the diffusion barrier layer being insulated by the passivation material, wherein the diffusion barrier layer includes TiN; and a metal layer over the circuitry, the metal bond pad, the diffusion barrier layer, and at least partially over, and in contact with, a portion of the passivation material not over the diffusion barrier layer, the metal layer being configured and arranged for connecting to a wire bond, wherein the diffusion barrier layer is constructed and arranged to mitigate inter-metallic compounds forming as a reaction to the metal layer connecting to the wire bond.