Patent ID: 8421224
Filing Date: 2013-04-16
Classification: G06K,H01L

Abstract:
1. A semiconductor chip having a double bump structure, the semiconductor chip comprising: a semiconductor substrate; a circuit region on a surface of the semiconductor substrate; a pad on the semiconductor substrate and connected to the circuit region; a first bump on the pad; and a second bump on the first bump, the second bump disposed asymmetrically relative to two opposite sides of the first bump, the second bump being arranged at one side of an upper surface of the first bump, the upper surface of the first bump including a test area configured to interface with a probe tip, wherein the test area is an area of the upper surface of the first bump exposed by the second bump, a width of the test area being in the range of about 1.5 to about 4.5 times of a diameter of the probe tip.