Patent ID: 9006802
Filing Date: 2015-04-14
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising: providing a workpiece; forming a first sub-layer of a gate dielectric layer over the workpiece using a first plasma power level; forming a second sub-layer of the gate dielectric layer over the first sub-layer of the gate dielectric layer using a second plasma power level different from the first plasma power level; and annealing the workpiece after the forming the second sub-layer of the gate dielectric layer and while the second sub-layer of the gate dielectric layer is free of overlying layers wherein the annealing improves a material of the gate dielectric layer, removes charge caused by plasma processes used during the forming the first sub-layer or the forming the second sub-layer, and improves the interface quality of the gate dielectric layer.