Patent ID: 7335549
Filing Date: 2008-02-26
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device which includes a semiconductor layer provided on a buried insulating film on a substrate, and device-isolation regions dividing the semiconductor layer into a plurality of active regions, and in which a first transistor having a channel of a first conductivity type is provided in a first active region of the active regions, and a second transistor having a channel of a second conductivity type is provided in a second active region of the active regions, the method comprising the steps of: (a) implanting ions of an impurity of the second conductivity type into a region of the first active region in which a first body region is to be formed; (b) implanting ions of an impurity of the first conductivity type into a region of the first active region, which is spaced apart from the first body region and in which a first drain offset region is to be formed, at a higher energy than that of the step (a); (c) forming the first body region and the first drain offset region by heat treatment in such a manner that the first body region has a second-conductivity-type-impurity concentration peak in a surface region of the semiconductor layer, while the first drain offset region has a first-conductivity-type-impurity concentration peak in a deep portion located a certain depth-extent below the lower face of a thick film portion that is to be formed later; (d) forming by a LOCOS technique the thick film portion of a first gate insulating film, on a region of the first drain offset region which is other than the both end portions of the first drain offset region, and is closer to the drain; and (e) forming by a gate oxidation process a thin film portion of the first gate insulating film, which is connected to the thick film portion, on a region extending over from the first body region to the first-drain-offset-region end portion located closer to the source.