Patent ID: 8932942
Filing Date: 2015-01-13
Classification: H01L

Abstract:
1. Method of forming an electrical contact between a support wafer and a top silicon layer of a silicon-on-insulator wafer, the method comprising the following steps: etching a cavity through the top silicon layer and the insulator layer and into the support wafer; performing a selective epitaxial step for growing an epitaxial layer of silicon inside the cavity up to the surface of the top silicon layer including growing the epitaxial layer from a side surface of the top silicon layer and from a bottom surface of the cavity such that a top portion of the epitaxial layer has a first crystalline structure and a bottom portion of the epitaxial layer has a second crystalline structure different from the first crystalline structure, wherein the top portion of the epitaxial layer has the same crystalline orientation as the adjacent surface of the top silicon layer.