Patent ID: 7550331
Filing Date: 2009-06-23
Classification: H01L

Abstract:
1. A method of fabricating a multi-channel type thin film transistor, comprising: forming a plurality of active layers on a substrate extending along a first direction, the plurality of active layers extending parallel to and spaced apart from each other, each of the plurality of active layers including a channel region overlapped with a gate electrode, a source region, a drain region, and lightly doped drain (LDD) regions, one between the channel region and the source region and another one between the channel region and the drain region; forming a gate-insulating layer on the plurality of active layers; forming the gate electrode on the gate-insulating layer extending along a second direction crossing the first direction, the gate electrode overlapping the channel region; doping the LDD region with impurities of a first concentration, the LDD regions of the adjacent active layers have different lengths from each other; doping the source and drain regions with impurities of a second concentration larger than the first concentration; and forming source and drain electrodes over the gate electrode extending along the second direction, the source and drain electrodes spaced apart from each other and connected to the source and drain regions.