Patent ID: 8324513
Filing Date: 2012-12-04
Classification: H01L

Abstract:
1. A wiring substrate comprising: a core substrate including a first wiring layer formed on the first surface and electrically connected to a portion of the plural linear conductors at the first surface; a second wiring layer formed on the second surface and electrically connected to the portion of the plural linear conductors at the second surface; a first insulating layer being formed on the first surface in a manner covering the first wiring layer and including a first through-hole; a third wiring layer formed on the first insulating layer and electrically connected to the first wiring layer via the first through-hole; a second insulating layer being formed on the second surface in a manner covering the second wiring layer and including a second through-hole; and a fourth wiring layer formed on the second insulating layer and electrically connected to the second wiring layer via the second through-hole; wherein the first and second wiring layers are electrically connected to each other via the portion of the plural linear conductors, wherein the first wiring layer, the second wiring layer, the third wiring layer, and the fourth wiring layer include a signal wiring, wherein the first wiring layer, the second wiring layer, and the third wiring layer include a ground wiring, wherein the plural linear conductors include a first group of linear conductors connected to the ground wiring and a second group of linear conductors connected to the signal wiring, wherein the first group of linear conductors is positioned at a periphery of the second group of linear conductors.