Patent ID: 7411439
Filing Date: 2008-08-12
Classification: H03K

Abstract:
1. A circuit for coupling a logic signal from a circuit input to a circuit output, the circuit comprising: a parallel connection of a first circuit branch and a second circuit branch, wherein an inverter in the first circuit branch powered as last inverter in this branch via first supply terminals, via which a first supply potential and a first reference potential are supplied, and an inverter in the second circuit branch powered as first inverter in this circuit branch via second supply voltage terminals, via which a second supply potential and a second reference potential are supplied, receive the same logic value of the logic signal, wherein outputs of the two circuit branches are connected to each other and coupled to the circuit output, wherein the circuit is arranged on a chip, the chip having on-chip potential rails for guiding the first supply potential and the first reference potential, wherein there also are potential feeds for providing the second supply potential and the second reference potential on the chip, wherein the on-chip potential rails are separated from the potential feeds for providing the second supply potential and the second reference potential, wherein the first circuit branch consists of a series connection of n transmission stages configured to transmit a signal from the input of the first circuit branch to the output of the first circuit branch, wherein n>1; wherein the first m transmission stages, counted from the input of the first circuit branch, are coupled to the first supply potential and the first reference potential; wherein the last (n-m) transmission stages are coupled to the second supply potential and the second reference potential; wherein 0<m<n; wherein the second circuit branch consists of a series connection of q transmission stages configured to transmit a signal from an input of the second circuit branch to an output of the second circuit branch, wherein q>1; wherein the first p transmission stages, counted from the input of the second circuit branch, are coupled to the first supply potential and the first reference potential; wherein the last (q-p) transmission stages are coupled to the second supply potential and the second reference potential; and wherein 0<p<q.