Patent ID: 8261043
Filing Date: 2012-09-04
Classification: G06F

Abstract:
1. A method for performing high speed merging and sorting of two or more data streams comprising: loading a first set of sorted data elements from a first sorted input stream into a first hardware vector register, and loading a second set of sorted data elements from a second sorted input stream into a second hardware vector register, wherein the quantity of data elements loaded into the first register is equal to the quantity of data elements loaded into the second register; using single instruction multiple data (SIMD) instructions for performing a merge sort operation resulting in combining data elements loaded into said vector registers into a single sorted sequence, said merge sort operation based upon comparison of data elements from the first and second vector registers; placing first and second portions of the single sorted sequence into the first and second vector registers, respectively, wherein the first vector register contains a first sorted portion of the sequence with smaller data elements and the second vector register contains a second sorted portion of the sequence with larger data elements; placing contents of the first vector register with the smaller data elements into a single output stream; and loading a next set of sorted data elements from one of the input streams into the first vector register and repeating the merge sort operation and output of sorted data elements into the single output stream until the input streams are completely merged, including removing duplicate data elements from the single output stream in an operation selected from the group consisting of: removing duplicate data elements collectively when the first and second input streams are completely merged, and removing duplicate data elements by comparing proximate elements each time elements of the first vector register are placed into the single output stream.