Patent ID: 6432755
Filing Date: 2002-08-13
Classification: H01L

Abstract:
A method for manufacturing a thin film transistor comprising the steps of:forming an electrically conductive film on a substrate; patterning the electrically conductive film so as to form a gate electrode; forming a gate insulation film so as to cover the gate electrode, a semiconductor film, a doped semiconductor film doped with an impurity, and a barrier metal film in that order; patterning the barrier metal film, the doped semiconductor film, and the semiconductor film so as to form a laminated island having a semiconductor active layer formed of the semiconductor film, the doped semiconductor film, and the barrier metal film; forming a copper film so as to cover the laminated island and the gate insulation film; patterning the copper film so as to form a source electrode and a drain electrode extending from the laminated island onto the gate insulation film; and removing the barrier metal film and the doped semiconductor film by etching using the source electrode and the drain electrode as a mask so that ohmic contact layers formed of the doped semiconductor film and patterned layers formed of the barrier metal film are present above two edge portions of the semiconductor active layer.