Patent ID: 6469563
Filing Date: 2002-10-22
Classification: H03K

Abstract:
A circuit configuration for compensating runtime and pulse-duty-factor difference of two input signals having substantially equal frequency and phase, which comprises:a first input receiving a first input signal; a second input receiving a second input signal; an output for outputting an output signal; a first signal path from said first input to said output and a second signal path from said second input to said output, wherein each of said signal paths is influenced such that the output signal follows a first-changing input signal of said input signals; and a time-delay element connected between said output and said first and second inputs, for a delayed feedback of the output signal, wherein a delay time of said time delay element is such that said first and second inputs are prepared for a next change of the input signals, and said delay time is greater than a maximum chronological deviation between the first and second input signals.