Patent ID: 7288447
Filing Date: 2007-10-30
Classification: H01L

Abstract:
1. A method for forming a semiconductor device structure, comprising: providing a semiconductor-on-insulator substrate, having a semiconductor active layer, an insulation layer, and a semiconductor substrate; forming a first isolation trench through the semiconductor active layer, the first isolation trench having a first isolation trench bottom, the first isolation trench bottom having a first region and a second region; forming a second isolation trench through the semiconductor active layer, the second isolation trench having a second isolation trench bottom; forming a third isolation trench through the semiconductor active layer, the third isolation trench having a third isolation trench bottom; depositing a diffusion barrier layer on the first, second, and third isolation trench bottoms; and selectively removing the diffusion barrier layer in the first region of the first isolation trench bottom and in the entire second isolation trench bottom, without removing the diffusion barrier layer in the second region of the first isolation trench bottom and without removing the diffusion barrier layer in the third isolation trench bottom, wherein lattice stress in the semiconductor active layer is affected by proximity to the diffusion barrier layer; wherein said step of selectively removing the diffusion barrier layer comprises: wherein said step of depositing the diffusion barrier layer comprises: