Patent ID: 6209075
Filing Date: 2001-03-27
Classification: G01R,G06F

Abstract:
A method for reconfiguring an integrated circuit, the method comprising the steps of:a) reconfiguring, in response to a determination that an internal memory is insufficient for a particular function, the internal memory deposited on a die from an X K by Y bit configuration to an X* n K by Y/n bit configuration to produce reconfigured memory;b) extending an addressing bus to external memory, such that a processing device deposited on the die addresses the reconfigured memory and the external memory as a single addressable memory;c) combining an internal data bus with an external data bus that is coupled to the external memory; andd) testing the reconfigured memory and the external memory to determine whether the processing device can access the internal memory and the external memory as the single addressable memory as a Y-bit word.