Patent ID: 6542040
Filing Date: 2003-04-01
Classification: H03L

Abstract:
An integrated phase-locked loop circuit, comprising:a programmable tapped-delay-line oscillator outputting an oscillating signal SOUT, the programmable tapped-delay-line oscillator having a tap select input lead and a power input lead; a loop divider that generates a feedback signal SOSC from signal SOUT; a first phase detector having an output lead coupled to the tap select input lead of the programmable tapped-delay-line oscillator, the first phase detector outputting a digital tap control signal onto the tap select input lead of the programmable tapped-delay-line oscillator such that a frequency of signal SOSC approximates a frequency FIN of an input signal SIN in a frequency lock step; and a second phase detector having an output lead coupled to the power input lead of the programmable tapped-delay-line oscillator, the second phase detector controlling a supply voltage on the power input lead of the programmable tapped-delay-line oscillator such that the signal SOUT is phase locked with respect to the input signal SIN.