Patent ID: 6207579
Filing Date: 2001-03-27
Classification: H01L

Abstract:
A method of fabricating a self-aligned storage node, comprising steps of:forming a first insulating layer on a substrate;forming a preserve layer on the first insulating layer;forming a bit line contact and a storage node contact in the preserve layer and the first insulating layer, wherein the bit line contact and the storage node contact are in contact with a source/drain region in the substrate;forming a second insulating layer on the bit line contact, the storage node contact, and the preserve layer;forming a storage node plug and a cap layer in a second insulating layer, wherein the cap layer is formed on the storage node plug, and the storage node plug connects to the storage node contact;patterning the second insulating layer to form a first opening that exposes the bit line contact;forming a spacer on a sidewall of the first opening;forming a bit line in the opening to make contact with the bit line contact;forming a third insulating layer to cover the second insulating layer and the bit line; andpatterning the third insulating layer, the cap layer, and the second insulating layer to form a second opening exposing the storage node contact; andforming a first conductive layer in the second opening.