Patent ID: 7987407
Filing Date: 2011-07-26
Classification: G06F

Abstract:
1. A data processing apparatus comprising: processing circuitry for performing data processing operations; cache storage having a plurality of cache records for storing data values for access by the processing circuitry when performing said data processing operations, each cache record for storing one or more data values, an associated address indication for said one or more data values, and error detection data; cache control circuitry for controlling access to said cache storage, said cache control circuitry including error detection circuitry, responsive to a cache record of the cache storage being accessed, to perform an error detection operation to determine with reference to the error detection data stored in said cache record whether an error condition exists for said cache record; cache record error storage having at least one error record, each error record for storing a cache record identifier identifying a cache record for which said error condition has been detected, and an associated count value; on performance of said error detection operation for a currently accessed cache record, the error detection circuitry causing said cache record error storage to be accessed to determine whether the cache record identifier for said currently accessed cache record is already stored in the cache record error storage; if the cache record identifier for said currently accessed cache record is already stored in the cache record error storage, then if the error condition is detected on performance of said error detection operation, said count value associated with that cache record identifier is adjusted in a first direction, and if the error condition is not detected on performance of said error detection operation, said count value associated with that cache record identifier is adjusted in a second direction; if the cache record identifier for said currently accessed cache record is not already stored in the cache record error storage, and said error condition is detected on performance of said error detection operation, one of said at least one error records in the cache record error storage is allocated to store the cache record identifier for the currently accessed cache record, and the associated count value is set to a first value; on detection of said error condition when performing said error detection operation, the error detection circuitry further causing a correction operation to be performed in respect of the currently accessed cache record, and causing the access to the currently accessed cache record to be re-performed; the data processing apparatus further comprising a hard error storage having at least one hard error record, when the associated count value for a cache record identifier stored in the cache record error storage reaches a predetermined threshold value, said cache record identifier being stored in one of said at least one hard error records of the hard error storage; and any cache record whose cache record identifier is stored in the hard error storage being logically excluded from the plurality of cache records of the cache storage for the purposes of subsequent operation of the cache storage.