Patent ID: 6777728
Filing Date: 2004-08-17
Classification: H01L

Abstract:
A semiconductor device comprising:a channel layer; a gate electrode formed on said channel layer; a p-type source region formed on a first side of said channel layer; and a p-type drain region formed on a second side of said channel layer, wherein: a heavy-hole band and a light-hole band are separated by compressive strain applied isotropically in an in-plane direction in said channel layer; and a channel direction connecting said p-type source and drain regions is set substantially to a direction to maximize hole mobility in said channel layer; wherein: said channel layer is formed of a mixed crystal layer including at least Si and Ge, the mixed crystal layer being grown epitaxially on a Si substrate whose main surface is substantially a (001) crystal surface; the channel direction is set to a direction other than a <110> direction; and the channel direction is set at an angle within Â±25Â° to a <100> direction.