Patent ID: 8392667
Filing Date: 2013-03-05
Classification: G06F

Abstract:
1. In a computer system having a first processing unit, a second processing unit, a memory bridge, a system memory, and a bus that connects the second processing unit to the first processing unit, the memory bridge, and the system memory, a method for processing a read or write request at a second processing unit, comprising the steps of: receiving a read or write request at the second processing unit via the bus, wherein the read or write request is received via a first virtual channel implemented by a bus interface unit within the second processing unit; determining whether the read or write request includes a client identifier that indicates that the read or write request originated at the first processing unit; if the client identifier indicates that the read or write request originated at the first processing unit, then marking the read or write request as special, or if the client identifier indicates that the read or write request did not originate at the first processing unit, then marking the read or write request as not special; generating one or more derivative read requests at the second processing unit, wherein the one or more derivative read requests are associated with the read or write request; if the read or write request is marked as special, then marking the one or more derivative read requests as special, or if the read or write request is marked as not special, then marking the one or more derivative read requests as not special; transmitting the one or more derivative read requests to the system memory via the bus, wherein the one or more derivative read requests are associated with a second virtual channel implemented by the bus interface unit; receiving a completion of the one or more derivative read requests via the bus, wherein the completion is associated with the second virtual channel; and completing the original received read or write request.