Patent ID: 7102166
Filing Date: 2006-09-05
Classification: H01L

Abstract:
1. A semiconductor structure, comprising: (a) a semiconductor substrate comprising a first semiconductor material having a first lattice orientation; (b) a back gate region on the semiconductor substrate; (c) a back gate dielectric layer on the back gate region; (d) a semiconductor region on the back gate dielectric layer, wherein the semiconductor region is electrically insulated from the back gate region by the back gate dielectric layer, and wherein the semiconductor region comprises a second semiconductor material having a second lattice orientation different from the first lattice orientation; and (e) a field effect transistor (FET) formed of the semiconductor region, wherein changing a voltage potential applied to the back gate region causes a change in a threshold voltage of the FET, wherein a first top surface of the semiconductor substrate and a second top surface of the semiconductor region are essentially coplanar.