Patent ID: 6420783
Filing Date: 2002-07-16
Classification: H01L

Abstract:
A semiconductor device, comprising:a first semiconductor chip and a second semiconductor chip laminated with respective first main surfaces opposite to each other; a single lead frame having a plurality of signal leads each having an inner lead and an outer lead, the inner leads of the plurality of signal leads being arranged at the vicinity of one pair of opposed edges of the first and second semiconductor chips; a supporting lead, a part of which is arranged between the first main surface of the first semiconductor chip and the first main surface of the second semiconductor chip, the first and second semiconductor chips being disposed to have a space between the first main surfaces of the first and second semiconductor chips and being supported by the supporting lead; and a resin sealing body that seals the first semiconductor chip, the second semiconductor chip, the inner leads of the plurality of signal leads, and the supporting lead, the outer leads of the plurality of signal leads protruding outwardly from the resin sealing body, wherein: the respective first main surfaces of the first semiconductor chip and the second semiconductor chip are bonded to a part of the supporting lead via an adhesive layer; a part of the supporting lead is formed so that it has a smaller width than the respective sides of the first semiconductor chip and the second semiconductor chip; and a part of the resin sealing body is formed in the space between the first main surfaces of the first and second semiconductor chips.