Patent ID: 6614684
Filing Date: 2003-09-02
Classification: B82Y,G11C,H01L

Abstract:
A semiconductor integrated circuit device on a semiconductor substrate, comprising:a nonvolatile memory which comprises a nonvolatile memory cell including a pair of electrically programmable nonvolatile memory elements, each nonvolatile memory element having a source, a drain, a floating gate and a control gate, the control gates of the pair of nonvolatile memory elements being coupled to a word line, the drains of the pair of nonvolatile memory elements being respectively coupled to a pair of complementary data lines, and in which information items read out on the pair of complementary data lines in accordance with mutually different logical states of the pair of nonvolatile memory elements are amplified by a sense amplifier, wherein a selection voltage which is applied to the word line for the purpose of information readout from the nonvolatile memory elements is substantially equalized to an initial threshold voltage of the nonvolatile memory elements, wherein the source and the drain of each nonvolatile memory element are formed of a first and a second semiconductor region of a second conductivity type which are provided in a third semiconductor region of a first conductivity type in the semiconductor substrate; wherein the floating gate of each nonvolatile memory element is formed of a conductive layer which is arranged over a channel defined between the source and the drain, through a first gate insulating film; and wherein the control gate of each nonvolatile memory element is formed of a fourth semiconductor region of the second conductivity type in the semiconductor substrate which is arranged under a portion of the conductive layer extended from the floating gate, through a second gate insulating film.