Patent ID: 8288849
Filing Date: 2012-10-16
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first substrate comprising a front surface with circuit routings thereon and a back surface comprising a plurality of conductive pads electrically connected to the circuit routings; a first semiconductor die electrically connected to the plurality of conductive pads and attached to the first substrate; a second substrate comprising a front surface with circuit routings and a plurality of conductive pads thereon, wherein the circuit routings on the front surface of the second substrate are electrically connected to the plurality of conductive pads on the front surface of the second substrate; a second semiconductor die electrically connected and attached to the second substrate and comprising a plurality of through substrate vias (TSVs) therein; a third semiconductor die electrically connected to the second semiconductor die through the TSVs and attached to the second semiconductor die; a plurality of conductors which electrically connect the plurality of conductive pads on the back surface of the first substrate to the plurality of conductive pads on the front surface of the second substrate; a first connection type which electrically connects the first semiconductor die to the second semiconductor die; and a second connection type which electrically connects the third semiconductor die to the second semiconductor die, wherein the first connection type is different than the second connection type.