Patent ID: 9172254
Filing Date: 2015-10-27
Classification: B60L,H01M,H02J,Y02E,Y02P,Y02T

Abstract:
1. A switcher chip for use in interconnecting a set of cells, comprising: a main negative terminal; a cascading negative terminal; a main positive terminal; a cascading positive terminal; a plurality of cell terminals; and a plurality of switches, wherein the switcher chip is configured such that: when a set of cells are connected to the switcher chip via the plurality of cell terminals and a first subset of the plurality of switches are closed and the remainder of the switches are open, the set of cells are connected in parallel with each other and current is able to flow out the main positive terminal but is not able to flow out the cascading positive terminal, when a set of cells are connected to the switcher chip via the plurality of cell terminals and a second subset of the plurality of switches are closed and the remainder of the switches are open, the set of cells are connected in series with each other and current is able to flow out the main positive terminal but is not able to flow out the cascading positive terminal, when a set of cells are connected to the switcher chip via the plurality of cell terminals and a third subset of the plurality of switches are closed and the remainder of the switches are open, at least two of the cells in the set of cells are connected in series with each other and current is able to flow out the cascading positive terminal but is not able to flow out the main positive terminal, when a set of cells are connected to the switcher chip via the plurality of cell terminals and a fourth subset of the plurality of switches are closed and the remainder of the switches are open, a subset set of cells are connected in parallel with each other, at least one cell is electrically disconnected from each of the other cells, and current is able to flow out the main positive terminal but is not able to flow out the cascading positive terminal, and when a set of cells are connected to the switcher chip via the plurality of cell terminals and a fifth subset of the plurality of switches are closed and the remainder of the switches are open, a subset set of cells are connected in series with each other and at least one cell from the set is electrically disconnected from each of the other cells of the set.