Patent ID: 8174121
Filing Date: 2012-05-08
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate in which a first interlayer insulation layer having a first via hole and a first trench is formed; a first via plug and a first metal line respectively formed by filling the first via hole and the first trench with a first metal, a predetermined scratch being formed on the first metal line; a second insulation layer having a second via hole and a second trench, wherein the second insulation layer is disposed on the first interlayer insulation layer and the first metal line and formed by filling the predetermined scratch; and a second via plug and a second metal line respectively formed by filling the second via hole and the second trench with a second metal, the second metal lines being separated, wherein the second via plug is in contact with a flat top surface of the first metal line, and wherein the predetermined scratch does not overlap with the second via plug in a vertical direction.