Patent ID: 6536022
Filing Date: 2003-03-18
Classification: G06F

Abstract:
An automated method of analyzing crosstalk in a digital logic integrated circuit, the method operating on a digital computer, comprising the steps of:providing an extracted, parameterized netlist from a layout of the integrated circuit, the netlist describing a plurality of logic gates, a plurality of wires coupled to logic gates, and a plurality of coupling capacitances between wires of the plurality of wires; for at least one victim wire of the plurality of wires, determining a subset of the plurality of wires to be aggressor wires to the victim wire, the subset having at least one wire; determining at least one risetime of the aggressor wires; calculating a height of a coupled noise on the victim wire induced by the aggressor wires, the height dependant upon the risetime of the aggressor wires; determining an alarm threshold for the victim wire based upon a type of a logic gate that receives the victim wire; determining whether the height of a coupled noise on the victim wire exceeds the alarm threshold of the victim wire.