Patent ID: 9047977
Filing Date: 2015-06-02
Classification: G11C

Abstract:
1. A circuit for outputting a refresh execution signal to a memory cell of a memory device in an auto-refresh mode, the circuit comprising: a first frequency dividing unit for receiving an auto-refresh signal from outside of the memory device and generating a plurality of first divided signals; a first selection circuit for generating a selection signal selected from one of the auto-refresh signal and the first divided signals according to a data retention time of the memory cell; a second frequency dividing unit for dividing the frequency of the selection signal and generating a plurality of second divided signals; and a second selection circuit for generating the refresh execution signal from one of the selection signal and the second divided signals according to a temperature of the memory cell, wherein the first frequency dividing unit includes a first frequency divider configured to provide a first one of the first divided signals in response to the auto-refresh signal, and the first frequency dividing unit includes a second frequency divider configured to provide a second one of the first divided signals in response to the first one of the first divided signals.