Patent ID: 8994756
Filing Date: 2015-03-31
Classification: G09G

Abstract:
1. A display device comprising: a display region comprising a first region including a first pixel array, a second region including a second pixel array and a third region including a third pixel array, wherein the first region, the second region and the third region are configured to perform a display at the same time, wherein the first region excludes the second region and the third region and is smaller than the second region, wherein the third region excludes the second region and is smaller than the second region, and wherein the second region is between the first region and the third region; a source driver and a gate driver each electrically connected to the first region, the second region and the third region, and a circuit from which an analog signal and a digital signal supplied to the source driver are output, wherein the source driver is configured to drive the first pixel array exclusive of the second pixel array and the third pixel array in a digital display mode using a video signal consisting of a binary value, wherein the source driver is configured to drive the second pixel array exclusive of the first pixel array and the third pixel array in an analog display mode using a video signal consisting of the analog signal, wherein the source driver is configured to drive the third pixel array exclusive of the first pixel array and the second pixel array in a multi-valued display mode using a video signal consisting of a multi-valued digital signal which is different from the video signal consisting of the binary value and the video signal consisting of the analog signal, wherein the driving of the first pixel array in the digital display mode, the driving of the second pixel array in the analog display mode, and the driving of the third pixel array in the multi-valued display mode by the source driver occurs at the same time to perform the display, wherein the first pixel array of the first region comprises first pixels, each including a first TFT and a first display element, wherein the second pixel array of the second region comprises second pixels, each including a second TFT, a capacitor element, and a second display element, and wherein the capacitor element comprises a semiconductor layer, an insulating layer, and a conductive layer.