Patent ID: 7199618
Filing Date: 2007-04-03
Classification: H03K

Abstract:
1. A logic circuit arrangement comprising: at least two data signal inputs, at which at least two data input signals are provided; a first signal path having a plurality of first transistors of a first conduction type, said signal path being coupled to the data signal inputs, wherein said first transistors are arranged to realize a first logic function selected from the group consisting of a plurality of possible logic functions for the logic combination of the two data input signals, and wherein an output signal representing the result of the first logic function is provided; a second signal path having a plurality of second transistors of a second conduction type complementary with respect to the first conduction type, said second signal path being coupled to the data signal inputs, wherein the second transistors are arranged to realize a second logic function selected from the group consisting of a plurality of possible logic functions for the combination of the two data input signals; wherein an output signal representing the result of the second logic function is provided, and the result of the second logic function is the inverse of the result of the first logic function; and a plurality of control inputs coupled to the first transistors, said plurality of control inputs facilitating activation of a predeterminable signal propagation path, the predeterminable signal propagation path being formed by the first transistors or second transistors and wherein the first plurality of possible logic function and the second plurality of possible logic function define all possible logic functions for the logic combination of the two data input signals.