Patent ID: 9054172
Filing Date: 2015-06-09
Classification: H01L

Abstract:
1. A semiconductor structure having at least a contact plug, comprising: a substrate; a transistor disposed on the substrate, wherein the transistor comprises a gate and a source/drain region; a first inter-layer dielectric (ILD) layer disposed on the transistor, wherein a bottom surface of the first ILD layer is level with a top surface of the gate; a first contact plug disposed in the first ILD layer to electrically connect the source/drain region, wherein a top surface of the first contact plug is higher than a top surface of the gate; a second ILD layer disposed on the first ILD layer; a second contact plug disposed in the second ILD layer to electrically connect the first contact plug, wherein a bottom surface of the second contact plug is level with a top surface of the first ILD layer; and a third contact plug disposed in the first ILD layer and the second ILD layer to electrically connect the gate.