Patent ID: 7259052
Filing Date: 2007-08-21
Classification: G11C,H01L

Abstract:
1. A method of manufacture of a semiconductor integrated circuit device, comprising the steps of: (a) forming a plurality of columnar laminates having, at an upper portion and a lower portion thereof, a first semiconductor region and a second semiconductor region, respectively, while spacing the plurality of columnar laminates in a first direction and In a second direction wider than the first direction; (b) forming conductive films over the side walls of the columnar laminates via a first insulating film with a distance, in the first direction, between the conductive films over the sidewalls of the plurality of columnar laminates as a first distance and with a distance In the second direction as a second distance which is greater than the first distance; (c) forming a second insulating film to a thickness sufficient to fill a space of the first distance and but not sufficient to fill a space of the second distance; and (d) forming a third insulating film over the second insulating film and filling the space of the second distance (e) etching the second and third insulating films until the conductive film existing over the side walls of the first semiconductor region of the columnar laminate is exposed; and (f) etching the conductive film exposed by the step (e).