Patent ID: 8227702
Filing Date: 2012-07-24
Classification: H01L,H05K

Abstract:
1. A multilayer ceramic substrate in which a plurality of ceramic substrate layers are laminated, the multilayer ceramic substrate comprising: a surface layer terminal electrode which is provided at an outermost ceramic substrate layer on at least one side of a front side and a back side and which comprises a surface layer via electrode and a metal plating layer deposited over an end surface of the surface layer via electrode; and a via conductor which connects the surface layer terminal electrode and circuit patterns over an internal ceramic substrate layer, wherein the surface layer via electrode has it-s-the end surface in a via hole provided in the outermost ceramic substrate layer and at a level recessed from a surface of the outermost ceramic substrate layer, and a surface of the metal plating layer deposited over the end surface of the surface layer via electrode is at substantially same plane level as the surface of the outermost ceramic substrate layer or at a level recessed from the surface of the outermost ceramic substrate layer, wherein the metal plating layer matches, without a gap, at a boundary contacting an inner wall of the via hole.