Patent ID: 7952137
Filing Date: 2011-05-31
Classification: H01L

Abstract:
1. A trench semiconductor device, comprising: a semiconductor substrate including a top surface and a bottom surface, the semiconductor substrate comprising a first device area and a second device area defined thereon, at least a first trench penetrating the top surface, formed in the semiconductor substrate, and formed in the first device area, and at least a second trench penetrating the top surface, formed in the semiconductor substrate, and formed in the second device area; at least a trench MOS transistor device disposed in the first device area, the trench MOS transistor device comprising: a trench ESD protection device disposed in the second trench in the second device area, the trench ESD protection device comprising a first doped region and a second doped region, wherein the first doped region has a first dopant type, and the second doped region has a second dopant type distinct from the first dopant type; and a gate linking line disposed on the top surface of the semiconductor substrate, the gate linking line being electrically connected to the gate electrode of the trench MOS transistor device and the second doped region of the trench ESD protection device.