Patent ID: 8999789
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A method for manufacturing a super junction trench MOSFET comprising the steps of: forming a plurality of deep trenches in active area inside an epitaxial layer of a first conductivity type onto a substrate of said first conductivity type; carrying out angle ion implantations of said first conductivity type dopant and diffusion through said deep trenches to form a first doped column region of said first conductivity type with column shape within a mesa area between every two adjacent of said deep trenches; carrying out angle ion implantations of a second conductivity type dopant and diffusion through said deep trenches to form second doped column regions of said second conductivity type with column shape adjacent to sidewalls of said deep trenches, in parallel with and surrounding said first doped column region; forming a third doped column of said first conductivity type and a fourth doped column of said second conductivity through a deep trench in termination area simultaneously with said first doped column and said second doped column within said mesa, respectively; depositing a dielectric material with voids in said deep trenches; removing said dielectric material from top surface of said epitaxial layer; forming a pad oxide layer prior to forming body regions; and forming a channel stop region near the top surface of said epitaxial layer in said termination area and source regions in said active area at same step by carrying out source ion implantation.