Patent ID: 7312596
Filing Date: 2007-12-25
Classification: H02J

Abstract:
1. A device for equalizing a charge of serially connected capacitors belonging to a double layer capacitor, the double layer capacitor further having a positive terminal and a negative terminal, the device comprising: a plurality of single diodes; a switching transistor having a collector/drain terminal, a base/gate terminal and an emitter/source terminal; a first diode; a first resistor having a first terminal and a second terminal connected to the negative terminal of the double layer capacitor; a second resistor; a flyback transformer having a primary winding and a secondary winding wound in phase-opposition to one another, an end of winding of said primary winding connected to the positive terminal of the double layer capacitor and a start of said winding of said primary winding connected to said collector/drain terminal of said switching transistor, an end of said secondary winding of said flyback transformer connected directly to the negative terminal of the double layer capacitor, a start of said secondary winding connected by way of a series connection of said first diode and said second resistor to the negative terminal of the double layer capacitor; a first voltage comparator having an inverting input connected to said emitter/source terminal of said switching transistor and to said first terminal of said first resistor, an output, and an noninverting input receiving a first reference voltage; a first AND element having an output connected to said base/gate terminal of said switching transistor, first input receiving an external control signal, and a second input; a second AND element having an output connected to said second input of said first AND element, a first input connected to said output of said first voltage comparator, and a second input; a second voltage comparator having an inverting input connected to a connection point between said first diode and said second resistor, a noninverting input receiving the reference voltage, and an output connected to said second input of said second AND element; a monitoring unit having a first input connected to said output of said first voltage comparator, a second input connected to said output of said second voltage comparator, a third input connected to said inverting input of said second voltage comparator, a fourth input for receiving a second reference voltage, and an output outputting a status signal; and a plurality of single transformers each being wound inphase and having a primary winding and a secondary winding, a start of said secondary winding of each of said single transformers connected through one of said single diodes to a positive terminal of a single one of said capacitors, and an end of said secondary winding in each case connected directly to a negative terminal of said single capacitor assigned to it, said primary winding of said single transformers connected in parallel with each other, and a common start of said primary winding connected to a connection point between said first diode and said second resistor and a common end of said primary winding connected to the negative terminal and to said end of said secondary winding of said flyback transformer.