Patent ID: 8781118
Filing Date: 2014-07-15
Classification: H04L

Abstract:
1. A circuit for verifying a unique identity of an integrated circuit (IC), the circuit comprising: a random number generator (RNG) circuit; a key register that stores an encryption key, the encryption key being created by the RNG circuit during a power-on or user-applied signal initialization phase, wherein a multiplexor enables reading of the key register when a security bit is cleared; an encryption circuit that generates a response based on a challenge key and the encryption key; and selection circuitry that selectively outputs the encryption key or the response from the encryption circuit, wherein the encryption key is being output from the IC through the selection circuitry during the initialization phase, and wherein the response is being output from the IC through the selection circuitry after the initialization phase, and wherein the response is used to determine the unique identity of the IC.