Patent ID: 9118511
Filing Date: 2015-08-25
Classification: H04B,H04L

Abstract:
1. A distributed analog finite impulse response (AFIR) filter circuit comprising: a plurality of taps including delay sections, the plurality of taps comprising n taps where n is a positive integer greater than or equal to 2; input and output transmission lines each having terminal ends in communication with the plurality of taps the input and output transmission lines having first and second characteristic impedances, respectively; and first and second termination impedances provided in the terminal ends of the input and output transmission lines, respectively, the first and second termination impedances being mismatched with respect to the first and second characteristic impedances respectively, to create, by way of reflection through the delay sections due to the mismatched first and second termination impedances, n−1 additional signal paths and n−1 corresponding emulated taps to produce a reflective AFIR filter with 2n−1 effective tap delays.