Patent ID: 9214385
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: forming a passivation layer on at least one capping layer disposed on a substrate; forming an encapsulant layer on the passivation layer; forming opposing buffer regions on the passivation layer, the buffer regions defining therebetween an area of the passivation layer for forming a final via opening; after forming the buffer regions, patterning the encapsulant layer to expose a portion of the passivation layer and forming the final via opening in the passivation layer; depositing a conductive material in the final via opening; and planarizing the conductive material until reaching a remaining portion of the encapsulant layer such that the conductive material is flush with the encapsulant layer and the passivation layer is preserved.