Patent ID: 8679861
Filing Date: 2014-03-25
Classification: G01R,G06F,H01L

Abstract:
1. A method of forming a multi-chip assembly comprising: testing base semiconductor chips to identify a base semiconductor chip having less than a fully operational functionality that said at least one base semiconductor chip is designed for, wherein said identified base semiconductor chip comprises a non-functional chiplet and a functional chiplet having a coplanar top surface, wherein said non-functional chiplet does not provide a first functionality that said non-functional chiplet is designed for, and said functional chiplet provides a second functionality that said functional chiplet is designed for, said second functionality being different from said first functionality, and said fully operational functionality includes at least said first functionality and said second functionality; vertically stacking a repair semiconductor chip on or beneath said non-functional chiplet to form a multi-chip assembly, said repair semiconductor chip having said first functionality, and said functional chiplet does not overlie or underlie any semiconductor chip; and activating functional redundancies in said repair semiconductor chip employing a device located in said base semiconductor chip, wherein said repair semiconductor chip is configured to provide said first functionality to said multi-chip assembly upon activation of said functional redundancies so that said multi-chip assembly has exactly said fully operational functionality.