Patent ID: 8095343
Filing Date: 2012-01-10
Classification: G06F

Abstract:
1. A method for modeling source-drain current of a thin film transistor (TFT), comprising: (a) receiving experimentally determined sample data, the sample data including sample input values and a sample output value; (b) adjusting modeling variables of a modeling equation according to the sample input values; (c) calculating a model output value according to the adjusted modeling variables; (d) repeating steps (b) and (c) with the adjusted modeling variables until a difference between the calculated model output value and the sample output value is smaller than a predetermined threshold value, the adjusted modeling variables when the difference becomes smaller than the threshold value being used as final modeling variables for the modeling equation; applying values for V outputting a result value corresponding to the actual input data, wherein the modeling equation predicts the source-drain current of the TFT, wherein the modeling equation is I wherein the first current value is determined by equations: where V GF denotes a difference between a gate voltage and a flat band voltage, W denotes a channel width, C denotes gate insulating capacitance, L denotes a channel length, V D denotes a drain voltage, and K b and b denote modeling variable values, and wherein the second current value is determined by the following equation: where V