Patent ID: 9189323
Filing Date: 2015-11-17
Classification: G06F,G11C,H03M,H04L

Abstract:
1. A semiconductor storage device comprising: a nonvolatile semiconductor memory; a temporary storage buffer that temporarily stores a first data having a predetermined size, the first data being composed of a plurality of pieces of divided data; a coding processing unit that performs a first error correction coding process based on a second data which is one of the plurality of pieces of divided data, writes a redundancy data obtained by the first error correction coding process to the temporary storage buffer, performs a second error correction coding process based on the redundancy data read from the temporary storage buffer and another one of the plurality of pieces of divided data, performs write processing for writing the redundancy data obtained by the second error correction coding process and performs a subsequent error correction coding process and a subsequent write processing until the error correction coding process is finished for all of the plurality of pieces of divided data; and a memory interface that writes, to the nonvolatile semiconductor memory, the first data and the redundancy data obtained as a result of the error correction coding process after the error correction coding process is finished for all of the plurality pieces of divided data.