Patent ID: 7259024
Filing Date: 2007-08-21
Classification: H01L,Y10S

Abstract:
1. A method of treating a substrate in manufacturing a magnetoresistive memory cell, the method comprising: providing a substrate comprising: a semiconductor substrate; at least one metallization layer having a plurality of metallic regions formed above a surface of the semiconductor substrate; a first non-conductive layer comprising a non-conductive material formed above the metallization layer and provided with an electrical interconnection electrically connecting a first one of the metallic regions with a magnetoresistive junction element formed above the first non-conductive layer; and a second non-conductive layer comprising a non-conductive material formed above the first non-conductive layer at least over the magnetoresistive junction element and a second one of the metallic regions of the metallization layer; etching a first opening in the second non-conductive layer, wherein at least a portion of an upper surface of the magnetoresistive junction element is exposed; partially etching a second opening in the second non-conductive layer at least over the second metallic region; depositing a mask layer on the second non-conductive layer and structuring thereof to create a mask having a mask opening at least over the partially etched second opening; performing a cleaning operation on the substrate using the mask as protecting layer; fully etching the second opening, wherein at least a portion of the second metallic region is exposed; and removing the mask.