Patent ID: 6107191
Filing Date: 2000-08-22
Classification: H01L,Y10S

Abstract:
A method of creating an interconnect cavity extending to a previous interconnection level or a substrate containing a conductive layer formed in a first dielectric layer having a first etch rate, said method comprising:forming a second dielectric layer on said first dielectric layer, said second dielectric layer having a second etch rate slower than said first etch rate;forming a first patterned masking layer on said second dielectric layer;etching said second dielectric layer through said first masking layer to form an exposed portion of said second dielectric layer;patterning said first patterned masking layer a second time to form a second masking layer with an opening larger than said first masking layer;etching said first dielectric layer and second dielectric layer through said second patterned masking layer until said exposed portion is consumed to form a trench in said first dielectric layer; andetching the first dielectric layer such that the trench is extended to contact said previous interconnection level or said substrate.