Patent ID: 8546869
Filing Date: 2013-10-01
Classification: G11C,H01L

Abstract:
1. A nonvolatile memory device, comprising: a first stack of layers on a substrate, said first stack of layers comprising a first plurality of interlayer dielectric layers and a first plurality of word lines arranged vertically in an alternating sequence, said first plurality of word lines comprising a first dummy word line of a first dummy memory cell; a first opening extending through the first stack of layers; a first semiconductor active layer lining a sidewall of the first opening, said first semiconductor active layer extending opposite the first dummy word line; a second stack of layers on the first stack of layers, said second stack of layers comprising a second plurality of interlayer dielectric layers and a second plurality of word lines arranged vertically in an alternating sequence; a second opening extending through the second stack of layers, said second opening aligned with the first opening; and a second semiconductor active layer lining a sidewall of the second opening, said second semiconductor active layer electrically coupled to said first semiconductor active layer.