Patent ID: 6674998
Filing Date: 2004-01-06
Classification: H03D,H03L,H04B,H04L

Abstract:
A phase error detector for detecting and correcting phase error between positive and negative polarities of a first and second differential signals, the phase error detector comprising:a summing network that develops a first sum signal by summing the positive polarity signals of the first and second differential signals, a second sum signal by summing the negative polarity signals of the first and second differential signals, a third sum signal by summing the positive polarity signal of the first differential signal with the negative polarity signal of the second differential signal, and a fourth sum signal by summing the negative polarity signal of the first differential signal with the positive polarity signal of the second differential signal; a first mixer circuit, coupled to the summing network, that develops a first polarity signal of the phase error signal based on the first and second sum signals; and a second mixer circuit, coupled to the summing network, that develops a second polarity signal of the phase error signal based on the third and fourth sum signals.