Patent ID: 7336700
Filing Date: 2008-02-26
Classification: G06F

Abstract:
1. A transceiver for use within a multi-tier system bus configuration comprising: means for independently receiving instructions via a system bus from one or more devices connected to the system bus; means for independently transmitting instructions via the system bus to one or more devices connected to the system bus; means for buffering instructions received via the system bus to provide a separate receive buffering of control actions from direct memory access (DMA) operations for forward to a local processor bus; and means for buffering instructions transmitted via the local processor bus to provide a separate transmit buffering of control actions from DMA operations to be transmitted to the system bus; wherein said means for independently receiving instructions is configured to discriminate between different types of input; wherein said means for independently transmitting instructions is configured to interleave said instructions; and wherein access to the multi-tier system bus is arbitrated such that the control actions preempt the DMA operations.