Patent ID: 6292424
Filing Date: 2001-09-18
Classification: G11C

Abstract:
A microprocessor comprising:first input buffer of inverter type to which data and an instruction are input;an instruction register for storing an instruction input to said first input buffer;a program counter to which an operand address of an instruction input to said instruction register is input;a first output buffer operated on a power supply voltage supplied from the exterior, for receiving a memory address output from said program counter via an address bus and outputting the memory address to the exterior;a stack pointer for specifying a stack on a memory;a second input buffer for receiving a timing signal input from the exterior;a second output buffer operated on a power supply voltage supplied from the exterior, for outputting the timing signal to the exterior;a control circuit supplied with an operation code of an instruction input to said instruction register and a timing signal input to said second input buffer, for controlling said program counter and stack pointer and outputting the timing signal to said second output buffer;an ALU for receiving data input to said first input buffer via a data bus at one input terminal thereof and outputting the result of operation to the data bus;an accumulator for accumulating data input from the address bus and supplying accumulated data to the other input terminal of said ALU;a third output buffer operated on a power supply voltage supplied from the exterior, for outputting data on the data bus to the exterior;a first voltage lowering circuit of feedback type having a P-channel MOS transistor exclusively used for supplying a potential created by lowering the power supply voltage supplied from the exterior to said first and second input buffers as power supply voltages thereof; anda second voltage lowering circuit of source follower type having an N-channel MOS transistor exclusively used for supplying a potential created by lowering the power supply voltage supplied from the exterior to said instruction register, control circuit, program counter, stack pointer, ALU and accumulator as power supply voltages thereof.