Patent ID: 8493248
Filing Date: 2013-07-23
Classification: H03M

Abstract:
1. A transforming circuit between parallel data and serial data to convert parallel data to serial data, comprising: a current source; a clock input sub-circuit electrically connect to the current source; and a parallel data input sub-circuit electrically connect to the clock input sub-circuit; wherein the clock input sub-circuit includes a first clock signal terminal; and a second clock signal terminal, wherein the first and second signal terminal are inverted clock each other; the transforming circuit between the parallel data and serial data further including a serial data output control sub-circuit electrically connect with the parallel data input circuit; a clock control sub-circuit electrically connect with the serial data output control sub-circuit and the clock input sub-circuit; wherein the clock control sub-circuit comprises: a first switching element; a second switching element; a third switching element, and a fourth switching element; wherein the first switching element and the third switching element are controlled by the second clock signal terminal; wherein the second switching element and the fourth switching element are controlled by the first clock signal terminal; wherein the serial data output control sub-circuit comprises: a fifth switching element and a sixth switching element to speed up output data falling edge flip; a seventh switching element and an eighth switching element to limit input data amplitude.