Patent ID: 8871606
Filing Date: 2014-10-28
Classification: B81C

Abstract:
1. Method of manufacturing an integrated circuit, said method comprising the steps of: forming an active component above a substrate; forming a low dielectric region above the substrate, wherein at least a portion of the low dielectric region is disposed above the active component; forming a protective barrier around the low dielectric region, wherein forming the protective barrier comprises forming at least a trench in the low dielectric region, depositing a thin dielectric layer in the trench, and filling a remainder of the trench with a metal; and forming a cavity surrounding partially the active component, the low dielectric region partially surrounding the cavity, wherein the cavity is formed through excavation and filled with a gas, the low dielectric region comprising a porous material such that the excavation comprises chemically attacking a removable region in the cavity through the low dielectric region.