Patent ID: 7375393
Filing Date: 2008-05-20
Classification: H01L

Abstract:
1. A non-volatile memory (NVM) cell structure formed in a semiconductor substrate having a first conductivity type, the NVM cell structure comprising: a drain region having a second conductivity type opposite the first conductivity type formed in the semiconductor substrate; a source region having the second conductivity type formed in the semiconductor substrate and spaced apart from the drain region to define a substrate channel region therebetween; a layer of gate dielectric material formed over the substrate channel region; a polysilicon floating gate having a first portion formed on the gate dielectric material and over the substrate channel region; a control gate diffusion region formed in the semiconductor substrate and overlapped by a second portion of the polysilicon floating gate with silicon oxide formed between the control gate diffusion region and the second portion of the polysilicon floating gate; a conductive protective shield formed over the floating gate electrode and separated therefrom by an intervening dielectric material; and a conductive interconnect element formed to electrically connect the conductive protective shield and the control gate diffusion region.