Patent ID: 8291248
Filing Date: 2012-10-16
Classification: G06F,G11C,Y02D

Abstract:
1. A non-volatile semiconductor memory device, comprising: an interface for receiving commands issued by a controller, the commands including an erase command, the interface being configured to issue a status signal indicative of a ready or busy status of the device to the controller; a functional entity with circuit components and having a terminal; a node; switchable circuitry capable of controllably switching between a first operational state in which the terminal is electrically connected to the node and a second operational state in which the terminal is electrically decoupled from the node, the node being configured to have a signal for the functional entity communicated through it when the switchable circuitry is in the first operational state; and a command processing unit configured to recognize the commands issued by the controller and, in response to recognizing the erase command, to cause the switchable circuitry to switch from the first operational state to the second operational state; wherein the command processing unit is further configured to cause the switchable circuitry to switch from the second operational state back to the first operational state prior to setting the status signal to indicate that the device is ready.