Patent ID: 6449292
Filing Date: 2002-09-10
Classification: H04J

Abstract:
A time division multiplexed synchronous state machine, comprising:logic means (2), responsive to data in a time slot of a time division multiplexed input signal (3) having plural unrelated time slots in a repetitive structure and responsive to a previous state signal (4a) corresponding to said time slot having a magnitude indicative of a previous state of the synchronous state machine, for providing a next state signal (7) corresponding to said time slot; plural storage elements (9) coupled to said logic means (2) and responsive to said next state signal (7) corresponding to said time slot, for providing said next state signal (4); a state memory (20) coupled to said plural storage elements (9) and responsive to said next state signal (4) and responsive to a write address signal (22), for storing said next state signal (4) for a period of said repetitive structure and responsive to a read address signal (26), for providing said previous state signal (4a) input to said plural storage elements (9) wherein said plural storage elements (9) are responsive to said previous state signal (4a) for providing said previous state signal (12) input to said logic means (2).