Patent ID: 8093704
Filing Date: 2012-01-10
Classification: H01L

Abstract:
1. An apparatus comprising: a microelectronic die having an active surface, an inactive surface parallel to said active surface, and at least one side; an encapsulation material adjacent said at least one microelectronic die side, wherein said encapsulation material includes a bottom surface substantially planar to said microelectronic die active surface and a top surface substantially planar to said microelectronic die inactive surface; a through via connection in said encapsulation material extending from said top surface to said bottom surface; a first dielectric material layer disposed on at least a portion of said microelectronic die active surface and said encapsulation material bottom surface; a plurality of build-up layers disposed on said first dielectric material layer; a plurality of conductive traces disposed on said first dielectric material layer and said build-up layers and in electrical contact with said microelectronic die active surface; and a second microelectronic die package on said top surface and directly electrically contacted, through a solder ball, to said through via connection in said encapsulation material.