Patent ID: 6369891
Filing Date: 2002-04-09
Classification: B82Y,G01B,H01J

Abstract:
A method of determining the accuracy error in scanned signals of a semiconductor line width metrology device comprising the steps of:creating a frequency signature template of a known patterned feature having a central portion, edge portions and very edge formed on a semiconductor layer with a line width metrology measurement device that is in a nominal operating condition by obtaining amplitude modulated waveform signals for the central portion, edge portions and very edge and converting the amplitude modulated waveform signals into low, mid-range and high frequency components corresponding to respective central and edge portions and very edges; scanning another similar patterned feature having a central portion, edge portions, and very edge formed on a semiconductor layer with the line width metrology measurement device for generating amplitude waveform signals of the line width of the similar patterned feature for the central portion, edge portions and very edge; processing the waveform signal to convert the waveform signal into a frequency signature having low, mid-range and high frequency components corresponding to respective central and edge portions and very edge; comparing the relative power of the frequency components of the frequency signature obtained from the similar patterned feature with the relative power of the frequency signature template; and determining the accuracy of the line width metrology device based on the relative proportions between the high frequency signatures of the known and similar patterned feature.