Patent ID: 7045456
Filing Date: 2006-05-16
Classification: H01L

Abstract:
1. A method of fabricating transistor gate structures in a semiconductor device, the method comprising: forming a gate dielectric above a semiconductor body; forming a first silicon-containing material above the gate dielectric to a thickness of about 300 Å or less; forming a first metal over the first silicon-containing material; reacting the first metal with the first silicon-containing material to form a first metal silicide above the gate dielectric; forming a second silicon-containing material above the first metal silicide; selectively etching portions of the second silicon-containing material and the first metal silicide to form a patterned gate structure above the gate dielectric; forming a second metal over the second silicon-containing material; reacting the second metal with the second silicon-containing material to form a second metal silicide above the first metal silicide; forming an additional silicon-containing material above the first metal silicide; forming an additional metal over the first silicon containing material; and reacting the additional layer consisting essentially of metal with the additional silicon-containing material to form an additional metal silicide above the first metal silicide before forming the second silicon-containing material.