Patent ID: 6125463
Filing Date: 2000-09-26
Classification: G01R

Abstract:
An integrated circuit component with terminals for connection to an external communication channel or bus, an initializing reset signal input and a serial test interface, wherein said integrated circuit component comprises:a configuration register whose content defines operational modes of said component;loading means, wherein said loading means is controlled by said reset signal and is configured, when said reset signal is asserted, to load said configuration register, through said serial test interface, with configuration information applied as input to said integrated circuit component;a decoder with inputs connected to the output of said configuration register, wherein said decoder is configured to determine whether information on said communication channel or bus is configuration information directed to said integrated circuit component and if so, is further configured to assert a corresponding selection signal; andmultiplexing means configured to receive and be controlled by said reset signal and by said selection signal such that, when said reset signal is deasserted and said selection signal is asserted, said multiplexing means applies as input to said configuration register said configuration information received from said external communication channel.