Patent ID: 6452275
Filing Date: 2002-09-17
Classification: H01L

Abstract:
An integrated circuit structure which comprises(a) a substrate; (b) a layer of a second dielectric polymer positioned on the substrate; (c) a plurality of spaced apart metal contacts on the layer of the second dielectric polymer, which metal contacts have side walls, and a lining of a first dielectric polymer oil the side walls; a space between the linings on adjacent metal contact side walls being filled with the second dielectric polymer; a top surface of each of the metal contacts, the linings and the filled spaces being at a common level; (d) an additional layer of the second dielectric polymer on at least some of the metal contacts, linings and filled spaces; at least one via extending through the additional layer of the second dielectric polymer and extending to the top surface of at least one metal contact and optionally at least one of the linings; wherein the etch resistance properties of the second dielectric polymer are substantially different from the etch resistance properties of the first dielectric polymer; and wherein when the first dielectric polymer is organic, then the second dielectric polymer is inorganic, and when the first dielectric polymer is inorganic then the second dielectric polymer is organic.