Patent ID: 8605527
Filing Date: 2013-12-10
Classification: G11C

Abstract:
1. A method of self-testing and self-repairing a random access memory (RAM): collecting failure data of the RAM, wherein the failure data include addresses of failed cells, wherein failure data are stored in a failure bit map (FBM), wherein the RAM has a first number of redundant rows and a second number of redundant columns, and wherein the columns are divided into the second number of segments, and wherein each of the redundant columns is used for column repair of a designated segment; analyzing the failure data to determine if there are sufficient redundant rows and redundant columns to repair the failed cells in the RAM; repairing at least a portion of the failed cells by using the redundant rows and redundant columns if there are sufficient redundant rows and redundant columns to repair the failed cells; and rejecting the RAM if there are not sufficient redundant rows and redundant columns to repair the failed cells.