Patent ID: 6722642
Filing Date: 2004-04-20
Classification: B25B,H01L

Abstract:
A processing chamber for processing a semiconductor wafer during high pressure processing comprising:a. a wafer platen comprising a smooth surface, first through third lift pin holes, and a vacuum opening located within the smooth surface, the vacuum opening operable to apply a vacuum to a surface of the semiconductor wafer; b. first through third lift pins mounted within the first through third lift pin holes, respectively; c. an upper cavity plate configured to seal to the wafer platen, thereby forming a wafer cavity for entirely containing the semiconductor wafer during high-pressure processing; d. a first actuator mechanism coupling the first through third lift pins to the wafer platen, the first actuator mechanism operable to extend the first through third lift pins above the smooth surface of the wafer platen, the first actuator mechanism operable to retract the first through third lift pins to at least flush with the smooth surface of the wafer platen; and e. a second actuator mechanism coupled to the wafer platen, the second actuator mechanism operable to move the wafer platen against the upper cavity plate to seal the wafer platen to the upper cavity plate, thereby forming the wafer cavity.