Patent ID: 7915105
Filing Date: 2011-03-29
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device comprising: forming first, second, third, and fourth gate structures on a semiconductor substrate, each gate structure having a dummy gate; removing the dummy gate from the first, second, third, and fourth gate structures, thereby forming first, second, third, and fourth trenches, respectively; forming a metal layer to partially fill the first, second, third, and fourth trenches, wherein the metal layer is thicker in the fourth trench than it is in the first trench; forming a first photoresist layer over the first, second, and third trenches; etching a portion of the metal layer in the fourth trench, leaving a remaining portion; removing the first photoresist layer; forming a second photoresist layer over the second and third trenches; etching the metal layer in the first trench and the remaining portion of the metal layer in the fourth trench; and removing the second photoresist layer.