Patent ID: 9129678
Filing Date: 2015-09-08
Classification: G11C

Abstract:
1. A memory comprising: a memory cell having a first state and a second state, wherein the second state is different than the first state; a first module configured to, subsequent to an initial forming of the memory cell to activate the memory cell and subsequent to a read cycle or a write cycle of the memory cell, determine (i) a first difference between the first state and a first predetermined threshold, or (ii) a second difference between the first state and the second state; and a second module configured to, subsequent to the first module determining the first difference or the second difference, reform the memory cell to reset and increase the first difference or the second difference, wherein the second module is configured to, during the reforming of the memory cell, apply a first voltage to the memory cell, and wherein the first voltage is greater than a voltage applied to the memory cell during the read cycle or the write cycle.