Patent ID: 6300206
Filing Date: 2001-10-09
Classification: H01L

Abstract:
A method of fabricating a semiconductor device comprising the steps of:(a) introducing a first impurity in a first semiconductor region of a semiconductor substrate;(b) introducing a second impurity in said first semiconductor region; and(c) after said steps (a) and (b), forming a metal-silicide layer formed by reacting metal and silicon at a surface portion of said first semiconductor region,wherein said first semiconductor region has a first conductivity type,wherein a second semiconductor region having a second conductivity type opposed to said first conductivity type is formed by using said steps (a) and (b),wherein a dose amount in said step (b) is greater than a dose amount in said step (a),wherein a dose amount in said step (b) is greater than 1.times.10.sup.15 /cm.sup.2, andwherein said metal-silicide layer has an average thickness t such that a junction depth of said second semiconductor region is greater than 4.times.t.