Patent ID: 7406638
Filing Date: 2008-07-29
Classification: G01R

Abstract:
1. A system for testing or programmably configuring a plurality of electronic circuits, comprising: at least one first sub-system including a first test bus, and a plurality of first addressable test controllers coupled to the first test bus and coupleable to a plurality of first electronic circuits, the first electronic circuits being communicably coupleable to the first test bus via the first addressable test controllers, respectively; at least one second sub-system including a second test bus, and a plurality of second addressable test controllers coupled to the second test bus and coupleable to a plurality of second electronic circuits, the second electronic circuits being communicably coupleable to the second test bus via the second addressable test controllers, respectively; electronic circuit handling equipment configured to load the first and second electronic circuits into first and second pluralities of test fixtures respectively, and to unload the first and second electronic circuits from the first and second pluralities of test fixtures, respectively, the first and second pluralities of test fixtures corresponding to the first and second sub-systems, respectively; and a test controller coupled to the plurality of first addressable test controllers and the plurality of second addressable test controllers via the first and second test buses, respectively, the test controller being operative to provide input data to the first and second addressable test controllers via the first and second test buses respectively, wherein the plurality of first addressable test controllers are operative to apply, substantially in parallel, the input data to the plurality of first electronic circuits and to receive, substantially in parallel, output data from the plurality of first electronic circuits for testing or configuring the plurality of first electronic circuits, wherein the plurality of second addressable test controllers are operative to apply, substantially in parallel, the input data to the plurality of second electronic circuits, and to receive, substantially in parallel, output data from the plurality of second electronic circuits, for testing or configuring the plurality of second electronic circuits, the plurality of first and second addressable test controllers being further operative to test or configure the first and second electronic circuits, respectively, in an alternating fashion, wherein the handling equipment is operative to perform at least one of unloading and loading the electronic circuits corresponding to one of the first and second sub-systems while the electronic circuits corresponding to the other one of the first and second sub-systems are being tested or configured, and wherein the time required for testing or configuring the circuits is substantially equal to the time required for unloading and loading the circuits.