Patent ID: 6365464
Filing Date: 2002-04-02
Classification: H01L

Abstract:
A method to form contacts in an integrated circuit device comprising:providing a semiconductor substrate; providing narrowly spaced conductive lines on said semiconductor substrate; depositing a dielectric layer overlying said conductive lines and said semiconductor substrate wherein a void is formed in said dielectric layer between planned contact openings; etching through said dielectric layer to the top surface of said semiconductor substrate in areas defined by lithographic mask to thereby form said contact openings wherein said contact openings are between adjacent said narrowly spaced conductive lines and wherein said void horizontally intersects said contact openings; depositing an insulating layer overlying said dielectric layer and filling said contact openings wherein said insulating layer forms a lining layer inside said contact openings and wherein said insulating layer fills said void in said dielectric layer horizontally intersecting said contact openings; etching through said insulating layer to expose said top surface of said semiconductor substrate; depositing a conductive layer overlying said dielectric layer and filling said contact openings; etching said conductive layer as defined by lithographic mask; depositing a passivation layer overlying said conductive layer and said dielectric layer; and completing said integrated circuit device.