Patent ID: 6548865
Filing Date: 2003-04-15
Classification: H01L

Abstract:
A MOS type semiconductor device, comprising:a first main surface and a second main surface which face in opposite directions; a first conductivity type drift layer having a high resistivity; a second conductivity type base region formed in a surface layer of said first conductivity type drift layer on the side of said first main surface; a first conductivity type source region that is spaced from said first conductivity type drift layer by said second conductivity type base region; a gate electrode layer formed on a gate insulating film over a surface of said second conductivity type base region interposed between said first conductivity type source region and said first conductivity type drift layer; a source electrode formed in contact with both of said first conductivity type source region and said second conductivity type base region; a second conductivity type drain layer formed on a surface of said first conductivity type drift layer on the side of said second main surface; a drain electrode electrically connected to said second conductivity type drain layer; and a gate electrode formed in contact with said gate electrode layer; wherein a ballast resistance layer is provided between said first conductivity type drift layer and said second conductivity type drain layer, said ballast resistance layer including a portion having a resistivity in a range of 0.05 to 1 &OHgr;Â·cm and a thickness in a range of about 30 &mgr;m to 80 &mgr;m.