Patent ID: 6723625
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having non-volatile memory cells, each of the non-volatile memory cells including a floating gate electrode formed over a surface of an active region of a semiconductor substrate through a first gate insulating film and a control gate electrode formed over a surface of the floating gate electrode through a second gate insulating film, comprising the steps of:(a) forming a first film of an amorphous silicon, a polycrystalline silicon, or a combination of amorphous and polycrystalline silicon materials, the first film having an average thickness of less than 8 nm, over a part of a surface of the first gate insulating film and then forming an insulating film and then a polycrystalline silicon film over the surface of a first film; (b) forming a first gate material by removing a portion of the polycrystalline silicon film and the first film, during which removing a surface of the polycrystalline silicon film is covered with an oxidation resistant mask, so as to form the first gate material whose width in a direction of gate length is defined; (c) performing a heat treatment to form a thermally oxidized insulating film over the surface of the active region of the semiconductor substrate; (d) removing the oxidation resistant mask; (e) forming over surfaces of the thermally oxidized insulating film and the first gate material a second gate material made of a silicon film whose width in the direction of gate length is defined; (f) forming a second gate insulating film over a surface of the second gate material; and (g) forming a third gate material over a surface of the second gate insulating film.