Patent ID: 6842363
Filing Date: 2005-01-11
Classification: G11C

Abstract:
1. A magnetoresistive memory, comprising: a configuration of magnetoresistive memory cells each having respective first and second poles and a resistor and a diode function, said magnetoresistive memory cells being configured in a plurality of rows and a plurality of columns; a respective bit line for each of said columns connected to said first poles of said memory cells belonging to a respective one of said columns and having first and second ends; a word line for each of said rows connected to said second poles of said memory cells belonging to a respective one of said rows, said word line having first and second ends; a first read voltage source having a first voltage; switching elements connecting said first read voltage source individually to said first ends of said word lines; a control circuit, having: the voltage of said reference voltage source and said control circuit being constructed such that a voltage at said first pole corresponds approximately to a voltage from said fourth voltage source; and a current flowing through said second pole of said control circuit approximately equals a current flowing through said first pole of said control circuit, and the current through said second pole is independent of the voltage present at said second pole of the control circuit.