Patent ID: 6528327
Filing Date: 2003-03-04
Classification: H01L

Abstract:
A method for fabricating a semiconductor memory device, the method comprising the steps of:a) depositing a passivation film over a substrate in which source/drain regions have been defined for a transistor that forms part of a semiconductor integrated circuit; b) forming a contact hole through the passivation film so that the contact hole reaches one of the source/drain regions; c) forming a contact plug in the contact hole so that a recess is left over the contact plug; d) dry-etching only the passivation film so that a tilt angle formed by the wall of the recess with the upper surface of the contact plug is less than 90 degrees; and e) forming a lower electrode connected to the contact plug, a capacitive insulating film of an insulating metal oxide and an upper electrode to make a capacitor, the lower electrode, the capacitive insulating film and the upper electrode being formed in this order on the dry-etched passivation film.