Patent ID: 8847657
Filing Date: 2014-09-30
Classification: H03K,H03L

Abstract:
1. An apparatus comprising: a first stage configured to generate an intermediate signal having a first voltage in response to an input signal having a second voltage received from a pad, wherein (A) said input signal is received at a source of a native device type transistor and (B) said first voltage is limited to a bias voltage received at a gate of said native transistor; and a second stage configured to generate a core voltage in response to said first voltage, wherein (i) said second stage comprises (a) a diode connected device configured to adjust a trip point of an output inverter to avoid the need to provide skewing, and (b) a current source configured to adjust a voltage threshold of said diode connected device, (ii) said second voltage received from said pad operates at a voltage compliant with one or more published interface specifications and (iii) said diode connected device has a gate and a source connected to said intermediate signal and a drain configured to generate said core voltage.