Patent ID: 7663963
Filing Date: 2010-02-16
Classification: G06F

Abstract:
1. An apparatus for accessing a register file array in a data processing system comprising: a register file array having a plurality of entries, each entry having only two read ports and only two write ports; a plurality of input alignment multiplexers, coupled to the register file array, for receiving data from a data source and generating outputs for writing portions of the received data to entries in the register file array using one of the two write ports for entries in the register file array; and a plurality of output multiplexers coupled to the register file array, wherein outputs from the two read ports of the entries in the register file array are used to generate an input to one or more of the plurality of output multiplexers, and wherein the plurality of output multiplexers provide the data from entries of the register file array to an instruction decode unit of the data processing system.