Patent ID: 6411144
Filing Date: 2002-06-25
Classification: H03L,Y10S

Abstract:
A phase-locked loop circuit comprising:a phase/frequency comparator which receives a comparison signal and a reference signal, compares the phase and frequency of the comparison signal and the phase and frequency of the reference signal respectively, and outputs two comparison difference signals representing a difference between the phase and frequency of the comparison signal and the reference signal; a charge pump which receives the two comparison difference signals and a monitor signal, and outputs a pulse signal for controlling a control voltage based on the two comparison difference signals or based on whether the monitor signal has a level higher than a prespecified level; a low-pass filter which receives the pulse signal and outputs the control voltage based on the pulse signal; a monitoring circuit which receives the control voltage, checks whether the control voltage is within a prespecified voltage range, and outputs the monitor signal having the level higher than the prespecified level and inputs it into said charge pump during a period when the control voltage is out of the prespecified voltage range; a voltage control oscillator which receives the control voltage, oscillates based on the control voltage, and outputs a frequency output signal; and a frequency divider which receives the frequency output signal, divides the frequency of the frequency output signal, and outputs the frequency divided frequency output signal to said phase/frequency comparator as the comparison signal.