Patent ID: 6613616
Filing Date: 2003-09-02
Classification: H01L

Abstract:
A method for fabricating a field-effect transistor in an integrated semiconductor circuit, which comprises the steps of:producing mutually spaced-apart source and drain regions of a first conductivity type one of in a semiconductor substrate of a second conductivity type opposite the first conductivity type; etching-out a section of a main area of the semiconductor substrate between the source and drain regions resulting in an etched substrate section; forming a first gate region in the etched substrate section, with a result that the first gate region lies between the source and drain regions; depositing a semiconductor material above the first gate region in the etched substrate section; producing at least one second gate region above the first gate region with an interposition of the semiconductor material; and connecting the first gate region to the second gate region on at least one side free of the source and drain regions with an electrically conductive material, the source and drain regions being common to the first gate region and the second gate region lying one above the other.