Patent ID: 6760070
Filing Date: 2004-07-06
Classification: H04N

Abstract:
An integrated active pixel sensor array arranged in a plurality of rows and columns comprising:a plurality of row select lines, each of said row select lines associated with one row in the array and coupled to a source of a row-select signal; a plurality of column output lines, each of said column lines associated with one column in said array; a reset line coupled to a source of reset potential; a saturation level line coupled to a source of saturation level control voltage; a global current-summing node; a first source-follower drain line coupled to a first source-follower drain signal source; a plurality of active pixel sensors, each pixel sensor associated with one row and one column of the array and including a photodiode having a first terminal coupled to a first potential and a second terminal, a reset transistor having a first terminal coupled to the second terminal of the photodiode, a second terminal coupled to a reset reference potential that reverse biases the photodiode, and a control gate coupled to said reset line, a photocharge integration node coupled to said second terminal of said photodiode, said photocharge integration node comprising the gate of a first source-follower transistor, said first source-follower transistor having a drain, coupled to said first source-follower drain line, and a source, means for generating a bias current at said source of said first source follower transistor, and an exposure transistor having a source coupled to said source of said first source-follower transistor and a drain coupled to said global current-summing node, said exposure transistor having a control gate coupled to said saturation level line.