Patent ID: 6560122
Filing Date: 2003-05-06
Classification: H01L,Y10T

Abstract:
An integrated circuit chip packaging comprising:an integrated circuit chip having an active surface with interconnection pads disposed thereon; a substrate having a first side with bonding pads substantially corresponding to the interconnection pads of the integrated circuit chip, a second side having a plurality of solder pads electrically interconnected with the bonding pads, and a vent hole extending from the first side to the second side of the substrate and positioned beneath the integrated circuit chip when the chip is mounted on the substrate; a plurality of solder bumps electrically connecting the interconnection pads of the integrated circuit chip with the bonding pads on the first side of the substrate; a standoff to control a distance between the integrated circuit chip and the substrate; and a molded underfill material molded around the integrated circuit chip, the molded underfill material surrounding the solder bumps between the integrated circuit chip and the substrate, and the molded underfill material extending into the vent hole in the substrate, wherein the molded underfill material overflows the vent hole and extends along a portion of the second side of the substrate.