Patent ID: 6770517
Filing Date: 2004-08-03
Classification: H01L,Y10S

Abstract:
A method for fabricating a semiconductor device, comprising the steps of:(a) forming an element isolation film on an SOI substrate including at least an insulator layer and a semiconductor layer formed on the insulator layer, the element isolation film surrounding the semiconductor layer; (b) after the step (a), implanting, into the semiconductor layer, ions of an element having such properties as causing a lattice defect region in the semiconductor layer, such that a concentration of the implanted ion reaches a maximum in a region in the vicinity of an interface between the semiconductor layer and the insulator layer; (c) after the step (a), forming a high-concentration channel region and a channel region by implanting impurity ions of a first conductivity type into the semiconductor layer such that the concentration of the impurity ions of the first conductivity type reaches a maximum on the lattice defect region of the semiconductor layer; (d) after the steps (b) and (c), forming a gate insulator film on the semiconductor layer; (e) forming a gate electrode on the gate insulator film; (f) forming source/drain regions in respective regions of the semiconductor layer by introducing an impurity of a second conductivity type into the semiconductor layer by using the gate electrode as a mask, the source/drain regions being located on right and left sides of the gate electrode; and (g) after the step (f), diffusing and activating the impurity of the first conductivity type and the impurity of the second conductivity type by heat treatment, wherein in step (b), the lattice defect region is formed by implanting ions of a Group 4b element or ions of a Group 0 element as the ions of the element having such properties as causing the lattice defect region, so as to cover the entire surface of the insulator layer which is not covered by the element isolation film.