Patent ID: 6390579
Filing Date: 2002-05-21
Classification: G06K,H04N

Abstract:
A pulse width modulator, comprising:a clock operative to count successive discrete time intervals having a period equal to a desired full pulse width, and configured to generate a clock signal; an adjustable delay line comprising a plurality of delay line elements each comprising an adjustable delay cell, each delay line element operative to generate a clock signal at a specific location, which when combined with a transitional Instruction, will produce a modulated output that has a plurality of transitions within the clock period; processing circuitry configured to receive the clock signal and a pulse code input and operative to generate transitional instructions; and logic circuitry communicating with the adjustable delay line and the processing circuitry and operative to receive the transitional instructions, and further configured to combine multiple modulated outputs to generate a single modulated output that transitions at a desired modulated frequency.