Patent ID: 6248631
Filing Date: 2001-06-19
Classification: H01L

Abstract:
A method for forming a contoured floating gate for use in a floating gate memory cell, the method comprising:forming a recessed polysilicon layer between a first alignment structure and a second alignment structure;forming a second polysilicon layer disposed on the recessed polysilicon layer, the recessed polysilicon layer and the second polysilicon layer combining to form a polysilicon structure having a maximum thickness at a first lateral end region adjacent to the first alignment structure and at a second lateral end region adjacent to the second alignment structure, and the polysilicon structure having a minimum thickness at a middle region positioned between the first lateral end region and the second lateral end region, thereby defining a contour of the polysilicon structure between the first lateral end region and the second lateral end region; andforming a polysilicon layer on the polysilicon structure such that the polysilicon layer adopts the contour.