Patent ID: 7507610
Filing Date: 2009-03-24
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device comprising the steps of: forming a silicon layer having a first region and a second region on an insulating layer; depositing a resist pattern over the silicon layer at the second region; doping the silicon layer with an impurity at the first region after the resist pattern has been deposited; removing the resist pattern after the silicon layer has been doped; forming a thermal oxide film on the surface of the silicon layer after doping with the impurity; removing the thermal oxide film; forming a mask pattern over the silicon layer after removing the thermal oxide film; forming a first element separation film having at least one portion which contacts the insulating layer and separates the silicon layer into a plurality of island regions at the first region, by subjecting the silicon layer to oxidation using the mask pattern; forming a second element separation film which separates the silicon layer into a plurality of island regions at the second region without contacting the insulating layer, by subjecting the silicon layer to oxidation using the mask pattern; forming full depletion type transistors on the silicon layer at the first region, and forming partial depletion type transistors on the silicon layer at the second region.