Patent ID: 6187637
Filing Date: 2001-02-13
Classification: H01L

Abstract:
A method for forming a shallow trench into semiconductor device formed on a wafer therefore said wafer having a semiconductor substrate and wherein a first gate oxide layer being formed on said semiconductor substrate and a nitride layer being formed on the said gate oxide layer, said method comprising:forming a deep well layer into said semiconductor substrate;patterning said oxide layer and said nitride layer thereafter forming trenches;etching portion of said silicon nitride layer and gate oxide layer according to the pattern of said gate oxide layer and said nitride layer wherein said etching being performed with a set of process parameters;first implanting a couple of device cell into said deep well of said semiconductor substrate;annealing said couple of device cell;removing whole said silicon nitride layer;second implanting said cell device thereafter third implanting said cell device;removing said first gate oxide layer;depositing a second gate oxide and then a polysilicon layer thereafter a tungsten silicide layer;defining said polysilicon gate;etching said polysilicon gate which abuts between said couple of cell device;implanting cell isolation behind said trench wherein said isolation being formed thus excited between said couple of cell device;annealing said cell device and cell isolation;conformably depositing a silicon oxide being fulfilled said trench; andplanarizing surface of said silicon oxide.