Patent ID: 6185192
Filing Date: 2001-02-06
Classification: H04L,H04Q

Abstract:
A method for reading out error statistics, the error statistics data being produced in duplicated first and second processing units for processing ATM information operated in microsynchronous parallel operation and connected to a duplicated switching matrix, comprising the steps of:outputting a synchronization signal, for generating microsynchronous parallel operation, from each of the processing units, the synchronization signal identifying a respective processing phase of one processing unit to the other processing unit when there is freedom from errors of a received ATM information item to be processed and when there is freedom from errors of an information processing result to be output, to which synchronization signal a beginning of a processing phase of the other processing unit is synchronized;effecting in one of the processing units, for a lack of a synchronization signal from the other of the processing units, a stopping of information processing even for correct reception of an ATM information item just like during reception of a faulty ATM information item, or, respectively, outputting blank information item even for an undisturbed information processing result, the processing units also being connected via a bus interface to a central processing unit, which at least evaluates the statistics data reaching the central processing unit;supplying information coming from a switching matrix part of the duplicated switching matrix to each of the processing units and information sent out by a processing unit being supplied to all existing switching matrix parts;comparing for a match, for monitoring microsynchronous operation of the processing units, information items output by each of the processing units via the bus interface;inserting the error statistics data in the processing units like processing results into ATM transmit cells which are sent to the switching matrix and which are addressed to a point of origin of the ATM transmit cells and, after corresponding switching-through, again reach a respective processing unit as ATM receive cells and reach the central control unit via a respective bus interface like other ATM information.