Patent ID: 8756450
Filing Date: 2014-06-17
Classification: G01R,G06F,G11C

Abstract:
1. An integrated circuit to provide a memory buffer to isolate one or more dynamic random access memory devices (DRAM devices) from a differential point-to-point channel, the integrated circuit comprising: an inbound redrive circuit to receive and redrive signals on an inbound path of the differential point-to-point channel, the inbound redrive circuit including, at least in part, two or more bit-lanes for the inbound path of the differential point-to-point channel; an outbound redrive circuit to receive and redrive signals on an outbound path of the differential point-to-point channel, the outbound redrive circuit including, at least in part, two or more bit-lanes for the outbound path of the differential point-to-point channel; a double data rate (DDR) memory interface to couple the memory buffer with the one or more DRAM devices, the memory interface to receive data from the outbound redrive circuit and to send data to the inbound redrive circuit; and a deskew circuit separate from the outbound redrive circuit and coupled between the outbound redrive circuit and the DDR memory interface, the deskew circuit to deskew data received from the two or more bit-lanes of the outbound path.