Patent ID: 6495403
Filing Date: 2002-12-17
Classification: H01L

Abstract:
A method for fabricating a semiconductor device having a gate-all-around architecture, said method comprising the steps of:producing a substrate that includes an active central region of semiconductor material surrounded by an insulating peripheral region of dielectric material, the central region having an active main surface and the peripheral region having an insulating main surface, the active main surface and the insulating main surface being coextensive and constituting a main surface of the substrate; forming a first layer on the active main surface, the first layer being a monocrystalline Ge or an SiGe alloy layer; forming a silicon layer on the first layer and on the insulating main surface, said layer being monocrystalline in its central part formed on the first layer and polycrystalline in its parts formed on the insulating surface; masking and etching the silicon layer and the first layer in order to form a stack on the active main surface, the stack having two opposed side walls that reveal the first monocrystalline layer; removing the first layer so that the silicon layer of the stack forms a bridge structure over the active main surface, the bridge structure having side walls, an external surface, and an internal surface that defining a tunnel with a corresponding part of the active main surface; forming a thin layer of a dielectric material that does not fill the tunnel on the external and internal surfaces of the bridge structure and on the side walls; depositing a conducting material so as to cover the bridge structure and fill the tunnel; and masking and etching the conducting material in order to form a gate-all-around region for the semiconductor device.