Patent ID: 7598146
Filing Date: 2009-10-06
Classification: H01L

Abstract:
1. A semiconductor structure formed by a method comprising: forming a first layer on a surface of a silicon substrate having a first thickness; forming an opening having a first width through the first layer; forming a blanket dielectric layer having a second thickness on the first layer and in the opening, the second thickness being less than the first thickness; removing the blanket dielectric layer from the first layer and bottom of the opening, but not from sidewalls of the opening, to form dielectric spacers on each side wall within the opening, the gap having a second width less than the first width; implanting ions into the substrate at a location beneath at least one of the dielectric spacers, the implanting being performed at an angle to provide implanted ions under the at least one dielectric spacer; depositing a gate electrode into the gap after implanting ions through the gap; removing the first layer and leaving the dielectric spacers on the substrate; forming source and drain regions in the substrate and adjacent to the gate electrode; forming a first contact coupled to a first one of the source and drain regions and positioned directly on a first portion of the gate electrode; forming a second contact coupled to a second one of the source and drain regions; and forming a dielectric layer positioned on a second portion of the gate electrode and defined on opposite sides by the first and second contacts.