Patent ID: 6475905
Filing Date: 2002-11-05
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:forming a second barrier layer over a first level; forming a first dielectric layer over the second barrier layer; forming a second dielectric layer over the first dielectric layer; etching the first and second dielectric layers to form an opening through the first dielectric layer and the second dielectric layer, the opening including a via in the first dielectric layer; depositing an anti-reflective material in the opening, the anti-reflective material having a thickness determined by minimizing a standard deviation of reflectivity of the anti-reflective material; removing a portion of the anti-reflective material from the opening; etching the second dielectric layer to form a trench after the portion of the anti-reflective material is removed; completely removing the anti-reflective material; etching the second barrier layer to expose the first level; and filling the trench and the via with conductive material to form a feature.