Patent ID: 8253391
Filing Date: 2012-08-28
Classification: H02J,H05B

Abstract:
1. A control circuit for a capacitor charging apparatus which comprises a transformer having a primary coil, a secondary coil and a tap provided on the secondary coil, and an output capacitor which is charged with electric current that flows through the secondary coil of the transformer, and which charges the output capacitor by controlling the switching operation of a switching transistor provided on a path of the primary coil of the transformer, the control circuit comprising: a voltage monitoring terminal connected to the tap provided to the secondary coil of the transformer; a switching control unit which receives a monitoring voltage that occurs at the voltage monitoring terminal, and which controls the switching operation of the switching transistor according to the monitoring voltage; and a protection circuit which monitors the monitoring voltage, and which stops the switching control operation of the switching control unit for the switching transistor in a case in which a predetermined condition continues to be satisfied with respect to the monitoring voltage for a predetermined period of time; wherein the switching control unit comprises: a primary current detection circuit which detects the primary current that flows through the primary coil of the transformer; a comparator which compares the primary current detected by the primary current detection circuit with a predetermined peak current value, and outputs a comparison signal which is asserted when the primary current is greater than the peak current value; a first timer which starts counting time when the comparison signal output from the comparator is asserted, and which generates a first set signal which is asserted when an OFF period that corresponds to the monitoring voltage elapses; a second timer which starts counting time when the comparison signal output from the comparator is asserted, and which generates a second set signal which is asserted when a predetermined maximum OFF period elapses; and a switching control unit which sets the switching transistor to the OFF state when the comparison signal is asserted, and which sets the switching transistor to the ON state at an earlier timing selected from a timing at which the first set signal is asserted and a timing at which the second set signal is asserted, and wherein the protection circuit includes a counter which counts the number of times the switching transistor is set to the ON state at a timing at which the second set signal is asserted, and stops the switching control operation of the switching control unit for the switching transistor in a case in which the count value reaches a predetermined value.