Patent ID: 8698313
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory apparatus comprising: a semiconductor layer; a first insulating film provided on the semiconductor layer, the first insulating film being a single-layer film containing silicon oxide or silicon oxynitride; a charge trapping film provided on the first insulating film; a second insulating film provided on the charge trapping film; and a control gate electrode provided on the second insulating film, wherein a metal oxide exists in an interface between the first insulating film and the charge trapping film, the metal oxide is one of Al wherein a thickness of the metal oxide is less than 0.47 nm when the metal oxide is Al wherein a thickness of the metal oxide is less than 0.51 nm when the metal oxide is HfO wherein a thickness of the metal oxide is less than 0.41 nm when the metal oxide is MgO, wherein a thickness of the metal oxide is less than 0.46 nm when the metal oxide is TiO wherein a thickness of the metal oxide is less than 0.52 nm when the metal oxide is ZrO