Patent ID: 6215344
Filing Date: 2001-04-10
Classification: H03K,H04L

Abstract:
A data transmission circuit comprising:a push-pull circuit including first and second MOS transistors, connected in series between a first power source potential node and a second power source potential node, to which a first data signal and a second data signal defined as an inverted signal of the first data signal are respectively supplied, said first MOS transistor and the second transistor being of the same conductivity type;an output capacitance connected between the second power source potential node and a connecting node between said first MOS transistor and said second MOS transistor which serves as an output node of said push-pull circuit;a transfer gate connected to the output node of said push-pull circuit;a first inverter connected to the output node of said transfer gate;a second inverter connected to said first inverter to form a feedback loop; andthird and fourth MOS transistors, having a conductivity type opposite to a conductivity type of said first and second MOS transistors and sequentially connected in series between the first power source potential node and the output node of said push-pull circuit, to which a predetermined control signal and the second data signal are respectively supplied.