Patent ID: 7723784
Filing Date: 2010-05-25
Classification: H01L

Abstract:
1. An insulated gate semiconductor device comprising: a p type semiconductor substrate; a first n type epitaxial semiconductor layer grown on the semiconductor substrate; a second n type epitaxial semiconductor layer grown on the first n type semiconductor layer; a third n type epitaxial semiconductor layer grown on the second n type semiconductor layer; an n type impurity-diffusion region buried between the semiconductor substrate and the first n type semiconductor layer; a first p type impurity-diffusion region buried between the first n type semiconductor layer and the second n type semiconductor layer; a second p type impurity-diffusion region buried between the second n type semiconductor layer and the third n type semiconductor layer so as to be in contact with the first p type impurity-diffusion region; a third p type impurity-diffusion region formed in the third n type semiconductor layer so as to be in contact with the second p type impurity region; a region formed in the third p type impurity-diffusion region and comprising insulated gate semiconductor elements; a conductive region formed in the second and third n type epitaxial semiconductor layers outside the second and third p type impurity-diffusion regions so as to reach the first p type impurity-diffusion region; first and second electrodes connected to the region comprising insulated gate semiconductor elements; and a third electrode connected to the conductive region.