Patent ID: 6555398
Filing Date: 2003-04-29
Classification: G06F,H03K

Abstract:
A method to form an electrically programmable multiple selectable function integrated circuit module comprising the steps of:forming a known good integrated circuit die having multiple optionally selectable function circuits and at least one function configuration circuit by the steps of: forming electronic components on the surface of a semiconductor substrate to create said optionally selectable function circuits and said function configuration circuit, forming interconnections between said function configuration circuit and said multiple optionally selectable function circuit so that said function configuration circuit can elect which of the multiple optionally selectable function circuits are to be active, forming redistribution metallurgy on the surface of the semiconductor substrate to form input/output pads connected to the multiple optionally selectable function circuits and the function configuration circuit to provide a route for input data signals to arrive at the multiple optionally selectable function circuits, a route for output data signals to be transferred from the multiple optionally selectable function circuits, and a route for configuration signals to be transferred to the function configuration circuit, testing the semiconductor substrate to identify the known good integrated circuit die, dicing the semiconductor substrate, and, sorting the known good integrated circuit die; forming a second-level substrate onto which the known good integrated circuit die are attached and interconnected by the steps of: forming conductive interconnections on all levels of said second-level substrate to provide interconnecting paths for the known good integrated circuit die and other circuitry attached to the second-level substrate, and laminating all levels of the second-level substrate, applying a solder mask in locations to expose all input/output pads of the known good integrated circuit die and the other circuitry to be attached to the second-level substrate, applying a solder paste to the input/output pads, and placing and securing the known good integrated circuit die to the second-level substrate; and connecting the known good integrated circuit die to a function program source to provide the configuration signals to the known good integrated circuit die.