Patent ID: 6801518
Filing Date: 2004-10-05
Classification: H04J,H04L,H04Q

Abstract:
A frequency locked switch and transceiver system comprising:a switch comprising: a plurality of serial switch transmit and receive ports; a switch fabric serially reconfigurably interconnecting the serial switch transmit and receive ports; and a clock signal generator generating a switch clock signal defining a bit period for data transmitted and received by the serial switch transmit and receive ports; and a plurality of transceivers connected to the serial switch ports, each transceiver comprising: a serial input port and a serial output port, the serial input port connected to a one of the serial switch transmit ports and the serial output port connected to a one of the serial switch receive ports; a clock recovery unit operatively coupled to the serial input port; a demultiplexer operatively coupled to the serial input port and the clock recovery unit; and a multiplexor operatively coupled to the serial output port and the clock recovery unit.