Patent ID: 9053930
Filing Date: 2015-06-09
Classification: H01L

Abstract:
1. A method of integrating a Group III nitride material and silicon, said method comprising: providing a structure comprising, from bottom to top, a (100) silicon layer, a (111) silicon layer located on an uppermost surface of the (100) silicon layer, a Group III nitride material layer located on an uppermost surface of the (111) silicon layer, and a blanket layer of dielectric material located on an uppermost surface of the Group III nitride material layer; forming an opening through the blanket layer of dielectric material, and the Group III nitride material layer to expose a portion of the uppermost surface of the (111) silicon layer; performing an oxidation process to form an oxide plug within said exposed portion of the (111) silicon layer, wherein a bottommost surface of the oxide plug contacts the uppermost surface of the (100) silicon layer; forming a conformal dielectric material liner atop remaining portions of the blanket layer of dielectric material and within said opening; removing horizontal portions of said conformal dielectric material liner and a portion of said oxide plug to expose a portion of the uppermost surface of the (100) silicon layer; forming an epitaxial semiconductor material on said exposed portion of the uppermost surface of the (100) silicon layer; and removing portions of the epitaxial semiconductor material, and remaining portions of the blanket layer of dielectric material to expose the uppermost surface of remaining portions of the Group III nitride material layer.