Patent ID: 6487174
Filing Date: 2002-11-26
Classification: G01R,H04W

Abstract:
A S/N measuring circuit comprising:a modulation removing circuit, connected to an A/D converter for receiving a demodulated signal that is demodulated from a digitally modulated signal, and sampling said demodulated signal at a modulation clock, said modulation removing circuit removing data modulation by multiplying a sampled value of a signal that is output from said A/D converter by a decision symbol signal; a first averaging circuit for averaging an output from said modulation removing circuit over a plurality of symbol sections to suppress a noise superimposed over said demodulated signal; a first square operating circuit for squaring an output from said first averaging circuit to obtain a desired signal power; a second square operating circuit for applying a square operation to said sampled value of said signal that is an output from said A/D converter; a second averaging circuit for averaging an output from said second square operating circuit to obtain total electric power of said demodulated signal; a subtracting circuit for subtracting said desired signal power that is an output from said first square operating circuit from said total electric power of said demodulated signal that is an output from said second averaging circuit to obtain noise electric power; a dividing circuit for receiving said desired signal power that is an output from said first square operating circuit and said noise electric power that is an output from said subtracting circuit, and calculating an S/N value; and a table conversion circuit for receiving said S/N value output from said dividing circuit and outputting an S/N value corrected in accordance with a predetermined conversion table, wherein said table conversion circuit removes a non-linear bias occurred from a symbol error in case that said S/N value output from said dividing circuit is small by providing characteristic by means of said conversion table, which is reverse of characteristic previously obtained by measurement of a corresponding relation between said S/N value output from said dividing circuit and an actual S/N value of said demodulated signal.