Patent ID: 7737650
Filing Date: 2010-06-15
Classification: H03K

Abstract:
1. A method of controlling a switching assembly comprising: a plurality of transistors connected in parallel; a linear operating mode in which an internal resistance of said plurality of transistors can be controlled in a given range of values; a closed-switch operating mode, in which said internal resistance is equal to a minimum value; and an off operating mode, in which said internal resistance is equal to a maximum value; wherein said method further comprises: a first operating phase during which a current flows from a source terminal to a drain terminal of said plurality of transistors; a second operating phase in which no current flows; wherein said method which comprises said steps according to which, successively: (a) wherein said plurality of transistors of the switching assembly are controlled in a common fashion in closed-switch mode during at least part of said first phase; (b) wherein said plurality of transistors are controlled in a common fashion in linear mode at the end of said first phase during at least a first given period; and (c) wherein said plurality of transistors are controlled in a common fashion in off mode during at least part of said second phase.