Patent ID: 8441062
Filing Date: 2013-05-14
Classification: H01L

Abstract:
1. A nonvolatile memory device, comprising: a plurality of nonvolatile memory cell transistors having respective channel regions within a semiconductor layer comprising a first semiconductor material and respective source/drain regions that consist essentially of a second semiconductor material having a smaller bandgap relative to the first semiconductor material and form heterogeneous junctions with corresponding ones of the channel regions; and a string selection transistor having a respective channel region within the semiconductor layer; wherein the source/drain regions form non-rectifying junctions with the channel regions; wherein the semiconductor layer is a P-type silicon layer; wherein the source/drain regions of the plurality of nonvolatile memory cell transistors are P-type germanium or P-type silicon germanium; and wherein a first source/drain region of the string selection transistor comprises N-type silicon.