Patent ID: 7952914
Filing Date: 2011-05-31
Classification: G11C,H01L,Y10S

Abstract:
1. An integrated circuit memory device comprising: an integrated circuit substrate; a memory cell on the integrated circuit substrate, wherein the memory cell is programmable to at least two different magnetoresistive states determined by a magnetic polarization of a free magnetic layer relative to a fixed magnetic layer and programmable to at least two different resistance states determined by a resistance characteristic of a layer of a resistive memory material to provide at least four different memory states for the memory cell wherein the layer of the resistive memory material comprises an oxide layer between first and second electrode layers; and a controller electrically coupled to the memory cell wherein the controller is configured to apply one of a plurality of different magnetic fields to the memory cell to program one of the at least two different magnetoresistive states and to apply one of a plurality of different electrical signals through the memory cell to program one of the at least two different resistance states to thereby program the memory cell with at least two bits of data, and wherein the controller is configured to apply an electrical signal to the memory cell to discriminate between the at least four different memory states and thereby read the at least two bits of data from the memory cell.