Patent ID: 6141250
Filing Date: 2000-10-31
Classification: G11C

Abstract:
A non-volatile semiconductor memory device being able to electrically rewrite data, comprising:two or more pairs of word lines;two or more bit lines; andmore than one non-volatile memory cell disposed at the point of intersection of said pairs of word lines and said bit lines;whereby said each non-volatile memory cell composed of at least two MIS-type devices containing a stacked gate-type memory transistor having a control gate and a floating gate for accumulation of carriers and a switch transistor having a switching gate;said each pair of word lines being composed of a pair of a first word line and a second word line;said each first word line being connected to said control gate of a group of memory cells disposed along said first word line or along a first branched word line branched from said first word line and said each second word line being connected to said switching gate of a group of memory cells disposed along said second word line or along a second branched word line branched from said second word line;said each bit line being connected to a drain of a group of said memory cells disposed along said bit line;said switching gate of said switch transistor being used to control selection or non-selection of selected memory cells on selecting bit lines at the time of read data; andsaid selecting bit lines being used to read data from selected memory cells.