Patent ID: 6589853
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A method of forming a trench isolation structure in a semiconductor device, comprising the steps of:forming a mask layer including a first oxidation-resistant insulating film on a semiconductor substrate and then forming a predetermined opening pattern in the mask layer; etching an exposed portion of the semiconductor substrate using at least the mask layer as a mask to form a trench; forming a first insulating film on an inner wall of the trench; forming an etching barrier layer on at least a side portion of the mask layer at the predetermined opening pattern; forming a second oxidation-resistant insulating film on the inner wall of the trench including on the etching barrier layer; forming a second insulating film to essentially fill the trench; conducting a planarization treatment so that the first oxidation-resistant insulating film of the mask layer is exposed; and essentially removing the mask layer by etching that also etches an exposed edge of the second oxidation-resistant insulating film.