Patent ID: 8940640
Filing Date: 2015-01-27
Classification: H01L

Abstract:
1. A method for fabricating a field effect transistor comprising: providing a substrate comprising a major surface; forming a shallow trench isolation (STI) region within the substrate; forming a gate stack adjacent to the STI region on the major surface of the substrate; forming a spacer adjoining at least one side of the gate stack; recessing the substrate to form a source/drain (S/D) recess adjacent to the spacer; exposing a surface of the S/D recess to a vapor mixture comprising XeF ceasing to expose the surface of the S/D recess to the vapor mixture; after the step of ceasing to expose the surface of the S/D recess to the vapor mixture, heating the substrate to a second higher temperature to form a S/D cavity extending below the spacer; selectively growing a S/D extension partially filling in the S/D cavity; and selectively growing a strained material filling in the S/D cavity.