Patent ID: 6624672
Filing Date: 2003-09-23
Classification: G11C,H03K

Abstract:
An output buffer for digital signals, the output buffer comprising:first and second supply terminals; input and output terminals; an output stage including: a MOS first output transistor of a first conductivity type with a source electrode connected to the first supply terminal, a drain electrode connected to the output terminal, and a gate electrode connected to the input terminal; and a MOS second output transistor of a second conductivity type with a source electrode connected to the second supply terminal, a drain electrode connected to the output terminal, and a gate electrode connected to the input terminal; a first driver stage connecting the gate electrode of the first output transistor to the input terminal and including: a first circuit branch having: a first current-generator means connected between the gate electrode of the first output transistor and the second supply terminal, wherein the first current-generator means comprises a first current generator; and a first controlled electronic switch connected between the gate electrode of the first output transistor and the first supply terminal, the first controlled electronic switch having a control electrode connected to the input terminal of the buffer; and a second circuit branch having: a first MOS transistor of the first conductivity type connected as a diode in series with a second controlled electronic switch between the gate electrode of the first output transistor and the first supply terminal, the second electronic switch having a control terminal connected to the output terminal of the buffer; and a second driver stage connecting the gate electrode of the second output transistor to the input terminal and including: a third circuit branch having: a second current-generator means connected between the gate electrode of the second output transistor and the first supply terminal, wherein the second current-generator means comprises a second current generator; and a third controlled electronic switch connected between the gate electrode of the second output transistor and the second supply terminal, the third controlled electronic switch having a control electrode connected to the input terminal of the buffer; and a fourth circuit branch having: a second MOS transistor of the second conductivity type connected as a diode in series with a fourth controlled electronic switch between the gate electrode of the second output transistor and the second supply terminal, the fourth electronic switch having a control terminal connected to the output terminal of the buffer, wherein the first and second current generators are constant current generators.