Patent ID: 8359453
Filing Date: 2013-01-22
Classification: G06F

Abstract:
1. A digital data processing system, comprising: a memory defining a real address space; a processor for executing processes embodied as instructions storable in said memory, at least some of said processes generating memory references in a respective effective address space different from said real address space; a coprocessor performing operations, each operation on behalf of a respective process executing in said processor, said coprocessor accessing data operands in said memory using real addresses in said real address space; wherein said processor invokes said coprocessor to perform a first operation on behalf of a first process, said first process generating memory references in a first effective address space, by: generating a first effective address in said first effective address space; translating said first effective address to a first real address in said real address space; transmitting a request to perform said first operation to said coprocessor, said request containing said first real address; wherein said coprocessor uses said first real address to access at least one data operand for performing said first operation.