Patent ID: 6087189
Filing Date: 2000-07-11
Classification: H01L

Abstract:
A method of measuring a degree of overetching of a silicide layer on a semiconductor wafer, comprising:forming a van der Pauw or cross-bridge structure on the wafer;forming a silicide layer over the van der Pauw or cross-bridge structure;subjecting the silicide layer over the van der Pauw or cross-bridge structure to a photolithographic etching process, which process includes masking a photoresist layer on the silicide layer such that, when the photoresist layer is etched in the lithographic process, the silicide layer over at least a portion of the center of the van der Pauw or cross-bridge structure is etched; andmeasuring the electrical characteristics of the van der Pauw or cross-bridge structure to determine a degree of overetching of a silicide layer.