Patent ID: 6587907
Filing Date: 2003-07-01
Classification: H05K

Abstract:
A system for providing data between a first printed circuit board and a second printed circuit board, the first and second printed circuit boards each having a data port and a clock port, the system comprising:a driving integrated circuit in electrical connection with the first printed circuit board, the driving integrated circuit including a data port and a clock port; a receiving integrated circuit in electrical connection with the second printed circuit board; a memory device in electrical connection with the receiving integrated circuit, the memory device including a data port and a clock port; an interconnect cable electrically connecting the first printed circuit board to the second printed circuit board, the interconnect cable further comprising: at least one data line electrically connecting the data port of the first printed circuit board with the data port of the second printed circuit board for transmitting a data signal, the data line having a length; and at least one clock line electrically connecting the clock port of the first printed circuit board with the clock port of the second printed circuit board for transmitting a clock signal associated with a corresponding data signal, the clock line having a length greater than the length of the corresponding data line such that a time delay is introduced into the clock signal passing from the driving integrated circuit to the receiving integrated circuit.