Patent ID: 9042380
Filing Date: 2015-05-26
Classification: H04L

Abstract:
1. A switch for switching a plurality of traffic flows each associated with a maximum guaranteed data rate, comprising: N input ports, M output ports an N×M switching matrix, having N×M crosspoints and a crosspoint buffer at each of said N×M crosspoints, M×N input queues, with M of said input queues associated with each one of said N input ports, wherein each of said input queues buffers data associated with one or more of said plurality of traffic flows directed to a common one of said M output ports; memory for storing a plurality of pre-computed row-schedules for a scheduling frame, wherein each of said pre-computed row-schedules specifies which of M input queues, if any, is enabled to transmit data from its associated input port to said switching matrix during each time-slot in said scheduling frame; logic for loading data from enabled ones of said input queues into said crosspoint buffers of said switching matrix, at a clocked rate, in accordance with said pre-computed row schedules; wherein the plurality of row-schedules provides each of said input queues with a rate of transmission of data into said switching matrix sufficient to satisfy said maximum guaranteed data rates for all of said plurality of traffic flows, as said scheduling frame is repeated.