Patent ID: 8932945
Filing Date: 2015-01-13
Classification: G03F,G11B,H01L

Abstract:
1. A method for manufacturing semiconductor devices, the method comprising: aligning a first semiconductor wafer in a first direction; aligning a second semiconductor wafer in the first direction; performing a first anneal on the first semiconductor wafer and the second semiconductor wafer while the first semiconductor wafer and the second semiconductor wafer are aligned such that the first anneal creates a first fingerprint on the first semiconductor wafer and a second fingerprint on the second semiconductor wafer, wherein the first fingerprint is similar to the second fingerprint; performing a first manufacturing process on the first semiconductor wafer after the performing the first anneal; performing the first manufacturing process on the second semiconductor wafer after the performing the first anneal; aligning the first semiconductor wafer in a second direction; aligning the second semiconductor wafer in the second direction; and performing a second anneal on the first semiconductor wafer and the second semiconductor wafer while the first semiconductor wafer and the second semiconductor wafer are aligned, the performing the second anneal occurring after the aligning the first semiconductor wafer and the aligning the second semiconductor wafer; placing a first photoresist over the first semiconductor wafer; and exposing the first photoresist to an energy source through a patterned reticle, wherein the patterned reticle has a compensation pattern developed from a model of a fingerprint from test wafers to at least partially compensate for the first fingerprint from the first anneal.