Patent ID: 8199551
Filing Date: 2012-06-12
Classification: G11C,H01L

Abstract:
1. A semiconductor device including a memory cell, the memory cell comprising: a transistor, a gate of the transistor being electrically connected to a word line, and one of a source and a drain of the transistor being electrically connected to a bit line; a capacitor, one terminal of the capacitor being electrically connected to the other of the source and the drain of the transistor, and the other terminal of the capacitor being electrically connected to a wiring; and a resistor, one terminal of the resistor being electrically connected to the other of the source and the drain of the transistor, and the other terminal of the resistor being electrically connected to the wiring, wherein, when a potential of the gate of the transistor and a potential of the one of the source and the drain of the transistor is equal to a potential of the other terminal of the capacitor, an amount of electric charge which is discharged from the capacitor and flows to the resistor is larger than an amount of electric charge which is discharged from the capacitor and flows to the transistor.