Patent ID: 9177662
Filing Date: 2015-11-03
Classification: G11C

Abstract:
1. A pre-reading method for a 3D NAND flash memory, comprising: applying a first select voltage on one of a plurality of bit lines for selecting one of a plurality of layers; applying a second select voltage on one of a plurality of string select lines for selecting one of a plurality of strings of the selected layer, wherein the selected string includes a first memory cell, two second memory cells and a plurality of third memory cells, the two second memory cells are adjacent to the first memory cell, and the third memory cells are not adjacent to the first memory cell; and applying a first pass voltage on the second memory cells, applying a second pass voltage on the third memory cells, and applying a read voltage on the first memory cell via a plurality of word lines for reading a data of the first memory cell, wherein the first pass voltage is larger than the second pass voltage.