Patent ID: 8486836
Filing Date: 2013-07-16
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming a copper interconnect by filling a recess provided to an insulating film formed over a substrate with a copper-containing electroconductive material, and by removing a portion of said electroconductive material exposed out from said recess by chemical mechanical polishing; annealing the entire portion of said substrate; forming a first insulating interlayer over said insulating film and said copper interconnect; planarizing the surface of said first insulating interlayer; forming a second insulating interlayer over said first insulating interlayer; and forming an electroconductive layer over said second insulating interlayer, wherein, in said annealing, a plurality of hillocks are formed on the surface of said copper interconnect, and in said planarizing the surface of said first insulating interlayer, said first insulating interlayer being planarized until at least one hillock is exposed to the surface of said first insulating interlayer.