Patent ID: 6784690
Filing Date: 2004-08-31
Classification: H03K

Abstract:
An input/output IO device comprising:a power supply node; an input node for receiving an input data signal; an output node for outputting an output data signal generated in response to the input node receiving the input data bit signal; a pull-up driver coupled to the power supply node and the output node; a circuit coupled to the input node, the pull-up driver, and the output node, wherein the circuit is configured to generate a signal that is provided to the pull-up driver, wherein the signal to the pull-up driver varies as a function of the voltage at the output node and the voltage of the input data signal; and wherein the pull-up driver comprises first and second n-channel field effect transistors (FETs), wherein the drain of the first p-channel FET is coupled to the source of the second p-channel FET, the source of first p-channel FET is coupled to the power supply node, the drain of the second p-channel FET is coupled to the output node, the gate of the first p-channel FET is coupled to receive the signal generated by the circuit, and the gate of the second p-channel FET is coupled to a p-channel bias voltage node.