Patent ID: 8437437
Filing Date: 2013-05-07
Classification: H04L,H04W

Abstract:
1. An apparatus comprising: at least one processor; and at least one memory including computer program code, wherein the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus to perform at least the following: receive channel quality indicators; organize the channel quality indicators in a channel quality indication matrix; repeat a procedure until at least one of all rows and columns of the channel quality indication matrix fulfil a predetermined condition set for a number of non-zero elements in one of rows and columns of the channel quality indication matrix, the procedure comprises to: select a column of the channel quality indication matrix having a largest number of non-zero channel quality indicators; if the selected column fulfils a predetermined condition set for the number of non-zero elements in a column of the channel quality indication matrix, select a row having a smallest channel quality indicator in the selected column; if the selected row fulfils the predetermined condition set for the number of non-zero elements in a row of the channel quality indication matrix, set the selected smallest channel quality indicator to zero; otherwise select another row having a next smallest channel quality indicator in the selected column; and if the selected another row fulfils the predetermined condition set for the number of non-zero elements in a row of the channel quality indication matrix, set the selected next smallest channel quality indicator to zero.