Patent ID: 9093179
Filing Date: 2015-07-28
Classification: G11C

Abstract:
1. A chip for improving test coverage of pads, the chip comprising: a control unit; a plurality of pads, wherein a predetermined pad of the plurality of pads is used for coupling to a probe of a probe card, and the probe card is coupled to a test machine; and a storage unit comprising a plurality of blocks; wherein the control unit controls a first pad of the plurality of pads to read a predetermined datum of test data from a first predetermined block of the plurality of blocks and the first pad utilizes a parasitic capacitor thereof to store the predetermined datum, the control unit controls the first pad to write the predetermined datum to a second predetermined block of the plurality of blocks, the test machine controls the probe to read data stored in the second predetermined block through the predetermined pad and generate a read result accordingly, and the test machine determines whether the first pad is passed according to the read result.