Patent ID: 7499351
Filing Date: 2009-03-03
Classification: G11C

Abstract:
1. A semiconductor device comprising: a memory macro; and a fuse box in which fuse data to be transferred to the memory macro is stored in a nonvolatile storage element, wherein the fuse box includes a clock generator configured to generate data transfer clocks, a plurality of first data latch circuits configured to latch the fuse data, and serially transfer the fuse data upon receiving the transfer clocks, and a clock counter configured to count the transfer clocks, and generate a count-up signal when counting a predetermined number of transfer clocks, and the memory macro includes a branching controller controlled by a branching control signal generated on the basis of the count-up signal, and configured to branch the fuse data and the transfer clocks transferred from the fuse box into a plurality of transfer paths; wherein said plurality of transfer paths are different in stage, and the branching controller is formed in each stage, the branching controller formed in each stage has a first function which, when receiving a first toggle of the branching control signal, transfers data to a transfer path of the stage, and does not transfer the data to any lower stage, and the branching controller formed in each stage except for a final stage has a second function which, when receiving a second toggle of the branching control signal, transfers data to the branching controller in a lower stage.