Patent ID: 7772102
Filing Date: 2010-08-10
Classification: H01L

Abstract:
1. A fabrication method for a nonvolatile semiconductor memory, which includes a cell array region, a high-voltage circuit region, and a low-voltage circuit region, the fabrication method comprising: depositing a tunnel insulating film on a semiconductor substrate, a floating gate electrode layer on the tunnel insulating film, and a stopper film on the floating gate electrode layer; forming a device isolating region on the semiconductor substrate and removing the stopper film; depositing an inter-gate insulating film on the semiconductor substrate; removing the floating gate electrode layer, the inter-gate insulating film, and the tunnel insulating film from the low-voltage circuit region and the high-voltage circuit region; forming a first gate insulating film in the high-voltage circuit region and a second gate insulating film, which is thinner than the first gate insulating film, in the low-voltage circuit region: depositing a first gate electrode layer over the semiconductor substrate, a second gate electrode layer on the first gate electrode layer, and a masking material on the second gate electrode layer; forming gate electrodes of low-voltage transistors in the low-voltage circuit region, forming gate electrodes of high-voltage transistors in the high-voltage circuit region, and forming select gate electrodes, each of the select gate electrodes comprising a floating gate electrode layer and a control gate electrode layer electrically connected to each other, and memory cells, each of the memory cells including the floating gate electrode layer and the control gate electrode layer adjacent to one another via the inter-gate insulating film; depositing an inter-gate embedding insulator film over the semiconductor substrate, and embedding the inter-gate embedding insulator film between control gate electrode layers of the memory cells; and forming etched back gate sidewall insulating films on sidewalls of the gate electrodes of the low-voltage transistors and the gate electrodes of the high-voltage transistors and sidewalls of the select gate electrodes.