Patent ID: 7973407
Filing Date: 2011-07-05
Classification: H01L

Abstract:
1. A semiconductor device comprising: at least two stacked semiconductor substrates; a plurality of bonded opposing bumps provided on and bonding opposing ones of the at least two stacked semiconductor substrates together with one another, with ones of the bonded opposing bumps to provide electrical conduction paths between the opposing ones of the at least two stacked semiconductor substrates, and where the plurality of bonded opposing bumps are oxide/contaminant cleaned, low-temperature bonded opposing bumps; and, at least one of: pre-bonding deposited passivation layers on at least one of: exposed substrate surfaces of at least one substrate within an inter-substrate spacing of opposing ones of the at least two stacked semiconductor substrates; and, exposed bump surfaces of at least one substrate of opposing ones of the at least two stacked semiconductor substrates; and a pre-bonding deposited mechanical support layer on at least one substrate of opposing ones of the at least two stacked semiconductor substrates.