Patent ID: 9159734
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A semiconductor antifuse device that can be short-circuited by applying a voltage across first and second terminals of the device, comprising: a bulk substrate; an insulation layer on the substrate; a fin extending from the substrate and through the insulation layer to a top of the fin, the fin configured with a tapered portion and including a channel region, a source region, and a drain region, wherein the tapered portion includes a base region that extends from the insulation layer and continues to a thinned region at the top of the fin, the thinned region being 75% or more thinner than the base region; a dielectric isolation layer over the channel region and on the fin including the tapered portion; a gate material on the dielectric isolation layer and including or electrically connected with the first terminal of the device; and source and drain contacts over the source and drain regions, respectively, the source and drain contacts including or electrically connected to the second terminal of the device.