Patent ID: 9013045
Filing Date: 2015-04-21
Classification: H01L

Abstract:
1. A memory cell formed on a substrate comprising: a memory device disposed centrally in the memory cell, the memory device including a top electrode; a memory element having a plurality of layers; and a bottom electrode; a sidewall protection sleeve including at least a first layer of a first dielectric material disposed around sidewalls of the memory element and the bottom electrode, the sidewall protection sleeve generally conforming to a shape of the memory element in a plane parallel to a surface of the substrate and having a generally conical shape with an open top through which an upper surface of the top electrode protrudes; a metal bit line interconnect in electrical contact with the upper surface of the top electrode, the metal bit line interconnect being formed in a via that is wider than the upper surface of top electrode and that extends down below a plane of the upper surface of the top electrode and makes contact with the sidewall protection sleeve; a bottom etch-stop layer of a second dielectric material that forms a lower portion of a sidewall of the via and makes contact with the metal bit line interconnect in the via and makes contact with the sidewall protection sleeve; and a top etch-stop layer of a third dielectric material deposited on the bottom etch-stop layer, the top etch-stop layer forming an upper portion of the sidewall of the via and making contact with the metal bit line interconnect in the via.