Patent ID: 6673705
Filing Date: 2004-01-06
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device including first and second MISFETs comprising the steps of:providing gate insulating films of said first and second MISFETs on a semiconductor substrate; providing gate electrodes on said gate insulating films; covering the gate electrodes of said first and second MISFETs with an insulating material film, said insulating material film providing the basis of a covering insulating film having a first region arranged on said semiconductor substrate and a second region arranged on the side surfaces of the gate electrode and the gate insulating film in said first and second MISFETs; decreasing the thickness of said insulating material film by etching in a region corresponding to said first region of said covering insulating film in said first MISFET, wherein said etching is applied to only said covering insulating film of said first MISFET; and forming after said etching step a source region and a drain region in the surface region of said semiconductor substrate by ion implantation through said first region of said covering insulating film with the gate electrode used as a mask in said first and second MISFETs.