Patent ID: 6849497
Filing Date: 2005-02-01
Classification: H01L,Y10T

Abstract:
1. A method of fabricating a semiconductor integrated circuit, comprising the steps of: fabricating a plurality of MOSFETs by forming a plurality of diffused regions in a silicon substrate and a forming a plurality of gate electrodes; forming a first BPSG film so as to cover the silicon substrate and the gate electrodes; defining a plurality of first holes in the first BPSG film and forming a plurality of contact plugs, made of polysilicon and connected with the respective diffused regions, in the respective first holes; forming a single second BPSG film on top of the first BPSG film and the respective contact plugs; defining a plurality of second holes in the second BPSG film in such a way as to expose the respective upper surfaces of the contact plugs; forming a first polysilicon film on the respective interiors of the second holes, and on top of an upper surface of the second BPSG film; covering the first polysilicon film with a protection film; exposing the upper surface of the second BPSG film by removing a plurality of portions of the first polysilicon film, on top of the second BPSG film, and the protection film on top of the portions of the first polysilicon film, and farther by removing the protection film inside the respective second holes while leaving the first polysilicon film inside the respective the second holes; forming a nitride film on top of the first polysilicon film and the second BPSG film; applying healing oxidation in a wet atmosphere; and forming a second polysilicon film on top of the nitride film, wherein the second BPSG film is formed in such a way as to lower a boron dose in a layer in the vicinity of an upper surface of the second BPSG film.