Patent ID: 8149016
Filing Date: 2012-04-03
Classification: G06K

Abstract:
1. An interface circuit electronically connecting to a processor and a card reader, the interface circuit comprising: a clock circuit configured to transmit a clock signal transmitted from the processor to the card reader, the clock circuit comprising a first bipolar junction transistor (BJT); a reset circuit configured to transmit a reset signal transmitted from the processor to the card reader, the reset circuit comprising a second BJT; an I/O circuit configured to transmit data transmitted from the processor to the card reader, the I/O circuit comprising a third BJT and a fourth BJT; and a first power supply; wherein emitter terminals of the first, second, third, and fourth BJTs are all electrically connected to the processor, collector terminals of the first, second, third, and fourth BJTs are all electrically connected to the card reader, base terminals of the first, second, third, and fourth BJTs are all electrically connected to the first power supply.