Patent ID: 7661048
Filing Date: 2010-02-09
Classification: G01R,G06F

Abstract:
1. A circuit board apparatus with embedded boundary scan testing capabilities, comprising: a printed circuit board populated with electronic circuit components forming an electrical circuit; a boundary scan chain including a plurality of JTAG devices connected with the electrical circuit; a boundary scan controller mounted on the printed circuit board; a JTAG compliant test access port controller operatively coupled with the boundary scan chain to perform boundary scan testing of the electrical circuit under control of the boundary scan controller; and further comprising a processor system forming part of the electrical circuit and including at least one JTAG compliant device forming part of the boundary scan chain, the processor system including a reset control input, wherein the boundary scan controller comprises a reset output operatively coupled with the reset control input of the processor system to hold the processor system in a reset state during boundary scan testing.