Patent ID: 8097495
Filing Date: 2012-01-17
Classification: H01L

Abstract:
1. A method of providing a standard pinout configuration for a semiconductor package having first and second sides for a semiconductor die having die bond pads along a single edge of the semiconductor die adjacent to the second side of the package, comprising the step of: extending electrical lead pins of a leadframe from a first side of the package across the semiconductor die to make connection with the die bond pads adjacent the second side of the package; encapsulating the semiconductor die and a portion of the electrical lead pins in molding compound; and fortifying the leadframe during the encapsulation step for the semiconductor package by providing a spacer layer, separate and independent of the molding compound, and mounted on a side of the leadframe opposite the semiconductor die, the spacer layer extending across a substantial portion of each electrical lead pin of the extended electrical lead pins.