Patent ID: 6198342
Filing Date: 2001-03-06
Classification: H02M

Abstract:
A charge pump circuit having a plurality of pump cells connected in series, wherein a pump cell of an odd-numbered stage executes a charge pump operation for an input voltage based on a first clock signal and a second clock signal while a pump cell of an even-numbered stage executes a charge pump operation based on a third clock signal and a fourth clock signal so that an output voltage resulting from boosting the input voltage is obtained,the pump cell being characterized in that:drain of a first transistor and gate of a second transistor are connected to an input node;source of the first transistor, source of the second transistor and one electrode of a first capacitor are connected to an output node;drain of the second transistor and one electrode of a second capacitor are connected to a node connected to gate of the first transistor;a clock input node to which one of the clock signals, whichever it is, is inputted is connected to the other electrodes of the first capacitor and the second capacitor;one electrode of a third capacitor is connected to the input node;a well portion of each transistor is connected to the other electrode of the third capacitor; and thatthe pump cell is equipped with switching means for electrically connecting or cutting off the well portion and the output node to or from each other.