Patent ID: 9111593
Filing Date: 2015-08-18
Classification: G11C

Abstract:
1. A differential sense amplifier for sensing data stored in a plurality of memory cells of a memory cell array, including: a first CMOS inverter having an output connected to a first bit line and an input connected to a second bit line complementary to the first bit line, and a second CMOS inverter having an output connected to the second bit line and an input connected to the first bit line, with each CMOS inverter comprising: wherein the sense amplifier has a pair of precharge transistors arranged to be respectively coupled to the first and second bit lines to precharge the first and second bit lines to a precharge voltage, wherein the precharge transistors are constituted by the pull-up transistors or by the pull-down transistors, and the precharge transistors are configured to operate in a precharge state in response to operation of the pull-up source or the pull-down source at a partial voltage level.