Patent ID: 6127862
Filing Date: 2000-10-03
Classification: H03K

Abstract:
A programmable impedance circuit comprising:a dummy resistance element;dummy buffer element including a plurality of buffer portions, each buffer portion having a serial circuit made of a transistor and a resistance element;a binary selection signal generating circuit, connected to said dummy resistance element and said dummy buffer element, for controlling a current flowing in a predetermined buffer portion of said dummy buffer element to be equalized to a current flowing in said dummy resistance element, and outputting binary selection signals of a logic level indicating matching impedances of said dummy resistance element and said dummy buffet element is achieved when both the current flowing in the predetermined buffer portion of said dummy buffer and the current flowing in said dummy resistance element are equal to each other; andan output buffer for suppressing a variance of an impedance value of said output buffer even when an output voltage is in a transiently changing state, in accordance with the binary selection signals from said binary selection signal generating circuit, and with complimentary logic levels of complimentary input data.