Patent ID: 7843042
Filing Date: 2010-11-30
Classification: H01L

Abstract:
1. A semiconductor package, comprising: a double-sided substrate having an active surface and second surface opposite the active surface; a through-hole interconnect structure extending through the double-sided substrate from the active surface to the second surface; a first conductive layer formed over the active surface and electrically connected to the through-hole interconnect structure; a semiconductor die mounted to the active surface of the double-sided substrate and electrically connected to the first conductive layer; an encapsulant deposited over the semiconductor die and double-sided substrate and further along a sidewall of the double-sided substrate extending from the active surface to the second surface; a second conductive layer formed over the second surface and electrically connected to the through-hole interconnect structure; and a dielectric layer formed over the second surface creating a land while surrounding and isolating the second conductive layer.