Patent ID: 6780700
Filing Date: 2004-08-24
Classification: H01L

Abstract:
A method of forming a MOS device on a silicon substrate, comprising:preparing a substrate to contain a conductive region of a first conductivity type having a first device active area; forming a gate electrode structure on the first device active area, said gate electrode structure including a gate electrode and insulating sidewalls; implanting ions using a single mask and in a single implantation step of an opposite conductivity type from that of said first device active area into the exposed portions of said conductive region to form source and drain regions on opposite sides of said gate structures wherein the source region includes a LDD source region underlying the insulating sidewall, and wherein the drain region includes a LDD drain region underlying the insulating sidewall; and depositing by selective CVD a silicide layer over said source and drain regions and over said gate electrode.