Patent ID: 6774350
Filing Date: 2004-08-10
Classification: H01L,H04N

Abstract:
A solid state imaging device comprising:a light receiving section including a plurality of light receiving pixels, wherein the light receiving pixels are arranged in rows and columns in a matrix-like manner and accumulate information charges; a plurality of vertical shift registers connected to the light receiving section for transferring the information charges accumulated in the light receiving pixels in a vertical direction; a horizontal shift register connected to the vertical shift registers and including a plurality of bit regions, wherein the bit regions receive information charges transferred from the vertical shift registers, and the horizontal shift register transfers the information charges accumulated in the light receiving pixels in a horizontal direction at a ratio of m/n (m, n both being natural numbers and satisfying man output section connected to an output of the horizontal shift register, wherein the output section receives the information charges transferred in the horizontal direction and generates an image signal having a voltage corresponding to the charge amount of the information charges; and a drain section connected to the horizontal shift register for collecting the information charges received in the horizontal shift register; wherein the drain section is connected to a kÂ·(nâˆ’m) (k being an integer equal to or greater than two) number of the bit regions in a kÂ·n number of bit regions of the horizontal shift register, and the horizontal shift register transfers the information charges of the kÂ·(nâˆ’m) number of the bit regions in the kÂ·n number of bit regions to the drain section, wherein the pixels of each row are each associated with one of a k number of color components, the color components being associated with the pixels in each row in a predetermined order, and wherein the drain section is connected to an (nâˆ’m) number of an n number of bit regions associated with the same color component in the kÂ·n number of bit regions.