Patent ID: 7479681
Filing Date: 2009-01-20
Classification: H01L,H03F

Abstract:
1. A semiconductor device comprising, over a semiconductor substrate: a MISFET including a source, a drain, and a gate electrode; a resistor element; a first capacitor element including a first lower electrode and a first upper electrode; a second capacitor element including a second lower electrode and a second upper electrode; and an inductor, wherein a first silicon layer and a second silicon layer disposed over the first silicon layer are formed over the semiconductor substrate, wherein a first metal layer, a second metal layer disposed over the first metal layer and a third metal layer disposed over the second metal layer are formed over the semiconductor substrate, wherein the first silicon layer forms the first lower electrode of the first capacitor element and the resistor element, wherein the second silicon layer forms the first upper electrode of the first capacitor element and the gate electrode of the MISFET, and wherein the first metal layer forms the second lower electrode of the second capacitor element, the second metal layer forms the second upper electrode of the second capacitor element, and the third metal layer forms the inductor.