Patent ID: 6519230
Filing Date: 2003-02-11
Classification: H04J,H04L,H04Q

Abstract:
A device for testing a synchronous-transfer-mode switch which is connected to a plurality of input links and a plurality of output links, comprising:a plurality of test data sending blocks each provided for a corresponding one of the input links and each equipped with a function to set test data in a particular time slot of the corresponding one of the input links, thereby allowing the corresponding one of the input links to convey time slots used for a non-test purpose as well as the particular time slot used for a test; and a plurality of test data receiving blocks each provided for a corresponding one of the output links and each equipped with a function to store data of time slots of the corresponding one of the output links when the time slots of the corresponding one of the output links are used for the test, wherein each of said test data sending blocks includes a register which stores a used/unused status of each time slot with respect to a corresponding one of the input links, each of said test data sending blocks selecting the particular time slot based on the used/unused status stored in said register.