Patent ID: 7388357
Filing Date: 2008-06-17
Classification: H02M

Abstract:
1. A power system, comprising: a front end regulator coupled to an input supply voltage (Vin) and for providing a regulated input supply voltage (Vbp) and maintaining a substantially constant voltage difference between the input supply voltage (Vin) and the regulated input supply voltage (Vbp) to thereby reduce ripple of the input supply voltage (Vin), the front end regulator comprising (1) an error amplifier for comparing the input supply voltage (Vin) and the regulated input supply voltage (Vbp) and producing an error signal used to modulate the voltage difference between the input supply voltage (Vin) and the regulated input supply voltage (Vbp) and (2) a MOS device operatively coupled to the error amplifier, the MOS device including a gate terminal for receiving the error signal, a source terminal coupled to the input supply voltage (Vin), and a drain terminal coupled to the regulated input supply voltage (Vbp); and a DC-DC switching mode power converter operatively coupled to the front end regulator and receiving the regulated input supply voltage (Vbp), the DC-DC switching mode power converter providing a regulated output voltage (Vout).