Patent ID: 6476477
Filing Date: 2002-11-05
Classification: H01L

Abstract:
A semiconductor chip comprising:a semiconductor substrate; an integrated circuit of electrical components on the semiconductor substrate; a first insulation layer on the integrated circuit; a plurality of voltage lines over the first insulation layer; a plurality of voltage vias in the first insulation layer, each connecting a respective electrical component to a respective voltage line; a final insulation layer over the voltage lines, from the substrate to the final insulation layer forming part of a composite stack of layers formed directly on one another; a plurality of voltage contact pads on the final insulation layer; a plurality of voltage vias in the final insulation layer, each electrically connecting a respective voltage line to a respective voltage contact pad, a plurality of series connections being formed, each from and including a respective voltage via in the first insulation layer up to and including a respective one of the voltage contact pads; and a voltage shunt connection located above the first insulation layer and having portions contacting the series connections so as to electrically connect the voltage lines to one another.