Patent ID: 6746914
Filing Date: 2004-06-08
Classification: H01L

Abstract:
A method of forming conductive interconnect plugs and interconnect plugs to a Metal-Insulator-Metal capacitor by applying the dual damascene process, comprising the steps of:providing a substrate, said substrate having been provided with semiconductor devices in or over the surface thereof; providing at least one first and at least one second dual damascene plug through a first layer of dielectric deposited over the surface of said substrate; creating at least one Metal-Insulator-Metal capacitor over the surface of said first layer of dielectric aligned with said at least one first dual damascene plug, said creating at least one Metal-Insulator-Metal capacitor comprising a one step etch of a stack of layers comprising a first layer of capacitor electrode material over which a layer of capacitor dielectric material over which a second layer of capacitor electrode material wherein said a first layer of capacitor electrode is in contact with said first layer of dielectric; providing at least one third and at least one fourth dual damascene plug through: (i) a layer of etch stop material deposited over the surface of said first layer of dielectric, and (ii) a second layer of dielectric deposited over the surface of said layer of etch stop material, said at least one third dual damascene plug being aligned with said at least one Metal-Insulator-Metal capacitor, said at least one fourth dual damascene interconnect plug being aligned with said at least one second dual damascene plug.