Patent ID: 8051305
Filing Date: 2011-11-01
Classification: G06F,G09G,Y02D

Abstract:
1. A computing apparatus comprising: first and second connecting interfaces; first and second graphics cards coupled respectively to said first and second connecting interfaces; a power source connected electrically to said first connecting interface for supplying electric power to said first graphics card via said first connecting interface; a switch unit coupled between said second connecting interface and said power source, and operable so as to switch between an ON-state, where said power source supplies electric power to said second graphics card via said second connecting interface, and an OFF-state, where the electric power from said power source is not supplied to said second graphics card; a control module coupled to said switch unit and operable so as to output a control signal to said switch unit so that said switch unit is switched to a selected one of the ON-state and the OFF-state based on the control signal from said control module; and a display unit coupled to said control module, and an input unit coupled to said control module, wherein said control module comprises: wherein said central processor reads the BIOS data and the program code data from said BIOS memory for initialization upon power-on of said computing apparatus so that said system chipset is able to generate an output corresponding to the program code data, indicative of a currently set one of the ON-state and the OFF-state of said switch unit, and displayed on said display unit; and wherein said input unit is operable in accordance with the output displayed on said display unit to output an input signal corresponding to the selected one of the ON-state and the OFF-state of said switch unit to said system chipset so that said system chipset updates the program code data based on the input signal from said input unit and outputs the control signal to said switch unit based on the program code data.