Patent ID: 6521923
Filing Date: 2003-02-18
Classification: H01L

Abstract:
A microwave transistor structure comprising:a silicon carbide substrate; a silicon semiconductor material having a top surface; said silicon semiconductor material overlaying said silicon carbide substrate; a conductive gate overlying and insulated from said top surface of said silicon semiconductor material; a channel region formed completely within said silicon semiconductor material of said first conductivity type, said channel region being of a second conductivity type and having a channel region dopant concentration; a drain region formed in said silicon semiconductor material, said drain region being of said second conductivity type and having a drain dopant concentration greater than said channel region dopant concentration; said drain region contacting said channel region; a body region formed in said silicon semiconductor material, said body region being of said first conductivity type and having a body region dopant concentration, said body region dopant concentration being equal or greater than said first dopant concentration, said body region having a first end underlying said conductive gate, any remaining portion of said silicon semiconductor material underlying said gate being of said first conductivity type; a source region formed in said silicon semiconductor material, said source region being of said second conductivity type and having a source region dopant concentration, said source region being located within said body region; a shield plate region formed on said top surface of said silicon semiconductor material over a portion of said channel region, said shield plate being adjacent and parallel to said drain region; said shield plate being adjacent and parallel to said conductive gate region; said shield plate extending above said top surface of said silicon semiconductor material to a shield plate height level, said shield plate being insulated from said top surface of said silicon semiconductor material; and a conductive plug region formed in said body region of said silicon semiconductor material, wherein said conductive plug region connects a lateral surface of said body region to said top surface of said substrate.