Patent ID: 8163611
Filing Date: 2012-04-24
Classification: G03F,H01L

Abstract:
1. A semiconductor device fabrication method, comprising: forming a first material over a work substrate; forming a first resist layer to cover the first material; performing a first exposure process on the first resist layer to form a first resist pattern over the substrate; slimming the first resist pattern to form a second resist pattern over the substrate; processing the first material using the second resist pattern as a mask to form a first hard mask pattern over the substrate; removing the second resist pattern; forming a second resist layer to cover the first hard mask pattern after the second resist pattern is removed; performing a second exposure process on the second resist layer to form a third resist pattern over the substrate; processing the first material having the first hard mask pattern using the third resist pattern as a mask to form a second hard mask pattern over the substrate; removing the third resist pattern; processing the work substrate using the second hard mask pattern; and removing the first material.