Patent ID: 8050077
Filing Date: 2011-11-01
Classification: G11C,H01H,H01L

Abstract:
1. In a semiconductor device having a semiconductor substrate, transistor devices formed on the semiconductor substrate, and a transistor-based fuse structure formed on the semiconductor substrate, the transistor-based fuse structure comprising a plurality of transistor-based fuses, a method of programming the transistor-based fuse structure comprising: selecting, from the plurality of transistor-based fuses, a first target fuse to be programmed for operation in a low-resistance/high-current state, the first target fuse having a first source, a first gate, a first drain, and a first gate insulator layer between the first gate and the semiconductor substrate; selecting, from the plurality of transistor-based fuses, a second target fuse to be programmed for operation in a high-resistance/low-current state, the second target fuse having a second source, a second gate, a second drain, and a second gate insulator layer between the second gate and the semiconductor substrate; applying a first set of program voltages to the first source, the first gate, and the first drain to cause breakdown of the first gate insulator layer such that current can flow from the first source to the first gate through the first gate insulator layer, and from the first gate to the first drain through the first gate insulator layer; and applying a second set of program voltages to the second source, the second gate, and the second drain of the second target fuse to preserve the second gate insulator layer such that current flow from the second source to the second drain is significantly impeded, wherein applying the second set of program voltages comprises grounding the second source, grounding the second gate, and applying a programming voltage at the second drain.