Patent ID: 8392009
Filing Date: 2013-03-05
Classification: G05B,H01L

Abstract:
1. A semiconductor manufacturing method, comprising: performing a first process to a first plurality of semiconductor wafers each having a plurality of fields; determining a sampling rate to the first plurality of semiconductor wafers based on process quality, wherein the determining the sampling rate includes determining the sampling rate according to a process capability Cpk, wherein the determining the sampling rate includes relating the process capability Cpk and the sampling rate using an average outgoing quality (AOQ) by a formula AOQij=(1−Fij)Pij, in which i denotes a product i, j denotes a processing tool j, AOQij denotes an average outgoing quality for the product i and the processing tool j, Fij denotes an average sampling rate for the product i and the processing tool j, and Pij denotes defective rate for the product i and the processing tool j; determining sampling fields and sampling points to the first plurality of semiconductor wafers; measuring a subset of the first plurality of semiconductor wafers according to the sampling rate, the sampling fields, and the sampling points; modifying a second process according to the measuring; and applying the second process to a second plurality of semiconductor wafers.