Patent ID: 7310058
Filing Date: 2007-12-18
Classification: H03M

Abstract:
1. An analog to digital converter (ADC), comprising: a first sampling circuit sampling an input signal; a first amplifier receiving said sampled input signal from said first sampling circuit, and providing an amplified version of said sampled input signal as an output; a quantizer sampling said output of said first amplifier for a first duration, and generating a sub-code representing a voltage of said input signal; a second sampling circuit sampling said input signal; a second amplifier receiving said sampled input signal from said second sampling circuit, and providing an amplified version of said sampled input signal as an output; and a first circuit sampling said output of said second amplifier for a second duration, said first circuit generating an amplified residue signal for processing by a next stage also comprised in said ADC; wherein said first duration is less than said second duration; and wherein said quantizer determines said sub-code in a decision duration which overlaps with said second duration.