Patent ID: 6518819
Filing Date: 2003-02-11
Classification: H03K,H04L

Abstract:
A circuit with a push-pull output stage acting as an amplifier stage for digital signals, comprising:two n-channel MOS transistors operating as source followers and each having a gate terminal; two p-channel MOS transistors operating as source followers and each having a gate terminal; operational amplifiers driving said gate terminals of the respective n-channel MOS transistors and p-channel MOS transistors via drivers; a first of said operational amplifiers having a non-inverting input carrying a voltage defining a desired value of a high level of an output of the push-pull output stage, a second of said operational amplifiers having an inverting input carrying a voltage defining a desired value of a low level of the output of the push-pull output stage; and a feedback interacting with said operational amplifiers for regulating respective high levels and low levels of gate voltages of said n-channel MOS transistors and said p-channel MOS transistors to a substantially constant value independently of an operating state of the push-pull output stage.