Patent ID: 7483329
Filing Date: 2009-01-27
Classification: G11C

Abstract:
1. A dual-voltage protocol card comprising: a flash-memory chip for storing blocks of data in a non-volatile flash memory; an insertable end for inserting into a protocol socket on a host; a bus connection formed on the insertable end, for mating with connectors on the protocol socket on the host to connect to a host protocol bus on the host; a host power line formed on the insertable end, for connecting to a host power connector on the protocol socket; wherein the host power line receives a high power voltage from the host socket when the host is a legacy host; wherein the host power line receives a reduced power voltage from the host socket when the host is a reduced-voltage host, wherein the reduced power voltage is less than the high power voltage; a voltage regulator on the dual-voltage protocol card, the voltage regulator connected to the host power line, the voltage regulator generating an internal reduced voltage from the high power voltage from the legacy host or from the reduced power voltage from the reduced-voltage host; a controller core on the dual-voltage protocol card that receives the internal reduced voltage from the voltage regulator to power internal circuitry; a flash controller in the controller core for communicating with the flash-memory chip; a protocol controller in the controller core for communicating with the host; a voltage converter that receives the internal reduced voltage from the voltage regulator, the voltage converter generating a flash power voltage from the internal reduced voltage; and a power-supply input of the flash-memory chip that receives the flash power voltage generated by the voltage converter, wherein the flash power voltage powers the flash-memory chip, whereby dual voltages from the legacy host or from the reduced-voltage host are converted to the internal reduced voltage to power the controller core, and to the flash power voltage to power the flash-memory chip.