Patent ID: 6143579
Filing Date: 2000-11-07
Classification: H01L

Abstract:
A method for assessing effect of chamber process history of a plasma etching tool on the capacity of said tool to introduce plasma damage in thin gate and tunnel oxide layers during gate sidewall etching comprising:(a) providing a monitor wafer with a region containing test devices comprising:(i) a gate oxide formed over each of an array of islands of active silicon area surrounded by a field oxide;(ii) an array of polysilicon plates formed over said gate oxides, each of said array of polysilicon plates partially covering corresponding said gate oxide of one of said array of islands, and extending over a portion of said field oxide, whereby each of said polysilicon plates, corresponding said gate oxide, and corresponding said island comprises a test device;(iii) a conformal insulative layer on said array of polysilicon plates and entirely covering said region;(b) loading said monitor wafer into an etch chamber of a plasma etcher;(c) evacuating said etch chamber;(d) anisotropically etching said conformal insulative layer in said plasma etcher for a first time period with a first etchant gas under a first set of parameters thereby exposing said polysilicon plates;(e) subjecting said wafer to an over-etch for a second time period;(f) unloading said wafer from said plasma etcher;(g) measuring and recording a set of oxide damage data by performing electrical measurements on a plurality of said test devices;(h) recording etching parameters and process characteristics of each of a number of most recent previous jobs performed in said etching chamber; and(i) correlating said oxide damage data to said etching parameters and said process characteristics.