Patent ID: 6767826
Filing Date: 2004-07-27
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising:providing a semiconductor substrate having a contact area and a non-contact area; forming a first wiring over the semiconductor substrate; forming a first insulating layer over the first wiring and the semiconductor substrate; forming an etching resistant film on the first insulating layer within the non-contact area; forming a second insulating layer on the etching resistant film and the first insulating layer; forming a mask pattern layer on the second insulating layer; etching the first and second insulating layers using the mask pattern layer as a mask to simultaneously form a wiring trench in the contact area and a dummy trench in the non-contact area, wherein the dummy trench is formed in the second insulating layer up to the etching resistant film and the wiring trench is formed in the first and second insulating layers so as to expose the first wiring, wherein only the mask pattern layer is used as a mask that defines the dummy trench and the wiring trench; forming a conductive layer in the wiring trench and the dummy trench and on a surface of the second insulating layer; and polishing the conductive layer until the surface of the second insulating layer is exposed.