Patent ID: 9158879
Filing Date: 2015-10-13
Classification: G06F

Abstract:
1. A method comprising: determining, by at one processor, a plurality of first routes extending horizontally in an integrated circuit (IC) design, the IC design having a plurality of equally spaced vertical positions, each of the plurality of first routes being located at one of the plurality of equally spaced vertical positions; determining, by the at least one processor, whether a second route overlaps one of the vertical positions of the plurality of equally spaced vertical positions; selecting a design rule for the second route based on the determination of whether the second route overlaps; designating first and second sets of the plurality of first routes, wherein the selected design rule is selected from a plurality of design rules comprising a first design rule indicating a first separation distance between the second route and a route of the first set and a second separation distance between the second route and a route of the second set; and designating first and second sets of the equally spaced vertical positions, each vertical position of the first set of the equally spaced vertical positions being separated from another vertical position of the first set of the equally spaced vertical positions by a vertical position of the second set of the equally spaced vertical positions, wherein the designation of first and second sets of the plurality of first routes is based on the designation of the first and second sets of the equally spaced vertical positions.