Patent ID: 6307587
Filing Date: 2001-10-23
Classification: G06T,H04N

Abstract:
A circuit for use with an imager capable of capturing an image, comprising:a memory configured to:during a first time interval, store a first representation of a first subimage of the image from the imager, andduring a second time interval, receive an update from the imager and use the update and the first representation to store a second representation of a second subimage of the image, the first subimage partially overlapping the second subimage and the update representing a portion of the second subimage not present in the first subimage,wherein the memory comprises memory cells configured to shift the first representation among the cells to form the second representation; andan output circuit configured to:during the first time interval, use the first representation to generate output signals representative of the first subimage, andduring the second time interval, use the second representation to generate output signals representative of the second subimage,wherein the second subimage is offset from the first subimage along one of at least two different directions,wherein, during the second time interval, the memory cells are further configured to shift the first representation among the cells along said one of the directions, andwherein the memory further comprises at least two shift register banks, each different shift register bank associated with a different one of the directions and operable to receive the update when the direction associated with the bank corresponds to said one of the directions.