Patent ID: 6278149
Filing Date: 2001-08-21
Classification: H01L,Y10S

Abstract:
A semiconductor device comprising:a plurality of first trench capacitors formed in a DRAM portion of a DRAM-logic embedded integrated circuit;a plurality of second trench capacitors formed in the logic circuit portion of the DRAM-logic embedded integrated circuit, ones of electrodes of said plurality of second trench capacitors being commonly connected;a wiring portion which electrically connects said plurality of second trench capacitors in parallel by commonly connecting other ones of electrodes of said plurality of second trench capacitors, to form a plurality of capacitor block; andconnection/separation circuit which selectively connects said wiring portions to each other or separates them from each other to thereby vary the capacitance value of said capacitor block,wherein said second trench capacitors are of the same structure as that of first trench capacitors.