Patent ID: 7944770
Filing Date: 2011-05-17
Classification: G06F,G11C

Abstract:
1. A static random access memory system used within a microprocessor, comprising: a static random access memory array including a plurality of static random access memories; a storage unit configured to store a context ID used in the execution of a program or a process in association with an access pattern of the plurality of static random access memories in the execution of the program or the process; a search unit configured to, every time context switching occurs, search the storage unit for an access pattern that is associated with a context ID corresponding to a context ID of a program or a process to be executed after the context switching; and a power control unit configured to cause a static random access memory to be readable and writable on the basis of the access pattern of the plurality of static random access memories found by the search unit, wherein the access pattern of the plurality of static random access memories is a pattern denoting the plurality of static random access memories being powered on or powered off when the context switching occurs, and when the search unit does not find an access pattern associated with a context ID corresponding to a context ID of a program or a process to be executed after the context switching, an entry for such an access pattern is reserved in the storage unit.