Patent ID: 7489521
Filing Date: 2009-02-10
Classification: H01L,H05K,Y10T

Abstract:
1. A multilayer printed wiring board comprising: a core substrate; a build-up layer formed over the core substrate and having conductor patterns disposed on an upper surface of the build-up layer; a low elastic modulus layer formed over the build-up layer and the conductor patterns; a plurality of mounting electrodes disposed on an upper surface of the low elastic modulus layer, configured to mount an electronic element; and a plurality of conductor posts passing through the low elastic modulus layer, electrically connecting the mounting electrodes and the conductor patterns, and including external conductor posts forming external portions of the conductor posts and internal conductor posts forming internal portions of the conductor posts, wherein the conductor posts have an aspect ratio Rasp which is not less than 4 and a diameter which is larger than 30 μm, and an aspect ratio Rasp of the external conductor posts is greater than or equal to an aspect ratio Rasp of the internal conductor posts.