Patent ID: 6930979
Filing Date: 2005-08-16
Classification: H04L

Abstract:
1. An interface device for data transfer between a link layer device and a PHY layer device, comprising: at least one transmit data signal, from the link layer device to the PHY layer device, for transmitting data; a transmit Start of a cell or a packet signal, from the link layer device to the PHY layer device, for indicating the transmission of the cell or the packet; a transmit data valid signal, from the link layer device to the PHY layer device, for indicating that the transmit data is valid at a particular point in the time during the transmission; at least one transmit full signal, from the PHY layer device to the link layer device, for indicating that a buffer in the PHY layer device is full in which no more cells can be received; and a transmit clock signal, from the link layer device to the PHY layer device, for serving as a clock signal for transmitting signals including the at least one transmit data signal, the transmit Start of cell or packet signal, and the transmit data valid signal; wherein the interface comprises an ATM interface for communicating with ATM interface signals; wherein the ATM interface comprises a transmit Start signal, from the PHY layer device to the link layer device, for indicating the transmission of flow control signals for a first group of channels.