Patent ID: 7277977
Filing Date: 2007-10-02
Classification: G06F,G11C

Abstract:
1. A dynamic random access memory (DRAM) comprising: a plurality of normal banks, wherein a selected normal bank outputs at least two data continuously without restoring each data back to an original cell of the selected normal bank when continuous read commands are accessed to the selected normal bank; at least one cache bank, which has same data access scheme with the normal banks, for selectively storing the data outputted from a normal bank selected in response to a read command and a fast read command; and a controlling means for controlling an access to one of the cache banks and the plurality of normal banks and restoring the data that is outputted from the selected normal bank in response to the fast read command and stored in the cache bank into the original bank after a data access to the original bank is terminated, wherein the controlling means includes: