Patent ID: 7704871
Filing Date: 2010-04-27
Classification: H01C,H01L

Abstract:
1. A method of making an integrated circuit structure comprising: (a) forming a first thin film resistor on a first oxide layer disposed on a semiconductor substrate having a circuit element therein; (b) forming a second oxide layer over the first oxide layer and the first thin film resistor; (c) forming a second thin film resistor on the second oxide layer; (d) forming a third oxide layer over the second thin film resistor and the second oxide layer; and (e) forming interconnect metallization elements on at least one of the second and third oxide layers for electrically contacting a terminal of the circuit element, terminals of the first thin film resistor, and terminals of the second thin film resistor, respectively, through corresponding contact openings in at least one of the second and third oxide layers; wherein the first thin film resistor and the second thin film resistor have different sheet resistances and different temperature coefficients of resistance; and wherein the temperature coefficient of resistance of the first thin film resistor is adjusted by performing an anneal of the first thin film resistor prior to forming the second thin film resistor and prior to forming the interconnect metallization elements.