Patent ID: 6812581
Filing Date: 2004-11-02
Classification: H01L

Abstract:
A semiconductor integrated device comprising:an insulative substrate having a first substrate surface, on which a plurality of external terminals are configured, and a second substrate surface, which is opposite to the first substrate surface; a semiconductor chip having a first chip surface, on which a plurality of semiconductor devices are configured, a second chip surface, which is opposite to the first chip surface, and a side surface, which connects the first chip surface and the second chip surface, wherein the second chip surface is opposed to the second substrate surface; resin covering the side surface of the semiconductor chip and applied between the second substrate surface and the second chip surface, wherein the resin has an outer surface covering the side surface of the semiconductor chip; a plurality of external wires formed along the outer surface of the resin and electrically connected to the external terminals; and a plurality of internal terminals connected to the external wires and relatively narrow internal wires, wherein each internal terminal extends above and across a boundary between the resin and the side surface of the semiconductor chip.