Patent ID: 7765376
Filing Date: 2010-07-27
Classification: G06F,G11C,Y02D

Abstract:
1. A semiconductor device for synchronous transfer of information, the semiconductor device comprising: a) a plurality of terminals to couple to a source synchronous bus having address and control lines to carry address signals and control signals, and a clock line to carry a clock signal that is sourced with the address signals and the control signals, the plurality of terminals including at least a first terminal to couple to the clock line that is capable of carrying the clock signal to the device; a plurality of second terminals to couple to the address and control lines to provide the address signals and the control signals to the device; b) input receivers to receive said clock signal, said address signals and said control signals from said first and second terminals; c) a plurality of third terminals to couple to a data bus; d) a plurality of open drain output drivers to drive read data onto said third terminals; and e) input latches to latch the address and control signals based on the clock signal.