Patent ID: 8694874
Filing Date: 2014-04-08
Classification: H03M,H04L

Abstract:
1. A circuit for parallel perforation in rate matching, the circuit comprising multiple selector arrays and corresponding multiple register groups; wherein each selector array comprises a start selector array, one or more combining selector arrays, and an end selector array; correspondingly, each register group comprises a start register group, one or more combining register groups, and an end register group; wherein input data are connected to a data input end of the start selector array; output of the start selector array is registered into the start register group; the start register group is connected to both a data input end of the combining selector array and a data input end of the end selector array; output of the end selector array is registered into the end register group; the end register group and the combining register group, after combined with each other, serve as the data input end of the combining selector array; output of the combining selector array is registered into the combining register group; and the data in the combining register group serve as output data, wherein the selector array comprises a first selector array, a second selector array and a third selector array; and the register group comprises a first register group, a second register group and a third register group; wherein the input data are connected to a data input end of the first selector array; output of the first selector array is registered into the first register group; the first register group is connected to both a data input end of the second selector array and a data input end of the third selector array; output of the third selector array is registered into the third register group; the third register group and the second register group, after combined with each other, serve as the data input end of the second selector array; output of the second selector array is registered into the second register group; and the data in the second register group serve as output data, wherein the first selector array is configured to remove a null bit in the input data.