Patent ID: 6822288
Filing Date: 2004-11-23
Classification: H01L

Abstract:
A trench MOSFET transistor device comprising:a silicon substrate of a first conductivity type; a silicon epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower majority carrier concentration than said substrate; a trench extending into said epitaxial layer from an upper surface of said epitaxial layer; an insulating layer lining at least a portion of said trench; a conductive region within said trench adjacent said insulating layer; a body region of a second conductivity type provided within an upper portion of said epitaxial layer and adjacent said trench; a source region of said first conductivity type provided within an upper portion of said body region and adjacent said trench; an upper region of second conductivity type within an upper portion of said body region and laterally adjacent said source region, wherein said upper region does not extend to said trench, and wherein said upper region has a higher majority carrier concentration than said body region; and a source contact region disposed on said epitaxial layer upper surface, said source contact region comprising (a) a doped polycrystalline silicon contact region in electrical contact with said source region and (b) a metal contact region adjacent said doped polycrystalline silicon contact region and in electrical contact with said source region and with said upper region, wherein said source region does not contain dopant diffused from said doped polycrystalline silicon contact region.