Patent ID: 6260151
Filing Date: 2001-07-10
Classification: G06F,Y02D

Abstract:
A computer system comprising:a processor containing at least one power-consuming module including a floating-point arithmetic module:control means for controlling supply and cut of a clock signal supplied to at least one of said power-consuming modules:clock conversion means, provided between an oscillation circuit and at least one of said power-consuming modules for converting a frequency of an inputted clock stepwise in a range from an original frequency to a stopping state, wherein when the supply of the clock signal to at least one of said power-consuming modules is stopped. transmitting a control signal to said clock conversion device such that the frequency of the clock is converted stepwise in a direction of changing from the original frequency toward the stopping state. and when the supply of the clock signal to at least one of said power-consuming modules is resumed. transmitting a control signal to said clock conversion device such that the frequency of the clock is converted stepwise in a direction of changing from the stopping state toward the original frequency,sensing means for sensing a remaining capacity of a battery serving as a power supply, wherein said control means includes means for adjusting a frequency of the clock supplied to said at least one of power-consuming modules in accordance with the remaining capacity of the battery sensed by said sensing means.