Patent ID: 9097654
Filing Date: 2015-08-04
Classification: B81B,C25B,G01N

Abstract:
1. An electrode assembly having a laminate structure comprising: a first insulating capping layer; a first conducting layer capped by the first insulating capping layer and substantially encapsulated by at least the first insulating capping layer such that only an electrical contact lip of the first conducting layer is exposed; and an array of etched voids extending through at least the first insulating capping layer and the first conducting layer, wherein each void is partly bound by a surface of the first conducting layer which acts as an internal submicron electrode, wherein a thickness of the conducting layer is in the range of an atomic thickness to 0.99 microns, a depth of the internal submicron electrode is in the range of 0.05 to 10 microns, an etch depth of each void is in the range of 0.05 to 100 microns, a lateral dimension of each void is in the range of 10 to 100 microns and the array has a pitch in the range of 10 to 200 microns.