Patent ID: 7521306
Filing Date: 2009-04-21
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising the steps of: forming a drain layer of a first conduction type on a surface of a semiconductor substrate of the first conduction type; introducing an impurity of a second conduction type opposite to the first conduction type into an entire surface of said drain layer, thereby forming a channel layer; forming a trench so as to penetrate said channel layer and reach said drain layer using a first mask; forming a first insulating film on an inner wall of said trench and a surface of said channel layer; forming a conductive layer on said first insulating film; forming a second insulating film on said conductive layer; patterning said second insulating film, said conductive layer, and said first insulating film with using a same second mask, to form a gate insulating film of said first insulating film, and a gate electrode of said conductive layer; implanting an impurity of the first conduction type into a surface of said channel layer with using said gate electrode as a mask, thereby forming a impurity region of the first conduction type; forming a third insulating film on an entire surface; etching back said third insulating film to form a side wall insulator which covers side walls of said gate insulating film, said gate electrode, and said first insulating film; forming a third mask having an opening located in a center of the impurity region and cover an entire surface except for the opening, before etching the impurity region; etching the impurity region by using the third mask to form a recess to penetrate the impurity region and reach to the channel region, thereby forming a source region of the impurity region; and implanting an impurity of the second conduction type into a bottom of said recess, with remaining said third mask, thereby forming a body contact region; and removing said third mask; and forming a second conductive layer which covers said source region, said body contact region, said side wall insulator, and said second insulating film, and patterning said second conductive layer by using a fourth mask, thereby forming a wiring layer.