Patent ID: 8669619
Filing Date: 2014-03-11
Classification: H01L

Abstract:
1. A semiconductor device structure, comprising: a substrate comprising a transistor thereon; a bi-layer contact etching stop layer (CESL) structure covering the transistor, the bi-layer CESL structure comprising a first CESL and a second CESL on the first CESL, wherein the second CESL is in direct contact with the first CESL, the first CESL is in direct contact with the substrate and the transistor, and wherein the second CESL acts as a plasma discharging layer; and a dielectric layer on the second CESL, wherein the dielectric layer is in direct contact with the second CESL; wherein the first CESL is made of a material different from that of the second CESL, and the second CESL is made of a material different from that of the dielectric layer, and wherein the second CESL has stronger plasma immunity than that of the first CESL.