Patent ID: 6331479
Filing Date: 2001-12-18
Classification: H01L

Abstract:
A method to form trenches in the manufacture of an integrated circuit device comprising:providing a semiconductor substrate;depositing a first dielectric layer overlying said semiconductor substrate;depositing a first etch stopping layer overlying said first dielectric layer;depositing a second etch stopping layer overlying said first etch stopping layer wherein said first etch stopping layer has a lower etch rate than said second etch stopping layer;depositing a photoresist layer overlying said second etch stopping layer;patterning said photoresist layer to define openings for planned trenches;etching through said second etch stopping layer to form a hard mask for said planned trenches;stripping away said photoresist layer by ashing where said first etch stopping layer protects said first dielectric layer from damage due to the presence of oxygen radicals;thereafter etching said first etch stopping layer to complete said trenches; andcompleting said integrated circuit device.