Patent ID: 7700422
Filing Date: 2010-04-20
Classification: H01L

Abstract:
1. A method of forming a memory array, the method comprising the act of: forming a plurality of memory elements, the act of forming the a plurality of memory elements comprising: forming a plurality of first-electrodes within a plurality of rows of the memory array; forming a first first-electrode located within each row, forming a second first-electrode located within each first row, forming a resistance variable material over the first and second first-electrodes; forming a first second-electrode over the resistance variable material, the first second-electrode formed to be associated with a first first-electrode in a first row to define a first memory element; and forming a second second-electrode over the resistance variable material, the second second-electrode formed to be associated with the first first-electrode in the first row to define a second memory element and forming a third second-electrode over the resistance variable material, the third second electrode formed to be associated with the first first-electrode in the first row to define a third memory element, the first, second and third memory elements being configured to be individually addressable.