Patent ID: 7781835
Filing Date: 2010-08-24
Classification: H01L

Abstract:
1. A lateral MOSFET comprising: a substrate of a first conductivity type; a first epitaxial layer of said first conductivity type grown on said substrate; a second epitaxial layer grown on said first epitaxial layer; and a gate electrode formed on a gate dielectric which in turn is formed on a top surface of said second epitaxial layer; wherein said second epitaxial layer comprises: wherein a PN junction lying between said heavily doped body and said first epitaxial region under said heavily doped body defines a voltage clamping region, and a reverse bias voltage that is slightly less than a breakdown voltage applied to said PN junction in said voltage clamping region creates a depletion region that extends to a region of said first epitaxial layer in which the vertical dopant concentration is substantially constant.