Patent ID: 7319058
Filing Date: 2008-01-15
Classification: H01L

Abstract:
1. A fabrication method of a non-volatile memory (NVM), comprising: providing a substrate; forming a plurality of first trenches and a plurality of second trenches in the substrate, wherein the second trenches are located above the first trenches and cross over the first trenches; sequentially forming a tunneling layer and a charge storage layer on a sidewall of each of the second trenches; filling an isolation layer into each of the first trenches; forming a charge barrier layer on a sidewall of each of the second trenches to cover the charge storage layer; forming a gate dielectric layer on the bottom of each of the second trenches, wherein the gate dielectric layer covers at least the substrate between two adjacent first trenches; filling a control gate layer into each of the second trenches; forming a plurallty of first doping regions in the substrate at both sides of the control gate layer; and forming a second doping region at the bottom of each of the second trenches after forming the gate dielectric layer.