Patent ID: 6472714
Filing Date: 2002-10-29
Classification: H01L,Y10S

Abstract:
A semiconductor device, comprising:a semiconductor substrate of a first conductivity type a memory cell section complementary transistor provided on said semiconductor substrate; and a core section complementary transistor provided on said semiconductor substrate, said core section complementary transistor having: a first well of a second conductivity type provided in said semiconductor substrate; a first core section MOS transistor provided on said first well of the second conductivity type, said first core section MOS transistor having source-drain regions of the first conductivity type; a second core section MOS transistor provided on said semiconductor substrate, said second core section MOS transistor having source-drain regions of the second conductivity type; a device separation film which separates said first core section MOS transistor and said second core section MOS transistor from each other; and a well of the first conductivity type provided under a part of said device separation film which is closer to said second core section MOS transistor, said well of the first conductivity type having an impurity concentration higher than that of said semiconductor substrate.