Patent ID: 8624332
Filing Date: 2014-01-07
Classification: H01L

Abstract:
1. An electronic power device comprising: a semiconductor substrate; an epitaxial layer on said semiconductor substrate; respective gate, source and drain areas on a same side of said epitaxial layer; a first metallization level adjacent said epitaxial layer defining respective gate, source and drain metallizations for said gate, source and drain areas; a second metallization level adjacent said first metallization level defining respective gate, source and drain terminals for said gate, source and drain metallizations; said respective gate, source and drain areas being configured as a set of modular areas extending parallel to each other, each modular area having a rectangular elongate source area perimetrically surrounded by a narrow gate area and a drain area defined by first and second regions, the first regions of said drain area extending parallel to one another and separating adjacent modular areas, and the second regions of said drain area extending parallel to one another and contacting ends of the first regions of said drain area; and a sinker structure extending perpendicularly to said semiconductor substrate and comprising a grid of sinkers located below both the first and second regions of said drain area to provide a conductive channel for current coming from said source areas in adjacent modular areas and directed across said semiconductor substrate towards said drain area therebetween, said sinker structure extending through said epitaxial layer and directly underlying and contacting the drain region.