Patent ID: 7592706
Filing Date: 2009-09-22
Classification: C25D,H05K,Y10T

Abstract:
1. A build-up layer circuit board with fine pitches comprising: a core substrate having a plurality of contact pads thereon; a first dielectric layer formed on the surface of the core substrate; a second dielectric layer formed on the surface of the first dielectric layer; a plurality of conductive vias corresponding to the contact pads and disposed in the first dielectric layer and the second dielectric layer; a third dielectric layer on the surface of the second dielectric layer; a plurality of circuits disposed in the third dielectric layer, wherein the circuits are flushed to the surface of the third dielectric layer and electrically connected to the contact pads through the conductive vias; and a seed layer disposed between the conductive vias, the circuits, and the first dielectric layer, the second dielectric layer, and the third dielectric layer.