Patent ID: 7932159
Filing Date: 2011-04-26
Classification: H01L

Abstract:
1. A method of fabricating a flash memory device, the method comprising: providing a semiconductor substrate in which first trenches are formed in an isolation region and a stacked layer of a tunnel insulating layer and a first conductive layer is formed in an active region; etching the first conductive layer and the tunnel insulating layer by employing etch masks through which a part of the first conductive layer and a part of the first trenches are exposed on boundaries of the isolation region and the active region, thus reducing a width of the active region, and etching the semiconductor substrate including the first trenches to thereby form second trenches deeper than the first trenches; forming isolation layers to gap-fill between the first and second trenches and the first conductive layers; and forming a second conductive layer on the first conductive layer so that one side of second conductive layer is partially overlapped with the isolation layers.