Patent ID: 7109745
Filing Date: 2006-09-19
Classification: G06F,G11B,G11C

Abstract:
1. A multiple function system on a chip integrated circuit comprises: a processing module; an on-chip read only memory operable to store at least a portion of a boot algorithm, wherein, when initiated, the processing module executes the at least a portion of the boot algorithm; an on-chip random access memory operable to store at least a portion of a file transfer algorithm or at least a portion of a playback algorithm, wherein, when initiated, the processing module executes the at least a portion of the file transfer algorithm or the at least a portion of the playback algorithm; an external memory interface operable to interface with a memory that stores at least one of a digital audio file and a digital video file; a multimedia module operably coupled for at least one of: a bus operably coupled to the processing module, the on-chip read only memory, the on-chip random access memory, the external memory interface, and the multimedia module; and general purpose input/output (GPIO) module operably coupled to the bus, wherein the GPIO module includes a plurality of GPIO cells, wherein a GPIO cell of the plurality of GPIO cell includes: