Patent ID: 8387026
Filing Date: 2013-02-26
Classification: G06F

Abstract:
1. A computer-implemented method for optimizing executable code during compilation of the executable code, the method comprising: loading a data file containing a plurality of hardware-event samples; loading debugging information which is sufficient to permit identification of source code positions from the hardware-event samples; at a source-code level, analyzing the hardware-event samples of the data file and the debugging information to map the hardware-event samples to lines of source code; computing a plurality of basic block counts using an average of the average number of samples per source line in a basic block; converting the plurality of basic block counts into a plurality of edge frequencies, wherein the converting comprises transforming the problem into a minimum-cost circulation problem with a flow-conservation rule, wherein the flow-conservation rule is the sum of incoming edge frequency counts should equal the sum of outgoing edge frequency counts; and compiling the executable code using a feedback-directed optimizing compiler and the plurality of edge frequencies.