Patent ID: 8980717
Filing Date: 2015-03-17
Classification: H01L

Abstract:
1. A method for manufacturing ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device, at least comprising: providing a substrate of P-type material; forming a first high-voltage N-well (HVNW) region in a portion of the substrate; forming a second HVNW region in another portion of the substrate, wherein the second HVNW region is disposed at a high-side operation region of the substrate; forming at least two p-wells (PWs) separately in a region for PWs, the region for PWs adjacent to the first and second HVNW regions; forming a source and bulk p-well (PW) adjacent to one side of the first HVNW region; forming a P-Top layer within the first HVNW region; and forming an n-type implant layer on the P-Top layer.