Patent ID: 6577677
Filing Date: 2003-06-10
Classification: H03F,H04B

Abstract:
An analog bias current optimization circuitry, comprising:a transmit digital signal processor (TX-DSP) to generate a signal pattern; a plurality of analog circuits, coupled to the TX-DSP, to convert data between a digital format and an analog format, to transmit the analog data to a transmission line, and to receive the analog data from the transmission line, the signal pattern being sent to the analog circuits; a receive digital signal processor (RX-DSP), coupled to the plurality of analog circuits, to receive an output signal from the analog circuits; and a controller to evaluate signal quality degradation of the analog circuits from a captured signal in the RX-DSP and adjust a bias current of the analog circuits without causing signal quality degradation, based on the captured signal from the RX-DSP.