Patent ID: 6118766
Filing Date: 2000-09-12
Classification: H04M,H04Q

Abstract:
A high bit communication system, comprising:a single twisted cable pair;a signal provider including a plurality of ISDN cards and a first MICS card configured to multiplex at least two ISDN signals, each of said ISDN signals having a transmission rate of 160 kbps, said signal provider configured to provide said multiplexed signal to a first end of the single twisted cable pair at a transmission rate of at least 320 kbps; anda signal subscriber including a second MICS card, said signal subscriber coupled to a second end of said single twisted cable pair, configured to receive said multiplexed signal from said signal provider along said single twisted cable pair, said signal subscriber further configured to demultiplex said multiplexed signal and accordingly to generate separate ISDN signals;wherein said first MICS card includes:a first frame processor;a first transceiver coupled to said first frame processor and said first end of said single twisted cable pair, said first transceiver configured to transmit said multiplexed signal at said transmission rate of at least 320 kbps using 2B1Q transport mechanism;a first digital interface module coupled to said plurality of ISDN cards configured to receive a plurality of ISDN signals at said transmission rate of 160 kbps, said first digital interface module further coupled to said frame processor; anda first utility microprocessor coupled to said first digital interface module and said first frame processor configured to control said first frame processor, said first transceiver and said first digital interface module, said first utility microprocessor further configured to provide loopback testing; and furtherwherein said second MISC card includes:a second frame processor;second transceiver coupled to said second frame processor and said second end of said single twisted cable pair, said second transceiver configured to receive said multiplex signal via said single twisted cable pair at said transmission rate of at least 320 kbps;a second digital interface module coupled to said second frame processor configured to provide said plurality of ISDN signals at said transmission rate of 160 kbps; anda second utility microprocessor for controlling said second digital interface module and said second frame processor, said second utility microprocessor further configured to provide loopback testing.