Patent ID: 6124176
Filing Date: 2000-09-26
Classification: H01L

Abstract:
A method of producing a semiconductor device, comprising the steps of:forming a gate electrode in a device field of a semiconductor substrate with the intermediary of a gate insulation film;sequentially forming inner side walls and outer side walls on sides of said gate electrode;implanting an impurity in an entire surface of said semiconductor substrate by ion implantation to thereby form a source region and a drain region while reducing a resistance of said gate electrode;selectively removing said inner side walls to thereby form cavities between said outer side walls and said gate electrode for reducing a capacitance, and making a height of said outer side walls smaller than a height of said gate electrode; andforming an insulation film on the entire surface of said semiconductor substrate by CVD (Chemical Vapor Deposition) having a low covering characteristic, then etching back said insulation film to thereby expose a surface of said gate electrode and surfaces of said source and drain regions, and then forming silicide on said gate electrode and said semiconductor substrate.