Patent ID: 6470051
Filing Date: 2002-10-22
Classification: H04N

Abstract:
An integrated video decoding system comprising:a video decoder for decoding an encoded stream of video data, said video decoder producing a decoded stream of video data; a decimation unit coupled to said video decoder and adapted to selectively scale said decoded stream of video data for display; wherein said video decoding system further comprises a frame buffer, and wherein said decimation unit comprises means for scaling said decoded stream of video data prior to storage thereof in said frame buffer; and wherein said frame buffer comprises multiple defined memory areas for receiving I, P & B frames of said decoded stream of video data, said multiple defined memory areas comprising a first area and a second area for receiving full size I and P frames of said decoded stream of video data, and at least one third area for receiving scaled I, P & B frames of said decoded stream of video data commensurate with said first area and said second area receiving said full size I and P frames.