Patent ID: 6449665
Filing Date: 2002-09-10
Classification: G06F

Abstract:
A method of reducing direct memory access in a machine employing a data segmenting scheme, comprising the steps of:a. detecting when a repetitive block of data is to be transferred, wherein the repetitive block of data repeats a data word of a predetermined value; b. assigning a first invalid address to a current address pointer, the first invalid address indicating that the repetitive block of data is to be generated; c. assigning a second invalid address to an end segment pointer, the second invalid address corresponding to the first invalid address plus a value indicating a number of repetitive data words that is included in the block of repetitive data; and d. while the current address pointer has a value assigned thereto that is not equal to the second invalid address, performing the following steps: i. generating a data word of the predetermined value; and ii. stepping the value assigned to the current address pointer.