Patent ID: 6943406
Filing Date: 2005-09-13
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a surface on which an insulating layer is formed; a first-conductivity-type first semiconductor layer formed on said insulating layer and having a first impurity concentration; a first-conductivity-type second semiconductor region formed in said first semiconductor layer from a surface of said first semiconductor layer to a surface of said insulating layer, and having a concentration higher than the first impurity concentration; a second-conductivity-type third semiconductor region formed in said first semiconductor layer from the surface of said first semiconductor layer to the surface of said insulating layer with a predetermined distance between said second and third semiconductor regions, and having a second impurity concentration; a second-conductivity-type fourth semiconductor region formed in a surface portion of said second semiconductor region, and having a concentration higher than the second impurity concentration; an insulating film formed over the surfaces of said first, second, third, and fourth semiconductor layers; and a control electrode formed on said insulating film, wherein a junction of first and second conductivity types formed between said first semiconductor layer and said third semiconductor region is positioned below an end portion, on a side of said third semiconductor region, of said control electrode, via said insulating film.