Patent ID: 7965109
Filing Date: 2011-06-21
Classification: G11C,H03K

Abstract:
1. A VBB (bulk voltage) level detector for a semiconductor memory apparatus, comprising: a reference voltage generator configured to generate and output a first reference voltage that varies with temperature; a reference voltage comparator configured to compare the first reference voltage with a second reference voltage, to generate a third reference voltage having a compensated level based on a certain temperature; a bias generator configured to receive the third reference voltage, to generate a specific bias level; and a VBB sensor configured to receive the bias level to sense VBB level, wherein the reference voltage comparator comprises: a first NMOS transistor having a drain connected to a constant current generator, a gate configured to receive the first reference voltage, and a source; a second NMOS transistor having a drain connected to the constant current generator, a gate configured to receive the second reference voltage, and a source terminal connected to the source of the first NMOS transistor; a third NMOS transistor having a drain and a gate connected in common to the source of the first and the second NMOS transistor and a source connected to a ground voltage terminal; a third PMOS transistor having a source connected to the constant current generator and a drain and a gate connected in common to output the third reference voltage; and a fourth NMOS transistor having a gate connected to the gate of the third NMOS transistor, a source connected to the ground voltage terminal, and a drain connected to the drain of the third PMOS transistor, wherein the constant current generator is connected to an external power supply voltage.