Patent ID: 9122570
Filing Date: 2015-09-01
Classification: G06F,G11C

Abstract:
1. A register structure that can perform characterization of output data paths without accessing a memory array, the register structure comprising: at least a first pattern register and a second pattern register, for respectively storing a first test data pattern and a second test data pattern, wherein the first test data pattern and the second test data pattern are different from each other, the first pattern register and the second pattern register are both 8-bit registers, and the first test data pattern and the second test data pattern are both greater than 8 bits; and at least a first mapping register comprising a plurality of bit registers, each bit register corresponding to an output data path and storing a binary value, wherein each binary value indicates which of the first test data pattern or the second test data pattern should be mapped to a corresponding output data path and at least one bit register stores a binary value which is different from the binary value stored in the other bit registers, wherein the first test data pattern is stored in the first pattern register and the second pattern register, and read out to the output data paths by making all binary values in the first mapping register correspond to the first pattern register, and then inverting all binary values in the first mapping register to correspond to the second pattern register.