Patent ID: 6553463
Filing Date: 2003-04-22
Classification: G06F

Abstract:
A method for high speed data access to a banked cache memory, said method comprising:during a first cycle, in response to receipt of a request address at an access controller: speculatively transmitting said request address to a banked cache memory, wherein said speculative transmission has at least one cycle of latency; and concurrently snooping said request address in a directory associated with said banked cache memory; thereafter, during a second cycle: distributing said speculatively transmitted request address to each of a plurality of banks of memory within said banked cache memory; in response to a bank hit from snooping said directory, providing said banked cache memory with a bank indication indicating which bank of memory among said plurality of banks of memory contains a storage location identified by said request address; and outputting data associated with said request address from said banked cache memory, in response to said bank indication, such that access time to a high latency remote banked cache memory is minimized.