Patent ID: 7705652
Filing Date: 2010-04-27
Classification: H03L,H04N

Abstract:
1. A clock generating apparatus comprising: an integral ratio divider for, provided with a first clock signal of a first frequency and frequency-dividing parameters, outputting a second clock signal of a second frequency by combining P (P is an integer of 1 or more) frequency dividing of the first clock signal with P+1 frequency dividing at a ratio based on the frequency-dividing parameters; a counter for having the second clock signal inputted and generating and outputting a count value based on the second clock signal; a subtracter for, provided with a program clock reference value included in program clock reference and the count value, calculating a difference between the program clock reference value and an system time check value based on the count value and outputting it as a difference value; and a frequency-dividing parameter generating portion for having the difference value, a previous difference value which is the difference value outputted from the subtracter last time and previous frequency-dividing parameters which are the frequency-dividing parameters outputted last time inputted, comparing the difference value with the previous difference value and adjusting the previous frequency-dividing parameters based on a comparison result so as to output the frequency-dividing parameters.