Patent ID: 6455379
Filing Date: 2002-09-24
Classification: H01L

Abstract:
A process for forming an improved trench-gated power device, said process comprising:forming on an upper epitaxial layer of a semiconductor substrate of a first conductivity type a dielectric layer having an upper surface and thickness and width dimensions that correspond substantially to the height and width dimensions of a gate trench; growing a first layer of epitaxial material of a second conductivity type over said substrate upper layer and said dielectric layer; planarizing said first layer of epitaxial material to be substantially below said, upper surface of said dielectric layer; growing a second layer of epitaxial spacer material of said first conductivity type over said first epitaxial layer and said dielectric layer to form a source region on opposite sides of the dielectric layer, growing a third layer of epitaxial material of said second conductivity type over said first epitaxial layer and second epitaxial layer to form a body region on opposite sides of the dielectric layer, planarizing said epitaxial material and the dielectric layer to form source regions and recessed body regions, wherein the third layer sloped so as to present an increased top contact surface area as compared to a flat horizontal top contact surface area, removing said dielectric layer, thereby forming gate trench sidewalls comprising selectively grown epitaxial material and selectively grown epitaxial spacer material, lining said gate trench with a dielectric material and substantially filling the resulting lined trench with a conductive material, thereby forming a trench gate.