Patent ID: 7242102
Filing Date: 2007-07-10
Classification: H01L

Abstract:
1. A structure in a semiconductor die, said structure comprising: a metal pad situated in an interconnect metal layer, said metal pad comprising copper; an interlayer dielectric layer situated over said metal pad; a terminal via defined in said interlayer dielectric layer, said terminal via being situated on said metal pad; a terminal metal layer situated on said interlayer dielectric layer and in said terminal via, said terminal via forming a via ring around said metal pad, said terminal metal layer filling in said via ring, and said via ring and said terminal metal layer making contact with said metal pad; a dielectric liner situated on said terminal metal layer, wherein said terminal metal layer comprises a contact metal layer and a barrier layer, said barrier layer being situated on said interlayer dielectric layer; a bond pad opening defined in said dielectric liner, said bond pad opening exposing a portion of said terminal metal layer; wherein said interlayer dielectric layer is situated between said portion of said terminal metal layer and said metal pad, said interlayer dielectric layer being enclosed by said via ring, whereby said interlayer dielectric layer blocks and prevents diffusion of copper from said metal pad into said terminal metal layer.