Patent ID: 8614141
Filing Date: 2013-12-24
Classification: H01L

Abstract:
1. A field effect transistor (FET) device comprising: a graphene layer of channel material deposited on a substrate to form a channel, wherein the substrate comprises a selection from silicon carbide, silicon dioxide, aluminum oxide, or a combination thereof; a source metal contact and a drain metal contact deposited on the channel material, wherein the source metal contact and the drain metal contact are on opposing ends of the channel material; wherein the graphene layer is patterned by an elongated mask connecting the source metal contact and the drain metal contact to form the channel of the graphene layer in a narrowed elongated shape connecting the source metal contact and the drain metal contact; a layer of polyhydroxystyrene derivative deposited on top of and touching the channel material, on top of and touching the source metal contact, and on top of and touching the drain metal contact; wherein the layer of polyhydroxystyrene derivative previously deposited remains on top of and touching each of the channel material, the source metal contact, and the drain metal contact throughout completion of the field effect transistor device; a top gate oxide deposited on the layer of polyhydroxystyrene derivative; and a top gate metal deposited on the gate oxide.