Patent ID: 6998328
Filing Date: 2006-02-14
Classification: H01L

Abstract:
1. A method for creating a neo-wafer comprising: providing a first layer with an upper surface and a lower surface, forming at least one dielectric structure on said upper surface, forming at least one conductive pad on said at least one dielectric structure, providing a second layer and a third layer, bonding said second layer to said third layer with a first adhesive, removing a predetermined portion of said third layer so as to expose a predetermined portion of said first adhesive, removing said exposed predetermined portion of said first adhesive, removing a predetermined portion of said second layer to form at least one sidewall structure with an uppermost surface, bonding said uppermost sidewall surface to said upper surface of said first layer with a second adhesive whereby said at least one dielectric structure is disposed within said at least one sidewall structure to form at least one recess, removing the remaining portion of said third layer, removing the remaining portion of said first adhesive, disposing an integrated circuit die within said at least one recess, said integrated circuit die having at least one I/O pad, and forming an electrical interconnection between said conductive pad and said at least one I/O pad.