Patent ID: 9092263
Filing Date: 2015-07-28
Classification: G06F

Abstract:
1. A computer-implemented method for an automatic synthesis of distributed embedded systems, wherein tasks to be processed by a system are mapped to a hardware structure having a plurality of processing units such that predefined time criteria of the tasks are satisfied, the method comprising the steps of: (a) assigning the tasks to the plurality of processing units, with the following substeps: (b) checking whether costs of a given task assignment to the processing units satisfy a predefined solution criterion; (c) repeating steps (a) to (b) with a new task assignment to the processing units until the tasks fulfil the predefined solution criterion; (d) assigning the tasks to processes of operational systems of the processing units assigned to the tasks; (e) checking whether the given task assignment to the processes of the operational systems of the processing units satisfy a predefined time criteria of the tasks; (f) calculating costs associated with the given task assignment to the processes of the operational systems of the processing units if the predefined time criteria of the tasks are satisfied; and (g) repeating steps (a) to (c) with a new task assignment to the processing units or repeating steps (d) to (f) with a new task assignment to the processes of the operational systems of the assigned processing units until costs of a current solution satisfy the predefined solution criterion.