Patent ID: 6166957
Filing Date: 2000-12-26
Classification: G11C

Abstract:
A level shifter circuit for converting an input signal having a first voltage into an output signal having a second voltage, the level shifter circuit comprising:an input terminal for receiving the input signal;an output terminal for outputting the output signal;a power terminal for receiving the second voltage;a first PMOS transistor having a first current electrode connected to the power terminal, a gate connected to the output terminal, and a second current electrode;a second PMOS transistor having a first current electrode connected to the power terminal, a second current electrode connected to the output terminal, and a gate;a first invertor having an input electrode connected to the input terminal and an output electrode;a first NMOS transistor having a first current electrode connected to the second current electrode of the first PMOS transistor and the gate of the second PMOS transistor, a second current electrode connected to the output electrode of the first invertor, and a gate for receiving a shut off signal;a second NMOS transistor having a first current electrode connected to the output terminal, a second current electrode connected to a third voltage, and a gate connected to the output electrode of the first invertor; anda circuit for generating the shut off signal, wherein the circuit generates the shut off signal having the first voltage when the second voltage is greater than the first voltage, and generates the shut off signal having the second voltage when the second voltage is less than the first voltage.