Patent ID: 6310495
Filing Date: 2001-10-30
Classification: H03K,H04L

Abstract:
Clock circuitry on an integrated circuit (IC) chip, the clock circuitry adapted to be responsive to a clock wave of a clock wave source, the clock circuitry comprising:a driver having first and second outputs for respectively deriving first and second complementary clock waves in response to the clock wave;a receiver having first and second inputs;first and second clock lines respectively connected between said first and second outputs of said driver and said first and second inputs of said receiver, the driver, receiver and clock lines being arranged so the clock waves arrive with relatively low amplitude variations at the receiver inputs, said receiver being constructed and arranged for amplifying the clock waves having the relatively low amplitude variations at said first and second inputs to voltages substantially equal to the high and low power supply voltages of the IC chip at a first output thereof, said first output deriving an amplified clock wave having clock wave transitions substantially coincident with clock wave transitions of the clock wave of the clock save source.