Patent ID: 7675142
Filing Date: 2010-03-09
Classification: G11C,H01L

Abstract:
1. An electromechanical non-volatile memory device comprising: a semiconductor substrate having an upper surface including insulation characteristics; a first electrode pattern on the semiconductor substrate, the first electrode pattern exposing portions of a surface of the semiconductor substrate therethrough; a conformal bit line on the first electrode pattern and the exposed surface of semiconductor substrate, the bit line being spaced apart from a sidewall of the first electrode pattern and including a conductive material having an elasticity generated by a voltage difference; an insulating layer pattern on an upper surface of the bit line located on the semiconductor substrate; and a second electrode pattern spaced apart from the bit line and on the insulating layer pattern, the second electrode pattern facing the first electrode pattern, wherein a portion of the second electrode pattern located higher than a portion of the bit line on an upper surface of the first electrode pattern has a width that is larger than a width of a portion of the second electrode pattern located lower than the portion of the bit line on the upper surface of the first electrode pattern.