Patent ID: 6542844
Filing Date: 2003-04-01
Classification: G01R

Abstract:
A method for tracing hardware states within a functional logic within a field programmable logic circuit using dynamically reconfigurable test circuits, said method comprising the steps of:first selecting a test mode from a plurality of test modes for tracing the operation of said functional logic; after said step of selecting a test mode, second selecting one of a plurality of configurations for said dynamically reconfigurable test circuits in conformity with said selected test mode; configuring said field programmable logic circuit with said selected configuration to configure said dynamically configurable test circuits; tracing execution of program code to create a software trace history by executing a test program; periodically reading a set of registers within said dynamically reconfigurable test circuits to create a hardware trace log in response to the receipt of a hardware trace request during said tracing; and recording contents of said set of registers in synchronization with said software trace history to produce a full trace history.