Patent ID: 8525341
Filing Date: 2013-09-03
Classification: H01L,H05K

Abstract:
1. A semiconductor package comprising: a printed circuit board (PCB); a semiconductor chip mounted on the PCB; and a molding portion covering the semiconductor chip, wherein the PCB comprises: a core layer having a stacked structure including at least a first sub-core layer made of a first material having a first coefficient of thermal expansion (CTE) and a second sub-core layer made of a second material having a second CTE greater than the first CTE, wherein the first sub-core layer includes a first homogenous material, and the second sub-core layer includes a second homogenous material, wherein the first homogenous material is different from second homogenous material: an upper wiring layer disposed between the core layer and the semiconductor chip, and a lower wiring layer disposed on the core layer, opposite to the upper wiring layer.