Patent ID: 6642878
Filing Date: 2003-11-04
Classification: H03K

Abstract:
A serial multiple sampler circuit comprising:a differential transistor pair having control terminals coupled to input terminals to receive a differential data input signal, the differential transistor pair jointly coupled to a current source at a first end; a first sampler circuitry coupled between a second end of the differential transistor pair and a first output, the first sampler circuitry to receive a sample control signal, a third voltage level, and a second voltage level, the first sampler circuitry including level activated switching elements responsive to the sample control signal and the third voltage level to couple a first sample of the differential data input signal to the first output; and a second sampler circuitry coupled between the second end of the differential transistor pair and a second output, the second sampler circuitry to receive the sample control signal, a second voltage level, and a first voltage level, the second sampler circuitry including level activated switching elements responsive to the sample control signal, the second voltage level, and the first voltage level to couple a second sample of the differential data input signal to the second output.