Patent ID: 8255446
Filing Date: 2012-08-28
Classification: G06F

Abstract:
1. Apparatus for processing data, said apparatus comprising: (i) processing circuitry configured to perform data processing operations comprising scalar processing circuitry for performing scalar operations and SIMD processing circuitry for performing SIMD operations; (ii) a register bank having a plurality of registers for storing data; (iii) control circuitry responsive to program instructions to control said processing circuitry to perform said data processing operations; wherein said control circuitry is configured to be responsive to a combined rearrangement arithmetic instruction to control said processing circuitry to perform a rearrangement operation and at least one SIMD arithmetic operation on a plurality of data elements corresponding to data stored in one or more registers of said register bank, said rearrangement operation being configurable by a size parameter derived at least in part from said register bank, said size parameter providing an indication of a number of data elements forming a rearrangement element for said rearrangement operation.