Patent ID: 7992118
Filing Date: 2011-08-02
Classification: G06F,H01L

Abstract:
1. A semiconductor integrated circuit comprising: a power supply line; a ground line placed in a same interconnect layer as the power supply line; an actual operation flipflop connected to the power supply line and the ground line, the actual operation flipflop having a first clock terminal; and a dummy flipflop connected to the power supply line and the ground line, the dummy flipflop having a second clock terminal, wherein the dummy flipflop comprises: a contact connected to the power supply line or the ground line; and an interconnect for connecting the second clock terminal with the contact, and is placed so that the distance between the first clock terminal and the second clock terminal in the direction of extension of the ground line is shorter than the length of the actual operation flipflop in the direction of extension of the ground line.