Patent ID: 6859080
Filing Date: 2005-02-22
Classification: H03L

Abstract:
1. A system comprising: an amplifier to receive a first signal and to amplify the first signal; a clock generator to output a clock signal and to adjust a phase of the clock signal based on a phase control signal; a phase comparator to receive the clock signal and the first signal and to provide an indication of when the clock signal lags the first signal; a phase controller to receive the indication and to selectively provide the phase control signal to the clock generator to control an amount to change the phase of the clock signal in response to the indication, wherein the phase control signal is based on N bits of the first signal, wherein N is an integer and wherein a decoder to output a data signal, wherein the decoder comprises logic to generate the data signal by sampling the first signal based on the clock signal; and a data processor to receive the data signal from the decoder.