Patent ID: 6131279
Filing Date: 2000-10-17
Classification: H01L,H05K,Y10T

Abstract:
A process of fabricating a circuitized structure comprising the steps of:(a) applying a dielectric film to at least one surface of an organic substrate having circuitry thereon;(b) forming microvias in selective portions of said dielectric film;(c) sputtering a metal seed layer on said dielectric film and in said microvias, wherein said sputtering is conducted at a sputtering enerav of from about 0.48 kW to about 0.72 kW, a temperature of from about 100.degree. C. to about 150.degree. C. and for a time of about 12 minutes to about 18 minutes;(d) plating a metallic layer on said metal seed layer; and(e) forming outer circuitry on said plated metallic layer.