Patent ID: 9136392
Filing Date: 2015-09-15
Classification: H01L

Abstract:
1. A semiconductor memory device comprising: an underlying film including a memory region and a peripheral region, the memory region including a first trench, the peripheral region including a second trench; a stacked body including a plurality of conductive layers and a plurality of insulating layers alternately stacked on the underlying film; a channel body provided in a pair of first holes and in the first trench, the pair of first holes piercing the stacked body on the memory region to be connected to the first trench; a memory film including a charge storage film provided between a side wall of the first hole and the channel body, and between an inner wall of the first trench and the channel body; and a conductor provided in a pair of second holes and in the second trench, the pair of second holes piercing the stacked body on the peripheral region to be connected to the second trench and having a hole diameter larger than a hole diameter of the first hole.