Patent ID: 7505282
Filing Date: 2009-03-17
Classification: H01L,H05K

Abstract:
1. A laminated bond of multilayer circuit board having embedded chips comprising a bottom multilayer circuit board comprising an upper multilayer circuit board mounted on the bottom multilayer circuit board and comprising a glue layer formed between and sticking the bottom and the upper multilayer circuit boards together; multiple contact vias formed through the bottom and the upper multilayer circuit boards to electronically interconnect the conductive wires and the patterned conductive layers in the bottom and the upper multilayer circuit boards; and two insulating lacquer layers respectively coated under portions of the patterned conductive layer in the bottom multilayer circuit board and on portions of the patterned conductive layer in the upper multilayer circuit board to protect the patterned conductive layers, wherein the un-coated patterned conductive layers become multiple contacts.