Patent ID: 8130357
Filing Date: 2012-03-06
Classification: G02F

Abstract:
1. A thin film transistor array panel comprising: a substrate; a first gate line and a second gate line disposed on the substrate; a storage electrode line disposed on the substrate; a first data line intersecting the first and second gate lines; a second data line intersecting the first and second gate lines and spaced apart from the first data line; a drain electrode facing a part of the first data line and the second data line; an organic insulating layer disposed on the first data line and the second data line, the organic insulating layer having a contact hole exposing the drain electrode; a pixel electrode disposed on the organic insulating layer, the pixel electrode electrically connected to the drain electrode; and a storage electrode making a storage conductor with the pixel electrode; wherein the pixel electrode comprises a first part overlapping the first data line, and a second part overlapping the second data line, and wherein the width of the first part is different from that of the second part.