Patent ID: 8742842
Filing Date: 2014-06-03
Classification: H03F

Abstract:
1. An apparatus, comprising: a power amplifier architecture, comprising: a high power path comprising one or more amplifiers having one or more outputs coupled to an input of an impedance transformer, the impedance transformer having an output; a low power path comprising a signal line and an impedance transformation network, the impedance transformation network having a first terminal coupled to the signal line and a second terminal coupled to the output of the impedance transformer; a switching element having a first terminal coupled to the signal line and having a second terminal coupled to ground, the switching element in a closed position shorting the signal line to ground and in an open position providing an open between the signal line and ground; a summing junction having an output and summing the output of the impedance transformer and the second terminal of the impedance transformation network; and circuitry, responsive to one or more control signals, configured in a high power mode to turn on at least one of the one or more amplifiers, to route an input signal through a driver amplifier to the high power path and to place the switching element in one of the open position or closed position selected to cause an open impedance looking from the summing junction into the second terminal of the impedance transformation network, the circuitry configured in a low power mode to turn off the at least one amplifier, to route the input signal through a driver amplifier to the low power path and to place the switching element in the other of the open position or closed position, wherein the circuitry is configured to route the input signal to one path of the high power path or the low power mode but not to both paths.