Patent ID: 6728741
Filing Date: 2004-04-27
Classification: G06T

Abstract:
A data processing apparatus for mirror image transformation of an NÃ—N bit data block, where N is an integer, the data processing apparatus comprising:a data register file including a plurality of data registers storing data of bit length I, where 2I=NÃ—N and I is an integer, a first read port outputting a first input operand from an instruction specified one of said plurality of data registers, a second read port outputting a second input operand from an instruction specified one of said plurality of data registers, and a write port for storing received write data into an instruction specified one of said plurality of data registers; a first hardware bit transformation unit receiving data from said first and second read ports and forming an upper half of said bit length I of an N-way bit deal of said first and second input operands; a second hardware bit transformation unit receiving data from said first and second read ports and forming a lower half of said bit length I of said N-way bit deal, whereby said upper and lower halves of said N-way bit deal represent a diagonally mirrored image of said NÃ—N bit data block; a multiplexer connected to said first and second hardware bit transformation units coupling an instruction specified one of said upper half or said lower half of the N-way bit deal of the first and second operands to said write port.