Patent ID: 6647477
Filing Date: 2003-11-11
Classification: H04L

Abstract:
A system for processing incoming data transmission units having different sizes, the system including:a) a first memory means having at least one set of two parallel banks; b) a second memory means containing a plurality of pointers, each pointer being able to simultaneously reference two independently parallel memory locations within one of the at least one set of two parallel memory banks, each of the two parallel memory banks in a set having parallel memory locations referenced by each pointer; c) processing means for receiving an incoming data transmission unit and dividing the incoming data transmission unit into at least two fixed size segments and writing the at least two fixed size segments in the first memory means; and d) controlling means for updating each index pointer that points to one pointer of the plurality of pointers in the second memory means and sending the index pointer to the processing means, the pointer being one of the plurality of pointers contained in the second memory means.