Patent ID: 8987790
Filing Date: 2015-03-24
Classification: H01L

Abstract:
1. A method for fabricating a field effect transistor (FET) device, the method comprising: forming a plurality of semiconductor fins on a substrate, wherein each semiconductor fin of the plurality of semiconductor fins includes a hardmask layer disposed thereon; depositing a sacrificial layer over exposed portions of the substrate and the hard mask layer; removing portions of the sacrificial layer to expose the hard mask layer; completely removing at least one semiconductor fin of the plurality of semiconductor fins from a portion of the substrate to form a cavity partially defined by the sacrificial layer; increasing a width of the cavity; filling the cavity with a dielectric material to form an isolation fin on the portion of the substrate such that a width of the isolation fin is greater than a width of at least one semiconductor fin of the plurality of semiconductor fins; and forming a gate stack over the plurality of semiconductor fins and the isolation fin.