Patent ID: 7456072
Filing Date: 2008-11-25
Classification: H01L

Abstract:
1. A method of fabricating a metal-insulator-metal (MIM) capacitor structure in an integrated circuit, the method comprising: (a) forming first and second bottom electrodes in an integrated circuit, the first and second electrodes extending generally parallel to one another and defining a channel therebetween, and forming sidewall spacers on either side of the channel; (b) depositing an insulator layer over the first and second bottom electrodes and in the channel; (c) depositing a conductive layer over the insulator layer; and (d) etching the deposited conductive and insulator layers to define first and second top electrodes opposing the first and second bottom electrodes, and to physically separate a portion of the conductive layer in the channel, wherein each of the sidewall spacers includes a side-insulator layer and includes a side-conductive layer that is physically separated from the top layer.