Patent ID: 8525945
Filing Date: 2013-09-03
Classification: G02F,G09G,H01L

Abstract:
1. A display panel comprising: a lower substrate including a display area which includes a pixel, and a peripheral area surrounding the display area, the peripheral area including a first peripheral area, a second peripheral area, a third peripheral area and a fourth peripheral area, the lower substrate comprising: a signal line electrically connected to the pixel and separated from gate and data lines; an electrostatic control pattern disposed in the first peripheral area and which provides an electrostatic dissipation path; and a repair line disposed between the display area and the electrostatic control pattern and which is vertically aligned with the signal line; an upper substrate facing the lower substrate; and a liquid crystal layer disposed between the lower substrate and the upper substrate, wherein the lower substrate further comprises: a gate driving part disposed between a portion of the repair line in the second peripheral area and the display area wherein the gate driving part provides the pixel with a gate signal; first pads which receive a gate driving signal to generate the gate signal; second pads which receive a data signal transmitted to the pixel; and a third pad which receives a common signal transmitted to the signal line.