Patent ID: 8169808
Filing Date: 2012-05-01
Classification: G11C

Abstract:
1. A NAND architecture content addressable memory (CAM) device, comprising: a non-volatile memory array having a plurality of non-volatile memory cells arranged in a plurality of NAND architecture memory cell strings; a control circuit; an address decoder coupled to a plurality of word lines of the plurality of NAND memory cell strings; a search word register having an inverting and non-inverting output for each bit position of a search word register, wherein each output of the search word register is coupled to a source-side connection of a NAND memory cell string of the plurality of NAND memory cell strings; a match line coupled to a plurality of drain-side connections of the plurality of NAND memory cell strings; and a plurality of CAM memory cell structures, wherein each CAM memory cell structure contains a paired first and second non-volatile memory cell from a first and second NAND memory cell string, and where a control gate of the first and second memory cells of each CAM memory cell structure are coupled to a common word line; wherein the NAND architecture CAM memory device is configured to search the non-volatile memory array for an input data word to locate a match; wherein the first memory cell of each CAM memory cell structure is coupled through the source-side connection of the first NAND memory cell string to a non-inverting output of a selected bit position of the search word register and the second memory cell is coupled through the source-side connection of the second NAND memory cell string to an inverting output of a selected bit position of the search word register; wherein the NAND architecture CAM memory device is configured to precharge or pull-up the match line to a high logic signal; and wherein a plurality of CAM memory cell structures of a selected word line of the plurality of NAND strings are read and if the selected word line stores a data word that does not match an input data word stored in the search word register the match line is pulled low and if the selected word line of the plurality of NAND strings storing a data word matching the input data word the match line left precharged or pulled high.