Patent ID: 8931169
Filing Date: 2015-01-13
Classification: H01L,Y10T

Abstract:
1. A method of fabricating a component for a microelectronic device having a workpiece including a substrate, a plurality of active areas in the substrate, a plurality of shallow trench isolation structures in the substrate between active areas, a dielectric layer over the active areas, contacts in the dielectric layer contacting a first portion of the active areas and a portion of an adjacent shallow trench isolation structures, and conductors in the dielectric layer contacting a second portion of the active areas, the method comprising: embedding an elongated conductive line in a trench extending through an upper portion of the contacts and sections of the dielectric layer between the contacts, the elongated conductive line being superimposed over portions of the shallow trench isolation structures but not over the first portion of the active areas; and electrically insulating the conductive line from the conductors by providing dielectric spacers in the trench between the conductive line and the conductors.