Patent ID: 6757818
Filing Date: 2004-06-29
Classification: G05B,G11B

Abstract:
A programmable sequential microcontroller for sequentially controlling a multiplicity M of processing channels in processing periods based on respective state transitions of the respective channels, said microcontroller comprising:an address counter for supplying address data to a program memory, thereby causing said program memory to output program data associated with said address data; a state register for holding the state data to be processed in the respective channels in accord with said state transitions, wherein M>3; said microcontroller sequentially performs programs associated with the state data of the respective channels in response to a processing request when a period signal, indicative of a period, is received, such that, in processing a program in each said channels said address counter integrates the start data stored in a start address allocated to said channel in said program memory and the state data of said channel stored in said state register to obtain an integrated address for that channel; and the program data stored in said integrated address is processed first of all the program data to be processed in said channel; wherein an integrated processing to obtain said integrated address is performed on said state data and the data obtained by multiplying said start data by a predetermined number.