Patent ID: 8778769
Filing Date: 2014-07-15
Classification: H01L

Abstract:
1. A method for making a semiconductor package, comprising the steps of: (a) providing a base material, wherein the base material comprises at least one groove and at least one conductive via structure; (b) forming a first capacitor on the base material, wherein the first capacitor comprises a first lower electrode, a first dielectric layer and a first upper electrode, the first lower electrode is disposed on the base material, the first dielectric layer is disposed on the first lower electrode, and the first upper electrode is disposed on the first dielectric layer; (c) forming a first protective layer, so as to encapsulate the first capacitor, wherein the first protective layer comprises a plurality of first openings, and the first openings expose the conductive via structure, part of the first lower electrode and part of the first upper electrode; (d) forming a first metal layer on the first protective layer, wherein the first metal layer comprises a first inductor, a first interconnection metal, a second interconnection metal and a third interconnection metal, the first interconnection metal directly contacts the through via structure, the second interconnection metal directly contacts the first lower electrode, and the third interconnection metal directly contacts the first upper electrode; and (e) forming a second protective layer, so as to encapsulate the first inductor.