Patent ID: 7864622
Filing Date: 2011-01-04
Classification: G11C

Abstract:
1. A mobile device comprising: a multi-chip semiconductor memory device including a plurality of semiconductor chips, each semiconductor chip being selectively activated in response to an internal chip enable signal, and at least one chip enable buffer configured to generate the internal chip enable signal; and a logic control device operatively associated with at least one of the plurality of semiconductor chips and the at least one chip enable buffer, the logical control device being configured to activate one of the plurality of semiconductor chips in response to the internal chip enable signal, such that the semiconductor chips in the plurality of semiconductor chips other than the activated semiconductor chip are deactivated semiconductor chips, wherein the at least one chip enable buffer is operatively associated with at least one of the plurality of semiconductor chips and configured to generate the internal chip enable signal in response to an external chip enable signal, an external address, chip identification (ID) information, and operation mode information indicating whether the plurality of semiconductor chips operates in a multi-chip mode or a single-chip mode.