Patent ID: 8447913
Filing Date: 2013-05-21
Classification: G06F

Abstract:
1. A method for monitoring an electronic memory device, comprising: providing a flash memory device having a logic routine saved on flash memory being a non-transitory computer readable medium, the flash memory device communicatable with a processor; operating the flash memory device generating a plurality of memory inputs and outputs using the processor; determining a memory input or memory output operation using the logic routine; incrementally counting a plurality of memory inputs and memory outputs using a counter function of the logic routine; determining a total number of the plurality of memory inputs and outputs using the counter function of the logic routine; generating an alert signal using the logic routine when the total number of the memory inputs and outputs exceeds a predetermined value programmed in the logic routine, wherein the predetermined value is based on a threshold number of memory inputs and outputs, the threshold number being based on an expected mean time to failure of the flash memory device; wherein the logic routine includes a warning function programmable by a user for indicating a specified number of memory input and output operations in relation to the total number of the memory inputs and outputs; wherein the warning function generates a plurality of warning signals each indicating a specified number of memory input and output operations in relation to the total number of the memory inputs and outputs; providing a computer system having a non-transitory computer readable medium having a program stored thereon and the program being executable by the processor, and the logic routine communicating with the processor of the computer system; sending the alert signal to the processor using the logic routine; sending a plurality of warning signals to the processor using the logic routine when the warning function indicates each of a predetermined number of memory input and output operations in relation to the total number of the memory inputs and outputs is reached; receiving the alert signal and the warning signals using the processor; sending a first communications signal using the processor to the user, wherein the first communications signal comprises the alert signal; sending a plurality of second communications signals using the processor to the user, wherein each of the second communications signals comprises one of the warning signals; the user selectively setting a criteria using a user interface of the computer system for the warning function of the logic routine for indicating a specified number of memory input and output operations in relation to the total number of the memory inputs and outputs, wherein the user interface includes a GUI (Graphical User Interface) and an input device; the user selectively setting different criteria using the user interface for each of the plurality of warning signals generated by the warning function of the logic routine; and the user selecting the threshold number from a dialog box displayed on the GUI using the input device; wherein an indication of the first communications signal is shown to the user visually; and wherein an indication of each of the second communications signals is shown to the user visually.