Patent ID: 6232194
Filing Date: 2001-05-15
Classification: H01L

Abstract:
A method of forming a polysilicon resistor in the fabrication of integrated circuits comprising:providing a dielectric layer on a semiconductor substrate;depositing a polysilicon layer overlying said dielectric layer;patterning said polysilicon layer to form a polysilicon resistor;depositing a silicon nitride capping layer having a thickness of not more than 100 Angstroms overlying said polysilicon resistor and said dielectric layer;depositing an interlevel dielectric layer overlying said silicon nitride capping layer;thereafter annealing said substrate thereby densifying said silicon nitride capping layer; anddepositing a passivation layer overlying said interlevel dielectric layer wherein said passivation layer contains hydrogen atoms and wherein said silicon nitride capping layer prevents said hydrogen atoms from penetrating said polysilicon resistor.