Patent ID: 6335250
Filing Date: 2002-01-01
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:forming a gate insulation film of an active element on a surface region of a semiconductor substrate; forming a gate electrode on the gate insulation film; forming an insulation film covering the gate insulation film and the gate electrode; forming by deposition an amorphous semiconductor layer over the surface region of the semiconductor substrate thus formed; selectively growing the amorphous semiconductor layer to form single-crystalline semiconductor layer portions in selected portions of the amorphous semiconductor layer; forming a resist layer on that portion of the amorphous semiconductor layer, which is in an interconnection formation portion between said active element and an adjacent active element; removing those portions of the amorphous semiconductor layer which are other than said that portion of the amorphous semiconductor layer which is in the interconnection formation portion; removing the resist layer; and depositing a metal layer on said that portion of the amorphous semiconductor layer which is in the interconnection formation portion and on the single-crystalline semiconductor layer portions and silicifying the metal film to form a silicide layer.