Patent ID: 7615430
Filing Date: 2009-11-10
Classification: H01L

Abstract:
1. Method of manufacturing a semiconductor device comprising a field effect transistor, in which method a semiconductor body of silicon is provided at a surface thereof with a source region and a drain region of a first conductivity type, which regions are both provided with extensions, and with a channel region of a second conductivity type, opposite to the first conductivity type, between the source region and the drain region, and with a gate region separated from the surface of the semiconductor body by a gate dielectric and situated above the channel region, and wherein a pn-junction between the extensions and a neighboring part of the channel region is formed by two implantations of dopants of opposite conductivity type, and wherein before both of said two implantations of dopants of opposite conductivity type are performed an amorphizing implantation is performed where the pn-junction is to be formed, characterized in that the amorphizing implantation and said two implantations of dopants of opposite conductivity type are performed before the gate region is formed and at an angle with the surface of the semiconductor body which is substantially equal to 90 degrees.