Patent ID: 6169417
Filing Date: 2001-01-02
Classification: H03K

Abstract:
Circuitry configured to allow selection of a control signal from any one of fixed logic 1, fixed logic 0, a non-inverted version of an output signal of a register, an inverted version of the register output signal, a non-inverted version of a data signal, an inverted version of the data signal, a non-inverted version of a logical combination of the data signal and the register output signal, and an inverted version of the logical combination of the data signal and the register output signal, the control signal being usable for logical control of an input signal to the register, comprising: first and second programmable function control elements; first logic circuitry configured to produce a first intermediate signal which is a predetermined first logical combination of an output signal of the first function control element and the register output signal; second logic circuitry configured to produce a second intermediate signal which is a predetermined second logical combination of an output signal of the second function control element and the first intermediate signal; andthird logic circuitry configured to produce the control signal as a predetermined third logical combination of the second intermediate signal and a selected one of the data signal and a signal having a fixed logic level.