Patent ID: 8189321
Filing Date: 2012-05-29
Classification: H01G

Abstract:
1. A multilayer capacitor comprising: a matrix constituted by a plurality of laminated dielectric layers having at least first to third dielectric layers; first and second terminal electrodes arranged on an outer surface of the matrix; first and second linking electrodes arranged on the outer surface of the matrix; and first to fourth inner electrodes arranged within the matrix; wherein the first and fourth inner electrodes are arranged on the first dielectric layer while being separated from each other; wherein the second inner electrode is arranged on the second dielectric layer; wherein the third inner electrode is arranged on the third dielectric layer; wherein the first inner electrode is integrally provided with a first terminal connection part connected to the first terminal electrode and a first linking connection part connected to the first linking electrode; wherein the second inner electrode is integrally provided with a second terminal connection part connected to the second terminal electrode and a second linking connection part connected to the second linking electrode; wherein the third inner electrode is integrally provided with a third linking connection part connected to the first linking electrode; wherein the fourth inner electrode is integrally provided with a fourth linking connection part connected to the second linking electrode; wherein the third inner electrode is adjacent to the first and fourth inner electrodes in a laminating direction of the plurality of dielectric layers; and wherein the first and fourth inner electrodes overlap the third inner electrode as seen in the laminating direction of the plurality of dielectric layers.