Patent ID: 7494920
Filing Date: 2009-02-24
Classification: H01L,H05K,Y02P

Abstract:
1. A method of fabricating a vertically mountable integrated circuit (IC) package, the method comprising: providing a substrate that comprises a conductive layer and a dielectric layer, the dielectric layer having a top and a bottom, and the conductive layer being located on the top of the dielectric layer; creating a via through the bottom of the dielectric layer, the via being in physical contact with the conductive layer; forming a bond pad in the conductive layer that is coupled with the via, the bond pad having a bondable surface; mounting the IC onto a mountable portion of the dielectric layer; bonding the IC onto the surface of the bond pad by way of a wire bond; and singulating the via, the IC, the bond pad, and a portion of the dielectric layer so as to create an IC package, singulating comprising cutting through the via cross-sectionally so as to provide a surface area that is electrically coupled to the IC.