Patent ID: 6646313
Filing Date: 2003-11-11
Classification: H01L

Abstract:
A semiconductor integrated circuit device comprising:a first MISFET having a gate insulating film formed over a first element forming region of a main surface of a semiconductor substrate; and a second MISFET having a gate insulating film formed over a second element forming region of said main surface of said semiconductor substrate, the gate insulating film of said second MISFET being thinner than the gate insulating film of said first MISFET, wherein said gate insulating film of said first MISFET includes a thermally oxidized film and a deposited film, wherein said gate insulating film of said second MISFET includes a thermally oxidized film, wherein said first element forming region and said second element forming region are individually isolated by an element isolation region comprised of an insulating film, and wherein said deposited film extends over said element isolation region such that an edge portion of a gate electrode of said first MISFET in a gate width direction thereof is formed over said deposited film at said edge portion of said gate electrode thereof positioned over said element isolation region.