Patent ID: 8264007
Filing Date: 2012-09-11
Classification: G06F,H01L

Abstract:
1. A semiconductor device, comprising: a number of N-diffusion and a number of P-diffusion defined in a region of the semiconductor device having a radius of up to about 965 nanometers as measured in any direction parallel to a substrate of the semiconductor device, the number of N-diffusion arranged relative to the number of P-diffusion such that an inner non-diffusion region exists between the number of N-diffusion collectively and the number of P-diffusion collectively; at least six linear shapes extending along a first direction in a gate layer region of the region of the semiconductor device such that each of the at least six linear shapes has its lengthwise centerline extending in the first direction, and wherein some of the at least six linear shapes are gate defining shapes, and some of the gate defining shapes forming P-transistors with respective ones of the number of P-diffusion, and some of the gate defining shapes forming N-transistors with respective ones of the number of N-diffusion, wherein the P-transistors and N-transistors define a set of at least eight transistors in the region of the semiconductor device, including, (a) a first N-transistor, a second N-transistor, a third N-transistor, and a fourth N-transistor, (b) a first P-transistor, a second P-transistor, a third P-transistor, and a fourth P-transistor, such that, wherein either a) the N transistors are transistors of a first transistor type and the P transistors are transistors of a second transistor type, such that the first, second, third, and fourth N transistors are first, second, third, and fourth transistors of the first transistor type, and such that the first, second, third, and fourth P transistors are first, second, third, and fourth transistors of the second transistor type, or b) the P transistors are transistors of a first transistor type and the N transistors are transistors of a second transistor type, such that the first, second, third, and fourth P transistors are first, second, third, and fourth transistors of the first transistor type, and such that the first, second, third, and fourth N transistors are first, second, third, and fourth transistors of the second transistor type; a first contact contacting the gate defining shape of the second transistor of the first transistor type, the first contact positioned a first connection distance away from a gate electrode of the second transistor of the first transistor type as measured in the first direction; a second contact contacting the gate defining shape of the second transistor of the second transistor type, the second contact positioned a second connection distance away from a gate electrode of the second transistor of the second transistor type as measured in the first direction; a third contact contacting the gate defining shape of the third transistor of the first transistor type, the third contact positioned a third connection distance away from a gate electrode of the third transistor of the first transistor type as measured in the first direction; and a fourth contact contacting the gate defining shape of the third transistor of the second transistor type, the fourth contact positioned a fourth connection distance away from a gate electrode of the third transistor of the second transistor type as measured in the first direction, wherein at least two of the first, second, third, and fourth connection distances are different.