Patent ID: 6472722
Filing Date: 2002-10-29
Classification: H01L

Abstract:
A power device termination structure, comprising:a semiconductor substrate having a first layer of first conductivity type therein extending to a surface thereof; a main junction region of second conductivity type formed in said first layer extending to a surface thereof; a first doping region of second conductivity type formed in said first layer extending to a surface thereof and forming a P-N junction therewith; an insulating region on a surface of said first layer having two windows, respectively, on said first doping region and on said main junction region; a primary field plate formed on said main junction region through one of said windows and having a first extension portion on said insulating region extending a distance toward said first doping region; a secondary field plate formed on said first doping region through the other one of said windows and having a first extension portion on said insulating region extending toward said primary field plate and a second extension portion on said insulating region extending away from said primary field plate; and a floating conductive plate buried in said insulating region wherein said floating conductive plate is located in between said windows capacitively coupled to said primary field plate and said secondary field plate.