Patent ID: 7796442
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device configured to be electrically erased and programmed, the memory device comprising: a first conductive type semiconductor substrate having a first side and a second side opposite to the first side, the substrate including a source and a drain that are formed near a surface of the first side of the substrate and spaced apart from each other, each of the source and drain having a second conductive type opposite to the first conductive type; a floating gate disposed on a channel region of the substrate through an electrically insulating film, the channel region being located between the source and the drain and having a first end portion near the drain, a second end portion near the source, and a middle portion between the first and second end portions, the first and second end portions having approximately same width; and a control gate at least partially capacitively coupled to the floating gate, wherein