Patent ID: 7684206
Filing Date: 2010-03-23
Classification: H01L,H05K,Y02P

Abstract:
1. An electronic circuit module comprising: a multi-layer wiring plate that is formed of a laminate of a plurality of wiring plates, and includes a plurality of surface electrodes provided on an outer layer of the laminate and a plurality of internal electrodes provided on the internal wiring plates; and a chip that includes bumps with a height of d, and is connected to the multi-layer wiring plate in a flip chip manner by bringing the bumps into contact with the surface electrodes, wherein, in the multi-layer wiring plate, when the minimum thickness of the surface electrode and the internal electrodes overlapping each other below the bump is TD and the maximum thickness of the surface electrode and the internal electrodes overlapping each other in a space surrounded by the bumps is TI, the surface electrodes and the internal electrodes are arranged so as to satisfy TI<TD+d.