Patent ID: 7934181
Filing Date: 2011-04-26
Classification: G11C

Abstract:
1. A method for improving stability of static random access memory (SRAM) cells, comprising: providing multiple SRAM cells that each comprises at least two pull-up transistors, two pull-down transistors, and two pass-gate transistors, wherein each of said transistors comprises a source, a drain, and a gate electrode, wherein a ground line is connected to the sources of the two pull-down transistors of each SRAM cell for applying a ground voltage thereto, a power supply line is connected to the sources of the two pull-up transistors of each SRAM cell for applying a power supply voltage thereto, and a word line is connected to the gate electrodes of the two pass-gate transistors of each SRAM cell; and selecting one out of said multiple SRAM cells by applying a boosted word line voltage to the gate electrodes of the two pass-gate transistors of the selected SRAM cell through the word line of the selected SRAM cell, wherein the boosted word line voltage is sufficiently higher than the power supply voltage so as to achieve a predetermined stability of the selected SRAM cell.