Patent ID: 6075267
Filing Date: 2000-06-13
Classification: H01L

Abstract:
A nonvolatile semiconductor memory device comprising:a substrate;a continuously formed drain diffusion layer and a continuously formed source diffusion layer which are alternately arranged within the substrate to form a plurality of parallel strips;floating gates disposed via a tunnel insulating film on said substrate so that they are adjacent to the drain diffusion layer, the floating gates being opposed to each other with the drain diffusion layer therebetween, and spaced away from the source diffusion layer;a control gate which extends in a direction orthogonal with a direction in which the source and drain diffusion layers extend, the control gate being formed on the floating gates and the substrate via an insulating film, a select channel being provided between the floating gate closest to the source diffusion layer and the source diffusion layer; anda thick insulating film provided between the drain diffusion layer and the control gate between the floating gates which are opposed to each other with the drain diffusion layer therebetween.