Patent ID: 8975689
Filing Date: 2015-03-10
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor apparatus, the method comprising: sequentially depositing a gate electrode material and a sacrificial insulating layer on a semiconductor substrate; patterning the gate electrode material and the sacrificial insulating layer to form one or more holes exposing a surface of the semiconductor substrate; forming a first gate insulating layer on an inner sidewall of the hole; forming one or more pillar patterns each filled in the hole and recessed on a top thereof; forming a contact unit and an electrode unit on the pillar pattern; removing a patterned sacrificial insulating layer and forming a spacer nitride material on the semiconductor substrate from which the patterned sacrificial insulating layer is removed; and removing portions of the spacer nitride material and a patterned gate electrode material between the pillar patterns.