Patent ID: 6060939
Filing Date: 2000-05-09
Classification: H03H

Abstract:
A variable delay line circuit, comprising:a first delay line including a plurality of delay elements;a second delay line including a plurality of delay elements;a multiplexer coupled to respective outputs of the first and second delay lines, the multiplexer selectively coupling the output of one of the first or second delay lines to an output of the multiplexer;a reference voltage source coupled to each of the delay elements, the reference voltage source providing a reference voltage at a substantially constant amplitude to each of the delay elements; anda control circuit coupled to the multiplexer and the first and second delay lines, the control circuit controlling the multiplexer so as to produce a delayed signal at the multiplexer output using one of the first or second delay lines, and changing a delay factor of the other one of the first or second delay lines by varying a resistance and a current of one or more delay elements of the other one of the first or second delay lines.