Patent ID: 7449733
Filing Date: 2008-11-11
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a channel region formed above the semiconductor substrate; a first gate electrode formed above the channel region via a first gate insulating film; a second gate electrode formed below the channel region via a second gate insulating film to face the first gate electrode; a first insulating film covering side surfaces of the second gate electrode; a second insulating film covering a bottom surface of the second gate electrode; and a semiconductor layer which has an upper surface positioned above an upper surface of the first gate insulating film and side surfaces facing side surfaces of the first gate electrode, and in which a source region and drain region are formed, wherein the side surfaces of the second gate electrode are aligned with or positioned inside the side surfaces of the semiconductor layer and an upper surface of the first insulating film is positioned below an upper surface of the second gate insulating film.