Patent ID: 9183070
Filing Date: 2015-11-10
Classification: G06F

Abstract:
1. A method of operating a memory device, comprising: determining whether a set of memory cells, comprising one or more memory cells, in a block of memory cells fails to program in response to a certain number of programming pulses being applied to the set of memory cells in the block of memory cells or whether the block of memory cells fails to erase in response to a certain number of erase pulses being applied to the block of memory cells; resting the block of memory cells in response to determining that the set of memory cells in the block of memory cells fails to program in response to the certain number of programming pulses being applied to the set of memory cells in the block of memory cells or that the block of memory cells fails to erase in response to the certain number of erase pulses being applied to the block of memory cells; and when the block of memory cells is rested in response to determining that the set of memory cells in the block of memory cells fails to program in response to the certain number of programming pulses being applied to the set of memory cells in the block of memory cells, selecting the block of memory cells for use in response to determining that the set of memory cells in the block of memory cells programs in response to the certain number of programming pulses being applied to the set of memory cells in the block of memory cells after resting the block of memory cells, or when the block of memory cells is rested in response to determining that the block of memory cells fails to erase in response to the certain number of erase pulses being applied to the block of memory cells, selecting the block of memory cells for use in response to determining that the block of memory cells erases in response to the certain number of erase pulses being applied to the block of memory cells after resting the block of memory cells.