Patent ID: 7952197
Filing Date: 2011-05-31
Classification: H01L,H03H,H05K

Abstract:
1. An electrical component comprising: a multilayer carrier substrate; at least one semiconductor chip mounted on the carrier substrate; terminal areas of the component arranged on an underside of the carrier substrate; and contact areas arranged on an upper side of the carrier substrate, with at least two of the contact areas being assembled with the at least one semiconductor chip, wherein the carrier substrate features a functional area with a plurality of sections, with at least one of the following functions being assigned to each section: balun, frequency-separating filter, filter or heat dissipation for the at least one semiconductor chip, wherein each of the plurality of sections are assigned to different ones of the functions, wherein at least one of the sections does not overlap other sections of the plurality of sections in a plan view, wherein the plurality of sections include a first section that is conductively connected to contact areas and/or terminal areas that lie outside a base of the first section in a plan view, wherein the carrier substrate features an upper wiring area and a lower wiring area, the functional area being arranged between the upper wiring area and the lower wiring area, wherein the upper wiring area features first connecting lines that elecrically conductively connect the the respective sections to the contact areas, wherein the lower wiring area features second connecting lines that electrically conductively connect the the respective sections to the terminal areas, and wherein the functional area of the carrier substrate is shielded from the upper and lower wiring areas by means of one ground area that extends over at least two of the sections in a plan view.