Patent ID: 7962684
Filing Date: 2011-06-14
Classification: G06F

Abstract:
1. A method of operating a memory system incorporating NAND flash memory and a memory controller, the method comprising: storing firmware to be executed by the memory controller within the NAND flash memory; logically ordering the firmware into overlays of a size less than a maximum amount of a RAM memory within the memory controller allocated for firmware execution, said overlays varying in size; loading one or more of the overlays into the RAM memory from the NAND memory; determining that a current overlay should be loaded from the NAND memory and that one or more least recently loaded overlays in the RAM memory that have been least recently loaded should be evicted, wherein determining the one or more least recently loaded overlays is based on an ordering of overlays in the RAM memory from least to most recently loaded into the RAM memory and the number of the one or more least recently loaded overlays is selected based on a size of the current overlay; and evicting said one or more least recently loaded overlays from the RAM memory.