Patent ID: 7745877
Filing Date: 2010-06-29
Classification: H01L

Abstract:
1. A semiconductor device provided with a power MOSFET comprising: a semiconductor substrate constituting a drain; a trench formed on a surface of the semiconductor substrate; a gate electrode in the trench, the gate electrode being made of polysilicon and formed via a gate insulating film; a body diffusion layer on a surface side of the semiconductor substrate, the body diffusion layer being positioned adjacently to the trench and formed shallower than the trench; a source diffusion layer on the surface of the semiconductor substrate, the source diffusion layer being positioned adjacently to the trench and the body diffusion layer and formed shallower than the body diffusion layer; a first interlayer insulating film formed on the gate electrode; and a source electrode film made of a metallic material and formed on the semiconductor substrate including an area on the first interlayer insulating film, the source electrode film being insulated from the gate electrode and electrically connected to the body diffusion layer and the source diffusion layer, wherein a top surface of the gate electrode and a top surface of the first interlayer insulating film are formed in a recessed manner in the trench relative to the surface of the semiconductor substrate so that a film thickness of the source electrode film increases above the gate electrode, and a surface portion of the semiconductor substrate for the trench is formed into a tapered shape; wherein the first interlayer insulating film is disposed on the gate electrode and extended to cover a top surface portion of the semiconductor substrate for the trench and a concave portion is disposed an a surface of the first interlayer insulating film, and the metallic material is embedded in the concave portion.