Patent ID: 6391766
Filing Date: 2002-05-21
Classification: H01L

Abstract:
A method of forming an interconnect structure, comprising the steps of:depositing a first dielectric material over a conductive layer to form a first dielectric layer, the first dielectric material being an organic low k dielectric material; forming an etch stop layer on the first dielectric layer; etching the etch stop layer and the first dielectric layer to form a slot via in the first dielectric layer, the slot via extending with a slot length in a first direction within the first dielectric layer; depositing a second dielectric material in the slot via and over the etch stop layer to form a second dielectric layer over the slot via and the etch stop layer, the second dielectric material being an inorganic dielectric material; and simultaneously etching the slot via and the second dielectric layer such that a feature is formed that extends within the second dielectric layer in a second direction that is normal to the first direction, and at least a portion of the slot via is etched, the feature having a width in the second direction that is less than the slot length, with the entire width of the feature being over the slot via.