Patent ID: 6194933
Filing Date: 2001-02-27
Classification: H03K

Abstract:
An input circuit, comprising:a first amplifier which receives an external clock signal and amplifies the external clock signal to generate an internal clock signal;a second amplifier which receives an external input signal and amplifies the external input signal to generate an internal input signal;an internal circuit, connected to the first and second amplifiers, which receives the internal input signal from the second amplifier in response to the internal clock signal from the first amplifier;wherein the first and second amplifiers receive power from a high potential power supply and a low potential power supply, the high potential power supply and the low potential power supply together being selected from a group consisting of:an external high potential power supply and a step-down voltage power supply that steps down a voltage received from an external low potential power supply;an external low potential power supply and a step-up voltage power supply that steps up a voltage received from an external high potential power supply; anda step-down voltage power supply that steps down a voltage received from an external low potential power supply and a step-up voltage power supply that steps up a voltage received from an external high potential power supply.