Patent ID: 6384654
Filing Date: 2002-05-07
Classification: H03K,H03L

Abstract:
A delay stage for use in a voltage-controlled delay chain of a delay locked loop or in a voltage-controlled ring oscillator of a phase locked loop comprisinga first pullup transistor coupled to drive a stage output, a first pulldown transistor coupled to drive the stage output, a ratioed pullup transistor coupled to drive the stage output, a ratioed pulldown transistor coupled to drive the stage output, and a control transistor coupled in series with a transistor selected from the group of transistors consisting of the first pullup transistor and the first pulldown transistor; wherein the first pullup transistor and the first pulldown transistor each have a gate coupled to a first input to the delay stage and the ratioed pullup transistor and the ratioed pulldown transistor each have a gate coupled to a second input to the delay stage; and wherein the control transistor has a gate connected to a control voltage input of the delay stage.