Patent ID: 7176073
Filing Date: 2007-02-13
Classification: G11C,H01L

Abstract:
1. A method of forming a memory device, comprising: providing a substrate; forming an insulative material over the substrate; forming a crystalline layer over the insulative material and separated from the substrate by the insulative material; the crystalline layer being less than or equal to about 2000Å thick and comprising a material which includes silicon and germanium; defining a channel region within the crystalline layer, the channel region being part of a segment of the crystalline layer that is of a first dopant type; forming a gate insulator stack over the channel region, the gate insulator stack including a floating plate; forming a gate over the gate insulator stack; forming a pair of source/drain regions proximate the gate and extending into the crystalline layer; accordingly, at least a portion of the source/drain regions being within the crystalline layer; the portion of the source/drain regions within the crystalline layer being contained within a single crystal of the material which includes silicon and germanium; the source/drain regions being spaced from one another by the channel region and being of an opposite dopant type relative to the channel region; and wherein the floating plate of the gate insulator stack is electrically connected to one of the source/drain regions, and a diode electrically connects said one of the source/drain regions to the segment that is of the first dopant type.