Patent ID: 6225154
Filing Date: 2001-05-01
Classification: H01L,Y10S

Abstract:
A method of making a multi-level integrated circuit (IC), comprising the steps of:applying a layer of liquid spin-on glass (SOG) to a first silicon wafer over a plurality of first devices formed on the first silicon wafer;baking the first silicon wafer and liquid SOG layer at a first temperature;affixing a substrate of a second silicon wafer to the SOG layer;curing the SOG layer at a second temperature between about 300 degrees C. and 1400 degrees C. in order to bond the first silicon wafer to the substrate of the second silicon wafer, wherein the second temperature is greater than the first temperature;reducing a first thickness of the second silicon wafer to a second thickness; andforming a plurality of second devices on a surface of the second silicon wafer opposite the substrate and the first silicon wafer.