Patent ID: 8121996
Filing Date: 2012-02-21
Classification: G06F,G06Q,H04L,Y10S

Abstract:
1. A computer system comprising a processor and a computer readable memory unit coupled to the processor, said memory unit containing instructions that when executed by the processor implement a method for optimizing an aspect of an Information Technology (IT) structure of an IT system, said method comprising: selecting at least one control parameter from a set of externally modifiable properties of a plurality of elements comprised by the IT structure, wherein each element is independently a hardware element, a software element, or a combination thereof, and wherein each control parameter has a value that is specific to each element of the plurality of elements; specifying permissible values for each control parameter of the at least one control parameter; after said selecting at least one control parameter and said specifying permissible values, optimizing the aspect of the IT structure wherein said optimizing constrains each control parameter of the at least one control parameter to have a value within the specified permissible values for each control parameter of the at least one control parameter, wherein said optimizing is subject to at least one soft constraint, wherein the at least one soft constraint comprises a first soft constraint expressed in terms of a first parameter (P providing, to an output device of the computer system, at least one quantity selected from the group consisting of the optimized aspect of the IT structure, the value of each control parameter that optimizes the aspect of the IT structure, and a combination thereof; and selecting a transaction path for the IT structure, said transaction path being a sequential series of requests and responses from one operant of the IT structure to another operant of the IT structure, wherein the selected transaction path comprises at least one group of functionally equivalent fragments of the IT structure.