Patent ID: 6016010
Filing Date: 2000-01-18
Classification: H01L,Y10T

Abstract:
A metal interconnect stack formed by a process comprising:providing a silicon substrate having a top surface with a planar portion;forming layer of an oxide of silicon upon the planar portion of the top surface:forming a layer composed of titanium of a first thickness upon the layer of the oxide of silicon;forming a film composed of aluminum of a second thickness upon the layer composed of titanium, the second thickness being approximately two to four times greater than the first thickness;heating the layer composed of titanium and the film composed of aluminum to form a layer of a material comprising TiAl.sub.3, TiAl.sub.2, and TiCu.sub.4, wherein the material is composed of substantially more TiAl.sub.3 than TiAl.sub.2 or TiCu.sub.4 ; andforming a voidless conducting layer upon the layer of the material, wherein any line perpendicular to the planar portion of the top surface of the silicon substrate intersects:the planar portion of the top surface;the layer of the oxide of silicon;the material comprising TiAl.sub.3, TiAl.sub.2, and TiCu.sub.4 ; andthe voidless conducting layer.