Patent ID: 8735857
Filing Date: 2014-05-27
Classification: H03K

Abstract:
1. A semiconductor device comprising: a chain of serially connected P-type transistors, including only P-type transistors as transistors in the chain; a chain of serially connected N-type transistors, including only N-type transistors as transistors in the chain; power and ground lines; and via-configurable interconnections among the transistors and at least one of the power line or ground line, wherein the via-configurable interconnections are formed by programmable vias, wherein at least one P-type transistor of the chain of P-type transistors has a gate that is not hardwired to a gate of an N-type transistor of the chain of N-type transistors or at least one N-type transistor of the chain of N-type transistors has a gate that is not hardwired to a P-type transistor of the chain of P-type transistors.