Patent ID: 9104584
Filing Date: 2015-08-11
Classification: G06F

Abstract:
1. A Single Instruction Multiple Data (SIMD) operation apparatus, comprising: at least one complex number operating hardware processor configured to perform, with respect to received input data, a first operation, a second operation, and a third operation based on a first complex number, a second complex number, a third complex number, and a fourth complex number, wherein the first operation is performed to calculate, in parallel, a first product, a second product, a third product, and a fourth product, by multiplying two numbers at a time from among eight numbers, and the eight numbers respectively represent a real part and an imaginary part of the first complex number, a real part and an imaginary part of the second complex number, a real part and an imaginary part of the third complex number, and a real part and an imaginary part of the fourth complex number, wherein the second operation is performed to calculate, in parallel, a first sum of the first product and the third product, and a second sum of the second product and the fourth product, wherein the third operation is performed to generate, as a result value, either a value obtained by adding the first sum and the second sum, or a value obtained by subtracting the second sum from the first sum, and wherein at least one of the first product, the second product, the third product, and the fourth product is stored in a register in which at least one of the first complex number, the second complex number, the third complex number and the fourth complex number is stored.