Patent ID: 6275508
Filing Date: 2001-08-14
Classification: H04L,H04Q

Abstract:
A method of changing and manipulating datagram headers of packets of serial data streams of predetermined rate as required during traverse from one interface of a networking device to another, that comprises, dividing input FIFO serial data streams into a plurality of smaller successive groups of bytes of data; forming a matrix of successive multi-lane highway busses for each of input data, data patterns, computational units, and constant bus lines; applying each of the successive groups of bytes of input data to a corresponding successive input data highway bus lane and in a parallel fashion; connecting computational bus lines of the matrix to output FIFOs corresponding respectively to the input FIFOs and through respective selectors; clock-sequencing the operation of the selectors in accordance with various predetermined logic sequences for switching in the matrix the selection of data fed through the selectors to their output FIFOs in desired combinations selected from the FIFO input data, the results of the computational units, and the data patterns, and thereby manipulating the datagram header data stream as desired; and setting the clocking rate to a value low compared to the data stream rate.