Patent ID: 6710372
Filing Date: 2004-03-23
Classification: G02F,H01L

Abstract:
A thin film transistor array panel for a liquid crystal display comprising:a plurality of pairs of gate lines extending substantially in a horizontal direction and transmitting scanning signals, each pair of gate lines including a first gate line and a second gate line; a plurality of data lines transmitting images signals and extending substantially in a vertical direction; a plurality of pairs of thin film transistors, each transistor having a gate electrode, a source electrode and a drain electrode, each pair of thin film transistors corresponding to one pair of gate lines and one of the plurality of data lines and including a first thin film transistor and a second thin film transistor respectively connected to the first and the second gate lines of the corresponding pair of pixel electrodes and connected to the corresponding data line; and a plurality of pairs of pixel electrodes arranged in a matrix with a plurality of rows and a plurality of columns, each pair of pixel electrodes corresponding to one pair of thin film transistors and including a first pixel electrode and a second pixel electrode adjacent to each other and respectively connected to the first and the second thin film transistors of the corresponding pair of thin film transistors, the plurality of data lines arranged such that each of the plurality of data lines is located between adjacent two columns and assigned every two columns.