Patent ID: 8618634
Filing Date: 2013-12-31
Classification: H01L

Abstract:
1. A semiconductor device manufacturing method, comprising: forming a lower electrode on a surface of a semiconductor substrate; forming a first capacitance film on a surface of the lower electrode; selectively forming an intermediate electrode in a first region on a surface of the first capacitance film formed on the lower electrode; forming a second capacitance film on a surface of the intermediate electrode such that the intermediate electrode is interposed between the first capacitance film and the second capacitance film; forming an upper electrode over at least a portion of the second capacitance film, wherein at least the portion of the second capacitance film is interposed between the upper electrode and at least a portion of the intermediate electrode; forming a through-hole in the upper electrode in a second region; forming an insulating layer on a surface of the upper electrode; simultaneously forming forming wiring by depositing a conductive material in the at least one first via hole and the at least one second via hole.