Patent ID: 7964873
Filing Date: 2011-06-21
Classification: H01L

Abstract:
1. A thin film transistor array panel comprising: an insulating substrate; a first polysilicon member that is formed on the substrate and includes an intrinsic region with intrinsic material formed thereon, at least one first extrinsic region with extrinsic material formed thereon, and at least one second extrinsic region with extrinsic material formed thereon disposed between the intrinsic region and the at least one first extrinsic region and having an impurity concentration lower than the at least one first extrinsic region; a first insulator formed on the first polysilicon member; a first electrode formed on the first insulator; and a second insulator disposed between the first polysilicon member and the first insulator, wherein the second extrinsic region includes an impurity introduced therein at an energy higher than an energy used to introduce the impurity into the first extrinsic region.