Patent ID: 8115300
Filing Date: 2012-02-14
Classification: H01L,H05K,Y02P

Abstract:
1. A semiconductor apparatus comprising: a resin substrate; a protrusion formed on a surface of the substrate; a wiring pattern formed on the surface of the substrate by extending wiring onto a top of the protrusion; an insulating layer covering the surface of the substrate on which the wiring pattern is formed; a semiconductor element disposed over said insulating layer; and, an under fill resin, wherein said under fill resin is provided between the insulating layer and the semiconductor element; wherein only a surface of a connection part of the wiring pattern disposed on the top of the protrusion is exposed to a surface of the insulating layer and the surface of the connection part is on a level with the surface of the insulating layer, said connection part being a pad portion that is electrically connected to said semiconductor element by flip-chip bonding.