Patent ID: 6063674
Filing Date: 2000-05-16
Classification: H01L

Abstract:
A method for forming high voltage devices, comprising the steps of:providing a P-type substrate;forming an oxide layer on the P-type substrate;forming a first P-well and a second P-well in the P-type substrate;forming a first N-well in the second P-well and a second N-well in the first P-well, respectively;removing the oxide layer;forming a field oxide layer on the second N-well and a gate oxide layer on the P-type substrate;forming a gate on the gate oxide layer across a portion of the first N-well and a portion of the field oxide layer on the second N-well;forming a source region in the first N-well and a drain region in the second N-well; andforming a P.sup.+ -type doped region between the source region and the P-type substrate across the first N-well within the second P-well.