Patent ID: 8324706
Filing Date: 2012-12-04
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a MISFET formed over the semiconductor substrate; a trench formed in the semiconductor substrate; a first insulating film buried in the trench; and a plurality of dummy active regions defined by the trench, wherein the dummy active regions are regions where the MISFETS is not formed, wherein second insulating film portions are formed over the dummy active regions, wherein a resistance element is formed over the second insulating film portions, wherein the dummy active regions are located under the resistance element, wherein a third insulating film is formed on the resistance element, wherein the resistance element has first, second, and third portions, wherein the first portion and the second portion are exposed from the third insulating film, wherein the third portion is covered with the third insulating film, wherein a first silicide layer is formed on the first portion and a second silicide layer is formed on the second portion, wherein, in a plan view, opposite sides of the resistance element are located over the first insulating film, wherein, in a plan view, a part of the first silicide layer and a part of the second silicide layer are located over the first insulating film, and wherein the first insulating film is thicker than the second insulating film portions.