Patent ID: 6306558
Filing Date: 2001-10-23
Classification: G03F

Abstract:
A method of forming holes in integrated circuit wafers, comprising:providing an integrated circuit wafer having a layer of dielectric and a layer of negative photoresist formed thereon;providing a projection system for holding and positioning a mask, holding and positioning said integrated circuit wafer, and projecting said mask on said layer of negative photoresist using light having a first wavelength;providing X and Y reference directions wherein said X direction is perpendicular to said Y direction;providing a first mask formed in a first transparent mask substrate having a first number of square first contact hole regions, wherein said first mask contains no opaque material, each of said square first contact hole regions consists of a first half region having a first thickness and a second half region having a second thickness, the boundaries between said first half region and said second half region in each of said square first contact hole regions are parallel to said X direction, said first thickness provides a 90.degree. phase shift between light having said first wavelength passing through said first mask substrate and light having said first wavelength passing through said first half region, said second thickness provides a 270.degree. phase shift between light having said first wavelength passing through said first mask substrate and light having said first wavelength passing through said second half region, and said first thickness and said second thickness provide a 180.degree. phase shift between light having said first wavelength passing through said first half region and light having said first wavelength passing through said second half region;providing a second mask formed in a second transparent mask substrate having said first number of square second contact hole regions, wherein said second mask contains no opaque material, each of said square second contact hole regions consists of a transparent third half region having a third thickness and a transparent fourth half region having a fourth thickness, the boundaries between said third half region and said fourth half region in each of said square second contact hole regions are parallel to said Y direction, said third thickness provides a 90.degree. phase shift between light having said first wavelength passing through said second mask substrate and light having said first wavelength passing through said third half region, said fourth thickness provides a 270.degree. phase shift between light having said first wavelength passing through said second mask substrate and light having said first wavelength passing through said fourth half region, and said third thickness and said fourth thickness provide a 180.degree. phase shift between light having said first wavelength passing through said third half region and light having said first wavelength passing through said fourth half region;placing said integrated circuit wafer in said projection system;placing said first mask in said projection system;projecting said first mask on said layer of negative photoresist thereby exposing said layer of negative photoresist with a first exposure;placing said second mask in said projection system;projecting said second mask on said layer of negative photoresist thereby exposing said layer of negative photoresist with a second exposure;removing said integrated circuit wafer from said projection system; anddeveloping said layer of negative photoresist.