Patent ID: 6825790
Filing Date: 2004-11-30
Classification: H03M

Abstract:
A stage circuit for an analog-to-digital converter which comprises a plurality of pipelined stage circuits, the stage circuit comprising:an amplifier for receiving an analog input signal in a sampling mode; amplifying a first input signal to generate a first output signal in a first amplifying mode; and amplifying a second input signal to generate a second output signal in a second amplifying mode; a comparator with a predetermined reference signal, for comparing the analog input signal with the reference signal to generate a first digital output code in the sampling mode; and comparing the first output signal with the predetermined reference signal to generate a second digital output code in the first amplifying mode; a first compensator for adding selectively a first compensation value, according to the first digital output code, to the analog input signal to generate the first input signal in the first amplifying mode; and adding selectively a second compensation value, according to the first digital output code and the second digital output code, to the analog input signal to generate the second input signal in the second amplifying mode; and a second compensator for choosing a third compensation value according to the first digital output code and the second digital output code, and amplifying and adding the third compensation value to the second output signal to generate an analog output signal to the next stage circuit.