Patent ID: 8194853
Filing Date: 2012-06-05
Classification: H04M

Abstract:
1. A surge protection circuit comprising: a hook switch driver circuit i) coupled to a core circuit and adapted to receive a hook switch control signal at a first node and to monitor a line signal at a second node, and ii) coupled to an output node, said hook driver switch having a first transistor gain stage coupled to the output node, the first node, and the second node and a second transistor gain stage coupled to the first transistor gain stage and across the second node and the output node, said second transistor gain stage generally increasing the gain of the hook switch driver circuit; and a line modulation driver circuit coupled to the hook switch driver circuit, said line modulation driver circuit having a third gain stage comprising i) a first transistor and a second transistor, ii) a current sense resistor having a first terminal and a second terminal, and iii) a clamp, wherein: the first transistor provides gain to a base of the second transistor, the second transistor coupled between the second node and the first terminal of the current sense resistor, the second terminal of the current sense resistor coupled to a reference node, and the clamp coupled across the base of the second transistor and the second terminal of the current sense resistor, and wherein, when said hook switch is enabled by the off-hook signal, i) said line modulation driver circuit is coupled through the hook switch driver circuit to the output node, ii) said second transistor gain stage providing a sink for a surge current through the hook switch driver circuit, and iii) said clamp limits surge voltage at the base of the second transistor.