Patent ID: 8829915
Filing Date: 2014-09-09
Classification: B60L,G01R,Y02T

Abstract:
1. A leakage resistance detection device for an on-board high voltage device, which is connectable to an on-board high voltage device including an on-board high voltage DC power source and a high voltage electric load to be fed and driven by the on-board high voltage DC power source, the on-board high voltage device having a leakage resistance Rx with respect to a vehicle body, as typified by an equivalent leakage resistance on a positive potential side and an equivalent leakage resistance on a negative potential side, the leakage resistance detection device comprising a constant voltage control power source which is fed and driven by a low voltage DC power source having a negative terminal connected to the vehicle body and which generates a control power supply voltage Vcc, the leakage resistance detection device being configured to measure a value of the leakage resistance Rx via a coupling capacitor having one terminal B connected to a predetermined position of the on-board high voltage device, the leakage resistance detection device further comprising a repetitive signal output circuit, a monitoring signal processing circuit, and an arithmetic control circuit, the arithmetic control circuit comprising a microprocessor and a program memory which cooperate with each other, wherein the repetitive signal output circuit alternately repeats, in response to a switching operation of a charge/discharge switching element that operates in response to a repetitive command signal PLS, a charge period and a discharge period in which a measurement point A is intermittently connected to the control power supply voltage Vcc via a charge/discharge resistor, the measurement point A being another terminal of the coupling capacitor, to thereby one of gradually increase and gradually decrease a monitoring voltage Vx which is a potential between the measurement point A and the vehicle body, wherein the monitoring signal processing circuit is configured to one of: wherein the arithmetic control circuit is configured to: wherein the repetitive command signal PLS comprises one of a pulse signal with a fixed cycle having one of the charge period and the discharge period longer than at least the limit transition time Tx