Patent ID: 6294415
Filing Date: 2001-09-25
Classification: H01L

Abstract:
A method of fabricating a MOS transistor on a semiconductor wafer, the semiconductor wafer comprising a silicon substrate, the method comprising:forming a gate on the surface of the silicon substrate;forming a first silicon oxide layer on the surface of the semiconductor wafer, the first silicon oxide layer covering the surface of the silicon substrate and the surface of the gate;forming a first spacer on the surface of the first silicon oxide layer adjacent to the gate;forming a source and a drain in the silicon substrate adjacent to the first spacer;removing the first spacer and the first silicon oxide layer;performing a pre-amorphization implant (PAI);performing a first ion implantation process to dope the silicon substrate adjacent to the gate;forming a second silicon oxide layer on the surface of the semiconductor wafer, the second silicon oxide layer covering the surface of the silicon substrate and the surface of the gate;forming a second spacer on the surface of the second silicon oxide layer adjacent to the gate;removing the second silicon oxide layer over the source, the drain, and the gate; andforming a silicide layer on the surface of the source, the drain, and the gate.