Patent ID: 8694878
Filing Date: 2014-04-08
Classification: H03M,H04L

Abstract:
1. A method for performing Viterbi decoding on a microcontroller, the method comprising: initializing a state-metric array by executing load instructions to load state-metric data from a memory module into a set of registers in the microcontroller; performing butterfly processing of the state-metric array by executing a sequence of Viterbi processing instructions fetched from a program storage module to manipulate the state-metric (SM) data in the set of registers for a plurality of Viterbi butterfly operations to form a final set of state-metric data and trace bits for a Viterbi stage; and storing the final set of state-metric data for the Viterbi stage by executing store instructions to store the final set of state-metric data in the memory module; wherein executing a single Viterbi path metric (VITPM) Viterbi processing instruction fetched from the program storage module comprises: performing path metric (PM) computation for all four branches of a Viterbi butterfly; and updating the path metric computation results in a register; wherein executing a first type of a Viterbi path metric (VITPM) Viterbi processing instruction comprises: performing R3L=R2L+R1 to calculate path metric 1 (PM1); performing R3H=R2H−R1 to calculate path metric 2 (PM2); performing R4L=R2L−R1 to calculate path metric 3 (PM3); and performing R4H=R2H+R1 to calculate path metric 4 (PM4); where L indicates a lower half of register Rn and H indicates an upper half of register Rn.