Patent ID: 6411139
Filing Date: 2002-06-25
Classification: H03K

Abstract:
A frequency doubling circuit, comprising:an integrator configured to receive an input signal having a first frequency, said integrator having an integrator output and providing an integrated signal at said integrator output; an adder connected to said integrator and configured to receive the input signal and the integrated signal, said adder having an adder output and providing a summed signal at said adder output; a quantizer connected to said adder and having a quantizer output, said quantizer receiving the summed signal, deriving a quantized signal from the summed signal and providing the quantized signal at said quantizer output; and an exclusive OR gate having a first input, a second input and an output, said exclusive OR gate receiving the input signal at said first input and receiving the quantized signal at said second input, and providing an output signal having a second frequency, the second frequency being double the first frequency.