Patent ID: 6984549
Filing Date: 2006-01-10
Classification: H01L,Y10S

Abstract:
1. A method of forming a semiconductor fuse arrangement, comprising: providing a semiconductor substrate; defining a first elevational level over the substrate; providing a plurality of electrically conductive interconnects having contact surfaces at or beneath the first elevational level; forming a plurality of electrically conductive links extending upwardly from the contact surfaces of the electrically conductive interconnects; and forming an electrically conductive plate over the links and in electrical contact with the links, the conductive plate being formed to be above said first elevational level, individual links contacting the electrically conductive plate at a separate region relative to other links, the region where a link makes contact to the electrically conductive plate being a fuse, and the interconnections of the electrically conductive plate with the upwardly extending links thus being an arrangement of fuses.