Patent ID: 6282638
Filing Date: 2001-08-28
Classification: G06F

Abstract:
In a computer system incorporating a processor, at least one functional unit, and a memory, wherein said processor is responsive to interrupts and comprises first and second register sets that can each selectively operate in an active state and a shadow state, and said at least one functional unit is operative to transfer data between a register set operating in the shadow state and said memory, a method of accelerated task switching comprising:maintaining a set of tasks, whereby the context of each task within said set of tasks may be stored in a data structure in memory and subsequently loaded so that the corresponding task may be executed by said processor;associating said first register set with a first task, said first register set operating in said active state and being accessed by said first task;associating said second register set with a second task, said second register set operating in said shadow state; andtransferring data between said second register set and a data structure in memory while said first task is executing, thereby accelerating at least one subsequent context switching operation.