Patent ID: 7842528
Filing Date: 2010-11-30
Classification: G02F,H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: forming a first conductive layer in which a transparent conductive layer and a metal layer are stacked over an insulating substrate; forming a first resist using a first multi-tone mask; etching the transparent conductive layer and the metal layer using the first resist to form a gate electrode and a pixel region to be a pixel electrode; ashing the first resist so that a part of the first resist is left over the gate electrode; etching the metal layer over the pixel region using the first resist which is left to form the pixel electrode using the transparent conductive layer; forming a gate insulating film over the insulating substrate; forming a semiconductor layer over the gate insulating film; forming a semiconductor layer having an impurity element which imparts one conductivity type over the semiconductor layer; forming a second resist using a second multi-tone mask; etching the gate insulating film, the semiconductor layer, and the semiconductor layer having an impurity element which imparts one conductivity type over the pixel electrode to form a contact hole; ashing the second resist so that a part of the second resist is left over the gate electrode; etching the semiconductor layer and the semiconductor layer having an impurity element which imparts one conductivity using the second resist which is left to form an island-shaped semiconductor layer and an island-shaped semiconductor layer having an impurity element which imparts one conductivity type overlapped with the gate electrode; forming a second conductive layer over the insulating substrate; forming a third resist using a third mask; etching the second conductive layer using the third resist to form a source electrode and a drain electrode, and further etching the island-shaped semiconductor layer having an impurity element which imparts one conductivity type to form a source region and a drain region; forming a protective film over the insulating substrate; forming a fourth resist using a fourth mask to cover at least edge portions of the source region and at least edge portions of the drain region; and etching the gate insulating film and the protective film over the pixel electrode using the fourth resist so that the protective film is in a contact with the edge portions of the source region and the edge portions of the drain region.