Patent ID: 8791011
Filing Date: 2014-07-29
Classification: H01L

Abstract:
1. A process, comprising: forming an inter-layer dielectric (ILD) layer over a front surface of a semiconductor substrate; forming an opening through the ILD layer and further extending from the front surface of the semiconductor substrate through a part of the semiconductor substrate; forming a metal seed layer having a sidewall portion and a top portion, the sidewall portion on a sidewall of the opening, the top portion over the ILD layer; forming a block layer on only a portion of the metal seed layer; and forming a metal layer on the block layer and the metal seed layer to fill the opening, wherein the block layer is sandwiched between the metal layer and the metal seed layer on the sidewall of the opening: removing the top portion of the metal seed layer; and forming an inter-metal dielectric (IMD) layer in direct contact with the ILD layer and the metal layer.