Patent ID: 6359234
Filing Date: 2002-03-19
Classification: H01L

Abstract:
A package substrate comprising:a plurality of mounting terminals for mounting to an external device; a plurality of signal wirings, said each signal wiring for connecting a terminal of a semiconductor chip to said each mounting terminal; a fixed electric potential conductor, its electrical potential being maintained constant when mounted on said external device; and one or more opposed conductors each connected to any of said signal wirings and being opposite to said fixed electrical potential conductor with insulation from said fixed electrical potential conductor being maintained, wherein said mounting terminals, said signal wiring, said opposed conductor, and said fixed electrical potential conductor are formed on one of a plurality of wiring surfaces laminated in parallel with insulating layers therebetween; and said opposed conductor is placed on the wiring surface on the outermost side of said plurality of wiring surfaces, wherein the insulating layer formed between said opposed conductor and fixed electric potential conductor has a dielectric constant higher than that of the other insulating layers.