Patent ID: 7543375
Filing Date: 2009-06-09
Classification: B23K,H05K,Y10T

Abstract:
1. A process for producing an electronic component which effects conduction processing between front and back surfaces of a base material equipped with a core material and having a wiring layer formed on one surface thereof, the process comprising: a first step to form a via hole in the base material having the wiring layer by performing laser irradiation at least from the other surface side of the base material to expose a surface of the wiring layer; a second step to deposit a first electroplating by using the wiring layer as an electrode until the core material protruding from the inner wall surface of the via hole is covered; a third step to form an electroless plating layer in close contact with an inner wall surface of the via hole and without contacting the core material such that the electroless plating layer covers all the inner wall surface of the via hole and the first electroplating; a fourth step to deposit a second electroplating by using the wiring layer as an electrode to cover the electroless plating layer and to completely fill the via hole. wherein three layers in order from a wiring-layer side: the first electroplating layer; the electroless plating layer; and the second electroplating layer, are stacked in the via hole to thereby form a conductor part.