Patent ID: 6466070
Filing Date: 2002-10-15
Classification: H03L

Abstract:
A phase locked loop circuit comprising:a phase-frequency detector circuit; a differential charge pump circuit coupled to an output of the phase-frequency detector circuit, the differential charge pump circuit has first and second output connections to provide a differential output signal having a common mode voltage, wherein the differential charge pump circuit operates with a supply voltage that is less than 2.0 volts and maintains a common mode voltage that is less than 1.0 volts; a voltage controlled oscillator coupled to the differential charge pump circuit to provide a feedback signal to the phase-frequency detector circuit; and a loop filter coupled to the charge pump and the voltage controlled oscillator; wherein the differential charge pump circuit comprises: a common mode feedback circuit coupled to the first and second output connections, the common mode feedback circuit comprises, a first current path to conduct a first current in response to a voltage on the first output connection, a second current path to conduct a second current in response to a voltage on the second output connection, and a first and a second current mirror circuit coupled to the first and second current paths, respectively, the first and the second current mirror circuits are coupled to selectively activate bias circuitry coupled to the first and second outputs.