Patent ID: 6654073
Filing Date: 2003-11-25
Classification: G02F

Abstract:
A liquid crystal display, comprising:an insulative substrate; a plurality of address lines formed on the insulative substrate; a gate insulating film formed over said address lines; a plurality of data lines formed to cross said address lines with said gate insulating film between said address lines and said data lines; an upper insulating film formed over said data lines; a pixel electrode formed on said upper insulating film in each pixel region enclosed with said address lines and said data lines, wherein said pixel electrode comprises a transparent conductive film for applying a potential to liquid crystal in a respective pixel region; a thin film transistor section arranged in each of said pixel regions, said thin film transistor section having a gate connected to said address line and a pair of electrodes, one of which is connected to said data line, and selectively establishing a connection between said electrode connected to said data line and other electrode under a signal applied to said gate; a storage capacitance electrode arranged in each of said pixel regions, said storage capacitance electrode stores capacitance with a common electrode connected to said address line of an adjacent pixel region or with an auxiliary capacitance common wiring formed on said insulative substrate so as to pass through said respective pixel region; a wiring connecting said storage capacitance electrode and said other electrode of said thin film transistor section; and a conductive through hole formed over said storage capacitance electrode and connecting said storage capacitance electrode and said pixel electrode; wherein said storage capacitance electrode and said other electrode of said thin film transistor section are connected to said pixel electrode through said wiring, said storage capacitance electrode and said conductive through hole, and are integrally formed of the same metal film, and wherein the connecting portions of said storage capacitance electrodes to said conductive through holes, and said address lines or said auxiliary capacitance common wiring are arranged so as not to overlap each other across said gate insulating film.