Patent ID: 7262104
Filing Date: 2007-08-28
Classification: H01L

Abstract:
1. A method, comprising: forming at least first and second fin field effect transistor (FinFET) devices, the first and second FinFET devices each including a source, drain and fin region; depositing a layer of polysilicon over the first and second FinFET devices; selectively removing substantially all of the layer of polysilicon from over the fin region of the first FinFET device; performing an implantation process on the fin region of the first FinFET device subsequent to selectively removing substantially all of the layer of polysilicon from over the fin region; and selectively removing substantially all of the layer of polysilicon from over the fin region of the second FinFET device, subsequent to performing the implantation process, where threshold voltages associated with the first and second FinFET devices are different.