Patent ID: 6584574
Filing Date: 2003-06-24
Classification: H03L

Abstract:
A synchronization system, comprising:a circuit for receiving one of a plurality of external clock signals; a first phase frequency detector coupled to the circuit for detecting a difference between an internal clock signal and the received one of the plurality external clock signal, said first phase frequency detector generating a first, control signal representing the difference; a first voltage controlled oscillator coupled to said first phase frequency detector, for generating a first timing signal based on said first control signal; a second phase frequency detector for detecting a difference between the first timing signal and a second timing signal, said second phase frequency detector generating a second control signal representing the difference; a second voltage controlled oscillator coupled to said second phase frequency detector, for generating a third timing signal based on said second control signal; a first divider circuit coupled to said second voltage controlled oscillator, for dividing said third timing signal by a first predetermined number to provide the second timing signal; a second divider circuit coupled to said second voltage controlled oscillator, for dividing said third timing signal by a second predetermined number to provide said internal clock signal; a processing circuit coupled to said first phase frequency detector, for generating a third control signal based on the first control signal, the processing circuit also generates a select signal for selecting one of the plurality of external clock signals; an output circuit coupled to the processing circuit and the first voltage controlled oscillator, the output circuit providing an output signal based on the third control signal and the first timing signal.