Patent ID: 7687367
Filing Date: 2010-03-30
Classification: H01L

Abstract:
1. A semiconductor device manufacture method comprising steps of: (a) preparing a silicon substrate having a principal surface and one conductivity type at least in a device forming region; (b) forming an oxidation mask material layer covering said device forming region on the principal surface of said silicon substrate; (c) forming a first resist layer on said oxidation mask material layer in accordance with a first device opening pattern corresponding to a portion of said device forming region; (d) forming a first ion doped region for a channel stopper by implanting impurity ions of said one conductivity type into the principal surface of said silicon substrate via said oxidation mask material layer by using said first resist layer as a mask; (e) after said first ion doped region is formed, isotropically etching said first resist layer to reduce a thickness and a planar size of said first resist layer by a predetermined amount; (f) after said isotropical etching, patterning said oxidation mask material layer by etching using said first resist layer as a mask to form a first oxidation mask made of a remaining portion of said oxidation mask material layer; and (g) after said first resist layer is removed, forming a field oxide film having a device opening corresponding to said first oxidation mask on the principal surface of said silicon substrate through selective oxidation using said first oxidation mask and forming a first channel stopper region of said one conductivity type corresponding to said first ion doped region, wherein: a well region of a conductivity type opposite to said one conductivity type is formed on the principal surface of said silicon substrate; said step (b) forms said oxidation mask material layer covering also said well region; said step (c) forms also a second resist layer in accordance with a second device opening pattern corresponding to a portion of said well region; said step (d) forms said first ion doped region using said second resist layer also as a mask; said step (e) isotropically etches also said second resist layer to reduce a thickness and a planar size of said second resist layer by a predetermined amount; said step (f) patterns said oxidation mask material layer using said second resist layer also as a mask to form a second oxidation mask made of the remaining portion of said oxidation mask material layer corresponding to said second resist layer, the semiconductor device manufacture method further comprises, after said step (f) and before said step (g), steps of: (h) forming a third resist layer covering said device forming region and said first resist layer and forming a fourth resist layer not covering an ion doped region existing in said well region as a portion of said first ion doped region and covering a side of said second oxidation mask and said second resist layer; and (i) implanting impurity ions of said conductivity type opposite to said one conductivity type into said well region by using as a mask said third and fourth resist layers to form a second ion doped region for a channel stopper by compensating for the ion doped region existing in said well region as a portion of said first ion doped region; after said third and fourth resist layers and said first and second resist layers are removed, said step (g) forms a field oxide film having first and second device openings corresponding to said first and second oxidation masks on the principal surface of said silicon substrate through selective oxidation using said first and second oxidation masks, a first channel stopper region having said one conductivity type and corresponding to the first ion doped region and a second channel stopper region having said conductivity type opposite to said one conductivity type and corresponding to the second ion doped region.