Patent ID: 6295597
Filing Date: 2001-09-25
Classification: G06F

Abstract:
A vector computer comprising:a memory;an input-output subsystem including magnetic disk drives;a plurality of vector element registers, each vector element register coupled to the memory and operable to be selectively loaded with data from the memory, each vector element register including a plurality of N elements, and each element having a plurality of bits;a vector carry register, the vector carry register including a plurality of N bits; anda vector arithmetic or logical functional unit having an input coupled to receive data operands from the respective elements of two of the plurality of vector element register and the vector carry register, and operable to produce a result as an output, wherein each element of the result is based on an element from the first vector element register, a corresponding element from the second vector element register, and a corresponding bit from the vector carry register; anda controller associated with the vector registers and responsive to program instructions to successively transmit one or more corresponding elements from each of the two vector element registers and one or more corresponding bits from the vector carry register to the functional unit and to successively store results from the output of the functional unit as elements into one of the plurality of vector element registers.