Patent ID: 7772910
Filing Date: 2010-08-10
Classification: G06F,Y02D

Abstract:
1. A method of generating an internal clock within a memory system comprising a memory and a controller, the method comprising: storing boot code in the memory, wherein the boot code is accessed through the controller by an external host device during a power-on routine; upon receiving a power-on reset signal in the controller during the power-on routine, generating a boot load signal, wherein the boot load signal immediately transitions from a non-active state to an active state in response to the power-on reset signal, remains in the active state during a boot load time period during which the controller accesses the boot code in the memory, and following the boot load time period transitions from the active state to the inactive state; and operating the memory system synchronously with an alternate clock signal during the boot load time period and synchronously with a normal clock signal following the boot load time period.