Patent ID: 8966168
Filing Date: 2015-02-24
Classification: G06F

Abstract:
1. An information memory system in which data received serially is divided into pieces of data, which are then programmed to and stored in a plurality of flash-memory-equipped large-capacity memory units in parallel, the information memory system including a processor for rebuild configured: to detect an error in a piece of data read from at most one of the plurality of flash-memory equipped large-capacity memory units; and to perform correction and rebuild, and the information memory system configured to integrate the pieces of data read from the flash-memory equipped large-capacity memory units in parallel into integrated serial data, and to output the integrated serial data, the information memory system comprising: a plurality of buffers respectively connected to the plurality of flash-memory equipped large-capacity memory units, each buffer configured to buffer a received piece of read data, to output a read request if the amount of read data buffered in the buffer exceeds a specified buffer amount, and to output a buffer full notice when the buffer buffers the received piece of read data up to its full capacity; and controller configured