Patent ID: 6415397
Filing Date: 2002-07-02
Classification: G01R,G11C,H05K

Abstract:
A parallel test system for testing memory modules comprising:a plurality of motherboards, the motherboards being main boards for computers using memory modules as a memory, the motherboards having a component side and a solder side, the component side having integrated circuits mounted thereon and expansion sockets for expansion boards; test adaptor boards, mounted to the solder side of the motherboards, the test adaptor boards having test sockets for receiving memory modules for testing by the motherboards, each test adaptor board for electrically connecting a memory module inserted into the test socket to a motherboard attached to the test adaptor board, the motherboard using the memory module inserted into the test socket as a portion of the memory of the motherboard; a main system interface, coupled to the plurality of motherboards, for commanding the motherboards to test memory modules inserted into the test sockets and for receiving test results from the motherboards; and a robotic arm, responsive to commands from the main system interface, for inserting memory modules into the test sockets; whereby the robotic arm inserts memory modules into the test sockets on the test adaptor boards mounted on the solder side of the motherboards.