Patent ID: 7838376
Filing Date: 2010-11-23
Classification: H01L

Abstract:
1. A method of fabricating an integrated circuit, comprising: providing a substrate; forming a first mask with a buried layer pattern over the substrate; forming first and second buried layers in the substrate by implanting dopant through the first mask; forming a layer of insulating material over the substrate over the second buried layer and not over the first buried layer; forming an epitaxial layer over the substrate over the first buried layer, and over the layer of insulating material over the second buried layer; selectively removing the epitaxial layer from over the layer of insulating material over the second buried layer, leaving the epitaxial layer over the first buried layer; after selectively removing the epitaxial layer, forming a second mask with a well pattern over the epitaxial layer over the first buried layer and over the layer of insulating material over the second buried layer; and determining an alignment of the well pattern with the first buried layer by measuring an alignment of the well pattern with the second buried layer.