Patent ID: 9166608
Filing Date: 2015-10-20
Classification: H03M

Abstract:
1. A method for estimating bandwidth mismatch in a time-interleaved A/D converter comprising a plurality of channels, each channel comprising sampling means for sampling a reference analog input voltage signal (V ref ), an array of capacitors connected in parallel and a quantizer arranged for converting the sampled input voltage at first terminals of the capacitors into a digital code, the method comprising: precharging second terminals of the capacitors of the plurality of channels to a first state and sampling the reference analog input voltage signal, whereby the reference analog input voltage signal is applied via a first switchable path and the sampled input voltage signal is received at first terminals of the capacitors, setting in each channel the second terminals to a second state, thereby generating a further reference voltage signal (V applying the reference analog input voltage signal to the first terminals of the capacitors via a second switchable path, the second path having a given impedance being higher than the known impedance of the first path, thereby creating on the first terminals a non-zero settling error indicative of an incomplete transition from the further reference voltage signal to the reference analog input voltage signal, quantizing the non-zero settling error, thereby obtaining an estimate of the non-zero settling error in each channel of the plurality, comparing the estimates of the non-zero settling errors of the channels and deriving therefrom an estimation of the bandwidth mismatch.