Patent ID: 7373581
Filing Date: 2008-05-13
Classification: H03M

Abstract:
1. An error correcting code decoding device based on Message-Passing decoding on a Low-Density Parity-Check Code, whose parity-checkmatrix consists of sub-matrices of a Kronecker product of two permutation matrices, comprising: a plurality of memory means for storing a received value and a message generated during said decoding; a plurality of variable node function means which perform variable node processing in said decoding; a plurality of check node function means which perform check node processing in said decoding; a plurality of address generation means for generating an address of said memory means on the basis of the first permutation matrix of said sub-matrix of a Kronecker product; and a plurality of shuffle network means for determining a connection between said variable node function means on the basis of the second permutation matrix in said sub-matrix of a Kronecker product; wherein said check node functions(s) means perform(s) check node processing sequentially on a unit of said second permutation matrix, and said variable node functions generate messages in accordance with said current check node processing.