Patent ID: 9099321
Filing Date: 2015-08-04
Classification: H01L

Abstract:
1. A method for fabricating a power semiconductor device, comprising: providing a semiconductor substrate; forming an epitaxial layer on the semiconductor substrate; forming a hard mask layer on the epitaxial layer; forming at least one first opening in the hard mask layer; etching the epitaxial layer through the first opening to form at least one first trench; trimming the hard mask layer to enlarge the first opening to a second opening such that upper corners of the first trench are revealed; filling the first trench with a doped layer, said doped layer being direct contact with revealed said upper corners of the first trench; performing a thermal drive-in process to diffuse dopants from the doped layer into the epitaxial layer to thereby form a diffusion region in the first trench, wherein the diffusion region comprises a first region that is closer to surface of the first trench and a second region that is formed deeper into the epitaxial layer; and performing a dry etching process, using the trimmed hard mask layer as an etching hard mask, to completely etch away the doped layer and the epitaxial layer in the first region, thereby forming a second trench.