Patent ID: 8410482
Filing Date: 2013-04-02
Classification: G09G,H01L

Abstract:
1. A semiconductor device, comprising: a substrate; a first transistor which is provided on an upper surface of the substrate and which comprises a first source electrode, a first drain electrode and a first gate electrode; a second transistor which is provided on the upper surface of the substrate and which comprises a second source electrode, a second drain electrode and a second gate electrode, wherein the second transistor is of a same conductive type as the first transistor; a source connecting wiring which electrically connects the first source electrode and the second source electrode; a drain connecting wiring which electrically connects the first drain electrode and the second drain electrode; and a gate connecting wiring which electrically connects the first gate electrode and the second gate electrode, wherein the first source electrode and the first drain electrode are arranged along a first direction and the second source electrode and the second drain electrode are arranged along the first direction in a reverse order from an order of the first source electrode and the first drain electrode along the first direction, wherein the source connecting wiring and the drain connecting wiring are provided at positions except a region overlapped with the first gate electrode, the second gate electrode and the gate connecting wiring, and wherein one of the source connecting wiring and the drain connecting wiring includes a region which overlaps planarly with the other of the source connecting wiring and the drain connecting wiring via an insulation film.