Patent ID: 7496810
Filing Date: 2009-02-24
Classification: G11C

Abstract:
1. A semiconductor memory device comprising: a memory cell that stores data; a verify circuit that verifies data stored in the memory cell responsive to a verify start signal and that outputs a verify pass signal when a desired result is obtained; a data write controlling circuit that repeats a data write operation to the memory cell until the verify pass signal is input thereto, and that generates and outputs the verify start signal after each data write operation; a verify pass signal invalidating circuit that invalidates the verify pass signal when a test mode is set; and a verify operation omitting circuit, coupled to receive the verify start signal as output by the data write controlling circuit, that provides the verify start signal output from the data write controlling circuit to the verify circuit responsive to the verify pass signal output by the verify circuit, wherein the verify operation omitting circuit stops providing the verify start signal as output to the verify circuit for the remainder of the test mode once the verify pass signal indicates that the desired result is obtained, so that the data write operation is repeated for the remainder of the test mode without verification by the verify circuit, wherein once activated, the verify operation omitting circuit outputs a signal to stop an output of the verify start signal to the data write controlling circuit upon receiving the verify start signal from the data write controlling circuit, wherein the verify circuit outputs a verify end signal upon completing a verify operation and the data write controlling circuit includes a verify done terminal for receiving the verify end signal, and wherein the verify operation omitting circuit, when activated and upon receiving the verify start signal from the data write controlling circuit, outputs a dummy verify end signal to the verify done terminal of the data write controlling circuit as the signal to stop an output of the verify start signal.