Patent ID: 6061359
Filing Date: 2000-05-09
Classification: H04B,H04J,H04W

Abstract:
A packet-switched system for communicating data, comprising:a plurality of packet transmitters, each packet transmitter including,a transmitter-first-in-first-out (transmitter-FIFO) memory, coupled to a data input, for storing data;a demultiplexer, coupled to said FIFO memory and having a plurality of outputs, for demultiplexing the stored data into a plurality of sub-data-sequence signals, with a respective sub-data-sequence signal at a respective output of said demultiplexer;chip-sequence means for outputting a plurality of chip-sequence signals, with each chip-sequence signal orthogonal to the other chip-sequence signals in said plurality of chip-sequence signals;a plurality of product devices, coupled to the plurality of outputs of said demultiplexer, respectively, and to said chip-sequence means, for multiplying each of the sub-data-sequence signals by a respective chip-sequence signal, thereby generating a plurality of spread-spectrum channels;a combiner, coupled to the plurality of product devices, for algebraically combining the plurality of spread-spectrum channels as a multichannel-spread-spectrum signal;a header device, coupled to said combiner, for concatenating a header for chip-sequence synchronization, to the multichannel-spread-spectrum signal, thereby generating a packet-spread-spectrum signal; anda transmitter subsystem, coupled to said header device, for transmitting on a carrier frequency the packet-spread-spectrum signal using radio waves over a communications channel; anda plurality of packet receivers, each packet receiver including,a translating device, coupled to the communications channel, for translating the packet-spread-spectrum signal from the carrier frequency to a processing frequency;a header-matched filter integrator, coupled to said translating device and having an impulse response matched to the header, for detecting, at the processing frequency, the header in the packet-spread-spectrum signal, and for outputting, responsive to detecting the header, a header-detection signal;a processor, coupled to said header-matched filter integrator, responsive to the header-detection signal, for generating control and timing signals;a plurality of data-matched filters, coupled to said translating device, with each data-matched filter having an impulse response matched to a chip-sequence signal of the plurality of chip-sequence signals, respectively, for despreading the multichannel-spread-spectrum signal embedded in the packet-spread-spectrum signal as a plurality of received spread-spectrum channels, respectively;a multiplexer, coupled to said plurality of data-matched filters, for multiplexing the plurality of received spread-spectrum channels as received data; anda receiver-FIFO memory, coupled to said multiplexer, for storing the received data, and for outputting the received data to a data output.