Patent ID: 6631472
Filing Date: 2003-10-07
Classification: G06F,H04L

Abstract:
A controller circuit for switching between a user mode and a kernel mode in a processor comprising;a processor; a program counter electrically connected to the processor for monitoring program fetch addresses; a kernel program fetch supervisor circuit having a predetermined address value stored within, the kernel program fetch supervisor circuit being electrically connected to the program counter for comparing the address in the program counter to the predetermined address value stored within the kernel program fetch supervisor circuit; a program memory electrically connected to the program counter; a sequential circuit electrically connected to the kernel program fetch supervisor circuit for switching between setting a user mode bit and a kernel mode bit; a kernel data fetch supervisor circuit electrically connected to the processor for comparing a data fetch address to a memory address range; a data memory electrically connected to a processor data interface for storing data; a first AND circuit coupled to the sequential circuit and the kernel data fetch supervisor circuit for activating and deactivating a violation reset signal; and a second AND circuit coupled to the first AND circuit and the kernel program fetch supervisor circuit for activating and deactivating the violation reset signal.