Patent ID: 6469370
Filing Date: 2002-10-22
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate having a first surface and a second surface, said semiconductor substrate containing an integrated circuit device; an electronic circuit provided on the first surface of the substrate, the electronic circuit having terminals; an internal wiring pattern provided on the first surface of the substrate, the internal wiring pattern being connected to the electronic circuit terminals; a protective layer contacting the first surface of the substrate, the protective layer covering the substrate; vias provided on the substrate and projecting from the protective layer, the vias being connected to the internal wiring pattern at arbitrary positions on the substrate; an external wiring pattern contacting the protective layer, the external wiring pattern being connected to the vias; projection electrodes provided on the external wiring pattern, the projection electrodes being connected to the external wiring pattern to establish connections between the projection electrodes and the electronic circuit terminals, the projection electrodes having a predetermined height above the external wiring pattern; and an enclosure layer of a resin material contacting the protective layer, the enclosure layer covering sides of the projection electrodes and external surfaces of the external wiring pattern.