Patent ID: 6806690
Filing Date: 2004-10-19
Classification: G05F

Abstract:
A low drop-out voltage regulator, comprising:an input error amplifier stage; a first amplifier stage having a first output, a first input coupled to the output of the input error amplifier stage and a second input coupled to a first bias source; a second amplifier stage having a second output, a third input coupled to the output of the input error stage and a fourth input coupled to a second bias source; a first power transistor having a gate coupled to the first output, the first power transistor also being coupled to a node where voltage is to be regulated; a second power transistor having a gate coupled to the second output, the second power transistor also being coupled to the node; wherein an output voltage of the first bias voltage source differs from an output voltage of the second bias voltage source by a predetermined voltage, whereby the first amplifier stage and the first power transistor are active at a first output current range and both the first amplifier stage and first power transistor and second amplifier stage and second power transistor are active at an output current that exceeds the first output current range.