Patent ID: 9195792
Filing Date: 2015-11-24
Classification: G06F

Abstract:
1. A method, comprising: partitioning a circuit design into a first topology category and a second topology category, the circuit design specified according to a first process design type; determining a first ordered set of parameters for the first topology category and a second ordered set of parameters for the second topology category; simulating circuit topology behavior of the first topology category to identify first performance characteristics for the first ordered set of parameters; normalizing the first ordered set of parameters based upon the first performance characteristics, a normalized parameter corresponding to a new parameter value of a second process design type satisfying an older parameter value of the first process design type; and resizing one or more components within the circuit design based upon the first ordered set of parameters and the second ordered set of parameters to generate a ported circuit design specified according to the second process design type for the circuit design, the method implemented at least in part via a processing unit.