Patent ID: 7215768
Filing Date: 2007-05-08
Classification: H04L

Abstract:
1. An encryption device, comprising: a shared new data and swap input line adapted to receive a shared new data and swap bit; a left portion input line adapted to receive a left portion bit; a right portion input line adapted to receive a right portion bit; a function input line adapted to receive a function bit associated with an encryption function; and an output line adapted to provide an output bit to a left portion register based, at least in part, on the shared new data and swap bit, wherein the output bit represents a swapped portion bit, a non-swapped portion bit, and the shared new data and swap bit, wherein the swapped portion bit is the right portion bit, and the non-swapped portion bit is the left portion bit combined with the function bit via an exclusive OR operation, and wherein the output bit is the shared new data and swap bit when a new left or right portion is being loaded by an encryption engine.