Patent ID: 6476654
Filing Date: 2002-11-05
Classification: H03K

Abstract:
A slew rate adjusting circuit comprising:a pre buffer unit which receives an input signal; a slew rate control unit which determines a current value of a current supplied to the pre buffer unit and automatically controls a slew rate of the input signal; and a main buffer unit which receives the input signal from the pre buffer unit and outputs an interface output with a slew rate controlled by the slew rate control unit; wherein said slew rate control unit comprises: an external terminal resistance; a first comparator which compares a voltage dropped by the external terminal resistance with a predetermined reference voltage; a slew rate control macro which generates and outputs a slew rate code based on a comparison result of the first comparator; and a first transistor which changes its own electrical characteristics according to the slew rate code, wherein the slew rate control macro compares the currently generated slew rate code with the previous slew rate code generated immediately before the currently generated slew rate code, and outputs a smaller one of the slew rate codes, and wherein a constant current value is autonomously determined so that the voltage dropped by the external terminal resistance becomes equal to the predetermined reference voltage, by repeating the output operation of the slew rate code and the changing of the electrical characteristics of the first transistor.