Patent ID: 6288424
Filing Date: 2001-09-11
Classification: H01L

Abstract:
A semiconductor device with a transistor of the lateral DMOS type, comprising a semiconductor body having a semiconductor substrate of a first conductivity type and, provided on the substrate, an epitaxial semiconductor layer bordering on a surface of the semiconductor body, said semiconductor body being provided, at the interface between the epitaxial layer and the substrate, with a layered region of the first conductivity type and a buried layer of a second, opposite, conductivity type, which extends between the layered region and the substrate and electrically insulates them from each other, at least three, mutually separated backgate regions of the first conductivity type, which border on the surface and are each provided with a source region of the second conductivity type, and a number of drain zones in the form of heavily doped surface regions of the second conductivity type, situated between the backgate regions and separated from said backgate regions by intermediate lightly doped drain extensions of the second conductivity type, being formed in a part of the epitaxial layer, situated between the buried layer and the surface, wherein the back-gate regions are each conductively connected to said layered region of the first conductivity type by means of a zone of the first conductivity type to at least substantially preclude bipolar transistor parasitic action.