Patent ID: 7618853
Filing Date: 2009-11-17
Classification: H01L,Y10S

Abstract:
1. A method for forming a field effect transistor (FET) device, comprising: forming a gate conductor and a gate dielectric on an active device area of a semiconductor substrate; forming a drain region in said active device area of said semiconductor substrate, on one side of said gate conductor; forming a source region in said active device area of said semiconductor substrate, on an opposite side of said gate conductor; and forming a dielectric halo in said active area of said semiconductor substrate, said dielectric halo disposed in contact between said drain region and a body region and in contact between said source region and said body region, wherein said forming a dielectric halo further comprises forming sacrificial spacers adjacent said gate conductor and said gate dielectric, forming a non-conformal mask layer over said semiconductor substrate and said gate conductor, removing said sacrificial spacers so as to expose a portion of semiconductor substrate, removing portions of said semiconductor substrate exposed by the removal of said sacrificial spacers; and forming a dielectric material within openings defined by said removal of portions of said semiconductor substrate so as to define a pair of dielectric plugs disposed below a channel of the FET device.