Patent ID: 8472257
Filing Date: 2013-06-25
Classification: G11C

Abstract:
1. A method of programming in parallel a group of memory cells of a nonvolatile memory, comprising: providing the memory cells with a threshold window partitioned into a plurality of threshold subranges by a set of increasing demarcation threshold values (V applying a programming voltage as a series of incrementing voltage pulses in a programming pass to program in parallel memory cells of the group from an erased memory state to respective target memory states; providing a test reference threshold having a value offset from a designate demarcation threshold value V verifying the memory cells of the group under programming relative to the test reference threshold value in between voltage pulses until the overshoot of each memory cell under programming is determined; and in a subsequent portion of the programming pass, slowing a rate of programming of any memory cell under programming that was determined to have an overshoot more than the margin.