Patent ID: 6400007
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A stacked structure of semiconductor means used for electrically connecting to a printed circuit board, comprising:a substrate having a first surface and a second surface opposite to the first surface, the first surface formed with signal input terminals, then, the second surface formed with signal output terminals for electrically connected to the printed circuit board; a lower semiconductor chip having a upper surface and a lower surface, the central part of the upper surface formed with a plurality of bonding pads; an adhered glue layer located between the substrate and the lower semiconductor for adhering the lower surface of the semiconductor to the first surface of the substrate, the overflow glue of the adhered glue layer covered above the periphery of the lower semiconductor chip; a plurality of wires each having a first end and second end away from the first end, the first end being electrically connected to the bonding pads of the lower semiconductor chip, the second end being electrically connected to the signal input terminals so that signals from the lower semiconductor chip are capable of being transmitted to the substrate, an upper semiconductor chip located on the upper surface of the semiconductor chip to stack above the lower semiconductor chip and electrically connected to the signal input terminals of the substrate.