Patent ID: 6526503
Filing Date: 2003-02-25
Classification: G06F

Abstract:
A memory device access method comprising the steps of:fetching a plurality of instructions from said memory device; determining a type of each branch instruction in said plurality of instructions; for â€œpushâ€  type branch instructions predicted taken, performing the substeps of: determining a type of a last operation on a stack, said stack having a first portion and a second portion, each stack portion including a plurality of entries for storing a return address in a selected entry of a selected one of said first stack portion and said second stack portion; determining a next instruction address and storing said next instruction address in a selected entry of a selected one of said first and second stack portions, said entry selected in response to said step of determining said last operation type, and wherein said next instruction address is stored in a first portion of said selected entry; and setting a next fetch address to a target address of a first one of said branch instructions, said next fetch address for accessing said memory device; and for â€œpopâ€  type branch instructions predicted taken, setting said next fetch address to a return address in a first entry in an active one of said first and second portions of said stack.