Patent ID: 7386685
Filing Date: 2008-06-10
Classification: G06F,Y02D

Abstract:
1. A snoop filtering method for supporting cache coherency in a computing environment having multiple processing units, each processing unit having one or more cache memories associated therewith and an associated snoop filter device, said method comprising: for each snoop filter device associated with a processing unit: providing a plurality of dedicated inputs for receiving snoop requests from a corresponding plurality of memory writing sources, each said snoop request comprising an address to be snooped; tracking snoop requests from a corresponding one of said plurality of memory writing sources and recording an address of each snoop request received in a corresponding snoop cache from its corresponding memory writing source; comparing each received snoop request address against all addresses recorded in said corresponding snoop cache; and, responsive to said comparing, either forwarding said received snoop request to its associated processing unit when an address does not match in said respective snoop cache, or discarding said snoop request when an address match is found in said respective snoop cache, whereby a number of snoop requests forwarded to a processing unit is reduced thereby increasing performance of said computing environment.