Patent ID: 9029209
Filing Date: 2015-05-12
Classification: H01L

Abstract:
1. A method of manufacturing a thin film transistor substrate that includes an insulating substrate, a thin film transistor including a gate electrode provided on the insulating substrate, a gate insulating film provided so as to cover the gate electrode, an oxide semiconductor layer provided on the gate insulating film and including a channel region, and a source electrode provided on the oxide semiconductor layer so as to overlap the gate electrode, a channel protective film provided so as to cover the channel region, an interlayer insulating film provided so as to cover the thin film transistor, and a planarizing film provided so as to cover the interlayer insulating film, the method comprising at least: a gate electrode formation step of forming the gate electrode on the insulating substrate by using a first photomask; a gate insulating film formation step of forming the gate insulating film over the insulating substrate so as to cover the gate electrode; a semiconductor layer formation step of forming the oxide semiconductor layer on the gate insulating film; a channel protective film formation step of forming the channel protective film on the oxide semiconductor layer so as to cover the channel region by using a second photomask; a source electrode formation step of forming the source electrode on the oxide semiconductor layer by using a third photomask; an interlayer insulating film formation step of forming the interlayer insulating film covering the oxide semiconductor layer, the channel protective film, and the source electrode; a planarizing film formation step of forming the planarizing film on the interlayer insulating film by using a fourth photomask; an opening formation step of forming an opening in the interlayer insulating film and the planarizing film by removing a portion of the interlayer insulating film by using the planarizing film as a mask; a channel protective film removal step of removing the channel protective film in the opening by performing etching by using the interlayer insulating film and the planarizing film as a mask to expose a portion of a surface of the oxide semiconductor layer from the channel protection film; and a plasma treatment step of plasma treating the oxide semiconductor layer in the opening to reduce a resistance of a portion of the oxide semiconductor layer.