Patent ID: 7256488
Filing Date: 2007-08-14
Classification: H01L

Abstract:
1. An integrated circuit comprising a semiconductor die for wire-bonding to a plurality of conductive traces comprising: a first substrate trace having a first end; a second substrate trace having a first end, said second substrate trace laterally aligned with said first substrate trace; a first intervening substrate trace located between said first substrate trace and said second substrate trace, said first intervening substrate trace having a first end; a first bonding pad located on said semiconductor die, said first bonding pad coupled to said first end of said second substrate trace using a first wire; a second bonding pad laterally aligned with said first bonding pad and located on said semiconductor die, said second bonding pad coupled to said first end of said first substrate trace using a second wire; a first intervening bonding pad located between said first bonding pad and said second bonding pad, said first intervening bonding pad coupled to said first end of said first intervening substrate trace using a third wire, wherein said first wire crosses said second wire over said third wire.