Patent ID: 6815282
Filing Date: 2004-11-09
Classification: G11C,H01L

Abstract:
A method of forming a SOI SRAM including a plurality of SRAM cells each of said SRAM cells including a plurality of field effect transistors, said method comprising the steps of:a) forming a buried oxide (BOX) layer in a silicon wafer, said BOX layer isolating a silicon surface layer from a silicon substrate; b) forming silicon islands from said silicon surface layer; c) forming field effect transistor (FET) gates on said silicon islands; d) forming shallow diffusions of a first dopant type adjacent a plurality of said FET gates, said shallow diffusions extending from an upper surface of said silicon surface layer to a point above said BOX layer; and e) forming a body contact diffusion in a plurality of said islands, each said body contact diffusion extending from said upper surface below said point.