Patent ID: 6323086
Filing Date: 2001-11-27
Classification: H01L

Abstract:
A method of forming a flash memory, comprising:depositing a polysilicon material over a gate oxide on a substrate such that said polysilicon material is patterned to form a wordline having first and second sidewalls, said first sidewall being tapered, with respect to a surface of said substrate, to have a slope angle and said second sidewall having a slope angle greater than said slope angle of said first sidewall; anddepositing a polysilicon layer over said wordline and etching said polysilicon layer to form a polysilicon spacer on said second sidewall such that only one said polysilicon spacer abuts said wordline, said polysilicon spacer being spaced from said wordline by an oxide layer therebetween,wherein said polysilicon spacer forms a floating gate, andwherein a periphery of said floating gate is surrounded by said wordline as a control gate.