Patent ID: 9021321
Filing Date: 2015-04-28
Classification: G11B,G11C

Abstract:
1. A method comprising: selecting, by a first interface node included in a plurality of interface nodes, a first logical block address that corresponds to a first contiguous memory location located on a storage device, wherein the storage device is accessible by each of the plurality of interface nodes; retrieving, by the first interface node, a first logical block address status indicator from a shared memory area that indicates the status of the first logical block address, the shared memory area accessible by each of the plurality of interface nodes; determining, based upon the first logical block address indicator, whether the first logical block address is utilized by a second interface node included in the plurality of nodes; and testing, by the first interface node, the corresponding first contiguous memory location in response to determining that the logical block address fails to be utilized by the second interface node.