Patent ID: 6167497
Filing Date: 2000-12-26
Classification: G06F

Abstract:
A register address conversion method for use in a data processing apparatus including physical registers larger in number than logical registers specifiable by a register specification field of an instruction, said method comprising the steps of:classifying the physical registers into a plurality of physical register banks;receiving, by a register address converting section of the data processing apparatus, bank information for selection of a physical register bank to be specified and setting the bank information to a bank register in the address converting section;receiving, by the register address converting section, logical register address information representing an address of a logical register specified by an instruction, adding the bank information set to the bank register to at least a portion of the logical register address information, and thereby producing a physical register address specifying one of physical registers in the physical register bank selected by the bank information; andallocating, by said register address converting section, a higher half and a lower half of the logical registers specifiable by one instruction respectively to first and second physical banks which are spaced apart by at least one physical bank.