Patent ID: 6281563
Filing Date: 2001-08-28
Classification: H01L,Y10S

Abstract:
A semiconductor device, comprising:a substrate;a shallow tank in said substrate, said shallow tank having a conductivity type opposite the conductivity type of said substrate;a first source/drain region in said shallow tank, said first source/drain region having a conductivity type opposite the conductivity type of said shallow tank;a second source/drain region in said shallow tank, said second source/drain region being spaced from said first source/drain region and having a conductivity type opposite the conductivity type of said shallow tank;a gate having a first end adjacent said first source/drain region and a second end adjacent said second source/drain region; anda low resistance programmed area within one and only one of said source/drain regions at a junction of said source/drain region and said shallow tank, said low resistance programmed area being spaced laterally from said gate.