Patent ID: 6982954
Filing Date: 2006-01-03
Classification: G06F

Abstract:
1. A communications bus connected between a source node and a destination node, the communications bus including: (a) a number of alternate transmission paths extending between the source node and the destination node on a common substrate comprising a semiconductor chip; (b) a source switching arrangement interposed between the source node and the alternate transmission paths, the source switching arrangement being operable to selectively connect the source node to a selected one of the alternate transmission paths and disconnect the source node from each other alternate transmission path; (c) a destination switching arrangement interposed between the destination node and the alternate transmission paths, the destination switching arrangement being operable to selectively connect the destination node to the selected one of the alternate transmission paths and disconnect the destination node from each other alternate transmission path; and (d) test circuitry connected to the source node and the destination node for applying a test signal to the selected one of the alternate transmission paths and for monitoring the destination node to determine whether the test signal is properly received at the destination node, wherein when the test signal is not properly received at the destination node the source switching arrangement disconnects the source node from the selected one of the alternate transmission paths and connects the source node to a respective one of the other alternate transmission paths, and the destination switching arrangement disconnects the destination node from the selected one of the alternate transmission paths and connects the destination node to the respective one of the other alternate transmission paths.