Patent ID: 7793239
Filing Date: 2010-09-07
Classification: G06F

Abstract:
1. A method of modeling power leakage for a design, comprising: providing one or more cell libraries comprising parameters of cell characteristics; and providing a module configured to determine cell leakages of a cell for a process, voltage and temperature (PVT) corner using the cell characteristics contained in the one or more cell libraries, in combination with one or more components that determine the acceleration of leakage due to PVT, using an amount of devices in a leakage path (Fckt) and a leakage distribution (Fchip), thereby eliminating a need to recharacterize the one or more cell libraries when parameters in the one or more components are updated, wherein the method models power leakage for the design using a computer infrastructure, and wherein the determined amount of devices in a leakage path (Fckt) and a leakage distribution (Fchip) to obtain the cell leakages comprises: