Patent ID: 7271074
Filing Date: 2007-09-18
Classification: H01L

Abstract:
1. An isolation trench in a substrate material for electrically insulating high voltage power elements integrated in combination with low voltage logic elements into the same silicon circuit in a substrate wafer (trench isolation), said trench being partially filled with electrically insulating material and partially with a fill material, said trench extending to an electrically insulating layer located at least at the bottom of said trench, wherein (i) within said trench an alternating sequence or alternatingly electrically insulating layers (insulation layers) and fill layers are provided with a parallel orientation with respect to trench walls; (ii) the plurality of insulating layers and fill layers are composed such that with respect to a sum over all parallel layers within said trench a coefficient of thermal expansion of the sum of layers is adjusted so as to be at least close to a coefficient of expansion of the substrate materials, thereby avoiding a bending of the substrate wafer.