Patent ID: 6760398
Filing Date: 2004-07-06
Classification: H03K,H03L

Abstract:
A dual-modulus prescaler circuit particularly for a frequency synthesiser, said circuit dividing the frequency of at least one high frequency signal by a factor N in a first selected mode and by a factor N+M in a second selected mode, said circuit including:several asynchronous dividers-by-two connected in series, a first of the dividers-by-two being a master-slave divider for receiving two input signals in phase opposition and supplying four phase-shifted signals phase shifted by 90Â° in relation to each other, a phase selector unit, inserted between said first and a second of the dividers-by-two, for receiving the four phase shifted signals from the first of the two dividers-by-two which is the master-slave divider, and supplying one of the four phase shifted signals to the second of the two dividers-by-two, said chase selector unit including a first selection branch receiving two first ones of the four phase shifted signals, a second selection branch receiving two second ones of the four phase shifted signals, and a selection element connected to each branch, first control signals being supplied to the first and second selection branches, and to the selection element so that said phase selector unit supplies a selected one of the four phase shifted signals at one output of the phase selector unit in a division period determined as a function of a selected one of said first and second modes, and a control unit for supplying said first control signals to the phase selector unit, said control unit receiving an output signal, from one of the dividers-by-two, to clock operations in the control unit, and a signal for selecting one of said modes, wherein the chase selector unit includes switching means, controlled by second control signals supplied by the control unit, for disconnecting an electric power supply of one of the selection branches in a period when the other of the selection branches is selected to supply one of the four phase shifted signals at the output of the phase selector unit.