Patent ID: 7084072
Filing Date: 2006-08-01
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising the steps of: i) forming a gate in a cell region and a peripheral region formed on a silicon substrate, respectively; ii) depositing a buffer oxide layer on the gate and the silicon substrate; iii) annealing a resultant structure of the silicon substrate by using NH iv) depositing a nitride spacer layer on the buffer oxide layer; v) depositing an oxide spacer layer on the nitride spacer layer; vi) forming an oxide spacer at the peripheral region of the silicon substrate by etching an entire surface of the oxide spacer layer while masking the cell region of the silicon substrate; and vii) removing the oxide spacer layer remaining in the cell region through a wet dip process by using the nitride spacer layer as an etch barrier while masking the peripheral region of the silicon substrate.