Patent ID: 6407814
Filing Date: 2002-06-18
Classification: G03F,G05B

Abstract:
A correction device for correcting alignment,said correction device being used in a manufacturing system for manufacturing a semiconductor device onto each of plural wafers successively supplied, said manufacturing system including: steppers to which stepper correction values are set to eliminate shift amounts between a plurality of patterns being stacked-on said semiconductor device; and an overlay checking device for detecting said shift amounts between said plurality of patterns and forming overlay checking correction values for eliminating said detected shift amounts, and said correction device being configured to generate said stepper correction values being set by said manufacturing system, wherein said manufacturing system manages lower patterns respectively corresponding to said plurality of patterns, said correction device comprising: (a) an element configured to manage travels from a reference position to positions of said plurality of patterns by said manufacturing system; and. (b) an element configured to generate a value including one of said travels of a lower pattern corresponding to a pattern to be aligned in a next alignment as one of said stepper correction values to determine a position of said pattern to be aligned by said manufacturing system, wherein said element (a) further comprises: (a-1) an element configured to calculate and store a step-travel for each of said plurality of patterns by said manufacturing system, said step-travel being defined as corresponding one of said overlay checking correction values subtracted by corresponding one of said stepper correction values and added with one of said travels of corresponding lower pattern, and said element (b) further comprises: (b-1) an element configured to generate a value as said one of said stepper correction values by subtracting, from said one-of said travels of said lower pattern corresponding to said pattern-to be aligned-in said next alignment, one of said step-travels or a trend thereof calculated for a corresponding pattern having already been aligned onto another at least one wafer than a wafer to be subjected to said next alignment by using the same stepper as that to be used in said next alignment.