Patent ID: 7061054
Filing Date: 2006-06-13
Classification: H01L,Y10S

Abstract:
1. A semiconductor device comprising: an insulating film provided on a support substrate; a first semiconductor layer provided on the insulating film; a first memory cell transistor constituting a part of a memory cell in an SRAM, having a first gate electrode of a first conductivity type on a gate insulating film on the first semiconductor layer and first source/drain diffusion layers of a second conductivity type opposite to the first conductivity type which sandwich a region under the first gate electrode in the first semiconductor layer, and fulfilling an expression such as the thickness of the first semiconductor layer≦one-third of a length of the first gate electrode in its channel length direction; a second semiconductor layer provided on the insulating film; and a first peripheral transistor constituting a part of a peripheral circuit, having a third gate electrode on a gate insulating film on the second semiconductor layer and third source/drain diffusion layers which sandwich a region under the third gate electrode in the second semiconductor layer, and fulfilling an expression such as the thickness of the second semiconductor layer>one-third of a length of the third gate electrode in its channel length direction.