Patent ID: 6664172
Filing Date: 2003-12-16
Classification: H01L

Abstract:
A method of making a plurality of metal-oxide-semiconductor (NOS) transistors on a semiconductor substrate, the method comprising:forming a gate oxide layer and a polysilicon layer in that order on a surface of the semiconductor substrate; forming a first photoresist layer on the surface of the polysilicon layer and performing a first photolithography process to define the site for at least one gate; performing a first etching process by utilizing the first photoresist layer as a mask to remove the polysilicon layer and the gate oxide layer not covered by the first photoresist layer and form the gate of at least one transistor; removing the first photoresist layer; performing a first ion implantation process by utilizing the gate as a mask to forms lightly doped drain (LDD) in the semiconductor substrate at either side of the gate; forming a silicon nitride layer (Si3N4 layer) on the surface of the gate and the semiconductor substrate by performing a low thermal budget process; performing a second ion implantation process to dope fluorine (F) atoms into the silicon nitride layer; etching the silicon nitride layer to form a spacer in the periphery of the gate; and performing a third ion implantation process by utilizing the gate and the spacer as a mask to form a source/drain (S/D) in the semiconductor substrate at either side of the gate.