Patent ID: 7746252
Filing Date: 2010-06-29
Classification: H03M

Abstract:
1. An analog front-end circuit comprising: an analog processing circuit that receives an input image signal from an image sensor, performs a given process on the input image signal, and outputs an image signal; an A/D converter that A/D-converts the image signal input from the analog processing circuit and outputs an A/D converted value; a target register, a lower limit target value of an input range of the image signal input from the analog processing circuit to the A/D converter being set in the target register; and a calculation circuit that monitors the A/D-converted value output from the A/D converter and performs a calculation process, the analog processing circuit including an offset control circuit that includes an offset control register and performs offset control on the input image signal to output the image signal based on an offset control value set in the offset control register; and the calculation circuit monitoring the A/D-converted value in a lower limit value output period when the A/D-converted value corresponding to a lower limit value of the input range is output from the A/D converter, and performing an offset setting process that sets the offset control value in the offset control register, the offset control value causing the A/D-converted value to become closer to the lower limit target value set in the target register, the calculation circuit specifying the lower limit value output period based on an indication signal that designates the lower limit value output period and monitoring the A/D-converted value in the lower limit value output period specified by the indication signal.