Patent ID: 7940832
Filing Date: 2011-05-10
Classification: H03M,H04J

Abstract:
1. A communication method, comprising: multiplying, in a multiplier, a first data symbol of a first block of data within Random Access Memory (RAM) associated with a first channel of a plurality of channels each having a block of data for transmission; multiplying a second data symbol of said first block of data within Random Access Memory (RAM) associated with said first channel and multiplying a first data symbol of a second block of data associated with a second channel of said plurality of channels; and combining a first multiplied data symbol of said first block of data and a first multiplied data symbol of said second block of data to produce a first multiplied-combined data symbol of said first and second channels, wherein multiplying of said first data symbol of said second channel is delayed by at least one chip time from multiplying of said first data of said first block of data.