Patent ID: 8258517
Filing Date: 2012-09-04
Classification: H01L

Abstract:
1. A semiconductor device comprising: a lower level device layer located over a semiconductor substrate, the lower level device layer including a plurality of devices formed in the substrate; an interlayer insulating film located over the lower level device layer; and an upper level device layer located over the interlayer insulating film, the upper level device layer including a plurality of semiconductor patterns and at least one device formed in each of the plurality of semiconductor patterns, wherein the plurality of semiconductor patterns are isolated from each other, wherein each of the plurality of semiconductor patterns comprises: wherein each of the plurality of semiconductor patterns further comprises: wherein the at least one connector portion electrically connects the at least one active portion and the at least one body contact portion to each other, and wherein the at least one active portion, the at least one body contact portion and the at least one connector portion are doped with a dopant having the same conductivity type.