Patent ID: 6268621
Filing Date: 2001-07-31
Classification: H01L

Abstract:
A vertical channel field effect transistor disposed on a surface of a substrate, said vertical channel field effect transistor comprising:an epitaxial silicon stack comprising:(i) a bottom terminal disposed on said substrate surface, said bottom terminal comprising heavily doped silicon of a first doping type;(ii) a channel disposed on said bottom terminal, said channel comprising lightly doped silicon of opposite doping type from said first doping type; and(iii) a top terminal disposed on said channel, said top terminal comprising heavily doped silicon of said first doping type;a gate dielectric layer covering:(i) a portion of said bottom terminal;(ii) said channel, and(iii) said top terminal; anda gate in contact with said dielectric layer and overlapping:(i) a portion of said bottom terminal;(ii) said channel; and(iii) a portion of said top terminal,wherein said channel has a thickness between said bottom terminal and said top terminal from about 50 angstroms to about 800 angstroms.