Patent ID: 6423645
Filing Date: 2002-07-23
Classification: H01L,Y10S

Abstract:
A method for forming a self-aligned contact, comprising the following steps:forming a transistor on a semiconductor substrate; depositing an etching stopper layer on the surface of said semiconductor substrate, therein, said etching stopper layer is covered on the surface of said transistor; removing part of said etching stopper layer by an anisotropic etching process and forming a gate protection film on the surface of the gate electrode of said transistor; depositing a dielectric layer on the surface on said semiconductor substrate; and selectively etching the dielectric layer to form a contact hole for exposing the source/drain region of said transistor; therein, said etching stopper layer is formed of amorphous SiC or HexaChloroDisilane-SiN (Si2Cl6â€”SiN).