Patent ID: 6528418
Filing Date: 2003-03-04
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device comprises:providing a semiconductor substrate comprising a field region and an active region; forming field oxide layer in field region of the semiconductor substrate and a MOSFET in the active region of the semiconductor substrate, the MOSFET comprising a gate electrode that comprises a sidewall and an upper portion; forming a mask insulating film pattern on the upper portion of the gate electrode and on the sidewall of the gate electrode; forming a stack structure comprising a low dielectric release insulating film pattern on the mask insulating film and a hard mask layer on the low dielectric release insulating film; forming an interlayer insulating film on the hard mask layer and etching the interlayer insulating film and the hard mask layer, thereby exposing the low dielectric release insulating film pattern; removing the exposed low dielectric release insulating film pattern; forming a conductive layer for a contact plug on the entire surface of the substrate; and forming a contact plug by planarization etching process using the mask insulating film pattern as an etch barrier.