Patent ID: 6591492
Filing Date: 2003-07-15
Classification: H01L,Y10T

Abstract:
A method of forming interconnection between two integrated circuit structures, the method comprising:forming a first conductive contact on a first surface of a first semiconductor structure and a second conductive contact on a second surface of a second semiconductor structure; forming a first connecting member on the first conductive contact in a manner such that a distal end of the first connecting member extends from the first surface of the first chip along a first axis; positioning the semiconductor chips in a manner such that the plane defining the first surface intersects with plane the defining the second surface; affixing a second connecting member to the distal end of the first connecting member; joining the second connecting member to the second conductive contact in a manner such that the second connecting member is interposed between the distal end of the first connecting member and the second surface of the second structure and forms a bond therebetween along a second axis, wherein the second axis is not parallel to the first axis.