Patent ID: 6774429
Filing Date: 2004-08-10
Classification: H01L

Abstract:
A semiconductor memory device comprising a memory circuit and a logic circuit that are formed on a single semiconductor substrate, wherein the memory circuit includes;a storage element having a memory gate structure, the memory gate structure including: a tunnel insulating film formed on the substrate; and a control gate electrode formed out of a gate prototype film formed over the tunnel insulating film, a first passivation film formed on the upper surface of the control gate electrode, source/drain regions defined in parts of the substrate that are located beside the memory gate structure, a first sidewall insulating film formed on the side faces of the control gate electrode, and contact pads formed on the source/drain regions, and wherein the logic circuit includes a logical element having a logic gate structure, the logic gate structure including: a gate insulating film formed on the substrate, a lower gate electrode formed out of the gate prototype film formed over the gate insulating film; and an upper gate electrode formed out of a metal film on the lower gate electrode, wherein the control gate electrode includes no metal film, and wherein the contact pads are formed out of the same metal film for the upper gate electrode.