Patent ID: 7994001
Filing Date: 2011-08-09
Classification: H01L

Abstract:
1. A fabrication method of a trenched power semiconductor structure with a schottky diode comprising the steps of: a) providing a drain region; b) forming at least two gate structures above the drain region, and forming a body and at least a source region between the two neighboring gate structures; c) forming a first dielectric structure covering the gate structure; d) by using the first dielectric structure as an etching mask, forming a contact window with a sidewall adjacent to the source region; e) forming a second dielectric structure in the contact window, and the second dielectric structure defining at least an opening to expose a portion of a bottom of the contact window; f) etching the body through the second dielectric structure to form a narrow trench extending to the drain region below the body, and a width of the narrow trench being smaller than that of the contact window; and g) filling the contact window and the narrow trench with a metal layer to form the schottky diode at an interface between the metal layer and the drain region.