Patent ID: 8498305
Filing Date: 2013-07-30
Classification: H04L,H04W

Abstract:
1. An apparatus comprising: an input circuit configured to receive packets; a control circuit configured to enable aggregation when a rate at which the input circuit receives the packets is greater than a predetermined rate; a queue configured to store the packets from the input circuit when aggregation is enabled; an aggregation circuit configured to generate aggregate packets when aggregation is enabled, wherein the aggregation circuit is configured to generate each of the aggregate packets by aggregating at least one of the packets stored in the queue; and an output circuit configured to receive (i) the aggregate packets when aggregation is enabled and (ii) the packets from the input circuit when aggregation is disabled, wherein the aggregation circuit is configured to generate the aggregate packets in response to receiving a signal from a wireless transmitter, and wherein the signal indicates that a level of data queued by the wireless transmitter is less than a predetermined threshold.