Patent ID: 6610571
Filing Date: 2003-08-26
Classification: H01L

Abstract:
A method of creating a gate electrode, comprising the steps of:providing a substrate, active surface regions having been defined in the surface of the substrate; creating a layer of gate oxide over the surface of the substrate; depositing a layer of gate material over the surface of the substrate; creating a gate electrode structure; creating a layer of liner oxide over the surface of said substrate, including sidewalls and the surface of said gate electrode; depositing a layer of gate spacer material over the surface of said layer of liner oxide; creating gate spacers over sidewalls of said gate electrode, thereby removing said layer of liner oxide from the surface of from sidewalls of said gate electrode where said layer of liner oxide is not covered with said gate spacers, exposing first surfaces of said layer of liner oxide where said liner oxide is interposed between said layer of gate material and said gate spacers and where said liner oxide is furthest removed from the surface of said substrate, further exposing a second surface of said layer of liner oxide where said layer of liner oxide overlies the surface of said substrate; performing nitridation of said exposed first and second surfaces of said layer of liner oxide, creating a layer of silicon-oxy-nitride overlying the surface and exposed sidewalls of said gate electrode, further overlying said gate spacers and said exposed first and second surfaces of said layer of liner oxide; removing said layer of silicon oxy-nitride; and saliciding contact points to said gate electrode.