Patent ID: 8441122
Filing Date: 2013-05-14
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor chip including a semiconductor element, wherein the semiconductor chip further includes a first region and a second region, and has a first surface and a second surface; a surface electrode disposed on the first surface of the semiconductor chip and electrically coupled with the first region of the semiconductor chip; a first metal wiring disposed on the first surface of the semiconductor chip and electrically coupled with the second region of the semiconductor chip, wherein the first metal wiring controls a potential to be applied to the second region; a metal layer disposed on the surface electrode; a first protection film covering the first metal wiring; a metal plate covering at least a part of the surface electrode and a part of the first metal wiring and electrically coupling with the metal layer and the surface electrode via a solder layer, wherein the solder layer is disposed on the metal layer; and a solder penetration prevention member disposed on the first protection film, which is covered with the metal plate, wherein the semiconductor chip, the surface electrode, the first metal wiring and the metal plate are packaged, and wherein the solder penetration prevention member is sandwiched between the metal plate and the first protection film.