Patent ID: 7112822
Filing Date: 2006-09-26
Classification: H01L

Abstract:
1. A semiconductor device comprising: a supporting substrate including a first region and a second region, the second region having a top surface lower than a top surface of the first region; a buried oxide layer formed on the first region of the supporting substrate; a semiconductor layer formed on the buried oxide layer; a first element formed in the semiconductor layer; an epitaxial layer formed on the second region of the supporting substrate, an interface between the epitaxial layer and the supporting substrate being set in a portion which lies deeper than the buried oxide layer; a second element formed in the epitaxial layer, the second element having an active region which lies shallower than the interface between the supporting substrate and the epitaxial layer; and a first element isolation region interposed between the epitaxial layer and the semiconductor layer, the first element isolation region being formed from an upper surface of the semiconductor layer at least up to a portion where the buried oxide layer is formed, the first element isolation region and the buried oxide layer allowing the semiconductor layer to be electrically insulated from the epitaxial layer and the supporting substrate.