Patent ID: 8159400
Filing Date: 2012-04-17
Classification: H01Q

Abstract:
1. A chip antenna, comprising: a dielectric block having opposing top and bottom surfaces and a plurality of side surfaces connecting the top and bottom surfaces; a first conductive pattern formed on at least one of the surfaces of the dielectric block and connected to an external feeding part; a second conductive pattern formed on at least one of the surfaces of the dielectric block, connected to the first conductive pattern, and having one end connected to an external ground part; and a third conductive pattern formed on at least one of the surfaces of the dielectric block, and spaced apart from the first and second conductive patterns at a predetermined distance to be capacitively coupled to the first and second conductive patterns, respectively, the third conductive pattern having a lower end connected to the external ground part; wherein the dielectric block is shaped as a rectangular parallelepiped, the first and second conductive patterns define a radiator, and the radiator is formed across a first side surface parallel to a longitudinal direction of the dielectric block, the top surface, and a second side surface opposing the first side surface of the dielectric block.