Patent ID: 8624401
Filing Date: 2014-01-07
Classification: H01L

Abstract:
1. A device comprising: a semiconductor substrate including first and second main surfaces opposite to each other; a first penetration electrode penetrating through the semiconductor substrate; a plurality of second penetration electrodes each penetrating through the semiconductor substrate; a first terminal formed on a side of the first main surface of the semiconductor substrate, the first terminal being vertically aligned with and electrically connected to the first penetration electrode; a plurality of second terminals formed on a side of the first main surface of the semiconductor substrate, each of the second terminals being vertically aligned with an associated one of the second penetration electrodes and electrically connected to another one of the second penetration electrodes that is not vertically aligned with the associated one of the second penetration electrodes; a third terminal formed on a side of the second main surface of the semiconductor substrate, the third terminal being vertically aligned with and electrically connected to the first penetration electrode; a plurality of fourth terminals formed on a side of the second main surface of the semiconductor substrate, each of the fourth terminals being vertically aligned with and electrically connected to an associated one of the second penetration electrodes; and a conductive line formed on a side of the first main surface of the semiconductor substrate, the conductive line including a first end portion electrically connected to the first terminal and a second end portion electrically connected to one of the second terminals.