Patent ID: 6150211
Filing Date: 2000-11-21
Classification: H01L

Abstract:
A method of forming a capacitor comprising:forming a semiconductive material layer over a first insulating layer;forming a gate over the semiconductive material layer;forming a source/drain diffusion region within the semiconductive material layer and operatively associated with the gate;forming a sidewall spacer operatively associated with the gate and over the source/drain diffusion region;forming a second insulating layer over the gate, sidewall spacer, and semiconductive material layer, the second insulating layer having a generally planar outer surface at an elevational level higher than any structure of the gate;etching a capacitor opening completely through the second insulating layer, exposing at least a portion of the sidewall spacer, and into the source/drain diffusion region of the semiconductive material layer; andforming a capacitor within the capacitor opening having conductive material laterally adjacent and in electrical contact with the source/drain diffusion region.