Patent ID: 6756834
Filing Date: 2004-06-29
Classification: H01L,H03K

Abstract:
An electro-static-discharge (ESD) protected integrated circuit comprising:first core circuitry connected between a first power bus connected to a first power pad and a first ground bus connected to a first ground pad; second circuitry connected between a second power bus connected to a second power pad and a second ground bus connected to a second ground pad; a common-discharge line that is not directly connected to power or ground; a plurality of indirect ESD-protection devices coupled to the common-discharge line, each indirect ESD-protection device coupled to conduct ESD current between a pad and the common-discharge line; and a first direct ESD clamp between the first power bus and the first ground bus, for bypassing the common-discharge line and directly conducting ESD current from the first power bus to the first ground bus when an ESD pulse is applied between the first power pad and the first ground pad, whereby ESD current is conducted through two of the plurality of indirect ESD-protection devices and the common-discharge line, or bypassing the common-discharge line through the first direct ESD clamp.