Patent ID: 7764126
Filing Date: 2010-07-27
Classification: G06F,H03L

Abstract:
1. A clock signal generation circuit, comprising: an oscillating circuit configured to output a clock signal having a clock frequency corresponding to a control signal; a counter configured to generate a count value by counting a pulse number of the clock signal outputted from the oscillating circuit during a predetermined time period; a subtracting circuit configured to produce differential data by subtracting the count value from a preset value previously set based on a predetermined clock frequency; a control signal correcting circuit configured to generate a correcting control signal by correcting a value of the control signal based on the differential data; a digital-analog converter circuit configured to convert the correcting control signal into an analog correcting control signal and output the converted analog correcting control signal to the oscillating circuit; a timing control circuit for controlling count operation of the counter, wherein the counter counts the pulse number of the clock signal within the predetermined time period in accordance with control of the timing control circuit; and a switch connected between the oscillating circuit and the counter, wherein the switch is configured to be on/off-controlled based on a timing signal outputted from the timing control circuit and output the clock signal inputted during an ON-state of the switch to the counter.