Patent ID: 7696040
Filing Date: 2010-04-13
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor structure comprising: forming a hard mask over a portion of semiconductor surface of a substrate; implanting an exposed portion of the semiconductor surface to provide a doped semiconductor surface; forming a semiconductor layer over the doped semiconductor surface, in which an upper surface of the semiconductor layer is substantially coplanar with the upper surface of the hard mask; patterning the semiconductor layer and the doped semiconductor surface to provide a storage node having a first height and patterning the hard mask and the semiconductor surface that is underlying the hard mask to provide a finFET structure having a second height, wherein the first height is greater than the second height, wherein the hard mask of the finFET structure is in direct contract with the semiconductor layer of the storage node and the doped semiconductor surface of the storage node is in direct contact with the semiconductor surface of the finFET structure that is underlying the hard mask; forming a dielectric layer over the storage node and the finFET structure; and forming a gate structure on the dielectric layer that is on the finFET structure and a capacitor plate on the dielectric layer that is on the storage node.