Patent ID: 9014326
Filing Date: 2015-04-21
Classification: G09G,G11C,H03K

Abstract:
1. A flip-flop comprising: a first transistor which is a P channel transistor; a second transistor which is an N channel transistor; a third transistor which is a P channel transistor; a fourth transistor which is an N channel transistor; a plurality of input terminals; a first output terminal; a second output terminal; and an input transistor, wherein the first transistor and the second transistor constitute a first CMOS circuit such that gate terminals of the first and second transistors are connected to each other and drain terminals of the first and second transistors are connected to each other, the third transistor and the fourth transistor constitute a second CMOS circuit such that gate terminals of the third and fourth transistors are connected to each other and drain terminals of the third and fourth transistors are connected to each other, the first output terminal is connected to a gate side of the first CMOS circuit and a drain side of the second CMOS circuit, the second output terminal is connected to a gate side of the second CMOS circuit and a drain side of the first CMOS circuit, the plurality of input terminals receive respective signals each of which has a temporal change, and a gate terminal of the input transistor is connected to one of the plurality of input terminals and a source terminal of the input transistor is connected to another one of the plurality of input terminals.