Patent ID: 6828836
Filing Date: 2004-12-07
Classification: H02M,H03K

Abstract:
An apparatus for adjusting a pulse width of a control signal, comprising:a first comparator circuit that is arranged to provide a start signal in response to a ramp signal and a ramp reference level; a second comparator circuit that is arranged to provide a stop signal in response to a feedback signal and the ramp signal, wherein the feedback signal is related to the pulse width of the control signal; a first memory circuit that is arranged to provide a memory clock signal such that the memory clock signal is: asserted in response to the start signal and de-asserted in response to a clock signal; a second memory circuit that is arranged to adjust the control signal such that the control signal is: de-asserted when a reset signal is asserted, and asserted in response to the memory clock signal when the reset signal is de-asserted; a logic circuit that is arranged to adjust the reset signal such that the reset signal is asserted when the start and stop signals are both asserted; and a feedback circuit that is arranged to provide the feedback signal, wherein the feedback signal is related to the control signal.