Patent ID: 7352024
Filing Date: 2008-04-01
Classification: B82Y,G11C,H01L

Abstract:
1. A semiconductor storage device characterized in that: on a top surface of a semiconductor substrate, device isolation regions each extending in one direction are formed so as to be arrayed with respect to a direction perpendicular to the one direction, and active regions each extending in the one direction are defined between neighboring ones of the device isolation regions, respectively; dopant diffusion regions each serving as a source region or drain region are formed within the active regions, and channel regions are defined between neighboring ones of the dopant diffusion regions within identical active regions, respectively; on the semiconductor substrate, word lines extending in intersection with the one direction are provided so as to run on the channel regions provided within the active regions; and on the semiconductor substrate, a plurality of bit lines extending in the one direction are provided so as to run on the dopant diffusion regions, and are also connected to some of the dopant diffusion regions present thereunder via contact holes, respectively, and wherein each of the plurality of bit lines passes over adjacent dopant diffusion regions and is connected only to alternate ones of the adjacent dopant diffusion regions present thereunder via contact holes, respectively, the contact holes of one bit line being offset from the contact holes of adjacent bit lines in the one direction; and plate electrodes extending beneath bit lines and parallel to the word lines are connected to dopant diffusion regions to which the plurality of bit lines are not connected, and wherein a film having memory function is present on a side wall of a gate electrode forming part of one of the word lines.