Patent ID: 9071248
Filing Date: 2015-06-30
Classification: H03K

Abstract:
1. A first circuit having an active mode and a sleep mode, comprising: a power transistor having a first current electrode coupled to a first power supply terminal, a second current electrode as an output of the first circuit for coupling to a load, and a control electrode, wherein the power transistor is characterized by having a threshold voltage and a leakage current, wherein the leakage current occurs between the control electrode and the first current electrode during the sleep mode; an amplifier having an output coupled to the control electrode of the power transistor that provides an active output during the active mode; and a protection circuit coupled to the control electrode of the power transistor, wherein the protection circuit detects the leakage current and prevents the leakage current from developing a first voltage on the control electrode of the power transistor that exceeds the threshold voltage of the power transistor, wherein the protection circuit prevents the leakage current from developing the first voltage by providing a current path to pull down a voltage on the control electrode of the power transistor.