Patent ID: 7882287
Filing Date: 2011-02-01
Classification: G06F,H04N

Abstract:
1. A peripheral device capable of being connected to a data processing device, the peripheral device comprising: an internal memory receiving portion receiving an internal memory; at least one external memory receiving portion, each of which is capable of receiving one type of external memory, the one type of external memory including at least one kind of external memory receivable by the corresponding external memory receiving portion; a mode setting portion setting either one of an automatic switching mode and a multi-drive mode; an association storage portion that stores data of association between the internal memory and the at least one external memory and a plurality of logical units, at least one of the internal memory and the at least one type of external memory being associated to each of at least one logical unit among the plurality of logical units, the at least one logical unit including a predetermined one logical unit; and a logical unit-assigning portion that assigns, during the automatic switching mode, the predetermined logical unit to one memory that is associated with the predetermined logical unit, the one memory being either one of the internal memory and one external memory presently received in one of the at least one external memory receiving portion, the data processing device accessing the one memory by indicating the predetermined logical unit, the logical unit-assigning portion assigning, during the multi-drive mode, the at least one logical unit to at least one memory in one-to-one correspondence with each other, each logical unit being assigned to one memory that is associated with the subject logical unit, the one memory being either one of the internal memory and the external memory, the data processing device accessing individually the at least one memory by indicating the at least one logical unit, and when the association stored in the association storage portion indicates that the internal memory and at least one external memory are associated with one logical unit, the logical unit-assigning portion assigns the subject logical unit to the internal memory when no external memory is received in the external memory receiving portion.