Patent ID: 6064600
Filing Date: 2000-05-16
Classification: G11C

Abstract:
A device for transmitting register data to external data terminals of a memory device, the memory device operable to output a first plurality of data bits from a memory array to the external terminals responsive to a first addressing signal, comprising:a register operable to store a second plurality of data bits and to output the second plurality of bits responsive to a second addressing signal;a coupling circuit coupled to the register to receive the second plurality of data bits, the coupling circuit operable to output a third plurality of bits corresponding to the second plurality of bits responsive to an enabling signal; anda data path circuit coupled to the memory array to receive the first plurality of data bits, to the coupling circuit to receive the third plurality of data bits, and to the external terminals, the data path circuit operable to transmit the data bits received to the external terminals of the memory device.