Patent ID: 7109787
Filing Date: 2006-09-19
Classification: H03D,H04L

Abstract:
1. A demodulation circuit for demodulating a received signal comprising carriers in quadrature modulated by digital signals and/or two carriers in quadrature, the demodulation circuit comprising: a demodulator for demodulating the received carriers in quadrature and providing first signals substantially in baseband, an analog-to-digital converting means coupled to the demodulator for providing second signals based on the first signals, a correcting circuit for correcting quadrature and gain error between the second signals coupled to the analog-to-digital converter for providing third signals, and a derotator coupled to the correcting circuit for providing output signals based on the third signals, the correcting circuit providing the third signals based on the second signals and on the output signals; a decision unit receiving the output signals and providing fourth signals assumed to correspond to non-erroneous output signals, a first adder receiving the output signals and the fourth signals and providing fifth signals corresponding to the differences between output signals and the fourth signals, a first calculation unit coupled to the decision unit and to the first adder and providing a linear combination of the fourth and fifth signals, and a rotation unit for rotating the signals provided by the first calculation unit.