Patent ID: 6235625
Filing Date: 2001-05-22
Classification: H01L

Abstract:
A method of fabricating a copper (Cu) dual damascene, the method comprises steps of:providing a substrate;forming a dielectric layer to cover the substrate;forming a trench line in the dielectric layer;forming a via in the dielectric layer, wherein the via is located below the trench line;forming a barrier layer to conformally cover the trench line, the via, and the dielectric layer;forming an amorphous silicon layer to cover the barrier layer;forming a photoresist layer to cover the amorphous silicon layer and to fill the trench line and the via;removing the photoresist layer and the amorphous silicon layer covering a top surface of the barrier layer;removing the photoresist layer in the trench line and the via, so that only the amorphous silicon layer and the barrier layer remain in the trench line and the via;performing a Cu displacement process to displace the amorphous silicon layer with a first Cu layer;forming a second Cu layer to fill the trench line and the via; andremoving the barrier layer which cover a top surface of the dielectric layer.