Patent ID: 6078195
Filing Date: 2000-06-20
Classification: G06F,H03K

Abstract:
Logic books with mixed low V.sub.t and regular V.sub.t devices to provide a performance gain without a large increase in stand-by power wherein,in a path between V.sub.dd and ground, there must be at least one regular V.sub.t device serving as high resistance to reduce the leakage current and the low V.sub.t devices become reversely biased in their standby states so as to reduce its leakage current effectively, andwherein in a path between V.sub.dd and an output there must be at least one said regular V.sub.t device, wherein said low V.sub.t devices are connected to a node closest to the output, andwherein in a path between the output and ground there must be at least one said regular V.sub.t device, andwherein said regular V.sub.t devices are connected to V.sub.dd.