Patent ID: 6291332
Filing Date: 2001-09-18
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:providing a semiconductor substrate with a dielectric layer formed thereon, wherein the dielectric layer overlays a region on the semiconductor substrate;forming an opening in the dielectric layer, the opening defined by walls of the dielectric layer;forming a seed layer over the dielectric layer and in the opening, including along the walls, the seed layer formed to a thickness insufficient to fill the opening;forming a resist over the seed layer, the resist formed to a thickness sufficient to fill the opening;removing the resist outside the opening;removing the seed layer outside the opening whereby the opening containing the resist retains the seed layer;removing the resist inside the opening; andforming a layer of conductive material in contact with the seed layer inside the opening by electroless plating, the conductive material deposited to a thickness sufficient to fill the opening.