Patent ID: 7851894
Filing Date: 2010-12-14
Classification: H01L

Abstract:
1. A semiconductor package comprising: a first substrate having a plurality of metal traces; at least one die electrically coupled to a first surface of the first substrate; a plurality of land pads formed on the first surface of the first substrate; a mold compound encapsulating portions of the die and portions of the first surface of the substrate; a conductive coating applied to the mold compound and electrically coupled to at least one metal trace; a non-conductive coating formed over the conductive coating and portions of the mold compound; a plurality of vias, wherein each of the plurality of vias is formed through both the non-conductive coating and the mold compound and exposes one of the land pads; and a plurality of contacts, wherein an individual contact is formed on each of the lad pads and positioned in a bottom section of each of the plurality of vias, wherein a top area of each of the plurality of vias below the non-conductive coating remains open for electrically attaching a top semiconductor package to each of the plurality of contacts.