Patent ID: 6621356
Filing Date: 2003-09-16
Classification: H03L

Abstract:
A phase-locked loop, comprising:a voltage-controlled oscillator for generating an oscillator signal having a frequency; a controllable charge pump having an output connected to said voltage-controlled oscillator; a phase comparator having an output connected to said controllable charge pump; a first frequency divider which, during a transient recovery duration, generates a first divider output signal by dividing the frequency of the oscillator signal and provides the first divider output signal to said phase comparator, the first divider output signal having a frequency; a unit which, after the transient recovery duration, divides the frequency of the first divider output signal to obtain a divided first divider output signal and provides the divided first divider output signal to said phase comparator; and an accumulator for holding a value, said first frequency divider connected to said accumulator; said first frequency divider depending on the value held in said accumulator, dividing the frequency of the oscillator signal by a value selected from the group consisting of a first value and a second value; said phase comparator comparing the first divider output signal with a first reference signal during the transient recovery duration; and said phase comparator comparing the divided first divider output signal with a second reference signal after the transient recovery duration.