Patent ID: 8133785
Filing Date: 2012-03-13
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device which comprises buried gate electrodes formed in a pair of trenches in a substrate, a base region formed in a predetermined region of said substrate located between said pair of trenches, and a source region formed over said base region, said method comprising: a first step of forming said pair of trenches in a stripe pattern in said substrate, and forming a gate insulating layer and a polysilicon layer over an entire surface so as to fill said trenches; a second step of etching an entire surface of said polysilicon layer so far as to remove upper portions thereof buried in said trenches to respectively form a buried gate electrode in each of said respective trenches so that a top surface of said substrate located between said pair of trenches and exposed side wall surfaces of said substrate at side walls of said trenches located above said gate electrode are exposed; a third step of obliquely implanting a first impurity to said top surface, side wall surfaces and said buried gate electrode to form a base region in an upper portion of said substrate, by rotational implantation which allows implantation in an oblique direction inclined away from a normal line which stands on said substrate, to thereby form said base region having a downwardly recessed profile; a fourth step of obliquely implanting a second impurity to said top surface, side wall surfaces and said buried gate electrode to form a source region in an upper portion of said base region, by rotational implantation, to thereby form said source region having a backwardly recessed profile; and a fifth step of forming a buried insulating interlayer over said buried gate electrode after said fourth step.