Patent ID: 6521993
Filing Date: 2003-02-18
Classification: G11C,H01L,H05K

Abstract:
A semiconductor memory module comprising:(a) a substrate having a plurality of wirings, a terminal, a first surface and a second surface opposite to said first surface; (b) a first device disposed on said first surface of said substrate, said first device having a first semiconductor memory chip and first leads electrically connected to said first semiconductor memory chip; (c) a second device disposed on said second surface of said substrate, said second device having a second semiconductor memory chip and second leads electrically connected to said second semiconductor memory chip, said first leads of said first device and said second leads of said second device each including leads electrically connected to each other through said plurality of wirings; and (d) a third device disposed on said first surface of said substrate; wherein a predetermined signal inputted in said terminal of said substrate is inputted to said first device through said third device, and wherein said first and second devices are positioned on respective said first and second surfaces such that they are symmetrical with regard to said substrate.