Patent ID: 8367496
Filing Date: 2013-02-05
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: forming a high dielectric constant (high-k) dielectric layer having a dielectric constant greater than 7.5 on a semiconductor substrate; forming a stack including, from bottom to top, a lower metal layer, a scavenging metal layer, and an upper metal layer, wherein said scavenging metal layer includes a metal (M) for which the Gibbs free energy change of a chemical reaction, in which a silicon atom combines with a metal oxide material including said metal and oxygen to form said metal in elemental form and silicon oxide, is positive, and wherein Gibbs free energy per oxygen atom for formation of an oxide for said metal is equal to or more negative than Gibbs free energy per oxygen atom for formation of an oxide of a first elemental metal within a first metallic compound in said lower metal layer and is equal to or more negative than Gibbs free energy per oxygen atom for formation of an oxide of a second elemental metal within a second metallic compound in said upper metal, wherein at least one of said first metallic compound and said second metallic compound is a conductive transition metal carbide; and forming a gate electrode and a gate dielectric, wherein said gate electrode is formed by patterning said stack, and wherein said gate dielectric includes a portion of said high-k dielectric layer.