Patent ID: 8628989
Filing Date: 2014-01-14
Classification: H01L

Abstract:
1. A method for forming a semiconductor structure, the method comprising: forming a substrate fin on a semiconductor substrate, the substrate fin being integral to the semiconductor substrate, the substrate fin having a width and a length at a base, the semiconductor substrate comprising a first crystalline semiconductor material; forming a dielectric layer on the semiconductor substrate; planarizing a top surface of the dielectric layer and the substrate fin; removing at least a portion of the substrate fin to define a trench, the trench having a height, the height of the trench being equal to or greater than half of the width of the substrate fin; forming, in the trench, a second material layer comprising a second crystalline semiconductor material having a lattice mismatch with the first crystalline semiconductor material, a majority of dislocation defects in the second crystalline semiconductor material terminating within the trench; removing a portion of the dielectric layer to expose a side portion of the second material layer; and defining a gate over the second material layer.