Patent ID: 6789138
Filing Date: 2004-09-07
Classification: G06F,H04L

Abstract:
A computer peripheral apparatus, comprising:a central processing unit; a plurality of interface units of different types including controllers which control data transfer between a computer and the central processing unit; a plurality of controlling devices, one of which mutually transfers signals between the central processing unit and one of the plurality of interface units; and an identifying device which identifies a type of one of the controllers by a valid return value, and which operates the central processing unit by using one of the plurality of controlling devices that corresponds to the one of the controllers, the return value for a region in a memory space of the central processing unit is determined to be valid when the central processing unit writes data at an address located in the region of the memory space, the address coincides with one of the addresses assigned to separate registers located in the controller of a connected one of the plurality of interface units, and the controllers of the plurality of interface units are assigned to respective ones of the regions, in the memory space of the central processing unit, which are mutually different.