Patent ID: 6686606
Filing Date: 2004-02-03
Classification: G02F,H01L

Abstract:
A thin film transistor substrate for a display comprising:a insulating substrate; a gate pattern including a gate line and a gate electrode formed over the substrate, wherein the gate pattern comprises a lower layer and an upper layer, and at least one of the lower layer and the upper layer have a resistivity less than 15 &mgr;&OHgr;cm, and the gate pattern have a taper angle at the edges of 70-90Â°; a gate insulating layer covering the gate pattern; an amorphous silicon layer on the gate insulating layer; a data pattern including a data line, a source electrode and a drain electrode formed over the amorphous silicon layer; a passivation layer covering the data pattern and the amorphous silicon layer; a pixel electrode electrically connected to the drain electrode; a first conductive pattern electrically connected to the end portion of the gate line; and a second conductive pattern electrically connected to the end portion of the data line.