Patent ID: 7388786
Filing Date: 2008-06-17
Classification: G11C

Abstract:
1. A semiconductor storage apparatus, comprising: a pair of first and second bit lines; a cell array having a plurality of memory cells connected to the first or second bit line; a sense amplifier which is provided corresponding to a pair of first and second bit lines and senses data read out from the memory cell, wherein the sense amplifier includes a current mirror circuit having first and second current paths connected directly or indirectly to the pair of first and second bit lines; and the current mirror circuit includes: a first transistor which has a source, a gate, and a drain short-circuited to the gate and flows a reference current between the source and the drain thereof; and a second transistor, of which gate is connected to the gate of the first transistor, and which flows a current passing through the memory cell to be read out between a source and a drain thereof.