Patent ID: 6658595
Filing Date: 2003-12-02
Classification: G06F

Abstract:
An asymmetric failure detection system, comprising:a first processing element operable to perform at least one function; and a second processing element coupled to the first processing element by a communication link, the second processing element operable to perform the at least one function of the first processing element in the event the first processing element fails, the second processing element further operable to expect and receive keepalive inquiries at an expected rate from the first processing element and to send responses in response to the inquiries to the first processing element, the second processing element further operable to take remedial action after not receiving any inquiries within a first predetermined time period; and wherein the first processing element is operable to take remedial action after not receiving any response to any inquiries sent within a second predetermined time period, the first predetermined time period being larger than the second predetermined time period, and wherein the first predetermined time period is determined based on an amount of time needed by the first processing element to take remedial action after not receiving any response to inquiries, the first predetermined time period and the second predetermined time period selected to prevent simultaneous shutdown of both the first processing element and the second processing element in the event of a failure of the communication link.