Patent ID: 8681538
Filing Date: 2014-03-25
Classification: G11C,H01L

Abstract:
1. A semiconductor storage device comprising: a semiconductor substrate; a plurality of memory cells on an upper portion of or above the semiconductor substrate, the memory cells including storage elements storing therein data and switching elements; a plurality of active areas, on which the switching elements of the memory cells are respectively formed, isolated from one another to correspond to the memory cells, respectively, and arranged on the semiconductor substrate in a first direction, the active areas adjacent in a second direction substantially orthogonal to the first direction being arranged to be half-pitch-staggered in the first direction; and a plurality of upper electrodes each connecting one end of the storage element of a first memory cell to the switching element of a second memory cell adjacent to the first memory cell in the second direction and to a bit line, the first and second memory cells being among the plurality of memory cells.