Patent ID: 6147884
Filing Date: 2000-11-14
Classification: G11C,H03K

Abstract:
Method for low-power charge transition in an integrated-circuit I/O system which comprises a plurality of capacitive loads which convert between a charged state at an operating voltage and a discharged state at ground during each of operation cycles of the I/O system, wherein the operation cycles are predetermined by an external clock signal, and of which plurality of said capacitive loads a first number of capacitive loads having the charged state converts from the charged state to the discharged state at ground, and a second number of capacitive loads having the discharged state converts from the discharged state to the charged state at the operating voltage, the method comprising the steps of:sharing the charge of said first number of capacitive loads having the charged state between said first number of capacitive loads and said second number of capacitive loads having the discharged state, thereby charging said second number of capacitive loads from ground to a preload voltage and discharging said first number of capacitive loads from said operating voltage to said preload voltage,charging said second number of capacitive loads having been charged to said preload voltage from said preload voltage to an intermediate voltage between said preload voltage and said operating voltage, andcharging said second number of capacitive loads having been charged to said intermediate voltage from said intermediate voltage to said operating voltage.