Patent ID: 6777254
Filing Date: 2004-08-17
Classification: G02F,H01L,Y10S

Abstract:
A method of fabricating a semiconductor device comprising:forming a first semiconductor island and a second semiconductor island and a third semiconductor island over a substrate; forming a first low concentration n-type impurity region and a second low concentration n-type impurity region and a third low concentration n-type impurity region respectively in said first semiconductor island and said second semiconductor island and said third semiconductor island by introducing a first impurity imparting n-type into said first low concentration n-type impurity region and said second low concentration n-type impurity region and said third low concentration n-type impurity region; forming a first photoresist and a second photoresist and a third photresist respectively over said first semiconductor island and said second semiconductor island and said third semiconductor island so that said first photoresist partially overlaps with said first low concentration n-type impurity region and said second photoresist partially overlaps with said second low concentration n-type impurity region and said third photoresist partially overlaps with said third low concentration n-type impurity region; forming a first high concentration n-type impurity region and a second high concentration n-type impurity region and a third high concentration n-type impurity region respectively in said first semiconductor island and said second semiconductor island and said third semiconductor island by introducing a second impurity imparting n-type into a first part of each of said first low concentration n-type impurity region and said second low concentration n-type impurity region and said third low concentration n-type impurity region using said first photoresist and said second photoresist and said third photoresist as masks to leave behind second parts provided under said masks in said first low concentration n-type impurity region and said second low concentration n-type impurity region and said third low concentration n-type impurity region as they are; and introducing impurities imparting p-type into said second low concentration n-type impurity region and said second high concentration n-type impurity region to change said second low concentration n-type impurity region and said second high concentration n-type impurity region to a p-type impurity region, wherein concentration of said second impurity is higher than concentration of said first impurity, wherein said first semiconductor island is formed in an n-channel thin film transistor of a driving circuit, wherein said second semiconductor island is formed in a p-channel thin film transistor of said driving circuit, and wherein said third semiconductor island is formed in a pixel thin film transistor.