Patent ID: 6052017
Filing Date: 2000-04-18
Classification: G11B,H03K

Abstract:
An apparatus to apply a current to a coil of a write head assembly, the apparatus comprising;an H-bridge including a first pair of two switchable transistors and a second pair of two switchable transistors each pair connected between a supply voltage and a reference potential and adapted to be connected to said coil between said two transistors of each pair,said two transistors of said first pair being adapted to be connected to receive a control signal to turn on one of said two transistors of said first pair and to turn off another of said two transistors of said first pair,said two transistors of said second pair being adapted to be connected to receive an inverted control signal to turn on one of said two transistors of said second pair and to turn off another of said two transistors of said second pair,whereby when said one transistor of said first pair is turned on and said another transistor of said second pair is turned off, current flows in said coil in a first direction, and when said another transistor of said first pair is turned on and said one transistor of said second pair is turned off, current flows in said coil in a second direction,mirror transistors wherein one of said transistors in each of said first and second pairs of transistors being connected to said coil, and if turned on, mirrors a reference current supplied by a current mirror circuit coupled to transistors within said first and second pairs of transistors, whereby said currents in said coil are controlled by said reference circuit,first and second parallel transistors connected in parallel respectively with said transistor in said first and second pairs of transistors which are connected to mirror said reference current, said first and second parallel transistors being connected to be turned on respectively by said control signal and said inverted control signal concurrently with said respective transistor in said first and second pairs of transistors in parallel with which said parallel transistors are connected, anda pair of timing elements connected to respective ones of said parallel transistors to turn off said respective ones of said parallel transistors after a predetermined time, whereby if said parallel transistors are turned on, said current in said coil overshoots a value established by said mirror transistors.