Patent ID: 6867481
Filing Date: 2005-03-15
Classification: H01L

Abstract:
1. A semiconductor die package comprising; (a) a semiconductor die including a first surface and a second surfaces, wherein the first surface comprises a source region and a gate region, and the second surface comprises a drain region; (b) a leadframe structure comprising a die attach region and a plurality of leads extending away from the die attach region, wherein the die attach region includes one or more apertures extending through the die attach region and being oriented generally perpendicular to the orientations of the leads in the plurality of leads, and wherein the semiconductor die is mounted on the die attach region of the leadframe structure and wherein the first surface of the semiconductor die is proximate to the leadframe structure and the second surface of the semiconductor die is distal to the leadframe structure; (c) a plurality of solder joints coupling die semiconductor die to the leadframe structure, wherein an aperture in the one or more apertures is between adjacent solder joints; (d) a molding material that is around at least portions of the die attach region of the leadframe structure and the semiconductor die, and wherein the molding material is also within the one or more apertures in the die attach region of the lead frame structure; and (e) a drain clip coupled to the second surface of the semiconductor die.