Patent ID: 7208391
Filing Date: 2007-04-24
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor integrated circuit device, comprising the steps of: (a) forming an isolation trench in an isolation region of a semiconductor substrate surrounding a plurality of active regions; (b) filling said isolation trench up to a predetermined position in its depth direction with a first insulating film deposited by a coating method; (c) depositing a second insulating film on a main surface of said semiconductor substrate by a chemical vapor deposition method so as to fill a remaining depth portion of said isolation trench; (d) polishing said second insulating film on said main surface of said semiconductor substrate by a chemical mechanical polishing method such that said second insulating film remains in said isolation trench; (e) forming a third insulating film so as to cover the surface of said active region and the surface of said second insulating film in said isolation trench; (f) forming a hole on each of said active regions by etching said third insulating film such that a part of each hole extends onto said second insulating film; and (g) forming a conductive layer in said hole, wherein an etching rate of said second insulating film is lower than that of said first insulating film.