Patent ID: 9104894
Filing Date: 2015-08-11
Classification: G01R,G06F

Abstract:
1. An apparatus, comprising: a non-volatile memory; a processor coupled to the non-volatile memory; and a hardware communications interface coupled between the processor and a hardware device and, in response to control signals received from the processor, operable to perform operations comprising writing to the non-volatile memory license data that is associated with at least one respective hardware feature of the hardware device, and generating from the license data one or more outputs that selectively enable the at least one hardware feature of the hardware device; and wherein the non-volatile memory provides an unlock data register, and the communications interface is operable to perform operations comprising storing validation information associated with the license data in the unlock data register, and comparing the validation information with an internally calculated value in order to enable the writing of the license data to the non-volatile memory.