Patent ID: 6342881
Filing Date: 2002-01-29
Classification: G09G

Abstract:
A display device including a plurality of scanning lines, a plurality of data lines, and display elements driven with the scanning lines and the data lines, said display device performing grayshade display by pulse width modulation, said display device comprising: scanning signal drive means for supplying a first selecting voltage to the scanning lines in a first mode, and for supplying, in a second mode, a precharge voltage opposite in polarity to the first selecting voltage about a middle value of a data voltage applied to the data lines and thereafter supplying a second selecting voltage opposite in polarity to the precharge voltage about the middle value of the data voltage to the scanning lines; and data signal drive means for supplying a pulse-width-modulated data voltage to the data lines, wherein a DC component of the data voltage in one horizontal scanning period with respect to a middle voltage between an ON voltage and an OFF voltage is made approximately zero independent of a gray scale wherein said scanning signal drive means supplies, in said first mode, said first selecting voltage in a second period following a first period corresponding to a first half of one horizontal scanning period and equal in length to the first period, and supplies, in said second mode, said precharge voltage in a third period corresponding to the first half of one horizontal scanning period, and said second selecting voltage in a fourth period following the third period and equal in length to the third period, and wherein said data signal drive means keeps the data voltage at a low level with respect to the middle voltage of the ON and OFF voltages for a period in said first period equal in length to a period in said second period through which the data voltage is kept at a high level with respect to the middle voltage, keeps the data voltage at the high level for a period in said first period equal in length to the period in said second period through which the data voltage is kept at the low level, keeps the data voltage at the low level for a period in said third period equal in length to a period in said fourth period through which the data voltage is kept at the high level, and keeps the data voltage at the high level for a period in said third period equal in length to a period in said fourth period through which the data voltage is kept at the low level.