Patent ID: 7812391
Filing Date: 2010-10-12
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a semiconductor substrate having a plurality of active regions separately formed by a plurality of trenches formed in a surface of the semiconductor substrate at predetermined intervals; a first gate insulating film formed on an upper surface of the semiconductor substrate corresponding to each active region; a gate electrode of a memory cell transistor formed by depositing an electrical charge storage layer formed on an upper surface of the gate insulating film, a second gate insulating film and a control gate insulating film sequentially; an element isolation insulating film buried in each trench and formed from a coating type oxide film; and an insulating film formed inside each trench on a boundary between the semiconductor substrate and the element isolation insulating film, the insulating film containing nontransition metal atoms and having a film thickness not more than 5 Å.