Patent ID: 8187972
Filing Date: 2012-05-29
Classification: H01L

Abstract:
1. A process for fabricating one or more through-substrate vias in a first semiconductor substrate which may contain active circuitry, the first substrate having a first surface and a second surface, comprising: forming one or more through-substrate via holes in a first semiconductor substrate; depositing an isolation material directly onto the first substrate and onto the interior walls of each of said through-substrate via holes using atomic layer deposition (ALD) such that said isolation material is electrically insulating, continuous and substantially conformal; depositing conductive material into each of said via holes over said isolation material using ALD such that said conductive material is electrically continuous across the length of each of said via holes; depositing a polymer material over said conductive material such that any continuous top-to-bottom openings present in said via holes are filled by said polymer material; patterning and dry etching said polymer and conductive materials such that said polymer material is confined to the interior of each of said via holes and said conductive material is confined to the interior of said via holes and the area immediately surrounding said via holes on said first and second surfaces of said first substrate such that said through-substrate vias are electrically isolated from each other; and planarizing at least one of said first and second surfaces of said first substrate after said patterning and dry etching of said polymer and conductive materials to provide a planar surface suitable for photolithographic processing.