Patent ID: 7148664
Filing Date: 2006-12-12
Classification: G05F,H02M,Y02B

Abstract:
1. A circuit for providing power factor correction including a boost converter circuit having a boost inductance and a power factor correction switch coupled in series with the boost inductance, the boost inductance and power factor correction switch being coupled across the output of a rectifier being supplied with AC power from an AC line, the boost converter circuit further comprising a boost diode coupled to a junction between the inductor and the switch, an output of the boost diode coupled to an output capacitor, a DC bus voltage being provided across the output capacitor, further comprising a control circuit receiving as inputs a rectified AC input voltage from the rectifier, a signal proportional to current through the inductor and the DC bus voltage across the capacitor, and wherein the control circuit provides a pulse width modulated signal to control the on time of the PFC switch, the control circuit further comprising: a power factor correction pulse width modulated device receiving as inputs the rectified AC input voltage, the DC bus voltage, the signal proportional to the current through the inductor and a reference current signal, wherein the power factor correction pulse width modulated device further comprises: a pulse width modulated generator operable to provide the pulse width modulated signal to control the on time of the PFC circuit; and a pulse width modulated blanking device operable to provide an enable/disable signal to disable the pulse width modulated generator when predetermined conditions are met, wherein the pulse width modulated blanking device provides the enable/disable signal to disable the pulse width modulated generator when a first result set at a value less than or equal to the DC bus voltage minus a first predetermined value is less than or equal to the rectified AC input voltage.