Patent ID: 8860491
Filing Date: 2014-10-14
Classification: H03M

Abstract:
1. An integrated circuit, comprising: a first and second integrator provided in cascade, the first integrator having an input terminal for receiving an input signal and a feedback path comprising a feedback impedance between an output terminal of the integrator and the input terminal of the integrator; a digital to analog converter coupled to an input terminal of the second integrator; an output impedance provided in an output path from the output terminal of the first integrator to the input terminal of the second integrator; a first cancellation impedance coupled to the input terminal of the second integrator and driven by a first cancellation signal, wherein the first cancellation impedance is of the same type as the output impedance; and a second cancellation impedance coupled to the feedback path of the first integrator and driven by a second cancellation signal, wherein the second cancellation impedance is of the same type as the feedback impedance.