Patent ID: 8981738
Filing Date: 2015-03-17
Classification: G05F,H02J,H02M,Y02E,Y10S

Abstract:
1. A solar array regulator (SAR) having an input port (IN) to be connected to a solar array (SA) and an output port (OUT) to be connected to a power bus (PB), comprising: a three-mode switching voltage converter (SVC) connected between said input and output ports, comprising a first and a second switching cells (PC a control circuit (CC) for generating first and second pulse-width modulation signals (PWMS implementing a single current control loop for generating both said first and second pulse-width modulation signals (PWM wherein said control circuit also implements an outer control loop configured to generate a current set-point (SP wherein the solar array regulator further comprises: wherein said means for generating an alternative voltage or current set-point (SP′