Patent ID: 6108719
Filing Date: 2000-08-22
Classification: G06F

Abstract:
A computer system, comprising:a processor operable to issue a query for I/O device configuration information;an I/O device addressable by the processor, the I/O device storing I/O configuration information for the I/O device and being operable to transfer the I/O configuration information to the processor in response to a query for I/O device configuration information addressed to the I/O device;a memory for storing data at locations addressable by the processor, the memory storing the I/O configuration information for the I/O device that has been transferred from the I/O device;a system controller coupling the memory with the processor and controlling the transfer of data and address signals between the memory and the processor, the system controller further coupling the I/O device with the processor and controlling the transfer of data between the I/O device and the processor; andan intercept circuit coupled with the processor and with the memory, the intercept circuit being operable to intercept the query for I/O device configuration information addressed by the processor to the I/O device and reroute the operation to a corresponding location in the memory that contains I/O device configuration information transferred from the I/O device.