Patent ID: 7629238
Filing Date: 2009-12-08
Classification: H01L

Abstract:
1. A method for forming an isolation structure, comprising the steps of: forming, on a first semiconductor layer having a first lattice parameter, a second semiconductor layer having a second lattice parameter larger than the first lattice parameter; forming a strained semiconductor layer on the second semiconductor layer; implanting a first impurity having a first conductivity type in the first semiconductor layer, the second semiconductor layer, and the strained semiconductor layer, thus forming a well; forming a mask on the strained semiconductor layer, the mask having a plurality of openings; forming a plurality of trenches having a depth less than a combined thickness of the strained semiconductor layer and the second semiconductor layer by etching the strained semiconductor layer and partially etching the second semiconductor layer using the mask as an etching mask, each trench a predetermined distance apart from each other; implanting a second impurity having a second conductivity type in the first and second semiconductor layers under the exposed trenches using the mask as an implantation mask to subsequently form a plurality of punch stop layers having uppermost portions contacting lowermost portions of the trenches; and filling the trenches with an insulating material to form a plurality of isolation layers.