Patent ID: 6498537
Filing Date: 2002-12-24
Classification: H03L

Abstract:
Phase comparison circuit having a single voltage-controlled delay circuit that adds a prescribed delay time to an input signal of either a first or a second level in order to output a delayed signal, a first edge detection circuit that outputs a first edge detection signal upon detecting the changing edge at which the input signal changes from the first level to the second level, a second edge detection circuit that outputs a second edge detection signal upon detecting the changing edge at which the input signal changes from the second level to the first level, a phase detection circuit that outputs a first control signal by comparing the phase of the delayed signal and the phase of a clock signal when the first detection signal is output and outputs a second control signal by comparing the phase of the delayed signal and the phase of a clock signal when the second detection signal is output, and an output circuit that outputs a phase difference signal indicating the phase difference between the delayed signal and the clock signal according to the first and the second control signals.