Patent ID: 7064024
Filing Date: 2006-06-20
Classification: H01L

Abstract:
1. A semiconductor device fabrication method, comprising: forming a first insulating film on a semiconductor substrate; forming a trench extending from a surface of the first insulating film to a predetermined depth of the semiconductor substrate; depositing a second insulating film to fill the trench, and planarizing the second insulating film to form a fin formation dummy pattern; forming a mask having a pattern corresponding to a predetermined active region on the first insulating film and fin formation dummy pattern; patterning the first insulating film into a shape corresponding to the active region and exposing an upper portion of the fin formation dummy pattern in a region except for the active region by etching using the mask, and removing the mask; depositing a third insulating film on surfaces of the fin formation dummy pattern, semiconductor substrate, and first insulating film, and etching back the third insulating film to form fin formation sidewall patterns on side surfaces of the fin formation dummy pattern and on side surfaces of the first insulating film; etching the semiconductor substrate by using the fin formation sidewall patterns as masks, thereby forming first and second fins which oppose each other; removing the fin formation dummy pattern; forming a fourth insulating film for device isolation in a region where the first and second fins and first insulating film are not formed; and selectively forming an electrode which crosses the first and second fins.