Patent ID: 6081441
Filing Date: 2000-06-27
Classification: G11C

Abstract:
A content-addressable memory having an address decoder, a control circuit, search data input circuits for inputting retained data and search data to internal circuitry, match line precharge circuits for charging match lines, and a match detection circuit for detecting whether a match has been obtained on a match line, said content-addressable memory comprising:a match selection control circuit, to which word lines that are the outputs of said address decoder are connected as inputs, for providing a predetermined potential as an inhibit signal for match lines that corresponds to all word lines of an order higher or lower than a word line that has been selected by said address decoder; andmatch selection circuits, which are connected to respective match lines and to which the match line inhibit signals from said match selection control circuit and a precharge signal for charging match lines from said control circuit are input, for discharging match lines that correspond to the match line inhibit signals.