Patent ID: 8987787
Filing Date: 2015-03-24
Classification: H01L

Abstract:
1. A semiconductor structure, comprising: a first chip, comprising: N of first conductive lines disposed in parallel, N is positive integer; M of second conductive lines perpendicularly disposed on the first conductive lines and arranged in parallel, and the second and first conductive lines forming an overlapping area, M is positive integer; N of third conductive lines perpendicularly disposed on the second conductive lines and parallel to the first conductive lines, the third conductive lines being divided into at least two groups and respectively disposed in a first region and a third region at a diagonal direction of the overlapping area; N of first vias, respectively connected to the first conductive lines; M sets of second vias, divided into at least two groups and respectively disposed in a second region and a fourth region at the other diagonal direction of the overlapping area, and respectively connected to the second conductive lines; and N sets of third vias, divided into at least two groups and respectively disposed in the first region and the third region, and respectively connected to the third conductive lines; and a second chip, assembled to the first chip.