Patent ID: 8314495
Filing Date: 2012-11-20
Classification: H01L,H05K

Abstract:
1. A semiconductor device comprising: a wiring substrate including a core substrate having first and second surfaces opposed to each other, and first and second build-up substrates on the first and second surfaces of the core substrate, respectively, a semiconductor chip comprising a substrate which has third and fourth surfaces opposite to each other, semiconductor elements on the third surface, a silicon oxide film covering the semiconductor elements, an inter layer insulating film over the silicon oxide film, pad electrodes over the inter layer insulating film and internal wiring layers electrically connecting the semiconductor elements with the pad electrodes, the inter layer insulating film having an electrical constant lower than that of the silicon oxide film, a resin layer between the semiconductor chip and the first build-up substrate and between the first bump electrodes; and second bump electrodes on the second build-up substrate and electrically connected with the fourth wiring layers of the second build-up substrate, wherein the first insulating layer of the core substrate, and the second and third insulating layers of the first and second build-up substrates, contain glass cloths, respectively.