Patent ID: 9213350
Filing Date: 2015-12-15
Classification: G05F,H03F

Abstract:
1. An apparatus comprising: a first transistor circuit having a first overdrive voltage, wherein the first overdrive voltage is defined by a gate-source voltage of the first transistor circuit minus a threshold voltage of the first transistor circuit, a second transistor circuit having a second overdrive voltage, wherein the second overdrive voltage is defined by a gate-source voltage of the second transistor circuit minus a threshold voltage of the second transistor circuit, and wherein a source of the second transistor circuit and a source of the first transistor circuit are coupled to a same non-zero potential, a third transistor circuit coupled to a second voltage source and coupled to the second transistor circuit, a fourth transistor circuit coupled to the second voltage source, the fourth transistor circuit having a larger channel width to channel length ratio than the third transistor circuit, wherein the gate-source voltage of the first transistor circuit is defined by at least one reference current and whereby the gate-source voltage of the second transistor circuit is defined by the gate-source voltage of the first transistor circuit and a voltage drop provided by a voltage source disposed between a gate of the first transistor circuit and a gate of the second transistor circuit.