Patent ID: 6154120
Filing Date: 2000-11-28
Classification: G06F,G11C,H03K

Abstract:
An apparatus that compares the values of two N-nary operands, comprising:a 1-of-P first input that receives a 1-of-P first operand;a 1-of-Q second input that receives a 1-of-Q second operand;a 1-of-R result output that delivers a 1-of-R result;an individual equality logic, coupled to said first input and to said second input, that produces an indication of whether the value of a grouping of one or more bits of said first operand is equal to the value of a corresponding grouping of one or more bits of the said second operand;a block equality logic, coupled to said individual equality logic, that produces a block equality indicator; anda comparison logic, coupled to said block equality logic and to said result output, that produces said 1-of-R result, where said 1-of-R result comprises an equal value if the value of said first operand is equal to the value of said second operand, said 1-of-R result further comprises a not equal value if the value of said first operand is not equal to the value of said second operand.