Patent ID: 8700874
Filing Date: 2014-04-15
Classification: H03K

Abstract:
1. A method performed in a memory controller for maintaining a plurality of segmented counters, wherein the memory controller is coupled to a primary memory, and a secondary memory, wherein the primary memory has a shorter access time than the secondary memory, the method comprising the steps of: responsive to each event requiring an update of one of the plurality of segmented counters, immediately updating a primary part of that segmented counter stored in the primary memory, wherein the primary parts include the lower order bit positions of the plurality of segmented counters; responsive to each time one of the primary parts is rolling over, determining to update a secondary part of that segmented counter stored in the secondary memory, wherein the secondary parts include less than all of the bit positions of the plurality of segmented counters included in the primary parts, and wherein a value of that segmented counter is a sum of the primary part of that segmented counter, and the secondary part of that segmented counter being shifted by a number of overlapping bits between the primary part and the second part of that segmented counter; periodically and independently of the events, determining for each of the plurality of segmented counters, based on a current probability function and a current at least pseudo-random number, whether to opportunistically update the secondary part of that segmented counter stored in the secondary memory; each time it is determined to update the secondary part of one of the plurality of segmented counters, performing the steps of: