Patent ID: 8309372
Filing Date: 2012-11-13
Classification: H01L

Abstract:
1. A method of manufacturing a stacked semiconductor package, the method comprising: preparing a first semiconductor chip comprising a first semiconductor substrate and a first semiconductor device disposed on a first side of the first semiconductor substrate, a first penetration electrode, and a first connection unit electrically connected to the first semiconductor device or the first penetration electrode; attaching the first semiconductor chip to a base substrate with the first connection unit interposed therebetween; forming a first rewiring pattern and a first protection layer on a second side of the semiconductor substrate of the first semiconductor chip by using a printing method, wherein the first rewiring pattern is electrically connected to the first penetration electrode and the first protection layer partially covers the first rewiring pattern and exposes other portions of the first rewiring pattern; and attaching a second semiconductor chip comprising a second semiconductor device to the first semiconductor chip to electrically connect the second semiconductor device to the first rewiring pattern, wherein the first penetration electrode is formed to extend through the first semiconductor substrate and the first semiconductor device.