Patent ID: 6037203
Filing Date: 2000-03-14
Classification: H01L

Abstract:
A method of fabricating a semiconductor device, comprising the steps of:providing a semiconductor substrate doped with a first-type impurity;forming a plurality of isolation films for defining first, second and third active regions in an unit cell of said semiconductor substrate;forming a second-type impurity doped buried-impurity layer at a predetermined depth of said semiconductor substrate from a surface of said first active region and the surface of region including predetermined portions of said isolation films that lie at both sides of said first active region;forming a first well region doped with a second-type impurity beneath the region including said third active region and predetermined portions of the isolation films that lie at the both sides of the third active region, and a second well region doped with a second-type impurity beneath predetermined portion of the isolation film that lies between said first active region and said second active region;forming a third well doped with first-type impurity beneath the region including said second active region and predetermined portions of the isolation films that lie at both sides of the second active region, and a fourth well region doped with a first-type impurity beneath said first active region and predetermined portions of the isolation films that lie at both sides of the first active region; andforming a first doping region and a second doping region for controlling a threshold voltage respectively in the region adjacent to the surface of said first active region and in the region adjacent to the surface of said second active region, wherein dopant concentration of said first doping region is lower than that of said second doping region.