Patent ID: 9123642
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A method comprising: implanting ions of a first-type at a first energy level in a first drain portion in a drain extended metal-on-semiconductor (DE_MOS) region of a substrate where a first DE_MOS transistor is to be formed, while concurrently implanting ions of the first-type at the first energy level in a high-voltage metal-on-semiconductor (HV_MOS) region of the substrate where a first HV MOS transistor is to be formed to adjust a threshold voltage of the first HV_MOS transistor; implanting ions of the first-type at a second energy level in a low-voltage metal-on-semiconductor (LV_MOS) region of the substrate where a first LV_MOS transistor is to be formed to adjust a threshold voltage of the first LV_MOS transistor, while concurrently implanting ions of the first-type at the second energy level in the first drain portion; and implanting ions of a second-type at the first energy level in a second drain portion where a second DE_MOS transistor is to be formed in the DE_MOS region while concurrently implanting ions of the second-type at the first energy level in the HV_MOS region of the substrate where a second HV_MOS transistor is to be formed to adjust the threshold voltage of the second HV_MOS transistor.