Patent ID: 7190841
Filing Date: 2007-03-13
Classification: G06T,H04N

Abstract:
1. An image noise reduction circuit, comprising: an image storing portion which stores a latest image data from an output image signal which has been subjected to noise reduction by frame; a difference detecting portion which detects a difference between an input image signal and the stored image data, and which outputs a difference data; a pulse generating portion which detects a timing at which there is an absence of an image component in the input image signal based on a synchronized signal, and which generates a timing pulse signal; a noise detecting portion which detects a noise level in the difference data responsive to the timing pulse signal; a noise reduction setting portion which generates a control data based on the noise level; a correction data generating portion which generates a correction data from the difference data based on the control data; and an image correction portion which corrects the input image signal using the correction data, and which outputs the output image signal, wherein said noise detecting portion comprises a maximum detecting portion which detects a maximum value of the difference data and an average detecting portion which detects an average value of the difference data, and wherein said noise level comprises the maximum value and the average value, and wherein said noise reduction setting portion comprises a detecting condition setting portion which generates a setting information based on the maximum value and a detecting operations control portion which generates a control signal, and wherein said control data comprises the setting information and the control signal.