Patent ID: 8090758
Filing Date: 2012-01-03
Classification: G06F,H03K

Abstract:
1. A multiplier-accumulator circuit, comprising: a pre-adder having a first input, a second input, a control input, and an output; a multiplier having a first input, a second input, and an output, the second input of the multiplier being coupled to the output of the pre-adder; multiplexing logic having a plurality of inputs, a control input, a first output, and a second output, a first one of the plurality of inputs being coupled to the output of the multiplier, a second one of the plurality of inputs receiving a concatenation of respective portions of the first input of the pre-adder, the second output of the pre-adder, and the first input of the multiplier; an accumulator having a first input, a second input, a control input, and an output, the first input and the second input of the accumulator being coupled to the first output and the second output of the multiplexer, respectively, and the output of the accumulator being coupled to a second one of the plurality of inputs of the multiplexing logic; and control logic having an input and a plurality of outputs, the outputs of the control logic being respectively coupled to the control input of the pre-adder, the control input of the multiplexing logic, and the control input of the accumulator, wherein the pre-adder produces a pre-sum of the first and second pre-adder inputs, wherein the multiplier produces a product of the multiplier inputs, wherein the accumulator produces a sum of the first and second accumulator inputs, wherein the multiplexing logic selects from the plurality of inputs as the first and second multiplexing logic outputs, and wherein the control logic controls operation of the pre-adder, the accumulator, and the multiplexing logic.