Patent ID: 7243199
Filing Date: 2007-07-10
Classification: G06F

Abstract:
1. A memory data protection system comprising: a memory circuit having an array of memory cells; a protection contents indicating section having non-volatile storage cells which store therein a security bit for indicating permission/prohibition of reading of data from the memory circuit and a protection bit for indicating permission/prohibition of writing of data to the memory circuit; a protection function circuit which determines permission/prohibition of reading of data from the memory circuit and permission/prohibition of writing of data to the memory circuit in accordance with the security bit and the protection bit stored in the protection contents indicating section; and a protection function locking/unlocking circuit which controls the protection function circuit in a manner that, the protection function locking/unlocking circuit makes the protection function circuit in a lock state to forcibly prohibit reading of data from the memory circuit and writing of data into the memory circuit in a time period from when a security/protection lock signal is generated or when a command is input until when the protection function circuit completes reading of the security bit and the protection bit from the protection contents indicating section into data buses, and after lapse of the time period, the protection function locking/unlocking circuit unlocks the lock state to enable the protection function circuit operative, wherein the protection function locking/unlocking circuit generates within the time period a control signal and supplies the control signal to the protection function circuit, and outputs the control signal as a monitoring signal.