Patent ID: 9000436
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A thin film transistor, comprising: an active pattern including a first conductive region, a first channel region adjacent to the first conductive region, a second conductive region spaced apart from the first conductive region so that the first channel region is interposed between and directly connects the first conductive region and the second conductive region, a second channel region spaced apart from the first channel region so that the second conductive region is interposed between the first channel region and the second channel region, and a third conductive region spaced apart from the second conductive region so that the second channel region is interposed between and directly connects the second conductive region and the third conductive region; and a gate electrode positioned on the active pattern and including a first gate region crossing the first channel region, a second gate region crossing the second channel region, and a connection gate region connecting the first gate region and the second gate region, wherein the connection gate region, the first gate region, and the second gate region together surround the second conductive region, wherein the gate electrode has a closed loop formed of the first gate region, the second gate region, and the connection gate region.