Patent ID: 6391658
Filing Date: 2002-05-21
Classification: B82Y,H01L

Abstract:
A method of forming an array of microelectronic elements, said method comprising:preparing a first wafer of semiconductor material by implanting through a first surface of said first wafer, ions to a planar region at a selected depth therein, said ions being ions of an element selected from hydrogen and the noble gases; preparing a second wafer of semiconductor material, said second wafer comprising a layer of dielectric material having a second surface, a pattern of mutually electrically isolated metal conductors being disposed within said layer, said metal conductors comprising spaced apart conducting regions extending to and being exposed at said second surface; placing said first wafer over said second wafer with said first surface of said first wafer in juxtaposed adherence and electrical contact with said second surface and with exposed portions of said conducting regions; inducing a fracture along said planar region of said first wafer to leave at least one semiconductor layer of said first wafer defined/bounded between said first surface and a fracture surface formed in said planar region, said first surface remaining in electrically contacting adherence with said second surface; and using said at least one semiconductor layer to form a microelectronic element and positioning said microelectronic element in electrically contacting adherence to each of said mutually electrically isolated metal conductors.