Patent ID: 9177913
Filing Date: 2015-11-03
Classification: H01L

Abstract:
1. A method for forming a semiconductor structure, comprising: providing a semiconductor substrate including a shallow trench isolation (STI) structure formed therein, the STI structure including a fuse region; providing a high-K dielectric layer on the semiconductor substrate including the STI structure; providing a protective layer on the high-K dielectric layer; forming a first patterned photoresist layer on the protective layer, wherein the first patterned photoresist layer exposes a surface portion of the protective layer in the fuse region; using the first patterned photoresist layer as an etch mask to etch each of the protective layer and the high-K dielectric layer until a first surface portion of the STI structure in the fuse region is exposed; forming a fuse layer on each surface of a remaining portion of the protective layer and the exposed first surface portion of the STI structure; and removing a portion of the fuse layer, the remaining portion of the protective layer, and a remaining portion of the high-K dielectric layer from the semiconductor substrate to expose a second surface portion of the STI structure outside of the fuse region to form a fuse structure.