Patent ID: 7778091
Filing Date: 2010-08-17
Classification: G11C

Abstract:
1. A page buffer in a memory device having a multi level cell, the page buffer comprising: a first latch coupled between a sensing node and a data input/output node, and configured to store temporarily data to be programmed, wherein the sensing node is coupled to a bit line corresponding to a multi level cell selected for program, and the data input/output node receives data from an outside device or outputs data to the outside device; a second latch coupled to the sensing node, and configured to perform a program operation, a verifying operation or a read operation for reading data from the selected multi level cell; a first switching means coupled between the first latch and the sensing node, and configured to transmit the data stored in the first latch to the bit line through the sensing node when the program operation is performed; a second switching means coupled between a first node of the second latch and the sensing node, and configured to verify a first program operation of first data; and a third switching means coupled between a second node of the second latch and the sensing node, and configured to verify a second program operation of second data, wherein the first and second program operations are different.