Patent ID: 6615300
Filing Date: 2003-09-02
Classification: G06F

Abstract:
The computer implemented method of retrieving a pre-existing translation of an instruction of a target application program in a host computer that dynamically translates and processes instructions of a target application program designed for processing by a target computer having an instruction set different from the instruction set of said host computer, comprising the steps of:(a) creating a plurality of tags for each translation made of a target application instruction, a tag including multiple elements of data, including an extended instruction pointer (â€œeipâ€ ) supplied by the target application; a physical instruction pointer (â€œpeipâ€ ) derived by calculation from said extended instruction pointer; the context of a target processor existing at the time the translation was produced by a host processor and the code segment limit (â€œCS-limitâ€ ) of the target processor; (b)(1) storing each said translation together with said associated tags as an entry within a memory, and (b)(2) storing a fraction of said translations and said tags associated therewith stored in said memory as entries in a cache; (c) indexing said entries within said cache by hashing the information of the extended information pointers (â€œEIPâ€ ) associated with said translations stored in said cache to form a hash table for said cache; (d) hashing an eip of a target application instruction asserted for execution by the host computer and applying the hashed eip to a index to determine if said eip of said target application instruction matches an eip tag; of a translated target application instruction in said cache, wherein an individual translation in said cache may be selected through said hash table by matching the value of the EIP of a translation being sought with an EIP of said index; and (e) when said determination is positive, comparing the CS-limit of said asserted target application instruction with the CS-limit tag of the eip matched translated target application instruction, and comparing the context of the target processor existing in said host processor at the time of assertion of said target application instruction with and the context tag of said eip matched translated target application instruction; (f) retrieving said translated target application instruction for execution when each of the foregoing comparisons produce a match; (g) calculating the â€œpeipâ€  of said asserted target application instruction and comparing the calculated â€œpeipâ€  with the â€œpeipâ€  tag of said retrieved translated target application instruction, and if such comparison produces a match, then asserting said retrieved translated target application instruction as a correct translation; (h) when said determination is negative or if any of the other of said tag comparisons results in a mismatch, generating a cache MISS exception; and (i) if a cache MISS exception is generated, conducting a search of said memory for the translated target application instruction of said asserted target application instruction.