Patent ID: 8119473
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. A method for making metal gate stacks of a semiconductor device, comprising: forming a first dummy gate and a second dummy gate on a semiconductor substrate, the first and second dummy gates each including a dielectric material layer and a polysilicon layer on the dielectric material layer; removing the polysilicon from the first dummy gate, resulting in a first gate trench; forming a first metal gate electrode in the first gate trench, the first metal gate including a metal layer of a first work function and a first aluminum layer on the first metal layer; applying a chemical mechanic polishing (CMP) process to the semiconductor substrate; performing an annealing process to the first aluminum layer in the first metal gate electrode, the annealing process including a nitrogen and oxygen-containing gas and a duration less than about 60 seconds; performing an etch process to remove the polysilicon from the second dummy gate, resulting in a second gate trench; and forming a second metal gate electrode in the second gate trench, the second metal gate electrode including a second metal layer of a second work function different from the first work function and a second aluminum layer on the second metal layer.