Patent ID: 7328387
Filing Date: 2008-02-05
Classification: G01R

Abstract:
1. An integrated circuit comprising: A. plural TAP domains, each domain having a TDI input terminal, a TDO output terminal, a TCK input terminal, a TMS input terminal, and a RCK output terminal; and B. an addressable TAP domain selection circuit, the selection circuit having a separate set of outputs and at least one input for each TAP domain, each set including a TDI output connected to a TDI input terminal, a TDO input connected to a TDO output terminal, a TCK output connected to a TCK input terminal, a TMS output connected to a TMS input terminal, and a RCK input connected to a RCK output terminal, the selection circuit including an interface select circuit having a TDI lead coupled to the TDI output of each set, a TDO lead coupled to the TDO input of each set, a TCK lead coupled to the TCK output of each set, a TMS lead coupled to the TMS output of each set, and a RCK lead coupled to the RCK input of each set, the interface selection circuit also having: i. a first lead selectively carrying an AUX I/O 1 signal or a TDI signal, ii. a second lead selectively carrying a TDI/TDO signal or a TDO signal, iii. a third lead selectively carrying an AUX I/O 2 signal or a TMS signal, and iv. a fourth lead selectively carrying a TMS/RCK signal or a RCK signal.