Patent ID: 8143913
Filing Date: 2012-03-27
Classification: G06F,H03K

Abstract:
1. A semiconductor integrated circuit comprising: a plurality of logic blocks each of which is switchable between a plurality of states pertaining to operation and termination; an operation acquisition unit operable to acquire operation information indicating an operation of a power supply; a state determination unit operable to determine a state of each of the logic blocks, based on operation/termination information pertaining to a past state of each logic block, when the operation information indicates a charge operation of the power supply in which power saving is unnecessary; and a state control unit operable to control each logic block so that each logic block enters the state determined by the state determination unit, wherein when the operation information indicates a discharge operation of the power supply in which power saving is necessary, the state determination unit further determines a state of each logic block that needs to be operated for an execution of a target process to be an operation state in which the respective logic block is in operation.