Patent ID: 7360065
Filing Date: 2008-04-15
Classification: G06F,H04L

Abstract:
1. A protocol independent synchronous processor for processing network data, comprising: an execution control unit synchronous with an externally generated instruction clock signal, the execution control unit operable to execute an instruction per clock cycle of the externally generated instruction clock signal; an input interface configured so as to receive network data at a rate of one data word per clock cycle of the externally generated instruction clock signal; a plurality of configurable units synchronous with the externally generated instruction clock signal, the plurality of configurable units operable to process the received network data in substantially real time under control of the execution control unit; wherein at least one of the plurality of configurable units comprises a data modify unit coupled to the input interface, the data modify unit operable to selectively modify input data words received from the input interface according to instruction-specified operators to generate modified data words one modified data word per clock cycle of the externally generated instruction clock signal; and wherein the execution control unit is operable to configure the plurality of configurable units in accordance with any selected network protocol of a plurality of predefined network protocols to process the received network data in substantially real time in a manner consistent with the selected network protocol.