Patent ID: 6690061
Filing Date: 2004-02-10
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate of a first conductive type; a first semiconductor layer of the first conductive type formed on a main surface of said semiconductor substrate, an impurity concentration of said first semiconductor layer being lower than that of said semiconductor substrate; second and third semiconductor layers of a second conductive type formed on said first semiconductor layer a first MOS transistor of the first conductive type including first source regions formed in said second semiconductor layer, said first semiconductor layer and said semiconductor substrate serving as drains of said first MOS transistor; a first metal layer electrically connected to said first source regions a second MOS transistor of the first conductive type including second source regions; formed in said third semiconductor layer, said first semiconductor layer and said semiconductor substrate serving as drains of said second MOS transistor; a second metal layer electrically connected to said second source regions, said second metal layer being isolated from said first metal layer; and a conductive layer formed on a reverse surface of said semiconductor substrate.