Patent ID: 6417016
Filing Date: 2002-07-09
Classification: H01J

Abstract:
A method for forming vertical geometries on a silicon substrate, comprising:implanting a dopant in a patterned manner into the silicon substrate, wherein implanting a dopant in a patterned manner includes defining a more heavily doped region in the silicon substrate surrounding a number of less heavily doped regions; anodizing the silicon substrate, wherein anodizing the silicon substrate causes the more heavily doped region to form a porous silicon region, wherein anodizing the silicon substrate includes anodizing the silicon substrate in a self limiting manner by maximizing a dopant density in the silicon substrate and minimizing a current density through the silicon substrate in an HF/isopropyl alcohol bath; oxidizing the porous silicon region to form an oxidized porous silicon region; and removing the oxidized porous silicon region.