Patent ID: 7927919
Filing Date: 2011-04-19
Classification: H01L

Abstract:
1. A semiconductor packaging method without an interposer, comprising: providing a mother chip being a two-layer structure consisting of a semiconductor layer and an organic layer, wherein a plurality of electrodes are disposed on a first active surface of the semiconductor layer and a redistribution layer is embedded in the organic layer with a plurality of first terminals and a plurality of second terminals disposed on the redistribution layer and exposed from the organic layer; mounting the mother chip on a substrate to electrically connect the electrodes of the mother chip to the substrate; attaching a daughter chip onto the mother chip, wherein a second active surface of the daughter chip is in contact with the organic layer with a plurality of bonding pads of the daughter chip bonded to the first terminals; and disposing a plurality of electrically connecting components to electrically connect the second terminals to the substrate.