Patent ID: 9171960
Filing Date: 2015-10-27
Classification: G09G,H01L

Abstract:
1. A thin film transistor (TFT) device, comprising: a gate; an active layer having a source region, a drain region, and a channel region, wherein the channel region is between the source region and the drain region, and wherein the active layer includes a plurality of sublayers of a first metal oxide and a plurality of sublayers of a second metal oxide in a stacked arrangement from a first surface to a second surface of the active layer, wherein the arrangement includes an upper portion and a lower portion, the upper portion having at least one second metal oxide sublayer and a greater number of sublayers of the first metal oxide than the second metal oxide, and the lower portion having at least one first metal oxide sublayer and a greater number of sublayers of the second metal oxide than the first metal oxide; a gate insulator between the active layer and the gate; a source metal adjacent to the source region of the active layer; and a drain metal adjacent to the drain region of the active layer.