Patent ID: 9032411
Filing Date: 2015-05-12
Classification: G06F

Abstract:
1. A computer system comprising: a processor core with an operating system, the operating system having kernel space and user space; the processor core having multiple core threads to share resources of the core, with each core thread managed by the operating system to function as an independent logical processor within the core; a logical extended map of the processor core, the map to indicate a hit and miss ratio of L2 and L3 cache to demonstrate core activity of the logical processor within the processor core, and for each core thread the usage of the operating system resources, including user space and kernel space, and memory; and an operating system scheduling manager to schedule a routine on the processor core by allocation of the routine to different core threads on an inter-core basis based upon routine priority, thread priority, and thread availability for each core thread, with thread availability demonstrated by the map.