Patent ID: 6274969
Filing Date: 2001-08-14
Classification: H03H

Abstract:
A chip piezoelectric filter comprising:a first piezoelectric substrate on which a first energy-trap piezoelectric filter section is provided;a second piezoelectric substrate on which a second energy-trap piezoelectric filter section is provided, the second piezoelectric substrate being stacked on the first piezoelectric substrate;a spacer stacked between said first piezoelectric substrate and the second piezoelectric substrate and having an opening defining a first cavity arranged to prevent interference of vibrations of said first energy-trap piezoelectric filter section and said second energy-trap piezoelectric filter section;a first confining substrate stacked on a surface of the first piezoelectric substrate opposing the surface on which said spacer is stacked to define a second cavity that is arranged to prevent interference of vibrations of said first piezoelectric filter section; anda second confining substrate stacked on a surface of the second piezoelectric substrate opposing the surface on which said spacer is stacked to define a third cavity that is arranged to prevent interference of vibrations of said second piezoelectric filter section;wherein the area of said at least one of said first, second and third cavities is different from the remaining two of said first, second and third cavities.