Patent ID: 6434110
Filing Date: 2002-08-13
Classification: H04M

Abstract:
A full-duplex communication circuit comprising:a first signal path for carrying first signals from a first-end input terminal at a first-end to a second-end output terminal at a second-end; a second signal path for carrying second signals from a second-end input terminal to a first-end output terminal; an adaptive filter coupled to the first signal path and coupled to the second signal path for accessing a first signal, determining a compensation signal from the first signal, and compensating a second signal using the compensation signal to form a compensated second signal; and an echo path presence and absence detector coupled to the first signal path, the second signal path, and the adaptive filter, the echo path presence and absence detector including: an Echo Return-Loss Enhancement (ERLE) calculator coupled to the adaptive filter, the ERLE calculator including a logic for calculating an ERLE value; a power estimator coupled to the first signal path add the second signal path, the power estimator receiving an uncompensated signal and determining a power level of the uncompensated signal and receiving a compensated signal and determining a power signal of the compensated signal; a noise estimator coupled to the power estimator to receive the power signal of the compensated signal and generate a background noise signal; wherein the ERIE calculator, the power estimator, and the noise estimator determine the presence or absence of a path based on current and past ERIE values and current and past background noise estimates and determine the presence or absence of a path using an individual activation of an echo path presence test.