Patent ID: 8637851
Filing Date: 2014-01-28
Classification: B82Y,H01L

Abstract:
1. A graphene device comprising: a source and a drain, formed on a substrate; a stack structure having a graphene channel formed on the substrate between the source and the drain, a dielectric layer on the graphene channel, and a gate formed on the dielectric layer; and a high-K spacer made of a dielectric material on the left and right sides of the stack structure, in which any one or more of the source and the drain are spaced apart from the graphene channel by a physical gap extending in a planar direction, wherein the physical gap includes a thickness of the high-K spacer and an empty space spaced apart from the graphene channel, wherein when a voltage lower than the threshold voltage of the device is applied to the gate, the off-current of the device is reduced due to the physical gap, and when a voltage higher than the threshold voltage is applied to the gate, a fringing field is formed by the high-K spacer, so that the energy band of the substrate region under the high K-spacer is inversed and the effective length of the physical gap is reduced to increase the on-current of the device because of a breakdown occurring in the substrate region corresponding to the physical gap.