Patent ID: 8148250
Filing Date: 2012-04-03
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: delimiting active regions in a semiconductor substrate; forming a plurality of gate lines on the semiconductor substrate, the gate lines extending in a first direction tilted with respect to the active regions; forming a plug between adjacent gate lines on a portion of each active region; forming an insulation layer on the semiconductor substrate having the plug formed thereon; conducting a first etching of the insulation layer to remove a partial thickness of the insulation layer so as to define a line type trench therein, wherein the line type trench is capable of receiving a bit line and extends in a second direction perpendicular to the first direction; conducting a second etching of a portion of the insulation layer corresponding to a bottom of the line type trench so as to define a contact hole exposing the plug, wherein the contact hole is capable of receiving a bit line contact plug, wherein conducting the second etching comprises: forming spacers on sidewalls of the trench; and conducting the second etching on the portion of the insulation layer corresponding to the bottom of the line type trench, using the spacers as an etch mask; after conducting the second etching, forming a barrier layer on surfaces of the contact hole and trench; forming a first conductive layer on the barrier layer to fill the contact hole and the trench; removing portions of the first conductive layer and the barrier layer formed in the trench so as to form a bit line contact plug in the contact hole; and forming a bit line in the trench by forming a second conductive layer on the bit line contact plug, the bit line extending in the second direction perpendicular to the gate lines.