Patent ID: 8829690
Filing Date: 2014-09-09
Classification: H01L

Abstract:
1. A chip package comprising: a base re-distribution layer having an opening formed therein in a center area of the base re-distribution layer; an adhesive layer applied to one side of the base re-distribution layer, the adhesive layer having a window formed therein free of adhesive material; a die having a front surface affixed to the base re-distribution layer by way of the adhesive layer, wherein the die is aligned with the window formed in the adhesive layer such that only a perimeter of the front surface of the die is in contact with the adhesive layer; a plurality of vias and a plurality of metal interconnects formed in the base re-distribution layer to electrically connect the base re-distribution layer to the die; and a shield element positioned between the base re-distribution layer and the adhesive layer and generally aligned with the opening formed in the base re-distribution layer and the window of the adhesive layer such that only a perimeter of the shield element is attached to the adhesive layer, the shield element being separated from the die by an air gap; wherein the shield element is configured to be selectively removable from the adhesive layer so as to expose the front surface of the die.