Patent ID: 6426250
Filing Date: 2002-07-30
Classification: H01L,Y10S

Abstract:
A method for creating a stacked metal-to-metal capacitor, comprising the steps of:providing a semiconductor substrate; forming a first metal electrode of said stacked metal-to-metal capacitor, said first metal electrode comprising a first and second metal plugs, by depositing a first layer of dielectric over the surface of said substrate, creating a first opening in said first layer of dielectric, filling said first opening with a planarized first layer of metal, creating said first metal plug having a first surface area in said first layer of dielectric, further creating a free standing second metal plug having a second surface area and having a height, said second metal plug comprising a second layer of metal being in contact with said first metal plug while overlying and being centered with respect to said first metal plug, said second surface area being smaller than said first surface area by a measurable amount; forming an opening for a second metal electrode of said stacked metal-to-metal capacitor by successively depositing a second etch stop layer and a third layer of dielectric over exposed surfaces of said first and second metal plugs, including exposed surfaces of said first layer of dielectric, by patterning and etching said third layer of dielectric and said second etch stop layer down to the surface of said first layer of dielectric, thereby creating a third opening having a third surface area in said second etch stop layer and said third layer of dielectric, said third opening aligning with and surrounding said first electrode of said metal-to-metal capacitor, said third surface area being smaller than said first surface area and larger than said second surface area by a measurable amount, said third surface area being above and-removed from said second surface area by a measurable amount; forming a capacitor dielectric by depositing a layer of capacitor dielectric over inside surfaces of said opening for a second metal electrode, including exposed surfaces of said first and second metal plugs, further including exposed surfaces of said third layer of dielectric; and creating a second metal electrode by depositing a third layer of metal over the surface of said layer of capacitor dielectric, thereby filling said opening for a second metal electrode, by further polishing said deposited third layer of metal down to the surface of said layer of capacitor dielectric, the surface of said polished third layer of metal being in a plane with the surface of said layer of capacitor dielectric where said layer of capacitor dielectric overlays said third layer of dielectric.