Patent ID: 6807454
Filing Date: 2004-10-19
Classification: G05B,H01L,Y02P

Abstract:
A method for automatically controlling defect-specification in a semiconductor manufacturing process, the method comprising:(A) sampling at least one sample wafer from a batch of wafers; (B) detecting the physical property of each sample wafer by utilizing a module to detect a position, number, size, and intensity signals of defect on the sample wafer; (C) comparing the sample wafer with a normal wafer to preliminarily classify the sample wafer according to the discrepancies of signals between the sample wafer and the normal wafer and create a defect map by utilizing the module, the defect map comprising a spatial pattern of defects on the sample wafer; (D) analyzing the preliminarily classified defect map by utilizing a defect management system to judge whether or not the sample wafer passes the detection; (E) executing a spatial pattern recognition procedure if the sample wafer cannot pass the detection by utilizing the defect management system to determine whether or not the defect map conforms to at least one of a plurality of specific patterns stored in the defect management system, each of the specific patterns corresponding to a defect type on the wafer, and each defect type corresponding to a related operator, a related equipment, and a related process module; (F) searching the specific pattern conforming to the defect map to ascertain the defect type on the sample wafer, and the related operator, the related equipment, and the related process module according to the specific pattern; and (G) sanding messages to an account of the related operator by the defect management system according to the defect type on the sample wafer so that the related equipment and the related process module are tuned by the related operator according to the detect type on the wafer.