Patent ID: 9087015
Filing Date: 2015-07-21
Classification: G06F

Abstract:
1. A data processing apparatus, comprising: an instruction execution section; instruction protection registers that each include an instruction address assignment section that stores instruction protection information that specify a partial address space in an instruction address space that stores only instructions executed by the instruction execution section; data protection registers that each include a data address assignment section that stores data protection information that specify a partial address space in a data address space that stores only data upon which an operation of the instruction execution section is performed and result data generated by the operation of the instruction execution section; a protection control information storage section that stores protection control information that indicates validation of entire protection of the instruction address space, independently of protection of the data address space, in terms of a whole of the instruction protection registers rather than in terms of respective instruction protection registers; and a protection violation determination section that determines whether to permit access from the instruction execution section to the instruction address space and the data address space based on at least one partial address space indicated by the instruction address assignment sections of the instruction protection registers and at least one partial address space indicated by the data address assignment sections of the data protection registers, and based on the protection control information.