Patent ID: 6891241
Filing Date: 2005-05-10
Classification: B82Y,H01L

Abstract:
1. A method of manufacturing a single transistor type magnetic random access memory device, the method comprising: (a) sequentially forming a gate dielectric layer and magnetic tunnel junction forming layers on a substrate; (b) forming a first insulating layer to cover the resultant layers of (a) on the substrate; (c) exposing an upper portion of the magnetic tunnel junction; (d) forming a word line on the exposed portion of the magnetic tunnel junction; (e) forming a second insulating layer on the first insulating layer to cover the word line; (f) forming a source and a drain by implanting dopants into portions of the substrate at both sides of the magnetic tunnel junction and the word line; (h) forming a third insulating layer, on the second insulating layer, which contacts the source and the drain and covers the stacked layers between the source and the drain; and (i) forming a bit line, on the third insulating layer, which contacts the drain.