Patent ID: 6284630
Filing Date: 2001-09-04
Classification: H01L

Abstract:
A method for fabricating shallow and abrupt drain and source extensions of a field effect transistor within an active device area of a semiconductor substrate, the method including the steps of:(A) forming a drain amorphous region by implanting a neutral species into a drain region of said field effect transistor at an angle directed toward a gate of said field effect transistor such that said drain amorphous region is a trapezoidal shape that extends to be sufficiently under said gate of said field effect transistor;(B) forming a source amorphous region by implanting said neutral species into a source region of said field effect transistor at an angle directed toward said gate of said field effect transistor such that said source amorphous region is a trapezoidal shape that extends to be sufficiently under said gate of said field effect transistor;(C) implanting a drain and source dopant into said drain amorphous region at an angle directed toward said gate of said field effect transistor;(D) implanting said drain and source dopant into said source amorphous region at an angle directed toward said gate of said field effect transistor;wherein said drain and source dopant implanted into said drain and source amorphous regions is contained within said drain and source amorphous regions after said steps C and D; and(E) applying a laser beam to said drain amorphous region and said source amorphous region such that said drain and source dopant are activated within said drain amorphous region and said source amorphous region in a laser thermal process;wherein said drain extension is formed by said activation of said drain and source dopant in said drain amorphous region during said laser thermal process;and wherein said source extension is formed by said activation of said drain and source dopant in said source amorphous region during said laser thermal process.