Patent ID: 6673720
Filing Date: 2004-01-06
Classification: H01L

Abstract:
A method for improving the reliability of flash memories, the method comprising:forming a stacked layer on a substrate, wherein the stacked layer comprises a polysilicon layer and a sacrificial layer formed atop the polysilicon layer; forming a HTO (high temperature oxide) film to cover the surface of the stacked layer and the substrate; depositing a dielectric layer on the HTO film; partially removing the dielectric layer and the HTO film to expose parts of the sacrificial layer while a part of the HTO film remains adjacent to the sidewall of the polysilicon layer; and completely removing the sacrificial layer; wherein the HTO film adjacent to the sidewall of the polysilicon layer reinforces the interface between the dielectric layer and the polysilicon layer to prevent acid-corroded seams being formed.