Patent ID: 8443317
Filing Date: 2013-05-14
Classification: G06F

Abstract:
1. A non-transitory computer-readable storage media comprising instructions for electronic design automation, the instructions when executed by a processor are configured to: receive a reference integrated circuit (IC) design generated from a register transfer level (RTL) design, the reference IC design comprising a plurality of first instances of combinational cells, a plurality of first instances of sequential cells, and a plurality of first nets interconnecting the first instances of combinational cells and the first instances of sequential cells; receive a retimed IC design generated from a synthesized IC design, the synthesized IC design generated from the RTL design, wherein the retimed IC design comprises a plurality of second instances of combinational cells, a plurality of second instances of sequential cells, and a plurality of second nets interconnecting the second instances of combinational cells and the second instances of sequential cells; receive a description of moves of retiming that were performed on the synthesized IC design to generate the retimed IC design, a move of retiming describing a movement of a sequential cell from the synthesized IC design across a combinational cell from the synthesized IC design; replace at least one of the plurality of first instances of sequential cells from the reference IC design with an associated replacement circuit based on the description of moves of retiming to create a transformed reference IC design; replace at least one of the plurality of second instances of sequential cells from the retimed IC design with an associated replacement circuit based on the description of moves of retiming to create a transformed retimed IC design; compare the transformed reference IC design and the transformed retimed IC design; and determine whether the transformed retimed IC design is equivalent to the transformed reference IC design based on the comparison.