Patent ID: 6344309
Filing Date: 2002-02-05
Classification: C09D,G03F,H05K

Abstract:
A method for preparing a wiring board comprising the steps of:(1) forming on a substrate a thin film of a polysilane composition comprising a polysilane and an amino group-containing alkoxysilane and contacting a palladium salt with a surface of the polysilane thin film to form a palladium colloid layer thereon, (2) forming a photosensitive resin layer on the polysilane thin film having the palladium colloid layer, selectively irradiating light to the layer, and developing the layer, to thereby form a predetermined pattern of channels in the photosensitive resin layer so that the polysilane thin film having the palladium colloid layer is exposed within the channels, and (3) contacting an electroless plating solution with the polysilane thin film having the palladium colloid layer exposed within the channels, for thereby forming a conductive metal layer within the channels.