Patent ID: 7853905
Filing Date: 2010-12-14
Classification: G06F

Abstract:
1. A method for prototyping of an electronic design comprising: assessing, by using a processor, a design logic associated with test structure parameters during the prototyping of the electronic design such that a dataflow diagram is established with the design logic of the electronic design based at least in part upon the test structure parameters, wherein the dataflow diagram is a functional representation of the design logic of the electronic design; translating the dataflow of the design logic into a prototype test structure for a prototype layout based at least in part upon a test structure model such that the design logic associated with the prototype test structure is projected into a physical object of the prototype layout; determining an impact of the prototype test structure upon the prototype layout, wherein the assessing, translating, and determining are performed in an architectural planning stage of the electronic design; and storing a result of the impact in a volatile or non-volatile computer-usable medium or displaying the result of the impact on a display device such that the result is provided to assist in design decisions.