Patent ID: 7385850
Filing Date: 2008-06-10
Classification: G11C

Abstract:
1. A method for programming cells in a destination page in a nonvolatile memory, and verifying if logic values stored in programmed cells of a source page of the nonvolatile memory have been correctly copied into corresponding cells of the destination page, the method comprising carrying out a global verify operation by: generating for each bitline of the destination page a respective bitline fail flag signaling if an unsuccessfully programmed cell is associated therewith; generating a global fail flag for the entire destination page if at least one unsuccessfully programmed cell is in the destination page by logically combining the bitline fail flags; if the global fail flag is generated, then reprogramming the at least one bitline corresponding to the at least one unsuccessfully programmed cell, and repeating the generating steps; establishing a first maximum number of times the global verify operation is to be consecutively repeated; if the global fail flag still signals an unsuccessfully programmed cell after the first maximum number of times the global verify operation has been performed, then carrying out a byte-by-byte verify operation for verifying that the bitlines of the destination page are programmed or their corresponding bitlines of a redundant bank of cells are programmed; and if a bitline is coupled to at least one unsuccessfully programmed cell, then reprogramming the bitline and repeating the byte-by-byte verify operation.