Patent ID: 9213347
Filing Date: 2015-12-15
Classification: G05F

Abstract:
1. A low-dropout (LDO) regulator comprising: an analog-to-digital converter (ADC) that converts a feedback analog voltage signal into a first digital signal, and generates a second digital signal corresponding to a difference between the first digital signal and a target digital signal; a phase synthesizing unit that generates a first control signal having a pulse width corresponding to error information in the second digital signal by performing phase synthesis on signals generated according to a skew delay within a clock cycle and a delay by one clock cycle based on the second digital signal; a charge pump circuit that selects a charge loop or a discharge loop based on polarity information in the second digital signal, and generates an output control voltage according to current that flows during a period corresponding to the pulse width of the first control signal in the selected loop; and an output circuit that generates an output voltage according to a switching operation performed on an input voltage based on the output control voltage, and generates the feedback analog voltage signal from the output voltage.