Patent ID: 8102056
Filing Date: 2012-01-24
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a first interlayer insulating film disposed over the semiconductor substrate; a second interlayer insulating film disposed between the semiconductor substrate and said first interlayer insulating film; a pad formed above the first interlayer insulating film; a third interlayer insulating film disposed between the first interlayer insulating film and the pad; a plurality of first interconnects which are disposed in said first interlayer insulating film and spaced apart from one another, said plurality of first interconnects being located directly below the pad; a plurality of second interconnects disposed in said second interlayer insulating film; a plurality of third interconnects disposed in the third interlayer insulating film; and at least two via contacts disposed directly below the pad so as to contact bottom surfaces of said plurality of first interconnects, wherein no via is disposed directly above said plurality of first interconnects being located directly below the pad, one of said plurality of second interconnects is directly connected to at least two of said plurality of first interconnects by said at least two via contacts, said at least two of said plurality of first interconnects being disposed directly above said one of said plurality of second interconnects, no interlayer insulating films having interconnects directly below the pad are disposed between the first interlayer insulating film and the pad, the plurality of third interconnects are not disposed directly below the pad, and a given one of the plurality of third interconnects which is the closest to the pad does not overlap with any of the plurality of first interconnects in plan view.