Patent ID: 9070674
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A silicon interconnect structure, comprising: a peripheral outer via in a silicon substrate; a solid core inner via in the silicon substrate, the solid core inner via coaxial with the peripheral outer via to form a coaxial via structure; a metal interconnect stack formed over a first surface of the peripheral outer via and the solid core inner via, at least portions of the metal interconnect stack forming an electrical connection with the peripheral outer via and the solid core inner via; first contact pads on a surface of the metal interconnect stack; second contact pads on an exposed surface of the peripheral outer via and the solid core inner via; and solder bumps and solder micro-bumps, the solder micro-bumps connecting the silicon interconnect structure to an integrated circuit and the solder bumps connecting the silicon interconnect structure to an integrated circuit package substrate.