Patent ID: 6492256
Filing Date: 2002-12-10
Classification: H01L

Abstract:
A method for forming an interconnect structure, comprising:providing a substrate; forming a sacrificial layer on the substrate; forming a sacrificial dielectric layer on the sacrificial layer, wherein the sacrificial dielectric layer has a thickness; patterning the sacrificial layer and the sacrificial dielectric layer to form an opening exposing the substrate; forming a conductive structure filling the opening; removing the sacrificial dielectric layer to expose the sacrificial layer; forming a conformal capping layer over the substrate to cover the conductive structure and the sacrificial layer; performing a consumption process to remove the sacrificial layer, so as to form an air gap surrounding the conductive structure; forming a conformal etching stop layer on the conformal capping layer; forming a second dielectric layer on the etching stop layer; patterning the second dielectric layer, the conformal etching stop layer, and the conformal capping layer to form an opening that exposes a portion of the conductive layer but not the air gap; and forming a plug filling the opening.