Patent ID: 9036766
Filing Date: 2015-05-19
Classification: G09G,G11C,H01L

Abstract:
1. A semiconductor device comprising a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor, wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, and a fixed potential is configured to be supplied to the other of the source and the drain of the first transistor, wherein a gate of the second transistor is electrically connected to a gate of the fifth transistor, wherein one of a source and a drain of the third transistor is electrically connected to the gate of the second transistor, wherein one of a source and a drain of the fifth transistor is electrically connected to a gate of the first transistor, wherein one of a source and a drain of the fourth transistor is electrically connected to a gate of the third transistor, and wherein the semiconductor device is designed so that clock signals are supplied to the other of the source and the drain of the third transistor.