Patent ID: 7370174
Filing Date: 2008-05-06
Classification: G06F

Abstract:
1. A method, comprising: identifying a plurality of pages of memory locations allocated to an input/output (I/O) device, wherein the memory locations within each page are contiguous and wherein each page of a plurality of said pages is of a first size and each page of a plurality of said pages is of a second size different from said first size; for each identified page, storing in a translation entry of a data structure table, a physical address of an identified page; assigning each identified page a page virtual address which identifies a data structure translation entry in which is stored the physical address of the identified page; and assigning each memory location a memory location virtual address which includes the page virtual address of the page containing the memory location, and a physical address offset relative to the page physical address of the page containing the memory location; wherein the size of the page containing the memory location addressed by the assigned memory location virtual address is equal to 2