Patent ID: 6223429
Filing Date: 2001-05-01
Classification: H01L,Y10T

Abstract:
A process for fabricating a semiconductor device, comprising the steps of:forming an organic, anisotropic conductive adhesive material on a first surface of a wiring board at its part where a semiconductor chip is mounted, wherein said organic, anisotropic conductive adhesive material has a modulus of elasticity of from 100 to 1,500 MPa at 40.degree. C. after joining and adhesive-fixing;the wiring board being provided at its connecting terminal with a metal bump which projects higher than at least a wiring portion, wherein said projecting metal bump is formed in a single-layer or multiple-layer construction of a metal or alloy selected from Cu, Cr, Ni, Pd, Au and a PbSn solder; andface-down heat contact bonding a semiconductor chip, having a connecting pad from the surface of which a metal oxide film as been removed, to the wiring board.