Patent ID: 6037210
Filing Date: 2000-03-14
Classification: H01L

Abstract:
A method of fabricating a semiconductor structure, comprising:providing a semiconductor substrate;forming a trench comprising a doped polycrystalline semiconductor electrode in said semiconductor substrate, said trench having two edges;growing a layer of epitaxial semiconductor above said substrate and above said trench, wherein said layer of epitaxial semiconductor comprises a single crystalline portion and a polycrystalline portion, wherein said polycrystalline portion extends exclusively over said polycrystalline semiconductor electrode in said trench between vertical axes extending from said two edges, and wherein said single crystalline portion extends over a portion of said polycrystalline portion between said vertical axes extending from said two edges;forming a node diffusion in said layer of epitaxial semiconductor having a first portion formed in an upper region of said polycrystalline portion of said layer and a second portion formed in an upper region of said single crystalline portion of said layer of epitaxial semiconductor which includes said portion which extends over said doped polycrystalline portion; anda gate having a gate edge aligned over one of said two trench edges.