Patent ID: 6246083
Filing Date: 2001-06-12
Classification: H01L

Abstract:
A gain cell, comprising:a write transistor having multiple sides, the write transistor having a body region and first and second source/drain regions, the write transistor further having a gate that is associated with a first side of the write transistor;a read transistor having multiple sides, the read transistor having a gate region, a body region and a first and second source/drain regions, wherein the read transistor and the write transistor are formed in a vertical pillar of single crystalline semiconductor material the extends outwardly from a semiconductor substrate;a charge storage node that surrounds a portion of the pillar adjacent to the second source/drain region of the write transistor;a write bit line coupled to the first source/drain region of the write transistor;a write wordline coupled to the gate of the write transistor;a read bit line coupled to the body region of the write transistor; anda read wordline coupled to second source/drain region of the read transistor.