Patent ID: 6163872
Filing Date: 2000-12-19
Classification: H04L,H04Q

Abstract:
A method of detecting bit errors in ATM useful cells, each ATM useful cell having a useful information field and a cell head, on an ATM transmission link using monitoring OAM cells comprising the steps of:generating first control bits by evaluating bits of the ATM useful cells with selected target addresses in the cell head prior to feeding the ATM useful cells into the ATM transmission link;first encoding the first control bits further to generate second control bits;second encoding the first control bits additionally to generate third control bits;entering the first, second and third control bits into the monitoring OAM cells;feeding the monitoring OAM cells with the first, second and third control bits into the ATM transmission link;separating the monitoring OAM cells from the ATM useful cells at a receiver decoder;checking the monitoring OAM cells to identify, on the basis of the second and/or third control bits, error-free monitoring OAM cells where the first control bits were transmitted without errors;correcting errors in the monitoring OAM cells where the first control bits were transmitted with errors using the second and/or third control bits;converting the monitoring OAM cells from the correcting step into error-free monitoring OAM cells; anddetermining bit errors in the ATM useful cells using the first control bits from the error-free monitoring OAM cells.