Patent ID: 6696865
Filing Date: 2004-02-24
Classification: G06F,G11C,H01L,H03K

Abstract:
A method to reduce a power consumption of a semiconductor integrated circuit comprising:providing the semiconductor integrated circuit comprising a plurality of circuit blocks including first and second circuit blocks, each of which has a standby state and an active state; setting the first circuit block to the standby state while the second circuit block is in the active state; and wherein a substrate voltage of a first MOS transistor of the first circuit block is set so that a threshold voltage of the first MOS transistor in the standby state becomes higher than the threshold voltage of the first MOS transistor in the active state, and a substrate voltage of a second MOS transistor of the second circuit block is set so that a threshold voltage of the second MOS transistor in the standby state becomes higher than the threshold voltage of the second MOS transistor in the active state.