Patent ID: 6576514
Filing Date: 2003-06-10
Classification: H01L

Abstract:
A method of forming a three-dimensional polysilicon layer on a semiconductor wafer, the semiconductor wafer comprising:a substrate; a first polysilicon layer positioned in a predetermined area on the surface of the substrate, the first polysilicon layer having an approximately rectangular cross-section; and a sacrificial layer positioned on the first polysilicon layer; the method comprising: forming a dielectric layer on the surface of the semiconductor wafer, the dielectric layer covering the substrate and the sacrificial layer, the top surface of the dielectric layer on the surface of the substrate being above the top surface of the first polysilicon layer and below the top surface of the sacrificial layer; removing the dielectric layer from an upper portion of the walls of the sacrificial layer; forming a passivation layer on the surface of the dielectric layer, the passivation layer contacting the exposed walls of the upper portion of the sacrificial layer; performing a chemical mechanical polishing process to remove both the passivation layer and the dielectric layer over the sacrificial layer down to a predetermined height; removing the dielectric layer from the sacrificial layer; removing the passivation layer from the surface of the semiconductor wafer and removing the sacrificial layer from the first polysilicon layer to form a recess, the first polysilicon layer forming the bottom of the recess, and the dielectric layer forming the walls of the recess; and forming a second polysilicon layer in a predetermined area on the surface of the semiconductor wafer to complete the three-dimensional polysilicon layer, the second polysilicon layer filling the recess and electrically connecting to the first polysilicon layer.