Patent ID: 7095255
Filing Date: 2006-08-22
Classification: H03K

Abstract:
1. A circuit, comprising: a first and second pull-up transistors, said first pull-up transistor having a source coupled to a first power supply and a drain to output a first output signal, and said second pull-up transistor having a source coupled to said first power supply and a drain to output a second output signal, with said first output signal comprising an inverse of said second output signal; a set of four transistors arranged as a pair of cross coupled inverters which are coupled to a second power supply and a third power supply; first and second pass gate transistors, with each pass gate transistor having a gate to receive an input signal, with said first pass gate transistor having a source coupled to said drain for said first pull-up transistor and a drain coupled to said cross coupled inverters, and said second pass gate transistor having a source coupled to said drain for said second pull-up transistor and a drain coupled to said cross coupled inverters; and a power gate transistor having a gate coupled to said input signal, a drain coupled to said cross coupled inverters, and a source coupled to said second power supply.