Patent ID: 8946006
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure comprising: forming a disposable material stack on a semiconductor substrate; forming a single unitary disposable dielectric spacer on sidewalls of said disposable material stack, wherein a base of the single unitary disposable dielectric spacer is in direct contact with the semiconductor substrate, and wherein said single unitary disposable dielectric spacer is composed of a single material; forming planar source/drain regions in said semiconductor substrate, said planar source/drain regions laterally surrounding a body region in said semiconductor substrate underlying said disposable material stack; forming raised source/drain regions laterally spaced from the single unitary disposable dielectric spacer and on said planar source/drain regions; removing said single unitary disposable dielectric spacer to form a cavity between said disposable material stack and said raised source/drain regions, wherein the removing of the single unitary disposable dielectric spacer exposes peripheral portions of said body region and said planar source/drain regions; forming source/drain extension regions in said semiconductor substrate by introducing dopants into portions of said body region and said planar source/drain regions through said cavity; forming a gate-level dielectric layer over said source/drain extension regions, said planar source/drain regions and said raised source/drain regions; and replacing said disposable material stack with a gate stack including a gate dielectric and a gate electrode.