Patent ID: 7061500
Filing Date: 2006-06-13
Classification: G06T

Abstract:
1. A graphics processing method, comprising the steps of: (a.) caching texture memory fetches, using a cache tag assignment which is unique mapped, the cache tag assignment having a tag length and mip mapping addresses, while (b.) generating condensed cache tags, by removing two bits from the tag length by means of a remapping which exploits different address resolutions implied by level of detail settings in different mip mapping processes to re-encode the mip mapping addresses (c.) and using the condensed tags for caching step (a.), (d.) coding a map level identifier so that a largest map level uses 1 bit to designate a map level and ((m−i)+(n−j)) bits to specify said addresses on said x- and y-axis, a second largest map level uses 3 bits to designate a map level and ((m−i)+(n−j)+2) bits to specify the addresses on the x-axis and y-axis, and successively smaller map levels use greater than 3 bits to designate a map level and less than ((m−i)+(n−j)−2) bits to specify the addresses on the x-axis and y-axis.