Patent ID: 7279412
Filing Date: 2007-10-09
Classification: H05K,Y10T

Abstract:
1. A method for manufacturing a parallel multi-layer printed circuit board, comprising the steps of: (A) forming a predetermined number of circuit layers, including the sub-steps of: (B) forming a predetermined number of insulating layers, including the sub-steps of: (C) alternately arranging the circuit layers and the insulating layers at predetermined positions; (D) pressing the arranged circuit and insulating layers to fill via holes of circuit layers with a conductive paste of the insulating layers; and (E) forming circuit patterns on the outermost layers of a board obtained by pressing the circuit layers and the insulating layers, wherein in the sub-step (c) of the step (A), a circuit pattern is formed on one surface of the copper stack plate so as to form the circuit layer arranged on an outermost layer of the printed circuit board, and circuit patterns are formed on both surfaces of the copper stack plate so as to form the circuit layer arranged on an internal layer of the printed circuit board.