Patent ID: 8049215
Filing Date: 2011-11-01
Classification: H01J,H01L

Abstract:
1. A semiconductor device comprising: a gate insulating layer over a gate electrode layer; a microcrystalline semiconductor layer which is on and in direct contact with the gate insulating layer and overlaps the gate electrode layer; a semiconductor layer over and in direct contact with the gate insulating layer so as to cover the microcrystalline semiconductor layer; an amorphous semiconductor layer on and in direct contact with the semiconductor layer; and a pair of impurity semiconductor layers forming a source region and a drain region, on and in direct contact with the amorphous semiconductor layer, wherein at least part of each of the pair of impurity semiconductor layers overlaps the gate electrode layer, wherein at least part of the microcrystalline semiconductor layer is provided in part of a channel, and wherein the semiconductor layer includes a plurality of crystalline regions existing in a dispersed manner in an amorphous structure.