Patent ID: 6661274
Filing Date: 2003-12-09
Classification: H03K

Abstract:
A level converter circuit comprising:an input terminal; a first output terminal and a second output terminal each of which outputs a differential signal; a logical element which outputs a reference potential or a first power supply potential based on the potential of the input signal received from said input terminal; a first N-channel field effect transistor which outputs the reference potential when said logical element has output the first power supply potential; a first P-channel field effect transistor which received the reference potential output by said first N-channel field effect transistor, and outputs a second power supply potential to said first output terminal; a second N-channel field effect transistor which outputs the reference potential to said second output terminal when said logical element has output the first power supply potential; a third N-channel field effect transistor which outputs the reference potential to said first output terminal when said logical element has output the reference potential; a fourth N-channel field effect transistor which outputs the reference potential when said logical element has output the reference potential; and a second P-channel field effect transistor which receives the reference potential output by said fourth N-channel field effect transistor, and outputs the second power supply potential to said second output terminal.