Patent ID: 6516392
Filing Date: 2003-02-04
Classification: G11C

Abstract:
An address and data transfer circuit for connecting an individual single-port memory to an N number of ports of a multi-port memory device having a plurality of single-port memories, said circuit comprising:enable circuit means connected to a selected single-port memory of the multi-port memory device for enabling said single-port memory in accordance with an access requirement from a corresponding port out of a plurality of external ports; active address selecting circuit means, responsive to activation of said enabling circuit means, for selecting an address from said corresponding port and transferring the address to said single port memory; and active data detect circuit means, responsive to activation of said enabling circuit means, for selecting a data from said corresponding port and transferring the data to or from said single port memory, wherein said address and data transfer circuit connects said selected single-port memory to the N number of ports independent of the other single-port memories of the multi-port memory device.