Patent ID: 7370175
Filing Date: 2008-05-06
Classification: G06F

Abstract:
1. An apparatus, comprising: an integrated circuit (IC) comprising a plurality of processor cores, said IC having a main partition comprising at least one processor core capable of executing a main operating system and an embedded partition comprising at least one different processor core, said main partition and embedded partition are capable of communicating with each other through a bridge, the embedded partition is capable of performing the following operations: mapping two or more mass storage systems, coupled to the embedded partition, into a single logical device; presenting the logical device to the bridge; and receiving at least one I/O request, generated by the main partition and directed to the logical device, and in response to said I/O request, said embedded partition is further capable of communicating with at least one of the two or more mass storage systems using at least one communication protocol to process said I/O request; and reporting the status of said I/O request to the main partition, via said bridge.