Patent ID: 6690219
Filing Date: 2004-02-10
Classification: G11B,H03K,H03L

Abstract:
A digital wave generating apparatus, wherein a period of a basic clock signal is divided into a plurality of time points, and the digital wave is triggered at the time points, the apparatus comprising:a delay phase lock loop, for generating a plurality of delayed clock signals according to the basic clock signal; a first multiplexer, coupled to the delay phase lock loop, for outputting a first output signal, which is one of the delayed clock signals, according to a first select signal; a second multiplexer, coupled to the delay phase lock loop, for outputting a second output signal, which is one of the delayed clock signals, according to a second select signal; a first edge-triggered flip-flop, for receiving the first output signal of the first multiplexer; a second edge-triggered flip-flop, for receiving the second output signal of the second multiplexer; and a first logic gate, for outputting the digital wave according to the outputs of the first and the second edge-triggered flip-flops.