Patent ID: 6522304
Filing Date: 2003-02-18
Classification: H01Q

Abstract:
A method of producing an integrated circuit structure comprising the steps of:providing a substrate including an electronic component; depositing a first insulating layer on said substrate; patterning said first insulating layer to form first openings for a vertical waveguide portion positioned over said electronic component and a bottom horizontal portion of a horn-shaped waveguide portion, said horn-shaped waveguide portion having an apex positioned over said vertical waveguide portion; depositing a conductive material in said first openings to form a vertical waveguide structure and a bottom horizontal waveguide structure; removing excess conductive material from overtop said first insulating layer to form a first planar surface; depositing a second insulating layer on said first planar surface; patterning said second insulating layer to form second openings for sidewall portions and a top horizontal portion of said horn-shaped waveguide, said second openings aligned with said bottom horizontal waveguide structure; depositing said conductive material in said second openings to form an enclosed waveguide cavity comprising material from said second insulating layer; and removing excess conductive material from overtop said second insulating layer.