Patent ID: 7016442
Filing Date: 2006-03-21
Classification: H04L

Abstract:
1. A synchronization establishment apparatus operable to establish synchronization from a received signal that contains a synchronization establishment signal whose change in amplitude periodically alternates between positive and negative, said synchronization establishment apparatus comprising: positive/negative change timing detection means for detecting a timing of changes in the positive/negative polarity of the change in amplitude of the synchronization establishment signal contained in the received signal; and synchronization establishment means for establishing synchronization from the received signal based on the timing detected by said positive/negative change timing detection means; wherein a preamble pattern in which 1001 is repeated in π/4-shift QPSK is used as the synchronization establishment signal, and a burst signal containing the preamble pattern is used as the received signal; wherein said synchronization establishment apparatus further comprises: wherein said positive/negative change timing detection means comprises a change point extraction circuit operable to, based on the first or second value outputted from said polarity bit converter, extract the timing at which the value of the waveform of the amplitude difference based on the squared value crosses a zero point; wherein said synchronization establishment apparatus further comprises a change point measurement circuit operable to average the positive/negative change point timing of the extracted amplitude difference based on the squared value; wherein said synchronization establishment means comprises a clock synchronization establishment circuit operable to, based on the value of the positive/negative change point timing averaged by said change point measurement circuit, establish clock synchronization; and wherein said synchronization establishment apparatus further comprises a timing generation circuit operable to, based on the timing at which the received burst signal starts, determine a position to reset a clock as a starting position for establishing synchronization for the received signal, and outputting a timing signal indicating the starting position to said amplitude difference detection circuit.