Patent ID: 6756627
Filing Date: 2004-06-29
Classification: H01L

Abstract:
A charge storage device comprising: a landing pad structure of a first electrically conductive material disposed conformably upon a semiconductor substrate topography, said semiconductor substrate topography including a planar surface and two raised structures extending therefrom, and a semiconductor active area disposed therebetween, said landing pad structure having a top portion that terminates at a peripheral boundary that is disposed upon a topmost surface of each of said two raised structures;a first dielectric film disposed upon said semiconductor substrate topography and upon a portion of said landing pad structure, said first dielectric film having a recess therein above said active area, said recess comprising an open space between said two raised structures, wherein said open space is narrower than said recess, said open space being defined by lateral walls that extend down to a bottom on said semiconductor substrate topography, and such that said landing pad structure extends upon the bottom and lateral walls of said open space without filling completely said open space, wherein the recess in the first dielectric film has a width of no greater than about 0.2 microns; and a projecting structure of a second electrically conductive material extending from within said recess and projecting from an interface with the top portion of said landing pad structure inside the peripheral boundary thereof, wherein said projecting structure is in contact with said first dielectric film, and such that a portion of said landing pad structure that is situated upon said raised structures extends beyond said interface between said projecting structure and said landing pad structure.