Patent ID: 7602640
Filing Date: 2009-10-13
Classification: G11C

Abstract:
1. A non-volatile storage element comprising: a first data terminal and a second data terminal; a first MOS transistor and a second MOS transistor, the first MOS transistor and the second MOS transistor having a first conductivity type; the first MOS transistor and the second MOS transistor having source terminals connected to a first voltage terminal; the first MOS transistor having a drain terminal connected to the first data terminal; the second MOS transistor having a drain terminal connected to the second data terminal; the first MOS transistor having a gate terminal cross-connected to the drain terminal of the second MOS transistor; the second MOS transistor having a gate terminal cross-connected to the drain terminal of the first MOS transistor; a third MOS transistor and a fourth MOS transistor, the third MOS transistor and the fourth MOS transistor having floating gates and having a second conductivity type; the third MOS transistor having a drain terminal connected to the first data terminal; the fourth MOS transistor having a drain terminal connected to the second data terminal; the third MOS transistor having a gate terminal cross-connected to the drain terminal of the fourth MOS transistor; the fourth MOS transistor having a gate terminal cross-connected to the drain terminal of the third MOS transistor; a fifth MOS transistor and a sixth MOS transistor having the second conductivity type; the fifth MOS transistor and the sixth MOS transistor having source terminals connected to a second voltage terminal; the fifth MOS transistor and the sixth MOS transistor having gate terminals connected to a first common switching line; the fifth MOS transistor and the sixth MOS transistor having well terminals connected to a common control line configured to supply, to the wall terminals, a programming voltage in a write mode and a first supply voltage in a read mode; the fifth MOS transistor having a drain terminal connected to the source terminal of the third MOS transistor; and the sixth MOS transistor having a drain terminal connected to the source terminal of the fourth MOS transistor.