Patent ID: 6077762
Filing Date: 2000-06-20
Classification: H01L,Y10S

Abstract:
A method for making reliable interconnect structures on a semiconductor substrate having a first dielectric layer, comprising:plasma patterning a first metallization layer over the first dielectric layer;forming a second dielectric layer over the first metallization layer and the first dielectric layer,forming a plurality of tungsten plugs in the second dielectric layer, such that each of the plurality of tungsten plugs is in electrical contact with the first metallization layer;plasma patterning a second metallization layer over the second dielectric layer and the plurality of tungsten plugs, such that at least one of the tungsten plugs is not completely covered by the second metallization layer and a positive charge is built-up on at least part of the second metallization layer; andcontacting the second metallization layer with a liquid metal that is electrically grounded so that the positive charge that is built-up on the at least part of the second metallization layer is neutralized.