Patent ID: 6809016
Filing Date: 2004-10-26
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device, the method comprising:forming a substrate comprising a semiconductor layer of silicon (Si) having a strained lattice on a layer of silicon-germanium (SiGe); forming a gate electrode, with side surfaces, on an upper surface of the substrate with a gate dielectric layer therebetween; ion implanting arsenic (As) into the substrate to form source/drain extension implants having junctions with the strained Si and SiGe layers under the side surfaces of the gate electrode; ion implanting boron impurities into the substrate at the junctions to form diffusion stop implants which inhibit diffusion of As; and heating to form activated As source/drain extensions, wherein the diffusion stop implants prevent As diffusion during heating.