Patent ID: 8026546
Filing Date: 2011-09-27
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a first stack unit with a first selection transistor and a second selection transistor formed on a semiconductor substrate; and a second stack unit with first insulating layers and first conductive layers alternately stacked on the upper surface of the first stack unit, the second stack unit including a second insulating layer vertically formed in contact with side walls of the first insulating layers and the first conductive layers, a charge storage layer vertically formed in contact with the second insulating layer for storing electrical charges, a third insulating layer vertically formed in contact with the charge storage layer, and a first semiconductor layer formed in contact with the third insulating layer so as to extend in a stacking direction, with one end connected to one diffusion layer of the first selection transistor and the other end connected to a diffusion layer of the second selection transistor.