Patent ID: 6346728
Filing Date: 2002-02-12
Classification: H01L

Abstract:
A semiconductor device having a plurality of transistor units each of which is constituted by a unit prepared by arranging a plurality of unit cells each made up of a drain, gate, and source adjacent to each other on a major surface of a semiconductor substrate, a gate extraction electrode which extends in a direction perpendicular to a longitudinal direction of the gate and is commonly connected to the gates of the unit cells, a drain extraction electrode which is positioned at a side where said drain extraction electrode faces said gate extraction electrode via said unit, extends in a direction perpendicular to a longitudinal direction of the drain, and is commonly connected to the drains of the unit cells, a gate pad connected to said gate extraction electrode, and a drain pad connected to said drain extraction electrodes,wherein said gate pads of adjacent transistor units are connected to each other by a gate extraction electrode connection wiring line having a resistor of 0.6 to 10 &OHgr;, and said drain pads are connected to each other by a drain extraction electrode connection wiring line.