Patent ID: 9059215
Filing Date: 2015-06-16
Classification: H01L

Abstract:
1. A method for adjusting low temperature poly-silicon thin film transistor (LTPS TFT) threshold voltage, the method comprising the steps of: (a) forming a poly-silicon layer on a substrate; from bottom to top, depositing a first dielectric layer and a second dielectric layer on the poly-silicon layer in sequence; and then forming a metal layer on the second dielectric layer; (b) etching the metal layer and the second dielectric layer with a patterned photoresist coated on the metal layer to form a transition gate and a second gate insulating film respectively; (c) etching an edge portion of two opposing sides of the patterned photoresist and the transition gate to change a width of the patterned photoresist and the transition gate from a first width to a second width shorter than the first width in order to form a metal gate; wherein, the first dielectric layer is simultaneously etched in step (c) to form a first gate insulating film which is between a local area of the poly-silicon layer and the second gate insulating film, and to form a reserve layer above other areas of the poly-silicon layer; and (d) forming a low concentration doped region in the poly-silicon layer below a portion of a composite gate insulating film composed of the first gate insulating film and the second gate insulating film not covered by the metal gate by utilizing the metal gate and the composite gate insulating film a mask in a doping process and by utilizing a self-aligned process; and forming a high concentration doped region in the poly-silicon layer below the reserve layer; wherein the low concentration doped region and the high concentration doped region constitute a source and a drain having a stepped doping concentration.