Patent ID: 6664170
Filing Date: 2003-12-16
Classification: H01L

Abstract:
A method for forming a device isolation layer of a semiconductor device, comprising the steps of:providing a silicon substrate having a substructure of a predetermined configuration; depositing a nitride layer on a top of the silicon substrate; forming a trench on a device isolation region of the silicon substrate; depositing a gap filling oxide layer on the trench and a portion of the silicon substrate which does not form the trench; forming a photoresist pattern on the gap filling oxide layer of the device isolation region; oxidizing the photoresist pattern by performing a first oxidation process; removing a portion of the gap filling oxide layer by using the oxidized photoresist pattern as a mask to form a first intermediate structure; planarizing the first intermediate structure to a top of the nitride layer by using a chemical mechanical polishing process; removing the nitride layer to form a second intermediate structure; forming an amorphous silicon layer on a top of the second intermediate structure; etching a front of the amorphous silicon layer to form an amorphous silicon spacer on a side wall of an extruded field oxide layer; and oxidizing the spacer by performing a second oxidation process.