Patent ID: 6040237
Filing Date: 2000-03-21
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor component, said method comprising the steps of:forming a lower doped layer of the first conducting type in a silicon carbide wafer at the surface of the wafer;forming a higher doped anode layer of the second conducting type at the surface of and in said silicon carbide wafer, said lower doped layer and said anode forming a planar pn junction;masking an area of the wafer adjacent a prospective first zone not to be implanted; andimplanting an implant in the exposed area of the wafer, thus forming a first junction termination extension zone of the second conducting type surrounding the anode, wherein the implantation dose is such that the effective sheet charge density in the first zone is at most equal to the characteristic sheet charge density Q.sub.0, corresponding to a doping such that the zone is completely depleted at full design voltage.