Patent ID: 6346480
Filing Date: 2002-02-12
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device; which comprises the steps of:forming, on a semiconductor substrate having an insulating surface, a multi-layered structure comprising a barrier layer, an interconnection metal layer made of Al or an alloy whose main component is Al, a Ti layer to lie over said interconnection metal layer, an anti-reflection layer to lie over said Ti layer and a SiO2 layer to lie over said anti-reflection layer; patterning the SiO2 layer, the anti-reflection layer and the Ti layer to form a patterned structure in said multi-layered structure into a shape of an interconnection pattern; carrying out a heat treatment in which said patterned structure is heated so as to bring about an alloying reaction between Al in said interconnection metal layer and Ti layer, at least in a vicinity of an interface between said interconnection metal layer and Ti layer, and form an AlTi alloy layer; patterning the interconnection metal layer and the barrier layer, using said patterned SiO2 layer as a mask; growing an interlayer insulating film, burying said patterned interconnection metal layer; planarizing the interlayer insulating film; and carrying out another heat treatment in order to degas the interlayer insulating film.