Patent ID: 6400197
Filing Date: 2002-06-04
Classification: G06F,H03L

Abstract:
A delay device having a delay lock loop therein capable of receiving an external input signal and outputting a delayed signal, comprising:a phase detector having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a complementary signal of a reference signal; a counter having an input terminal and an output terminal, wherein the input terminal is coupled to the output terminal of the phase detector for changing a count value at its output terminal; a delay element having an input terminal, an output terminal and a control terminal, wherein the input terminal receives either the external input signal or the reference signal, the output terminal is coupled to the second input terminal of the phase detector, the output terminal outputs the delayed signal, the control terminal is coupled to the output terminal of the counter, and the counter value determines a pre-defined period between the external input signal and the delayed signal such that the external input signal is delayed by the delay period as the delayed signal output; and a multiplexer having a first input terminal, a second input terminal, an output terminal and a control terminal such that the output terminal is coupled to the input terminal of the delay element, the first input terminal is coupled to the external input signal, the second input terminal is coupled to the reference signal.