Patent ID: 7423289
Filing Date: 2008-09-09
Classification: G02F,H01L

Abstract:
1. A thin film transistor (TFT), comprising: a gate electrode with an island shape formed on a substrate; an insulating layer covering the gate electrode; a semiconductor layer with an island shape formed on the insulating layer, and positioned directly above the gate electrode; a source doped silicon layer and a drain doped silicon layer formed on the semiconductor layer, a channel being defined between the source doped silicon layer and the drain doped silicon layer to expose the semiconductor layer therein; first and second sacrifice layers with island shapes respectively formed on the source doped silicon layer and drain doped silicon layer and formed over the semiconductor layer, the first and the second sacrifice layers being spaced apart by the channel and further separate from the insulating layer in their entirety, wherein an entire bottom of the first and second sacrifice layers is higher than an top of the semiconductor layer; a source electrode formed above the first sacrifice layer and the source dope silicon layer; and a drain electrode formed above the second sacrifice layer and the drain doped silicon layer, wherein the first sacrifice layer is only formed on a portion of a doped silicon layer chosen between the source doped silicon layer and the drain doped silicon layer, and the respective source or drain electrode directly contacts a portion of the doped silicon layer not covered by the respective first sacrifice layer or second sacrifice layer.