Patent ID: 6190953
Filing Date: 2001-02-20
Classification: H01L

Abstract:
A method for producing a semiconductor device, said method comprising the steps of:forming a MOS transistor on a semiconductor substrate so that said MOS transistor has a gate insulating film, a gate electrode and a pair of source/drain regions;forming an interlayer insulating film thereon;forming first and second openings in said interlayer insulating film so that both of said gate electrode and one of said source/drain regions are exposed by said first opening and the surface of said semiconductor substrate is exposed by said second opening;embedding conductive materials in said first and second openings of said interlayer insulating film;performing the etch back of said conductive materials so that said conductive materials in said first and second openings are level with said interlayer insulating film;forming a second insulating film thereon;forming a wiring embedding groove in said second insulating film; andembedding a wiring material in said groove.