Patent ID: 6717180
Filing Date: 2004-04-06
Classification: H01L

Abstract:
A three-dimensional IC comprising:at least a first FET comprising a first channel and a first gate, and a second FET comprising a second channel and a second gate on a single crystal substrate; an insulating film over the first FET and the second FET; and at least a first TFT comprising a first gate electrode and a second TFT comprising a second gate electrode on the insulating film, wherein the first channel region and the second channel region are not overlapped with either the first gate electrode of the first TFT or the second gate electrode of the second TFT, and wherein the first gate electrode of the first TFT is electrically connected to an impurity region of the first and second FETs, and the second gate of the second FET is electrically connected to an impurity region of the first and second TFTs.