Patent ID: 8841181
Filing Date: 2014-09-23
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising: forming, on a substrate with a first area and a second area, a gate layer, a first protective layer doped with carbon, and a hard mask layer in sequence; patterning the hard mask layer, the first protective layer and the gate layer to form a first stack in the first area and a second stack in the second area; forming a second protective layer on sidewalls of the first and the second stacks; forming a blocking layer in the first area and a first spacer on a sidewall of the second protective layer on the sidewall of the second stack in the second area; forming a semiconductor compound layer in the substrate beside the first spacer; removing the blocking layer and the first spacer; removing the hard mask layer in the first stack and the second stack; forming a contact etching stop layer over the substrate covering the first protective layer in the first stack and the second stack, after the hard mask layer in the first stack and the second stack is removed; forming a dielectric layer on the contact etching stop layer; and planarizing the dielectric layer using the contact etching stop layer above the first protective layer as a stop layer.