Patent ID: 9141563
Filing Date: 2015-09-22
Classification: G06F

Abstract:
1. A memory system connectable to a host comprising: a first nonvolatile memory; a second nonvolatile memory; and a memory controller comprising a frontend part configured to communicate with the host, a first backend part configured to control the first nonvolatile memory, and a second backend part configured to control the second nonvolatile memory, wherein the frontend part is configured to: transmit a second data transfer request for transferring data in which the second backend part read from the second nonvolatile memory in accordance with the second command from the second backend part to the frontend part; accept the first and second data transfer requests when the frontend part sequentially receives the first and second data transfer requests; transmit first data items to the host when receiving the first data items from the first backend part, the first data items being data read from the first nonvolatile memory in accordance with the first data transfer request; transmit second data items to the host when receiving the second data items from the second backend part, the second data items being data read from the second nonvolatile memory in accordance with the second data transfer request; transmit a part of the second data items to the host, when receiving the part of the second data items from the second backend part, within a time period in which none of the first data items is received from the first backend part; transmit a first execution result corresponding to the first command received from the host, when receiving a third data item from the first backend part, the third data item indicating that transfers of the first data items have been completed; and transmit a second execution result corresponding to the second command received from the host, when receiving a fourth data item from the second backend part, the fourth data item indicating that transfers of the second data items have been completed.