Patent ID: 9202696
Filing Date: 2015-12-01
Classification: H01L

Abstract:
1. A method for forming a semiconductor structure, said method comprising: providing a semiconductor substrate; defining an antenna cell on a surface of said semiconductor substrate; forming a plurality of substantially parallel polysilicon lines having substantially the same length and extending completely through said cell; forming a dummy transistor using one said polysilicon line as a dummy gate thereof, said dummy transistor including said dummy gate disposed over a gate dielectric disposed over a continuous source/drain dopant impurity region; and forming a metal lead coupled to an active transistor gate and further coupled to a diode formed of said dummy transistor, wherein said dummy gate is coupled to said semiconductor substrate and said metal lead is directly coupled to said continuous source/drain dopant impurity region, wherein said continuous source/drain dopant impurity region is a single unitary region that extends underneath and past opposed sides of said dummy gate and all of said single unitary region has the same dopant impurity type.