Patent ID: 6320233
Filing Date: 2001-11-20
Classification: H01L

Abstract:
A CMOS semiconductor device, comprising:a semiconductor substrate of a first conductivity type;a well region of a second conductivity type formed selectively in a surface region of said semiconductor substrate;a first shallow well region of the second conductivity type formed selectively in a surface region of said well region in a manner to partly overlap with said well region;a source region and a drain region of a first MOS transistor, said source and drain regions made of diffusion regions of the first conductivity type selectively formed in a surface region of said first shallow well region;a first gate electrode formed above a channel region between the source region and drain region of said first MOS transistor with a gate insulating film interposed therebetween;a first shallow well leading region made of a diffusion region of the second conductivity type selectively formed in a surface region of said well region;a first shallow trench isolating region formed in a surface region of the well region, said first shallow trench isolating region being deeper than said first shallow well region, between the diffusion region of the first conductivity type of the first MOS transistor and the first shallow well leading region;a source region and a drain region of a second MOS transistor made of diffusion regions of the second conductivity type that are formed in a surface region of said semiconductor substrate;a second gate electrode formed above a channel region between the source region and drain region of the second MOS transistor with a gate insulating film interposed therebetween; anda second shallow trench isolating region for separating the CMOS transistor formed in a surface region of the semiconductor substrate, said second shallow trench isolating region being deeper than said first shallow well region, between said first shallow well region and the diffusion region of the second conductivity type of the second MOS transistor.