Patent ID: 6246221
Filing Date: 2001-06-12
Classification: G05F

Abstract:
A modified Miller-compensated voltage regulator having a unity gain frequency, the voltage regulator comprising:an input error amplifier stage comprising a differential amplifier having an output, a first input and a second input;a non-inversion variable gain amplifier stage having an output, a first input in communication with the differential amplifier output, and a second input connected to a dc voltage referenced to ground;a unity gain buffer amplifier stage having an output, a first input in communication with the non-inversion amplifier stage output and a second input coupled to the output of the unity gain buffer amplifier stage;a power PMOS having a gate in communication with the unity gain buffer amplifier stage output, a source coupled to a supply voltage and a drain that is configured to provide a regulated output voltage; anda compensating capacitor coupled at one end to the drain of the power PMOS and coupled at its other end to the output of the input error amplifier stage to provide a compensation loop having internal poles and a unity gain frequency associated therewith.