Patent ID: 8669593
Filing Date: 2014-03-11
Classification: H01L

Abstract:
1. A semiconductor integrated circuit, comprising: an internal circuit; a first I/O cell which is placed in an area surrounding said internal circuit and performs at least one of input and output of a signal to and from said internal circuit; a second I/O cell which is placed adjacent to said first I/O cell, in a first direction, in the area surrounding said internal circuit, and performs at least one of input and output of a signal to and from said internal circuit; a first pad and a second pad which are connected to said first I/O cell; a first connection unit connected to said first pad and configured to allow connection between said first pad and an outside of said semiconductor integrated circuit; and a second connection unit connected to said second pad and configured to allow connection between said second pad and the outside of said semiconductor integrated circuit, wherein: a first connection point between said first pad and said first connection unit is located in an area where said first I/O cell is placed, and a second connection point between said second pad and said second connection unit is located in an area where said second I/O cell is placed.