Patent ID: 8110917
Filing Date: 2012-02-07
Classification: H01L,H05K,Y10T

Abstract:
1. A package substrate comprising: a resin insulating substrate; an outermost interlayer resin insulating layer formed over the resin insulating substrate; a pad structure formed on the outermost interlayer resin insulating layer, the pad structure comprising an electroless copper plated film and an electrolytic copper plated film on the electroless copper plated film; a solder resist formed on the outermost interlayer resin insulating layer and the pad structure, the solder resist having an opening exposing a partially exposed portion of the pad structure such that a non-exposed portion of the pad structure is in contact with the solder resist; a conductive connecting pin configured to establish an electrical connection with another substrate, the conductive connecting pin being secured to the partially exposed portion of the pad structure via a solder, the solder being disposed over at least one metal layer formed on the partially exposed portion of the pad structure and not formed on the non-exposed portion of the pad structure; and a via hole formed through the outermost interlayer resin insulating layer and configured to electrically connect the pad structure to at least one conductive circuit formed below the outermost interlayer resin insulating layer, the via hole being positioned directly below the pad structure and comprising an electroless copper plated film and an electrolytic copper plated film on the electroless copper plated film.