Patent ID: 7664259
Filing Date: 2010-02-16
Classification: H04L

Abstract:
1. A device comprising: a first memory operated to store a set of system parameters of a cryptosystem over a finite field, wherein a public key of the cryptosystem over the finite field comprises at least two elements of the finite field; a second memory operated to store a first portion of the public key of the cryptosystem, wherein the first portion of the public key comprises fewer than all of the bits of each of the at least two elements of the finite field; a port operated to receive at least a second portion of the public key of the cryptosystem, the first and second portions of the public key forming a validated public key of the cryptosystem, wherein the validated public key of the cryptosystem comprises all of the bits of each of the at least two elements of the finite field; and a processor responsive to the validated public key and the set of system parameters of the cryptosystem.