Patent ID: 7363462
Filing Date: 2008-04-22
Classification: G06F

Abstract:
1. A system, comprising; a plurality of nodes, wherein each node comprises an active device and a memory subsystem coupled to the active device; and a memory management unit comprising global address and translation function information included in the active device of one of the plurality of nodes, wherein the memory management unit is configured to provide the global address and translation function information in response to a virtual address; wherein the memory subsystem in the one of the plurality of nodes is configured to translate the global address to a local physical address by selecting a translation function from a plurality of translation functions depending upon the translation function information and by performing the selected translation function on the global address; wherein a value of the translation function information indicates whether any memory subsystem included in the one of the plurality of nodes is a home memory subsystem for the global address; wherein any coherency transaction that involves multiple ones of the plurality of nodes involves the home memory subsystem for the coherency unit corresponding to the coherency transaction.