Patent ID: 6172381
Filing Date: 2001-01-09
Classification: H01L

Abstract:
An integrated structure, comprising:a primary interlevel dielectric extending across a first transistor including a first gate conductor interposed between a first pair of junctions;a first doped polysilicon structure disposed upon a select region of said primary interlevel dielectric formed by removing portions of a doped polysilicon layer;a second transistor arranged upon and within said doped polysilicon structure, said second transistor comprising a second pair of junctions spaced from each other by a second gate conductor, wherein said second pair of junctions are defined between the second gate conductor and a lateral edge of the first doped polysilicon structure, and wherein said first polysilicon structure comprises a pair of opposed lateral surfaces, and wherein said second pair of junctions terminate at said pair of opposed lateral surfaces;a conductive plug extending vertically through said primary interlevel dielectric to one of said first pair of junctions;an interconnect partially arranged laterally adjacent to each of said pair of opposed lateral surfaces, wherein one interconnect abuts at least a portion of said conductive plug; anda secondary interlevel dielectric extending across said second transistor and said primary interlevel dielectric removed of said first doped polysilicon structure.