Patent ID: 6285077
Filing Date: 2001-09-04
Classification: H01L

Abstract:
A package for an integrated circuit, comprising:a first flexible tape having a top surface and a bottom surface, the first flexible tape having metal traces;a first plurality of solder balls, each of the first plurality of solder balls electrically coupled to a corresponding one of the traces on the first flexible tape;a die having a top surface and a bottom surface, the die having bond pads on its top surface, the die mounted such that its bottom surface faces the top surface of the first flexible tape;a first wire connecting a first one of the bond pads on the die with one of the traces on the fist flexible tape;a second plurality of solder balls, each of the second plurality of solder balls electrically coupled to a corresponding one of the traces on the second flexible tape;a second wire connecting a second one of the bond pads on the die with one of the traces on the second flexible tape; whereinat least a portion of the first flexible tape lies in a plane that is both (a) substantially parallel to both the bottom surface of the die and the top surface of the second flexible tape, and (b) between the bottom surface of the die and the top surface of the second flexible tape.