Patent ID: 6350672
Filing Date: 2002-02-26
Classification: H01L

Abstract:
A method of forming an integrated circuit device, the method comprising:providing a pattern of wiring lines over an insulating layer, a first wiring laterally separated from a second wiring line by a layer of sacrificial material, wherein the layer of sacrificial material comprises carbon; removing a portion of the layer of sacrificial material to recess an upper surface of the layer of sacrificial material below upper surfaces of the first and second wiring lines; providing a layer of capping material over the first and second wiring lines and over the recessed upper surface of the layer of sacrificial material, wherein the layer of capping material is a nonporous oxide layer; and performing a consumption reaction through the layer of capping material to consume at least a further portion of the layer of sacrificial material, leaving an air dielectric between the first and second wiring lines bounded on an upper surface by the capping layer, wherein the consumption reaction is an oxidation process.