Patent ID: 6828160
Filing Date: 2004-12-07
Classification: H01L

Abstract:
A method of forming a ferroelectric device, comprising:forming at least one active area in a silicon substrate by shallow trench isolation; forming a plurality of layers on the at least one active area and a shallow trench isolation area, wherein the plurality of layers includes an insulator layer, a first electrode layer, a ferroelectric layer, a second electrode layer, and a first dielectric layer; etching the first dielectric layer and second electrode layer based on a word line mask to form a first etched layer and an unetched layer; forming a first spacer to define the first etched layer; etching the ferroelectric layer based on the first spacer to form a second etched layer; forming a second spacer to define the second etched layer; etching at least the first electrode layer based on the second spacer to form a third etched layer; doping a first region of the at least one active area and the shallow trench isolation area, wherein the first region is determined by the second spacer; forming a third spacer to define the third etched layer; doping a second region of the at least one active area and the shallow trench isolation area, wherein the second region is determined by the third spacer; depositing an interlayer dielectric; opening a contact hole in the interlayer dielectric; and forming metal to fill the contact hole.