Patent ID: 8174949
Filing Date: 2012-05-08
Classification: G11B

Abstract:
1. A bit density efficient system for accurately processing user data derived from a storage medium, the system comprising: a storage medium including a series of data, wherein the series of data includes a user data region, and wherein the user data region includes a first synchronization pattern and a second synchronization pattern located a distance from the first synchronization pattern; a storage buffer, wherein the storage buffer is operable to receive at least a portion of the series of data; a retiming circuit, wherein the retiming circuit is operable to calculate an initial phase offset and frequency offset for a defined bit within the storage buffer using a first location of the first synchronization pattern and a second location of the second synchronization pattern, and wherein the retiming circuit includes: an error correction loop circuit, wherein the error correction loop circuit is operable to re-sample the series of data from the storage buffer based at least in part on the initial phase offset and a frequency offset.