Patent ID: 9214521
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first conductivity type, a drift region of the second conductivity type, and a first electrode, the first emitter region and the second emitter region arranged between the drift region and the first electrode and each connected to the first electrode; a cell region comprising at least one device cell, the at least one device cell comprising a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric; a second electrode electrically connected to the source region and the body region of the at least one device cell; and a parasitic region of the first conductivity type; wherein the parasitic region includes at least one section with charge carrier lifetime reduction means; wherein the charge carrier lifetime reduction means is separated from the drift region by the parasitic region, wherein the body region together with the drift region and the second emitter region form a first diode between the second electrode and the first electrode, wherein the parasitic region together with the drift region and the second emitter region form a second diode between the second electrode and the first electrode, and wherein a distance between the drift region and the charge carrier lifetime reduction means is such that upon applying between the first electrode and the second electrode a voltage corresponding to the voltage blocking capability of the semiconductor device a depletion region expanding in the drift region and the parasitic region does not reach the charge carrier lifetime reduction means.