Patent ID: 7405615
Filing Date: 2008-07-29
Classification: H03F,H03K

Abstract:
1. A method of processing digital power with pulse area modulation, wherein an input signal is used for controlling power conversion into amplified power output after the input signal is being passed through a front end circuit, a double limit delay comparison circuit, a drive circuit, a switching circuit and a filter circuit, and wherein an integrating circuit samples from an output of the switching circuit, and then outputs a feedback comparison signal to the double limit delay comparison circuit; comprising the steps of: preprocessing the input signal in the front end circuit; comparing an output signal from the front end circuit with the feedback comparison signal in the double limit delay comparison circuit, and wherein when the value of the feedback comparison signal is greater than a predetermined upper limit, the double limit delay comparison circuit outputs a low level signal, while when the value of the feedback comparison signal is smaller than a predetermined lower limit different from the upper limit, the double limit delay comparison circuit outputs a high level signal; controlling the drive circuit by the level output from the double limit delay comparison circuit; converting power provided by the power source into an amplified pulse sequence by means of the switching circuit based on an output of the drive circuit; filtering the amplified pulse sequence by the filter circuit and then outputting amplified power; obtaining the feedback comparison signal by sampling from the output of the switching circuit by means of the integrating circuit.