Patent ID: 8359560
Filing Date: 2013-01-22
Classification: G06F

Abstract:
1. A computer-implemented method for debugging designs, comprising: obtaining signal correlation information for signals of a design at least two design levels, by using a computer; loading and presenting design descriptions corresponding to the design at the at least two design levels in at least two sets of windows, by using the computer; receiving a selection of a first signal in a first set of windows, by using the computer; in response to the selection of the first signal, querying a second signal corresponding to the first signal according to the signal correlation information, so as to select the second signal in a second set of windows, by using the computer; executing at least two debugging processes, by using the computer, each responsible for loading one of the design descriptions at the at least two design levels, and each in control of one of the at least two sets of windows for debugging the loaded design, wherein each debugging process has a plurality of windows; receiving a drag of the first signal from a first window in a first debugging process to a second window in a second debugging process, by using the computer; and in response to a synchronization information comprising the drag of the first signal, locating the second signal in the second window in the second debugging process, by using the computer.