Patent ID: 7696813
Filing Date: 2010-04-13
Classification: G06F,H03K,Y02D

Abstract:
1. A semiconductor integrated circuit device comprising: a plurality of circuit blocks, each of the plurality of circuit blocks having-operating states which include at least a first state and a second state and a power management block including a memory which stores a maximum chip power value that is referred when the operating state for each of the plurality of circuit blocks is determined, wherein each of the plurality of circuit blocks operates according to a function thereof in the first state and stops operating in the second state, wherein when the maximum chip power value is a first value, up to k circuit blocks can simultaneously operate in the first state, wherein when the maximum chip power value is changed from a second value smaller than the first value to the first value, the power management block controls the plurality of circuit blocks so that a number of circuit blocks that simultaneously operate in the first state is less than k during a predetermined term and then a number of circuit blocks that simultaneously operate in the first state is not more than k.