Patent ID: 7943995
Filing Date: 2011-05-17
Classification: H01L

Abstract:
1. A PMOS device comprising: a first insulating layer; a channel layer which is an n-type semiconductor, and in contact with a top surface of the first insulating layer; a source and a drain which are p-type semiconductors, and in contact with both sides of the channel layer respectively and a top surface of the first insulating layer; a gate insulating layer located on the channel layer; a gate located on the gate insulating layer; a source metal connecting layer which is a conductor, and in contact with the source and a top surface of the first insulating layer; a drain metal connecting layer which is a conductor, and in contact with the drain and a top surface of the first insulating layer; a source metal line which is a conductor, and in contact with the source metal connecting layer; a drain metal line which is a conductor, and in contact with the drain metal connecting layer; and a gate metal line which is a conductor, and in contact with the gate.