Patent ID: 9082620
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a substrate; a first well formed in the substrate, the first well having a first conductivity type; a second well formed in the substrate, the second well having a second conductivity type different than the first conductivity type; a first heavily-doped region having the first conductivity type, a portion of the first heavily-doped region being formed in the first well; a second heavily-doped region having the first conductivity type and formed in the second well; an insulating layer formed over a channel region of the substrate between the first and second heavily-doped regions; a gate electrode formed over the insulating layer, the gate electrode, the insulating layer, the channel region, and the first and second heavily-doped regions forming an embedded field-effect transistor (FET); a terminal for coupling to an external circuit to be protected; a switching circuit coupled between the terminal and the first heavily-doped region, and between the terminal and the gate electrode.