Patent ID: 6524925
Filing Date: 2003-02-25
Classification: H01L

Abstract:
A method of forming a thin-film resistor on a dielectric layer of a semiconductor wafer comprising:forming an isolating layer, a resistance layer, a buffering layer and a protective layer in a predetermined area of the dielectric layer, the buffering layer being positioned on the resistance layer and below the protective layer for buffering the effect of thermal stress exerted on the resistance layer by the protective layer; forming an insulating layer on the semiconductor wafer to cover the upper and side surface of the protective layer, the side surface of the buffering layer and the resistance layer, and the surface of the dielectric layer outside the predetermined area; performing a dry-etching process on the insulating layer to form two openings extending down to the protective layer over which the protective layer is used for protecting the resistance layer from plasma damage caused by the dry-etching process; performing a first wet-etching process on the protective layer below the two openings of the insulating layer to form two openings extending down to the buffering layer; performing a second wet-etching process on the buffering layer below the two openings of the protective layer to form two openings extending down to the resistance layer; and forming two conductive layers in the two openings of the insulating layer, the protective layer and the buffering layer to contact the two ends of the resistance layer wherein the two conductive layers are used as two electrical terminals for connecting the two ends of resistance layer.