Patent ID: 6303437
Filing Date: 2001-10-16
Classification: H01L

Abstract:
A method for fabricating a semiconductor device having a trenched gate and corner dopings for low power applications comprising:ion implanting the semiconductor substrate with dopant impurities to form a well junction region in the semiconductor substrate;etching a trench having substantially upright vertical sidewalls and a bottom surface in the well junction region;forming a channel region beneath the bottom surface of the trench;forming a trench-to-gate insulating layer inside the trench;forming a trenched gate electrode on the trench-to-gate insulating layer inside the trench;forming an inter-gate dielectric layer on a top surface of the trenched gate electrode;forming a control gate electrode on a top surface of the inter-gate dielectric layer with substantially upright vertical sides;implanting the semiconductor substrate to form corner dopings in the substrate immediately contiguous the upper substantially upright vertical sidewalls of the trench and a top surface of the semiconductor substrate; andion implanting the semiconductor substrate for forming a source region and a drain region in the well junction region of the semiconductor substrate.