Patent ID: 9104413
Filing Date: 2015-08-11
Classification: G06F,Y02D

Abstract:
1. A method for hardware (“HW”) based dynamic memory management in a portable computing device (“PCD”), the method comprising: generating a memory page lookup table (“LUT”) in a memory component, wherein the LUT includes a record for each of a plurality of memory pages located across multiple portions of a volatile memory; updating the LUT such that each record indicates whether data content is stored in the memory page associated with the record, wherein updating the LUT includes prioritizing importance of the data content associated with a plurality of applications based on the plurality of applications being prioritized by a user of the portable computing device; recognizing that the PCD has entered a sleep state; querying the LUT to determine which memory pages in a first portion of the volatile memory contain data content and which memory pages in a second portion of the volatile memory are available for receipt of content; if memory pages in the second portion of the volatile memory are not available, then querying the LUT to determine which memory pages in the second portion of the volatile memory contain data that is eligible to be overwritten, wherein data that is eligible to be overwritten is determined by the prioritization of the importance of the data content associated with the plurality of applications that have been prioritized by the user of the portable computing device and updated in the LUT; based on the querying of the LUT and if memory pages in the second portion of the volatile memory are available, migrating data content from memory pages in the first portion to memory pages available in the second portion; if memory pages in the second portion of the volatile memory are not available, then migrating data content from one or more memory pages in the first portion of the volatile memory to one or more memory pages in the second portion of the volatile memory which contain data that is eligible to be overwritten; and powering down the first portion of the volatile memory, wherein powering down the first portion of the volatile memory lowers a sleep current associated with the sleep state of the PCD.