Patent ID: 7355279
Filing Date: 2008-04-08
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a plurality of bond pads; a first passivation layer and a second passivation layer stacked on the semiconductor substrate, allowing the bonding pads to be exposed from the first and second passivation layers; a metallic layer formed on each of the bonding pads and covering a portion of the second passivation layer surrounding each of the bonding pads; a third passivation layer applied on the second passivation layer and having a plurality of openings for exposing a portion of the metallic layer, wherein each of the openings is shifted in position from a corresponding one of the bonding pads by a distance not exceeding a radius of the corresponding one of the bonding pads; and a plurality of solder bumps bonded to the portion of the metallic layer exposed via the openings.