Patent ID: 6420229
Filing Date: 2002-07-16
Classification: H01L

Abstract:
A method for fabricating a semiconductor device comprising the steps of:forming a wiring above a substrate, the wiring having a first insulating film formed on an upper surface and a side surface thereof; forming a second insulating film above the substrate and the wiring; forming a third insulating film on the second insulating film, the third insulating film having etching characteristics different from those of the second insulating film; forming a contact hole at least in the second insulating film and the third insulating film; forming a conductor plug inside the contact hole; forming a fourth insulating film on the third insulating film and the conductor plug, the fourth insulating film having etching characteristics different from those of the second insulating film; forming an opening in the third insulating film and the fourth insulating film in a region including a region with the conductor plug formed in; forming a storage electrode on an inside surface of the opening and connected to the conductor plug on an upper surface and a side surface of the conductor plug; and etching the third insulating film and the fourth insulating film with the second insulating film as an etching stopper.