Patent ID: 8732368
Filing Date: 2014-05-20
Classification: G06F,Y02D

Abstract:
1. A method comprising: sharing a resource in a processor system for processing signals, the processor system having first and second conjoined-cores that are conjoined with each other without a memory interconnection network between the conjoined-cores, wherein the resource is a cache memory; selecting one of the first and second conjoined-cores having control over the resource based on arbitration between the first and second conjoined-cores; scheduling, by an operating system, the sharing of the resource in the processor system, wherein scheduling the sharing of the resource considers different priorities of workloads running on the corresponding first and second conjoined-cores, and wherein scheduling the sharing of the resource further considers a scheduling heuristic that is according to patterns of the workloads used for predicting future resource usage; prefetching information from the cache memory into a prefetch buffer on behalf of the selected one of the first and second conjoined-cores; the selected conjoined-core fetching information from the prefetch buffer and the cache memory in cycles when the cache memory is accessible to the selected conjoined-core; and the selected conjoined-core fetching information only from the prefetch buffer during cycles when the cache memory is inaccessible to the selected conjoined-core.