Patent ID: 6141715
Filing Date: 2000-10-31
Classification: G06F

Abstract:
A computer-implemented method of avoiding a livelock condition on a computer expansion bus coupled to a plurality of bus masters, the method comprising:receiving from a first bus master via the computer expansion bus a first transaction request for access to a target device;determining whether a path from the first bus master to the target device is available for executing the first transaction request;if the path is not available, then:transmitting on the computer expansion bus to the first bus master a retry command that causes the first bus master to re-submit the first transaction request for access to the target device;storing a retry indicator that indicates that the plurality of bus masters other than the first bus master should receive retry commands if any requests for access to the target device are received after the first transaction request is received and before the resubmitted first transaction request is received; andpreventing any new transaction requests for access to the target device from being executed until the first transaction request re-submitted by the first bus master is received; andremoving the retry indicator after the re-submitted first transaction request is received, thereby enabling transaction requests from the plurality of bus masters to be executed.