Patent ID: 7998830
Filing Date: 2011-08-16
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: forming a core well in a core region of a substrate and an I/O well in an I/O region of the substrate, the core well and the I/O well separated by an isolation structure; forming an I/O-device gate structure on the I/O well, the I/O-device gate structure comprising an I/O electrode disposed above an I/O dielectric, wherein the I/O dielectric does not include a high-k dielectric material; forming a strained-silicon channel in the core region, wherein the strained-silicon channel comprises a silicon layer disposed on a silicon germanium layer, the silicon germanium layer disposed between the silicon layer and the substrate; forming a core-device gate structure over the strained-silicon channel in the core well, the core-device gate structure comprising a core electrode disposed above a core dielectric, the core-device gate structure comprising a high-k dielectric material; and forming a source region and a drain region adjacent to the core-device gate structure and outside of the silicon germanium layer.