Patent ID: 6812120
Filing Date: 2004-11-02
Classification: H01L,Y10S

Abstract:
A method of forming a floating gate, comprising:providing a substrate having at least a device isolation structure, an active region defined by the device isolation structure, a pad layer formed over the active region, a mask layer formed over the pad layer, and a trench formed in the substrate, wherein the trench penetrates through the pad layer and the mask layer; forming a tunnel oxide layer on a surface of the trench; forming a conductive layer in the trench; removing a portion of the conductive layer by an isotropic etching process, wherein a top surface of a remaining conductive layer is concave; etching the remaining conductive layer until a portion of the tunnel oxide layer is exposed by an anisotropic etching process, wherein byproduct polymer residues are generated and serve as a mask during the anisotropic etching process; and removing the byproduct polymer residues, the mask layer and the pad layer so a to form a first floating gate and a second floating gate having sharp top-corners over a plurality of sidewalls of the trench.