Patent ID: 8329516
Filing Date: 2012-12-11
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: growing a plurality of first nanowires on a first substrate in a first direction perpendicular to the first substrate; forming a first insulation layer covering the plurality of first nanowires to define a first nanowire block including the plurality of first nanowires and the first insulation layer; moving the first nanowire block so that each of the plurality of first nanowires is arranged in a second direction parallel to the first substrate; disposing a second nanowire block including second nanowires and a second insulation layer on the first nanowire block, each of the second nanowires extending in a third direction parallel to the first substrate; removing the first and second insulation layers using the second nanowires as an etching mask; forming a gate line covering portions of the plurality of first nanowires exposed by the second nanowires; and implanting impurities into portions of the plurality of first nanowires adjacent to the gate line.