Patent ID: 7580303
Filing Date: 2009-08-25
Classification: G11C

Abstract:
1. A semiconductor memory comprising: a dynamic memory cell; a bit line which is connected to said dynamic memory cell; a first precharge voltage generating circuit which outputs any of a plurality of precharge voltages in accordance with an ambient temperature; a precharge circuit which supplies the precharge voltage supplied from said first precharge voltage generating circuit, to said bit line during nonaccess to said dynamic memory cell; and a sense amplifier which amplifies a difference between a voltage of a data signal read from said dynamic memory cell onto said bit line and the supplied precharge voltage, wherein the first precharge voltage generating circuit comprises: a reference voltage generating circuit that generates at least four reference voltages; a switch circuit that selects at least two reference voltages among the at least four reference voltages based on a temperature detection signal which is generated according to the ambient temperature; and a second precharge voltage generating circuit that generates one of the plurality of precharge voltages based on the at least two reference voltages.