Patent ID: 7558316
Filing Date: 2009-07-07
Classification: H04L

Abstract:
1. A transmission signal integrity supervisor within an analog front end (AFE), wherein the transmission signal integrity supervisor is configured to detect anomalous conditions and protect the AFE, the transmission signal integrity supervisor comprising: a clock detector configured to receive a clock signal input and generate a first output signal in response to an at least one clock signal input anomalous condition, wherein the clock detector is further configured to forward the first output signal to at least one of control logic and devices external to the AFE, the clock detector including a resistor-capacitor combination coupled to a current mirror, the resistor-capacitor combination configured such that the first output signal is triggered in response to a clock signal input that falls below a minimum frequency; and a data supervisor configured to receive a digital data stream and generate a second output signal in response to an at least one digital data stream anomalous condition, wherein the data supervisor is further configured to forward the second output signal to at least one of a line driver within the AFE and the devices external the AFE.