Patent ID: 6096651
Filing Date: 2000-08-01
Classification: H01L

Abstract:
A process for filling a via hole, comprising the sequential steps of:providing a partially completed integrated circuit, including a metal layer covered by a dielectric layer;coating the dielectric layer with a layer of photoresist which is then exposed through a reticle and developed to form a mask;through said mask, etching the dielectric layer down to the level of said metal layer, thereby forming a via hole having a mouth and walls;stripping away all photoresist;performing a first sputter etch whereby an amount of dielectric material is removed and the mouth of said via hole is widened;depositing a barrier layer that lines the walls of the via hole;performing second sputter etch whereby an amount of barrier layer material is removed and said mouth of the via hole is further widened; andfilling said via hole with tungsten.