Patent ID: 8544022
Filing Date: 2013-09-24
Classification: G06F

Abstract:
1. A method, in a data processing system having a processor and a memory, for executing a transaction in the data processing system comprising: generating a transaction checkpoint data structure in internal registers of the processor, wherein the transaction checkpoint data structure stores transaction checkpoint data representing a state of program registers at a time prior to execution of a corresponding transaction; executing, by the processor, the transaction, wherein the transaction comprises a first portion of code that is to be executed by the processor; receiving, by the processor, an interrupt of the transaction while executing the transaction; storing the transaction checkpoint data to a data structure in the memory of the data processing system in response to receiving the interrupt, wherein the data structure in the memory is an interrupt context record data structure for a program corresponding to the transaction, and wherein the transaction checkpoint data is stored in a first portion of the interrupt context record data structure; executing a second portion of code, different than the first portion of code; and restoring a state of the program registers using the data structure in the memory of the data processing system in response to an event occurring causing a switch of execution of the processor back to execution of the transaction, wherein restoring a state of the program registers using the data structure in the memory of the data processing system comprises: