Patent ID: 7947985
Filing Date: 2011-05-24
Classification: G02F,H01L

Abstract:
1. A thin film transistor array substrate comprising: an insulation substrate; a common line and a gate line formed on the insulation substrate; a data line insulatedly crossing the gate line; a TFT comprising a semiconductor layer, a gate electrode connected with the gate line and overlapping with the semiconductor layer in an insulated state, a source electrode connected with the data line and being in contact with the semiconductor layer, and a drain electrode facing the source electrode on the semiconductor layer; a pixel electrode connected with the TFT; a storage electrode connected with the common line, formed of a transparent conductive layer, and forming a storage capacitor with the pixel electrode, and a gate insulating layer formed on the common line and the gate line, insulating the semiconductor layer and the gate electrode of the TFT, and having a first contact hole exposing the common line, wherein the storage electrode is formed on the gate insulating layer and connected to the common line via the first contact hole, and wherein an insulating layer formed between the pixel electrode and the storage electrode; wherein the insulating layer covers the TFT and comprises a protection layer comprising a first layer made of an inorganic insulating material and formed on the source layer, and a second layer comprising an organic insulating layer and formed on the first layer; wherein the area of the storage electrode is smaller than that of the pixel electrode.