Patent ID: 9035469
Filing Date: 2015-05-19
Classification: H01L

Abstract:
1. A semiconductor device comprising: a mounting member which has an input conductive part and an output conductive part; a field effect transistor which has a plurality of cell regions arranged dispersedly, which has a plurality of drain terminal electrodes connected to each cell region, and which is arranged on the mounting member, wherein an operation current of each cell region is controlled by a multi-finger electrode provided on an operation layer which produces a negative resistance with two conduction bands of which electronic speeds differ each other; an output matching circuit board which is provided between the output conductive part and the field effect transistor, and which has a first insulating substrate and a conductive part on an upper surface of the first insulating substrate; a relay board which is provided between the output matching circuit board and the field effect transistor, and which has a second insulating substrate having a permittivity lower than a permittivity of the second insulating substrate of the output matching circuit board, and which has a relay conductive part on an upper surface of the second insulating substrate; a plurality of first bonding wires which connect the plurality of drain terminal electrodes and the relay conductive part, wherein at least two first bonding wires are connected to the relay conductive part and thereby are bundled in common; a plurality of second bonding wires which connect the relay conductive part and the conductive part of the output matching circuit board; and a plurality of third bonding wires which connect the conductive part of the output matching circuit board and the output conductive part.