Patent ID: 8841189
Filing Date: 2014-09-23
Classification: B82Y,H01L

Abstract:
1. A method to fabricate a transistor, comprising: providing an elongated fin structure disposed on an insulating layer, the fin structure having a gate structure disposed thereon at a location along a length of the fin structure between a first end of the fin structure and a second end of the fin structure; suspending a first portion of the fin structure proximate to a first side of the gate structure and a second portion of the fin structure proximate to a second side of the gate structure, the first suspended portion of the fin structure overlying a first recess formed in the insulating layer and the second suspended portion of the fin structure overlying a second recess formed in the insulating layer; doping the first suspended portion of the fin structure and the second suspended portion of the fin structure; and conformally depositing source metal around the first suspended doped portion of the fin structure within the first recess and drain metal around the second suspended doped portion of the fin structure within the second recess, the source metal and the drain metal each inducing a radially directed strain force into the fin structure that transfers to a laterally directed strain force along the length of the fin structure, where the laterally directed strain force induces one of compression strain or tensile strain in a portion of the fin structure that is disposed within the gate structure and that functions during operation of the transistor as a channel of the transistor.