Patent ID: 7041565
Filing Date: 2006-05-09
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: providing a semiconductor substrate; forming a plurality of shallow trench isolation structures in the semiconductor substrate; forming a first oxide layer over the semiconductor substrate and the plurality of shallow trench isolation structures; depositing a first polysilicon layer over the first oxide layer; depositing a nitride layer over the first polysilicon layer; masking at least two portions of the nitride layer between two of the plurality of shallow trench isolation structures; etching unmasked portions of the nitride layer and portions of the first polysilicon layer underneath the exposed portions of the nitride layer to expose at least a portion of the first oxide layer; forming a second oxide layer of a specified thickness over the exposed portion of the first oxide layer; providing a sacrificial layer over the second oxide layer; etching to remove a portion of the sacrificial layer and a portion of the nitride layer; and removing the residual sacrificial layer and the residual nitride layer to expose at least two separate portions of the first polysilicon layer.