Patent ID: 7113518
Filing Date: 2006-09-26
Classification: H04L

Abstract:
1. A processor comprising: a packet analyzer; a look-up table accessible to the packet analyzer, the look-up table including a plurality of entries each specifying, for a corresponding packet category, a portion indicator, the look-up table being configured to permit assignment of different portion indicators to different packet categories; and first memory circuitry associated with the processor and operatively coupled to the packet analyzer; wherein the packet analyzer is operative to at least partially analyze one or more packets received by the processor in order to determine for a given one of the packets, based on the portion indicator for its associated packet category in the look-up table, a portion of the packet to be stored in the first memory circuitry, the portion of the given packet when stored in the first memory circuitry thereby being accessible for subsequent processing within the processor without requiring access to second memory circuitry associated with the processor and configured to store substantially the entire given packet.