Patent ID: 9000702
Filing Date: 2015-04-07
Classification: H01L,H02M,H02P,Y10T

Abstract:
1. A packaged multi-chip module, comprising: a first set of three package terminals A, B and C; a second set of three package terminals D, E and F that is separated from the first set by at least one millimeter; a low-side driver output package terminal G; at least two dice that include a processor, a timer, a low-side driver, a first high-side driver and a second high-side driver, wherein a first of the two dice includes the processor and the timer, wherein a second of the two dice includes the first and second high-side drivers, wherein the first high-side driver is controllable by the processor and the timer, wherein three terminals of the first high-side driver are coupled to the first set of three package terminals A, B and C, wherein three terminals of the second high-side driver are coupled to the second set of three package terminals D, E and F, and wherein the low-side driver is coupled to the low-side driver output package terminal G; and a die paddle, wherein each of the at least two dice has a substrate, wherein the substrate of the second of the at least two dice is a P-type substrate, and wherein the substrate of each of the at least two dice is equipotential to the die paddle.