Patent ID: 7378895
Filing Date: 2008-05-27
Classification: H03H

Abstract:
1. A CMOS integrated circuit (IC) including an array of programmable resistive elements, each of said programmable resistive elements comprising: a first field effect transistor (FET), the drain of said first FET connected to a selectable program-supply line; a program select connected to the gate of said first FET; a second FET, the drain of said second FET coupled to a resistive load line; a resistor select connected to the gate of said second FET; and a phase change resistor connected to the source of said first FET and the source of said second FET, wherein said phase change resistor is a chalcogenide resistor, wherein said source of said first FET and said second FET are connected together and to one end of said chalcogenide resistor and an other end of said chalcogenide resistor is connected to ground, and wherein said programmable resistive elements in said array are organized into pairs of said programmable resistive elements, the drain of said first FET in each of said pairs being connected to a common selectable program-supply line, the drain of one said second FET in each of said pairs being connected to said resistive load line and the drain of the other said second FET in each of said pairs being connected to the source of said one second FET.