Patent ID: 6653687
Filing Date: 2003-11-25
Classification: B82Y,H01L

Abstract:
An insulated gate semiconductor device, comprising:a semiconductor film comprising a source region, a drain region and a plurality of channel forming regions; at least one impurity region in said semiconductor film; and a gate electrode formed over said plurality of channel forming regions with a gate insulating film interposed therebetween; wherein said impurity region includes an impurity element having an opposite conductivity type to that of said source region and said drain regions, wherein said impurity region sections two adjacent channel forming regions of said plurality of channel forming regions, wherein carriers pass only through said plurality of channel forming regions other than said impurity region, wherein a channel length between said said source region and said drain region is within 0.01 to 0.35 &mgr;, and wherein W is a width of the channel forming region, Wpi is a width of the impurity region, and Wpa is a width of the portion of the channel forming region other than the impurity region, and relational expressions of Wpi/W=0.1 to 0.9, Wpa/W=0.1 to 0.9 and Wpi/Wpa={fraction (1/9)} to 9 are accomplished between W, Wpi and Wpa.