Patent ID: 9070716
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A thin film transistor, comprising: a substrate having a first region and a second region; a first semiconductor pattern formed in the first region and a second semiconductor pattern formed in the second region; a first conductive pattern formed above a channel region of the first semiconductor pattern of the first region and a second conductive pattern formed above the second semiconductor pattern of the second region; a third conductive pattern formed in the first region and a fourth conductive pattern formed above the second conductive pattern of the second region, wherein a first gap between the first conductive pattern and the first semiconductor pattern of the first region is greater than a second gap between the second conductive pattern and the second semiconductor pattern of the second region, and wherein the first gap is formed by a first gate insulating pattern formed on the channel region and a first insulating layer formed on the substrate, and the second gap is formed by the first insulating layer, wherein the first gate insulating pattern is arranged directly between the first semiconductor pattern and the first insulating layer, wherein a width of the first gate insulating pattern is the same as a width of the channel region of the first region, and wherein the first insulating layer directly contacts an upper surface and a side surface of the first gate insulating pattern.