Patent ID: 7396715
Filing Date: 2008-07-08
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device, comprising the steps of: subjecting a surface of a semiconductor substrate to element isolation to demarcate a first active region and a second active region; forming a first gate insulating film on the first active region and the second active region; fabricating the first gate insulating film and leaving the first gate insulating film in such a manner that an end portion fabricated of the first gate insulating film is located on any portion other than a first gate electrode forming region in the first active region and a second gate electrode forming region in the second active region; forming a second gate insulating film on the first active region and the second active region, including on the first gate insulating film; fabricating the second gate insulating film and leaving the second gate insulating film in such a manner that an end portion fabricated of the second gate insulating film overlaps the end portion fabricated of the first gate insulating film; simultaneously subjecting a surface of the first gate insulating film and a surface of the second gate insulating film to a surface recovery treatment; and pattern-forming a first gate electrode on the first gate electrode forming region with the first gate insulating film therebetween and a second gate electrode on the second gate electrode forming region with the second gate insulating film therebetween, respectively.