Patent ID: 9117887
Filing Date: 2015-08-25
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor structure, comprising: providing a first dielectric layer on a substrate, wherein the first dielectric layer includes a plurality of first conductive layers formed through the first dielectric layer, the plurality of first conductive layers having a top surface being levelled with a top surface of the first dielectric layer; removing a portion of each first conductive layer of the plurality of first conductive layers to form a first opening in the first dielectric layer and on each first conductive layer; forming a second dielectric layer in the first opening and having a top surface levelled with the top surface of the first dielectric layer; forming a third dielectric layer at least on the first dielectric layer, the third dielectric layer containing a plurality of second-openings, each second-opening exposing at least two adjacent second dielectric layers at a bottom of the second-opening; removing at least two adjacent second dielectric layers exposed at the bottom of a first second-opening to form third openings that expose top surfaces of at least two adjacent first conductive layers corresponding to the first second-opening, wherein a second second-opening in the third dielectric layer exposes at least two adjacent second dielectric layers at a bottom of the second second-opening; and forming second conductive layers in the third opening, the first second-opening, and the second second-opening.