Patent ID: 8717087
Filing Date: 2014-05-06
Classification: G11C,H01L

Abstract:
1. An anti-fuse circuit comprising: a rupture unit comprising an anti-fuse programmed in response to an input rupture signal during a program mode, and configured to generate an output rupture signal corresponding to a state of the anti-fuse to output the generated output rupture signal to a transmission node; a voltage clamp unit configured to generate a clamp voltage proportional to an external voltage level, and to generate the clamp voltage having a constant voltage level when the external voltage level rises to a predetermined level or more; and a fuse signal generation unit configured to reset the transmission node to the clamp voltage at the initial stage of the program mode, and to generate a fuse signal in response to the voltage level of the transmission node during an output mode, wherein the voltage clamp unit generates the clamp voltage by comparing a reference voltage with a divided voltage generated by dividing the clamp voltage.