Patent ID: 6167552
Filing Date: 2000-12-26
Classification: H03M

Abstract:
A rate 1/2 convolutional encoder for encoding self-doubly orthogonal code comprising:a. data converter means for receiving a serial input of information bits and for providing, for each received input information bit, a corresponding parallel output of a group of K most recently received information bit through a least recently received information bit respectively identified as first through K.sup.th information bits; andb. self-doubly orthogonal coder means for receiving each group of K information bits, for selecting a sequence of L information bits I.sub.gl based on generator g.sub.l ={g.sub.0, g.sub.1, g.sub.2, . . . , g.sub.L-1 } such that for all variations of indices j, k, n, and p where 0.ltoreq.j<L, 0.ltoreq.k<j, 0.ltoreq.n<L, 0.ltoreq.p<n, n.noteq.k, p.ltoreq.k, except for unavoidable cases the differences of (g.sub.j -g.sub.k) are distinct, the sum of differences (g.sub.j -g.sub.k +g.sub.n -g.sub.p) are distinct, and the differences of (g.sub.j -g.sub.k) are distinct from the sum of differences (g.sub.j -g.sub.k +g.sub.n -g.sub.p), and for each group of K information bits a corresponding parallel output of L sequence information bits; andc. exclusive-or means for receiving each group of L information bits, for generating a parity bit by performing a logical exclusive-or operation on said L sequence for each received group of K information bits, and for an output of parity bit; andd. transmitter means for packaging the parity bits and information bits into coded messages and for transmitting these messages through a communication channel.