Patent ID: 6307265
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate;a first insulating layer provided on the semiconductor substrate;wires of a first set provided on the first insulating layer;first barrier layers provided on side-walls of the wires of the first set;a second insulating layer having via holes and formed on the wires of the first set, providing complete cavities among the wires of the first set;wires of a second set provided on the second insulating layer;second barrier layers provided on side-walls of the wires of the second set;conductors of a first set filled in the via holes of the second insulating layer and connecting the wires of the first set to the wires of the second set; anda third insulating layer provided on the wires of the second set providing complete cavities among the wires of the second set.