Patent ID: 6797582
Filing Date: 2004-09-28
Classification: H01L

Abstract:
A method for fabricating a 3D microelectronic structure having a thin, uniform thermal nitride formed on at least an upper portion of each expose sidewalls of at least one opening, said method comprising the steps of:forming at least one opening in a surface of a substrate, said at least one opening having sidewalls which extend to a common bottom wall; forming an oxide layer on a bottom portion of each sidewall including the common bottom wall of said at least one opening; forming a thermal nitride layer having a thickness from about 10 to about 50 Ã¥ on at least an upper portion of each sidewall of said at least one opening, wherein during said forming the thermal nitride layer said oxide layer is converted into a nitrided oxide layer; and selectively removing said nitrided oxide layer from said bottom portion of each sidewall including the common bottom wall of said at least one opening thereby exposing a surface of said substrate for subsequent formation of a trench capacitor in said at least one opening.