Patent ID: 7700415
Filing Date: 2010-04-20
Classification: H01L

Abstract:
1. A method of fabricating an arrangement of nonvolatile memory devices, the method comprising: (a) providing a semiconductor substrate; (b) forming an oxide layer; (c) forming a plurality of word lines substantially disposed above the oxide layer; (d) forming a plurality of bit lines substantially disposed above the oxide layer; (e) etching a plurality of via holes formed between the plurality of word lines and the plurality of bit lines substantially in contact with the plurality of word lines and the plurality of bit lines; and (f) forming an anti-fuse dielectric material substantially disposed beside the plurality of bit lines and substantially in electrical contact with the plurality of bit lines, the anti-fuse dielectric material forming a plurality of side wall anti-fuse dielectrics beside the bit lines; (g) forming a plurality of via plugs substantially in electrical contact with the plurality of word lines and substantially in contact with the plurality of side wall anti-fuse dielectrics.