Patent ID: 6670671
Filing Date: 2003-12-30
Classification: H01L

Abstract:
A nonvolatile semiconductor memory device having memory cells each comprising:a well of a first conductivity type formed in a semiconductor substrate; a pair of semiconductor regions of a second conductivity type formed in said well of the first conductivity type, said pair of semiconductor regions being used as a source and a drain; a first gate formed on said semiconductor substrate via a first gate insulator film; a second gate formed on a second insulator film covering said first gate; and a third gate formed via the second insulator film separated from said first gate and by a third insulator film and from said second gate by a fourth insulator film, wherein an impurity doped region of the first conductivity type having an impurity concentration higher than said well is formed in a channel region between said pair of semiconductor regions, said impurity doped region being not in contact with said semiconductor regions.