Patent ID: 8395251
Filing Date: 2013-03-12
Classification: H01L

Abstract:
1. A method of manufacture of an integrated circuit package to package stacking system comprising: providing a first integrated circuit package and a second integrated circuit package, each having a configured leadframe with a J-lead and a die pad with a exposed lower surface at a bottom side of a package material; the configured leadframe extending out from the bottom side of the packaging material to a top side of the packaging material opposite from the bottom side, wherein an upper mounting surface of the configured leadframe is being exposed; and the configured leadframe interlocking in a lead recess in the top side of packaging material, wherein the lead recess is positioned away from an edge of the packaging material; forming an integrated circuit package pair by joining the exposed lower surface of the die pad of the first integrated circuit package to the exposed lower surface of the die pad of the second integrated circuit package, wherein the second integrated circuit package is in an inverted position and the first integrated circuit package is in an upright position; and forming a four-package stack by mounting the integrated circuit package pair on a third integrated circuit package and a fourth integrated circuit package, wherein the fourth integrated circuit package is electrically connected to the integrated circuit package pair and the third integrated circuit package.