Patent ID: 6954083
Filing Date: 2005-10-11
Classification: G01R,G06F

Abstract:
1. An integrated circuit comprising: a plurality of digital logic storage elements, each of the digital logic storage elements being initialized to store a first digital logic value, each digital logic storage element being controlled after it is initialized such that it continues to store the first digital logic value throughout a period if the integrated circuit is powered from a supply voltage that remains within a normal operating supply voltage range, wherein each digital logic storage element outputs an output signal indicative of whether the digital logic storage element is storing a second digital logic value; a logic tree that receives the output signals from said plurality of digital logic storage elements, the logic tree outputting a fault output signal; and a reset circuit that receives the fault output signal from the logic tree, the reset circuit generating a reset signal if the output signal of any of the plurality of digital logic storage elements indicates that the corresponding digital logic storage element is storing said second digital logic value during said period.