Patent ID: 6771540
Filing Date: 2004-08-03
Classification: G11C

Abstract:
A method for operating a nonvolatile semiconductor memory device including a memory cell array composed of a plurality of memory cells, each of which is formed with a gate insulating film, a floating gate electrode, an insulating film between electrode layers, and a control gate formed respectively in a first conductor type semiconductor area, as well as a second conductor type source area and a second conductor type drain area formed respectively in said first conductor type semiconductor area and being used for programming and erasing of data by controlling the amount of electrons in said floating gate electrode, wherein said method includes processes for:applying a predetermined first operation voltage to a memory cell thereby to inject or eject electrons in or from said floating gate electrode; applying a second operation voltage to said memory cell after the application of said first operation voltage to give an electric field with a polarity opposite to that of the electric field given with the application of said first operation voltage to an insulating film around said floating gate through which electrons pass when said first operation voltage is applied; verifying the threshold voltage in said memory cell after the application of said second operation voltage; and deciding whether to repeat said processes following the application of said first operation voltage again after said verify operation.