Patent ID: 8809155
Filing Date: 2014-08-19
Classification: H01L

Abstract:
1. A method of fabricating a device structure, the method comprising: forming a first conductive layer on a dielectric layer; forming a semiconductor layer on the first conductive layer, the semiconductor layer comprised of a silicon-containing semiconductor material in an amorphous state or a polycrystalline state; forming an insulator layer on the semiconductor layer; forming a second conductive layer on the insulator layer; patterning the second conductive layer, the insulator layer, and the semiconductor layer, to respectively form a first electrode, an electrode insulator, and a semiconductor body, the electrical insulator separating the first electrode from the semiconductor body; after the first electrode, the semiconductor body, and the electrical insulator are formed, patterning the first conductive layer to form a second electrode; and forming a source region and a drain region in the semiconductor body.