Patent ID: 6338134
Filing Date: 2002-01-08
Classification: G06F

Abstract:
A method in a superscalar data processing system for efficiently processing an instruction, said data processing system including multiple instructions to be processed during a single clock cycle, wherein said instruction is one of said multiple instructions, said method comprising the steps of:determining if said instruction is a particular type of instruction which specifies data to be moved or copied during processing of said instruction from a logical origination location to a logical destination location; and in response to a determination that said instruction is said particular type of instruction: temporarily designating a first plurality of physical registers as a stack; establishing a first pointer field associated with said instruction for associating a pointer stored in said first pointer field with said logical origination location; associating a first pointer with said instruction, said first pointer identifying a physical location wherein said data is stored; in response to a storage of said first pointer in said first pointer field, associating said logical origination location with said physical location; establishing a second pointer field associated with said instruction for associating a pointer stored in said second pointer field with said logical destination location; and processing said instruction by storing said first pointer in said second pointer field, whereby said logical destination location becomes associated with said physical location, wherein said data is not copied and remains in its original physical location during said processing of said instruction.