Patent ID: 7851948
Filing Date: 2010-12-14
Classification: H01L,H03K,H04B

Abstract:
1. A semiconductor device comprising: a first power line supplied with first power supply voltage; a second power line supplied with second power supply voltage; a third power line electrically connected to a internal circuit; a first switch configured to electrically connect or disconnect the first power line and the third power line; a second switch configured to electrically connect or disconnect the second power line and the third power line; a control circuit controlling the second switch to electrically connect the second power line and the third power line following a predetermined period after controlling the first switch to electrically connect the first power line and the third power line; and a reference potential generating circuit configured to generate a reference potential, wherein the control circuit comprises a potential detecting circuit configured to output a potential detection signal corresponding to a potential of the third power line, wherein the predetermined period is a period based on the potential detection signal corresponding to the potential of the third power line after the first switch is controlled to electrically connect the first power line and the third power line, wherein the potential detecting circuit compares the potential of the third power line with the reference potential, and wherein the potential detecting circuit outputs a first logical potential detection signal as the potential detection signal when the potential of the third power line is equal to or greater than the reference potential, and the potential detecting circuit output a second logical potential detection signal as the potential detection signal when the potential of the third power line is smaller than the reference potential.