Patent ID: 7459915
Filing Date: 2008-12-02
Classification: H03L,H04L

Abstract:
1. An electric circuit including a function for outputting a timing signal with a phase according to a predetermined system timing and a function for outputting a recovered clock synchronized with a given periodic signal, the electric circuit comprising: a counter delay circuit that delays a given reference signal by a delay amount according to the system timing, which is an integral multiple of a period of a given clock signal and outputs the delayed reference signal; a PLL section that generates an oscillation signal synchronized with the reference signal delayed by the counter delay circuit, and delays the oscillation signal by an offset delay amount according to the system timing to output the delayed oscillation signal when outputting the timing signal and changes a delay amount for the oscillation signal in a preset tracking range using the offset delay amount as a standard to output the oscillation signal in synchronization with the periodic signal when outputting the recovered clock; a delay amount separating section that separates a coarse component of an integral multiple of a period of the clock signal and a fine component less than the period of the clock signal from the delay amount by which the reference signal should be delayed in accordance with the system timing; a difference computing section that computes a difference between the size of the tracking range in a negative direction and the size of the fine component if the tracking range in the negative direction is larger than the fine component; and a delay setting section that sets a value obtained by subtracting an adjusted delay amount, which is not less than the difference computed from the difference computing section and is an integral multiple of the period of the clock signal, from the coarse component as the delay amount of the counter delay circuit and sets a value obtained by adding the adjusted delay amount to the fine component as the offset delay amount of the PLL section, if the tracking range in the negative direction is larger than the fine component.