Patent ID: 8816708
Filing Date: 2014-08-26
Classification: G01R

Abstract:
1. An electronic test system for testing a chip, comprising: a first connection terminal and a second connection terminal respectively coupled to two pins of the chip; a signal source terminal coupled to a signal generator; a first measurement terminal and a second measurement terminal coupled to a tester; a switch circuit comprising a first front terminal, a fourth front terminal, a first back terminal and a fourth back terminal, the first front terminal and the fourth front terminal being coupled to the signal source terminal, the first back terminal and the fourth back terminal being respectively coupled to the first connection terminal and the second connection terminal; wherein the switch circuit controls conduction between the first front terminal and the first back terminal, and controls conduction between the fourth front terminal and the fourth back terminal; a fifth switch coupled between the fourth back terminal and the first measurement terminal for selectively conducting between the fourth back terminal and the first measurement terminal; and a seventh switch coupled between the first connection terminal and the second measurement terminal for selectively conducting between the first connection terminal and the second measurement terminal; wherein the electronic test system operates in a check mode and a test mode; when the electronic test system operates in the check mode, the fifth switch conducts; when the electronic test system operates in the test mode, both the fifth switch and the seventh switch do not conduct.