Patent ID: 6030875
Filing Date: 2000-02-29
Classification: H01L

Abstract:
A process of forming a CMOS device having at least one PMOS device region and at least one NMOS device region, comprising:forming at least one PMOS electrode in the PMOS device region and at least one NMOS gate electrode in the NMOS device region;forming a PMOS nitrogen-rich region under an edge portion of the PMOS gate electrode and an NMOS nitrogen-rich region under an edge portion of the NMOS gate electrode;forming a PMOS active region adjacent the PMOS gate electrode, the PMOS nitrogen-rich region extending further under the edge portion of the PMOS gate electrode than the PMOS active region; andforming an NMOS active region adjacent the NMOS gate electrode, the NMOS nitrogen-rich region extending further under the edge portion of the NMOS gate electrode than the NMOS active region.