Patent ID: 6444567
Filing Date: 2002-09-03
Classification: H01L

Abstract:
A method of manufacturing an electrical device, which method comprises the sequential steps of:(a) providing a substrate including at least one damascene-type metal feature in-laid in the upper, exposed surface of a layer of dielectric material overlying at least a portion of said substrate, the at least one metal feature including an upper, exposed surface substantially co-planar with said upper surface of said layer of dielectric material; (b) blanket-depositing at least one layer comprising at least one electromigration reducing alloying element for said metal feature on said exposed, upper surface of said at least one metal feature and on said upper surface of said layer of dielectric material; (c) annealing to substantially uniformly diffuse at least a predetermined minimum amount of said at least one alloying element from said at least one layer comprising said at least one alloying element into said at least one metal feature for at least a predetermined minimum depth below said upper surface thereof, whereby electromigration of the metal of said at least one metal feature is minimized or substantially prevented; and (d) removing any remaining, alloyed and/or unalloyed portion(s) of said at least one layer comprising said at least one alloying element which extend(s) above said surface of said layer of dielectric material, thereby making said upper surface of said at least one metal feature substantially co-planar with said upper surface of said dielectric layer.