Patent ID: 8699263
Filing Date: 2014-04-15
Classification: G11C

Abstract:
1. A method of erasing data stored in a dynamic random access memory (DRAM) array, comprising: (a) setting a wordline of the DRAM array to an active state, thereby causing charge to flow between memory cells coupled to the wordline and respective bitlines according to the data stored in the memory cells, wherein signals develop on the respective bitlines according to the flows of charge between the memory cells coupled to the wordline and the respective bitlines; (b) while maintaining sense amplifiers connected to the respective bitlines in inactive states in which the sense amplifiers do not amplify the signals to storable signal levels, setting the wordline to an inactive state such that insufficient charge remains in the memory cells coupled to the wordline, thereby erasing the data stored in the memory cells coupled to the wordline; and (c) repeating steps (a) and (b) using each of a remaining number of wordlines of a selected range of the memory array so as to erase the data stored in the selected range.