Patent ID: 6639842
Filing Date: 2003-10-28
Classification: G11C

Abstract:
A method for programming non-volatile memory cells in an array of the type which includes a plurality of bit lines, a plurality of word lines, and a plurality of source lines, and a plurality of temporary storage circuits which can be set to supply a desired state for use in connection with operations involving designated non-volatile memory cells, wherein each of the plurality of temporary storage circuits communicates with a different one of a plurality of groupings of the non-volatile memory cells by way of associated word and source lines, the method comprising the steps ofprecharging unselected bit lines to a program inhibit level, as a part of a programming operation; inhibiting the operation of the plurality of temporary storage circuits during a first portion of the precharging step; and setting ones of the plurality of temporary storage circuits to desired states following the first portion of the precharging step.