Patent ID: 7492190
Filing Date: 2009-02-17
Classification: G11C,H03K

Abstract:
1. A semiconductor memory device for transmitting inputted data comprising: buffering means for buffering the input data; window adjusting means for adjusting a window of the buffered data outputted from the buffering means in response to a plurality of metal options; and transmitting means for delivering output of the window adjusting means into a core block, wherein the window adjusting means includes: a first metal option arranged between a first power voltage and a first node; a second metal option arranged between the first node and a input node of the window adjusting means, and a first output driving unit for driving the data delivering node according to a voltage level of the first node, wherein the first and second metal options are serially coupled between the first power voltage and the input node of the window adjusting means, and the first node is coupled to the first output driving unit.