Patent ID: 8374571
Filing Date: 2013-02-12
Classification: H03H,H03K,H04B

Abstract:
1. A semiconductor integrated circuit comprising: a reception mixer; and a signal generator which generates local signals supplied to the reception mixer, wherein the reception mixer is supplied with an RF received signal and the local signals to thereby generate reception mixer output signals, wherein the signal generator includes a multistage delay circuit, a phase detection unit and a clock generation unit, wherein the multistage delay circuit generates a pulse train including a plurality of clock pulse signals different from each other in phase timing by a predetermined delay time in response to a carrier signal included in the RF received signal, wherein the phase detection unit detects differences between a voltage level of a specific clock pulse signal generated in the pulse train generated from the multistage delay circuit, and voltage levels of a predetermined number of clock pulse signals generated prior to the specific clock pulse signal to thereby detect that the specific clock pulse signal has a prescribed phase and generate a detection output signal, wherein the clock generation unit includes a selector and a first signal synthetic logic circuit, wherein the selector outputs a plurality of selection clock pulse signals respectively having a plurality of previously selected phases from the clock pulse signals generated from the multistage delay circuit in response to the detection output signal generated from the phase detection unit, and wherein the first signal synthetic logic circuit performs logical operations on the selection clock pulse signals outputted from the selector to thereby generate the local signals supplied to the reception mixer.