Patent ID: 6469583
Filing Date: 2002-10-22
Classification: H03L

Abstract:
A PLL control circuit comprising:a reference frequency oscillator for executing oscillation at a reference oscillation frequency; a voltage controlled oscillator (VCO) for feeding out an output at a frequency corresponding to a control voltage; first and second variable frequency dividers for frequency dividing the outputs of the reference frequency oscillator and the VCO, respectively; a phase comparator for phase comparing the outputs of the two variable frequency dividers; a low-pass filter for filtering out the output of the phase comparator and feeding the control voltage to the VCO; a serial-to-parallel converter for controlling the variable frequency dividers; a first plurality of registers for storing different frequency division numbers of the first variable frequency divider received from the serial-to-parallel converter; and a second plurality of registers for storing frequency division numbers to be provided to the second variable frequency divider through the serial-to-parallel converter.