Patent ID: 6710449
Filing Date: 2004-03-23
Classification: H01L,Y10S

Abstract:
An interconnection structure in a semiconductor integrated circuit device, the structure comprising:a first supporting film formed under a first interconnect layer; a second supporting film formed over the first interconnect layer; a first and a second wiring formed in the first interconnect layer; a first dummy pattern formed in the first interconnect layer so that the first dummy pattern is spaced apart from the first wiring by a distance equal to or smaller than a predetermined value; an air gap provided in a region where a distance between the first and the second wiring or between the first wiring and the first dummy pattern is equal to or smaller than the predetermined value, the air gap being from the first supporting film to the second supporting film and from either the first wiring to the second wiring or the first wiring to the first dummy pattern, in the first interconnect layer; and an interlevel dielectric film filling regions other than the air gap in the first interconnect layer.