Patent ID: 6243321
Filing Date: 2001-06-05
Classification: G11C

Abstract:
For an electrically alterable non-volatile multi-level memory including a plurality of non-volatile multi-level memory cells, each of the multi-level memory cells including a floating gate FET having a channel with electrically alterable voltage threshold value, electrons being capable of being injected into the floating gate, a method of operating the electrically alterable non-volatile multi-level memory, comprising:setting a voltage threshold value of at least one non-volatile multi-level memory cell of the plurality of non-volatile multi-level memory cells to one state selected from a plurality of states including at least a first state, a second state, a third state and a fourth state in response to information to be stored in the one non-volatile multi-level memory cell, andreading status of the one non-volatile multi-level memory cell from an output from a bit line coupled to a drain terminal of the one non-volatile multi-level memory cell,wherein the operation of setting the voltage threshold value of the one non-volatile multi-level memory cell includes a program operation, in which electrons are injected into the floating gate of the one non-volatile multi-level memory cell by applying at least one programming pulse supplied to the bit line, andwherein the program operation of the one non-volatile multi-level memory cell is carried out with a plurality of programming pulses, the plurality of programming pulses includes at least a first programming pulse and a second programming pulse after the first programming pulse, a parameter of the first programming pulse has a first predetermined value and a same parameter of the second programming pulse has a second predetermined value different from the first predetermined value so that a first voltage threshold value change of the one non-volatile multi-level memory cell caused by the first programming pulse is substantially larger than a second voltage threshold value change of the one non-volatile multi-level memory cell caused by the second programming pulse.