Patent ID: 7518194
Filing Date: 2009-04-14
Classification: H01L

Abstract:
1. A monolithic circuit, formed in a body of semiconductor material having flat surface, comprising: a bipolar transistor having emitter, base and collector regions; at least one MOS-type field effect transistor having source region, drain region and gate structure; said emitter region positioned within said base region; said drain and said source regions positioned within said collector region; the drain region is the base region; said gate structure including: a part of the collector between the source and the drain; a layer of non-conductive material covering said part; a conductive material covering said layer; said collector having internal region, peripheral region and bottom region; said internal region extending to the surface; said peripheral region extending to the surface around the internal region; said bottom region extending to the internal region and to the peripheral region; said peripheral region and said bottom region being formed by impurities of relatively high concentration compare to the concentration of the impurities in the internal region; said peripheral region and said bottom region forming together complete conductive barrier on all sides of the collector but the surface; said peripheral region being connected from the surface to a constant electric potential, such as positive or negative power rail.