Patent ID: 6146941
Filing Date: 2000-11-14
Classification: H01L

Abstract:
A method of fabricating a capacitor, comprising:providing a substrate, wherein at least a gate and at least a source/drain region is formed on the substrate, and wherein a spacer is formed at a periphery of the gate and a cap layer is formed at a top of the gate;forming an insulating layer over the substrate to at least cover the gate and the source/drain region;patterning the insulating layer to form an opening which expose the source/drain region, wherein the opening has a side wall;forming a conformal glue/barrier layer on the side wall and coupled to the source/drain region;forming a first conformal thin conductive layer on the glue/barrier layer to act as a lower electrode;forming a dielectric thin film on the first conductive layer; andforming a second conductive layer on the dielectric thin film to act as an upper electrode.