Patent ID: 6278289
Filing Date: 2001-08-21
Classification: G11C

Abstract:
A content-addressable memory (CAM) comprising:a. a data bus having a plurality of data lines;b. a first programmable look-up table (LUT) having a first plurality of LUT input terminals and a first LUT output terminal, wherein more than half of the first LUT input terminals connect to respective ones of the data lines, and wherein the first programmable LUT is configured to output a first match signal on the LUT output terminal in response to a first bit pattern presented on the data bus;c. a second programmable LUT having a second plurality of LUT input terminals and a second LUT output terminal, wherein more than half of the second LUT input terminals connect to respective ones of the data lines, and wherein the second programmable LUT is configured to output a second match signal on the LUT output terminal in response to a second bit pattern presented on the data bus; andd. a decoder having a first decoder input terminal connected to the first LUT output terminal, a second decoder input terminal connected to the second LUT output terminal, and a decoder output bus;e. wherein the decoder is adapted to provide a first address on the decoder output bus in response to the first match signal and to provide a second address on the decoder output bus in response to the second match signal.