Patent ID: 8037277
Filing Date: 2011-10-11
Classification: G06F

Abstract:
1. A non-transitory computer-readable storage medium that stores a program for causing a processor to perform a process for accessing a local memory that caches a part of data stored in a main memory, the process comprising: acquiring (1) a first address that specifies a start address of a first area in the main memory where target data to be cached is stored and (2) range information that specifies a size of the first area in the main memory; converting a part of a bit string of the first address into a second address that specifies a start address of a second area in the local memory; copying the target data stored in the first area specified by the first address and the range information into the second area specified by the second address and the range information; and storing the second address to allow accessing of the target data copied into the local memory, wherein the first address and the range information are acquired by reading the first address and the range information from a register provided in the processor, the register storing data to be processed, and wherein the second address is stored by writing the second address to the register.