Patent ID: 6303425
Filing Date: 2001-10-16
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device in which a gate transistor is operable to store information in a capacitor formed of a storage node, which is arranged at a crossing between a bit line and a word line, a capacitor insulating film and a cell plate electrode, comprising the steps of:preparing a substrate on which a dielectric member and a semiconductor layer are formed successively;forming a first conductive layer containing impurity of a first conductivity type at a surface of said semiconductor layer, said first conductive layer forming one of source/drain regions and also forming said bit line;forming a first interlayer insulating film on said substrate;forming a gate electrode, which forms said word line and has upper and lower surfaces, on said first interlayer insulating film;forming a second interlayer insulating film on said substrate to cover said gate electrode;forming a contact hole which penetrates said first interlayer insulating film, said gate electrode and said second interlayer insulating film, and reaches a surface of said first conductive layer;covering a side wall of said contact hole with a gate insulating film;forming a second semiconductor layer on said substrate, said second semiconductor layer being in contact with the surface of said first conductive layer and filling said contact hole;implanting impurity of the first conductivity type into a surface of said second semiconductor layer;diffusing said impurity implanted into the surface of said second semiconductor layer into said second semiconductor layer, and diffusing said impurity contained in said first conductive layer from said first conductive layer into said second semiconductor layer, whereby said second semiconductor layer is provided with a region, which forms the other of said source/drain regions and also forms said storage node, and a channel region, which is located between said other of said source/drain regions and said one of said source/drain regions;forming a capacitor insulating film on said other of said source/drain regions; andforming a cell plate on said storage node with said capacitor insulating film therebetween.