Patent ID: 7868380
Filing Date: 2011-01-11
Classification: H01L

Abstract:
1. A structure of a fin field effect transistor (fin FET) formed on a bulk silicon substrate on which an active region and a non-active region are defined by a device isolation film, said structure comprising: a fin active region having a protrusion shape with a step coverage of predetermined height from the device isolation film; a first recess having a first depth measured from an upper surface of the fin active region in the device isolation film; a gate electrode that is in a second recess having a second depth from an upper surface of the fin active region and extends beyond the upper surface of the fin active region, the second depth less than the first depth; a gate insulation layer disposed between the fin active region and the gate electrode, the gate insulation layer within the second recess; and a source/drain region disposed in the fin active region on both sides of the gate electrode.