Patent ID: 8048727
Filing Date: 2011-11-01
Classification: H01L

Abstract:
1. A method of forming a static random access memory (SRAM) device, comprising: providing a semiconductor substrate having at least one cell active region in a cell array region and a plurality of peripheral active regions in a peripheral circuit region; forming cell gate patterns sequentially stacked on at least one cell active region in the cell array region and peripheral gate patterns on the peripheral active regions in the peripheral circuit region, forming an etch stop layer on the peripheral gate patterns and a portion of the cell gate patterns; forming a protective interlayer-insulating layer on the etch stop layer, the protective interlayer-insulating layer isolating the cell gate patterns from each other; exposing at least one portion of the peripheral gate patterns and the semiconductor substrate near the at least one portion of the peripheral gate patterns; forming metal silicide layers on the at least one portion of the peripheral gate patterns and on the semiconductor substrate near the at least one portion of the peripheral gate patterns, respectively; and forming buried layer patterns on the metal silicide layers.