Patent ID: 6389088
Filing Date: 2002-05-14
Classification: H04L

Abstract:
In a receiver of a digital communication system, a method of detecting a periodic synchronization signal having a bit synchronization pattern, the method comprising the steps of:(a) accumulating a set of samples during a frame; (b) computing an inphase correlation value and a quadrature correlation value for the set of samples; (c) computing a partial power for the set of samples; (d) repeating steps (a), (b) and (c) for a plurality of frames; (e) computing an inphase sum from the inphase correlation values of the plurality of frames and a quadrature sum from the quadrature correlation values of the plurality of frames; (f) computing a signal power as the sum of the squares of the inphase sum and quadrature sum; (g) computing a total power as the sum of the partial powers of the plurality of frames; and (h) declaring a detection of the periodic synchronization signal by said receiver if the signal power is above a minimum threshold and greater than a required percentage of the total power.