Patent ID: 9018966
Filing Date: 2015-04-28
Classification: G01R

Abstract:
1. A test apparatus for testing a semiconductor device comprising: a circuit board having a pattern of signal contacts and a pattern of guard contacts, the circuit board is configured as a plate having a top side, a bottom side, and an opening through the top and bottom sides; and a probe card including a wire guide, a probe tile connected with the wire guide, a plurality of probe wires supported by the wire guide and probe tile, each probe wire is positioned through the wire guide and the probe tile, each probe wire includes a probe tip extending through the probe tile, the probe tips forming an array to probe a device under test, each probe wire includes a signal transmitting portion and a guard portion exposed from the wire guide, the signal transmitting portions and the guard portions form a contact pattern and, with the array, are disposed on one side of the probe card, and a retainer member is disposed on another side of the probe card, wherein the probe tile is insertable into the opening of the circuit board to allow the array to probe a device under test, and the contact pattern of the probe card is contactable with the pattern of signal contacts and guard contacts on the circuit board, such contact of the probe card with the circuit board allows signals to be transferred through the probe wires and circuit board.