Patent ID: 9021411
Filing Date: 2015-04-28
Classification: G01R,G06F

Abstract:
1. A method for determining signal propagation time delays for signals transmitted in a microelectronic device, wherein the microelectronic device comprises of a first layer and a second layer interconnected by at least one interconnecting structure, comprising the steps of: transmitting a first signal through a first path; a test engine determining a signal propagation time of the first signal; transmitting a second signal through a second path, wherein the second path includes the second signal traversing across at least one interconnecting structure, and wherein the at least one interconnecting structure comprises of one or more of a through silicon via and a micro C4 bump combination; the test engine determining a signal propagation time of the second signal; the test engine determining a propagation time difference between the signal propagation time of the first signal and the signal propagation time of the second signal; the test engine storing the determined propagation time difference in association with an identifier associated with the second path; the test engine determining that a third signal is to be transmitted through the second path; and responsive to determining that a third signal is to be transmitted through the second path, the test engine adjusting a clock based on the determined propagation time difference.