Patent ID: 8085063
Filing Date: 2011-12-27
Classification: G11C,H03K

Abstract:
1. A programmable logic device integrated circuit comprising: an array of programmable memory elements that is divided into at least two subarrays, wherein each programmable memory element has a storage element formed from cross-coupled inverters, wherein each of the cross-coupled inverters receives a ground voltage; programmable logic that is configured by configuration data loaded into the programmable memory elements; and at least two storage element power supply voltage circuits each of which supplies a separate storage element power supply voltage to a respective one of the subarrays for powering the storage elements in the programmable memory elements of that subarray, wherein each storage element power supply voltage circuit is operable to supply its separate storage element power supply voltage at a first voltage that is different from the ground voltage during configuration operations when the configuration data is being loaded into the programmable memory elements and at a second voltage that is greater than the first voltage during normal operations when the programmable logic is configured by the configuration data loaded into the programmable memory elements.