Patent ID: 6388280
Filing Date: 2002-05-14
Classification: H01L

Abstract:
A semiconductor device comprising a semiconductor substrate having an upper main surface and a lower main surface, said semiconductor substrate including:a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type which is formed on said first semiconductor layer to be exposed to said upper main surface and has a higher impurity concentration than said first semiconductor layer; a third semiconductor layer of a second conductivity type which is selectively formed in said upper main surface more shallowly than said second semiconductor layer, is divided into and provided as a plurality of band-shaped portions parallel with each other, and is not provided with a downward protrusion having a higher impurity concentration in a bottom portion than a periphery; a fourth semiconductor layer of the first conductivity type which is selectively formed in said upper main surface and is divided into and provided as a plurality of ladder-shaped portions parallel with each other, each of said ladder-shaped portions being formed to be extended more shallowly in and along any of at least a part of said band-shaped portions individually corresponding thereto; and a fifth semiconductor layer of the second conductivity type which is selectively formed in said upper main surface and couples said band-shaped portions to each other, said semiconductor device further comprising: an insulating film formed on a region interposed between adjacent sets of said ladder-shaped portions in said upper main surface; a gate electrode formed on said insulating film and opposed to said region; a first main electrode connected to each of said band-shaped portions and connected to each of said ladder-shaped portions through at least a crosspiece portion thereof; and a second main electrode connected to said lower main surface.