Patent ID: 7733712
Filing Date: 2010-06-08
Classification: G11C

Abstract:
1. A storage subsystem, comprising: a controller that writes data to, and reads data from, a non-volatile storage medium; a charge pump circuit that receives a power signal from a host system and generates a regulated power signal that is provided to the controller, wherein the charge pump circuit is capable of maintaining the regulated power signal to the controller when the power signal from the host system is interrupted; an isolation circuit that substantially prevents power in the controller from flowing back to the host system when the power signal from the host system is interrupted, whereby the power is preserved in the controller to complete outstanding memory operations; and a voltage detection circuit that monitors the power signal from the host system to detect anomalies therein, and responds to detection of such an anomaly by asserting a busy signal to the controller, wherein the controller further comprises a ready/busy logic circuit that asserts a busy signal to block the host system from performing write operations to the storage subsystem when either or both of the following occur: (a) the controller receives a busy signal from the voltage detection circuit; (b) a busy signal is generated by the controller as a result of a memory access operation.