Patent ID: 8943263
Filing Date: 2015-01-27
Classification: G06F,G11C

Abstract:
1. A method of reducing read-disturb errors in a memory system comprising a memory space organized into a plurality of blocks, each block comprising a plurality of pages, and each page defining an individually addressable physical memory location, the method comprising the steps of: accumulating a Block READ Count using a first predefined increment corresponding to the number of times any of the pages in a first block have been read without an error being detected in any of the pages in the first block and using a second predefined increment if an error is detected in any of the pages in the first block, the second predefined increment being larger than the first predefined increment; determining whether the Block READ Count for the first block has reached a predetermined number; and after the Block READ Count for the first block has reached a predetermined number: in response to a first READ request, and as a result of the first READ request directed to a first target page within the first block, moving data stored within the first target page to a second block that is different from the first block and designating data that remains stored within the first target page as invalid data while retaining within the first block valid data stored within pages in the first block other than the first target page; and in response to a subsequent READ request directed to a second target page within the first block, and as a result of a second READ request, moving the data stored within the second target page to a block that is different from the first block and designating data that remains stored within the second target page as invalid data while retaining within the first block valid data stored within pages in the first block other than the second target page, the second READ request being received after the first READ request.