Patent ID: 9153504
Filing Date: 2015-10-06
Classification: H01L

Abstract:
1. A semiconductor device comprising: a bottom electrode; a dielectric layer located above, and in physical contact with, the bottom electrode; a top electrode located above, and in physical contact with, the dielectric layer, the top electrode having an opening, wherein the bottom electrode, the dielectric layer, and the top electrode is a first metal-insulator-metal (MiM) capacitor; a first top contact interconnect electrically coupling the top electrode to a top electrode of another MiM capacitor, the first top contact interconnect being completely covered by a dielectric material; a first top contact contacting the top electrode; a first bottom contact contacting the bottom electrode from a top electrode direction through the opening in the top electrode; a first metal bump connecting to the top contact; and a second metal bump connecting to the bottom contact.