Patent ID: 6751693
Filing Date: 2004-06-15
Classification: G06F

Abstract:
A method for assigning addresses to expanders in a computer I/O subsystem, the I/O subsystem having one or more buses, each bus having an N-bit data bus for communication, the method comprising:providing one or more expanders in the computer I/O subsystem, each expander being arranged to couple a pair of buses for communicating data and control signals; defining an expander address space for the expanders by partitioning an N-bit data bus into a pair of fields that includes an expander ID field and an expander signature field; and assigning an address to each of the expanders, each address including a common expander signature in the expander signature field and an expander ID in the expander ID field, wherein more than two bits are asserted in the assigned address of each of the expanders.