Patent ID: 7029968
Filing Date: 2006-04-18
Classification: H01L

Abstract:
1. A method of forming a capacitor, the method comprising: providing a workpiece, the workpiece including at least one capacitor region and at least one transistor region; depositing a first semiconductor layer over the workpiece; forming a hard mask layer over the first semiconductor layer; patterning the hard mask layer with a pattern for at least one bottom electrode in the at least one capacitor region and a pattern for at least one floating gate in the at least one transistor region; forming a first poly-oxide region over the pattern for each at least one floating gate and forming a second poly-oxide region over the pattern for each at least one bottom electrode, the first poly-oxide region having a first top surface and the second poly-oxide region having a second top surface; removing the hard mask layer, leaving portions of the first semiconductor layer exposed; removing the exposed portions of the first semiconductor layer to form the at least one floating gate in the at least one transistor region and the at least one bottom electrode in the at least one capacitor region, the at least one floating gate having first sidewalls and the at least one bottom electrode having second sidewalls; forming a first oxide layer over the first top surface of the first poly-oxide region, the second top surface of the second poly-oxide region, the second sidewalls of the at least one bottom electrode, and the first sidewalls of the at least one floating gate; removing the first oxide layer and the second poly-oxide region in the at least one capacitor region; forming a second oxide layer over at least the at least one capacitor bottom electrode in the capacitor region; depositing a second semiconductor layer over the second oxide layer; and removing portions of the second semiconductor layer to form a control gate proximate each at least one floating gate in the at least one transistor region and a top electrode over each bottom electrode in the at least one capacitor region.