Patent ID: 6594721
Filing Date: 2003-07-15
Classification: G06F

Abstract:
A computer system, comprising:a processor executing an operating system; a bridge logic device coupled to said processor; a display coupled to said bridge logic device; a peripheral device bridge coupled to said bridge logic device; a plurality of bays connected to said peripheral device bridge, said peripheral device bridge controlling said bays; a BIOS ROM coupled to said bridge logic device, the BIOS ROM detecting a peripheral device hot bay swap insertion or removal event for one of said plurality of bays and communicating said hot bay swap event to a bridge device driver; a device specific driver communicating with said peripheral device connected to one of said plurality of bays after a hot bay swap insertion event, the device specific driver called by the bridge device driver; and wherein said bridge device driver and device specific driver configure said peripheral device and permit said operating system to recognize and interface with said peripheral device after the insertion event.