Patent ID: 6737347
Filing Date: 2004-05-18
Classification: H01L

Abstract:
A method of making a semiconductor device, comprising the steps of:a. fabricating a structure that includes laterally spaced first and second sections with respective upwardly facing first and second surface portions there on, and that includes a third section projecting upwardly beyond each of said first and second surface portions from a location therebetween, said third section having in the region of an upper end thereof and upwardly facing third surface portion, and said first, second and third portions each being provided on material which is one of conductive and semiconductive; b. fabricating said third section with first and second wall portions which are disposed on opposite sides of and project upwardly beyond said third surface portion, the first and second wall portions include a first insulating material; c. forming on said structure an insulating layer which has portions disposed over said first and second surface portions, said third section extending into said insulating layer; d. planarizing an upper side of said device to a level corresponding to the upper end portion of said first and second wall portions, so that the third surface is protected from the planarizing; e. etching said device, including the step of effecting a patterned etch of an upper side of said insulating layer using an etch pattern, said etch pattern including an etch region which extends from a location disposed over said first surface portion to a location disposed over said second surface portion, said patterned etch creating first and second recess portions which respectively extend downwardly through said insulating layer toward said first and second surface portions on opposite sides of said third section, wherein at the completion of said etching step said first, second and third surface portions are exposed; f. depositing a conductive material into said first and second recess portions; and g. planarizing an upper side of said device at least to a level corresponding to an upper end portion of said third section, so that said first and second recess portions have therein respective portions of said conductive material which respectively have upwardly facing fourth and fifth surface portions on the upper ends thereof.