Patent ID: 6326555
Filing Date: 2001-12-04
Classification: H05K,Y10T

Abstract:
A method for forming a multilayer printed circuit substrate comprising:forming a laminate comprising a first circuitized layer having a first conductive region, a bonding sheet, and a release layer, wherein the bonding sheet is disposed between the first circuitized layer and the release layer;forming an aperture in the bonding sheet and the release layer to expose the first conductive region;depositing a conductive composition within the aperture;reflowing the conductive composition while the conductive composition is within the aperture to form a conductive bump;separating the release layer from the bonding sheet; andlaminating a second circuitized layer having a second conductive region to the first circuitized layer so that the conductive region of the second circuitized layer is electrically coupled to the conductive bump.