Patent ID: 8384184
Filing Date: 2013-02-26
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor-on-insulator substrate comprising a support layer, a buried insulator layer overlying the support layer, and a layer of semiconductor material overlying the buried insulator layer; additional semiconductor material overlying the layer of semiconductor material, the additional semiconductor material comprising a first semiconductor region having a first conductivity type; a second semiconductor region located in the additional semiconductor material and having a second conductivity type; a third semiconductor region located in the additional semiconductor material above the second semiconductor region and having the first conductivity type; a fourth semiconductor region located in the additional semiconductor material above the third semiconductor region and having the second conductivity type; a fifth semiconductor region located in the additional semiconductor material above the second semiconductor region and having the second conductivity type, the fifth semiconductor region being adjacent to both the third semiconductor region and the fourth semiconductor region; and a sixth semiconductor region located in the additional semiconductor material adjacent to the fourth semiconductor region and having the first conductivity type, wherein no portion of the second semiconductor region is located under the sixth semiconductor region.