Patent ID: 6841460
Filing Date: 2005-01-11
Classification: H01L

Abstract:
1. A method of using anti-code dosage as LDD implant to turn off a MOS transistor comprising the steps of: providing a substrate having an NMOS region and a PMOS region; forming a dielectric layer over said substrate, including over said NMOS and PMOS regions; forming an NMOS gate electrode over said NMOS region and a PMOS gate electrode over said PMOS region over said dielectric layer formed over said NMOS and PMOS regions; performing an N-type lightly doped drain (NLDD) implant over said NMOS region; performing P-type lightly doped drain (PLDD) implant over said PMOS region; performing a code implant over said NMOS region; performing a code implant over said PMOS region; and performing an anti-code LDD implant to turn off said MOS transistor.