Patent ID: 7538027
Filing Date: 2009-05-26
Classification: H01L

Abstract:
1. A method for fabricating semiconductor interconnections of a Cu-alloy embedded in respective recesses provided in an insulating film on a semiconductor substrate, said method comprising the steps of: forming the respective recesses having a minimum width not more than 0.15 μm, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1; forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses; and subsequently, annealing the Cu-alloy film to not lower than 200° C., and pressurizing the Cu-alloy film to not less than 50 MPa to thereby embed the Cu-alloy film into the respective recesses.