Patent ID: 9070585
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A process of forming an electronic device comprising: forming a semiconductor layer over a substrate, wherein the semiconductor layer has a primary surface; patterning the semiconductor layer to define a first trench and a second trench that extend from the primary surface towards the substrate; forming first conductive structures within the first and second trenches; forming a first insulating member within the first trench after forming the first conductive structures; forming a gate electrode within the first trench, wherein within the first trench, the first insulating member is disposed between the gate electrode and the first conductive structure; forming a source region adjacent to the first trench; forming a second insulating member within the second trench after forming the first conductive structures; and forming a second conductive structure, wherein within the second trench, the second insulating member is disposed between the second conductive structure and the first conductive structure, wherein the source region is electrically connected to the second conductive structure.