Patent ID: 6466153
Filing Date: 2002-10-15
Classification: H03M

Abstract:
In a stage of a pipelined analog-to-digital converter that samples an input voltage at each of a sequence of sample times and provides a sequence of digital outputs representing a magnitude of said sampled input voltage, said stage including an amplifier and said stage including a plurality of capacitors which are connected between said input voltage and an AC ground at a first time and which are connected between the output of said amplifier and an input of said amplifier or, alternatively, between said input of said amplifier and one of a plurality of reference voltage sources, at a second time, a method for shuffling said capacitors comprising the steps of:deriving a plurality of coded input values from a digital representation of said input voltage, each such coded value corresponding to the connection of one of said capacitors between said input of said amplifier and either said at least one voltage sources or said output of said amplifier; providing a predetermined sequence of control codes; shuffling said coded input values in accordance with said sequence of control codes; and at said second time connecting said plurality of capacitors between said input of said amplifier and said at least one of said reference voltage sources or said output of said amplifier, in accordance with said shuffled coded input values.