Patent ID: 6335639
Filing Date: 2002-01-01
Classification: H03K

Abstract:
A logic gate for producing an output signal representing a logical operation of a first logic signal and a second logic signal, the logic gate comprising:a first input receiving the first logic signal; a second input receiving the second logic signal; an evaluation node connected to a pre-charge device; a fist transistor having a first terminal coupled to the first input, a second terminal coupled to the evaluation node, and a third terminal coupled to the second input; and a second transistor having a first terminal coupled to the second input, a second terminal coupled to the evaluation node, and a third terminal coupled to the first input; wherein a change in either of the logic signals triggers the logic gate and a change in both of the logic signals within a predetermined time period results in the logic signals simultaneously canceling each other out; and wherein the pre-charge device has one end connected to a clock signal and another end connected to a supply voltage signal.