Patent ID: 6395607
Filing Date: 2002-05-28
Classification: H01L

Abstract:
A process for forming a microelectronic device which comprises:(a) forming a first dielectric layer on a substrate; (b) forming a trench having inside walls through the first dielectric layer; (c) lining the inside walls of the trench and covering a top of the first dielectric layer with a first layer of a barrier metal; (d) filling the trench with a fill metal and covering the top of the first layer of the barrier metal with a layer of the fill metal, wherein the fill metal and the barrier metal have substantially different removal selectivities; (e) removing the layer of the fill metal from the top of the first layer of the barrier metal and forming a recess in the fill metal in the trench extending to a level below the top of the first layer of the barrier metal on the first dielectric layer; (f) filling the recess with the barrier metal and optionally depositing a second layer of the barrier metal onto the top of the first layer of barrier metal; (g) removing the optional second layer of barrier metal from the top of the first dielectric layer and leaving the barrier metal in the recess such that the barrier metal in the recess conforms to the top of the underlying fill metal in the trench; (h) depositing a second dielectric layer onto the first dielectric layer and onto the barrier metal in the recess.