Patent ID: 8031537
Filing Date: 2011-10-04
Classification: G06F,G11C

Abstract:
1. A storage device comprising: latch control terminals to which latch control signals for performing latch control on a series of signals are input; a plurality of signal terminals to which the series of signals is input; a plurality of latch circuits which are provided so as to correspond to the plurality of signal terminals, where the latch control terminal is disposed such that at least a portion of a region which is not away from the latch control terminal more than a specified distance overlaps at least a part of each region which is also not away from an associated signal terminal more than a specified distance; and a first latch circuit corresponding to a first signal terminal is disposed within a first region, a second latch circuit corresponding to a second signal terminal is disposed within a second region, and a third latch circuit corresponding to a third signal terminal is disposed within a third region, so that the distances from the first, second and third terminals to their associated latch circuits fall within a specified range and the distances from the latch control terminal to the respective latch circuits fall within the same specified range; wherein the delays of signal transmission from the signal terminals to their associated latch circuits may be equalized between the signals, and the delays of signal transmission from the latch control terminals to the latch circuits can be equalized between signals.