Patent ID: 9165790
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A packaging substrate, comprising: a base layer comprising a first surface and a second surface opposite to the first surface; a first wiring layer formed on the first surface and a second wiring layer formed on the second surface; a first solder mask layer covering the first wiring layer and the first surface, the first solder mask layer defining a plurality of first openings to expose the first wiring layer, the first wiring layer exposed through the first openings serving as first contact pads; a second solder mask layer covering the second wiring layer and the second surface, the second solder mask layer defining a plurality of second openings to expose the second wiring layer, the second wiring layer exposed through the second openings serving as second contact pads, the second openings being frustoconical tapering toward the second wiring layer; and a plurality of copper portions respectively formed on and electrically connected with the second contact pads in the second openings and being frustoconical tapering toward the second contact pads, the copper portions protruding beyond a surface of the second solder mask layer.