Patent ID: 6590247
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A MOS capacitor comprising:a semiconductor substrate of a first conductivity type; a first well region of a second conductivity type formed within said substrate; a second well region of the first conductivity type formed within said first well region; at least one first plurality of doped contact regions of the second conductivity type formed in said first well region for biasing said first well region and disposed substantially along the inner perimeter of said first well region; at least one first plurality of doped regions of first conductivity type formed within said first well region disposed substantially concentric to the said at least one first plurality of doped contact regions of the second conductivity type; at least one second plurality of doped contact regions of the first conductivity type formed in said second well region for biasing said second well region and disposed substantially along the inner perimeter of said second well region; and at least one second plurality of doped regions of second conductivity type formed in said second well region and disposed substantially concentric to said at least one second plurality of doped contact regions of first conductivity type.