Patent ID: 9129836
Filing Date: 2015-09-08
Classification: H01L,H03K

Abstract:
1. A circuit with a first terminal, a second terminal, a third terminal and a fourth terminal, comprising: a first switch, which is formed to switch a first signal from the first terminal to the second terminal or from the first terminal to the fourth terminal; and a second switch, which is formed to switch a second signal from the third terminal to the second terminal or from the third terminal to the fourth terminal, wherein the first switch comprises a first switching element with a first high-frequency switching transistor, which is connected between the first terminal and the second terminal, and a second switching element with a second high-frequency switching transistor, which is connected between the first terminal and the fourth terminal, and wherein the second switch comprises a third switching element with a third high-frequency transistor, which is connected between the third terminal and the second terminal and comprises a fourth switching element with a fourth high-frequency switching transistor, which is connected between the third terminal and the fourth terminal, wherein the first, second, third and fourth high-frequency switching transistors are controllable such that the fourth high-frequency switching transistor is opened when the first high-frequency switching transistor is opened, the fourth high-frequency switching transistor is closed when the first high-frequency switching transistor is closed, the third high-frequency switching transistor is opened when the second high-frequency switching transistor is opened, and the third high-frequency switching transistor is closed when the high-frequency switching transistor is closed; wherein the first, second, third and fourth high-frequency switching transistors comprise: a substrate having a substrate dopant concentration; a barrier region bordering on the substrate, comprising a first conductivity type and having a barrier region dopant concentration, which is higher than the substrate dopant concentration; a source region embedded in the barrier region, comprising a second conductivity type different to the first conductivity type, and having a source region dopant concentration, which is higher than the barrier region dopant concentration; a drain region embedded in the barrier region and disposed offset from the source region, comprising the second conductivity type and having a dopant concentration, which is higher than the barrier region dopant concentration; a channel region disposed between the source region and the drain region, wherein the channel region comprises a subregion of the barrier region; and an insulation region, which covers the channel region and is disposed between the channel region and a gate electrode.