Patent ID: 8296694
Filing Date: 2012-10-23
Classification: G06F

Abstract:
1. A computer-implemented method for generating a circuit wrapper for an integrated circuit element, comprising: receiving at a computer system a first dataset describing an integrated circuit element, wherein the first dataset describes at least one input specification and at least one output specification of the integrated circuit element; receiving at the computer system a second dataset describing a mapping relationship between the circuit wrapper and the integrated circuit element, wherein the circuit wrapper comprises a wrapper instruction register for loading a wrapper instruction, a wrapper input, and a wrapper output, the second dataset defines a set of wrapper instructions, and the mapping relationship maps, for a wrapper instruction from the set of wrapper instructions, the wrapper input to at least one integrated circuit input and the wrapper output to at least one integrated circuit output; and generating at the computer system the circuit wrapper using the first and second datasets, wherein a table is generated from the first and second dataset and the table is traversed in order to implement the mapping into the circuit wrapper by using control logic to multiplex the wrapper input and the wrapper output.