Patent ID: 8138607
Filing Date: 2012-03-20
Classification: H01L

Abstract:
1. A semiconductor structure including: a first dielectric material portion located directly on a semiconductor substrate; a set of metal interconnect structures embedded within, and not extending outside, said first dielectric material portion and providing a least one electrically conductive path between a top surface of said semiconductor substrate to a topmost surface of said first dielectric material portion; a second dielectric material portion laterally surrounding, and located on an outer periphery of, said first dielectric material portion and not in contact with said set of metal interconnect structures; an inner metal fill structure group embedded in, and not extending out of, an inner portion of said second dielectric material portion and including at least two sets of inner contiguous metal fill structures that are vertically separated, wherein each inner contiguous metal fill structure includes no more than 3 metal interconnect levels and separated among one another; and an outer metal fill structure group embedded in, and not extending out of, an outer portion of said second dielectric material portion that laterally surrounds said inner portion of said second dielectric material portion and including at least two sets of outer contiguous metal fill structures that are vertically separated, wherein each outer contiguous metal fill structures includes no more than 3 metal interconnect levels and separated among one another, wherein each of said at least two sets of inner contiguous metal fill structures comprises a different set of metal interconnect levels than any set of metal interconnect levels that constitute an entirety of any of said at least two sets of outer contiguous metal fill structures.