Patent ID: 8102164
Filing Date: 2012-01-24
Classification: H02M,Y02B

Abstract:
1. An apparatus comprising: a control unit to generate a control signal to control a duty cycle of a PWM (Pulse Width Modulation) switching signal that controls a switch in a PFC (Power Factor Correction) converter; and an offset unit coupled to the control unit to generate a variable offset signal to offset the control signal or a signal used by the control unit to generate the control signal, wherein the offset unit includes an amplifier circuit to receive a voltage error signal that is responsive to an output voltage of the PFC converter, wherein the amplifier is coupled to generate the offset signal, the amplifier circuit including a first amplifier to receive and buffer the voltage error signal, to thereby generate a buffered voltage error signal, and a second amplifier to level shift, attenuate and invert the buffered voltage error signal, to thereby generate the variable offset signal for offsetting a current sense signal.