Patent ID: 6245676
Filing Date: 2001-06-12
Classification: C25D,H01L

Abstract:
In a method of manufacturing a semiconductor device comprising the steps of: providing a trench along a wiring scheduled portion of an insulating film formed on a substrate; forming a metal seed layer on the insulating film including said trench; forming a deposit layer of a metal wiring material on said metal seed layer to completely bury said trench with the aid of an electrical plating method where the metal seed layer is used as one electrode; and polishing and removing the deposit layer of the metal wiring material until the insulating film is again exposed, to form a buried wiring in said trench, the improvement being wherein the method further comprises the steps of: upon forming said buried wiring, protruding said deposit layer of the metal wiring material on said trench and on a peripheral area of the same into a protruded configuration by controlling a current of said electrical plating method; and polishing and removing said deposit layer until said insulating film is exposed; and wherein in said electrical plating a bidirectional current alternately temporarily changing in its flow direction is conducted until at least said trench is buried, and a unidirectional current not temporally changing in its flow direction is conducted to protrude said deposit layer of the metal wiring material on said trench and on a peripheral area of the same into a protruded configuration, and said deposit layer is polished and removed until said insulating film is exposed.