Patent ID: 8530904
Filing Date: 2013-09-10
Classification: H01L,H03K

Abstract:
1. A semiconductor device, comprising: a first semiconductor die including a normally-off transistor; a second semiconductor die including a plurality of transistor cells of a normally-on transistor, one of a source terminal/drain terminal of the normally-off transistor being electrically coupled to a gate terminal of the normally-on transistor, the other one of the source terminal/drain terminal of the normally-off transistor being electrically coupled to one of a source terminal/drain terminal of the normally-on transistor; and wherein the second semiconductor die includes a gate resistor electrically coupled between the gate terminal of the normally-off transistor and respective gates of the plurality of transistor cells; and a voltage clamping element electrically coupled between the gate terminal and the one of the source terminal/drain terminal of the normally-on transistor, respectively.