Patent ID: 7999317
Filing Date: 2011-08-16
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device, comprising the steps of: forming a drift region of a first conductivity type in a semiconductor layer; forming a body region of a second conductivity type adjacent a surface of the drift region; forming a low-resistivity region of the second conductivity type in the body region, the low-resistivity region being lower in resistivity than the body region; forming a first semiconductor region of the first conductivity type on a surface region of the body region; forming a contact region on a surface region of the body region, the contact region being formed in contact with the first semiconductor region and being lower in resistivity than the body region; forming an insulating film on the surface of the drift region; forming a gate insulating film on the surface of the body region between the first semiconductor region and the drift region; annealing, at 900° C. to 960° C. for 20 to 40 minutes in a nitrogen atmosphere, to repair crystal lattice disorder occurring during the forming the low-resistivity region and preventing excessive diffusion from occurring in the low resistivity region, the annealing step occurring between the forming of the low-resistivity region and the forming of the gate insulating film; forming a gate electrode on the gate insulating film, the gate electrode being formed after the step of forming a low-resistivity region has been conducted; and forming a first semiconductor electrode in contact with the first semiconductor region and the contact region.