Patent ID: 9000522
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a semiconductor substrate; an insulator layer disposed over the semiconductor substrate; a plurality of semiconductor fins disposed on the insulator layer; and a plurality of embedded spacers disposed in the insulator layer adjacent to each fin; and wherein the insulator layer has a first thickness in an under-fin region located directly below each fin of the plurality of semiconductor fins and a second thickness in an inter-fin region located between each fin of the plurality of semiconductor fins, wherein the first thickness is greater than the second thickness; and wherein the insulator layer in the under-fin region extends above the insulator layer in the inter-fin region; and wherein the insulator layer in the under-fin region extends below the insulator layer in the inter-fin region; and wherein the plurality of fins are merged by an epitaxial region, and wherein the epitaxial region covers the plurality of embedded spacers.