Patent ID: 6133117
Filing Date: 2000-10-17
Classification: H01L

Abstract:
A method of forming an isolation region in a semiconductor device, said method comprising:providing a semiconductor substrate;forming a first implant mask layer over said substrate, said first implant mask layer having a pattern defining the isolation region;firstly implanting ions into said substrate by using said first implant mask layer as a mask, thereby forming a first implanted region in said substrate;forming an etch mask layer over said substrate, said etch mask layer having a pattern substantially aligned to the isolation region;etching an upper portion of the first implanted region by using said etch mask layer as a mask;depositing a dielectric layer over the etched first implanted region to refill empty space of the etched upper portion of the first implanted region;forming a second implant mask layer over said substrate, said second implant mask layer having a pattern aligned within the isolation region; andsecondly implanting ions into said substrate by using said second implant mask layer as a mask, thereby forming a second implanted region located in the etched first implanted region.