Patent ID: 8321637
Filing Date: 2012-11-27
Classification: G06F

Abstract:
1. A method comprising: executing, by a computing system, a string of instructions to complete a transaction of a first thread of a transaction program, beginning with one instruction of said string of instructions; and managing memory access to a shared memory location for transaction data of the first thread, the shared memory location accessible by the first thread and a second thread, the shared memory location being an increment of real system memory, each increment of real system memory having a ‘private to transaction’ (PTRAN) tag directly addressable as part of each increment of real system memory, the managing comprising: determining whether said one instruction is part of an active atomic instruction group (AIG) of instructions associated with the transaction of the first thread, said active AIG identifying a group of memory locations that are to be updated in an atomic fashion; based on determining that said one instruction is part of said active AIG: based on determining that said one instruction is not part of an active AIG, executing a next instruction under normal execution mode.