Patent ID: 7037777
Filing Date: 2006-05-02
Classification: H01L

Abstract:
1. Process for producing an etching mask on a microstructure, in particular a semiconductor structure with one or more trench capacitors, which includes the following steps: (a) providing a lower first, a middle second and an upper third hard-mask layer on a surface of the microstructure, the third hard-mask layer being significantly thinner than the first and second hard-mask layers; (b) providing a photoresist mask above the third hard-mask layer; (c) patterning the third hard-mask layer by etching chemistry using the photoresist mask; (d) patterning the second hard-mask layer by etching chemistry using the patterned third hard-mask layer, with the photoresist mask being removed at the same time; (e) patterning the first hard-mask layer by etching chemistry using the patterned second hard-mask layer, with the third hard-mask layer being removed at the same time; and (f) removing the patterned second hard-mask layer.