Patent ID: 7888212
Filing Date: 2011-02-15
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming a first conductivity type lower well region on a semiconductor substrate; forming a second conductivity type lower source region and a second conductivity type lower drain region in a part of the first conductivity type lower well region; forming a semiconductor epitaxial layer on a substrate surface of the first conductivity type lower well region, a substrate surface of the second conductivity type lower source region, and a substrate surface of the second conductivity type lower drain region; forming an upper well region on the semiconductor epitaxial layer; forming a trench having a depth deeper than a depth of the lower source region and the lower drain region for forming a convex-concave portion by etching; forming an insulating film on an entire surface of the convex-concave portion, and forming a gate electrode via the insulating film; and performing ion implantation on both sides of the gate electrode and forming an upper source region and an upper drain region in contact with the second conductivity type lower source region and the second conductivity type lower drain region, respectively.