Patent ID: 6693467
Filing Date: 2004-02-17
Classification: G05F

Abstract:
A transconductance circuit comprising:at least one transconductance subcircuit connected between two supply terminals and comprising at least one MOS transistor comprising a channel; means for biasing the MOS transistor in the subcircuit with a biasing current having a variation as a function of temperature that substantially compensates mobility of majority carriers in the channel of the MOS transistor in the subcircuit, so as to make the transconductance of the circuit substantially independent of temperature through a gate overdrive voltage defined as a gate-source voltage minus a threshold voltage, the means for biasing comprising a current mirror coupled to the MOS transistor in the subcircuit; a tuning circuit coupled to the current mirror, the tuning circuit comprising: a MOS tuning transistor that carries the biasing current that the current mirror duplicates; a bipolar transistor having an emitter connected to one of the supply terminals via a resistor, having a base connected to the reference-voltage generator and having a collector connected on to the other supply terminal via a series circuit having a diode and a resistor and to the gate of the MOS tuning transistor, which is connected between the other supply terminal and the current; and a reference-voltage generator coupled to the tuning circuit, wherein a gate overdrive voltage of the MOS tuning transistor having a gradient with temperature that is substantially equal and opposite to that of the mobility of the majority carriers in the channel of the MOS transistor in the subcircuit, said gate overdrive voltage of the MOS tuning transistor being obtained from the reference-voltage generator.