Patent ID: 7847377
Filing Date: 2010-12-07
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor chip having at a center area thereof first and second pad rows which include a plurality of first pads and a plurality of second pads, respectively; a package substrate bonded to the semiconductor chip, the package substrate including a substrate opening corresponding to a region including the first and second pad rows, first and second wiring areas positioned at opposite sides of the substrate opening, respectively, a plurality of first ball lands disposed in the first wiring area, a plurality of second ball lands disposed in the second wiring area, a plurality of first leads disposed in the first wiring area, and a plurality of second leads disposed in the second wiring area, each of the first leads being connected to an associated one of the first pads of the semiconductor chip, each of the second leads being connected to an associated one of the second pads of the semiconductor chip, the first ball lands including plural ball lands each connected to an associated one of the first leads, and the second ball lands including plural ball lands each connected to an associated one of the second leads; a bridge section provided over the substrate opening; and at least one third lead, the at least one third lead being connected at one end thereof to at least one of the first leads connected to the first pads of the semiconductor chip, passing over the bridge section, and being connected at the other end thereof to at least one of the second ball lands.