Patent ID: 8633488
Filing Date: 2014-01-21
Classification: G02F,H01L

Abstract:
1. A semiconductor device comprising: a gate electrode, a first wiring and a first electrode over an insulating surface; a first insulating film over the gate electrode, the first wiring and the first electrode; a first semiconductor layer and a second semiconductor layer over the first insulating film; wherein the first semiconductor layer comprises a channel forming region, a first region and a second region, a second insulating film over the first semiconductor layer and the second semiconductor layer; a second electrode and a third electrode over the second insulating film; and wherein the second electrode is electrically connected to the first region; wherein the second electrode is electrically connected to the first wiring, wherein the third electrode is electrically connected to the second region, wherein the third electrode is electrically connected to the first electrode, wherein the first electrode comprises a region overlapped with the second semiconductor layer to form a capacitor.