Patent ID: 6162669
Filing Date: 2000-12-19
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:forming a gate electrode on the principal surface of a semiconductor substrate having a semiconductor region of a first conductivity type on which a first insulating layer is formed;forming first low impurity-concentration regions of a second conductivity type on the principal surface of the semiconductor substrate while a channel region is sandwiched between them;forming a second insulating layer on the principal surface of the semiconductor substrate and the gate electrode;forming side wall insulating material on the side of the gate electrode by reducing the thickness of the second insulating layer from top;removing a damaged layer formed on the surface of at least one of the first low impurity-concentration regions at the time of formation of the side wall by creating a recess with the exception of the area immediately below the side wall insulating material; andforming a second low impurity-concentration region of the second conductivity type below the recess so that a bottom of the second low impurity-concentration region forms a source/drain junction with the substrate.