Patent ID: 7889584
Filing Date: 2011-02-15
Classification: G11C,H03F

Abstract:
1. A semiconductor device comprising, on a single semiconductor chip: a plurality of DQ terminals each receiving a DQ signal supplied from outside of the semiconductor device; a plurality of input circuits each including a first input node coupled to a corresponding one of the DQ terminals to receive the DQ signal and a second input node supplied with a reference voltage, and comparing the DQ signal with the reference voltage to produce an output signal at an output node thereof; a second terminal receiving a DC voltage supplied from the outside of the semiconductor device; and a low-pass filter coupled at one end thereof to the second terminal and at the other end thereof in common to the second input nodes of the input circuits, the low-pass filter transmitting the DC voltage from the second terminal to each of the second input nodes of the input circuits as the reference voltage and attenuating a noise signal which may be supplied to the second terminals together with the DC voltage from the outside of the semiconductor device so that a difference between the reference voltage and the DC voltage caused by the noise signal is suppressed.