Patent ID: 8614128
Filing Date: 2013-12-24
Classification: H01L

Abstract:
1. A method of fabricating semiconductor devices, comprising: providing a substrate having a semiconducting surface and a first layer disposed directly on the semiconducting surface, the semiconducting surface having formed therein a plurality of active regions, the plurality of active regions comprising at least a first active region and a second active region, each of the first active region and the second active region comprising the first layer and a second layer, the first layer comprising a substantially undoped layer that extends across the semiconducting surface and the second layer comprising at least one highly doped screening layer, a combination of the first layer and the second layer defining at least one device characteristic for the semiconductor devices in each of the first active region and the second active region; identifying at least one device characteristic target required for the semiconductor devices in at least a portion of the first active region, the at least one device characteristic target comprising at least a threshold voltage target; tuning the at least one device characteristic in the portion of the first active region to match the at least one device characteristic target by performing a first process with the substrate to remove a part of the first layer to reduce a thickness of the first layer in the portion of the first active region without a corresponding thickness reduction of the first layer in the second active region, the portion of the first active region defining at least one processed region; and forming the semiconductor devices in at least the one processed region and the second active region, wherein a gate for the semiconductor devices is formed directly on the first layer, and wherein the part of the first layer is selected based on the at least one device characteristic target.