Patent ID: 7199662
Filing Date: 2007-04-03
Classification: H03F

Abstract:
1. An output circuit comprising: operational amplifiers and a bias circuit for controlling output of said operational amplifiers to high and low bias modes, wherein said bias circuit comprises: a precharge circuit comprising at least one precharging capacitor and switching elements for performing charging control over said at least one precharging capacitor at a leading edge of a timing signal and performing discharging control over said at least one precharging capacitor at a trailing edge of the timing signal; and a precharge power supply for supplying precharge voltage to said precharge circuit; said bias circuit performing a control at a high bias mode at the leading edge of the timing signal, and changing-over the control from the control at the high bias mode to a control at a low bias mode by discharging control at the trailing edge of the timing signal.