Patent ID: 6495402
Filing Date: 2002-12-17
Classification: H01L

Abstract:
A method of fabricating a semiconductor-on-insulator (SOI) device having a substrate having a buried oxide layer disposed thereon and an active layer disposed on the buried oxide layer, the active layer having an active region defined by isolation regions, the active region having a source and a drain with a body disposed therebetween, and a gate disposed above the body, the method comprising the steps of:providing an SOI wafer that includes the substrate, the buried oxide layer and the active layer; doping the active layer to form source and drain extensions; forming sidewall spacers adjacent the gate; removing a portion of the active layer in the area of each of the source and the drain, the step of removing a portion of the active layer leaving the extensions disposed under the sidewall spacers intact; forming a silicon-germanium region in each of the source and the drain such that the silicon-germanium regions form heterojunction portions respectively along the source/body junction and the drain/body junction; forming an upper layer of silicon on each of the silicon-germanium regions; and doping the source and the drain with deep implants.