Patent ID: 8310638
Filing Date: 2012-11-13
Classification: G02F,G09G

Abstract:
1. A pixel circuit, comprising: a display element unit that includes a unit display element; an internal node constituting a part of the display element unit, the internal node holding a pixel data voltage applied to the display element unit; a first switching circuit that transfers the pixel data voltage supplied by a data signal line to the internal node through at least a prescribed switching element; a second switching circuit that transfers the pixel data voltage supplied by the data signal line to the internal node without passing through the prescribed switching element; and a control circuit that holds, at one end of a first capacitance element, a prescribed voltage corresponding to the pixel data voltage held by the internal node, the control circuit controlling a conducting and non-conducting state of the second switching circuit, wherein the second switching circuit includes a series circuit of a first transistor element and a diode element, the first transistor element having a first terminal, a second terminal, and a control terminal that controls electrical continuity between the first and second terminals, wherein the control circuit includes a series circuit of a second transistor element and the first capacitance element, the second transistor element having a first terminal, a second terminal, and a control terminal that controls electrical continuity between the first and second terminals, wherein respective one ends of the first and second switching circuits are connected to the data signal line, wherein respective other ends of the first and second switching circuits and the first terminal of the second transistor element are connected to the internal node, wherein the diode element serves as a rectifier in a direction from the data signal line to the internal node, wherein the control terminal of the first transistor element, the second terminal of the second transistor element, and the one end of the first capacitance element are connected to each other, forming an output node of the control circuit, wherein the control terminal of the second transistor element is connected to a first control line, and wherein another end of the first capacitance element is connected to a second control line.