Patent ID: 9112060
Filing Date: 2015-08-18
Classification: H01L

Abstract:
1. A method for forming a capacitor structure, the method comprising: forming a first dielectric layer over a substrate; forming a first silicon-containing layer over the first dielectric layer; forming a patterned masking layer over the first silicon-containing layer; performing an etch using the patterned masking layer to form a plurality of openings in the first silicon-containing layer, wherein after said performing the etch each opening has a depth that does not expose the first dielectric layer; forming a second dielectric layer over the first silicon-containing layer and within each of the plurality of openings in the first silicon-containing layer, wherein, after forming the second dielectric layer, each of the plurality of openings has an opening top width and an opening height and the opening height is greater than or equal to the opening top width; and forming a second silicon-containing layer over the second dielectric layer, wherein the second silicon-containing layer fills each of the plurality of openings.