Patent ID: 7598154
Filing Date: 2009-10-06
Classification: B28D,H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising the steps of: (a) preparing a semiconductor wafer having a plurality of semiconductor chip regions divided by a plurality of dicing lines, said semiconductor wafer including a silicon substrate, a plurality of transistors formed on the surface of said silicon substrate, a first insulating layer of a silicon oxide film formed on said plurality of transistors, a plurality of wiring layers formed on said first insulating layer, at least a second insulating layer formed in between said plurality of wiring layers, said second insulating layer having lower dielectric constant than said silicon oxide film, said second insulating layer extending onto said dicing lines, (b) preparing a first blade and a second blade, said first blade including a first portion of a first width and a second portion formed integrally with said first portion, said second portion being formed in a V character shape and having an edge point of second width smaller than the first width, said second blade having a third width smaller than said first width and larger than said second width, (c) performing a first dicing step for cutting said semiconductor wafer by said first blade along said dicing line, and for making said first portion of said first blade reach into said silicon substrate to form a first groove in said silicon substrate along said dicing line, (d) performing a second dicing step for cutting said semiconductor wafer by said second blade along said dicing line following said first dicing step, and for cutting the bottom of said first groove for forming a second groove deeper than said first groove in said silicon substrate along said dicing line.