Patent ID: 6815318
Filing Date: 2004-11-09
Classification: H01L,Y10S

Abstract:
A manufacturing method of a semiconductor device including a first conductivity type impurity region and a second conductivity type impurity region in a semiconductor layer, comprising the steps of:forming on said semiconductor layer an insulating layer including a first contact hole having a top-end opening shape exposing a surface of semiconductor layer to implantation of an impurity at an implantation angle &thgr; to a normal to said semiconductor layer and a second contact hole having a top-end opening shape, different from the top-end opening shape of the first contact hole and blocking a surface of said semiconductor layer to impurity implantation at said implantation angle &thgr;; implanting an impurity of a first conductivity type into said semiconductor layer at said implantation angle &thgr; using said insulating layer as a mask to form said first conductivity type impurity region only in a surface portion of said semiconductor layer exposed by said first contact hole; and forming said second conductivity type impurity region only in a surface portion of said semiconductor layer exposed by said second contact hole by implantation using said second contact hole of said insulating layer.