Patent ID: 7977171
Filing Date: 2011-07-12
Classification: G02F,H01L

Abstract:
1. A method of fabricating a thin film transistor substrate, including a display area which has liquid crystal cells arranged in a matrix type, and a non-display area where is located at an exterior of the display area, the method comprising: forming a gate pattern that is comprised of a gate line which is formed at the display area, a gate electrode which is connected to a gate line, a gate link which is formed at the non-display area, and a lower gate pad electrode which is connected, via the gate link, to the gate line; forming a gate insulating film on a substrate provided with the gate pattern, and then forming a data pattern that is comprised of a data line which is formed at the display area and is crossed with the gate line, a source electrode and a drain electrode which are connected to the data line, a data link which is formed at the non-display area, and a lower data pad electrode which is connected, via the data link, to the data line; and forming a protective film on the entire substrate provided with the data pattern, and then forming a conductive pattern that is comprised of a pixel electrode which is formed at the display area by a contact hole filling process using an over-coat layer, and an upper gate pad electrode and an upper data pad electrode which are formed at the non-display area, wherein the conductive pattern which is formed at the non-display is exposed to the exterior by an ashing process regarding the over-coat layer, wherein no conductive patterns exist at the non-display area outside the upper gate pad electrode and the upper data pad electrode, wherein the step of forming the conductive pattern includes forming the protective film on the entire substrate, and then forming a photo-resist pattern that exposes the protective film by a third mask process, etching the protective film which is exposed by the photo-resist pattern to form a plurality of contact holes, drying-ashing the photo-resist pattern provided with the contact hole to remove the photo-resist pattern which is formed at a pixel area, forming a transparent conductive film on the entire ashed photo-resist pattern, and then covering the photo-resist pattern provided with the transparent conductive film with the over-coat layer, ashing the over-coat layer which covers the display area and the non-display area to expose the transparent conductive film which is formed at another area other than an area to be formed the conductive pattern, etching the transparent conductive film which is exposed at the display area and the non-display area to form the conductive pattern and removing the photo-resist pattern and the over-coat layer which remain on the substrate by a stripping process, wherein the transparent conductive film, which is formed at another area other than an area to be formed a conductive pattern including the pixel electrode, the upper gate pad electrode, and the upper data pad electrode, is exposed to the exterior by carrying out the ashing process regarding the over-coat layer, wherein the transparent conductive film, which is formed at the non-display area is exposed to the exterior by the ashing process regarding the over-coat layer to form the conductive pattern.