Patent ID: 6271575
Filing Date: 2001-08-07
Classification: H01L

Abstract:
A self-aligned bipolar transistor on a silicon substrate comprised of:a patterned thermal oxide layer of different thicknesses on said silicon substrate formed by local oxidation of silicon (LOCOS) using a single patterned pad oxide and silicon nitride stripe having varying widths as an oxidation mask;said patterned thermal oxide layer having decreasing and non-zero thicknesses over a field oxide region, collector region, base region, and emitter region, respectively, of said bipolar transistor;a doped emitter in said silicon substrate self-aligned to said emitter region formed by ion implantation;a doped base formed by ion implantation in said silicon substrate self-aligned to said base region and extending under and self-aligned to said emitter;a doped collector formed by ion implantation in said silicon substrate self-aligned to and in said collector region and extending under and self-aligned to said base and also extending under and self-aligned to said emitter.