Patent ID: 9177900
Filing Date: 2015-11-03
Classification: H01L

Abstract:
1. A semiconductor memory device, comprising: an element-mounting region; a semiconductor memory element mounted on the element-mounting region; a rectangular region sealing the semiconductor memory element with resin; an element-supporting portion supporting the semiconductor memory element, the element-supporting portion having an opening; a plurality of first hanging elements provided at a first long edge side of the rectangular region, one end of each of the first hanging elements being connected to the element-supporting portion, and the other end of each of the first hanging elements being exposed to a first lateral face of the resin containing the first long edge of the rectangular region; an outer lead portion having a plurality of outer leads arranged at first and second short edge sides of the rectangular region; and an inner lead portion having a plurality of inner leads, at least a part of the inner leads being routed in the element-mounting region, and one end of at least one of the inner leads being arranged at a second long edge side of the rectangular region, wherein at least a part of the inner leads has a first portion extended to the one end of the inner leads, a second portion extended to the outer leads arranged at the first short edge side, and a third portion routed in the element-mounting region so as to extend in a direction which intersects the first and second portions, wherein at least another part of the inner leads has a fourth portion extended to the one end of the inner leads, a fifth portion extended to the outer leads arranged at the second short edge side, and a sixth portion routed in the element-mounting region so as to extend in a direction which intersects the fourth and fifth portions, and wherein at least a part of the element-supporting portion is provided in a region between the third portion and the sixth portion.