Patent ID: 9065747
Filing Date: 2015-06-23
Classification: H04L

Abstract:
1. An egress interface, comprising: a cell engine configured to receive a packet having a packet header and a payload, segment the packet into a first cell including the packet header and a second cell including at least a portion of the payload of the packet, the first cell having a first header including routing information and the second cell having a second header, assign sequence numbers to the first cell and the second cell, such that the the first and second cells include first and second sequence numbers, respectively, the first and second sequence numbers indicating an ordering of the packet header and said at least the portion of the payload in the packet, respectively; a first output circuit configured to be operably coupled with a first transmission path; a second output circuit configured to be operably coupled with a second transmission path; a first processor circuit operably coupled with the first output circuit and with the cell engine; a second processor circuit operably coupled with the second output circuit and with the cell engine; and wherein the first processor circuit is configured to transmit the first cell to the first output circuit based on the first header, and the second processor circuit is configured to transmit the second cell to the second output circuit based on the second header, the first output circuit supplying a first optical signal carrying the first cell and the second output circuit supplying a second optical signal carrying the second cell.