Patent ID: 7130210
Filing Date: 2006-10-31
Classification: G11C

Abstract:
1. A method of programming one or more memory bits on a wordline of a multi-level flash memory array, the memory bits having two or more program levels and a blank level, the levels comprising three or more data levels corresponding to three or more threshold voltages, the method comprising: providing one or more unprogrammed multi-level flash memory bits to be programmed; performing a rough programming operation on the memory bits of the array until the threshold voltage of each of the memory bits generally corresponds to a rough threshold voltage that is an offset value less than a target threshold voltage; and performing a fine programming operation on the memory bits of the array until the threshold voltage of each memory bit generally corresponds to the target threshold voltage; and generating a dynamic fast-bit drain voltage for each of the program levels on the wordline; wherein generating the dynamic fast-bit drain voltage comprises: