Patent ID: 6766410
Filing Date: 2004-07-20
Classification: G06T

Abstract:
A system for reordering data fragments to facilitate reads from a DDR SDRAM, comprising:a first data fragment buffer; a second data fragment buffer; and wherein upon presentation of a first data fragment having an address and second data fragment having an address, the system comparing the first data fragment address with the second data fragment address and if the second data fragment address is the next sequentially readable data address after the first data fragment address, the system storing the first data fragment in the first data fragment buffer and storing the second data fragment in the second data fragment buffer, and if the second data fragment address is sequentially readable before the first data fragment address, the system storing the second data fragment in the first data fragment buffer and storing the first data fragment in the second data fragment buffer, otherwise if the first data fragment address and second data fragment address are non-sequentially readable, the system flushing at least the first data fragment.