Patent ID: 7759191
Filing Date: 2010-07-20
Classification: H01L

Abstract:
1. A method for forming a semiconductor device, comprising: depositing a first semiconductor layer over a surface of a semiconductor substrate, wherein the first semiconductor layer has a different lattice constant than the semiconductor substrate; forming at least one trench that extends through the first semiconductor layer into the semiconductor substrate; epitaxially growing a second semiconductor layer over sidewalls of the trench, wherein the second semiconductor layer has a lattice constant that is different from that of the first semiconductor layer, so that an upper portion of the second semiconductor layer formed over sidewalls of the trench in the first semiconductor layer is either tensilely or compressively strained; forming a trench capacitor and a vertical transistor in the trench, wherein the trench capacitor comprises an outer electrode, an inner electrode, and a node dielectric layer located between the outer electrode and the inner electrode, wherein the vertical transistor is located over the trench capacitor, wherein the vertical transistor comprises a source region, a drain region, a channel region, a gate dielectric, and a gate electrode, and wherein the channel region of the vertical transistor is located in the tensilely or compressively strained upper portion of the second semiconductor layer; selectively removing a portion of the first semiconductor layer to expose at least the tensilely or compressively strained upper portion of the second semiconductor layer; and forming an insulator structure around the tensilely or compressively strained upper portion of the second semiconductor layer.