Patent ID: 6204529
Filing Date: 2001-03-20
Classification: H01L

Abstract:
A non-volatile semiconductor memory device for storing up to six-bits of information comprising:a semiconductor substrate of one conductivity type;a bottom diffusion region having a conductivity type opposite to the conductivity type of said semiconductor substrate on top of a portion of said semiconductor substrate;a second semiconductor layer on top of said bottom diffusion region, said second semiconductor layer having the same conductivity type of said semiconductor substrate;a right diffusion region formed in said second semiconductor layer apart from said bottom diffusion channel thus forming a first vertical channel between said right and bottom diffusion regions;a left diffusion region formed in said second semiconductor layer apart from both said right and bottom diffusion regions thus forming a first horizontal channel between said right and left diffusion regions and a second vertical channel between said left and bottom diffusion regions, said left, right and bottom diffusion regions having the same conductivity type;a trapping dielectric layer formed over exposed portions of said semiconductor substrate, bottom diffusion region and second semiconductor layer; anda wordline formed over said trapping dielectric layer,whereby each of said first and second vertical channels and first horizontal channel are capable of having two bits of information programmed, read and erased.