Patent ID: 8008700
Filing Date: 2011-08-30
Classification: G11C,H01L

Abstract:
1. A nonvolatile memory device, comprising at least one memory cell which comprises a first diode portion, a second diode portion and an antifuse dielectric layer separating the first diode portion from the second diode portion, wherein the first diode portion, the antifuse and the second diode portion form a pillar having a substantially cylindrical shape; the first diode portion and the second diode portion are adapted to form a diode when the antifuse dielectric layer is ruptured by a conductive link; the diode comprises a doped polycrystalline silicon, germanium or silicon-germanium material p-i-n pillar diode in which the polycrystalline material comprises at least one of (a) plurality of grain boundaries (b) a degree of order; the antifuse dielectric layer comprises a silicon oxide, silicon nitride, or metal oxide layer; and when in use, the diode acts as a read/write element of the memory cell by switching from a first resistivity state to a second resistivity state different from the first resistivity state in response to an applied bias, wherein: (a) at least some dopant atoms move away from at least some of the plurality of grain boundaries during switching from the first resistivity state to the second resistivity state, or (b) the degree of order increases during switching from the first resistivity state to the second resistivity state.