Patent ID: 7122861
Filing Date: 2006-10-17
Classification: H01L

Abstract:
1. A semiconductor device including an MOS transistor in which a second conductivity type source region is formed on a first conductivity type semiconductor region, an offset drain region is electrically connected to a second conductivity type drain region and has an impurity concentration lower than that of said drain region, said offset drain region is composed of a portion that does not overlap said first conductivity type semiconductor region and a portion that overlaps part of the surface of said first conductivity type semiconductor region, said offset drain region is formed by a second conductivity type region at its portion that does not overlap said first conductivity type semiconductor region, said offset drain region is formed by a first conductivity type region having an impurity concentration lower than that of said first conductivity type semiconductor region at its portion that overlaps part of the surface of said first conductivity type semiconductor region and a gate electrode is formed on the surface extending from a channel region between said source region and said offset drain region to part of said offset drain region through a gate insulating film; wherein the channel region on the surface of the first-conductivity type semiconductor region is formed with a uniform concentration.