Patent ID: 9197238
Filing Date: 2015-11-24
Classification: H03L,H03M

Abstract:
1. A converter, comprising: a comparator for sampling an analog quantity to store an analog sample during a sampling period and for performing a series of bit-wise conversions on the analog sample during a conversion period, wherein each bit-wise conversion occurs during a respective bit-wise conversion cycle in which successive bits of a sample are successively determined during a respective bit conversion cycle and in which a predetermined number of bit-wise conversions are to be performed; and a clock generator for generating a clock signal for clocking the converter during the conversion period, wherein each bit conversion cycle includes a reset period having a first length and an amplification period having a second length, wherein one of the first and second lengths is dynamically selected; wherein the value of the first length is determined in a reset value calibration routine; wherein the reset value calibration routine includes a sampling cycle, a first bit conversion cycle, and a second bit conversion cycle.