Patent ID: 6260184
Filing Date: 2001-07-10
Classification: G06F

Abstract:
A method of designing a physical layout for wiring of an integrated circuit device, said integrated circuit device having a predetermined set of component devices assigned to respective physical locations on the integrated circuit device and a predetermined set of required wiring interconnections among said predetermined set of component devices, said method comprising:(a) constructing a default layout of power lines in said integrated circuit device, said default layout being constructed without regard to power and wiring demand in local physical regions of said integrated circuit device;(b) determining a respective power demand value for each of a plurality of physical regions of the integrated circuit device based on said predetermined set of component devices, each of said plurality of physical regions being substantially less than the entire physical area of said integrated circuit device;(c) determining a respective wiring demand value for each said region of the integrated circuit device based on said predetermined set of required wiring interconnections; and(d) selectively reducing or maintaining power lines of the default layout of power lines in each of a plurality of regions of the integrated circuit device based on the respective wiring demand value and the respective power demand value in the region.