Patent ID: 6117743
Filing Date: 2000-09-12
Classification: H01L,Y10S

Abstract:
A method of manufacturing MOS device, comprising the steps of:providing a semiconductor substrate;forming a polysilicon gate over the semiconductor substrate, and then depositing an anti-reflection coating on top of the polysilicon gate;forming spacers on the sidewalls of the polysilicon gate and the anti-reflection coating;forming source/drain regions in the substrate on each side of the spacer-coated gate structure, and then forming a metal suicide layer over each source/drain region;forming an inter-layer dielectric layer over the spacers and the semiconductor substrate but exposing the anti-reflection coating;removing the anti-reflection coating within the inter-layer dielectric layer so that the upper surface of the polysilicon gate is exposed;forming a barrier layer over the inter-layer dielectric layer and the exposed polysilicon gate surface;forming a conductive layer over the barrier layer; andremoving the conductive layer and the barrier layer above the inter-layer dielectric layer.