Patent ID: 7227774
Filing Date: 2007-06-05
Classification: G11C

Abstract:
1. An MRAM integrated circuit comprising: a row line; a column line; an MRAM cell proximate the row line and column line and switchable between first and second binary states in response to current imparted to at least one of the row line and column line, wherein, in operation, current imparted to the row line in one direction causes a magnetic field operative on the MRAM cell biasing the MRAM cell toward the second binary state, and wherein, in operation, current imparted to the column line in one direction causes a magnetic field operative on the MRAM cell biasing the MRAM cell toward the second binary state; first circuitry configured to impart a selectable amount of current to the row line; second circuitry configured to impart a selectable amount of current to the column line; a magnetic sensor proximate the MRAM cell and configured to sense a level of environmental magnetic field applied to the MRAM cell; and third circuitry coupled to the magnetic sensor and at least one of the first circuitry and second circuitry and configured to selectively adjust the amount of current imparted to at least one of the row line and column line in response to the level sensed by the magnetic sensor.