Patent ID: 8199359
Filing Date: 2012-06-12
Classification: H04N

Abstract:
1. A system for reducing visibility of registration errors in an image to be printed using a digital color printer, the image having cyan (C), magenta (M), yellow (Y), and black (K) color planes, each color plane having a plurality of respective C, M, Y and K pixels, said pixels used to form objects on said C, M, Y and K color planes, said system comprising: a) means for detecting colored edges of colored objects on each of the C, M and K color planes; b) means for detecting coincident and opposing edge transitions on CM, CK and KM color plane pairs: c) means for performing processing on the detected coincident and opposing edge transitions to determine the color plane and direction to extend the objects, if necessary; d) means for spreading or choking the objects across the determined color plane using a simple trap generation rule and a single trap generation rule wherein said means for spreading or choking using said single trap generation rule comprises, with respect to first and second color planes, if there are extensions on both sides of the color edge, determining which two colorants will generate said extensions and, determining which of the two extensions is darker and generating the darker extension, wherein said means for detecting said edges of objects comprises: means for measuring spatial rates of change of color value and comparing the color values across the edges against at least two thresholds on each color plane independent of other color planes using a Laplacian kernel for each pixel in the color plane, wherein said means for performing processing to determine the color plane and direction to extend the objects comprises: means for comparing convolved pixel values for each edge of each color plane, wherein said convolved pixel values are obtained by performing a convolution calculation for each pixel in each of said color planes; and wherein said means for spreading or choking comprises nine convolution matrices, wherein the nine convolution matrices include up to nine convolution modules in a hardware implementation to allow parallel access to image data, wherein the hardware implementation uses a 1-4 Laplacian kernel, including one shifter, two adders, one subtractor and, one comparator for each convolution module, wherein the comparator compares a convolved pixel value against a convolution threshold, to determine whether there is an edge or not on for each color plane, and the result is compared with the results from other planes, and the edge is a candidate for trapping if the directions of the determined edges are opposite to one another, wherein the nine convolution matrices include up to nine convolution modules in a hardware implementation to allow parallel access to image data, wherein the hardware implementation uses a 1-4 Laplacian kernel, including one shifter, two adders, one subtractor and, one comparator for each convolution module, wherein the comparator compares a convolved pixel value against a convolution threshold, to determine whether there is an edge or not on for each color plane, and the result is compared with the results from other planes, and the edge is a candidate for trapping if the directions of the determined edges are opposite to one another.