Patent ID: 8148774
Filing Date: 2012-04-03
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first conductivity type semiconductor substrate; two first wells of a second conductivity type, which is opposite to the first conductivity type, arranged on a surface layer of the semiconductor substrate with a predetermined interval therebetween; a first conductivity type second well arranged between the two first wells on the surface layer of the semiconductor substrate and having an impurity concentration higher than that of the semiconductor substrate; a first conductivity type third well arranged in the semiconductor substrate, at least having an impurity concentration peak position below that of the second well and having an impurity concentration higher than that of the semiconductor substrate and lower than that of the second well; and a first conductivity type fourth well arranged in the semiconductor substrate, at least having an impurity concentration peak position below that of the third well and having an impurity concentration higher than that of the semiconductor substrate and lower than that of the second well.