Patent ID: 8922719
Filing Date: 2014-12-30
Classification: H03D

Abstract:
1. Circuit for processing an input signal based on at least one reference signal, comprising: a phase locked loop demodulator configured to demodulate the input signal to obtain, from the input signal, a demodulated signal, the phase locked loop demodulator comprising a phase detector for determining a phase error signal from the demodulated signal, and the phase locked loop demodulator further configured to follow, using the phase error signal, a frequency and/or a phase of said input signal; and a reference signal detector configured to detect said at least one reference signal and to output a speed control signal to said phase locked loop demodulator when the at least one reference signal is detected, wherein, said phase locked loop demodulator controls, based on the speed control signal, a speed of the phase locked loop demodulator, where the speed defines how quickly the phase locked loop demodulator matches the frequency and/or phase of the input signal, and said reference signal detector is further configured to set said speed to zero a first predetermined period of time before an occurrence of said at least one reference signal and to maintain zero speed until a second predetermined period of time after said occurrence of said at least one reference signal.