Patent ID: 7033932
Filing Date: 2006-04-25
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising: a. depositing a dielectric film spacer substance on an entire surface of the semiconductor substrate, said semiconductor substrate further comprising a salicide region and a non-salicide region, a gate oxide and a gate electrode on said semiconductor substrate in each of said salicide and non-salicide regions, and low concentration impurity regions in said semiconductor substrate adjacent said gate electrode; b. forming an etch protection layer in said non-salicide region; c. in the salicide region, etching the dielectric spacer substance to form a spacer on a sidewall of the gate electrode; d. removing the etch protection layer to form a salicide suppression layer comprising the dielectric film spacer substance; e. forming a metal salicide in the salicide region using a thermal annealing process; and thereafter f. forming one or more implants in said non-salicide region.