Patent ID: 6960829
Filing Date: 2005-11-01
Classification: H01L

Abstract:
1. A method for producing a semiconductor wafer having an active front surface provided with semiconductor structures and having a passive back surface without semiconductor structures, and having external contacts on the active front surface for electrically contacting semiconductor chips separated from the semiconductor wafer with contact surfaces of a circuit board or another circuit carrier, the outer contacts being formed on a metallic outer contact layer connected to semiconductor structures via underlying rewiring layers and interconnect layers, and the semiconductor structures having fuses formed as interruptible short circuit lines, the method which comprises: providing a semiconductor wafer having semiconductor structures arranged in rows and columns and kerf regions therebetween; forming an interconnect layer on a plane above the semiconductor structures, the interconnect layer having a multiplicity of interconnects connected to electrodes of the semiconductor structures; embedding the interconnect layer in a first insulating layer, leaving clear contact surfaces; applying a rewiring layer in a plane above the interconnect layer, on a structured, second insulating layer, comprising a multiplicity of rewiring tracks connected to the interconnect layer; applying a third insulating layer having apertures; filling the apertures with metal; applying a three-layer outer contact layer composed of three individual layers; patterning the three-layer outer contact layer to form outer contact surfaces and short-circuit lines; applying a passivation layer over the third insulating layer and the outer contact layer; partly opening the passivation layer to the underlying outer contact layer to uncover the outer contact surfaces and the short-circuit lines; applying outer contacts to the outer contact surfaces; functionally testing the semiconductor structures and interrupting short-circuit lines having been detected; and separating the semiconductor wafer into semiconductor chips.