Patent ID: 7345944
Filing Date: 2008-03-18
Classification: G11C,H03K

Abstract:
1. A programmable power-failure-detection circuit, comprising: at least one configurable memory cell disposed on an integrated circuit; a monitor circuit disposed on the integrated circuit, the monitor circuit adapted to monitor a power supply of the integrated circuit and generate a power failure signal in response to the power supply failing to comply with a prescribed operating specification; a control input; and a switch circuit disposed on the integrated circuit and coupled to the at least one configurable memory cell and the monitor circuit, the switch circuit adapted to disable the monitor circuit in response to the at least one configurable memory cell, wherein the switch circuit is further adapted to disable the monitor circuit in response to the control input for a value of the at least one configurable memory cell, and wherein the at least one configurable memory cell is adapted to be programmed from a non-volatile memory in response to the power failure signal.