Patent ID: 6989322
Filing Date: 2006-01-24
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, comprising: providing a semiconductor structure comprising a silicon substrate and a gate structure formed on the silicon substrate, said gate structure further comprising a gate contact and a gate insulator; selectively forming etched-away regions in the substrate to expose sides of a channel region under the gate structure; disposing a thin, highly-doped layer of a silicidation stop material within the etched-away regions, the silicidation stop material partially filling the etched-away regions and forming silicidation-stop extensions; disposing a silicon fill layer within the etched-away regions over the silicidation stop material; and performing silicidation to form silicide in the silicon fill layer, thereby forming source/drain silicide regions; wherein the silicon fill layer fills the etched away regions over the thin silicidation-stop extensions, thereby interposing the thin silicidation-stop extensions between the silicon fill layer and the channel region and between the silicon fill layer and the substrate; and wherein the silicidation-stop extensions are thin as compared with the silicon fill.