Patent ID: 7932578
Filing Date: 2011-04-26
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate; a plurality of wiring layers provided on the semiconductor substrate; a high frequency wiring provided at a first layer in the plurality of wiring layers; and a plurality of dummy metals provided in a second layer provided between the semiconductor substrate and the first layer having the high frequency wiring, wherein the plurality of wiring layers at a top view includes a high frequency wiring vicinity region and an external region surrounding the high frequency wiring vicinity region, the high frequency wiring vicinity region including a first region enclosed by an outer edge of the high frequency wiring and a second region surrounding the first region, and wherein the plurality of dummy metals are disposed dispersedly in the high frequency wiring vicinity region and in the external region respectively and an average interval between the dummy metals in the high frequency wiring vicinity region is wider than that in the external region.