Patent ID: 7321513
Filing Date: 2008-01-22
Classification: G11C

Abstract:
1. A semiconductor device comprising: at least two reference cells; a first cascode circuit coupled to at least a first one of the at least two reference cells and comprising at least two current mirror circuits, the first cascade circuit outputting voltages dependent on a current flowing through the at least a first one of the at least two reference cells to a first set of at least two output paths; a second cascode circuit coupled to at least a second one of the at least two reference cells and comprising at least two current mirror circuits, the second cascade circuit outputting voltages dependent on a current flowing through the at least a second one of the at least two reference cells to a second set of at least two output paths; and a switch that selectively connects output paths of the first set of at least two output paths and the second set of at least two output paths to a given output terminal, thereby providing a reference voltage at the given output terminal, the reference voltage generated in response to the current flowing through the at least a first one of the at least two reference cells and the current flowing through the at least a second one of the at least two reference cells.