Patent ID: 9219035
Filing Date: 2015-12-22
Classification: H01L

Abstract:
1. An integrated circuit device, comprising: a semiconductor substrate having a plurality of active semiconductor devices therein extending adjacent a first surface thereof and a second surface extending opposite the first surface; an interlayer dielectric layer covering the plurality of active semiconductor devices, on the first surface; a through-via electrode having a main portion being entirely equal in its width and having a bulbous extension being different from the main portion width extending from an upper surface of the interlayer dielectric layer to the second surface of said semiconductor substrate, said through-via electrode having a length greater than or equal to a distance between the second surface of said semiconductor substrate and the upper surface of the interlayer dielectric layer; an intermetal dielectric layer on the upper surface of said interlayer dielectric layer; a multi-level metal interconnect extending through said intermetal dielectric layer; and an electrically conductive pad electrically coupled by said multi-level metal interconnect to said through-via electrode.