Patent ID: 7671462
Filing Date: 2010-03-02
Classification: H01L

Abstract:
1. A power semiconductor device comprising: semiconductor chips for an upper arm; semiconductor chips for a lower arm; output lines; a power supply line; and a ground line; wherein a chip surface of a first semiconductor chip of said semiconductor chips for the upper arm and a chip surface of a first semiconductor chip of said semiconductor chips for the lower arm are connected to a line surface of the power supply line which is arranged substantially in parallel with surfaces of the two first semiconductor chips; a chip surface of a second semiconductor chip of said semiconductor chips for the upper arm is connected to a line surface of said power supply line which is arranged substantially in parallel with said semiconductor chips for the upper arm; a chip surface of a second semiconductor chip of said semiconductor chips for the lower arm is connected to a line surface of said ground line which is arranged substantially in parallel with said semiconductor chips for the lower arm; and the line surface of said power line and the line surface of said ground line are arranged to be opposed and close to each other so as to reduce parasitic inductance of said power supply line and said ground line.