Patent ID: 8841731
Filing Date: 2014-09-23
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate that has a first-type active region comprising an NMOS active region adjacent a second-type active region comprising a PMOS active region; a dielectric layer having a trench disposed directly over the first-type active region and the second-type active region; a high-k dielectric layer disposed within the trench over the first-type active region and the second-type active region; a first continuous metal layer having a first work function and disposed over the high-k dielectric layer in the trench, the first metal layer being partially removed from over the second-type active region so that a thickness of the first metal layer overlying the second-type active region is less than a thickness of the first metal layer overlying the first-type active region; and a second metal layer over the first metal layer in the trench overlying the first-type active region and over the first metal layer in the second-type active region, the second metal layer having a second work function.