Patent ID: 6424014
Filing Date: 2002-07-23
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate of one conductivity type, p-type or n-type; a first impurity region of the other conductivity type, p-type or n-type, having applied between itself and said semiconductor substrate a backward voltage through an electric conductor extending on an electrically insulating film provided on the surface of said semiconductor substrate; a second impurity region of said one conductivity type and with a higher density than the impurity density of said semiconductor substrate, said second impurity region being formed in the surface of said semiconductor substrate spaced from said first impurity region, to control a depletion layer tending to expand from said first impurity region below and in line with said conductor; a suppressor electrode layer comprising a plurality of thin electrode portions arranged in said electrically insulating film and mutually spaced apart from each other in the direction of said conductor and having substantially the same potential as said semiconductor substrate, to control said depletion layer tending to expand toward said second impurity region; and expansion promotion means for promoting the expansion of said depletion layer toward said second impurity region provided between said thin electrode portions of said suppressor electrode layer, said expansion promotion means being thin portions of said electrically insulating film, defined horizontally between said thin electrode portions and vertically between said surface of said semiconductor substrate and protrusions of said conductor that protrude toward said substrate extending over said electrically insulating film on said semiconductor substrate, said thin portions of said insulating film being defined between said thin electrode portions of said suppressor electrode layer.