Patent ID: 7515539
Filing Date: 2009-04-07
Classification: H04L

Abstract:
1. A router comprising: at least one buffer memory for intermediate storage of pointers for information packets in at least two different buffer memory areas, a readout unit for reading out the at least two different buffer memory areas one after the other in predetermined time windows, and at least one random early discard processing unit for removing pointers from the buffer memory areas, wherein a feedback is provided from the readout unit to the at least one random early discard processing unit, in order to transmit at least one parameter to the at least one random early discard processing unit, and the readout unit is equipped with a weighted round robin mechanism and the at least one random early discard processing unit transmits information about a number of buffer memory locations processed in the predetermined time windows, and the at least one random early discard processing unit contains means for deciding, with the aid of the information about the number of buffer memory locations processed in the predetermined time windows, whether pointers are removed from the at least two different buffer memory areas, and if it is decided that pointers are removed from the at least two different buffer memory areas, determining how many pointers are removed, wherein a number of pointers to be removed depends on the number of processed buffer memory locations and on a slope of a decision curve of the random early discard processing unit.