Patent ID: 6490293
Filing Date: 2002-12-03
Classification: H04L

Abstract:
A deterministic bus control for controlling the timing of a transmission of data onto a data bus, the data being provided by an autonomous component of a control system, said deterministic bus control comprising:a conventional non-deterministic bus controller having a data input for receiving data to be transmitted and for receiving a transmit request, said conventional non-deterministic bus controller being operative for transmitting said data onto said data bus in response to receipt of said transmit request; a buffer for receiving and storing transmit requests from said autonomous component and for transmitting said stored transmit request to said conventional non-deterministic bus controller in response to receipt of a command; and a deterministic transmission scheduler for connection to the data bus for detection of the status thereof and to the buffer, and for generating said command for transmission to said buffer in accordance with a deterministic protocol based on the status detected, thereby causing said transmit request to be passed to the data input of the conventional non-deterministic bus controller and said data to be transmitted onto said data bus in accordance with said deterministic protocol.