Patent ID: 6392492
Filing Date: 2002-05-21
Classification: H03F

Abstract:
A high linearity cascode low noise amplifier comprising:a cascode amplifier comprising a first, lower transistor connected in the common emitter mode and a second, upper transistor connected in the common base mode with their emitter-collector circuits connected in series, the collector of said upper transistor coupled to a bias source terminal and said lower transistor having its emitter coupled to ground, and input terminal coupled to the base of said lower transistor and an output terminal coupled to the collector of said upper transistor; a biasing resistor coupled between said bias source terminal and the base of said second, upper transistor, the value of said resistor determining voltage division between said lower first transistor and said upper, second transistor, whereby gain versus linearity for the low noise amplifier varies in correspondence with the value of said biasing resistor; and a loading inductor coupled between said bias source terminal and the collector of said upper transistor, whereby gain of the low noise amplifier varies in correspondence with the value of said loading inductor; current mirror circuit coupled between the emitter of second, upper transistor and a current source resistor.