Patent ID: 8618852
Filing Date: 2013-12-31
Classification: H03L

Abstract:
1. A semiconductor integrated circuit comprising a clock generator receiving input of a reference clock so as to generate a modulated clock based on the input reference clock, and a diagnostic circuit; wherein said clock generator includes: a phase comparator comparing the phase of said reference clock with that of a feedback clock; an oscillator receiving input of said modulated clock of which the oscillating frequency is controlled based on output from said phase comparator, and a modulation circuit receiving input of said modulated clock so as to output said feedback clock; wherein said modulation circuit includes a frequency divider, and a division ratio modulation circuit supplying a division ratio to said frequency divider; wherein said frequency divider outputs said feedback clock by dividing the output of said oscillator by said division ratio; wherein said division ratio modulation circuit is fed with a multiplication count and has at least one of two periods, one of the two periods being one in which said division ratio modulation circuit outputs a value larger than said modulation count as said division ratio, the other period being one in which said division ratio modulation circuit outputs a value smaller than said modulation circuit as said division ratio, said division ratio modulation circuit further outputting a magnitude relationship between said division ratio and said multiplication count in the form of a spread direction identification signal, and wherein said diagnostic circuit includes a first counter counting said reference clock, and a second counter counting said modulated clock based on said spread direction identification signal.