Patent ID: 6900514
Filing Date: 2005-05-31
Classification: H01L

Abstract:
1. A semiconductor device comprising an isolation region formed in a semiconductor layer and a capacitance device formed above the isolation region, and a first contact section connected to the capacitance device, wherein the capacitance device includes: a first capacitor conductive layer disposed above the isolation region; and a second capacitor conductive layer formed along one side surface of the first capacitor conductive layer, wherein the second capacitor conductive layer having a first sidewall adjacent the first capacitor conductive layer and a second sidewall opposite to the first sidewall, wherein the second sidewall is a curved surface; wherein the second capacitor conductive layer is disposed facing the first capacitor conductive layer, with a first capacitor insulating layer interposed, wherein the first contact section includes: a first contact conductive layer connected to the second capacitor conductive layer, the first contact conductive layer not provided above the curved surface of the second capacitor conductive layer.