Patent ID: 9083296
Filing Date: 2015-07-14
Classification: H03F

Abstract:
1. A device, comprising: a first cascode circuit including a first transistor and a second transistor; a second cascode circuit coupled to a differential output and including a first pair of transistors including a first transistor and a second transistor and a second pair of transistors including a third transistor and a fourth transistor, the second transistor of the first pair of transistors having a drain connected to a source of the first transistor of the first cascode circuit, the fourth transistor of the second pair of transistors having a drain connected to a source of the second transistor of the first cascode circuit; and a differential input circuit including a first transistor coupled to each of the first transistor of the first cascode circuit and the first and second transistors of the second cascode circuit, the differential input circuit further including a second transistor coupled to each of the second transistor of the first cascode circuit and the third and fourth transistors of the second cascode circuit.