Patent ID: 6211723
Filing Date: 2001-04-03
Classification: G01R,H02M

Abstract:
A programmable load circuit operable to generate a plurality of test signals, the programmable load circuit comprising:a diode bridge coupled between an input and an output, the diode bridge comparing the voltage on the input to a voltage on the output;a plurality of current sources, wherein a first set of the plurality of current sources are coupled to intermediate nodes of the diode bridge;a switching circuit coupled between the intermediate nodes of the diode bridge and a second set of the plurality of current sources; anda load regulator input coupled to the output and first and second load regulator nodes coupled to the intermediate nodes of the diode bridge, wherein the load regulator is configured to reduce leakage current on the output;a buffer coupled to the input;a semi-diode bridge coupled between the load regulator input, and the first and second load regulator nodes; andanother plurality of current sources coupled to intermediate nodes of the semi-diode bridge.