Patent ID: 6124614
Filing Date: 2000-09-26
Classification: H01L

Abstract:
A field effect transistor (FET) comprising:a field oxide layer formed in a semiconductor substrate, exposing a device region of the semiconductor substrate;a first insulation layer formed on the semiconductor substrate, exposing an active region of the semiconductor substrate;a conducting layer for source/drain regions formed on the first insulation layer, exposing the active region;a first spacer insulation layer formed on sidewalls of the conducting layers;a semiconductor layer formed on the exposed active region of the semiconductor substrate;a channel layer formed on the resulting structure, wherein a portion of the channel layer formed on the conducting layer for the source/drain regions and the first spacer insulation layer is a polycrystalline layer, and a remaining portion of the channel layer formed on the semiconductor layer is a single crystalline layer;a gate insulation layer formed on the single crystalline channel layer;a gate electrode formed on the gate insulation layer; anda second spacer insulation layer formed on both sidewalls of the gate electrode.