Patent ID: 9136207
Filing Date: 2015-09-15
Classification: H01L

Abstract:
1. A chip packaging structure, comprising: a) a first assembly; b) at least one second assembly located above said first assembly, wherein said at least one second assembly is electrically connected to said first assembly by a plurality of first protruding structures located under periphery and internal regions of said at least one second assembly, wherein said at least one second assembly comprises at least one power transistor; c) at least one third assembly located above said at least one second assembly, wherein said at least one third assembly is electrically connected to said first assembly by a plurality of second protruding structures located outside of said at least one second assembly, and wherein said at least one third assembly comprises an inductor having bent portions; d) wherein a first portion of said inductor and a corresponding of said plurality of second protruding structures form a bent structure substantially perpendicular to a second portion of said inductor, wherein said plurality of second protruding structures are connected between said first portion of said inductor and a top surface of said first assembly, and wherein said inductor is coupled to said at least one transistor in a configuration of a switching voltage regulator; and e) wherein an enclosure of said at least one second assembly and any remaining of said at least one third assembly into a single packaging structure comprises said inductor with said bent portions.