Patent ID: 6268245
Filing Date: 2001-07-31
Classification: H01L

Abstract:
A method for forming a capacitor, said method comprising the steps of:forming a first dielectric layer on a semiconductor substrate;removing a portion of said first dielectric layer to define a contact hole within said first dielectric layer, said contact hole being extended down to a source region in said substrate;forming a conductive plug being communicated to said source region within said contact hole;forming a second dielectric layer on said first dielectric layer and said conductive plug;forming a third dielectric layer on said second dielectric layer;removing portions of said third dielectric layer and said second dielectric layer to define a storage node opening within said third dielectric layer and said second dielectric layer, said storage node opening being located over said conductive plug;forming a first conductive layer covering conformably the inside surface of said storage node opening and on said third dielectric layer;forming a fourth dielectric layer on said first conductive layer;planarizing said substrate to the surface of said third dielectric layer;removing said fourth dielectric layer and said third dielectric layer;thinning and simultaneously roughening said first conductive layer, thereby forming a storage node composed of said first conductive layer;forming a fifth dielectric layer on said storage node; andforming a second conductive layer on said the dielectric layer.