Patent ID: 8420485
Filing Date: 2013-04-16
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: defining a first active area and a second active area on a substrate, the first and second active areas being in a line form extended in parallel to each other in a first direction; forming a first main trench and a second main trench on the substrate, the first and second main trenches being extended in parallel to each other in a second direction that is perpendicular or substantially perpendicular to the first direction; forming a first sub-trench and a second sub-trench in bottoms of the first and second main trenches, respectively, the first and second sub-trenches being extended in parallel to each other in the second direction; forming a buried insulation layer filling the first and second sub-trenches; partially exposing the substrate at an area where the first active area crosses with the first sub-trench and an area where the second active area crosses with the second sub-trench while the buried insulation layer remains below the area where the first active area crosses with the first sub-trench and the area where the second active area crosses with the second sub-trench; and forming a first buried bit line and a second buried bit line on the buried insulation layer, the first and second buried bit lines being extended in parallel to each other in the second direction.