Patent ID: 7989848
Filing Date: 2011-08-02
Classification: G06F,H01L

Abstract:
1. A semiconductor device, comprising: a substrate having a portion of the substrate formed to include a plurality of diffusion regions, wherein the plurality of diffusion regions respectively correspond to active areas of the portion of the substrate, wherein the plurality of diffusion regions are separated from each other by one or more non-active regions of the portion of the substrate; a gate electrode level region formed over the portion of the substrate, the gate electrode level region including at least four linear-shaped conductive features defined to extend lengthwise in a first direction so as to extend parallel to each other, wherein the at least four linear-shaped conductive features have a substantially equal length as measured in the first direction, and wherein the at least four linear-shaped conductive features are positioned in a side-by-side manner according to a substantially equal centerline-to-centerline spacing as measured in a second direction perpendicular to the first direction, wherein the at least four linear-shaped conductive features include a first linear-shaped conductive feature that forms a gate electrode of a first transistor of a first transistor type in conjunction with first and second active areas of the portion of the substrate, wherein either the first or second active area is electrically connected to either a power supply or a reference ground potential, and wherein the at least four linear-shaped conductive features include a second linear-shaped conductive feature that forms a gate electrode of a second transistor of the first transistor type in conjunction with third and fourth active areas of the portion of the substrate, wherein either the third or fourth active area is electrically connected to either the power supply or the reference ground potential.