Patent ID: 8988404
Filing Date: 2015-03-24
Classification: G09G

Abstract:
1. A display device comprising: a display panel including a plurality of data lines; a source driver which is positioned at one side of the display panel and is connected to the data lines; and a timing controller configured to sequentially store input digital video data in a plurality of line memories, start to generate an output data enable signal in conformity with a first writing start timing of a last line memory of the plurality of line memories, adjust a pulse width of the output data enable signal of each horizontal pixel line based on a previously determined charge time graph, read out the digital video data from the line memories in synchronization with rising edges of the output data enable signal, generate a source output enable signal having the same pulse width each time each line memory finishes reading out the data, and increase a low period of the source output enable signal, in which a data output is allowed, as the horizontal pixel line is farther from the source driver.