Patent ID: 6184070
Filing Date: 2001-02-06
Classification: H01L

Abstract:
A method of manufacturing a thin film transistor, comprising the steps of:forming a conductive layer on a substrate;patterning said conductive layer to thereby form a gate electrode having first and second edge portions and a middle portion therebetween;forming a gate insulating layer on a surface of said gate electrode and said substrate;forming an insulating layer on said gate insulating layer;patterning said insulating layer to leave only a portion thereof disposed on said first edge portion of said gate electrode;forming a semiconductor layer as an active region on a remaining portion of said insulating layer and an entire surface of said gate insulating layer; andimplanting impurity ions into selected portions of said semiconductor layer exposed by a mask overlying said middle portion and said first edge portion of said gate electrode, to thereby form a source region and a drain region at opposite sides of said gate electrode.