Patent ID: 6133143
Filing Date: 2000-10-17
Classification: H01L

Abstract:
A method of manufacturing a metal interconnect, comprising the steps of:providing a substrate having a metal line formed thereon, wherein an etching stop layer is formed on the metal line;forming a dielectric layer over the substrate;forming a patterned photoresist layer on the dielectric layer, wherein the patterned photoresist layer has an opening exposing a portion of the dielectric layer;removing the portion of the dielectric layer exposed by the opening to form a via hole;removing the patterned photoresist layer by an O.sub.2 --H.sub.2 O--CF.sub.4 plasma pressurized at about 800-1000 torr;performing a cleaning process with a post-stripper rinse solution and de-ionized water;forming a barrier layer over the substrate by chemical vapor deposition;performing a metal nucleation by chemical vapor deposition to form a plurality of metal nuclei on the barrier layer; andforming a metal layer to fill the via hole by chemical vapor deposition.