Patent ID: 6518128
Filing Date: 2003-02-11
Classification: H01L

Abstract:
A method of forming a trench MOSFET device comprising:providing a substrate of a first conductivity type; forming an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower majority carrier concentration than said substrate; forming a plurality of trenches within said epitaxial layer, said trenches being lined by a first insulating layer and containing a conductive region adjacent to the first insulating layer; forming within an upper portion of said epitaxial layer one or more trench body regions and one or more termination body regions, said termination body regions extending into said epitaxial layer to a greater depth than said trench body regions; each trench body region and each termination body region comprising (a) a first region of a second conductivity type, said second conductivity type being opposite said first conductivity type, and (b) a second region of said second conductivity type adjacent said first region, said second region having a greater majority carrier concentration than said first region, and said second region being disposed above said first region and adjacent and extending to an outer wall of one of said plurality of trenches; and forming a plurality of source regions of said first conductivity type adjacent said trenches within upper portions said trench body regions.