Patent ID: 8621315
Filing Date: 2013-12-31
Classification: H03M,H04L

Abstract:
1. An apparatus comprising: a first encoder configured to encode at least one information bit to generate a first plurality of coded bits; a second encoder configured to encode the first plurality of coded bits to generate a second plurality of coded bits; a sub-carrier interleaver, connected to or coupled to the encoder, configured to assign bits of the second plurality of coded bits to a plurality of orthogonal signal elements within an orthogonal signaling scheme to generate a plurality of bit labels such that each of the plurality of bit labels corresponds to a respective one of the plurality of orthogonal signal elements and adjacent bits of the plurality of coded bits are maximally separated among the plurality of orthogonal signal elements within an orthogonal signaling scheme; a symbol mapper, connected to or coupled to the sub-carrier interleaver, configured to map the plurality of bit labels to a plurality of modulations to generate a plurality of modulation symbols, wherein a first of the plurality of modulations includes a first constellation with a first mapping of constellation points therein, and a second of the plurality of modulations includes a second constellation with a second mapping of constellation points therein; and a modulator to process the plurality of modulation symbols to generate a continuous time signal and to launch the continuous time signal into a communication channel to which the apparatus is connected or coupled.