Patent ID: 8553441
Filing Date: 2013-10-08
Classification: G11C

Abstract:
1. A ternary content addressable memory (CAM) cell for storing a data value having one of three possible states represented by a data bit and a mask bit, the CAM cell comprising: a data cell to store the data bit; a mask cell to store the mask bit; and a compare circuit coupled to the data cell, the mask cell, and a match line, the compare circuit configured to discharge the match line through one of two paths between the match line and ground potential if there is a mismatch condition between a comparand bit and the data value, wherein each of the two paths consists essentially of only two transistors connected in series between the match line and ground potential, and wherein a first of the two transistors has a gate to receive a bit corresponding to the mask bit, and a second of the two transistors has a gate to be selectively driven by a bit corresponding to the data bit.