Patent ID: 7390758
Filing Date: 2008-06-24
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor integrated circuit device, comprising the steps of: (a) connecting an internal space of a sealed type wafer container, which accommodates a plurality of wafers grounded through the wafer container, to a local clean chamber of a first wafer treatment apparatus; (b) transporting the wafers in the wafer container under the connected state by means of a transport mechanism disposed in the local clean chamber through the local clean chamber, thereby transporting the wafers into a wafer treatment section of the first wafer treatment apparatus; (c) performing a first treatment to the wafers in the wafer treatment section; (d) after step (c), transporting treated wafers by the transport mechanism from the wafer treatment section, thereby accommodating the treated wafers in the wafer container through the local clean chamber; (e) eliminating static charge of the treated wafers in step (d), wherein the eliminating static charge eliminates static charge of treated wafers in the wafer container connected with the local clean chamber, and also eliminates static charge of wafers in a load lock and unload lock mechanism disposed between the wafer treatment section and the local clean chamber; and (f) undocking the wafer container from the local clean chamber after the step (d), and returning the wafer container to a sealed state.