Patent ID: 8269274
Filing Date: 2012-09-18
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate of a first conductivity type; a first drain offset region of a second conductivity type formed in the semiconductor substrate; a second drain offset region of the second conductivity type formed on the first drain offset region in the semiconductor substrate; a third drain offset region of the second conductivity type formed on the second drain offset region in the semiconductor substrate; a body region of the first conductivity type formed partly in the second drain offset region and partly in the third drain offset region; a gate electrode formed over part of the body region and part of the third drain offset region with a gate insulating film interposed therebetween; a source region of the second conductivity type formed in a surface portion of the body region, the surface portion being located laterally outwardly of and beneath the gate electrode; and a drain region of the second conductivity type, having a higher impurity concentration than the third drain offset region, formed in a surface portion of the third drain offset region at a distance from the gate insulating film, the surface portion being located on an opposite side of the gate electrode from the source region, wherein an impurity concentration in the second drain offset region is lower than impurity concentrations in the first and third drain offset regions; and a curvature portion and bottom of the body region are both located in the second drain offset region.