Patent ID: 8530333
Filing Date: 2013-09-10
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising the steps of: irradiating a bond substrate with an ion to form an embrittlement region in the bond substrate; forming a first insulating layer over the bond substrate; forming a conductive layer over the first insulating layer; forming a second insulating layer over the conductive layer; forming a third insulating layer over a base substrate; attaching the second insulating layer to the third insulating layer; heating the bond substrate and separating the bond substrate in the embrittlement region to form a stacked structure of the third insulating layer, the second insulating layer, the conductive layer, the first insulating layer, and a semiconductor layer over the base substrate; patterning the semiconductor layer to form an island-shaped semiconductor layer; forming a gate insulating layer over the island-shaped semiconductor layer; forming a gate electrode over the gate insulating layer; forming a first impurity region, a second impurity region, and a third impurity region; and forming a first electrode electrically connected to the first impurity region and a second electrode electrically connected to the second impurity region, wherein the third impurity region is provided between a channel formation region and the second impurity region, wherein the conductive layer is configured to reduce an electric field at a periphery of a bonding region when a voltage is applied between the first impurity region and the second impurity region, and wherein the bonding region is a region where the channel formation region and the second impurity region are bonded to each other.