Patent ID: 7517743
Filing Date: 2009-04-14
Classification: H01L

Abstract:
1. A method of forming at least one gate structure of a transistor comprising the acts of: providing a SOI substrate comprising a first silicon layer formed over an insulating layer, the insulating layer being formed over a second silicon layer; providing an undoped layer over said first silicon layer of said SOI substrate; doping at least a portion of said undoped layer to form a doped conductive layer of a first conductivity type over said SOI substrate; subsequently implanting a portion of said first silicon layer of said SOI substrate extending below said doped conductive to form an implanted silicon region; forming at least one gate stack over said SOI substrate, said gate stack comprising a portion of said doped conductive layer; and forming source and drain regions of a second conductivity type on opposite sides of said gate stack and within said implanted silicon region of said SOI substrate.