Patent ID: 7514963
Filing Date: 2009-04-07
Classification: B23K,H03K

Abstract:
1. A semiconductor integrated circuit device comprising an output buffer circuit composed of a logic gate that receives data and a driver transistor that receives, at a control electrode thereof, an output from the logic gate and that is driven according to the output from the logic gate, wherein an output control signal that controls an output operation of the driver transistor is inputted to the logic gate; wherein the logic gate includes a resistance value switching transistor that receives a selection control signal that varies magnitude of a composite resistance of an on-state resistance of a transistor constituting the logic gate, and that can be switched on/off by the selection control signal, a first transistor that receives the output control signal at a control electrode thereof and a direct-current voltage at a first electrode thereof; a switch that is switched on/off by the output control signal and that electrically connects/disconnects a second electrode of the first transistor and the control electrode of the driver transistor; and the resistance value switching transistor receiving the direct-current voltage at a first electrode thereof, having a second electrode connected to a node at which the second electrode of the first transistor and the switch are connected, and having an on-state resistance lower than the on-state resistance of the first transistor, wherein the resistance value switching transistor is switched on/off by the selection control signal to switch a rate of change of an output of the driver output transistor.