Patent ID: 6501757
Filing Date: 2002-12-31
Classification: H04L

Abstract:
An ATM switch for switching cells from a plurality of input ports to a plurality of output ports supporting a plurality of priority levels, comprisinga routing tag detachment module for filtering the input cells, extracting the routing tag from the said filtered input cells, delaying the said filtered cells till the routing tag is processed; a buffer assignment module for decoding the said routing tag received from the said routing tag detachment module, generating a cell destination port map and priority levels, allocating an internal cell buffer for the incoming cells, deallocating the corresponding cell buffer for outgoing cell, one or more configuration ports provided in the said buffer assignment module for configuring the total number of buffers available; an input cross bar switch for transmitting cells from the said routing tag detachment module to the said cell buffers allocated by the said buffer assignment module, generating the required control signals for writing the transmitted cell to the said allocated cell buffer, said cell buffer being housed in a shared cell buffer pool organized as a bank of a plurality of groups each containing a plurality of cell buffers; a queue management module having shared queue memories for receiving the allocated buffer addresses, corresponding cell destination port maps and the priority level of the cells from the said buffer assignment module, sequencing the reading of said cell buffers from the said shared cell buffer pool based on the priority level of the cells; and an output cross bar switch for transmitting the cells read out from the said shared cell buffer pool to the said output ports of the said switch.