Patent ID: 9123800
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate including a current carrying region and termination regions positioned at both sides of the current carrying region; a p type epitaxial layer disposed on the first n− type epitaxial layer; a second n− type epitaxial layer disposed on the p type epitaxial layer; a first trench disposed in the current carrying region; a second trench disposed in each termination region; a gate insulating layer disposed in the first trench; a gate electrode disposed on the gate insulating layer; and a termination insulating layer disposed in the second trench, wherein a side of the termination insulating layer contacts the p type epitaxial layer and the second n− type epitaxial layer.