Patent ID: 6023174
Filing Date: 2000-02-08
Classification: H03K

Abstract:
An input buffer interface coupled between a high supply voltage source and a low supply voltage source to accept one or more input signals, buffer said input signals, and to convert said input signals to output signals acceptable to internal circuitry within said integrated circuit, comprising:a) at least one input buffer circuit, whereby each input buffer circuit is comprising:an input terminal coupled to an input/output pad that is connected to external circuitry that will generate said input signal,a buffer output terminal coupled to said internal circuitry to transfer the output signal to said internal circuitry,a voltage adjustment terminal to receive a voltage adjustment signal indicating a buffer threshold trip point level that is an input voltage level of said input signal at which said output signal will change between a first output logic level and a second output logic levelan input amplifier connected between the input terminal and the output terminal to receive one of the input signals convert said input signal to the output signal, anda threshold trip point modification circuit connected between the output terminal and the voltage threshold adjustment terminal to modify the threshold trip point level as a function of the voltage adjustment signal: andb) a voltage adjustment means connected to a stabile voltage reference source, and an internal inverter circuit constructed of a basic circuit connected to provide a threshold voltage level of said internal circuits, and the voltage adjustment terminal to create the voltage adjustment as a function of the stabile voltage reference and the threshold voltage level of the internal circuits, whereby said voltage adjustment means comprisesa duplicate input buffer circuit comprising:an input terminal coupled to an input/output pad that is connected to a stable reference voltage to establish the threshold trip point level of said input signals,a buffer output terminal,a voltage adjustment terminal to receive a voltage adjustment signal indicating the buffer threshold trip point level,an input amplifier connected between the input terminal and the output terminal to receive the stable reference voltage and convert it to an output voltage level present at said output terminal, anda threshold trip point modification circuit connected between the output terminal and the voltage threshold adjustment terminal to modify the threshold trip point level as a function of the voltage adjustment signal,an operational amplifier having a noninverting terminal coupled to the buffer output terminal of said duplicate input buffer circuit, and an amplifier output terminal coupled to the voltage adjustment terminal of said duplicate input buffer circuit and the voltage adjustment terminal of said input buffer circuit, and an inverting terminal, andan inverter gate constructed of a basic circuit of said internal circuitry having an inverter input terminal coupled to an inverter output terminal and to the inverting terminal of said operational amplifier, wherein a voltage level at said inverting terminal is set at an inverter threshold level for said inverter gate, whereby said inverter output terminal is connected to the inverting terminal of said operational amplifier, whereby said voltage adjustment is created at the output of the operational amplifier as a function of a voltage level at the buffer output terminal of the duplicate input buffer circuit and the inverter threshold level.