Patent ID: 6905941
Filing Date: 2005-06-14
Classification: H01L

Abstract:
1. A method to fabricate ultra-thin Si channel devices comprising the steps of: providing a structure having at least one trench region that includes a recessed, deposited oxide fill material, said at least one trench region is located in a nitride pad layer, a thermally grown oxide pad layer, a top-Si-containing layer of an SOI substrate and a portion of a buried insulating layer of said SOI substrate; removing said nitride pad layer to expose said thermally grown oxide pad layer; and removing said exposed thermally grown oxide pad layer and a portion of said recessed, deposited oxide fill material utilizing a chemical oxide removal process, said chemical oxide removal process etches the thermally grown oxide at a faster rate than the recessed, deposited oxide to provide a silicon-on-insulator structure having an oxide filled trench isolation region comprising said recessed, deposited oxide that has a height that is above an upper surface of said top Si-containing layer and a sloping oxide structure which has a tapered slope that extends outward from an upper surface of the recessed, deposited oxide to said upper surface of said top Si-containing layer, wherein no undercut regions are located beneath the top Si-containing layer.