Patent ID: 8420490
Filing Date: 2013-04-16
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: a) providing a substrate; b) forming a source region, a drain region, a gate stack, sidewall spacers and an interlayer dielectric layer on the substrate, wherein the gate stack is between the source region and the drain region on the substrate, the sidewall spacers are on sidewalls of the gate stack, the interlayer dielectric layer covers the source region and the drain region, and the gate stack includes a gate dielectric layer and a dummy gate; c) removing the dummy gate to form an opening; d) after removing the dummy gate, performing a tilted Halo ion implantation to the semiconductor device to form Halo ion-implanted regions on both sides of a channel of the semiconductor device; e) removing the gate dielectric layer; f) performing thermal annealing to activate the dopants in the Halo ion-implanted region; g) performing subsequent process to the semiconductor device.