Patent ID: 7823133
Filing Date: 2010-10-26
Classification: G06F

Abstract:
1. An integrated circuit for use in a smart card device that can be debugged comprising: at least one non-volatile memory that stores a debug monitor program and instructions relating to initiating and completing smart card transactions with a host and operative with an active program to be debugged; an interface including a plurality of communication pipes and a plurality of endpoints that communicate with a host through respective communication pipes, including at least one interrupt endpoint; and a processor operatively connected to the interface and non-volatile memory wherein said processor is operative for configuring the interrupt endpoint as a debug port for debugging the active program using the debug monitor program wherein the debug monitor program is configured to run in its own context and wherein the debug monitor program and processor are configured to modify program opcodes to use an illegal opcode, wherein as the active program reaches such opcode, the processor enters a debug monitor program context and polls for a next interrupt, and when it occurs, the debug monitor program is configured to send back to the host a handshake code indicating that a breakpoint has been reached or an asynchronous event stopped program execution, and said processor is configured to transmit through the interrupt endpoint a current program counter value allowing the host to retrieve any context of a program that is debugged.