Patent ID: 8785253
Filing Date: 2014-07-22
Classification: H01L

Abstract:
1. A method of manufacturing a leadframe for an integrated circuit (IC) package, the method comprising: receiving design criteria for a partially patterned leadframe for use in an IC package, the design criteria including a first number of bonding areas to be disposed on a top surface of the leadframe and a second number of contact areas to be disposed on a bottom surface of the leadframe; providing at a first location a metal strip having a top surface and a generally flat bottom surface; etching at the first location the top surface of the metal strip to define a plurality of bonding areas equal to the number of bonding areas from the design criteria and to define upper portions of a plurality of metal traces, each metal trace extending from the top surface to the bottom surface of the metal strip and coupling a bonding area of the plurality of bonding areas to an area disposed on the bottom surface of the metal strip where a contact area will be defined; wherein at least one metal trace couples a bonding area of the plurality of bonding areas to a contact area laterally remotely disposed from beneath the bonding area; transporting the metal strip from the first location to a second location prior to an IC chip being mounted thereto, the first location being a first manufacturing facility and the second location being a second manufacturing facility remotely disposed from the first manufacturing facility; and wherein the generally flat bottom surface provides support for the metal traces integrally formed therewith during the transporting of the metal strip.