Patent ID: 9082663
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first conductive layer; a first insulating layer whose side surface is in contact with a side surface of the first conductive layer; an oxide semiconductor layer over and in contact with the first conductive layer and the first insulating layer; a gate insulating layer over the oxide semiconductor layer; a gate electrode layer over the oxide semiconductor layer with the gate insulating layer interposed therebetween; a second insulating layer over the gate electrode layer; a first wiring layer over the second insulating layer, the first wiring layer being in contact with the first conductive layer through a first opening of the second insulating layer; a second wiring layer over the second insulating layer, the second wiring layer being in contact with the oxide semiconductor layer through a second opening of the second insulating layer; and a third wiring layer over the second insulating layer, the third wiring layer electrically connected to the oxide semiconductor layer through a third opening of the second insulating layer, wherein one surface of the oxide semiconductor layer is directly in contact with the first conductive layer.