Patent ID: 7619446
Filing Date: 2009-11-17
Classification: H03K

Abstract:
1. A comparator unit with reduced power consumption, the comparator unit configured to compare a pair of input signals thereof to generate a pair of output signals under a control of a final clock signal, the values of the output signals being identical when the final clock signal is an idle voltage level while the values of the output signals being different when the final clock signal is a busy voltage level, the comparator comprising: a detecting unit configured to detect whether the values of the output signals of the comparator are identical, the detecting unit generating the idle voltage level as a detecting signal when the values of the output signals of the comparator are identical, otherwise, the detecting unit generating the busy voltage level as the detecting signal; a triggering unit configured to generate a triggering signal depending on the detecting signal and an original clock signal for controlling the comparator, the triggering unit generating the idle voltage level as the triggering signal as long as the original clock signal is the idle voltage level, the triggering signal remaining an original state thereof when the detecting signal is the idle voltage level and the original clock signal is the busy voltage level, and the triggering signal turning to an opposite state thereof when the detecting signal is the busy voltage level and the original clock signal is the busy voltage level; and a determining unit configured for generating the final clock signal for the comparator depending on the triggering signal and the original clock signal, the determining unit generating the busy voltage level as the final clock signal when the triggering signal is different from the original clock signal and generating the idle voltage level as the final clock signal when the triggering signal is identical with the original clock signal.