Patent ID: 6639275
Filing Date: 2003-10-28
Classification: H01L

Abstract:
A semiconductor device comprising:(a) a semiconductor substrate; (b) a first semiconductor layer of a first conductivity type formed on the substrate; the first semiconductor layer serving as a first source/drain region; (c) a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; the second semiconductor layer having a trench penetrating the same; (d) a gate electrode formed in the trench by way of a gate dielectric; the gate electrode having a connection portion located in the trench; (e) a second source/drain region of the first conductivity type formed in a surface area of the second semiconductor layer; (f) an interlayer dielectric layer formed on the second semiconductor layer to cover the gate electrode; the interlayer dielectric layer having a contact hole that exposes the connection portion of the gate electrode; (g) a conductive plug filled in the contact hole in such a way as to contact the connection portion of the gate electrode; and (h) a wiring layer formed on the interlayer dielectric layer in such a way as to contact the plug; the wiring layer being electrically connected to the connection portion of the gate electrode by way of the plug.