Patent ID: 8673741
Filing Date: 2014-03-18
Classification: H01L

Abstract:
1. A method for dicing a semiconductor wafer including a top surface and a bottom surface, the bottom surface attached to an underlying layer of material, and the top surface comprising one or more device layers including a pattern of multiple, mutually spaced apart electronic circuit components separated by one or more streets, the method comprising: applying a coating to the semiconductor wafer to protect the semiconductor wafer from debris generated by a first laser beam; generating the first laser beam; providing relative movement of the first laser beam with respect to the top surface of the semiconductor wafer to: washing the semiconductor wafer to remove the coating; etching the sidewalls of the at least partially diced semiconductor wafer to reduce or remove a heat affected zone (HAZ) produced in the sidewalls by the first laser beam; and cutting through the underlying layer of material along the one or more dicing streets so as to separate a die from the semiconductor wafer having at least a predetermined die break strength and to produce a yield of operational die that equals at least a predetermined minimum yield, the sidewall etching being performed before the cutting through the underlying layer of material to reduce or prevent debris on the sidewalls from the underlying layer of material during the etching of the sidewalls.