Patent ID: 6352907
Filing Date: 2002-03-05
Classification: H01L

Abstract:
A method for manufacturing an emitter-base junction of a bipolar transistor on an active silicon region of a first conductivity type delimited by a trench filled with a field insulation material, the active silicon region being covered with a first insulating layer, including the steps of:etching the first insulating layer to expose a surface of the active silicon region; etching the surface of the active silicon region down to a given height; forming first and second very heavily-dopcd silicon spacers of a second conductivity type at an internal periphery of abrupt protrusions respectively resulting from the etching of the first insulating layer and from the etching of the active region; growing by epitaxy a doped base layer of the second conductivity type; forming a third spacer of an insulating material at an internal periphery of a protrusion of the doped base layer corresponding to the first spacer; depositing a heavily-doped silicon emitter layer of the first conductivity type; and performing a chem-mech polishing, using the first insulating layer and the third spacer as stops.