Patent ID: 7558991
Filing Date: 2009-07-07
Classification: G01R,H04B,H04J,H04L

Abstract:
1. A test device for measuring jitter, comprising: a data pattern generator operable to generate a data stream by modulation of an analog low-frequency basic signal with a sampling frequency f a first input terminal configured to connect to a data input of a semiconductor component to be tested; a clock generator operable to generate a test clock with the clock frequency f a jitter generator operable to generate jitter on a signal, the jitter generator being connected either between an output of the data pattern generator and the first input terminal or between the clock generator and a second input terminal for connecting to a clock input of the semiconductor component to be tested; an output terminal for connecting a data output of the semiconductor component to be tested to an input of an evaluation device; and the evaluation device which determines the jitter parameters from a low-frequency component of an input signal at the input of the evaluation device, the low-frequency component containing only frequency components of frequencies that are less than half the sampling frequency f