Patent ID: 6020230
Filing Date: 2000-02-01
Classification: H01L

Abstract:
A method of forming trench isolation in a semiconductor substrate, said method comprising the steps of:forming a pad layer over said substrate;forming a first stacked layer over said pad layer;forming a second stacked layer over said first stacked layer;defining an opening in said second stacked layer, said first stacked layer, and said pad layer, said opening extending down to said substrate;removing a portion of said substrate for forming an upper-half portion of a trench by using said second stacked layer as a mask;forming a sidewall structure on said opening;removing a portion of said substrate for forming a lower-half portion of said trench by using said sidewall structure as a mask;removing said sidewall structure and said second stacked layer;forming a first insulating layer over said trench;forming a second insulating layer over said first insulating layer and over said first stacked layer;forming a semiconductor layer over said second insulating layer;oxidizing a portion of said semiconductor layer for forming a third insulating layer;forming a filling layer over said third insulating layer; andplanarizing said substrate.