Patent ID: 6251760
Filing Date: 2001-06-26
Classification: H01L

Abstract:
A wiring method for a semiconductor device, comprising:forming a first insulation film on a surface of a semiconductor substrate having a first conductive type;patterning the first insulation film to form a first insulation film pattern having an opening that exposes a portion of the surface of the semiconductor substrate;forming a second insulation film on the portion of the surface of the semiconductor substrate that is exposed through the opening;forming a first conductive layer pattern above the second insulation film and at both lateral walls of the first insulation film defined by the opening;forming a barrier film on a surface of said first conductive layer pattern; andforming a second conductive layer pattern in an opening defined by walls of opposing portions of the first conductive layer pattern that are separated, wherein the first conductive layer pattern and the second conductive layer pattern are formed of different materials.