Patent ID: 6806567
Filing Date: 2004-10-19
Classification: H01L

Abstract:
A semiconductor assembly comprising:a substrate having a surface; a semiconductor die having a plurality of edges, having an active surface having a plurality of bond pads thereon located adjacent at least two edges of the plurality of edges, and having a back side surface, the semiconductor die having at least a portion of the back side surface adhesively attached to at least a portion of the surface of the substrate; a gel elastomer contacting at least a portion of the active surface of the semiconductor die; a layer of adhesive substantially covering a surface of the gel elastomer; a heat sink attached to the gel elastomer by the layer of adhesive; and an encapsulation material covering a portion of the surface of the substrate, the plurality of edges of the semiconductor die, and at least one bond pad of the plurality of bond pads located adjacent at least two edges of the semiconductor die, wherein the encapsulation material excludes covering the heat sink.