Patent ID: 6931612
Filing Date: 2005-08-16
Classification: G06F

Abstract:
1. A method for designing an integrated circuit, comprising: selecting an algorithm for implementation as an integrated circuit, specifying performance metrics for a set of one or more characteristics of said integrated circuit, specifying a maximum allowable area for said integrated circuit, identifying N adjustable parameters for said algorithm, creating a N selecting, from said set of combinations forming said N for each one of said first subset of combinations, performing a first simulation of said algorithm to determine said performance metrics for each one of said first set of characteristics of said integrated circuit, for each one of said first subset of combinations, performing a second simulation of said algorithm to determine an area of said integrated circuit, for each one of said first subset of combinations, comparing said performance metrics for said set of characteristics produced from said first simulation to said specified performance metrics for said set of characteristics of said integrated circuit, and for each one of said first subset of combinations, comparing the area of said integrated circuit produced from said second simulation to said specified maximum allowable area of said integrated circuit.