Patent ID: 8053807
Filing Date: 2011-11-08
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor package, comprising: forming a first hole through a semiconductor substrate that includes a plurality of semiconductor devices; forming a bonding pad, that includes a wiring pattern formed on an upper face of the semiconductor substrate adapted to be electrically connected to each of the semiconductor devices, and a plug, extending from the wiring pattern to at least substantially fill the first hole; attaching a supporting member to the upper face of the semiconductor substrate using an adhesive member; reducing a thickness of the semiconductor substrate to expose a lower end of the plug from a lower face of the semiconductor substrate; forming a polymer insulation member, that includes a second hole for exposing the lower end of the plug, on the lower face of the semiconductor substrate at a temperature that allows or temperatures that allow the supporting member not to be thermally decomposed; and cutting the semiconductor substrate along a scribe lane.