Patent ID: 6259425
Filing Date: 2001-07-10
Classification: G09G

Abstract:
A display apparatus comprising:a plurality of pixel capacitors in a matrix arrangement;a video signal transmission bus for transmitting a video signal, said video signal transmission bus being disposed in parallel with one side of the display apparatus;a plurality of sample-hold circuits connected to said video signal transmission bus to sample-hold said video signal in synchronism with a horizontal synchronizing signal;a plurality of signal lines for delivering sampled video signal from said sample-hold circuits to said pixel capacitors via switching elements; anda video signal voltage compensation circuit located at an input portion of said video signal transmission bus and provided with a filter for receiving said horizontal synchronizing signal and for varying frequency-amplitude characteristics of said video signal to be outputted to said video signal transmission bus in response to elapsed time from a reception of said horizontal synchronizing signal,wherein said sample-hold circuits are a plurality of analog switches which are controlled in sample-holding operation by a signal responsive to said horizontal synchronizing signal and wherein a part of said analog switches disposed along the video signal transmission buses are adapted to close to connect between the video signal transmission buses and the signal lines.