Patent ID: 6333234
Filing Date: 2001-12-25
Classification: H01L

Abstract:
A method for making a symmetrical high voltage metal oxide semiconductor (HVMOS) on a semiconductor wafer, the method comprising:providing a silicon-on-insulator (SOI) substrate;performing a shallow trench isolation(STI) process so as to form a plurality of shallow trench isolations and to form at least one active area isolated by each shallow trench isolation on the surface of the SOI substrate;forming two unnneighboring field oxides (FOX) on the surface of the active area;forming a gate between the two field oxides on the surface of the active area, with a portion of the gate covering the two field oxides;performing a first ion implantation process so as to form two first ion implantation areas on the surface of the active area not covered by the gate and the field oxide;performing a second ion implantation process so as to form two second ion implantation areas on the surface of the active area not covered by the gate and the field oxide;andperforming a third ion implantation process so as to form two third ion implantation areas at the bottom of the two field oxides;wherein the two first ion implantation areas and the two second ion implantation areas are used for forming two double diffuse drains (DDD) respectively, to function as a source and drain of the HVMOS, and two third ion implantation areas are used for a drift area of the HVMOS.