Patent ID: 7653196
Filing Date: 2010-01-26
Classification: H04L

Abstract:
1. An apparatus for performing RC4 ciphering, the apparatus comprising: an S-box storage device comprising a two-read/one-write register file configured to store an array of M state bytes and configured to allow N successive bytes of the array of M state bytes to be read from or written to the register file at a time; an N-byte cache coupled to the S-box storage device, the N-byte cache configured to store the N successive bytes of the array of state bytes and configured to allow each byte of the N successive bytes to be read from or written to the N-byte cache; a cache write mechanism coupled to the S-box storage device and the N-byte cache, the cache write mechanism configured to read the N successive bytes of the array of state bytes from the S-box storage device and to write the N successive bytes to the N-byte cache; a key generator coupled to the S-box storage device, the N-byte cache and the cache write mechanism, the key generator configured to generate a byte of a key stream for each iteration of N iterations based on a first state byte corresponding to a first index, i, stored in the N-byte cache and a second and a third state byte corresponding to a second index, j, and a third index, t, respectively, stored in at least one of the N-byte cache and the S-box storage device; and a controller coupled to the S-box storage device, the N-byte cache, the cache write mechanism and the key generator, the controller configured to control the S-box storage device, the N-byte cache, the cache write mechanism and the key generator to generate the byte of the key stream for each iteration of the N iterations and to write the N successive bytes from the N-byte cache to the S-box storage device after the Nth iteration.