Patent ID: 8623758
Filing Date: 2014-01-07
Classification: H01L

Abstract:
1. A method, comprising: forming an adhesion barrier layer over a dielectric layer formed on a substrate, wherein a first stress level is present across a first interface between the adhesion barrier layer and the dielectric layer; forming a stress-reducing barrier layer over the adhesion barrier layer, wherein the stress-reducing barrier layer reduces the first stress level to provide a second stress level, less than the first stress level, across a second interface between the adhesion barrier layer, the stress-reducing barrier layer, and the dielectric layer; forming a metal layer over the stress-reducing barrier layer, wherein the metal layer, adhesion barrier layer, and stress-reducing barrier layer define an interconnect metal stack; defining recesses in the interconnect metal stack to expose the dielectric layer; and filling the recesses with a dielectric material, wherein a portion of the interconnect metal stack disposed between adjacent recessed filled with dielectric material defines an interconnect structure.