Patent ID: 6143640
Filing Date: 2000-11-07
Classification: H01L

Abstract:
A method for connecting two levels of interconnect vertically spaced from each other by another level of interconnect comprising the steps of:a) forming a first interconnect region to which contact is to be made;b) forming a first insulating layer over the interconnect region;c) forming an etch-stop layer over the first insulating layer;d) etching the etch stop layer to form an opening at a position over said first interconnect region;e) forming a second interconnect region in contact with said first insulating layer and above said first interconnect region;f) forming a second insulating layer over said first insulation layer, said etch stop layer, and the etch stop layer opening;g) forming an opening in said second insulating layer, said opening in said second insulating layer overlapping said opening in said etch stop layer;h) extending said opening in said second insulating layer through said opening in said etch stop layer and said first insulating layer; andi) filling the openings in said first and second insulating layers with a conductor to create a connection between said first interconnect region and a region above said second insulating layer, the portion of the conductor in said first insulating layer being filled to conform to the opening in said etch stop layer.