Patent ID: 6150241
Filing Date: 2000-11-21
Classification: H01L

Abstract:
A process for making a transistor on an SOI type support comprising a silicon oxide layer and a thin silicon film covering the silicon oxide layer, the process comprising the following steps:a) forming a stack comprising a grid insulator layer and a grid material layer in this order on the thin silicon film,b) forming a first etching mask on the stack according to a pattern corresponding to an active region of the transistor,c) etching the grid material layer, the grid insulation layer and the thin silicon film to form a column with first flanks defined according to the pattern of the first etching mask,d) forming a first insulating layer of electrical insulating material around the column, and planarizing a surface of this layer until the grid material layer of the column is exposed,e) etching the grid material layer in the column according to a second mask to form a grid structure with second flanks,f) forming a second insulating layer of electrical insulating material on the grid structure so as to electrically insulate the second flanks of the grid structure,g) forming source and drain regions in the thin silicon film by implantation of impurities, andh) forming contact areas on the grid structure in the source and drain regions.