Patent ID: 8736317
Filing Date: 2014-05-27
Classification: H03K,H03L

Abstract:
1. A frequency divider, comprising: a first edge detection unit configured to generate a first count signal responsive to detecting first edges of an input signal based on a division control signal; a second edge detection unit configured to generate a second count signal responsive to detecting either the first edges of the input signal or second edges of the input signal based on a selection signal and the division control signal, wherein the second edge is different from the first edge; a pulse triggered buffer unit configured to generate an output signal by controlling a logic level of an output node based on the first count signal and the second count signal, the output signal being divided by a target division ratio with respect to the input signal based on the selection signal and the division control signal; and a mode selection unit configured to set the target division ratio to an odd number division ratio or an even number division ratio based on the selection signal.