Patent ID: 6100720
Filing Date: 2000-08-08
Classification: H03K

Abstract:
An inverter circuit comprising first and second input terminals for receiving a non-inverting input signal and an inverting input signal, respectively, of a pair of complementary input signals, an inverter block for receiving said input complementary signals through said first and second input terminals to generate a pair of complementary output signals including a non-inverting output signal and an inverting output signal, first and second output terminals for outputting therethrough said non-inverting output signal and said inverting output signal, respectively, a first rectifier section, activated when said inverting input signal is at a high level, for allowing current to flow from said first output terminal to said second output terminal, and a second rectifier section, activated when said non-inverting input signal is at a high level, for allowing current to flow from said second output terminal to said first output terminal.