Patent ID: 6100185
Filing Date: 2000-08-08
Classification: H01L

Abstract:
A semiconductor processing method of forming a conductive interconnect line comprising:providing a semiconductive substrate having at least two components between which electrical communication is desired;positioning the semiconductive substrate within a chamber of a physical vapor deposition reactor, the reactor having an inductive coil received within the chamber in which the semiconductive substrate is positioned, the chamber including a titanium target opposite which the semiconductive substrate is received, the inductive coil being received intermediate the target and substrate proximate a radial periphery of the chamber;injecting a sputtering gas and a nitrogen containing source gas to within the chamber while generating a sputtering magnetron plasma proximate the titanium target and a gas plasma with the inductive coil proximate the semiconductive substrate, the magnetron and gas plasmas collectively extending entirely between at least a portion of the target and a portion of the semiconductive substrate, the inductive coil being powered at from about 1 kw to about 6 kw and the substrate being at less than 450.degree. C. during at least some of the injecting effective to deposit a TiN comprising layer having at least 99% <200> crystal grain orientation purity;removing the semiconductive substrate from the chamber and depositing a conductive layer over the TiN comprising layer having at least 99% <200> crystal grain orientation purity;first anisotropically etching the conductive layer into an interconnect line shape using a first etching chemistry; andsecond anisotropically etching the TiN comprising layer having at least 99% <200> crystal grain orientation purity into the interconnect line shape using a second chemistry different from the first to produce an interconnect line of both the conductive and TiN comprising layers which has substantially vertical sidewalls.