Patent ID: 8338938
Filing Date: 2012-12-25
Classification: H01L

Abstract:
1. A chip package device, comprising: a substrate including at least one chip bonding area and at least one contact pad disposed peripherally on the at least one chip bonding area; a chip including an active surface, an inactive surface, and at least one bonding pad disposed on the active surface, wherein the chip is disposed on the at least one chip bonding area of the substrate with its inactive surface facing the substrate; at least one wire connecting the at least one bonding pad and the at least one contact pad; an adhesive layer covering the active surface of the chip and enclosing a portion of the at least one wire extending over the at least one bonding pad; a heat dissipation element attached to the adhesive layer, covering the chip; and an encapsulation partially enclosing a periphery of an assembly including the chip, the adhesive layer, and the heat dissipation element, the encapsulation including an indented opening to expose a surface of the heat dissipation element; wherein a surface of the heat dissipation element attached to the adhesive layer is rougher than the surface exposed through the indented opening.