Patent ID: 8478574
Filing Date: 2013-07-02
Classification: G06F

Abstract:
1. A method, in a data processing system, for tracking array data contents across three-value read and write operations in a simulation of an integrated circuit design, the method comprising: receiving, in the data processing system, an integrated circuit design having a memory array; initializing, by the data processing system, a tree data structure for the memory array having a root node assigning a default value to all data bits, wherein initializing the tree data structure for the memory array comprises creating the root node having a non-deterministic address having a non-deterministic value for all address bits, wherein the non-deterministic address represents a set of addresses, and a data value equal to a default value; and responsive to a write operation writing a write data value to a write address, updating, by the data processing system, the tree data structure to track memory array contents.