Patent ID: 6372617
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A method of manufacturing a floating gate type semiconductor non-volatile memory including a floating gate formed on a semiconductor-substrate through a first gate insulating film, and a control gate which is subjected to capacitive junction in relation to said floating gate through a second gate insulating film, comprising the steps of:forming a first floating gate; forming an insulating film on an entire surface of a semiconductor substrate, the insulating film covering said first floating gate; polishing said insulating film exposing an under layer film of said insulating film over said first floating gate; etching said under layer film by self-adjustment etching in order to form a concave shaped space with said insulating film and said first floating gate; forming a second floating gate by amorphous silicon film, poly-crystal silicon film, or a combination thereof, on the entire surface of the semiconductor substrate; and etching back said second floating gate by dry etching forming a side wall on a surface of said concave shaped space.