Patent ID: 6238972
Filing Date: 2001-05-29
Classification: H01L

Abstract:
A method of making a semiconductor device, comprising the steps of:providing a deposition substrate comprising silicon;providing a first layer of hemispherical-grained silicon over and in direct contact with the deposition substrate in a first deposition process;etching the first layer of hemispherical-grained silicon and the deposition substrate using the first layer of hemispherical-grained silicon as an etching mask;depositing a second layer of hemispherical-grained silicon over the deposition substrate in a second deposition process so that grains of hemispherical-grained silicon of the second layer grow independently of grains of the first layer of hemispherical-grained silicon formed in the first deposition process;patterning a deposition substrate;forming a dielectric layer over the second layer of hemispherical-grained silicon; anddepositing a conductive layer over the dielectric layer;wherein the first layer of hemispherical-grained silicon is undoped; andwherein the deposition substrate comprises doped silicon, the method further comprising the step of etching the first layer of hemispherical-grained silicon using a selective etch which preferentially etches doped silicon at a rate faster than the selective etch etches undoped silicon, wherein the second layer of hemispherical-grained silicon is deposited subsequent to the etching step.