Patent ID: 9105732
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device comprising the steps of: forming a conductive layer embedded in a first insulating layer; forming an oxide semiconductor layer over and in contact with the conductive layer and the first insulating layer; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode over the gate insulating layer; adding a dopant to the oxide semiconductor layer using the gate electrode as a mask, whereby the oxide semiconductor layer has a pair of low-resistance regions including the dopant; forming a second insulating layer over the oxide semiconductor layer and the gate electrode; forming a first wiring electrically connected to one of the pair of low-resistance regions through the second insulating layer; and forming a second wiring electrically connected to the other of the pair of low-resistance regions through the second insulating layer, wherein one of the pair of low-resistance regions is in contact with the conductive layer.