Patent ID: 8495442
Filing Date: 2013-07-23
Classification: G06F,G11C,H03M

Abstract:
1. A system, comprising: a first plurality of memory cells configured to store data; a memory controller configured to a second plurality of memory cells configured to store, in response to the one or more of the first plurality of memory cells being defective, information regarding locations of the one or more of the first plurality of memory cells, wherein the second plurality of memory cells is configured to store the information at a lower density than a density at which the first plurality of memory cells store the data, wherein the memory controller is configured to, in response to the one or more of the first plurality of memory cells being defective, read the information stored in the second plurality of memory cells to determine the locations of the one or more of the first plurality of memory cells, and wherein the information read from the second plurality of memory cells has a lower probability of error than the data read from the first plurality of memory cells.