Patent ID: 8230252
Filing Date: 2012-07-24
Classification: G06F

Abstract:
1. A redundant processor system, comprising: a logical processor that includes processor elements; time logic executable by each of the processor elements of the logical processor, the time logic configured to generate a logical time in response to a time of day request from a requestor, the logical time being generated to approximate an actual time such that each of the processor elements of the logical processor returns, to the requestor, a same logical time in response to the time of day request, wherein the processor elements of the logical processor are configured to perform computations for the requestor and to coordinate and synchronize with each other, and wherein the processor elements of the logical processor all returning the same logical time to the requestor allows the requestor to perform a transaction using the same logical time; and logical time registers associated with the respective processor elements, wherein each of the logical time registers is configured to maintain a current logical time, and wherein the time logic executable by each of the processor elements is further configured to determine whether to increment the current logical time in the corresponding logical time register to generate the logical time in response to the time of day request.