Patent ID: 8187966
Filing Date: 2012-05-29
Classification: H01L

Abstract:
1. A manufacturing method for a semiconductor integrated circuit device, comprising: (a) forming a wiring trench in a first insulating film over a first main surface of a wafer; (b) forming a metal member layer in the wiring trench and over the first insulating film so as to fill the wiring trench therewith; (c) forming an embedded wiring by removing the metal member layer located outside the wiring trench by a CMP process; (d) after the step (c), applying a wet cleaning process to the first main surface side of the wafer with the embedded wiring formed therein while rotating the wafer about an axis thereof in a plane including the first main surface; and (e) after the step (d), drying the first main surface side of the wafer, wherein the wet cleaning process comprises the steps of