Patent ID: 6876624
Filing Date: 2005-04-05
Classification: H04J

Abstract:
1. A multiplex conversion unit comprising four types of circuit packs including a high-speed interface circuit pack, a low-speed interface circuit pack, an add/drop multiplex circuit pack and a connecting circuit pack, wherein: said low-speed interface circuit pack accommodates one or a plurality of low-speed transmission lines and includes an output section for outputting a low-speed signal containing one or a plurality of time slots received from said low-speed transmission line to a plurality of high-speed interface circuit packs, and a path switch section for selecting one of the low-speed signals input from said high-speed interface circuit packs for each time slot as a low-speed signal to be transmitted to one or a plurality of said low-speed transmission lines accommodated; said high-speed interface circuit pack accommodates at least a high-speed transmission line and is adapted to output/input a plurality of line signals each containing a predetermined number of time slots transmitted to and received from said high-speed transmission line accommodated, a plurality of line signals input/output by other high-speed interface circuit packs, and a plurality of low-speed signals input/output by a low-speed interface circuit packs, said high-speed interface circuit pack including a time slot assignment section having a first time slot assignment function between a plurality of line signals received from the said high-speed transmission line accommodated and output to other high-speed interface circuit packs on the one hand and the output low-speed signal on the other hand, and a second time slot assignment function between a plurality of line signals input from other high-speed interface circuit packs and transmitted to the high-speed transmission line accommodated on the one hand and the input low-speed signal on the other hand; said add/drop multiplex circuit pack is adapted to output/input a plurality of line signals input/output by each of said high-speed interface circuit packs and a low speed signal containing one or a plurality of time slots input/output by each of the low-speed interface circuit packs, said add/drop multiplex circuit pack including a time slot section having a time slot interchange function between a plurality of line signals and a plurality of low-speed signals, and a line switch section having a first line switch function for switching the line signal to be processed by said time slot section and a second line switch function for switching the time slots of the line signal to be processed by said time slot section using the time slot interchange function of said time slot section; said connecting circuit pack is adapted to input/output the low-speed signal input/output by the high-speed interface circuit pack as a low-speed signal input/output by another high-speed interface circuit pack; and in a use mode of requiring a time slot assignment function alone, a plurality of high-speed interface circuit packs and a plurality of low-speed interface circuit packs are connected to each other through said connecting circuit pack in such a manner that the outputs of the low speed signals being output to the high speed interface circuit packs are the inputs to an another high speed interface circuit pack via said connecting circuits pack as the low signals to the low speed interface circuit packs.