Patent ID: 9076866
Filing Date: 2015-07-07
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising: forming a plurality of pillars in the semiconductor substrate; forming a conductive material to surround a lower lateral surface of each pillar; forming a first spacer to surround a lateral surface of the pillar over the conductive material to expose a top surface and an upper lateral surface of the pillar; forming a self-aligned silicide (salicide) layer on the top surface and the upper lateral surface of the pillar; and forming an electrode to surround the salicide layer, wherein the forming of the first spacer includes; forming a first spacer material along a surface of the conductive material and the pillar; doping impurities into a top surface and an upper lateral surface of the first spacer material, wherein the impurity-doped portion of the first spacer material has a different etch rate from the other portion of the first spacer material; and removing an impurity-doped portion of the first spacer material into which the impurities are doped to expose the top surface and the upper lateral surface of the pillar.