Patent ID: 8914672
Filing Date: 2014-12-16
Classification: G06F

Abstract:
1. An apparatus comprising, a processor including: a cache memory; a plurality of processor core pipelines, wherein each of the plurality of processor core pipelines is to include a plurality of pipeline stages; and replacement hardware coupled to at least a number of pipeline stages, of the plurality of pipeline stages, in at least two of the plurality of processor core pipelines, the replacement hardware to be capable of replacing a functionality of each of the number of pipeline stages in the at least two of the plurality of processor core pipelines, wherein only a first portion of the replacement hardware is to replace a functionality of only a first portion of the number of pipeline stages in a first processor core pipeline of the plurality of processor core pipelines in response to a failure of the first portion of the number of pipeline stages in the first processor core pipeline without replacing a functionality of a second portion of the number of pipeline stages in the first processor core pipeline, and wherein only a second portion of the replacement hardware is to replace a functionality of only a portion of the number of pipeline stages in a second processor core pipeline of the plurality of processor core pipelines.