Patent ID: 7803692
Filing Date: 2010-09-28
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device having a self-aligned contact, the method comprising: forming a plurality of isolation structures in a substrate to define an active area, wherein a top of each of the isolation structures keeps a distance above a surface of the substrate; forming a plurality of gate structures over the substrate; forming a plurality of doped areas in the substrate at each side of the gate structures; forming a plurality of first spacers on sidewalls of each of the gate structures, and a plurality of second spacers on an entire sidewall surface of each of the isolation structures; forming a dielectric layer over the substrate, wherein the dielectric layer covers the substrate, the gate structures, the isolation structures, the first spacers and the second spacers; performing a self-aligned process to form a plurality of contact openings in the dielectric layer between the two neighboring gate structures, wherein the contact openings expose the doped areas; and filling the contact openings with a conductive material to form conductive plugs, wherein the conductive plugs are surrounded by the first spacers and the second spacers.