Patent ID: 8106682
Filing Date: 2012-01-31
Classification: H01L,H03K,Y10T

Abstract:
1. An integrated circuit, comprising: a L-level permutable switching network (L-PSN); wherein the L-PSN comprises (L+2) levels of conductors and (L+1) sets of switches, wherein the I[i−1] number of conductors of the (i−1)-th level of conductors selectively couple to (I[i]/D[i]) number of conductors in each of the D[i] sets of conductors of the i-th level of conductors through a respective I[i−1] number of switches of the i-th set of switches for i=[1:L+1] without requiring traversal of any other conductors; wherein the Π at least one j selected from [1:L+1], D wherein the at least (D[j]+1) number of conductors comprising at least one conductor selected from each of the D[j] sets of conductors of the j-th level of conductors.