Patent ID: 6487606
Filing Date: 2002-11-26
Classification: H04L

Abstract:
An improved Totem system having a network and a plurality of host processors connectable to the network, each of which host processors includes a CPU and is configured for executing processes, wherein for each host processor the improvement comprises:a buffer memory electrically connected to the CPU and configured for storing messages sent to or from the CPU; and a co-processor electrically connected between the network and the buffer memory for providing an interface between the network and the host processor, the co-processor being configured for responding to tokens received from the network and for delivering messages from the network to the buffer memory for retrieval by the CPU, and for delivering to the network messages stored in the buffer memory by the CPU, and wherein the co-processor is operable to store a received message in the buffer memory and to generate an interrupt signal to the CPU indicating to the CPU that a message resides in the buffer memory for the CPU to retrieve, and wherein the co-processor is operable to process the message and send a reply to the network without interrupting the CPU.