Patent ID: 6696763
Filing Date: 2004-02-24
Classification: H01L

Abstract:
A solder ball allocation on a chip, the chip comprising:a substrate; a plurality of first solder balls, used for external connection and arranged outwardly, wherein said first solder balls are located in a periphery of said substrate and are separated from each other by a first distance; and a plurality of second solder balls, used for external connection and located in a central part of said substrate, wherein said second solder balls are arranged with a plurality of first geometric patterns that construct a second geometric pattern with a center of said substrate as a center thereof, said second solder balls are separated from each other by a second distance, and said second solder balls and said first solder balls are separated from each other by a third distance, wherein said third distance is larger than said first and said second distances; and a plurality of through holes, located in said central part of said substrate; and a plurality of power source blocks arranged in said central part of said substrate such that a power line can be connected to any of said power source blocks without being blocked by any of said second solder balls and said through holes.