Patent ID: 8072643
Filing Date: 2011-12-06
Classification: G09G,H04N

Abstract:
1. An image processing apparatus, comprising: a fetcher which fetches first moving image data to be written to a first memory through a first bus; a first processor which performs first processing on the first moving image data read from said first memory through the said first bus to generate second moving image data to be written to said first memory through said first bus; a first outputter which performs output processing directed to a first monitor on second moving image data read from said first memory through said first bus; a reducer which reduces a resolution of the second moving image data read from said first memory through said first bus to generate third moving image data to be written to a second memory through a second bus; and a second outputter which performs output processing directed to a second monitor on the third moving image data read from said second memory through said second bus.