Patent ID: 6073258
Filing Date: 2000-06-06
Classification: G11C

Abstract:
A method for performing dynamic, two-dimensional redundancy determinations to test and repair a memory cell array having a plurality of first and second dimensional memory components and plurality of redundant first and second dimensional memory components, without collection of significant amounts of fail data, the method comprising the steps of:(a) determining the number of failed first dimensional memory components having a particular second dimensional memory component;(b) determining whether the number of failed first dimensional memory components is greater than the number of redundant first dimensional memory components;(c) if the number of failed first dimensional memory components is greater than the number of redundant first dimensional memory components, then immediately without any further testing, soft-fusing a redundant second dimensional memory component for the particular second dimensional memory component;(d) determining the number of failed second dimensional memory components having a particular first dimensional memory component;(e) determining whether the number of failed second dimensional memory components is greater than the number of redundant second dimensional memory components; and(f) if the number of failed second dimensional memory components is greater than the number of redundant second dimensional memory components, then immediately without any further testing, soft-fusing a redundant first dimensional memory component for the particular first dimensional memory component.