Patent ID: 9164907
Filing Date: 2015-10-20
Classification: G06F

Abstract:
1. An information processing apparatus included in a parallel computer system including a plurality of information processing apparatuses, the information processing apparatus comprising: a main storage device that holds data; an arithmetic processing unit including a cache memory unit that holds a part of data held on the main storage device and a plurality of arithmetic operation units that performs arithmetic operations using data held on the main storage device or the cache memory unit; and a communication device that includes: a transmitting unit that sends, to a different information processing apparatus, data that the arithmetic processing unit of the different information Processing apparatus waits for, and control information indicating that the data is to be written on the cache memory unit included in the arithmetic processing unit of the different information processing apparatus; a determining unit that determines whether the control information is added to data received from the different information processing apparatus; and a storage unit that stores the received data on the cache memory unit when the determining unit determines that the control information is added to the received data and the cache memory unit holds data stored on a storage region of the main storage device indicated by a write destination address of the received data, stores the received data on the main storage device when the determining unit determines that the control information is added to the received data and the cache memory unit does not hold the data stored on a storage region of the main storage device indicated by a write destination address of the received data, and stores the received data on the main storage device when the determining unit determines that the control information is not added to the received data.