Patent ID: 6731140
Filing Date: 2004-05-04
Classification: H03K

Abstract:
A multiplexer circuit for receiving a first input data signal, a second input data signal, and a select signal and for providing an output signal, the multiplexer comprising:a first rising edge pulse reset control coupled to receive the select signal and configured to select the first input data signal responsive to the select signal state; a second rising edge pulse reset control coupled to receive the select signal and configured to select the second input data signal responsive to the select signal state; a rising edge enable gate coupled to receive at least one of the first input data signal and the second input data signal and configured to generate a first pulse responsive to a first transition edge of the selected first or second input data signal; a first pulse length delay coupled to receive the first pulse from the rising edge enable gate and configured to generate a first pulse loop signal to deactivate the rising edge enable gate responsive to the first pulse; a first falling edge pulse reset control coupled to receive the select signal and configured to select the first input data signal responsive to the select signal state; a second falling edge pulse reset control coupled to receive the select signal and configured to select the second input data signal responsive to the select signal state; a falling edge enable gate coupled to receive the first input data signal and the second input data signal and configured to generate a second pulse responsive to a second transition edge of the selected first or second input data signal; a second pulse length delay coupled to receive the second pulse from the falling edge enable gate and configured to generate a second pulse loop signal to deactivate the falling edge enable gate responsive to the second pulse; and an output coupled to receive the first and second pulses and configured to produce an output of first logic value for the duration of the first pulse, and of second logic value for the duration of the second pulse as the output signal from the multiplexer circuit.