Patent ID: 6937068
Filing Date: 2005-08-30
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device on a semiconductor substrate, comprising: a first external terminal which is coupled to a first line, and to which a first voltage is supplied; a second external terminal which is coupled to a second line, and to which a second voltage, lower than the first voltage, is supplied; a third external terminal coupled to a third line; a fourth external terminal coupled to a fourth line; a p-channel MISFET having a source coupled to the first line, a drain and a gate, a back gate of the p-channel MISFET being coupled to the third line; an n-channel MISFET having a source coupled to the second line, a drain coupled to the drain of the p-channel MISFET and a gate coupled to the gate of the p-channel MISFET, a back gate of the n-channel MISFET being coupled to the fourth line; a first switching MISFET of a p-channel type having a source-drain path coupled between the first line and the third line, wherein the first switching MISFET is turned on in a first operation mode, and wherein the first switching MISFET is turned off in a second operation.