Patent ID: 6630844
Filing Date: 2003-10-07
Classification: G01R,G06F,H03K

Abstract:
A supply voltage detection circuit for an input/output terminal of an integrated circuit device, comprising:a first voltage detection circuit having an input for receiving a first supply voltage signal and an output for providing a first detection signal that indicates when the voltage level of the first supply voltage signal is below a first steady state supply level; a second voltage detection circuit having an input for receiving a second supply voltage signal and an output for providing a second detection signal that indicates when the voltage level of the second supply voltage signal is below a second steady state supply level; and a logic circuit for receiving the first and second detection signals and providing at least one detected condition signal for disabling current flow through the input/output terminal when either the first supply voltage signal is below the first steady state supply level or the second supply voltage signal is below the second steady state supply level.