Patent ID: 8679899
Filing Date: 2014-03-25
Classification: H01L,Y10T

Abstract:
1. A process comprising joining a first surface and a second surface where said first surface comprises an initially non-solderable surface which comprises; i coating said first surface with a solder-adhesion layer to produce a solder-adhesion layer on said first surface; ii providing a TIM composition comprising solderable heat-conducting particles in a bondable resin matrix, at least some of said solderable heat-conducting particles comprising a solder surface; iii placing said TIM composition between said first surface and said second surface to extend between and be contiguous with both said second surface and said solder-adhesion layer on said first surface; iv heating said TIM composition sufficiently to; v adhesively bonding said resin matrix to said first surface and said second surface; and wherein said first surface comprises a semiconductor chip and said second surface comprises a solderable heat sink and said heating produces a multipath soldered interface between said electronic device and said solderable heat sink; vi wherein said solder-adhesion layer on said first surface comprising a semiconductor chip comprises an outer metal layer comprising Au, Cu, Sn, Pd, Pb, In, or Ni, or mixtures thereof; vii said particles comprise; viii said resin matrix comprises polyimides, siloxanes, polyimide siloxanes, epoxies phenoxys, polystyrene allyl alcohol polymers or bio-based resins made from lignin, cellulose, wood oils, or crop oils, or mixtures thereof.