Patent ID: 7521311
Filing Date: 2009-04-21
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device comprising: forming a device isolation layer on a field region of a first conductive type semiconductor substrate; implanting first conductive type impurity ions for controlling a threshold voltage of a subsequently formed main gate in an active region of the semiconductor substrate; forming a main gate insulating layer and the main gate on a predetermined portion of the active region of the semiconductor substrate; forming a first insulating layer on an entire surface of the semiconductor substrate including the main gate; implanting second conductive type impurity ions for controlling a threshold voltage of a subsequently formed sidewall gate in the active region of the semiconductor substrate using the main gate as a mask; forming the sidewall gate at opposite sides of the main gate; forming source and drain regions at opposite sides of the sidewall gate in the semiconductor substrate; forming a suicide block layer on opposite sides of the sidewall gate that leaves a portion of the sidewall gate exposed; and forming a silicide layer on the main gate and the exposed portion of the sidewall gate by performing a silicide process using the silicide block layer as a mask, wherein the silicide layer electrically connects main gate and sidewall gate.