Patent ID: 8432757
Filing Date: 2013-04-30
Classification: G06F,G11C

Abstract:
1. A semiconductor system, comprising: a memory controller configured to detect a slew rate of training data in a training operation mode and determine whether to generate a predetermined command based on a slew rate detection result; and a semiconductor memory device configured to control the slew rate of the training data in response to the predetermined command and output the training data to the memory controller in the training operation mode, wherein the semiconductor memory device comprises: a pattern data generator configured to generate pattern data in the training operation mode; a slew rate control signal generator configured to generate a slew rate control signal that changes in response to the predetermined command in the training operation mode; and an output driver configured to drive the pattern data with a driving force corresponding to the slew rate control signal to generate the training data, wherein the slew rate control signal generator comprises: a command detection signal generation unit configured to generate a command detection signal which is activated whenever the predetermined command is inputted from the memory controller in the training operation mode; and a counting unit configured to determine a value of each bit of the slew rate control signal by counting a toggling number of the command detection signal.