Patent ID: 7061794
Filing Date: 2006-06-13
Classification: G11C

Abstract:
1. A Static Random Access Memory (SRAM) instance, comprising: a plurality of SRAM cells organized in an array having rows and columns, each SRAM cell including a pair of cross-coupled inverters that are coupled to form a pair of data nodes, wherein pull-down devices of said SRAM cells forming a row are coupled together to be biased by a bias potential in standby mode; a row decoder for selectively activating wordlines based on a decoded address, wherein each wordline is operable to drive a corresponding row of said array; and a multiplexer disposed between said row decoder and said array for deactivating said bias potential provided to said SRAM cells of a particular row when said particular row is driven by a wordline associated therewith, wherein said multiplexer includes a plurality of bias switch elements, each corresponding to a wordline, said each bias switch element comprising logic circuitry driven by a corresponding wordline to deactivate said bias potential when said corresponding wordline is driven high.