Patent ID: 9076756
Filing Date: 2015-07-07
Classification: G02F,G09G,H01L

Abstract:
1. A semiconductor device unit including at least a plurality of transistors, a first bootstrap capacitor, and a second bootstrap capacitor, the semiconductor device unit comprising: a first semiconductor device and a second semiconductor device which are aligned along a vertical direction; and a first control signal line, a second control signal line, a first power supply line, and a second power supply line each extending in the vertical direction; wherein the first semiconductor device includes: a first electrode made of a material that is the same as a material of a channel layer of each of the plurality of transistors; a second electrode formed in an upper layer of the first electrode; and a first insulating film provided between the first electrode and the second electrode; the second semiconductor device includes: a third electrode made of a material that is the same as the material of the channel layer of each of the plurality of transistors; a fourth electrode formed in an upper layer of the third electrode; and a second insulating film provided between the third electrode and the fourth electrode; the second electrode and the fourth electrode are each connected to a gate electrode of corresponding ones of the plurality of transistors; the first control signal line and the second control signal line are each supplied with a control signal from outside the semiconductor device unit; the first bootstrap capacitor is formed in a first overlap section where the first electrode, the first insulating film and the second electrode overlap one another; the second bootstrap capacitor is formed in a second overlap section where the third electrode, the second insulating film, and the fourth electrode overlap one another; the first control signal line is formed in an upper layer of the second electrode; a third insulating film is provided between the first control signal line and the second electrode; the second control signal line is formed in an upper layer of the fourth electrode; a fourth insulating film is provided between the second control signal line and the fourth electrode; and the first overlap section covers the first power supply line and the first control signal line in a bottom view, and the second overlap section covers the second power supply line and the second control signal line in the bottom view.