Patent ID: 6862282
Filing Date: 2005-03-01
Classification: H04L

Abstract:
1. A system for processing multiple incoming packets of data and outgoing packets in a multi-processor data processing system, said system comprising: (a) means for inputting each of said incoming data packets in a specific order and means for assigning an ordering pointer to each of said packets of data, said ordering pointers being stored in an ordering buffer; (b) means for processing said incoming packets of data; (c) means for setting a completion flag upon completion of processing of said associated incoming packet, and said completion flag being stored in said ordering buffer with the ordering pointer associated with said incoming packet; (d) means for outputting said processed data packets after said associated completion flags have been set, said means for outputting being responsive to the ordering pointers associated with said incoming data packets so that said specific order of the incoming packets is maintained; wherein said means for inputting each of said incoming data packets in a specific order includes means for assigning a plurality of sequence numbers defining a sequential order, said incoming packets being assigned a sequence number in said sequential order according to the order of input from an incoming queue, and each of said sequence numbers providing an index to the location of the associated ordering pointer in said ordering buffer.