Patent ID: 7714630
Filing Date: 2010-05-11
Classification: H03K

Abstract:
1. An apparatus, comprising: a voltage regulator, said voltage regulator receiving an input voltage and producing a reference voltage; a first path of inverters, said first path of inverters including a first number of inverters, each inverter of said first path of inverters being coupled to said reference voltage, a first inverter of said first path of inverters being coupled to an input; a second path of inverters, said second path of inverters including a second number of inverters, said second number of inverters being greater than said first number of inverters, each inverter of said second path of inverters being coupled to said input voltage, a first inverter of said second path of inverters being coupled to said input; and at least one logic gate receiving an output of said first path of inverters and an output of said second path of inverters to produce an output based upon a value of said input, wherein said apparatus generates a delay that decreases as said input voltage is increased until said input voltage reaches a predetermined voltage, said delay remaining approximately constant when said input voltage is greater than said predetermined voltage.