Patent ID: 6069063
Filing Date: 2000-05-30
Classification: H01L

Abstract:
A method of forming a polysilicon resistor in an integrated circuit comprising:providing a semiconductor substrate;providing field oxide isolation regions overlying said substrate;depositing a polysilicon layer overlying said field oxide regions and said substrate;etching said polysilicon layer where it is not covered by a mask to form a polysilicon resistor;depositing an interlevel dielectric layer overlying said polysilicon resistor;implanting nitrogen ions into said interlevel dielectric layer;annealing said interlevel dielectric layer to form a silicon oxynitride shield layer in said interlevel dielectric layer;etching contact openings through said interlevel dielectric layer to said polysilicon resistor;filling said contact openings with a metal layer;patterning said metal layer;covering said patterned metal layer with a passivation layer wherein said passivation layer contains hydrogen atoms and wherein said silicon oxynitride shield layer prevents hydrogen atoms from penetrating said polysilicon resistor; andcompleting said integrated circuit.