Patent ID: 8223768
Filing Date: 2012-07-17
Classification: H04L

Abstract:
1. An apparatus for enabling a first set of network elements (NEs) communicating at a bit rate R 1 and a second set of NEs communicating at a bit rate R 2 that is faster than the bit rate R 1 to communicate, the apparatus comprising: (a) a first number M×K of first transceivers communicating at the bit rate R (b) a second number N×K of second transceivers communicating at the bit rate R (c) wherein M, N, and K are each positive integers, M>N, M/N is not an integer, and the ratio R (d) wherein the M×K first transceivers and the N×K second transceivers are connected by a set of lanes, each lane communicating at a bit rate R (e) wherein, for each of the N×K second transceivers, at least one of the lanes communicates with one of the M×K first transceivers and at least another one of the lanes communicates with another one of the M×K first transceivers; and (f) wherein, for at least one but not all of the M×K first transceivers, at least one of the lanes communicates with one of the N×K second transceivers and at least another one of the lanes communicates with another one of the N×K second transceivers.