Patent ID: 6172405
Filing Date: 2001-01-09
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate;a well region of a first conductivity type formed in the semiconductor substrate;a well region of a second conductivity type formed in the semiconductor substrate and on the well region of the first conductivity type;a trench isolation region for electrically separating the well region of the second conductivity type from an adjacent well region of the second conductivity type;a source region and a drain region of the first conductivity type formed in a surface layer of the well region of the second conductivity type;a channel region formed between the source region and the drain region;a gate insulating film formed on the channel region; anda gate electrode formed on the gate insulating film, being electrically connected to the well region of the second conductivity type,wherein the product .tau., i.e., CR, of an electrical resistance R of the well region of the second conductivity type and the sum C of junction capacitances between the well region of the second conductivity type and the source region and between the well region of the second conductivity type and the drain region, a junction capacitance between the well region of the second conductivity type and the well region of the first conductivity type and an electrostatic capacitance between the well region of the second conductivity type and an inversion layer formed in the channel region is 5.times.10.sup.-11 seconds or less.