Patent ID: 7081737
Filing Date: 2006-07-25
Classification: H01M,H02J,Y02E

Abstract:
1. A balancing circuit comprising: an analog to digital converter (ADC) configured to accept an analog voltage signal from each of a plurality of battery cells of a battery pack and convert each said analog voltage signal to a digital signal representative of a voltage level of each said battery cell; a processor configured to receive each said digital signal and to provide a balance signal if at least two of said digital signals are representative of a voltage difference between a first voltage level of a first battery cell and a second voltage level of a second battery cell greater than a battery cell balance threshold; a switch network coupled between said battery pack and said ADC, said processor controlling said switch network to enable said ADC to directly sample said analog voltage signal from each of said plurality of battery cells; and a bleeding network circuit configured to accept said balance signal and provide a bleeding current to one of said plurality of battery cells in response to said balance signal wherein said bleeding network circuit provides a first bleeding current to said second battery cell if said second voltage level of said second battery cell is greater than said first voltage level of said first battery cell, said bleeding network circuit applying said first bleeding current for a first time interval to reduce said second voltage level to a level substantially equal to said first voltage level.