Patent ID: 7504282
Filing Date: 2009-03-17
Classification: H01L,H05K

Abstract:
1. A method of manufacturing a substrate for packaging ICs, comprising: providing a laminated circuit board having a top surface and a bottom surface opposite to the top surface, wherein the laminated circuit board has at least a through hole; forming a metal layer on the laminated circuit board, wherein the metal layer comprises a first metal layer located on the top surface, a second metal layer located on the bottom surface, and a third metal layer located in the through hole, wherein the first metal layer, the second metal layer and the third metal layer electrically connect to one another; performing a microetching step, so that the first metal layer is patterned to form a first circuit pattern and a first pad, and the second metal layer is patterned to form a second circuit pattern and a second pad; forming a conductive layer located on the bottom surface, wherein the conductive layer electrically connects the second circuit pattern and the second pad; forming an electroplating resist pattern on the laminated circuit board to expose the first pad located on the top surface and the second pad located on the bottom surface; performing an electroplating step, for forming a protective layer on the first pad and the second pad; removing the electroplating resist pattern; and performing a microetching step for removing the conductive layer.