Patent ID: 7981790
Filing Date: 2011-07-19
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device, the semiconductor device comprising: a first interlayer insulation film; a first copper wiring formed in the first interlayer insulation film; a first insulation film formed on the first interlayer insulation film and the first copper wiring; a second interlayer insulation film formed on the first insulation film, the second interlayer insulation film having a first via hole and a first trench, a bottom of the first via hole exposing an upper surface of the first copper wiring, a top of the first via hole connecting to a bottom of the first trench; a second copper wiring formed in the first via hole and the first trench; a second insulation film formed on the second copper wiring and the second interlayer insulation film; and a third insulation film formed between the second interlayer insulation film and the second insulation film, the third insulation film connecting to the second interlayer insulation film, the third insulation film connecting to the second insulation film, the manufacturing method of the semiconductor device comprising: forming the first interlayer insulation film, the first copper wiring; forming the first insulation film; forming the second interlayer insulation film by using CVD; forming the third insulation film on the second interlayer insulation film by using CVD; forming the second copper wiring; and forming the second insulation film on the third insulation film and the second copper wiring, wherein each of the second interlayer insulation film and the third insulation film comprises a borazine based compound, and wherein the third insulation film layer is smaller in carbon content than the second interlayer insulation film.