Patent ID: 8990480
Filing Date: 2015-03-24
Classification: G06F

Abstract:
1. A semiconductor memory device comprising: a semiconductor memory chip configured to store therein a plurality of pieces of data, the semiconductor memory chip being a chip in which data is written and from which data is read in units of a page that is a storage area having a predetermined size, and from which data is erased in units of a block including a plurality of pages; a discarding unit configured to, after a piece of the plurality of pieces of the data is written in the semiconductor memory chip with a logic address being designated, discard at least a portion of valid data, which is the last data written in the same logic address, from among the plurality of pieces of data; a compaction unit configured to write, in a second block, the valid data excluding the data discarded by the discarding unit from among the valid data stored in a first block and to erase the first block; and a controller configured to output, in response to a request for reading the discarded data, a response indicating that the discarded data is unable to be read, wherein in the case where all the valid data included in a given block are discarded, the discarding unit erases the given block.