Patent ID: 7977019
Filing Date: 2011-07-12
Classification: G03F

Abstract:
1. A semiconductor device manufacturing method comprising: heating a plurality of first substrates separately by a plurality of heat treatment plates, said plurality of first substrates each having on its surface a layer of first resist which is formed by exposure in a predetermined pattern; performing a primary correction of a preset temperature for each of the plurality of heat treatment plates after said heating said plurality of first substrates; heating a plurality of second substrates separately by said plurality of heat treatment plates at said preset temperature corrected by said primary correction, said plurality of second substrates each having a layer of second resist which is formed by exposure in said predetermined pattern on a surface of a layer of resist having the same composition as a composition of said first resist; and performing a secondary correction of a preset temperature for each of said plurality of heat treatment plates after said heating said plurality of second substrate, wherein said primary correction is executed based on measured dimensions of a pattern of said first resist which is obtained by developing each of said plurality of first substrates after said heating said plurality of first substrates, and wherein said secondary correction is executed based on measured dimensions of an etching pattern which is obtained by developing and etching each of said plurality of second substrates after said heating said plurality of second substrates.