Patent ID: 7067376
Filing Date: 2006-06-27
Classification: H01L

Abstract:
1. A method of forming a power MOSFET comprising the steps of: providing a substrate of a first conductivity type; depositing an epitaxial layer on the substrate, said epitaxial layer having a first conductivity type; forming first and second body regions in the epitaxial layer to define a drift region therebetween, said body regions having a second conductivity type; forming first and second source regions of the first conductivity type in the first and second body regions, respectively; and forming a plurality of trenches in said drift region of the epitaxial layer; epitaxially depositing in said trenches a material having a dopant of the second conductivity type, said trenches extending toward the substrate from the first and second body regions; and diffusing at least a portion of said dopant from said trenches into portions of the epitaxial layer adjacent the trenches; said epitaxially deposited material filling the trench includes silicon; and further comprising the step of forming a layer of dielectric on the epitaxially deposited material filling the trench.