Patent ID: 7345519
Filing Date: 2008-03-18
Classification: G01R,H03K

Abstract:
1. A flip-flop circuit, comprising: an input section including a plurality of transistors for receiving first logic information including a clock signal, a first data signal, a second data signal and an input selection signal to output second logic information based on the first logic information; a control section for producing a control signal being dependent at least on the clock signal; and an output section for outputting a signal based on the second logic information, wherein: the second logic information is transmitted from the input section to the output section via a first node; the input section outputs, to the first node, the second logic information as a signal of a second logic level when the clock signal is at a first logic level, and outputs, to the first node, a signal determined based on the first logic information and the control signal when the clock signal transitions from the first logic level to the second logic level; in the input section, the first data signal is input to a gate terminal of a first transistor included in a first path, along which a current flows when the first node transitions from the second logic level to the first logic level; and in the input section, an output signal of a first logic gate, which receives at least the control signal and the second data signal, is input to a gate terminal of a second transistor included in a second path, along which a current flows when the first node transitions from the second logic level to the first logic level, the second path does not include the first transistor.