Patent ID: 7528423
Filing Date: 2009-05-05
Classification: H01L

Abstract:
1. A semiconductor device comprising: a substrate on which a first group III nitride semiconductor layer serving as an operation layer is formed; a second group III nitride semiconductor layer composed of a single layer or a plurality of layers and contains aluminum, which is formed on said first group III nitride semiconductor layer and functions as a barrier layer; a first electrode which is formed on said second group III nitride semiconductor layer and functions as a source; a second electrode which is formed on said second group III nitride semiconductor layer and functions as a drain; a third group III nitride semiconductor layer which is formed on said second group III nitride semiconductor layer between said first electrode and said second electrode and contains aluminum so that an aluminum composition ratio thereof may be lower than that of said second group III nitride semiconductor layer, wherein said third group III nitride semiconductor layer is formed apart from said first electrode and said second electrode; and a third electrode which is formed on said third group III nitride semiconductor layer and controls a current flowing between said first electrode and said second electrode, wherein said second group III nitride semiconductor layer has a thickness and an aluminum composition ratio that are controlled so that, in the state where a voltage is not applied to said third electrode with respect to said first electrode, an energy at the bottom of a conduction band on a surface of said first group III nitride semiconductor layer directly under said third electrode may be higher than a Fermi energy in the location.