Patent ID: 8949062
Filing Date: 2015-02-03
Classification: G01R

Abstract:
1. A test module comprising: a specified pattern detecting section that detects a specified pattern output in response to a specified test pattern from a device under test outputting output patterns in response to test patterns; a timing detecting section that detects a timing at which the specified pattern is detected; and a phase adjusting section that adjusts phases of the output patterns to match phases of expected value patterns, which are expected from the device under test as responses to the test patterns, based on the timing detected by the timing detecting section wherein the specified pattern detecting section includes: a match detecting section that detects a match between data of the output patterns and the specified pattern for each detection cycle; and a result storage section that sequentially stores detection results of the match detecting section for each detection cycle, and the timing detecting section detects, in the detection result of each detection cycle stored in the result storage section, a timing at which the specified pattern is detected based on a bit position of the result storage section for which the detection result indicates a match.