Patent ID: 8943115
Filing Date: 2015-01-27
Classification: G06F,H03M

Abstract:
1. A method for determining, from among four values represented by four signals input to a circuit, where a first two of said four values have been compared to determine a first minimum and a first maximum and a second two of said four values have been compared to determine a second minimum and a second maximum, which of said four values is a minimum value and which of said four values is a next-to-minimum value, said method comprising: comparing bitwise, in a first cascade of first bitwise comparators of said circuit, a signal representing said first minimum to a signal representing said second minimum, from most-significant bit to least-significant bit, each bitwise comparison of said signal representing said first minimum to said signal representing said second minimum providing a bit of a signal representing said minimum value and a respective bit of a bitwise selection signal; comparing bitwise, in a second cascade of second bitwise comparators of said circuit, a signal representing said first maximum to said signal representing said second minimum, from most-significant bit to least-significant bit, each bitwise comparison of said signal representing said first maximum to said signal representing said second minimum providing a first respective candidate bit of a signal representing said next-to-minimum value; comparing bitwise, in a third cascade of third bitwise comparators of said circuit, a signal representing said second maximum to said signal representing said first minimum, from most-significant bit to least-significant bit, each bitwise comparison of said signal representing said second maximum to said signal representing said first minimum providing a second respective candidate bit of said signal representing said next-to-minimum value; and selecting between said first and second respective candidate bits of said signal representing said next-to-minimum value in a set of respective multiplexers, each selection under control of said respective bit of said bitwise selection signal.