Patent ID: 6127724
Filing Date: 2000-10-03
Classification: H01L

Abstract:
A semiconductor chip assembly comprising:(a) a dielectric element having top and bottom surfaces;(b) a semiconductor chip having a front surface with contacts thereon, a rear surface and edges extending between said front and rear surfaces, said chip being disposed above said top surface of said dielectric element with said rear surface facing downwardly towards said dielectric element and said front surface facing upwardly away from said dielectric element so that there is a space between said rear surface of said chip and said top surface of said dielectric element;(c) a plurality of thermally conductive elements having thermal conductivity of at least about 1.0 W/cm-.degree. K extending between said top surface of said dielectric element and said rear surface of said chip;(d) a plurality of terminals on the bottom surface of said dielectric element; and(e) means for electrically connecting said contacts of said chip to said terminals on the bottom surface of said dielectric element, whereby, when said terminals are connected to a contacts on a substrate, said terminals and said electrical connecting means cooperatively connect said contacts of said chip to the contacts on the substrate, whereas said thermally conductive elements, said dielectric element and said terminals cooperatively provide a thermal conduction path from said rear face of said chip to the substrate.