Patent ID: 6052751
Filing Date: 2000-04-18
Classification: G06F,G11C,H04L,H04Q

Abstract:
A scalable multiport switch that receives and transmits data through a plurality of ports, the switch comprising:a plurality of internal buses;an external memory interface coupled to the internal buses and having an external memory port for coupling the external memory interface to an external memory; anda slot manager that manages access to an external memory through the internal buses and the external memory interface, the slot manager scheduling access in a series of time slots, with each slot consisting of m clock cycles to transfer n bytes of data, wherein the slot manager is operable at a selectable one of multiple frequencies, the operating frequency of the slot manager being selected to match an operating frequency of the external memory, the slot manager increasing the number of slots per given period of time with increasing operating frequency of the slot manager and maintaining the number of clock cycles per slot constant.