Patent ID: 6512261
Filing Date: 2003-01-28
Classification: H01L,Y10S

Abstract:
A method of producing a semiconductor memory having a memory cell structure in which a storage node, which consists of a capacitor electrode film having a rugged surface formed inside holes of an interlayer insulating film that is deposited on a substrate, constitutes a capacitor together with a cell plate through a dielectric film, said method comprising steps of:forming holes in said interlayer insulating film in the direction of its thickness, forming said capacitor electrode inside said holes and over the upper surface of said interlayer insulating film, removing the capacitor electrode film exposed to the upper surface of said interlayer insulating film, making the surface of said capacitor electrode film formed inside said holes a rugged surface, and forming a cell plate inside said holes and on the upper surface of said interlayer insulating film, wherein said step of removing the capacitor electrode film exposed to the upper surface of the interlayer insulating film is performed before said step of making the surface of the capacitor electrode film formed inside the holes a rugged surface.