Patent ID: 9105490
Filing Date: 2015-08-11
Classification: H01L

Abstract:
1. A contact structure for a semiconductor device comprising: a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate, the strained material having a topmost surface and a bottommost surface and being of substantially uniform composition from the topmost surface to the bottommost surface; an inter-layer dielectric (ILD) layer having an opening over the strained material, wherein the opening comprises dielectric sidewalls and a bottom comprising the topmost surface of the strained material; a metal oxide layer coating the sidewalls and bottom of the opening, wherein the metal oxide layer has a thickness ranging from 1 nm to 10 nm; and a metal layer filling a coated opening of the metal oxide layer.