Patent ID: 6255845
Filing Date: 2001-07-03
Classification: H03K

Abstract:
A spare gate cell formed on an integrated circuit chip, for use in modification of functionality of a pre-defined logic circuit formed on the integrated circuit chip, the spare gate cell comprising:a configurable building block circuit having at least two input leads and an output lead, the configurable building block circuit being capable of selectively performing a plurality of possible logic functions on signals appearing on the input leads to produce a logic signal on the output lead, selection of a function from the plurality of possible logic functions depending on connections of the input leads of the configurable building block circuit;an inverter having an input and an inverted signal output; anda multi-layer interconnection structure comprising a plurality of layers of metal formed on the integrated circuit chip,wherein the input leads of the configurable building block circuit and the input of the inverter all have accessible appearances at a top-most one of the layers of metal of the interconnection structure.