Patent ID: 7842954
Filing Date: 2010-11-30
Classification: H01L

Abstract:
1. An active matrix array structure, disposed on a substrate, the active matrix array structure comprising: a first patterned conductive layer, configured on the substrate, wherein the first patterned conductive layer comprises a plurality of scan lines, a plurality of gates and a plurality of scan contact pads that are connected with the plurality of the scan lines; a patterned gate insulating layer, comprising a plurality of first openings that expose a portion of the first patterned conductive layer; a patterned semiconductor layer, disposed on the patterned gate insulating layer; a second patterned conductive layer, directly disposed on the patterned semiconductor layer, and the second patterned conductor layer comprising a plurality of data lines, a plurality of drain electrodes, a plurality of source electrodes and a plurality of data contact pads that are connected with the plurality of data lines, wherein the data lines and the scan lines intersect, and the drain electrodes and the source electrodes are configured above the gates; a patterned overcoat layer, wherein the patterned overcoat layer comprises a plurality of second openings, wherein the plurality of the second openings configured above the first openings expose the portion of the first patterned conductive layer exposed by the first openings, and a portion of the plurality of the second openings exposes a portion of the second patterned conductive layer; and a transparent conductive layer, globally disposed on the substrate, wherein a portion of the transparent conductive layer disposed in the first openings and the second openings is broken off at a position that is in between the substrate and the patterned overcoat layer.