Patent ID: 8531357
Filing Date: 2013-09-10
Classification: G09G,H01J

Abstract:
1. A plasma display device comprising: a plasma display panel including a panel driving circuit for driving the plasma display panel while a plurality of subfields are temporally disposed to form one field period, each of the plurality of subfields having an initializing period for causing an initializing discharge, an address period for causing an address discharge, and a sustain period for causing a sustain discharge in the discharge cells, wherein the protective layer has: wherein while the panel driving circuit performs the all-cell initializing operation, a gradually increasing ramp waveform voltage is applied to the scan electrode, and then a gradually decreasing ramp waveform voltage is applied to the scan electrode, wherein while the panel driving circuit performs the selective initializing operation, a gradually decreasing ramp waveform voltage is applied to the scan electrode, wherein the plasma display panel has a property, as measured when an address operation is carried out only in the fifth sub-field and the number of sustain pulses in the subsequent sustain period is varied from 2 to 256, that a discharge delay time related to a sub-field increases as the number of sustain pulses in the sub-field increases, and wherein a discharge delay time of an address discharge related to a sub-field increases as an elapsed time since an all-cell initializing operation is performed in the sub-filed increases.