Patent ID: 6330178
Filing Date: 2001-12-11
Classification: G11C

Abstract:
A ferroelectric memory device comprising:first and second memory cells each including a ferroelectric capacitor with an insulating film of ferroelectric material and including a transistor connected to one of electrodes of the ferroelectric capacitor;first and second data lines connected to said corresponding first and second memory cells;a first precharge circuit for connecting said first data line to a first precharge potential;a second precharge circuit for connecting said second data line to a second precharge potential;a first sense amplifier including two P-channel MOS transistors cross-coupled for detecting data from said first memory cell on said first data line;a second sense amplifier including two N-channel MOS transistors cross-coupled for detecting data from said second memory cell on said second data line;a first driving line for driving said first sense amplifier;a second driving line for driving said second sense amplifier; anda switch circuit connected between said first and second driving lines,wherein said switch circuit makes a current path between said first and second driving lines after potentials are supplied to said first and second driving lines to put said first and second sense amplifiers in their non-driving state, respectively, and then the supply is stopped, andwherein in a same predetermined period, the first data line is precharged to the first precharge potential and the second data line is precharged to the second precharge potential; and further comprisinga third sense amplifier including two N-channel MOS transistors cross-coupled for detecting data from said first memory cell on said first data line; anda fourth sense amplifier including two P-channel MOS transistors cross-coupled for detecting data from said second memory cell on said second data line,wherein said first and third sense amplifiers are mutually coupled to form a first CMOS sense amplifier, andwherein said second and fourth sense amplifiers are mutually coupled to form a second CMOS sense amplifier.