Patent ID: 9117820
Filing Date: 2015-08-25
Classification: H01L

Abstract:
1. A conductive line of a semiconductor device, comprising: a conductive layer disposed on a semiconductor substrate to serve as an interconnect or an input/output pad, wherein a thickness of the conductive layer is between 30000 angstroms (Å) and 90000 angstrom (Å), and at least a side of the conductive layer has at least two different values of curvature, and a width of a top of the conductive layer is smaller than a width of a bottom of the conductive layer, wherein the side further comprises at least an upper side and at least a lower side, the upper side is disposed on the lower side, the upper side comprises a concave-curved side, and the lower side comprises a vertical side; and a dielectric layer disposed on the conductive layer, wherein the dielectric layer surrounds and covers the conductive layer.