Patent ID: 8330164
Filing Date: 2012-12-11
Classification: G02F,H01L

Abstract:
1. A thin film transistor array panel comprising: a substrate; a gate line disposed on the substrate; a data line intersecting the gate line; a drain electrode separated from the data line; a first insulating layer covering the data line; a color filter disposed on the first insulating layer; a second insulating layer disposed on the color filter and having a contact hole exposing the drain electrode and the color filter; and a pixel electrode disposed on the second insulating layer and connected to the drain electrode through the contact hole, wherein the contact hole partially exposes the color filter near the portion where the drain electrode and the pixel electrode are connected to each other, and the pixel electrode contacts an upper surface and a first sidewall of the color filter exposed through the contact hole and wherein the second insulating layer covers a second sidewall of the color filter in the contact hole.