Patent ID: 6690222
Filing Date: 2004-02-10
Classification: H03K

Abstract:
Multiple voltage environment input pad with a circuit input, comprising: a level shifter circuit and a buffer circuit, wherein the level shifter circuit includes a level shifter circuit input connected to the circuit input and a level shifter circuit output, wherein the buffer circuit includes an inverter comprising at least two transistors of opposite types, with an input, connected to the level shifter circuit output, and an output, twin controllable voltage dividers of opposite types, each with at least two controllable voltage divider inputs and a controllable voltage divider output, wherein for each of the controllable voltage dividers one of the inputs is connected to the level shifter circuit output and another one of the inputs is connected to the inverter output, and wherein for each of the controllable voltage dividers the voltage divider output is connected to a current input connection of a transistor of corresponding type of the inverter, an input pad output being connected to the inverter output, wherein the level shifter circuit including a series pass transistor, and wherein a transistorized capacitor is connected in parallel to the series pass transistor.