Patent ID: 9135214
Filing Date: 2015-09-15
Classification: G06F

Abstract:
1. A method, comprising: receiving a first matrix of elements to be processed by a parallel processing architecture including a plurality of processors each capable of processing a plurality of threads, wherein the first matrix encodes a connectivity of mesh vertices; partitioning the first matrix into a first partition and a second partition, such that the first partition contains a first group of the elements corresponding to a first group of the mesh vertices, and the second partition contains a second group of the elements corresponding to a second group of the mesh vertices; reordering the first matrix to generate a second matrix having the same elements as the first matrix for localizing subsequent memory accesses; defining a first portion of the second matrix as an area within at least one of the first partition of the first matrix and the second partition of the first matrix; defining a second portion of the second matrix as an area outside of both the first partition of the first matrix and the second partition of the first matrix; processing, by a first set of the plurality of threads, the first portion of the second matrix utilizing a first memory; and processing, by a second set of the plurality of threads, the second portion of the second matrix utilizing a second memory.