Patent ID: 9015394
Filing Date: 2015-04-21
Classification: G06F,H03M

Abstract:
1. A method of chip select (‘CS’) multiplication in a Serial Peripheral Interface (‘SPI’) system, the SPI system comprising an SPI master, a CS multiplier, a plurality of SPI slaves, and a fall time detection circuit, the SPI master coupled to the CS multiplier and the fall time detection circuit by a CS signal line, the CS multiplier comprising a plurality of CS outputs, each CS output coupled to an SPI slave, the CS multiplier configured to provide a CS signal on only one CS output at a time, the method comprising: monitoring, by the fall time detection circuit, a voltage of a CS signal on the CS signal line, the voltage alternating between a logic high voltage and a logic low voltage, including: if the fall time of the CS signal is less than a predefined threshold, configuring, by the fall-time detection circuit, the CS multiplier to vary from providing a CS signal on a first CS output to providing a CS signal on a second CS output.