Patent ID: 9190323
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A copper interconnect fabricated on an FEOL processed substrate, the copper interconnect comprising: a first copper layer comprising a copper line and a copper via, wherein the copper line is formed on the FEOL processed substrate, wherein the copper via extends upward from the copper line and has a top surface and side surfaces, and wherein the copper via and a portion of the copper line are formed from a single crystal; a barrier layer on the copper line and the side surfaces of the via; a dielectric material overlying the FEOL processed substrate and the barrier layer on the copper line, and surrounding the barrier layer on the copper via; a manganese silicate interlayer material overlying the dielectric material; a metallic manganese cap portion on the copper via; and a second copper layer formed from copper overlying the cap portion and the interlayer material.