Patent ID: 8698128
Filing Date: 2014-04-15
Classification: B82Y,H01L

Abstract:
1. A non-planar semiconductor device comprising: at least one semiconductor nanowire suspended above a semiconductor oxide layer that is present on a first single crystalline semiconductor material portion of a bulk semiconductor substrate, wherein an end segment of said at least one suspended semiconductor nanowire is attached to a first semiconductor pad region and another end segment of said at least one suspended semiconductor nanowire is attached to a second semiconductor pad region, wherein an entirety of a bottommost surface of each of said first and second semiconductor pad regions is in direct physical contact with a second single crystalline semiconductor material portion of the bulk semiconductor substrate, said second single crystalline semiconductor material portion of the bulk semiconductor substrate is vertically offset and located above said first single crystalline semiconductor material portion of the bulk semiconductor substrate; a gate surrounding a central portion of said at least one suspended semiconductor nanowire; a source region located on a first side of the gate; and a drain region located on a second side of the gate which is opposite said first side of the gate.