Patent ID: 7289145
Filing Date: 2007-10-30
Classification: H04N

Abstract:
1. A correlated double sampler and variable gain amplifier (CDSVGA) circuit for receiving CCD data, comprising: a first fixed capacitor for receiving CCD data; a first amplifier connected to said first fixed capacitor for amplifying CCD data, said first amplifier connected to said first fixed capacitor; a first variable capacitor connected in parallel with said first amplifier; a first switch connected in parallel with said first variable capacitor, said first switch being clocked at a first clock phase; a second variable capacitor connected to said first amplifier; a second amplifier connected to said second variable capacitor; a second fixed capacitor connected in parallel with said second amplifier; and a second switch connected in parallel with said second fixed amplifier; said second switch being clocked at a second clock phase; and wherein a total gain of the CDSVGA circuit is a product of a divided value derived from a value of the first fixed capacitor divided by a value of the second fixed capacitor and another divided value derived from a value of the second variable capacitor divided by a value of the first variable capacitor.