Patent ID: 7689946
Filing Date: 2010-03-30
Classification: G06F

Abstract:
1. A method comprising: selecting a reference design for a field effect transistor, said field effect transistor including a source, a drain, a channel between said source and drain, a gate electrode over said channel, one or more source contacts to said source and one or more drain contacts to said drain, each of said one or more source contacts spaced a first distance from said gate electrode and each of said one or more drain contacts spaced a second distance from said gate electrode; adjusting said first distance and said second distance to maximize a performance parameter of said field effect transistor to create a fast design for said field effect transistor; displaying said fast design on a display device of a computer system; and wherein said performance parameter is a power cut-off frequency of said field effect transistor or a current cut-off frequency of said field effect transistor.