Patent ID: 6130572
Filing Date: 2000-10-10
Classification: H02M

Abstract:
Negative charge pump circuit comprising:a plurality of charge pump stages connected in series to each other, each stage having a stage input terminal and a stage output terminal, said plurality of stages comprising a first stage having the respective stage input terminal connected to a reference voltage, a final stage having the respective stage output terminal operatively connected to an output terminal of the charge pump at which a negative voltage is developed, and a plurality of intermediate stages each having the respective stage input terminal connected to the stage output terminal of a preceding stage and the respective stage output terminal connected to the stage input terminal of a following stage, wherein each charge pump stage includes:a first N-channel MOSFET with a first electrode connected to the stage input terminal and a second electrode connected to the stage output terminal;a second N-channel MOSFET with a first electrode connected to the stage output terminal and a second electrode connected to a gate electrode of the first N-channel MOSFET;a boost capacitor with one terminal connected to the gate electrode of the first N-channel MOSFET and a second terminal driven by a respective first digital signal switching between the reference voltage and a positive voltage supply;a second capacitor with one terminal connected to the charge pump stage output terminal and a second terminal connected to a respective second digital signal switching between the reference voltage and the voltage supply and substantially in phase opposition to the first digital signal;a gate electrode of the second N-channel MOSFET being connected, in the first stage, to a third digital signal switching between the reference voltage and the voltage supply; anda gate electrode of the second N-channel MOSFET in all the stages other than said first stage being connected to the stage input terminal.