Patent ID: 8815702
Filing Date: 2014-08-26
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming an active region including a sacrificial layer pattern and an active layer pattern on the sacrificial layer pattern on a semiconductor substrate; forming a recessed isolation layer that exposes the sacrificial layer pattern; forming a support structure coupled to the sacrificial layer pattern extending from the recessed isolation layer; forming a gate electrode pattern on the active region; forming a void under the active region by removing the sacrificial layer pattern; filling the formed void with a gap-filling insulation layer to define an SOI device region on the semiconductor substrate; and forming a gate insulation layer on a top surface of the active layer pattern and on sidewalls of the active layer pattern, wherein forming the active region comprises forming a fin-shaped active region protruding from the semiconductor substrate, wherein forming the support structure comprises forming the gate electrode pattern extending from the recessed isolation layer and coupled to sidewalls of the sacrificial layer pattern, and wherein the gate electrode pattern extends along the top surface and sidewalls of the gate insulation layer.