Patent ID: 9082948
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure, comprising: depositing a first substrate layer over a surface of a first semiconductor layer using a process at a temperature of about 900° C. or less and establishing an ohmic contact between the first substrate layer and the first semiconductor layer; thermally spraying a second substrate layer on a side of the first substrate layer opposite the first semiconductor layer and establishing an ohmic contact between the second substrate layer and the first semiconductor layer through the first substrate layer; epitaxially growing at least one additional semiconductor layer over the first semiconductor layer on a side thereof opposite the first substrate layer; and formulating at least one of the first substrate layer and the second substrate layer to exhibit a Coefficient of Thermal Expansion (CTE) closely matching a CTE of at least one of the first semiconductor layer and the at least one additional semiconductor layer.