Patent ID: 8325124
Filing Date: 2012-12-04
Classification: G09G

Abstract:
1. A display panel comprising: a display unit coupled to a data line and a first scan line, wherein the display unit comprises: a liquid crystal capacitor coupled between a pixel electrode and a first common line; and a first storage capacitor coupled between the pixel electrode and a second common line; and a control unit coupled to the second common line and comprising: a first transistor having a control terminal coupled to the first scan line, an input terminal receiving a first common voltage, and an output terminal coupled to the second common line; a second transistor having a control terminal receiving a first control voltage signal, an input terminal receiving the first common voltage, and an output terminal coupled to a first node; a third transistor having a control terminal coupled to a second scan line, an input terminal receiving a second common voltage, and an output terminal coupled to the second common line; a fourth transistor having a control terminal receiving a second control voltage signal, an input terminal receiving the second common voltage, and an output terminal coupled to the first node; and a second storage capacitor coupled between the first node and the second common line, wherein the first scan line is asserted from a first time point to a second time point; wherein the second scan line is asserted from a third time point to a fourth time point, and the third time point is between the second time point and the fourth time point; and wherein the first control voltage signal and the second control voltage signal are continuously asserted from the first time point to the fourth time point.