Patent ID: 8365156
Filing Date: 2013-01-29
Classification: G06F

Abstract:
1. A process of managing changes involving a base class of a software product, the process utilizing at least one device which has at least one logical processor in operable communication with at least one memory, the process comprising the steps in memory of: obtaining an initial source code A for a module A, including an initial base class A declared in the initial source code A; obtaining a source code B for a module B which includes a dependency on initial base class A; generating an initial intermediate language code A by compiling the initial source code A; generating an initial intermediate language code B by compiling the source code B; preparing an initial executable code A by binding the initial intermediate language code A; preparing an initial executable code B by binding the initial intermediate language code B; obtaining a revised source code A for a revised base class A in module A which differs from initial base class A in at least one of the following ways: a field has been added, a private field has been removed, field order has been rearranged, a virtual method has been added, virtual method order has been rearranged; generating a revised intermediate language code A by compiling the revised source code A; preparing a revised executable code A by binding the revised intermediate language code A; and preparing a revised executable code B by rebinding the initial intermediate language code B while referencing the revised intermediate language code A, thus avoiding recompilation of source code B; and executing revised executable code A with revised executable code B free from any field offset collision and free from any virtual method slot assignment collision during execution of revised base class A; the process further characterized in that the revised intermediate language code A and the revised executable code A are consistent with a structural correspondence in that each register allocation in the revised intermediate language code A has an identical register allocation in the revised executable code A, and the revised intermediate language code A and the revised executable code A are further consistent with the structural correspondence in at least two of the following ways: pseudo instructions in the revised intermediate language code A for accessing objects include symbolic field references which correspond to machine instructions using numeric field offsets in the revised executable code A; pseudo instructions in the revised intermediate language code A for calling virtual methods include symbolic slot references which correspond to machine instructions using numeric virtual method table slots in the revised executable code A; a pseudo instruction in the revised intermediate language code A for copying a structure whose size is unspecified in the revised intermediate language code A corresponds to machine instructions in the revised executable code A that are consistent with a specific structure size; a pseudo instruction in the revised intermediate language code A for zero-initializing a structure whose size is unspecified in the revised intermediate language code A corresponds to machine instructions in the revised executable code A that are consistent with a specific structure size; a pseudo instruction in the revised intermediate language code A for declaring in a routine a local variable whose type is specified symbolically in the revised intermediate language code A corresponds to machine instructions in the revised executable code A that are consistent with at least one specific local variable size of at least one local variable declared symbolically in the routine.