Patent ID: 6218699
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A semiconductor component, comprising:a semiconductor substrate of a first conductivity type;a first doped zone of a second conductivity type disposed in said semiconductor substrate, said first doped zone having a surface, a peripheral region, and a terminal;a channel zone of the first conductivity type disposed in said semiconductor substrate adjacent said first doped zone, said channel zone having a surface and a terminal, said terminal having a highly doped zone of said first conductivity type in said semiconductor substrate;a tunnel dielectric partly covering said surface of said first doped zone, said tunnel dielectric having a thickness;a gate dielectric covering said surface of said channel zone and having a thickness;a dielectric disposed on said peripheral region of said first doped zone and being formed at least in part by said gate dielectric, said dielectric disposed on said peripheral region having a layer thickness greater than said thickness of said tunnel dielectric;a tunnel gate electrode on said tunnel dielectric; anda channel gate electrode on said gate dielectric;wherein said first doped zone is to be connected to a first potential and said channel zone is to be connected to a second potential, such that a current flows within said first doped zone and said channel zone, said current within said first doped zone and said channel zone being amplified relative to a current flowing through said tunnel dielectric by a given amplification factor, and wherein said given amplification factor is adjustable by a parameter selected from the group consisting of said thickness of said tunnel dielectric, said thickness of said gate dielectric, a dopant concentration of said first doped zone, a dopant concentration of said channel zone, and a size of said peripheral region.