Patent ID: 6828860
Filing Date: 2004-12-07
Classification: H03F,H03G,H03H

Abstract:
A circuit for providing a programmable gain comprising:a first programmable gain amplifier (PGA) comprising: an input that receives an input signal to be amplified; a first plurality of impedances coupled to divide the input signal into a plurality of voltage levels; a plurality of amplifier circuits coupled to receive the plurality of voltagelevels; and a plurality of switches that disconnect each of the amplifier circuits from a power supply, thereby deactivating each amplifier; and a second PGA configured to receive a voltage level from the first PGA, the second PGA comprising: a second plurality of impedances coupled to divide the voltage level from the first PGA into a plurality of voltage levels; and a second plurality of switches that couple said plurality of voltages into a buffer amplifier circuit.