Patent ID: 7838404
Filing Date: 2010-11-23
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory fabrication method, comprising: forming a first insulating film and a floating gate electrode material on a semiconductor substrate; forming a gate insulating film and a floating gate electrode by etching the first insulating film and the floating gate electrode material, respectively, and forming a groove for an element isolation region by etching the semiconductor substrate; forming an element region and the element isolation region by burying a second insulating film in the groove and planarizing the second insulating film; removing a portion of an upper surface of the second insulating film in the element isolation region to expose an upper surface and a portion of a side surface of the floating gate electrode, and processing a portion from the exposed upper surface to the exposed side surface of the floating gate electrode such that the portion has one of a tapered shape having an inclination angle to a direction perpendicular to a surface of the semiconductor substrate, and a round-arched shape; forming an inter gate insulating film on the exposed upper surface and the exposed side surface of the floating gate electrode; depositing a control gate electrode material on the inter gate insulating film; and forming a stacked gate structure by etching the control gate electrode material, the control gate electrode, the inter gate insulating film, and the floating gate electrode.