Patent ID: 7923328
Filing Date: 2011-04-12
Classification: B82Y,H01L

Abstract:
1. A method of forming a non-volatile memory cell comprising: forming a polysilicon layer overlying a first insulating layer formed over a substrate; etching the polysilicon layer to form a select gate structure formed overlying the first insulating layer, wherein the select gate structure has at least one concave sidewall; forming a second insulating layer over the select gate structure and overlying at least a portion of the substrate; forming a layer of nanocrystals overlying at least a portion of the second insulating layer; forming a third insulating layer overlying the layer of nanocrystals; and forming a control gate structure adjacent to the select gate structure, wherein the control gate structure has a convex sidewall facing the at least one concave sidewall of the select gate structure, wherein the control gate structure includes a nanocrystal stack, and wherein a ratio of a radius of the convex sidewall in a corner region formed at an intersection of a first plane substantially parallel to a top surface of the substrate and a second plane substantially parallel to a side surface of the control gate structure to a height of the nanocrystal stack is at least 0.5.