Patent ID: 7300835
Filing Date: 2007-11-27
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming wells in a semiconductor substrate by implanting ions thereinto; forming a field oxide layer on the semiconductor substrate; forming a gate oxide layer on the semiconductor substrate; forming a first conductive layer on the gate oxide layer and the field oxide layer; forming a capacitor dielectric layer on the first conductive layer; forming a second conductive layer on the capacitor dielectric layer; patterning the first and second conductive layers, the gate oxide layer, and the capacitor dielectric layer so as to form a gate pattern and a capacitor pattern; selectively wet-etching the first and second conductive layers such that the capacitor dielectric layer becomes outwardly protrudent at a protruding portion thereof; implanting ions into the semiconductor substrate using the gate pattern and the protruding portion of the capacitor dielectric layer as an implantation mask; removing the protruding portion of the capacitor dielectric layer so that the patterned capacitor dielectric layer has the same width as a gate electrode and a first capacitor electrode, respectively; and selectively removing the capacitor dielectric layer on the gate electrode and the second conductive layer on the gate electrode.