Patent ID: 6762079
Filing Date: 2004-07-13
Classification: H01L

Abstract:
A method for fabricating a semiconductor die assembly comprising first and second semiconductor dice, the method comprising:providing a base lead frame having a die attach site with a first side and a second, opposing side and a plurality of primary lead fingers extending away from the die attach site; attaching a first semiconductor die by a back side thereof to the first side of the die attach site with an active surface of the first semiconductor die facing away from the base lead frame; attaching a second semiconductor die by a back side thereof to the second side of the die attach site with an active surface of the second semiconductor die facing away from the base lead frame; attaching lead fingers of a first self-supporting offset lead frame extending over the first semiconductor die to the primary lead fingers of the base lead frame; attaching lead fingers of a second self-supporting offset lead frame extending over the second semiconductor die to the primary lead fingers of the base lead frame; and electrically connecting the lead fingers of the self-supporting first and second offset lead frames to bond pads of the first and second semiconductor dice.