Patent ID: 6313779
Filing Date: 2001-11-06
Classification: H03M

Abstract:
A comparator/amplifier configuration for an analog-to-digital converter (ADC) operating in a sample mode and a conversion mode, comprising:a sample capacitor having a first terminal connected to receive at least one analog sample in the sample mode;a high open loop gain operational amplifier to which a second terminal of said sample capacitor is connected, said operational amplifier configured in the sample mode for operating with a first low gain, substantially lower than said high open loop gain, to drive the second terminal of said sample capacitor to a reference voltage;a voltage shifter for shifting the voltage on the first terminal of said sample capacitor to the second terminal thereof during said conversion mode and after the sample mode; andsaid operational amplifier being reconfigured in the conversion mode to operate at a second gain which is greater than said first low gain and substantially lower than said high open loop gain. for comparing said analog sample amplitude with a reference voltage to determine a relative magnitude thereof.