Patent ID: 8964321
Filing Date: 2015-02-24
Classification: G11B

Abstract:
1. A system for dropout mitigation in an iterative read channel, the system comprising a processor and logic integrated with and/or executable by the processor, the logic being configured to: execute dropout detection on a block of signal samples to detect one or more dropout events employing a set of decisions provided by a detector executing a detection algorithm; execute one or more additional digital front-end (DFE) functions on the block of signal samples employing the set of decisions provided by the detector executing the detection algorithm; execute a decoding algorithm of an error correcting code (ECC) on the signal samples using a decoder employing the set of decisions provided by the detector to generate a set of decisions provided by the decoder; store the signal samples, the set of decisions provided by the detector, and the set of decisions provided by the decoder; and in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced: