Patent ID: 8030204
Filing Date: 2011-10-04
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming an insulation layer on a substrate including various conductive structures, and planarizing the insulation layer; partially removing portions of the insulation layer to form at least one opening in the insulation layer, the substrate being partially exposed through the at least one opening; forming a barrier layer on a sidewall and bottom of the at least one opening, the barrier layer including a residual metal layer formed on the bottom and a lower portion of the sidewall of the at least one opening and a metal nitride layer formed on the residual metal layer and an upper sidewall of the at least one opening; and forming a metal plug in the at least one opening by filling up the at least one opening with a metal material, wherein forming the barrier layer includes: wherein forming the metal layer includes: