Patent ID: 8642467
Filing Date: 2014-02-04
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising the steps of: forming a first groove in a first insulating interlayer; burying a first metal layer in said groove; diffusing first silicon into said first metal layer from an upper surface thereof so that said first metal layer is converted into a first silicon-diffused metal layer; forming a first metal diffusion barrier layer on said first silicon-diffused metal layer and said first insulating interlayer; forming second and third insulating interlayers on said first metal diffusion barrier layer; forming a via hole in said third and second insulating interlayers, said via hole opposing said groove of said first insulating interlayer; forming a trench in said third insulating interlayer, said trench opposing said via hole; etching back said first metal diffusion barrier layer using said third and second insulating layers as a mask; burying a second metal layer in said trench and via hole, after said first metal diffusion barrier layer is etched back; diffusing second silicon into said second metal layer from an upper surface thereof so that said second metal layer is converted into a second silicon-diffused metal layer; and forming a second metal diffusion barrier layer on said second silicon-diffused metal layer and said third insulating interlayer.