Patent ID: 6438050
Filing Date: 2002-08-20
Classification: H03K

Abstract:
A semiconductor memory, comprising:first and second bit lines; a word line; a memory cell connected to said first and second bit lines and said word line; and a sense amplifier for detecting a potential on said first or said second bit line, wherein said semiconductor memory is controlled during a first period and a second period by a control signal, wherein both of said first and second bit lines are precharged to a first potential during said first period, wherein said memory cell differentially drives said first and second bit lines according to a stored content of said memory cell during said second period and when said word line is driven, wherein sense amplifier has a first and second node; wherein both of said first and second nodes are precharged to said first potential during said first period, wherein said second node is discharged according to the potential of said first node during said second period, and wherein said first node is discharged according to the potential of one bit line of said first and second bit lines, thereby discriminating the potential of said one bit line, with said potential of said first node as a reference potential.