Patent ID: 8930665
Filing Date: 2015-01-06
Classification: G06F

Abstract:
1. A data access system for generating an access signal to a memory device wherein the memory device comprises registers having flip-flops for storing data stored in the memory device, the memory device executing an access of a unit data according to the access signal, comprising: a data processing unit, activating an access request signal to initiate an access of the unit data, wherein the access of the unit data is executed within a plurality of clock cycles of a reference clock signal; and a bridge device, comprising an access signal generating unit for activating the access signal in response to the access request signal, the reference clock signal and a leading time, wherein the access signal includes a pulse, and the timing of the pulse within the plurality of clock cycles is determined by the leading time, wherein the data processing unit further generates an address signal, the memory device comprises a plurality of memory banks, and the bridge device further comprises an address decoding unit for generating a bank selection signal according to the address signal so as to select one of the memory banks as a selected memory bank to execute the access of the unit data, and wherein the leading time takes into account storage locations of the memory device to adjust a timing of a pulse of the access signal.