Patent ID: 6173305
Filing Date: 2001-01-09
Classification: G06F

Abstract:
A method for performing division of a numerator having a set of most significant bits and a set of least significant bits by a divisor in a data processing apparatus comprising the steps of:forming an arithmetic inverse of said divisor;storing said inverse of said divisor in said first data register;storing said set of most significant bits of said numerator in a second data register;storing said set of least significant bits of said numerator in a third data register;storing a status bit in a status register;selecting an intermediate data word as either data stored in said second data register or data stored in a fourth data register based upon said status bit stored in said status register;left shifting said intermediate data word one bit position;left shifting said third data register one bit position;storing in said second data register said left shifted intermediate data word including a most significant bit shifted out of said third data register as a least significant bit stored thereby replacing data previously stored in said second data register;subtracting said divisor from said left shifted intermediate data word thereby forming a difference by adding said inverse of said divisor stored in said first data register to said left shifted intermediate data word employing an arithmetic logic unit having a first input terminal connected to said first data register, a second input terminal receiving said left shifted intermediate data word, an output generating a sum of said inverse of said divisor and said left shifted intermediate data word and a carry input to a least significant bit of said sum receiving said most significant bit shifted out of said third data register;storing said difference of said left shifted intermediate data word and said divisor in a fourth data register thereby replacing data previously stored in said fourth data register;determining whether said difference is less than zero;setting said status bit stored in said status register based upon whether said difference is less than zero; andsetting a quotient bit based upon whether said difference is less than zero.