Patent ID: 8059220
Filing Date: 2011-11-15
Classification: G02F,H01L

Abstract:
1. An electro-optical device comprising: a substrate; a pixel including an open region and a non-open region that partitions the open region, the open region including a pixel electrode; an inter-bedded insulation film formed over the substrate in a layer below the pixel electrode; a storage capacitor formed over the substrate in a layer below the pixel electrode with at least the inter-bedded insulation film being interposed therebetween, the storage capacitor having a lower capacitor electrode, a dielectric film, and an upper capacitor electrode that are disposed successively one on the other in this order, the lower capacitor electrode including a main portion and an extension portion, the main portion overlapping the upper capacitor electrode in a plan view and the extension portion that extends from one part of the lower capacitor electrode main portion, the lower capacitor electrode extension portion being in a non-overlapping condition with the upper capacitor electrode in a plan view; an underlying surface disposed below the lower capacitor electrode; a spacer insulation film formed over the substrate which is formed at a layer above the underlying surface and below the upper capacitor electrode, the spacer insulation film extending across a boundary between the main portion and the extension portion of the lower capacitor electrode in a plan view to cover the one part of the main portion, the spacer insulation film being in a non-overlapping condition with an other part of the main portion in a plan view; and a first dummy pattern formed in the open region over the substrate, the first dummy pattern being made of the same film as that of the spacer insulation film, wherein the upper capacitor electrode has an upper capacitor electrode main portion that overlaps the lower capacitor electrode main portion in a plan view and an upper capacitor electrode extension portion that extends from the upper capacitor electrode main portion to an end of the upper capacitor electrode in such a manner that the upper capacitor electrode extension portion does not overlap the lower capacitor electrode in a plan view and the upper capacitor electrode extension portion does not overlap the spacer insulation film in a plan view.