Patent ID: 8278984
Filing Date: 2012-10-02
Classification: H03L

Abstract:
1. A loop filter for a phase-locked loop that generates an output signal having a predetermined phase relationship with a reference signal, the loop filter being arranged to control a signal generator that forms the output signal in dependence on a phase error between the output signal and the reference signal by outputting a control signal for controlling the signal generator in dependence thereon, the loop filter being arranged to form the control signal to comprise a proportional component representative of an instantaneous magnitude of the phase difference and an integral component representative of an integral of the phase difference, the loop filter comprising: an input node arranged to receive a signal indicative of the instantaneous magnitude of the phase difference between the output signal and the reference signal; a proportional path arranged to receive the signal representative of the instantaneous magnitude of the phase difference from the input node, the proportional path being arranged to form the proportional component of the control signal in dependence thereon; and an integral path arranged to also receive a signal representative of the instantaneous magnitude of the phase difference and to form the integral component of the control signal in dependence thereon; the proportional and integral paths being decoupled in the loop filter such that each has a transfer function relating its received signal to its respective component of the control signal that is independent of the other path; wherein the proportional path comprises a low-pass filter, a plurality of capacitive elements each coupled in parallel with the low-pass filter and the input node, a first switch connected between the low-pass filter and the plurality of capacitive elements and a second switch connected between two of the plurality of capacitive elements, the loop-filter being arranged to perform a two-stage filtering process such that, during a first time period, the second switch is closed and the plurality of capacitive elements are connected to the input node, the first switch being open, whereby current flows from the input node to the plurality of capacitive elements, and during a second time period, the first switch is closed and the second switch is open such that a subset of the plurality of capacitive elements are connected to the low pass filter, whereby current flows from that subset of capacitive elements to the low pass filter.