Patent ID: 7786745
Filing Date: 2010-08-31
Classification: G01R,H01R

Abstract:
1. An assembly, comprising: a) a tester main board, having a first major surface and a second major surface; b) a wafer disposed on the first major surface of the tester main board; c) tester pin electronics, coupled to at least the second surface of the tester main board and providing a plurality of test circuits external to a plurality of unsingulated integrated circuits on the wafer; and d) a removably attachable single-sided edge-extended wafer translator for providing electrical pathways between one or more unsingulated integrated circuits and one or more test circuits external to the integrated circuits, the removably attachable single-sided edge-extended wafer translator comprising: a plurality of first electrically conductive pathways, each of the plurality of first electrically conductive pathways coupled to a respective first and second contact structure;