Patent ID: 6215153
Filing Date: 2001-04-10
Classification: H01L

Abstract:
A semiconductor device, comprising:a substrate;a control electrode insulatively formed over said substrate;first and second impurity regions of a first conductivity type formed in said substrate and substantially adjacent to first and second sides, respectively, of said control electrode, each of said first and second impurity regions having first and second concentration regions;a third impurity region of a second conductivity type formed beneath the first concentration region of said first and second impurity regions; andfirst and second insulation layers respectively formed between said third impurity regions and the first concentration region of said first and second impurity regions, wherein a region in the substrate beneath said control electrode defines a channel region, and said first concentration regions are respectively formed between said channel region and the second concentration regions, wherein said second concentration regions have a prescribed thickness extending from a top surface of the substrate, and wherein the first and second insulation layers are at a prescribed depth from the top surface that is less than the prescribed thickness.