Patent ID: 8934292
Filing Date: 2015-01-13
Classification: G11C

Abstract:
1. A method of writing data to a multilevel cell resistance memory device, comprising: receiving data to be written to the memory device; selecting a memory cell to which at least a portion of the received data is to be written; determining a current resistance state of the selected memory cell; determining an objective resistance state for representing data to be written to the selected memory cell; determining whether the writing of data to the selected memory cell will involve increasing or decreasing resistance of the selected memory cell based on the current resistance state and the objective resistance state; determining electrical characteristics for a programming pulse that will transform the resistance state of the selected memory cell to the objective resistance state based on the objective resistance state and whether the writing of data to the selected memory cell will involve increasing or decreasing resistance of the selected memory cell; and applying to the selected memory cell a programming pulse having the determined electrical characteristics; wherein the electrical characteristics of the programming pulse are configured to control both a current and a voltage of the memory cell to maintain substantially constant power dissipation in the selected memory cell while applying the programming pulse to the selected memory cell.