Patent ID: 6114197
Filing Date: 2000-09-05
Classification: H01L

Abstract:
A method of fabricating an electrostatic-discharge device for protection of fully depleted SOI CMOS devices, comprising:forming a device area on a SIMOX substrate having a top silicon film and an insulating layer therein;growing an oxide pad on the SIMOX substrate to a thickness of between about 10 nm to 30 nm;implanting boron ions, at an energy level of between about 10 keV to 30 keV at a dose of between about 5.0.multidot.10.sup.12 cm.sup.-2 and 5.0.multidot.10.sup.13 cm.sup.-2, to adjust the film doping concentration for ESD device fabrication;depositing a nitride layer on the oxide layer to a thickness of between about 100 nm to 200 nm;etching the nitride layer;oxidizing the top silicon film of the fully depleted CMOS device area to thin the top silicon film;etching the silicon to form silicon islands; andimplanting BF.sub.2 ions, at an energy level of between about 10 keV to 40 keV at a dose of between about 1.0.multidot.10.sup.12 cm.sup.-2 and 6.0.multidot.10.sup.12 cm.sup.-2, to adjust the threshold voltage of the n.sup.- channel and p.sup.- channel MOS transistors.