Patent ID: 6256703
Filing Date: 2001-07-03
Classification: G11C

Abstract:
A method for optimizing a parameter value necessary for operation of a RAM cell array, said method comprising the following steps:(a) initializing said parameter value to a first predetermined value wherein said first predetermined value is a refresh period of said cell array;(b) generating a test bit pattern;(c) writing said test bit pattern into said cell array using said parameter value;(d) reading binary states of said cell array resulting from said writing step after a refresh cycle;(e) comparing said binary states of said cell array with said test pattern; and(f) adjusting said parameter value in response to said comparing step, said adjusting step further comprising the steps of:decreasing said parameter value if said comparing step does not result in a match by setting an upper parameter limit equal to said parameter value, setting a lower parameter limit equal to a second predetermined value which is less than said parameter value and changing said parameter value to equal an average of said upper and lower parameter limits;increasing said parameter value if said comparing step results in a match by setting said upper parameter limit equal to an upper value greater than said parameter value, setting said lower parameter limit equal to said parameter value and changing said parameter value to equal an average of said upper and lower parameter limits.