Patent ID: 9135206
Filing Date: 2015-09-15
Classification: G06F,G11C,H03K

Abstract:
1. A method of controlling a dynamic random access memory device (DRAM), the method comprising: transmitting to the DRAM one or more commands that specify programming of a digital control value within the DRAM, the digital control value indicating a termination impedance that the DRAM is to couple to a data interface of the DRAM in response to receiving a write command and during reception of write data corresponding to the write command, and that the DRAM is to decouple from the data interface after reception of the write data corresponding to the write command; and transmitting to the DRAM a write command indicating that write data is to be sampled by the data interface of the DRAM during a first time interval and, as a consequence of transmitting the one or more commands that specify programming of the digital control value, to cause the DRAM to couple the termination impedance to the data interface during the first time interval and decouple the termination impedance from the data interface after the first time interval.