Patent ID: 8537158
Filing Date: 2013-09-17
Classification: G06T

Abstract:
1. A method for tessellating triangles implemented by a computing device to execute instructions that, when executed on a processor, perform acts comprising: receiving an input triangle that has a left tessellation factor, a right tessellation factor, a bottom tessellation factor, an inside tessellation factor, and a maximum tessellation factor; calculating a number of rings in the input triangle; calculating a number of new vertices of output triangles in the input triangle based at least in part on the left tessellation factor, the right tessellation factor, the bottom tessellation factor, the inside tessellation factor, and the number of rings, wherein the calculating the number of new vertices is performed in parallel on the processor; calculating a number of output triangles in the input triangle based at least in part on the left tessellation factor, the right tessellation factor, the bottom tessellation factor, the inside tessellation factor, and the number of rings, wherein the calculating the number of output triangles is performed in parallel on the processor; computing a prefix sum of the number of output triangle vertices and the number of output triangles by using a parallel scan algorithm; generating a new vertex for each of the output triangle vertices, the generating comprising computing a barycentric coordinate for the new vertex; building a topology of the output triangles by generating vertex indices for the output-triangles in parallel, the generating comprising: outputting the computed barycentric coordinate and the generated vertex indices for generating a computer graphics display.