Patent ID: 6429106
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A method of automatically defining a landing via on a semiconductor wafer, the semiconductor wafer comprising a substrate, the method comprising:forming a conductive layer on the surface of the substrate; forming a photoresist layer on the conductive layer; defining patterns of a plurality of word lines on the surface of the photoresist layer, and defining patterns of a plurality of auxiliaries around an area of a rectangular-shaped region predetermined to form the landing via between each two word lines on the surface of the photoresist layer, and each of the auxiliaries is positioned at each corner of the rectangular-shaped region; using the patterns defined on the photoresist layer as a hard mask to etch the conductive layer for forming each word line on the semiconductor wafer and the auxiliaries simultaneously form around the area predetermined to form the landing via; and forming a plurality of spacers around each word line and each auxiliary; wherein the spacers formed on said area around each two adjacent auxiliaries dovetail together to form a landing via hole thereby automatically defining a position of the landing via.