Patent ID: 6704862
Filing Date: 2004-03-09
Classification: G06F

Abstract:
A method for supporting exception handling through use of a conditional trap instruction, the method operating in a system that supports a head thread that executes program instructions and a speculative thread that speculatively executes program instructions in advance of the head thread, the method comprising:using the speculative thread to execute at least one instruction that performs an operation that can cause an exception condition; determining if the instruction causes the exception condition by executing an exception testing instruction after each of the at least one instructions, wherein the exception testing instruction does not need to immediately follow the tested instruction; if the instruction causes the exception condition, writing an exception condition indicator to a register; and executing the conditional trap instruction which, examines a value in the register, executes a trap handling routine to handle the exception condition if the value in the register is the exception condition indicator, and proceeds with execution of the code if the value in the register is not the exception condition indicator: wherein the head thread executes on a first processor and the speculative thread executes concurrently on a second processor.