Patent ID: 6137136
Filing Date: 2000-10-24
Classification: H01L

Abstract:
A power semiconductor device comprising:a first conductivity type emitter layer;a second conductivity type base layer formed on said first conductivity type emitter layer and having high impedance;a first conductivity type base layer formed on a surface region of said second conductivity type base layer;plural second conductivity type emitter layers partially formed on a surface region of said first conductivity type base layer;gate electrodes, through a gate insulation film, buried in plural grooves, the plural grooves having a depth to reach from the surface region of said second conductivity type emitter layers to said second conductivity type base layer through said first conductivity type base layer;a first main electrode provided at said first conductivity type emitter layer; anda second main electrode provided at said second conductivity type emitter layers and said first conductivity type base layer,wherein said plural grooves are formed in parallel to be extended in a first direction, said plural second conductivity type emitter layers are formed on the surface region of said first conductivity type base layer such that a first region extended in the first direction in which the second conductivity type emitter layer and first conductivity type base layer are alternately arranged along the first direction and a second region extended in the first direction in which the second conductivity type emitter layer and first conductivity type base layer are alternately arranged along the first direction are connected to each other such that the second conductivity type emitter layer in the first region faces the first conductivity type base layer in the second region and the second conductivity type emitter layer in the second region faces the first conductivity type base layer in the first region.