Patent ID: 6330660
Filing Date: 2001-12-11
Classification: G06F

Abstract:
An application specific signal processor for performing saturated multiplication and accumulation, the application specific signal processor comprising:a serial interface for receiving data samples of a digital signal and transmitting a digital signal processed output;a buffer memory to couple to the serial interface, the buffer memory to buffer the received data samples of the digital signal prior to digital signal processing and to buffer the digital signal processed output prior to transmission;at least one core processor to digital signal process the digital signal, the at least one core processor to generate the digital signal processed output in response to the data samples of the digital signal and a digital signal processing algorithm and to couple to the buffer memory to buffer the digital signal processed output prior to transmission, the at least one core processor including,a reduced instruction set computer (RISC) processor to provide control of the generation of the digital signal processed output, anda plurality of signal processing units executing the digital signal processing algorithm and processing the digital samples in parallel, the plurality of signal processing units generating the digital signal processed output in response to the data samples of the digital signal and the digital signal processing algorithm.