Patent ID: 8773964
Filing Date: 2014-07-08
Classification: H04B

Abstract:
1. A data bus for transmitting data on an integrated circuit comprising: a first differential signal line including a first signal line and a second signal line, wherein each of the first signal line and second signal line includes a first end and a second end; a first multiplier configured to receive a spreading code and a data bit, wherein the first multiplier is configured to generate a modulated data bit based upon the data bit and the spreading code; a differential line driver configured to receive the modulated data bit, the differential line driver having a non-inverting output and an inverting output, wherein the non-inverting output is coupled to the first end of the first signal line and the inverting output is coupled to the first end of the second signal line, wherein the differential line driver generates a non-inverted modulated data bit and an inverted modulated data bit; a second multiplier including a first input in communication with the second end of the first signal line, a second input configured to receive the spreading code, and an output, wherein the second multiplier is configured to generate a non-inverted data bit based upon the spreading code and the non-inverted modulated data bit; a third multiplier including a first input in communication with the second end of the second signal line, a second input configured to receive the spreading code, and an output, wherein the third multiplier is configured to generate an inverted data bit based upon the spreading code and the inverted modulated data bit; and a differential integrator including a non-inverting input configured to receive the non-inverted data bit and an inverting input configured to receive the inverted data bit, such that crosstalk between signal lines is suppressed without a prior knowledge of potential crosstalk.