Patent ID: 6831332
Filing Date: 2004-12-14
Classification: H01L

Abstract:
A microwave transistor structure comprising:a substrate having a top surface; a silicon semiconductor material of a first conductivity type, said silicon semiconductor material having a first dopant concentration and a top surface; said silicon semiconductor material overlaying said top surface of said substrate; a conductive gate overlying and insulated from said top surface of said silicon semiconductor material; a first region formed completely within said silicon semiconductor material of said first conductivity type, said first region being of said second conductivity type to form a first enhanced drain drift region of said microwave transistor structure and having a first enhanced drain drift region dopant concentration; a second region formed in said silicon semiconductor material of said first conductivity type, said second region being of said second conductivity type to form a second enhanced drain drift region of said microwave transistor, said second enhanced drain drift region having a second enhanced drain drift region dopant concentration, said second region contacting said first region, said second enhanced drain drift region dopant concentration being greater than said first enhanced drain drift region dopant concentration; a drain region formed in said silicon semiconductor material, said drain region being of said second conductivity type; said drain region having a drain dopant concentration greater than said second enhanced drain drift region dopant concentration; said drain region contacting said second enhanced drain drift region; a body region formed in said silicon semiconductor material, said body region being of said first conductivity type and having a body region dopant concentration, said body region dopant concentration being equal or greater than said first dopant concentration, said body region having a first end underlying said conductive gate, any remaining portion of said silicon semiconductor material underlying said gate being of said first conductivity type; a source region formed in said silicon semiconductor material, said source region being of said second conductivity type and having a source region dopant concentration, said source region being located within said body region; a shield plate region formed on said top surface of said silicon semiconductor material over a portion of said first region, said shield plate region being adjacent and parallel to said drain region; said shield plate region being adjacent and parallel to said conductive gate; said shield plate region extending above said top surface of said silicon semiconductor material to a shield plate height level, said shield plate region being insulated from said top surface of said silicon semiconductor material; a conductive plug region formed in said body region of said silicon semiconductor material, wherein said conductive plug region connects a lateral surface of said body region to said top surface of said substrate; and a contact enhanced region formed in said silicon semiconductor material, said contact enhanced region being of said first conductivity type and having a contact enhanced region dopant concentration, said contact enhanced region dopant concentration being greater than said body region dopant concentration, said contact enhanced region being located within said body region.