Patent ID: 7428686
Filing Date: 2008-09-23
Classification: H04L

Abstract:
1. An error detection/correction system in data transmission between a plurality of modules that are connected via buses in a controller, the system comprising: in each of the modules, a plurality of error detection/correction code generation circuits having a difference in at least one of an inspection bit length, an information bit length, and a correction capacity generating an error correction code to be added to data to be transmitted to the bus connected to the module or to a serial transmission line; and a plurality of error detection/correction circuits corresponding to a respective one of the error detection/correction code generation circuits, wherein an error detection/correction code generation circuit and an error detection/correction circuit are switched over dependent upon a kind, a length, and a timing of the data to be transferred to detect and correct an error of the data having the error correction code added; wherein the error detection/correction system switches over error detection/correction codes to be used dependent upon on a phase of transmitting an address, a command, and data.