Patent ID: 9136005
Filing Date: 2015-09-15
Classification: G11C,H01L

Abstract:
1. A method of operating a nonvolatile memory device, the method comprising: applying a word line erase voltage to word lines connected to a plurality of memory cells in a plurality of cell strings provided on a substrate, ones of the plurality of cell strings including the plurality of memory cells stacked in a direction that is perpendicular to the substrate; floating a plurality of ground selection lines connected to ground selection transistors of the plurality of cell strings; floating a plurality of string selection lines connected to string selection transistors of the plurality of cell strings; applying a ground voltage to at least one lower dummy word line connected to at least one lower dummy memory cell between ones of the plurality of memory cells and a ground selection transistor in each of the plurality of cell strings; applying an erase voltage to the substrate; and floating the at least one lower dummy word line after applying the erase voltage to the substrate, wherein floating the at least one lower dummy word line after applying the erase voltage to the substrate comprises floating the at least one lower dummy word line when a voltage of the substrate reaches a reference voltage.