Patent ID: 6490161
Filing Date: 2002-12-03
Classification: H01L,H05K

Abstract:
An electronic assembly, comprising:at least one chip having an array of contacts; a first substrate having a first array of contacts on one surface thereof connected to said array of contacts of said at least one chip and a second array of peripheral contacts on said one surface of said first substrate, said second array of peripheral contacts connected through said first substrate to said first array of contacts; and an interposer layer of insulating material having a peripheral array of interconnection conductors presented on one surface matching said second array of peripheral contacts on said first substrate and conductively extending through said interposer layer presented to the other surface thereof, said interposer having an opening in the central region thereof to accommodate said chip and allow said peripheral array of interconnection conductors to respectively contact said second peripheral array of contacts on said first substrate; a second substrate having a peripheral array of contacts on one surface in contact with said interconnection conductors of said interposer layer presented to said other surface; and heat dissipating means extending through the central portion of said second substrate to said at least one chip.