Patent ID: 8891325
Filing Date: 2014-11-18
Classification: G11C

Abstract:
1. A circuit for driving a word line, comprising: a word line driving signal generator configured to activate a word line boosting signal, a pre-main word line enable signal, and a word line off signal in response to an active signal and a precharge signal; a main word line enable signal controller configured to receive the pre-main word line enable signal in response to a main word line test mode signal to output a main word line enable signal; and a sub word line driver including a first PMOS transistor having a gate through which the main word line enable signal is received, a source to which the word line boosting signal is connected, and a drain to which the sub word line is connected; a first NMOS transistor having a gate through which the main word line enable signal is received, a source to which a ground voltage is connected, and a drain to which the sub word line is connected; and a second NMOS transistor having a gate through which the word line off signal is received, a source to which a ground voltage is connected, and a drain to which the sub word line is connected, wherein a driving power of the second NMOS transistor is set to be greater than a driving power of the first PMOS transistor, so that when a main word line test mode signal is activated, the sub word line can be discharged.