Patent ID: 7793249
Filing Date: 2010-09-07
Classification: G06F

Abstract:
1. A method for selectively configuring a circuit design having a plurality of component terminals for physical implementation comprising: (a) establishing and user-updating in a processor a plurality of components for a layout of the circuit design, and defining for said layout a plurality of connections to be autorouted and bundled between predetermined terminals of the components; (b) selectively grouping in interactively modifiable manner a plurality of said connections into at least one candidate bundle; (c) applying at least one filter to said connections of each said candidate bundle for responsive segregation according to an interactively selected connection discriminant into one or more updated bundle candidates; said filter segregating responsive to said preselected connection discriminant to refine each said candidate bundle according to at least one connection-distinguishing factor applicable to selected intermediate portions of said connections prior to autorouting; and, (d) generating bundles corresponding to said updated bundle candidates prior to autorouting for interactively guiding execution of the autorouting; wherein said user-updating is responsive to said connection-distinguishing factor.