Patent ID: 7166900
Filing Date: 2007-01-23
Classification: G11C

Abstract:
1. A semiconductor memory device, comprising a temperature dependent voltage source for applying a temperature dependent voltage to a first output, said temperature dependent voltage is increasing when a temperature of said semiconductor memory device is increasing and is decreasing when said temperature is decreasing; and at least one memory cell provided with at least one first transistor and a first transistor body, which is connected to said first output of said temperature dependent voltage source; and the semiconductor memory device comprising: (a) a read controller for outputting a read control signal; (b) a read detection device connected between said read controller and said memory cell, said read detection device reads a content of said memory cell upon receipt of said read control signal; and (c) a delay device which is connected between said read controller and said read detection device and delays said read control signal, wherein said delay device comprises at least one second transistor having a second transistor body which is connected to said first output.