Patent ID: 8026604
Filing Date: 2011-09-27
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a first interlayer insulating layer on the semiconductor substrate; a contact pad in the first interlayer insulating layer; a second interlayer insulating layer on the first interlayer insulating layer; a contact hole in the second interlayer insulating layer, the contact hole exposing the contact pad and a lower portion of the contact hole having a protrusion exposing a whole surface of the contact pad, the protrusion being on the second interlayer insulating layer; a contact spacer on inside sidewalls of the contact hole and filling the protrusion; and a contact plug in the contact hole, wherein the second interlayer insulating layer comprises a first insulating layer on the first interlayer insulating layer and a second insulating layer on the first insulating layer and wherein the second insulating layer has a contoured shape such that a width of the second insulating layer is not uniform, wherein the first and second insulating layers have different etch rates; and wherein the first and second insulating layers are doped with impurities such that an impurity concentration of the first insulating layer is higher than an impurity concentration of the second insulating layer.