Patent ID: 9059040
Filing Date: 2015-06-16
Classification: H01L

Abstract:
1. An integrated circuit (IC) structure comprising: an oxide layer; an epitaxial SiGe layer formed within a portion of the oxide layer; a first epitaxial Si layer formed on and aligned with the epitaxial SiGe layer; at least one metal oxide semiconductor field effect transistor (MOSFET) formed on and aligned with the first epitaxial Si layer and the epitaxial SiGe layer; a second epitaxial Si layer formed in contact with the oxide layer and sides of the first epitaxial Si layer and the epitaxial SiGe layer such that the second epitaxial Si layer surrounds the first epitaxial Si layer and the epitaxial SiGe layer; a first altered region formed within a portion of the epitaxial SiGe layer and in contact with the oxide layer; a second altered region formed with a portion of the second epitaxial Si layer and in contact with the oxide layer; and an asymmetrical source-drain junction comprising a damaged pn junction located within the second altered region and adjacent to the epitaxial SiGe layer and the first epitaxial Si layer, wherein the asymmetrical source-drain junction is structured to reduce floating body effects of the at least one MOSFET.