Patent ID: 8115209
Filing Date: 2012-02-14
Classification: H01L

Abstract:
1. A structure of a multi-gate thin film transistor (TFT) comprising: a multi-gate including a scanning line and an I-shaped extension portion formed on a substrate wherein said I-shaped extension portion has one end substantially perpendicular to said scanning line; a polycrystalline silicon layer formed on a substrate, said polycrystalline silicon layer formed with a source region, a first doped region, a first gate channel, a second doped region, a second gate channel, a third doped region, and a drain region, wherein said polycrystalline silicon layer comprises a vertical portion and a first horizontal portion having one end connected with one end of said vertical portion, and said source region and the drain region are respectively disposed at two opposite sides of said scan line; and a gate oxide layer formed between said multi-gate and said polycrystalline silicon layer, wherein said vertical portion of said polycrystalline silicon layer crosses said scanning line in said first gate channel and said first horizontal portion of said polycrystalline silicon layer crosses said I-shaped extension portion in said second gate channel.