Patent ID: 7797517
Filing Date: 2010-09-14
Classification: G06F

Abstract:
1. A method comprising: obtaining an instruction image comprising a plurality of basic blocks (BBs), wherein each of the plurality of BBs ends with one of a plurality of branch instructions; generating a first trace for a target architecture by translating a first instruction of a first BB, a second instruction of the first BB, and a branch instruction ending the first BB into a first operation, a second operation, and an assertion operation, respectively, compatible with the target architecture, wherein the second instruction is predicted to execute prior to the branch instruction; searching, within a search window having a span excluding the assertion operation, a plurality of operations including the first operation and the second operation for operations to pair; moving the search window to include the assertion operation within the span of the search window; identifying, after moving the search window, the first operation and the assertion operation as a pair within the search window; and fusing the first operation with the assertion operation to create a first fused operation, wherein the first fused operation is predicted to be executed prior to the second operation, wherein identifying the pair comprises: