Patent ID: 6232152
Filing Date: 2001-05-15
Classification: H01L

Abstract:
A method of packaging a plurality of semiconductor chips, comprising the steps of:disposing a compliant spacer layer between a top surface of a sheetlike substrate and surface of each semiconductor chip such that the chips are spaced apart from one another, wherein each semiconductor chip has contacts a surface thereof and wherein the substrate has terminals at least some of which lie in a region of the substrate aligned with the spaces between the chips;electrically connecting the terminals to respective contacts using flexible leads;aligning and attaching at least one unitary support structure around the periphery of the chips;depositing liquid encapsulant around at least a portion of the periphery of each chip so as to encapsulate the leads and at least one surface of the chip; andcuring the encapsulation material, whereby the combination of elements defines a composite of chip assemblies.