Patent ID: 6473874
Filing Date: 2002-10-29
Classification: G06F

Abstract:
A timing error information managing method of managing information on timing errors located through a timing check of a circuit, comprising the steps of:reading a timing error information file storing said information on said timing errors and a circuit information file storing information on configurations of said circuit; establishing a correlation between each of said timing errors in said timing error information file and each of said circuit configurations in said circuit information file; adding, to said timing error information file, a circuit information pointer for giving an instruction regarding a position of the storage of said information on said circuit configuration, causing each of said timing errors, in said circuit information file; adding, to said circuit information file, an error information pointer for giving an instruction regarding a position of the storage of said information on said timing error, occurring in each of said circuit configurations, in said timing error information file; and managing said information on said timing errors through the use of said circuit information pointer and said error information pointer.