Patent ID: 7277036
Filing Date: 2007-10-02
Classification: H03M

Abstract:
1. A digital-to-analog converting circuit comprising: a first potential terminal for supplying a first potential; a second potential terminal for supplying a second potential; an output node for outputting an analog signal; a first resistor circuit having a plurality of first resistors connected in series between a first node and the output node through a plurality of first connecting points; a first switching circuit including P-channel type MOS transistors, each of the P-channel type MOS transistors connected directly to the first potential terminal, and to respective ones of the first connecting points and the first node, wherein only the P-channel type MOS transistors are connected to the first resistors as switches; a second resistor circuit having a plurality of second resistors connected in series between a second node and the output node through a plurality of second connecting points; a second switching circuit including N-channel type MOS transistors, each of the N-channel type MOS transistors connected directly to the second potential terminal, and to respective ones of the second connecting points and the second node, wherein only the N-channel type MOS transistors are connected to the second resistors as switches; and a control circuit connected to the first and second switching circuits for controlling the P-channel type MOS transistors and the N-channel type MOS transistors, wherein the control circuit concurrently turns off all of the p-channel type MOS transistors and all of the N-channel type MOS transistors responsive to an externally applied control signal, and wherein the first potential is a reference potential and the second potential is a ground potential.