Patent ID: 7632692
Filing Date: 2009-12-15
Classification: G02F,H01L

Abstract:
1. A method of manufacturing a thin film transistor array panel, the method comprising: forming a plurality of gate lines on a substrate; forming a first insulating layer on the gate lines; forming a semiconductor layer on the first insulating layer; forming a plurality of data lines and drain electrodes operatively coupled at least to the semiconductor layer; forming a plurality of color filters, including at least two of different color pigmentations; forming a second insulating layer at least on edges of the color filters and causing the second insulating layer to have opening portions corresponding to inner parts of the color filters, where said opening portions pass a substantial amount of light passed through the corresponding color filters, the second insulating layer being disposed opposite the data lines; and forming a plurality of pixel electrodes on the color filters such that the pixel electrodes and the second insulating layer cover an entire surface of the color filters.