Patent ID: 8170828
Filing Date: 2012-05-01
Classification: G01R

Abstract:
1. A method comprising: an automated test equipment (ATE) programming a memory with one or more tests to be executed by a device under test (DUT), wherein the DUT comprises at least one processor, and wherein the one or more tests comprise instructions to be executed by the processor, and wherein the memory comprises one or more discrete components separate from the DUT, and wherein the connections between the ATE, the DUL and at least a portion of the memory interface are through a first and second switch, wherein the ATE is coupled to the first and second switches, the memory interface is coupled to the second switch which is further coupled to the first switch and the DUT, and wherein the ATE programming the memory comprises: the ATE booting the DUT subsequent to connecting the DUT to the portion of the interface; the DUT reading the memory responsive to the booting; and the processor in the DUT executing the one or more tests.