Patent ID: 7935600
Filing Date: 2011-05-03
Classification: H01L

Abstract:
1. A method of manufacturing a multi-channel transistor device, the method comprising; defining an active region in a semiconductor substrate by forming a first isolation layer exposing an upper side portion of the active region; forming an active expanding region on the exposed upper side portion of the active region by selective epitaxial growth (SEG); forming on the first isolation layer a second isolation layer that separates adjacent active expanding regions; selectively etching a portion of the active region to define channel bars in the active expanding region that extend between first and second laterally separated portions of the active region; selectively removing a portion of the first isolation layer that contacts bottom surface portions of the channel bars such as to expose the bottom surface portions of the channel bars; forming a gate dielectric layer on exposed surfaces of the channel bars; forming a gate on the gate dielectric layer; and forming a source/drain region in a region of the active expanding region adjacent to the gate.