Patent ID: 8809093
Filing Date: 2014-08-19
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of fabricating self-aligning electronic components, the method comprising: providing a substrate with one or more nanowires on and in contact with a first side of the substrate and a first conductive layer on and in contact with a second side of the substrate, wherein the one or more nanowires comprises at least one of a silicon-on-insulator or a bulk silicon structure; substantially covering the substrate and the one or more nanowires with an insulator having thickness that is less than a height of the nanowire, the insulator contacting the one or more nanowires and the first side of the substrate; cleaving the coated one or more nanowires to expose a selected length of a non-cleaved nanowire portion and a selected length of a non-cleaved insulator portion; and epitaxially depositing a quantum dot directly on the selected length of the non-cleaved nanowire portion.