Patent ID: 8712718
Filing Date: 2014-04-29
Classification: G01R

Abstract:
1. A method comprising: storing a test static voltage profile for each of a plurality of dies tested in wafer form, wherein each test static voltage profile specifies a static voltage measured at a node of a circuit within the die; storing a dynamic performance profile for each of the plurality of dies determined after packaging of the die, wherein each test static voltage profile is associated with the dynamic performance profile for the same die of the plurality of dies; determining a static voltage profile of a die under test in wafer form by measuring a static voltage of a node of a circuit of the die under test; matching, using a processor, the static voltage profile of the die under test in wafer form with a test static voltage profile of the plurality of test static voltage profiles; assigning the dynamic performance profile associated with the matched test static voltage profile to the die under test; and classifying the die under test into one of a plurality of different performance groups according to the assigned dynamic performance profile.