Patent ID: 6830971
Filing Date: 2004-12-14
Classification: H01L

Abstract:
A method for fabricating a metal-insulator-metal capacitor comprising:providing a first dielectric layer overlying a semiconductor substrate; forming dual damascene openings within said first dielectric layer, and forming a first metal electrode filling said dual damascene openings; providing a second dielectric layer overlying said first metal electrode, and forming dual damascene openings lined with a metal barrier layer within said second dielectric layer; forming a capacitor dielectric insulator with high dielectric constant material within the dual damascene openings by Molecular Beam Epitaxy or Atomic Layering Chemical Vapor Deposition techniques, alternating material layers forming a super lattice stack; and forming a second metal electrode overlying said capacitor dielectric insulator filling the dual damascene openings, to complete the fabrication of said metal-insulator-metal capacitor.