Patent ID: 7709339
Filing Date: 2010-05-04
Classification: H01L

Abstract:
1. A method for producing a planar spacer comprising: a) forming a sacrificial mask on a semiconductor substrate b) forming a first spacer layer on the surface of the substrate and on the sacrificial mask; c) forming a second spacer layer on the first spacer layer; d) carrying out a first anisotropic etching step of the second spacer layer to form auxiliary spacers on the side walls of the first spacer layer; e) carrying out a second anisotropic etching step of the first spacer layer to produce the planar spacer using the auxiliary spacers as an etching mask, wherein the first and second anisotropic etching steps are carried out in the absence of an etch mask on regions of the second spacer layer overlying the auxiliary spacers; and f) removing the auxiliary spacer and the sacrificial mask, wherein the auxiliary spacer and the sacrificial mask comprise the same material, and wherein the sacrificial mask and the auxiliary spacers are removed at substantially the same time.