Patent ID: 6397317
Filing Date: 2002-05-28
Classification: G06F

Abstract:
A data processing method having address conversion, which makes it possible to transfer data stored in a low-speed access memory to a high-speed access memory to perform high-speed accessing, comprising:a memory selection step for selecting accessing to said data either from a low-speed access memory or a high-speed access memory; an arithmetic operation step for deciding a converted address signal of an address signal, by performing an arithmetic operation using the address signal and an address conversion data set up by a central processing unit; a comparison step for comparing the address signal and an original address in the low-speed access memory, and judging whether the address signal agrees with the original address or not; and an address signal selection step selected from the group consisting of a first selection step in which, when the high-speed access memory is selected in the memory selection step and a judgment result in the comparison step is an agreement, the converted address signal is selected, a second selection step in which, when the high-speed access memory is selected in the memory selection step and a judgment result in the comparison step is a disagreement, the address signal is selected, a third selection step in which, when the low-speed access memory is selected in the memory selection step and a judgment result in the comparison step is an agreement, the address signal is selected, and a fourth selection step in which, when the low-speed access memory is selected in the memory selection step and a judgment result in the comparison step is a disagreement, the address signal is selected, wherein the memory selection step is to select accessing, based on the capacity of a vacant area in the high-speed access memory, from the high-speed access memory if the capacity of said vacant area is sufficient for the data processing, and from the low-speed access memory if the capacity of said vacant area is not sufficient for the data processing, and wherein the same data can be accessed by either the low-speed access memory or the high-speed access memory.