Patent ID: 6232800
Filing Date: 2001-05-15
Classification: G11C,H03K

Abstract:
A differential sense amplifier circuit alternating between two phases of an idle phase and working phase according to a control signal, comprising:a first logic input terminal,a second logic input terminal,a first logic output terminal,a second logic output terminal,a sense amplifier which has a first inverter, and a second inverter, in whichthe output of the first inverter and the input of the second inverter are connected, a connection point thereof is connected to the first logic output terminal, the input of the first inverter and the output of the second inverter are connected, and the connection point thereof is connected to the second logic output terminal, and which operates upon receipt of the control signal indicating the working phase to define logic potentials of the first logic output and the second logic output at a different first level and second level according to a difference of conduction resistances possessed by the first logic input and the second logic input,initializing means for initializing the first logic input terminal and the second logic input terminal at a reference potential upon receipt of the control signal indicating the idle phase,a first switching means for electrically connecting or cutting off the first logic input terminal and the first logic output terminal according to the potential of the control terminal,a second switching means for electrically connecting or cutting off the second logic input terminal and the second logic output terminal according to the potential of the control terminal, anda connection controlling means which hasa first setting means for setting the potential of the control node connected to the control terminals of the first switching means and the second switching means to a potential that at least can connect two terminals to which the first and second switching means are connected upon receipt of the control signal indicating the idle phase, and a second setting means for setting the potential of the control node to a potential that at least a cut off the two terminals to which the first and second switching means are connected according to the potential of the first logic output terminal or the second logic output terminal at the time of the working phase.