Patent ID: 8132075
Filing Date: 2012-03-06
Classification: H03M

Abstract:
1. A process of forming a control bit table for a routing multiplexer that provides outputs based on a selected permutation of inputs, the process comprising steps of: a) defining the selected permutation of n values, where n is an integer variable greater than zero, and constructing a graph of the selected permutation, wherein the graph comprises n vertices, corresponding to respective values of the selected permutation, which are connected together by n edges in an order based on the selected permutation; b) identifying first and second groups of vertices each containing alternate vertices of a graph of the selected permutation; c) calculating a first permutation containing the values corresponding to the first group of vertices in an order defined by the selected permutation, and calculating a second permutation containing the values corresponding to the second group of vertices in an order defined by the selected permutation; d) forming the control bit table in a control memory, wherein the control bit table comprises control bits that are based on the first and second permutations and on the vertices of the graph of the selected permutation; and e) applying the control bits of the control bit table from the control memory to control inputs of the routing multiplexer.