Patent ID: 8088664
Filing Date: 2012-01-03
Classification: H01L

Abstract:
1. A method of forming a semiconductor device including deep and shallow trench isolation structures, the method comprising: providing a substrate with a semiconductor layer; depositing a hard mask layer over the substrate semiconductor layer; etching the hard mask layer in a first etch using a first mask pattern to form deep trench openings with blind ends terminating at the substrate semiconductor layer; after the first etch, etching the hard mask layer in a second etch using a second mask pattern to form shallow trench openings with blind ends terminating in the hard mask layer, at least one shallow trench opening at least partially overlapping at least one deep trench opening; after the second etch, etching the substrate semiconductor layer and partially etching the hard mask layer in a third etch to deepen the deep trench openings further into the semiconductor layer, and to remove portions of the hard mask layer remaining in the shallow trench openings but leave partially etched portions of the hard mask layer remaining at locations away from the shallow trench openings and deep trench openings; after the third etch, etching the semiconductor layer in a fourth etch to deepen the shallow trenches and the deep trenches, with remaining partially etched portions of the hard mask acting to shield etching at locations away from the shallow trench openings and deep trench openings; following the fourth etch, forming a layer of insulation material to simultaneously fill the deep trenches and shallow trenches; and after filling the deep trenches and shallow trenches, planarizing to remove portions of the insulation material.