Patent ID: 8673719
Filing Date: 2014-03-18
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of forming a semiconductor structure, said method comprising: forming a trench capacitor comprising an inner electrode, a node dielectric, and an outer electrode in a semiconductor-on-insulator substrate including a handle substrate, a buried insulator layer, and a top semiconductor layer; forming a conductive cap structure over said inner electrode; forming a patterned semiconductor material structure including a semiconductor nanowire and a wraparound semiconductor portion that laterally contacts said conductive cap structure from a portion of said top semiconductor layer; forming at least one gate spacer on sidewalls of said wraparound gate electrode portion; removing a portion of said semiconductor nanowire that adjoins said wraparound semiconductor portion, wherein an end surface of said semiconductor nanowire that is vertically coincident with a vertical portion of an outer surface of said at least one gate spacer is physically exposed; and forming an electrically conductive path between said physically exposed end surface and said conductive cap structure by depositing at least one conductive material.