Patent ID: 6399482
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method for manufacturing a conductive layer and an inter-metal dielectric layer on a semiconductor substrate, said method comprising:forming a conductive layer on said semiconductor substrate; forming an anti-reflection layer on said conductive layer; etching said anti-reflection layer and said conductive layer to form a conductive structure on said semiconductor substrate, wherein said conductive structure comprises a plurality of conductive regions constructed with respective sidewalls; forming dielectric spacers on said sidewalls of said conductive regions, wherein said dielectric spacers. are formed of materials selected from the group consisting of tetra-ethyl-ortho-silicate-oxide, undoped silicate glass, and silicon-rich oxide; forming an organic dielectric layer on said semiconductor substrate, wherein said organic dielectric layer is filled among said conductive regions and isolated from said conductive regions with said dielectric spacers; and forming an inorganic dielectric layer on said organic dielectric layer and said conductive structure.