Patent ID: 7920002
Filing Date: 2011-04-05
Classification: H03K

Abstract:
1. A pulse synthesis circuit for synthesizing n first pulse signals and n second pulse signals whose phases are different from one another where n is an integer equal to or greater than 2, comprising: n first drive transistors corresponding to the n first pulse signals; n second drive transistors corresponding to the n second pulse signals; and a current mirror circuit, wherein a high level period of each of the n first pulse signals does not overlap any high level periods of the n second pulse signals, each of the n first drive transistors includes a source connected to a ground node, a drain connected to a first node, and a gate receiving a corresponding one of the first pulse signals, each of the n second drive transistors includes a source connected to the ground node, a drain connected to a second node, and a gate receiving a corresponding one of the second pulse signals, and the current mirror circuit includes an input terminal connected to the second node, and an output terminal connected to the first node, the current mirror circuit allowing a current corresponding to a current flowing through the second node to flow through the first node.