Patent ID: 8865601
Filing Date: 2014-10-21
Classification: H01L

Abstract:
1. A process for the preparation of a semiconductor wafer comprising a substrate having a central axis, a front surface and a back surface that are generally perpendicular to the central axis, a circumferential edge, and a radius extending from the central axis to the circumferential edge, wherein the substrate has a dopant concentration of above 1×10 15 carriers/cm 3 and below about 1×10 17 carriers/cm 3 , the process comprising: forming a protective layer on the front surface of the substrate, the protective layer being doped with a dopant concentration between about 3.2×10 forming a device layer on the exposed surface of the protective layer parallel to the front surface of the substrate, the device layer being doped with a P-type dopant at a dopant concentration greater than 1×10 exposing the back surface of the substrate to an alkaline etchant for a time period sufficient to remove substantially all of the substrate, thereby exposing the protective layer.