Patent ID: 9012955
Filing Date: 2015-04-21
Classification: H01L

Abstract:
1. A MOS transistor device comprising: a semiconductor substrate and insulating layer thereon and an SOI-type semiconductor layer on the insulating layer; a MOS transistor comprising a gate electrode above the SOI-type semiconductor layer and source and drain regions in said SOI-type semiconductor layer on opposite sides of said gate electrode; and a lateral field-effect-controlled thyristor comprising a cathode contact region and anode contact region within the substrate at least partly under the MOS transistor, a field effect turn-on region of the thyristor extending under at least a portion of the gate electrode of the MOS transistor and being separated therefrom by said insulating layer, the anode contact region and the cathode contact region of the lateral field-effect controlled thyristor being respectively connected to the drain region and to the source region of the MOS transistor, wherein the lateral field-effect controlled thyristor turns on in case of a positive overvoltage between the drain and the source regions of the MOS transistor, and a first well of a first conductivity type and a second well of the second conductivity type extending next to each other in the substrate below the cathode contact region and anode contact region of the lateral field-effect-controlled thyristor and a junction between the first and second wells turns on when a positive overvoltage occurs between the source region and drain region of the MOS transistor.