Patent ID: 6704853
Filing Date: 2004-03-09
Classification: G05B,G06F

Abstract:
A digital signal processing apparatus, comprising a program memory for storing a program, a program counter for reading an instruction from said program memory, an instruction decoder unit for outputting a control signal and an address according to the instruction read from said program memory, a delay unit for delaying the address output from said instruction decoder, data memory for outputting data based on the address output from said instruction decoder unit and storing data based on the address output from said delay unit, and an arithmetic and logic unit for performing an operation based on the data output from said data memory and transferring the result of the operation to said data memory, said apparatus being characterized by having:external signal processing means for processing an external signal and means for selecting one of an output generated by said means and an output from said arithmetic and logic unit to store the selected output in said data memory.