Patent ID: 6337593
Filing Date: 2002-01-08
Classification: G11C,H01L,H03K

Abstract:
A semiconductor integrated circuit, comprising:a main circuit including at least one transistor and operating with a positive voltage; a substrate bias controlling circuit used for controlling a voltage to be applied to a substrate or a well of said transistor and including a negative voltage generating circuit supplied with an external positive supply voltage and generating a negative voltage; a standby controlling circuit used for switching the state of said semiconductor integrated circuit device between at lest two states of active and standby by controlling said substrate bias controlling circuit, said active state allowing a first subthreshold leakage current to flow in said main circuit and said standby state allowing a second subthreshold leakage current less than the first subthreshold leakage current to flow in said main circuit; and a first pad connected to an output of said negative voltage generating circuit; wherein the negative voltage generated by the negative voltage generating circuit can be monitored via said first pad in a test of said semiconductor integrated circuit.