Patent ID: 8000672
Filing Date: 2011-08-16
Classification: G11C

Abstract:
1. An apparatus comprising: an n-input sense amplifier including an input stage having first n-channel metal-oxide-semiconductor field effect transistors (nMOSFETs) gated by a differential input signal, an output stage having second nMOSFETs to output an n-stage differential output signal at an output node, and a control stage including p-channel MOSFETs (pMOSFETs) gated at least in part by a clock signal, wherein the control stage is to gate the output stage; a p-input sense amplifier including an input stage having first pMOSFETs gated by the differential input signal, an output stage having second pMOSFETs to output a p-stage differential output signal at an output node, and a control stage including nMOSFETs gated at least in part by an inverted clock signal, wherein the control stage is to gate the output stage; and a latch coupled to receive and combine the n-stage differential output signal and the p-stage differential output signal and to generate a latched complementary output signal therefrom.