Patent ID: 6492212
Filing Date: 2002-12-10
Classification: H01L

Abstract:
A method for forming a plurality of transistors having different threshold voltages, the method comprising the steps of:a) providing a semiconductor substrate; b) forming a plurality of shapes on the semiconductor substrate, each of the plurality of shapes having a width; c) selectively adjusting the widths of at least one selected shapes; d) patterning the semiconductor substrate using the plurality of shapes to form a plurality of transistor bodies such that the width of each the plurality of transistor bodies is at least partially determined by the width of a corresponding one of the plurality of shapes; e) providing a first gate structure of a first work-function adjacent a first body edge of each of the plurality of transistor bodies; and f) providing a second gate structure of a second work-function adjacent a second body edge of each of the plurality of transistor bodies.