Patent ID: 8975725
Filing Date: 2015-03-10
Classification: H01L,H03F

Abstract:
1. A high frequency amplifier comprising: an FET amplifying a high frequency signal supplied to a gate and outputting an amplified high frequency signal from a drain; a first bias circuit supplying a gate bias to the gate of the FET; and a second bias circuit supplying a drain bias to the drain of the FET, wherein each of the first bias circuit and the second bias circuit comprise: wherein the shunt RC circuit comprises a parasitic capacitance that is generated by the conductor and the resistor layer, and a parasitic resistance that is generated by an eddy current induced in the resistor layer when an alternating current signal is applied to the conductor, wherein an output terminal of the first bias circuit is connected to the gate of the FET and the gate bias is supplied to an input terminal of the first bias circuit, and wherein an output terminal of the second bias circuit is connected to the drain of the FET and the drain bias is supplied to an input terminal of the second bias circuit.