Patent ID: 7644297
Filing Date: 2010-01-05
Classification: G06F,Y02D

Abstract:
1. A processor comprising: a clock signal generator generating clock signals; an operational processing part performing data processing which is divided into a plurality of execution units, in accordance with the clock signals; a storage storing data per each execution unit, the execution unit is executed by the operational processing part as a unit; a data amount detector detecting amounts of the data stored in the storage per each execution unit; a clock frequency determining part determining a new clock frequency of the clock signals by using the amounts of the data, said clock signals being supplied newly to the operational processing; and an execution priority storage storing preliminary priorities which indicate the execution order of the execution units, wherein the clock frequency determining part selects an execution unit having the lowest priority among the execution units, and determines the new clock frequency of the clock signals by using the amounts of the data associated with the execution units selected by the clock frequency determining part.