Patent ID: 6710461
Filing Date: 2004-03-23
Classification: B81B,B81C,H01L

Abstract:
A wafer level package of micro electromechanical devices, comprising:a micro electromechanical device wafer with a plurality of micro electromechanical devices fabricated therein, said micro electromechanical device wafer being formed by arranging many chip units, a plurality of first solder bumps corresponding to I/O bonding pads of said chip units being disposed on a surface of said wafer, a guard ring of said first solder bumps being disposed at an outer periphery of each of said chip units to enclose the whole internal micro electromechanical devices and the I/O bonding pads; and a package wafer base of the same size as that of said micro electromechanical device wafer, a plurality of conductor plugs penetrating through upper and lower surfaces of said package wafer base, second solder bumps being disposed at two ends of said conductor plugs, a guard ring of said second solder bumps being fabricated on the upper surface of said package wafer base, said micro electromechanical device wafer being installed on said package wafer base by soldering said first solder bumps and said first guard ring with said second solder bumps and said second guard ring.