Patent ID: 6756265
Filing Date: 2004-06-29
Classification: H01L,Y10S

Abstract:
A method of forming a capacitor structure, comprising:providing a substrate having an electrical node supported thereby; forming an insulative mass over the electrical node; forming an opening extending through the insulative mass to the electrical node; the opening having a periphery which includes at least one sidewall; forming a first layer along the at least one sidewall of the opening; forming a second layer along first layer; the second layer comprising silicon which is doped with a conductivity-enhancing dopant; forming a third layer along the second layer; any concentration of conductivity-enhancing dopant in the third layer being less than the concentration of conductivity-enhancing dopant in the second layer; removing some of the insulative mass to expose at least a portion of the first layer; removing at least some of the exposed portion of the first layer to expose at least some of the second layer; converting at least some of the third layer to hemispherical grain silicon; forming a dielectric material along the third layer and exposed portion of the second layer; and forming a conductive material over the dielectric material; the second layer, third layer, dielectric material and conductive material together defining at least part of the capacitor structure.