Patent ID: 6797579
Filing Date: 2004-09-28
Classification: H01L

Abstract:
A method of fabricating a semiconductor device on an SOI substrate formed by stacking a buried insulating layer and an upper silicon layer on a base substrate, the method comprising:sequentially forming a buffer oxide layer and a hard mask layer on the upper silicon layer; patterning the hard mask layer, the buffer oxide layer, and the silicon layer to a predetermined depth to form a trench region in the upper silicon layer; thermally oxidizing a bottom and a sidewall of the trench region; forming a trench liner that conformally-covers the bottom and the sidewall of the trench region; patterning the trench liner layer and the upper silicon layer on the bottom of the trench to form a modified trench region including a deep trench region and a shallow trench region, the deep trench region existing where the buried insulating layer is exposed, the shallow trench region existing at an outside of the deep trench region; forming an insulating layer pattern filling an inside of the modified trench region; and removing the hard mask layer and the buffer oxide layer remaining on the upper silicon layer.