Patent ID: 6982991
Filing Date: 2006-01-03
Classification: H04L

Abstract:
1. An apparatus for segmenting variable length packet and forming fixed cell therefrom comprising: a storage unit, with storage capacity greater than storage capacity of a one byte register, for storing the variable length packet; a storage control block for storing segmenting information; a bus connected to an external interface to request and receive acknowledgment of segmenting information availability; a first input data bus connected to the storage control block to read the segmenting information; a second input data bus connected to the storage unit to read predefined portions of said variable length data packet to be used to form the fixed cell; a multiplexer having two inputs with one of said two inputs connected to the first input data bus and the other of said two inputs connected to the second input data bus wherein the data packets used to form the fixed cell are extracted directly from the storage and not buffered in a register connected between the storage and said multiplexor; a counter having an input connected to the storage control block and an output connected to the storage unit, said counter pointing to the next address in the word of the packet to be read in the storage unit; a finite state machine having an input connected to the storage control block, a first output connected to the counter and a second output connected to the multiplexer said finite state machine, for each cell to be built, requesting and receiving acknowledgment, over said bus connected to said external interface, of segmenting information availability, repetitively activating said multiplexer with storage unit data and segmenting information data according to a finite cell pattern and sending cell data on said output bus to said cell output while incrementing said counter until said output cell is complete; said finite state machine repetitively outputting cells according to said cell pattern until all the packet words are read.