Patent ID: 7426206
Filing Date: 2008-09-16
Classification: H04J,H04L

Abstract:
1. An input interface system for mapping an asynchronous stream of data packets, each comprising a header portion and a payload portion, from at least one source to at least one destination, said system comprising: a Common Time Reference (CTR), divided into a plurality of contiguous periodic super cycles each comprised of at least one contiguous time cycles each comprised of at least one contiguous time frame (TF); at least one synchronous virtual pipe (SVP) having a subset of predefined time frames uniquely associated therewith; at least one queue wherein each queue is associated with a respective one of the SVPs; means for analyzing the header portions of the asynchronous data packets; means for storing the analyzed data packets in respective queues responsive to the means for analyzing; a link coupled to the destination; and an SVP Forwarding Controller, comprising a second memory for storing SVP schedules, and for forwarding, to the link, respective ones of the asynchronous data packets from respective ones of the queues responsive to the respective SVP schedule and the CTR.