Patent ID: 7479834
Filing Date: 2009-01-20
Classification: H03J,H03L

Abstract:
1. Method for analogue self calibrating of a phase locked loop circuit including a phase frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, including elements tuned by a tuning voltage, the method comprising: comparing a frequency of an output signal of the voltage-controlled oscillator of the phase locked loop circuit with a reference signal frequency entering in the phase frequency detector; switching a voltage-controlled oscillator operating mode to a linear-high-gain mode to enable a first frequency tuning operation that includes targeting a linear frequency versus voltage curve to vary the frequency of the output signal within a frequency locking range; after locking to a frequency with said first frequency tuning operation, switching said voltage-controlled oscillator operating mode to a zero-gain mode while keeping the frequency of the output signal unchanged; generating a control voltage based on said comparing of said output signal and said reference signal; and offsetting said control voltage to generate an output voltage, wherein the tuning voltage is generated based on said output voltage and a reference voltage.