Patent ID: 9117655
Filing Date: 2015-08-25
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate having a plurality of well regions; a plurality of isolation regions in a first well region among the plurality of well regions including a first isolation region and a second isolation region; a main active region provided in the first well region of the semiconductor substrate and having a first side surface and a second side surface facing each other; a first auxiliary active region in the first well region adjacent to the first side surface of the main active region, and spaced apart from the main active region by a first distance; a second auxiliary active region in the first well region adjacent to the second side surface of the main active region, and spaced apart from the main active region by the first distance; and a first conductive pattern crossing the main active region, wherein the conductive pattern has first and second side portions facing each other, wherein the first side portion of the conductive pattern is disposed between the first auxiliary active region and the main active region, and the second side portion of the conductive pattern is disposed between the second auxiliary active region and the main active region, the first isolation region is disposed between the main active region and the first auxiliary active region in the first well region, and the second isolation region is disposed between the main active region and the second auxiliary active region in the first well region.