Patent ID: 8889512
Filing Date: 2014-11-18
Classification: H01L

Abstract:
1. A method of forming a transistor component, including: providing a semiconductor arrangement including: a semiconductor body having a first side, at least one first trench extending from the first side, and having sidewalls and lower and upper trench sections, a first field electrode arranged in the lower trench section of the at least one first trench and being insulated from the semiconductor body by a field electrode dielectric, at least one second trench in the semiconductor body, the at least one second trench having sidewalls and lower and upper sidewall sections, and a second field electrode arranged in lower and upper trench sections of the at least one second trench and being insulated from the semiconductor body by the field electrode dielectric; forming a dielectric layer on the first field electrode in the at least one first trench, forming the dielectric layer including a deposition process that deposits a dielectric material on the first side of the semiconductor body and on the field plate at a higher deposition rate than on sidewalls of the at least one first trench; forming a gate dielectric, the gate dielectric at least lining the sidewalls in the upper trench section of the at least one first trench; forming a gate electrode in the upper trench section, gate electrode being insulated from the first field electrode by the dielectric layer.