Patent ID: 6831331
Filing Date: 2004-12-14
Classification: H01L

Abstract:
A semiconductor device having a power transistor structure comprising:a semiconductor layer of a first conductivity type; a plurality of first wells of a second conductivity type disposed independently at a surface portion of said semiconductor layer; a drain cell disposed in each of said first wells, said drain cell comprising a second well of the first conductivity type disposed within a corresponding first well and a drain region disposed within said second well; a source cell disposed in each of said first wells, said source cell comprising a channel well region of the second conductivity type disposed within said corresponding first well and a source region of the first conductivity type disposed within said channel well region; a gate electrode disposed over a surface portion of said channel well region between said source region and said second well where said drain region is disposed; a deep region of the first conductivity type, said deep region having a portion disposed in said semiconductor layer between said first wells; a drain electrode connected to respective drain regions in said second wells; a source electrode connected to respective source regions and channel well regions in said first wells; either said drain electrode or said source electrode being connected to an inductive load; and a connecting member configurable to connect said being region to a source potential when said drain electrode is connected to said inductive load or to a drain potential when said source electrode is connected to said inductive load.