Patent ID: 8477522
Filing Date: 2013-07-02
Classification: G11C

Abstract:
1. A method of operating a ferroelectric memory device, the method comprising: biasing a ferroelectric capacitor to a first state by applying a voltage across the ferroelectric capacitor and removing the voltage; reading a first state from the ferroelectric capacitor via a bit line electrically connected to the ferroelectric capacitor through a switch; in response to signal amplification on the bit line during reading the first state, activating a global bit line that in response activates a buffer electrically coupled to the global bit line, the buffer having an output electrically coupled to the bit line; wherein the buffer is electrically coupled to a write line and is configured to output to the bit line a signal derived from the global bit line based on an input received from the write line; wherein reading the first state comprises: activating a word line and a compliment word line; after activating the word line and the compliment word line, pulsing a plate line electrically coupled to the ferroelectric capacitor; and after pulsing the plate line, activating a sense amplifier electrically coupled to the bit line and bit line compliment.