Patent ID: 9143204
Filing Date: 2015-09-22
Classification: G05F,H01Q,H03F,H03K,H04B

Abstract:
1. An apparatus comprising: a magnitude of a first current through a first transistor generates a first biasing voltage; a control loop configured to monitor the first biasing voltage and to generate a second biasing voltage; a first resonant parallel LC load couples the second biasing voltage to an input of a second transistor to control a second current through the second transistor; an output power drive characteristic of the second transistor is scaled in direct proportion to an adjustment of the magnitude of the first current; and an output of a third transistor coupled to the input of the second transistor; wherein an input signal coupled to an input of the third transistor generates an intermediate signal at the output of the third transistor and the intermediate signal is combined with the second biasing voltage at the input of the second transistor.