Patent ID: 8217671
Filing Date: 2012-07-10
Classification: G01R

Abstract:
1. An apparatus, comprising: a device under test (DUT) array having a plurality of DUTs coupled in parallel and a plurality of localized heating elements associated with respective ones of the DUTs in the DUT array; and active logic elements coupled to the DUT array for selectively enabling or disabling electro-migration stress testing of individual DUTs in the DUT array, wherein the active logic elements are thermally isolated from the DUT array such that the active logic elements actively operating while the DUT array is subjected to heating by the plurality of localized heating elements, wherein the active logic elements comprise: DUT selection logic, coupled to the DUT array, that selectively isolates individual DUTs within the DUT array; current source logic, coupled to the DUT array, that controls a current through the individual DUTs in the DUT array such that each DUT in the DUT array has a fixed current applied during electro-migration stress testing; and current source enable logic coupled to the current source logic that selectively enables portions of the current source logic.