Patent ID: 7436028
Filing Date: 2008-10-14
Classification: H01L

Abstract:
1. A one-time programmable read only memory having a first memory cell, the first memory cell comprising: a substrate; a select transistor disposed on the substrate having a first source/drain region and a second source/drain region; an electrode; a dielectric layer disposed between the electrode and the first source/drain region; a first conductive plug, wherein the electrode, the dielectric layer, the first conductive plug, and the first source/drain region are configured one on another directly in that sequence, and the one-time programmable read only memory is programmed by breaking down the dielectric layer of the first memory cell; and a second conductive plug, configured on the second source/drain region, wherein the second source/drain region is sandwiched by a bottom surface of the second conductive plug and the substrate.