Patent ID: 6809404
Filing Date: 2004-10-26
Classification: G11C

Abstract:
A semiconductor device with fuses for repairing a defect found therein, comprising:a guard ring; a fuse pattern running in a direction parallel to longitudinal axis of said guard ring; a plurality (n) of branching patterns branching from said fuse pattern and being drawn out of said guard ring in a direction perpendicular to the longitudinal axis of said guard ring; a plurality (n+1) of memory cell arrays, the (n+1)th memory cell array being a redundant memory cell array; a plurality (n) of input/output ports for receiving and sending memory signals; and a plurality (n) of switch circuits, coupled to different points on said fuse pattern through said plurality of branching patterns, which switch connection between said input/output ports and memory cell arrays, the ith switch circuit (i=1 . . . n) selecting either the ith memory cell array or the (i+1)th memory cell array, depending on which segment of said fuse pattern is blown.