Patent ID: 6658169
Filing Date: 2003-12-02
Classification: G06T,G09G,H04N

Abstract:
An image processor microcircuit adapted for use in an imaging processing system having an image sensor with P pixels and a digital output whereby each pixel is represented by N bits, said image processor microcircuit comprising:(a) an image buffer having at least P memory locations of at least N bits and having input signals including an address bus, a read enable, and a write enable; (b) a plurality of devices capable of accessing said image buffer by using image buffer access signals; (c) an image buffer access prioritizer controlling access to said image buffer by said devices, each of said devices having an access priority fixed relative each other; (d) a first of said devices being a central processing unit, said central processing unit image buffer access signals including output control signals and an input busy signal, said busy signal causing said central processing unit to suspend image buffer accesses when asserted; (e) a second of said devices being an image sensor interface, said image sensor interface image buffer access signals including output control signals; (f) said prioritizer receiving and monitoring said central processing unit output control signals and said image sensor interface output control signals; (g) said prioritizer, when said image sensor interface attempts to access said image buffer, asserting said central processing unit busy signal and allowing said image sensor interface image buffer access signals to control said image buffer input signals; and (h) said prioritizer deasserting said central processing unit busy signal when said image sensor interface completes access to said image buffer.