Patent ID: 9064842
Filing Date: 2015-06-23
Classification: C01B,H01L,Y10S

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate; a dielectric layer formed in the semiconductor substrate; first plural contacts formed in the dielectric layer such that the dielectric layer comprises: a graphene layer formed on an upper surface of the first portion of the dielectric layer and on an upper surface of the first plural contacts; and second plural contacts formed on the graphene layer such that the graphene layer is formed between the first plural contacts and the second plural contacts, wherein an area of contact of the first plural contacts is substantially the same as an area of contact of the second plural contacts, and the first plural contacts are substantially aligned with the second plural contacts to form a double-contact configuration, and wherein the upper surface of the first plural contacts is substantially co-planar with the upper surface of the first portion of the dielectric layer, such that the graphene layer comprises an undistorted graphene layer.