Patent ID: 8390742
Filing Date: 2013-03-05
Classification: H03F,H04N

Abstract:
1. A semiconductor integrated circuit arranged to perform sag compensation for a video signal output from the semiconductor integrated circuit, comprising: an operational amplifier including a non-inverted input terminal, an inverted input terminal, and an output terminal, in which a video signal is input to the non-inverted input terminal; a first resistor including a first end connected to the inverted input terminal of the operational amplifier and a second end being grounded; a first external terminal to which the output terminal of the operational amplifier is connected; a second external terminal to which the inverted input terminal of the operational amplifier is connected; and a second resistor including a first end connected to the output terminal of the operational amplifier and a second end connected to the inverted input terminal of the operational amplifier, wherein a first capacitor is disposed between the first external terminal and the second external terminal and connected in parallel to the second resistor, and the second resistor has a resistance value that is determined based on a capacitance value of the first capacitor, wherein a filter circuit is connected to a junction point between the first external terminal and the first capacitor, the filter circuit including a second capacitor, a third resistor, and a fourth resistor which are connected in series, and wherein the resistance value of the second resistor, a capacitance value of the second capacitor, and the capacitance value of the first capacitor are set such that a voltage gain falls within a dynamic range of the operational amplifier and a sag ratio of the video signal is smaller than or equal to 0.5%.