Patent ID: 8847331
Filing Date: 2014-09-30
Classification: G06F,H01L

Abstract:
1. A semiconductor chip, comprising: a region including at least nine linear-shaped conductive structures oriented to extend lengthwise in a first direction, each of the at least nine linear-shaped conductive structures having a corresponding lengthwise centerline oriented in the first direction, two of the at least nine linear-shaped conductive structures each forming at least one transistor gate electrode and positioned relative to each other such that their lengthwise centerlines are separated by a first pitch as measured in a second direction perpendicular to the first direction, each of the at least nine linear-shaped conductive structures positioned such that a distance as measured in the second direction between its lengthwise centerline and the lengthwise centerline of at least one other of the at least nine linear shaped conductive structures is substantially equal to the first pitch, a size of the region as measured in the second direction equal to at least nine times the first pitch, the first pitch being a distance measured in the second direction that is less than 193 nanometers, each of the at least nine linear-shaped conductive structures having a corresponding width as measured in the second direction that is less than 193 nanometers, each of the at least nine linear-shaped conductive structures having a corresponding co-planar top surface, the region including a collection of transistors of a first transistor type and a collection of transistors of a second transistor type, the collection of transistors of the first transistor type separated from the collection of transistors of the second transistor type by an inner region that does not include a source or a drain of any transistor, the collection of transistors of the first transistor type including a first transistor of the first transistor type, a second transistor of the first transistor type, a third transistor of the first transistor type, and a fourth transistor of the first transistor type, the collection of transistors of the second transistor type including a first transistor of the second transistor type, a second transistor of the second transistor type, a third transistor of the second transistor type, and a fourth transistor of the second transistor type, the first, second, third, and fourth transistors of the first transistor type and the first, second, third, and fourth transistor of the second transistor type forming a portion of a digital logic circuit, the at least nine linear-shaped conductive structures including a first linear-shaped conductive structure that forms a gate electrode of the second transistor of the first transistor type, wherein any transistor having its gate electrode formed by the first linear-shaped conductive structure is of the first transistor type, the at least nine linear-shaped conductive structures including a second linear-shaped conductive structure that forms a gate electrode of the second transistor of the second transistor type, wherein any transistor having its gate electrode foil red by the second linear-shaped conductive structure is of the second transistor type, the at least nine linear-shaped conductive structures including a third linear-shaped conductive structure that forms a gate electrode of the third transistor of the first transistor type, wherein any transistor having its gate electrode formed by the third linear-shaped conductive structure is of the first transistor type, the at least nine linear-shaped conductive structures including a fourth linear-shaped conductive structure that forms a gate electrode of the third transistor of the second transistor type, wherein any transistor having its gate electrode formed by the fourth linear-shaped conductive structure is of the second transistor type, the lengthwise centerline of the first linear-shaped conductive structure substantially aligned with the lengthwise centerline of the second linear-shaped conductive structure, the lengthwise centerline of the third linear-shaped conductive structure substantially aligned with the lengthwise centerline of the fourth linear-shaped conductive structure, the gate electrode of the first transistor of the first transistor type electrically connected to the gate electrode of the first transistor of the second transistor type, the gate electrode of the second transistor of the first transistor type electrically connected to the gate electrode of the third transistor of the second transistor type, the gate electrode of the third transistor of the first transistor type electrically connected to the gate electrode of the second transistor of the second transistor type, the gate electrode of the fourth transistor of the first transistor type electrically connected to the gate electrode of the fourth transistor of the second transistor type, the second transistor of the first transistor type having a first diffusion terminal electrically connected to a first diffusion terminal of the third transistor of the first transistor type, the first diffusion terminal of the second transistor of the first transistor type electrically connected to a common node, the first diffusion terminal of the third transistor of the first transistor type electrically connected to the common node, the second transistor of the second transistor type having a first diffusion terminal electrically connected to a first diffusion terminal of the third transistor of the second transistor type, the first diffusion terminal of the second transistor of the second transistor type electrically connected to the common node, the first diffusion terminal of the third transistor of the second transistor type electrically connected to the common node, the second transistor of the first transistor type having a second diffusion terminal electrically connected to a first diffusion terminal of the first transistor of the first transistor type, the second transistor of the second transistor type having a second diffusion terminal electrically connected to a first diffusion terminal of the first transistor of the second transistor type, the third transistor of the first transistor type having a second diffusion terminal electrically connected to a first diffusion terminal of the fourth transistor of the first transistor type, the third transistor of the second transistor type having a second diffusion terminal electrically connected to a first diffusion terminal of the fourth transistor of the second transistor type, the first linear-shaped conductive structure including an electrical connection area in physical connection with another conductive structure of the digital logic circuit, the electrical connection area of the first linear-shaped conductive structure being the only portion of the first linear-shaped conductive structure above the inner region that is in physical connection with another conductive structure of the digital logic circuit, the second linear-shaped conductive structure including an electrical connection area in physical connection with another conductive structure of the digital logic circuit, the electrical connection area of the second linear-shaped conductive structure being the only portion of the second linear-shaped conductive structure above the inner region that is in physical connection with another conductive structure of the digital logic circuit, the third linear-shaped conductive structure including an electrical connection area in physical connection with another conductive structure of the digital logic circuit, the electrical connection area of the third linear-shaped conductive structure being the only portion of the third linear-shaped conductive structure above the inner region that is in physical connection with another conductive structure of the digital logic circuit, the fourth linear-shaped conductive structure including an electrical connection area in physical connection with another conductive structure of the digital logic circuit, the electrical connection area of the fourth linear-shaped conductive structure being the only portion of the fourth linear-shaped conductive structure above the inner region that is in physical connection with another conductive structure of the digital logic circuit, the electrical connection area of the first linear-shaped conductive structure extending over a first distance as measured in the first direction, a midpoint of the first distance corresponding to a first direction midpoint of the electrical connection area of the first linear-shaped conductive structure, the electrical connection area of the first linear-shaped conductive structure having a second direction oriented centerline extending in the second direction through the first direction midpoint of the electrical connection area of the first linear-shaped conductive structure, the electrical connection area of the second linear-shaped conductive structure extending over a second distance as measured in the first direction, a midpoint of the second distance corresponding to a first direction midpoint of the electrical connection area of the second linear-shaped conductive structure, the electrical connection area of the second linear-shaped conductive structure having a second direction oriented centerline extending in the second direction through the first direction midpoint of the electrical connection area of the second linear-shaped conductive structure, the electrical connection area of the third linear-shaped conductive structure extending over a third distance as measured in the first direction, a midpoint of the third distance corresponding to a first direction midpoint of the electrical connection area of the third linear-shaped conductive structure, the electrical connection area of the third linear-shaped conductive structure having a second direction oriented centerline extending in the second direction through the first direction midpoint of the electrical connection area of the third linear-shaped conductive structure, the electrical connection area of the fourth linear-shaped conductive structure extending over a fourth distance as measured in the first direction, a midpoint of the fourth distance corresponding to a first direction midpoint of the electrical connection area of the fourth linear-shaped conductive structure, the electrical connection area of the fourth linear-shaped conductive structure having a second direction oriented centerline extending in the second direction through the first direction midpoint of the electrical connection area of the fourth linear-shaped conductive structure, the second direction oriented centerline of the electrical connection area of the first linear-shaped conductive structure not aligned with the second direction oriented centerline of the electrical connection area of the third linear-shaped conductive structure, the first linear-shaped conductive structure having an inner extension distance measured in the first direction from an inner end of the first linear-shaped conductive structure located within the inner region to a portion of the electrical connection area of the first linear-shaped conductive structure nearest to the inner end of the first linear-shaped conductive structure, the second linear-shaped conductive structure having an inner extension distance measured in the first direction from an inner end of the second linear-shaped conductive structure located within the inner region to a portion of the electrical connection area of the second linear-shaped conductive structure nearest to the inner end of the second linear-shaped conductive structure, the third linear-shaped conductive structure having an inner extension distance measured in the first direction from an inner end of the third linear-shaped conductive structure located within the inner region to a portion of the electrical connection area of the third linear-shaped conductive structure nearest to the inner end of the third linear-shaped conductive structure, the fourth linear-shaped conductive structure having an inner extension distance measured in the first direction from an inner end of the fourth linear-shaped conductive structure located within the inner region to a portion of the electrical connection area of the fourth linear-shaped conductive structure nearest to the inner end of the fourth linear-shaped conductive structure, at least two of the inner extension distances of the first, second, third, and fourth linear-shaped conductive structures being different.