Patent ID: 7714611
Filing Date: 2010-05-11
Classification: H03K,Y10T

Abstract:
1. An integrated circuit, comprising: a L-level permutable switching network (L-PSN); wherein the L-PSN comprises: wherein the I[i−1] number of conductors of the (i−1)-th level of conductors selectively couple to (I[i]/D[i]) number of conductors in each of the D[i] sets of conductors of the i-th level of conductors through a respective I[i−1] number of switches of the Σ each conductor of the (i−1)-th level of conductors selectively couples to one conductor in each of the D[i] sets of conductors of the i-th level of conductors through a respective switch of the respective I[i−1] number of switches for i=[1:L+1]; for an j selected from j=[1:L] and D wherein each of the D for T>1 and L>1, any D wherein the D