Patent ID: 8890237
Filing Date: 2014-11-18
Classification: H01L

Abstract:
1. A power semiconductor device, a cell region and a terminal region being set in the device, the device comprising: a first electrode; a semiconductor substrate provided on the first electrode, a cell trench being in an upper surface of the semiconductor substrate in the cell region, a terminal trench being in the upper surface of the semiconductor substrate in a region including a boundary between the cell region and the terminal region, a width of the terminal trench being wider than a width of the cell trench; a second electrode provided on the semiconductor substrate in the cell region; a third electrode contacting the upper surface of the semiconductor substrate in the terminal region, the third electrode being separated from the second electrode; a gate insulating film provided on an inner surface of the cell trench; a gate electrode provided in an interior of the cell trench; and an insulating member entirely filling the terminal trench such that conductive material is not within an interior of the terminal trench, the semiconductor substrate including: the insulating member being disposed between the third portion and the second portion in a direction from the cell region toward the terminal region.