Patent ID: 9135100
Filing Date: 2015-09-15
Classification: G06F,G11C

Abstract:
1. An apparatus comprising: a memory structure included in a memory device; a control unit included in the memory device to provide information obtained from the memory structure during a memory operation to a host device in response to a command from the host device; and a repair unit included in the memory device to repair a portion in the memory structure in a memory repair operation if the control unit receives a notification from the host device indicating that the host device has detected an error in the information obtained from the memory structure, wherein the repair unit is configured to update a table with information associated with a defective portion in the memory structure if the repair unit repairs the portion in the memory structure in response to the notification from the host device, wherein the table includes information associated with an additional memory repair operation performed before the information from the memory structure in the memory device is provided to the host device.