Patent ID: 8193602
Filing Date: 2012-06-05
Classification: H01L

Abstract:
1. A Schottky diode comprising: a semiconductor structure having an n-type region, the n-type region having a dopant concentration; a first n-type strip that touches the semiconductor structure, the first n-type strip having a dopant concentration that is greater than the dopant concentration of the n-type region, the first n-type strip including a first region with a dopant concentration that is greater than the dopant concentration of the n-type region, and a second region with a dopant concentration greater than the dopant concentration of the first region; a second n-type strip that touches the semiconductor structure, the second n-type strip having a dopant concentration that is greater than the dopant concentration of the n-type region, and being spaced apart from the first n-type strip, no doped region with an n-type and a dopant concentration greater than the dopant concentration of the n-type region touching both the first n-type strip and the second n-type strip; a shallow trench isolation (STI) ring that touches the semiconductor structure to laterally enclose the first n-type strip and the second n-type strip, the STI ring touching the first n-type strip and the second n-type strip; a first metal strip that touches a top surface of the first n-type strip; a second metal strip that touches a top surface of the second n-type strip; a metal region that touches the semiconductor structure, lies laterally between the first metal strip and the second metal strip, and spaced apart from the first metal strip and the second metal strip, the first metal strip, the second metal strip, and the metal region lying in a single plane; a first non-conductive strip that touches a top surface of the semiconductor structure, the first non-conductive strip lying laterally between the first metal strip and the metal region; a second non-conductive strip that touches the top surface of the semiconductor structure, the second non-conductive strip being spaced apart from the first non-conductive strip, and lying laterally between the second metal strip and the metal region; a first p-type region that touches the semiconductor structure, the first p-type region lying laterally between the first n-type strip and the second n-type strip; and a second p-type region that touches the semiconductor structure, the second p-type region lying laterally between the first n-type strip and the second n-type strip, and being spaced apart from the first p-type region such that no p-type region touches both the first p-type region and the second p-type region, the STI ring touching the first p-type region and the second p-type region.