Patent ID: 7913141
Filing Date: 2011-03-22
Classification: G01R

Abstract:
1. A system for cutting off power supply to a test circuit during a normal operation mode of an integrated circuit (IC) with the test circuit embedded therein, the system comprising: a main circuit coupled to the test circuit, the test circuit being designed to test the main circuit; a set of main pads coupled to the main circuit and the test circuit via a first multiplexer and a second multiplexer, respectively, wherein the first multiplexer is designed to be turned off during a test mode such that the main pads become electrically connected to the test circuit during the test mode; a mode pad coupled to the test circuit for initiating the test mode; a power supply coupled to both the main circuit and the test circuit for supplying power thereto at least during the test mode of the IC, the power supply being the only power source to the entire test circuit; a switch coupled between the power supply and the test circuit, wherein when the switch is turned off, the test circuit loses power entirely, and when the switch is turned on the test circuit receives power; and a controller coupled between the mode pad and the switch and configured to turn the switch on during the test mode and to turn the switch off during the normal operation mode.