Patent ID: 6297132
Filing Date: 2001-10-02
Classification: H01L

Abstract:
A method of fabricating a metal oxide semiconductor field effect, (MOSFET), device, on a semiconductor substrate, comprising the steps of:forming a well region, in said semiconductor substrate;forming a first opening, with a width between about 0.10 to 1.0 um, in a composite insulator layer, exposing a portion of said well region to be used for a channel region, for said MOSFET device;forming a threshold voltage adjust region in a top portion of said channel region;forming first spacers on the sides of said first opening, in said composite insulator layer, resulting in a second opening, with a width between about 0 to 0.10 um, wherein said first spacers, on the sides of said first opening, are between about 500 to 2000 Angstroms in thickness, comprised of either polysilicon, at a thickness between about 500 to 2000 Angstroms, or comprised of a composite polysilicon-silicon oxide layer, at a thickness between about 600 to 3000 Angstroms;forming a narrow lateral delta doping region in a bottom portion of said channel region, exposed in said second opening, with said narrow, anti-punchthrough region, deeper in said channel region, than said threshold voltage adjust region;removing said first spacers from the sides of said first opening;growing a gate insulator layer on the top surface of said channel region, exposed in said first opening;forming a polysilicon gate structure, on said gate insulator layer, in said first opening;removing said composite insulator layer;forming a lightly doped source/drain region, in an area of said semiconductor substrate, not covered by said polysilicon gate structure;forming second spacers on the sides of said polysilicon gate structure; andforming a heavily doped source/drain region, in an area of said semiconductor substrate, not covered by said polysilicon gate structure, or by said second spacers.