Patent ID: 9159588
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A method of packaging a semiconductor die comprising: providing a heat sink flange having an upper surface and a lower surface spaced apart by a flange thickness; attaching said semiconductor die to said upper surface of said heat sink flange; providing a frame structure having a perimeter that defines a cavity and terminal pads surrounding said cavity, said frame structure being pre-formed to include bent ones of said terminal pads, each of said terminal pads including a first surface and a second surface, said first surface being spaced apart from said second surface by a distance that is greater than said flange thickness; mechanically staking said frame structure to said heat sink flange such that at least a portion of said first surface of said each terminal pad overlies said upper surface of said heat sink flange and such that said lower surface of said heat sink flange and said second surface of said each of said terminal pads are in coplanar alignment; electrically connecting said semiconductor die with said first surface of said terminal pads using interconnects; and encasing said heat sink flange, said frame structure, said semiconductor die, and said interconnects in an encapsulant wherein at least said lower surface of said heat sink flange and said second surface of said each of said terminal pads remain exposed from said encapsulant.