Patent ID: 6255177
Filing Date: 2001-07-03
Classification: H01L

Abstract:
A fabrication method for a salicide gate comprising the steps of:forming a gate structure on a substrate, wherein the gate structure comprises a polysilicon gate and a selective-deposition dummy layer formed thereon and the selective-deposition dummy layer has a thickness;forming a source/drain region on both sides of the gate structure in the substrate;selectively forming a dielectric layer on the substrate, wherein a thickness of the dielectric layer on the source/drain region is greater than the thickness of the dielectric layer of the selective-deposition dummy layer;removing a portion of the dielectric layer until the selective-deposition dummy layer is exposed;removing the selective-deposition dummy layer to expose the polysilicon gate; andforming a salicide layer on the polysilicon gate to complete a formation of the salicide gate.