Patent ID: 6051479
Filing Date: 2000-04-18
Classification: H01L

Abstract:
A method of forming a shallow trench isolation in a semiconductor substrate, comprising:forming a pad oxide layer on the substrate;performing a deposition step to form a mask layer;patterning the mask layer to form a patterned mask layer, wherein the patterned mask layer remains from the mask layer and exposes a part of the pad oxide layer;removing a exposed pad oxide and a part of the substrate under the exposed pad oxide layer to form a trench;forming a liner oxide layer on a surface of the trench;forming an insulation layer over the patterned mask layer and to fill the trench;planarizing the insulation layer until exposing the patterned mask layer;removing the insulation layer until having a surface level substantially the same as the substrate;removing a part of the patterned mask layer to expose the pad oxide layer around the trench; andperforming a thermal oxidation to thicken the exposed pad oxide layer; andremoving the patterned mask layer.