Patent ID: 6373310
Filing Date: 2002-04-16
Classification: H03K

Abstract:
A multiple input set/reset circuit comprising: cross-coupled inverters coupled between first and second nodes; at least one first input circuit coupled to said first node to receive a plurality of first input signals, wherein said at least one first input circuit drive: said first node to a first logic state when at least one of said plurality of said first input signals is asserted;at least one second input circuit coupled to said second node to receive plurality of second input signals wherein said at least one second input circuit drives said second node to said first logic state when at least one of said plurality of said second input signals is asserted; a first switching circuit to change the logic state of one of said first and second nodes in response to the other node changing logic state; and a second switching circuit to disable the first switching circuit after said first and second nodes have completed a logical state change in response to one of said plurality first and second input signals asserted.