Patent ID: 6703696
Filing Date: 2004-03-09
Classification: H01L

Abstract:
A semiconductor package comprising a semiconductor device mounted on a die-pad supported by suspending leads of a lead frame, wires electrically connecting terminal electrodes arranged on a top face of the semiconductor device with terminals of the lead frame, wires bonding other grounding electrodes arranged on the top face of the semiconductor device to the surface of the die-pad for grounding, and molding compound which encapsulates an outer area of the semiconductor device including all the wires, wherein at least one plated portion of the die-pad is plated with silver for connecting of the wires on the surface of the die-pad and is formed on the die-pad so as to be positioned between a peripheral edge of the die-pad and an outer edge of the semiconductor device with spaces being defined between both of the edges and each said plated portion positioned therebetween, the plated portion plated with silver being formed into a shape of a line to define a linear shaped area which extends continuously about said semiconductor device, said plated portion being spaced outwardly of said semiconductor edge such that one said unplated portion is defined therebetween.