Patent ID: 8924836
Filing Date: 2014-12-30
Classification: H04L

Abstract:
1. A frame processing apparatus, the frame including a header and a data portion, comprising: a header analyzing unit that analyzes a header of a first received frame and generates first header information indicating a source of the first received frame, the first received frame being inputted by a network interface from a network; a checksum judging unit that calculates a checksum of the first received frame, and upon completion of the calculation, judges “pass” or “fail” for the checksum; a connection information reading unit that reads first connection information corresponding to the first header information from a first storage, the first storage storing connection information, the connection information indicating a write location in a second storage for the data portion corresponding to a source of a received frame, the second storage storing the data portions of frames; a write location identifying unit that identifies a write location in the second storage for the data portion of the first received frame based on the first connection information; a data writing unit that starts writing the data portion of the first received frame for which the checksum judging unit has calculated the checksum to the write location in the second storage identified by the write location identifying unit before the checksum of the first received frame is judged; and a connection information writing unit that generates an updated first connection information based on the first header information and, if the judgment result is “pass,” writes the updated connection information to the first storage while the data writing unit is writing to the second storage.