Patent ID: 7245342
Filing Date: 2007-07-17
Classification: G02F

Abstract:
1. An array substrate for a liquid crystal display device, comprising: a plurality of gate lines on a substrate having a display region and a peripheral region, each of the gate lines having a gate pad disposed in the peripheral region at one end of the gate line; a plurality of data lines crossing the gate lines, wherein each of the data lines includes a data pad disposed in the peripheral region at one end of the data line; a plurality of thin film transistors, each disposed at a crossing of the gate lines and the data lines, wherein the thin film transistors are in the display region; a passivation layer over the gate lines and the data lines; a pixel electrode on the passivation layer in the display region; a first conductive pattern and a second conductive pattern that are both in a same layer on the passivation layer in the non-display region; and an orientation film on the first conductive pattern, wherein the first conductive pattern is disposed between the gate pads and the display region, and the second conductive pattern is disposed between the data pads and the display region, and wherein at least two gate lines are adjacent to and parallel to each other, and the first conductive pattern is formed between the adjacent gate lines and parallel to the adjacent gate lines.