Patent ID: 6546465
Filing Date: 2003-04-08
Classification: G06F

Abstract:
A multi-processor computer system, comprising:a plurality of processors, each processor comprising or coupled to at least one memory cache, one cache control unit, and one interprocessor router; a memory coupled to each processor; at least one input/output device coupled to at least one processor; and a memory controller configured to accept memory requests from the plurality of processors and manage a directory-based coherence protocol, said memory controller further comprising: a front-end configured to manage the directory based coherence protocol and comprising the directory in-flight table and a decoder configured to read and write to each entry in the directory in-flight table; a middle section configured to map memory addresses in the memory requests to an actual memory location; and a back-end configured to packetize memory request information for communication with memory; wherein the front-end is configured to validate directory information for each transaction in the directory in-flight table; wherein the memory requests from the plurality of processors are allocated in a directory in-flight table and wherein when a plurality of memory requests are directed at the same memory address, redundant directory read and directory write requests are not delivered to memory and are executed internal to the memory controller; and wherein each memory request entry in the directory in-flight table comprises: a memory address field; a requester processor identification field; a valid bit field; a directory state field; a behind entry number field; and an end bit field; wherein when the valid bit in a transaction entry is not set, the front-end decoder sends a directory read request to memory and updates the directory state field of that entry with directory state information returned from memory in response to the read request and wherein when the valid bit is set, the directory state of that entry is assumed valid and the front-end decoder does not send a read request to memory.