Patent ID: 7265621
Filing Date: 2007-09-04
Classification: H03F

Abstract:
1. An operational amplifier comprising: a pair of differential input transistors, each transistor having a source terminal, a gate terminal and a drain terminal, the pair of differential input transistors being connected together at the source terminals, the gate terminals of the pair of differential input transistors receiving a pair of differential input signals; a pair of cascode transistors, each cascode transistor having a source terminal, a gate terminal and a drain terminal, each cascode transistor being connected to the respective input transistor so as to form a cascode, the drain terminals of the pair of cascode transistors providing a pair of differential output signals; and a keep-alive circuit connected to provide first and second bias currents to the source terminals of the pair of cascode transistors and a third bias current to the source terminals of the pair of differential input transistors, the keep-alive circuit comprising: wherein each of the first and second bias currents is a variable current being a function of a voltage at the source terminal of the respective cascode transistor and is a variable fraction of the third bias current conducted by the tail current transistor.