Patent ID: 6259143
Filing Date: 2001-07-10
Classification: H01L

Abstract:
A semiconductor memory device of NOR type mask ROM comprising:a semiconductor substrate of one conductive type;an active region formed on the substrate of said semiconductor substrate;embedded digit lines arranged in stripes at position sandwiching said active region, each of said embedded digit lines being composed of a first groove provided in the surface side region of said semiconductor substrate, a second groove provided at the substrate lower side of said first groove, an insulating film provided on an inner surface of said second groove, and a semiconductor layer doped with impurity of other conductive type embedded in said first groove and second groove;a gate insulating film formed on the surface of said semiconductor substrate;word lines formed in stripes extended in a direction perpendicular to said embedded digit lines on said gate insulating film; anda diffusion layer of other conductive type formed by diffusion of the impurity contained in said semiconductor layer through the side surface of said first groove in said active region.