Patent ID: 7089461
Filing Date: 2006-08-08
Classification: G06F

Abstract:
1. A method for implementing uncorrectable error isolation in a computer memory system while the system continues to run, said method comprising the steps of: utilizing a memory controller, performing data fetching from a system memory, capturing error information, and responsive to detecting an uncorrectable error, the computer memory system does not check stop and said memory controller generating a predefined attention to a service processor and the computer memory system continues to run; said service processor responsive to said predefined attention, utilizing a processor runtime diagnostic (PRD) program, reading captured error data and identifying a memory extent with said uncorrectable error; said memory controller responsive to said service processor for performing accelerated scrubbing of said identified memory extent with said uncorrectable error, capturing error information and responsive to a scrub correctable error threshold being exceeded, sending a predefined scrub threshold exceeded attention to the service processor while the computer memory system continues to run; and said service processor utilizing said processor runtime diagnostic (PRD) program, reading captured error data from said memory controller and identifying a failed memory chip while the computer memory system continues to run.