Patent ID: 7781332
Filing Date: 2010-08-24
Classification: H01L

Abstract:
1. A method for fabricating an interconnect structure comprising: forming an intermetal dielectric layer on a substrate; forming a via hole in said intermetal dielectric layer and filling a lower portion of said via hole with a disposable via fill material; forming an interconnect line trench in said intermetal dielectric layer over said via hole; forming a protective spacer on sidewalls of said interconnect line trench and on sidewalls of an upper portion of said via hole, wherein said protective spacer contains one of silicon dioxide, an organosilicate material with penant alkyl, aryl or allyl groups, and organosilicate materials having linked carbo-silane bonds, and wherein at least a portion of a bottom surface of said interconnect line trench is not covered by said protective spacer; and performing a plasma strip to remove said disposable via fill material, while said protective spacer protects said intermetal dielectric layer covered by said protective spacer from damage during said plasma strip.