Patent ID: 6587062
Filing Date: 2003-07-01
Classification: G06F,H03M

Abstract:
A multi-mode interface circuit for coupling a delta sigma modulator to a processor or digital filter, comprising:(a) a decoder for decoding a plurality of mode selection inputs to produce a plurality of control signals; (b) an oscillator receiving a first control signal from the decoder for producing a first internal clock signal in response to the first control signal; (c) a first multiplexer having a first input coupled to receive an external clock signal and a second input coupled to receive the first internal clock signal and a selection input coupled to receive a second control signal from the decoder for selectively switching the first internal clock signal or the external clock signal to a first conductor to produce a second internal clock signal thereon; (d) a code generator circuit receiving the second internal clock signal and a 1-bit data signal produced by the delta sigma modulator in response to an analog input signal producing a clock input signal to be applied to a clock input of the delta sigma modulator, a third internal clock signal, and a fourth internal clock signal in response to the second internal clock signal, and for producing a modulated signal in response to both the second internal clock signal and the 1-bit data signal; (e) a second multiplexer having a first port coupled to receive the third internal clock signal, a second port coupled to receive the fourth internal clock signal, a third port coupled to a predetermined signal, and a selection input coupled to receive a third control signal from the decoder for selectively switching one of the third and fourth clock signals onto a clock conductor to produce an output clock signal thereon; and (f) a third multiplexer having a first input coupled to receive the modulated signal, a second input coupled to receive the 1-bit data signal, and a selection input coupled to receive a fourth control signal from the decoder for selectively switching the modulated signal or the 1-bit data signal onto a data output conductor to produce a data output signal thereon.