Patent ID: 9006053
Filing Date: 2015-04-14
Classification: H01L

Abstract:
1. A method for fabricating a MOSFET integrated with Schottky diode (MOSFET/SKY), expressed in an X-Y-Z Cartesian coordinate system with the X-Y plane parallel to its major semiconductor chip plane, comprising: a) forming, in an epitaxial layer overlaying a semiconductor substrate, a gate trench and depositing gate material therein; b) forming a body region in the epitaxial layer, a source region atop the body region and a dielectric region atop the gate trench and the source region; c) etching a top contact trench (TCT) with vertical side walls defining a X-Y cross sectional boundary for containing a Schottky diode there within, said X-Y cross sectional boundary d) creating: e) forming a metal layer: