Patent ID: 8426299
Filing Date: 2013-04-23
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: alternately stacking a plurality of dielectric layers and a plurality of conductive layers on a substrate to form a stack structure; forming a first photoresist pattern on the stack structure; forming a second photoresist pattern whose thickness is reduced as the second photoresist pattern extends from the center of the stack structure towards a periphery of the stacked structure by performing a heat treatment on the first photoresist pattern; etching the stack structure through the second photoresist pattern to form a slope profile on the stack structure whose thickness is reduced as the slope profile extends from the center of the stack structure towards the periphery of the stacked structure; and forming a step-type profile along the periphery of the stack structure by selectively etching the dielectric layer.