Patent ID: 8461887
Filing Date: 2013-06-11
Classification: H03L

Abstract:
1. An integrated circuit comprising: a reference-signal source to generate a reference signal having a basic frequency; a phase locked loop including a second frequency divider to carry out the frequency division on the signal generated by the voltage-controlled oscillator by M to generate a second frequency-divided signal; and a signal processing circuit to operate in synchronization with the second frequency-divided signal, wherein a minimum absolute value of a difference between the basic frequency multiplied by “K” (“K” is an arbitrary integer equal to or higher than 1) and a frequency of the second frequency-divided signal is equal to or less than a low cutoff frequency of a bandpass filter or equal to or higher than a high cutoff frequency of the bandpass filter, the bandpass filter being represented by a transfer function from an input of the voltage-controlled oscillator to an output of the phase locked loop.