Patent ID: 7582567
Filing Date: 2009-09-01
Classification: H01L

Abstract:
1. A method for forming complimentary metal oxide semiconductor (CMOS) devices on a semiconductor substrate comprising: forming gate structures within a first region and within a second region of the semiconductor substrate, the gate structures including a conductive layer and a hard mask that overlies the conductive layer; forming a first dielectric layer that extends over the gate structures; and performing a first etch process so as to remove the hard mask from the gate structures in the second region of the semiconductor substrate and expose the conductive layer, the first etch process removing portions of the first dielectric layer and exposing some of the top surface of the semiconductor substrate in the second region; performing a salicide process so as to form a plurality of silicide segments in the second region of the semiconductor substrate; forming self-aligned contacts within the first region of the semiconductor substrate; and forming contacts within the second region of the semiconductor substrate that are not self-aligned contacts.