Patent ID: 7080362
Filing Date: 2006-07-18
Classification: G06F

Abstract:
1. A method for processing instructions in a central processing unit (CPU) capable of executing instructions of a plurality of instruction sets, including a stack-based and a register-based instruction set, the method, comprising: maintaining data for register-based instructions from the register-based instruction set and an operand stack for operands associated with stack-based instructions from the stack-based instruction set in a first register file, wherein at least some of the operands are moved between the register file and memory via at least one of an overflow and underflow mechanism; maintaining an indication of a depth of the operand stack; and processing the register-based instructions including generating a first output, and processing the first output in an execution unit using the data from the first register file; and processing the stack-based instructions including generating a second output, and processing the second output in the execution unit using the operands from the first register file; and generating exceptions in respect of selected stack-based instructions.