Patent ID: 6385065
Filing Date: 2002-05-07
Classification: H02M

Abstract:
A charge pump system for connection to a power supply voltage and a clock, comprising:a first phase bootstrapping circuit responsive to the clock for providing a first phase clock signal with a fixed multiple of the power supply voltage; inverting circuitry responsive to the clock to provide an inverted clock output opposite in phase to the clock; a second phase bootstrapping circuit responsive to the inverted clock output for providing a second phase clock signal of opposite phase to the first phase clock signal and with a fixed multiple of the power supply voltage; and charge pump circuitry responsive to the power supply voltage and the first and second phase clocks whereby the power supply voltage is increased by alternately adding charge to the power supply voltage from the power supply voltage in each cycle of the first and second phase clock signals whereby the first and second phase clock signals with fixed multiples of the power supply voltage allow for charge boosting in a limited number of stages; wherein the first phase bootstrapping circuit includes:a first phase bootstrapping circuit input and output, the input connected to the clock; a first bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input; a second bootstrapping circuit having an input and an output, the input connected to the first phase bootstrapping circuit input; an intermediate charge pump having an input and an output, the input connected to the second bootstrapping circuit output; an opposite phase clock generation circuit having an input and an output, the input connected to the first phase bootstrapping circuit input, and a summing circuit having a main input, a supply voltage input, a clock input, and an output, the main input connected to the first bootstrapping circuit output, the supply voltage input connected to the intermediate charge pump output, the clock input connected to the opposite phase clock generation circuit output and the output connected to the first phase bootstrapping circuit output.