Patent ID: 6813208
Filing Date: 2004-11-02
Classification: G11C

Abstract:
A method of sensing data stored in a selected resistive memory cell, the method comprising:generating a first count representing the logic state of an unknown initial data bit stored in the selected memory cell; generating a second count representing a data bit having a first known logic state stored in the selected memory cell; generating a third count representing a data bit having a second known logic state stored in the selected memory cell, generating the first, second, and third counts comprising applying a current through the selected resistive memory cell and sensing the voltage developed responsive to the applied current, generating a plurality of up count signals and down count signals responsive to the sensed voltage, and adjusting the count responsive to the up count and down count signals; and determining the logic state of the unknown initial data bit stored in the selected memory cell from the first, second, and third counts.