Patent ID: 6344688
Filing Date: 2002-02-05
Classification: H01L

Abstract:
A multi-chip package, comprising:a flexible tape having a first number of device blocks, a second number of interconnect pads surrounding each of said device blocks, a third number of device pads in each of said device blocks, a fourth number of test pads, first electrodes connecting said test pads to said interconnect pads, and second electrodes connecting said interconnect pads to said device pads; a fifth number of devices attached to said device pads in said device blocks of said flexible tape thereby forming a flexible tape assembly; a substrate having a first surface, a second surface, a sixth number of cavities, a second number of peripheral pads on said first surface of said substrate, a second number of input/output pads on said second surface of said substrate, and a second number of plated through holes wherein each of said plated through holes is connected to one of said peripheral pads and one of said input/output pads and extends from said first surface to said second surface; and a substrate assembly formed by attaching said flexible tape assembly to said substrate by connecting said interconnect pads on said flexible tape to said peripheral pads on said substrate so that said devices attached to said device pads are within said cavities of said substrate.