Patent ID: 7957150
Filing Date: 2011-06-07
Classification: H05K

Abstract:
1. A printed circuit board design support apparatus for determining arrangement of a semiconductor device and a decoupling capacitor connected to the semiconductor device on a printed circuit board, comprising: printed circuit board information inputting means for inputting layer structure information and outer shape information on the printed circuit board; component information inputting means for inputting a component list which includes power source ground information of the semiconductor device, electric characteristic information on a capacitor component of each type as a candidate for the decoupling capacitor, and the number of decoupling capacitors on the printed circuit board; component arrangement inputting means for inputting arrangement information of the semiconductor device and the decoupling capacitor on the printed circuit board, the arrangement information being determined based on the layer structure information and the outer shape information inputted in the printed circuit board information inputting means, the component list inputted in the component information inputting means, and a circuit connection information list and a wiring design rule which are prepared; electromagnetic field analyzing means for performing electromagnetic analysis in accordance with the layer structure information, the outer shape information on the printed circuit board, the component list and the wiring design rule to calculate inductance network information; inductance parameter calculating means for calculating inductance parameters from the inductance network information obtained by said electromagnetic field analyzing means and the arrangement information or decoupling capacitor inputted in the component arrangement inputting means; parameter set calculating means for forming an orthogonal array from the calculated inductance parameters, type information of the decoupling capacitor and the number of mounted decoupling capacitors; evaluation index calculating means for calculating an electric characteristic index by executing circuit-analysis based on the inductance network information calculated by said electromagnetic field analyzing means and the parameter sets of the orthogonal array formed by said parameter set calculating means; evaluation equation calculating means for calculating an evaluation equation of a polynomial equation representing the electric characteristic index calculated by said evaluation index calculating means by using combinations of the parameters of the orthogonal array; noise voltage estimating means for calculating a noise voltage of a power supply for the arrangement information inputted in the component arrangement inputting means by using the evaluation equation of the polynomial equation calculated by the evaluation equation calculating means; and decision means for comparing the noise voltage of the power supply calculated by the noise voltage estimating means to a predetermined target value of the noise voltage, wherein if the calculated noise voltage is higher than the target value of the noise voltage then the printed circuit board is rearranged by the component arrangement inputting means; and wherein the rearranged printed circuit board is repeatedly processed by the electromagnetic field analyzing means, the inductance parameter calculating means, the parameter set calculating means, the evaluation index calculating means, the evaluation equation calculating means and the noise voltage estimating means until the noise voltage of the power supply calculated by the noise voltage estimating means is less than the target value of the noise voltage of the power supply.