Patent ID: 8791572
Filing Date: 2014-07-29
Classification: H01L

Abstract:
1. A microelectronic structure comprising a metal silicide consisting essentially of a semiconductor element and a metal element selected from the group consisting of nickel, cobalt, iron, titanium, tungsten, erbium, ytterbium, platinum, vanadium, and combinations thereof, the metal silicide located interposed between a buried dielectric layer of a substrate and a dielectric capping layer, the metal silicide comprising an interconnect portion of a single material layer beneath the capping layer and two via portions that are contiguous with the interconnect portion and penetrating through the capping layer, wherein one of the two via portions is present at each end of the interconnect portion, wherein at least the interconnect portion of the metal silicide is free of stress and wherein an entirety of a bottommost surface of said interconnect portion of said metal silicide is in direct contact with an uppermost surface of said buried dielectric layer of a substrate.