Patent ID: 7423784
Filing Date: 2008-09-09
Classification: H04N

Abstract:
1. An image processing apparatus comprising: a plurality of image sensor chips, which are linearly arrayed, which reads a document and outputs image signals, each of said plurality of image sensor chips including a plurality of pixels; a memory which stores a plurality of linearity correction tables for correcting linearity of signals output from said plurality of image sensor chips, said linearity correction tables being shared among the plurality of image sensor chips; a register which stores a correspondence relationship, between each of said image sensor chips and one of said linearity correction tables stored in said memory, said correspondence relationship being based on image signals output from each of said plurality of image sensor chips which read a density reference member; a selector which respectively selects one of said plurality of linearity correction tables stored in said memory for each of said plurality of image sensor chips in accordance with said correspondence relationship stored in said register; and a corrector which respectively performs linearity correction of correcting linearity of signals output from said plurality of image sensor based on the linearity correction tables selected for said plurality of image sensor chips by said selector.