Patent ID: 6667199
Filing Date: 2003-12-23
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device comprising the steps of:forming a dummy gate electrode in a region on the semiconductor substrate, where a gate electrode is formed; forming a source and a drain by using said dummy gate electrode as a mask; forming a first sidewall spacer on the sidewall of said dummy gate electrode and forming a second sidewall spacer on the sidewall of first sidewall spacer; forming an interlayer dielectric covering said dummy gate electrode on said semiconductor substrate; smoothing the top surface of said interlayer dielectric; exposing the top surface of said dummy gate electrode; removing said dummy gate electrode and said first sidewall spacer to form a groove having a sidewall of the second sidewall spacer and a bottom of said semiconductor substrate; depositing a high-dielectric constant gate insulating film with the same thickness as that of said first sidewall spacer, so as to cover the bottom and sidewall of said groove on said semiconductor substrate; and embedding the gate electrode in said groove.