Patent ID: 6076127
Filing Date: 2000-06-13
Classification: G06F

Abstract:
A packaged semiconductor chip for configuring the arbitration of a common bus capable of being controlled by a bus master component, wherein semiconductor chip is capable of being directly coupled to said a bus master component capable of controlling the bus is coupled to the common bus and to an arbitration control bus, and wherein other bus master components may be coupled to said arbitration control bus, said packaged semiconductor chip comprising:a bus master logic unit for controlling the communication of signals over said common bus, said packaged semiconductor chip including means for coupling said bus master logic unit to said common bus;an arbitration control logic unit coupled to said bus master logic unit for providing single point arbitration control of said common bus among at least one of said bus master components and said bus master logic unit coupled to said common bus, said packaged semiconductor chip including means for coupling said arbitration control logic unit to said arbitration control bus for receiving and transmitting arbitration control signals and for transmitting arbitration configuration signals thereover; andan arbitration configuration logic unit coupled to said arbitration control logic unit for determining whether to enable said arbitration control logic unit to provide single point arbitration control of said common bus, said packaged semiconductor chip including means for coupling said arbitration configuration logic unit to said arbitration control bus for receiving arbitration configuration signals thereover;wherein said arbitration configuration logic unit is arranged so as not to require separate dedicated input lines on the packaged semiconductor chip.