Patent ID: 7607133
Filing Date: 2009-10-20
Classification: G06F

Abstract:
1. Apparatus for processing data, said apparatus comprising: a processor configured to perform processing operations under control of program instructions; a stack data store configured to store one or more sets of state data, each set associated with a respective processing performed by said processor when an interrupt event occurs, each said interrupt event is associated with a priority that is programmable both before and after said interrupt event occurs; and an interrupt controller, in response to a first interrupt event, for storing to said stack data store first state data associated with processing being performed when said first interrupt event occurred and for redirecting program instruction execution to a first interrupt handling program and, upon completion of said first interrupt handling program, for detecting if one or more second interrupt events having a higher priority than said processing that was interrupted by said first interrupt event has occurred during execution of said first interrupt handling program and (i) if said one or more second interrupt events has occurred, then redirecting program instruction execution to a second interrupt handling program without saving further state data to said stack data store; and (ii) if said one or more second interrupt event has not occurred, then reloading said first state data from said stack data store and resuming said processing that was interrupted by said first interrupt event, wherein when said stack data store is storing a plurality of sets of state data, each set associated with a respective one of a plurality of interrupt events, said interrupt controller is further configured to determine a stack priority level corresponding to the highest priority interrupt event among said plurality of interrupt events associated with said plurality of sets of state data stored in said stack data store; and said interrupt controller is further configured to detect that said one or more second interrupt events have a higher priority than said processing that was interrupted by said first interrupt event if said one or more second interrupt event has a higher priority than said stack priority level.