Patent ID: 6030871
Filing Date: 2000-02-29
Classification: G11C,H01L

Abstract:
A method of manufacturing a mask programmable array having a multiplicity of dual bit cells, wherein each cell has a channel and two bit storage areas self-aligned to the junctions of the channel and bit lines, and the two bits are read in opposite directions, the method comprising the steps of:depositing a bit line mask on a substrate in columns, said columns defining said channels thereunder and diffusion bit lines therebetween, each of said channels having a left and a right bit line junction with its neighboring said diffusion bit lines;separately programming the bit storage areas at said left and right bit line junctions; andremoving said bit line mask,wherein each step of programming includes the steps of:depositing a junction mask over all bit line junctions which are to remain unprogrammed;implanting a self-aligned threshold pocket implant at an angle of 15-45.degree. from vertical on said array, wherein said angle is to the right when programming said left bit line junctions and to the left when programming said right bit line junctions; andremoving said junction mask.