Patent ID: 6974969
Filing Date: 2005-12-13
Classification: H01L

Abstract:
1. A transistor device comprising: a series of layers formed on a substrate, said layers including a first set of one or more layers each comprising n-type dopant material, a second set of layers forming a p-type modulation doped quantum well structure, and a third set of one or more layers each comprising n-type dopant material, wherein said first set of layers includes an n-type ohmic contact layer; a collector terminal metal layer that is formed on one layer of said third set; a plurality of p-type ion implant regions that are disposed on opposite sides of said collector terminal metal layer, said p-type ion implant regions operably coupled to said p-type modulation doped quantum well structure; a patterned base terminal metal layer that is formed on said p-type ion implant regions for contact to said p-type modulation doped quantum well structure; and a patterned emitter terminal metal layer that is formed on said n-type ohmic contact layer on said opposite sides of said collector terminal metal layer; wherein said patterned base terminal metal layer is interdigitated with respect to said patterned emitter terminal layer on both of said opposite sides of said collector terminal metal layer.