Patent ID: 8966339
Filing Date: 2015-02-24
Classification: H03M

Abstract:
1. A solid-state storage system, comprising: a non-volatile memory array configured to store a data unit in a block of memory; a rotate-left/right shifter configured to transform values; and a controller configured to read data values of the data unit from the non-volatile memory array and decode the data values using low-density parity-check (LDPC) quasi-cyclic coding by at least: wherein a number of the one or more non-overlapping sets depends at least in part on the matrix size, and wherein when the number of the one or more non-overlapping sets comprises a first number of sets, the controller is configured to direct the rotate-left/right shifter to independently shift each set of the first number of sets, and when the number of the one or more non-overlapping sets comprises a second number of sets greater than the first number of sets, the controller is configured to direct the rotate-left/right shifter to independently shift each set of the second number of sets by a determined amount.