Patent ID: 9092256
Filing Date: 2015-07-28
Classification: G06F

Abstract:
1. A method for executing floating point instructions in a vector execution unit, wherein the vector execution unit comprises a plurality of processing lanes that each include logic for performing floating point operations, an output of each processing lane of the plurality of processing lanes is connected to a respective input of a dot product adder of the execution unit, and execution of a particular floating point instruction performs a floating point operation on at least one operand identified by the instruction, wherein the operand is a denormal value, the method comprising: in a single pass of an execution pipeline of the vector execution unit: wherein the particular floating point instruction includes the denormal value operand and a second operand, the first processing lane is connected to a first input of the dot product adder, and the vector execution unit includes a second processing lane of the plurality of processing lanes connected to a second input of the dot product adder, the method further comprising: