Patent ID: 6362693
Filing Date: 2002-03-26
Classification: H03L,H04L

Abstract:
A frequency detection method for adjusting a clock signal frequency of a local oscillator to a data rate of a received binary data signal with a signal edge change probability of {fraction (1/2+L )}, the method which comprises:obtaining a clock signal having a frequency from a local oscillator; frequency dividing the clock signal by a first division factor of 4 to obtain a first frequency divided clock signal; frequency dividing the first frequency divided clock signal by a second division factor to obtain a second frequency divided clock signal, and frequency dividing a received data signal by the second division factor to obtain a frequency divided data signal; determining a frequency of the second frequency divided clock signal and determining a frequency of the frequency divided data signal by running counting processes simultaneously in parallel in counters which provide two counter signals; in a subtractor, comparing the frequency of the second frequency divided clock signal with the frequency of the frequency divided data signal by obtaining a difference between the two counter signals; converting the difference obtained by the subtractor into an analog output signal; and using the analog output signal to control the frequency of the clock signal of the local oscillator.