Patent ID: 8822302
Filing Date: 2014-09-02
Classification: H01L

Abstract:
1. A method of a storage node in a semiconductor device, the method comprising: forming an interlayer insulation layer on a substrate; sequentially forming an etch stop layer and a sacrificial layer on the interlayer insulation layer; patterning the sacrificial layer and the etch stop layer to form a sacrificial layer pattern and an etch stop layer pattern that define a storage node contact hole; forming a storage node conductive pattern that conformally covers a sidewall and a bottom surface of the storage node contact hole; forming a recessed conductive pattern that fills a lower portion of the storage node contact hole surrounded by the storage node conductive pattern; forming a metal layer on a top surface of the recessed conductive pattern; and removing the sacrificial layer pattern, wherein the metal layer, the recessed conductive pattern, and the storage node conductive pattern constitute a storage node.