Patent ID: 6634100
Filing Date: 2003-10-21
Classification: B33Y,G01R,H01L,H05K,Y10T

Abstract:
A method for fabricating an interposer, comprising:providing at least one interposer substrate having a top surface with top contact pads exposed thereto and a bottom surface, each of said top contact pads communicating with a corresponding conductive structure configured to communicate with test equipment, said top contact pads being arranged correspondingly to discrete conductive elements protruding from at least one semiconductor device to be assembled with said at least one interposer substrate; and fabricating at least one fence configured for placement on said top surface, said at least one fence including a receptacle for exposing said top contact pads, said receptacle configured to receive said at least one semiconductor device so as to align said discrete conductive elements with corresponding ones of said top contact pads of said at least one interposer substrate, said fabricating including: forming a layer comprising unconsolidated material; at least partially consolidating selected regions of said layer to form a first layer of said at least one fence; and repeating said forming and said at least partially consolidating at least once to form at least one additional layer of said at least one fence.