Patent ID: 6436782
Filing Date: 2002-08-20
Classification: H01L

Abstract:
A method for fabricating a self-aligned double-polysilicon bipolar transistor comprising:(a) producing a silicon substrate including a collector region of a first conductivity type and a base region of a second conductivity type opposite of the first conductivity type; (b) forming an interlayer of the second conductivity type on the base region; (c) forming an etch-stop layer over at least a portion of the interlayer; (d) forming a first polycrystalline silicon (poly-Si) layer on the interlayer and the etch-stop layer; (e) forming an outer dielectric layer on the first poly-Si layer; (f) selectively etching the outer dielectric layer and the first poly-Si layer while stopping on the etch-stop layer, and subsequently removing a corresponding part of the etch-stop layer; (g) selectively removing a portion of the interlayer to form an emitter window having sidewalls and a bottom defined by an exposed zone of the base region; (h) forming a passivation layer on the sidewalls of the emitter window; (i) forming a second poly-Si layer to fill the emitter window and cover the outer dielectric layer; and (j) selectively etching the second poly-Si layer to form an emitter region.