Patent ID: 6825074
Filing Date: 2004-11-30
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising:providing a silicon-on-insulator (SOI) substrate which includes a silicon substrate having an upper surface, a first insulating layer having a lower surface extending horizontally over the upper surface of the silicon substrate, and a silicon layer having a lower surface extending horizontally over an upper surface of the first insulating layer; forming a second insulating layer over an upper surface of the silicon layer of the SOI substrate; implanting impurity ions into the silicon layer of the SOI substrate such that a peak ion concentration along a vertical depth of the silicon layer is located between an intermediate horizontal plane of the silicon layer and the lower surface of the silicon layer inclusive, wherein the intermediate horizontal plane extends horizontally within the silicon layer at half a vertical depth of the silicon layer; and forming a gate electrode on the second insulating layer.