Patent ID: 7974061
Filing Date: 2011-07-05
Classification: H01L,H02H,H03K

Abstract:
1. A transient blocking unit (TBU) comprising: a) a TBU core comprising three or more depletion mode core transistors connected in series, wherein said TBU core automatically switches to a high-impedance current blocking state when current through said TBU core exceeds a predetermined threshold; b) a first depletion mode transistor having a first gate, a first source, and a first drain; c) a second depletion mode transistor having a second gate, a second source, and a second drain, wherein said TBU core is connected in series with and between said first and second depletion mode transistors; and d) a two-terminal gate-gate circuit having a first terminal and a second terminal, wherein said first terminal of said gate-gate circuit is connected to said first gate, and wherein said second terminal of said gate-gate circuit is connected to said second gate.