Patent ID: 7651895
Filing Date: 2010-01-26
Classification: H01L

Abstract:
1. A method for manufacturing a transistor, comprising: providing a semiconductor film on an insulating substrate provided with a groove by forming a first portion of the semiconductor film on an inner surface of the groove; providing a gate electrode above the semiconductor film; injecting an impurity into the semiconductor film at a predetermined angle to the insulating substrate using the gate electrode as a mask to form a lightly doped source or drain region, the predetermined angle being a tilted angle relative to the substrate; providing an insulating film covering the gate electrode and the semiconductor film, and exposing a second portion of the semiconductor film, other than the first portion, by etching part of the insulating film; and providing a source or drain region by injecting an impurity into at least part of the second portion, the source or drain region having an impurity concentration higher that the lightly doped source or drain region, and being in contact with the insulating substrate and the lightly doped source or drain region, wherein the source or drain region contacts the lightly doped source or drain region only at the first portion of the semiconductor film that is formed on the inner surface of the groove.