Patent ID: 7318176
Filing Date: 2008-01-08
Classification: G06F

Abstract:
1. A data processor trace circuit comprising: a triggering circuit receiving first signals indicative of data processing activity of the data processor and generating corresponding triggering signals; a program counter trace collection unit connected to said triggering circuit and receiving signals indicative of the value of a program counter of the data processor, said program counter trace collection unit generating a program counter data stream when triggered by corresponding triggering signals; at least one secondary trace collection unit connected to said triggering circuit and receiving second signals indicative of data processing activity of the data processor, each secondary trace collection unit generating corresponding secondary trace data stream when triggered by corresponding triggering signals; and a trace packet merge unit connected to said program counter trace collection unit and each secondary trace collection unit, said trace packet merge unit generating a single trace data stream from said program counter data stream and each secondary trace data stream, said trace packet merge unit operable to