Patent ID: 8674404
Filing Date: 2014-03-18
Classification: H01L

Abstract:
1. A method of forming additional metal routing in a semiconductor device comprising a memory array and a peripheral array, the method comprising: forming a plurality of transistors in at least one of the memory array and the peripheral array, wherein nitride caps are formed above each of the transistors; etching a portion of selected nitride caps so as to define a recesses in each of the selected nitride caps each recess having a width that is substantially equal to the width of the selected nitride cap and the etching resulting in a portion of each selected nitride cap remaining interposed between the recess therein and the corresponding transistor; and depositing a metal film in the etched-away portions of the selected nitride caps in order to form additional metal routing wherein the remaining portions of the selected nitride caps provide insulation from electrical contact between the deposited metal film and the gate structures of the transistors corresponding to the selected nitride caps.