Patent ID: 6171901
Filing Date: 2001-01-09
Classification: H01L

Abstract:
A process for forming a capacitor structure comprising the steps of:forming a gate polysilicon layer over a semiconductor workpiece;forming a gate oxide layer over the gate polysilicon layer;forming a capacitor polysilicon layer over the gate oxide layer;introducing conductivity-altering dopant into the capacitor polysilicon layer;forming a first nitroxide barrier layer over the capacitor polysilicon layer;creating an upper electrode of a capacitor structure by removing the first nitroxide barrier layer, the capacitor polysilicon layer, and the gate oxide layer to stop on the gate polysilicon layer outside of a first region;creating a lower electrode of the capacitor structure by removing the gate polysilicon layer to stop on the semiconductor workpiece outside of a second region, the second region larger than and encompassing the first region;removing the first nitroxide barrier layer over the upper capacitor electrode; andforming a silicide contact over the upper capacitor electrode and the lower capacitor electrode.