Patent ID: 6235620
Filing Date: 2001-05-22
Classification: H01L

Abstract:
A process for manufacturing a semiconductor integrated circuit device, comprising the steps of:(a) coating a semiconductor substrate with a first conductive film, a first insulating film and a second insulating film sequentially and patterning the same to form a plurality of first conductive film patterns;(b) forming a third insulating film over the semiconductor substrate after said step (a), over the side walls of said first conductive film patterns and over said second insulating film, and forming a fourth insulating film over said third insulating film;(c) after said step (b), forming a mask with a first opening between the adjoining ones of said plurality of first conductive film patterns over said fourth insulating film, and etching said fourth insulating film, as exposed from the first opening of said mask, under such a condition that said fourth insulating film is more easily etched off than said third and second insulating films, to form a second opening in said fourth insulating film; and(d) after said step (c), anisotropically etching said third insulating film, as exposed from the second opening of said fourth insulating film, under such a condition that said third insulating film is more easily etched off than said first insulating film and said fourth insulating film, to form a third opening for exposing the upper face of said semiconductor substrate, in the third insulating film between said adjoining first conductive film patterns.