Patent ID: 7076676
Filing Date: 2006-07-11
Classification: G06F

Abstract:
1. A sequence alignment logic module comprising: a plurality of SAL inputs for receiving a plurality of SAL input signals from a plurality of group write slaves, wherein said plurality of SAL inputs includes a first SAL input and a second SAL input; at least one SAL output for communicating at least one SAL output signal; a gated logic portion, said gated logic portion having logic circuitry communicated with said plurality of SAL inputs and said SAL output, wherein said logic circuitry is constructed so as to create said SAL output signal, the logic circuitry including logic gates for sequencing and combining said plurality of SAL input signals so as to represent the slowest of said plurality of SAL input signals; and a first multiplexor having a first multiplexor select input, a first data input, a first GRL data input and a first multiplexer output, wherein said first data input is communicated with said first SAL input and wherein said first GRL data input is communicated with said SAL output port.