Patent ID: 6606699
Filing Date: 2003-08-12
Classification: G06F

Abstract:
A method operating a merged processor including a control processor and a processing element, the method comprising the steps of:(a) fetching a very long instruction word (VLIW) by the merged processor, the VLIW comprising: (i) a first simplex instruction including a mode of operation bit defining the first simplex instruction as a control processor instruction, and (ii) a second simplex instruction including a mode of operation bit defining the second simplex instruction as a processing element instruction; (b) examining the mode of operation bit for each simplex instruction by the merged processor to determine if each simplex instruction is a control processor instruction or a processing element instruction; (c) executing the first simplex instruction by the control processor; and (d) executing the second simplex instruction by the processing element; wherein step (c) and step (d) are performed in parallel.