Patent ID: 7636879
Filing Date: 2009-12-22
Classification: H03M

Abstract:
1. An error correction decoder for performing soft-decision Viterbi algorithm (SOVA) decoding of coded data output by a convolutional coder which generates the coded data according to changes in the among multiple tap states at each input of a bit signal, said error correction decoder comprising: an add compare select (ACS) circuit; a state metric memory for storing metric values found by the ACS circuit; a path information memory for storing path information; a Delta information memory for storing Delta information computed from a difference in likelihoods, wherein the ACS circuit calculates new metric values, the path information and the difference in likelihood based on the metric values stored in the state metric memory and a likelihood of each transition branch describing a transition structure of the tap state; and a trace-back processor for tracing back transitions of the tap state through the coded data output by the convolutional coder, wherein the trace-back processor includes circuitry which calculates a first path likelihood information equivalent to the difference in likelihood of a survival path among all other concurrent paths based on inputted path likelihood information, and calculates second path likelihood information which value is different from said first path likelihood information by a Delta information value corresponding to the difference in likelihood stored in the Delta information memory, and establishes hard decision values and soft decision values for each one bit trace-back, and wherein the trace-back processor includes