Patent ID: 9123815
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A device including a plurality of vertical transistors comprising: a substrate; an electrically conductive gate structure on the substrate, the electrically conductive gate structure extending away from the substrate to a top, the electrically conductive gate structure including a first edge including a first reentrant profile and a second edge located opposite the first edge and including a second reentrant profile; a conformal electrically insulating layer that maintains the first and second reentrant profiles and is in contact with the electrically conductive gate structure and at least a portion of the substrate; a conformal semiconductor layer that maintains the first and second reentrant profiles and is in contact with the conformal electrically insulating layer; a first electrode in contact with a first portion of the semiconductor layer and located adjacent to the first reentrant profile; a second electrode in contact with a second portion of the semiconductor layer and located adjacent to the second reentrant profile; and a third electrode in contact with a third portion of the semiconductor layer on the top of the electrically conductive gate structure, the first electrode and the third electrode defining ends of a first channel of a first transistor, the second electrode and the third electrode defining ends of a second channel of a second transistor, wherein a first line extending between the ends of the first channel is not parallel to a second line extending between the ends of the second channel.