Patent ID: 6104369
Filing Date: 2000-08-15
Classification: G09G

Abstract:
A display control circuit which causes display to be performed on a display means having a display space in which addresses are set, by supplying to the display means address data of a first number of bits corresponding to the display capacity of the display space, comprising:data regulating means which receive the address data of the first number of bits and which output address data of a second number of regulated bits comprising the first number of bits which have been logically combined with a predetermined number of extended bits, wherein when the address data of the first number of bits are incorrect and are, for a display position outside the addresses in the display space but which when unregulated may result in an undesired display within the display space, said data regulating means causing the address data of the second number of regulated bits to be within an addressing range outside the display space based on the address data provided by said second number of regulated bits, andoutside-address detecting means for detecting the address data of the first number of bits when the address data of the first number of bits is outside the addresses in the display space,whereby the supply of incorrect address data to the display means is prevented from causing said undesirable display to be performed within said display space.