Patent ID: 7352027
Filing Date: 2008-04-01
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first memory transistor; and a peripheral circuit transistor, wherein the first memory transistor comprises: a semiconductor layer; a first insulating film formed on a memory cell region of the semiconductor layer; a first electrode layer formed on the first insulating film; a first element isolating insulating film formed to extend through the first electrode layer and the first insulating film to reach an inner region of the semiconductor layer, the first element isolating insulating film being self-aligned with the first electrode layer, a top face of the first element isolating insulating film being lower than a top face of the first electrode layer in a section perpendicular to a direction in which the first electrode layer extends; a second insulating film formed on the first electrode layer and the first element isolating insulating film; and a second electrode layer formed on the second insulating film, and the peripheral circuit transistor comprises: a third insulating film formed on a peripheral circuit region of the semiconductor layer; a third electrode layer formed on the third insulating film; a second element isolating insulating film; a fourth insulating film formed on the third electrode layer, the fourth insulating film including a first open portion exposing a surface of the third electrode layer; and a fourth electrode layer formed above the fourth insulating film and on the exposed surface of the third electrode layer, the fourth electrode layer being electrically connected to the third electrode layer via the first open portion.