Patent ID: 6269458
Filing Date: 2001-07-31
Classification: G06F

Abstract:
In a computer system comprising a bus, a processor coupled to the bus, a transceiver, containing a first register and a second register, coupled to the bus, a diagnostic state machine coupled to the bus and associated with a first address space defined by addresses on the bus, and a memory coupled to the bus and associated with a second address space defined by addresses on the bus, the second address space being related to the first address space such that locations in the first address space correspond with locations in the second address space, a method for diagnosing and isolating faults in the computer system comprising the steps of:writing, from the processor onto the bus, a first value to a first address within the first address space;latching the first value in the first register using the diagnostic state machine;writing the first value from the first register to a second address within the second address space, the second address being associated with the first address in the first address space;reading, by the processor, a second value from the memory over the bus, at the second address; andcomparing, by the processor, the second value to the first value to indicate an error if they are different.