Patent ID: 7338853
Filing Date: 2008-03-04
Classification: H01F,H01L

Abstract:
1. A manufacturing method of high power RF IC capable of impeding parasitic current loss comprising: providing a semiconductor base having an active region and an isolation region displaced from the active region; forming a field oxide region in said isolation region of the semiconductor base, active components in the active region, and a first dielectric layer formed over the active components, the field oxide region and the semiconductor base; forming a plurality of inductive components on the first dielectric layer above the field oxide region and overlaying the first dielectric layer and inductive components with a second dielectric layer; forming a protection layer on the second dielectric layer; polishing a back surface of the semiconductor base to a thickness approximating 100 microns; forming a patterned resist layer on the polished back surface of the semiconductor base; using the patterned resist layer as a mask to etch the back surface of the semiconductor base until the field oxide region is reached to define a trench contact window therein, and then subsequently removing the patterned resist layer; and vapor depositing an insulating layer within the trench contact window formed in the semiconductor base and planarization of the insulation layer in the contact window to form a trench insulation layer that is directly connected to the field oxide region to be located directly under the inductive component.