Patent ID: 8219860
Filing Date: 2012-07-10
Classification: G06F

Abstract:
1. A microprocessor system for controlling or regulating at least partly safety-critical processes, comprising two central processing units integrated in a chip housing, a first and a second bus system, at least one complete memory on the first bus system, test data in at least one test data store, the test data being related to data in the memory on the first bus system, the at least one test data store having a smaller storage capacity than the complete memory on the first bus system, the at least one test data store being arranged on the first bus system, and the second bus system having no test data store and no memory for backing up data in the memory on the first bus, the first bus system comprising a first hardware unit for comparing data from the complete memory with the test data associated with these data and, in the event of conflict, correcting the data from the complete memory using the test data to produce corrected data, and the second bus system comprising a second hardware unit comparing the corrected data with the test data and generating an error signal when the test data are in conflict with the corrected data.