Patent ID: 6810080
Filing Date: 2004-10-26
Classification: H04N

Abstract:
A video decoder comprising:a memory for storing a plurality of anchor frames suitable for decoding a plurality of intermediate frames; and a buffer independent of the memory for holding intermediate frame data for display, characterised in that the video decoder is operable in first and second modes of operation, wherein in a first mode of operation a picture is encoded as a single frame and the video decoder decodes the single frame twice wherein (i) in a first decoding a set of lines of a first field of the single frame are provided to the buffer for display and (ii) in a second decoding a set of lines from a second field of the single frame are provided to the buffer for display; and wherein in a second mode of operation in which two consecutive field pictures of a frame are decoded, (i) a first field picture of the two consecutive field pictures is decoded and provided to the buffer for display and then (ii) a second field picture of the two consecutive field pictures is decoded and provided to the buffer for display.