Patent ID: 7714619
Filing Date: 2010-05-11
Classification: G06F

Abstract:
1. A high frequency clock detection circuit for detecting a presence of an irregular high frequency state of a clock signal provided by a function circuit, the detection circuit comprising: a delay circuit having a delay time set to be longer than a clock period corresponding to the irregular high frequency state; a first flip-flop circuit to provide a delayed flip-flopped clock signal; a first inverter to invert the delayed flip-flopped clock signal from the first flip-flop circuit and to provide a first inverted output signal, the first flip-flop circuit to receive the first inverted output signal as a loop-back signal; a second flip-flop circuit to provide a delayed flip-flopped clock signal; a second inverter to invert the delayed flip-flopped clock signal from the second flip-flop circuit and to provide a second inverted output signal; the delay circuit to receive the second inverted output signal from the second flip-flop circuit and to provide a loop-back signal as an input to the second flip-flop circuit; a detection-result output circuit to detect a difference between the first inverted output signal from the first flip-flop circuit and the second inverted output signal from the second flip-flop circuit and to provide the function circuit with the high frequency clock detection signal indicating a presence of an irregular high frequency state corresponding to an occurrence of the difference, wherein the detection-result output circuit includes a counter to count the occurrence of the detected difference and to output the high frequency clock detection signal when the counted occurrence of the difference exceeds to a predetermined threshold.