Patent ID: 6567334
Filing Date: 2003-05-20
Classification: G06F,G11C

Abstract:
A storage device comprising:a controller which carries out interface with a host system via a host bus, receives instructions from said host system and controls operations to be performed within said storage device; an address table which receives a logical address of data in a data write operation from said host system, via said host bus, and converts said logical address to a physical address; and a nonvolatile semiconductor flash memory coupled with said controller, wherein said nonvolatile semiconductor flash memory is electrically erasable and electrically programmable and is divided into a plurality of physical sectors identified by physical addresses, wherein said controller receives said physical address from said address table and writes said data in said data write operation from said host system via said host bus into one physical sector of said plurality of physical sectors, wherein said address table is comprised of a volatile memory, the logical address from said host system can be converted to the physical address of said nonvolatile semiconductor flash memory based on data stored in said address table of said volatile memory, wherein said data of said address table of said volatile memory is originated from an address information stored in said nonvolatile semiconductor flash memory by said controller at start of system operation, and then said controller accesses said nonvolatile semiconductor flash memory based upon said data of said address table of said volatile memory, and wherein said address table converts a logical address received in the write operation from said host system, via said host bus, to the physical address which is different from the physical address to which said address table converted a logical address, identical to the logical address to be presently converted, in a preceding write operation from said host system, via said host bus.