Patent ID: 8143167
Filing Date: 2012-03-27
Classification: H01L

Abstract:
1. A fabrication process for forming dual depth trenches in a semiconductor memory device, the fabrication process comprising: performing a first dry etch step to etch an array trench and a periphery trench into a substrate to a depth; performing a second dry etch to increase the depth of the array trench and the depth of the periphery trench while depositing a polymer on sidewalls of the array trench and sidewalls of the periphery trench, the polymer covering a bottom of the array trench but not a bottom of the periphery trench, to create a trench depth difference between the array trench depth and the periphery trench depth; and performing a third etch step to remove any remaining polymer deposited in the bottom of the array trench, to remove any remaining polymer deposited on sidewalls of the periphery trench, and to remove any induced kinks from the sidewalls of the periphery trench.