Patent ID: 6716712
Filing Date: 2004-04-06
Classification: H01L

Abstract:
A process for producing a predetermined area with two adjacent regions in an integrated semiconductor such that a first region of the two adjacent regions has a target concentration of a dopant that is lower than a target concentration of the dopant in a second region of the two adjacent regions, the process which comprises:applying a polysilicon layer to a semiconductor blank; forming a window in the polysilicon layer such that the window defines a predetermined area of the semiconductor blank; doping the predetermined area of the semiconductor blank with the dopant until a concentration of the dopant is at least as high as the target concentration of the second region; forming a spacer in a self-adjusting manner with respect to an edge of the window such that the spacer defines the first region; and diffusing the dopant outward from the first region until the concentration of the dopant corresponds to the target concentration of the first region.