Patent ID: 6853003
Filing Date: 2005-02-08
Classification: H01L,Y10S

Abstract:
1. A semiconductor device, comprising: a lower electrode including a first copper layer; a first interlayer insulation layer covering the lower electrode; a metal/insulator/metal capacitor including a lower barrier electrode, a dielectric layer, and an upper barrier electrode, which are stacked to cover a sidewall and a bottom of a window formed in the interlayer insulation layer to expose a portion of the lower electrode; an intermediate electrode including a second copper layer filling an inner space of the capacitor at the window; a second interlayer insulation layer formed on the intermediate electrode; at least two connection contact plugs including a third copper layer filling at least two respective connection contact holes formed in the second interlayer insulation layer to expose a portion of the intermediate electrode; and an upper electrode including a fourth copper layer, the upper electrode formed on the connection contact plugs to be connected to the connection contact plugs.