Patent ID: 6806883
Filing Date: 2004-10-19
Classification: G09G

Abstract:
A graphics system comprising:a frame buffer; a processing device coupled to the frame buffer and configured to access data in the frame buffer; a frame buffer interface coupled to the frame buffer; an output controller coupled to the frame buffer interface and configured to provide display data to a display device, wherein the output controller is configured to assert a first request for display data; wherein the frame buffer interface is configured to receive the first request for display data from the output controller and to delay providing the first request for display data to the frame buffer if the processing device is currently accessing a portion of the frame buffer targeted by the first request for display data; wherein the frame buffer interface is also configured to receive a second request from the output controller; wherein the frame buffer interface is configured to provide the second request to the frame buffer a pre-selected number of cycles after providing the first request to the frame buffer; and wherein the frame buffer interface is configured to initiate a second request timer in response to receiving the second request, wherein the frame buffer interface is configured to provide the second request to the frame buffer in response to the second timer expiring, wherein the processing device is requesting access to the portion of the frame buffer targeted by the second request when the second timer expires.