Patent ID: 6355949
Filing Date: 2002-03-12
Classification: H01L,H04N

Abstract:
A charge transfer structure comprising:an insulating film on a first semiconductor region; a plurality of transfer electrodes formed on said insulating film, wherein each of said plurality of transfer electrodes is composed of a barrier electrode and an accumulation electrode; and a signal generating circuit generating first to 2N-th (N is a positive integer more than 1) pulse signals which are supplied to every 2N transfer electrodes of said plurality of transfer electrodes in an interline mode, such that a signal charge is transferred for all of the 2N transfer electrodes during one cycle of said first to 2N-th pulse signals, wherein every immediately adjacent pair of said first to 2N-th pulse signals have a same phase, and odd order pulse signals of said first to 2N-th pulse signals have different phases.