Patent ID: 7068064
Filing Date: 2006-06-27
Classification: G06F,G11C,H04L,Y02D

Abstract:
1. A memory module comprising: a substrate with metal contact pads along an edge of the substrate for insertion into a socket on a main board; a plurality of memory chips mounted on the substrate; a terminated signal line on the substrate connected to inputs on the plurality of memory chips, the terminated signal line having a driven end that is driven by a driver on the substrate or on the main board, and a far end that is farther along the terminated signal line than is the driven end; a dynamic termination circuit attached to the far end of the terminated signal line, the dynamic termination circuit selectively connecting a low-impedance path to the far end in response to a switch signal being in an active state, but disconnecting the low-impedance path from the far end in response to the switch signal being in an inactive state; a clock signal and a chip-select signal carried by lines on the substrate, wherein the chip-select signal is activated when the main board accesses the plurality of memory chips and wherein the plurality of memory chips operate synchronously to the clock signal when the chip-select signal is activated; and a switch-signal generator, mounted on the substrate, receiving the chip-select signal and the clock signal, the switch-signal generator generating the switch signal in the active state synchronously to the clock signal when the chip-select signal is activated to select the plurality of memory chips for access by the main board, whereby the low-impedance path terminates the terminated signal line in response to the switch signal.