Patent ID: 6427193
Filing Date: 2002-07-30
Classification: G06F

Abstract:
A computer system comprising:a first processor; a second processor; and a memory coupled to said first processor and said second processor; wherein said first processor is configured to access a first memory location, and wherein said second processor, in response to a snoop operation corresponding to said access of said first memory location by said first processor, is configured to relinquish ownership of said first memory location, and wherein said second processor is further configured, in response to said snoop operation, to inhibit reestablishing said ownership of said first memory location by said second processor for a first time interval subsequent to said snoop operation, and wherein said second processor is configured to increase said first time interval in response to additional repetitions of reestablishing said ownership and relinquishing said ownership while attempting to perform a first memory operation to said first memory location.