Patent ID: 6313487
Filing Date: 2001-11-06
Classification: H01L

Abstract:
A field effect transistor comprising:a) a silicon substrate,b) an epitaxial silicon germanium layer grown on a surface of the substrate,c) an epitaxial silicon layer grown on a surface of the silicon germanium layer,d) a sidewall exposing the silicon layer, the silicon germanium layer, and a portion of the substrate,e) a first gate dielectric formed on the sidewall,f) a floating gate formed on the first gate dielectric over the sidewall,g) a second gate dielectric formed over the floating gate,h) a control gate formed on the second gate dielectric and over the control gate,i) a source region formed in the epitaxial silicon layer, andj) a drain region formed in the substrate, whereby a channel is provided between the source and drain along the sidewall.