Patent ID: 6469393
Filing Date: 2002-10-22
Classification: H01L,H05K,Y02P

Abstract:
A semiconductor package and mount board comprising:a semiconductor chip having input or output terminals; a relay board having: package side lands having a defined surface area and side walls and being arranged on a principal plane thereof in association with said respective input or output terminals of said semiconductor chip; and a first solder resist layer mutually insulating said package side lands and having openings having a larger area than the surface area of said package side lands so that a gap exist between the first solder resist layer and said package side lands; a base member; board side lands having a defined surface area and side walls and being disposed on one principal plane of said base member in the same arrangement of said package side lands which are to be mounted thereon through a soldering layer which adheres only to the complementary package side lands and board side lands which complement each other when the relay board is mounted over the base member and the soldering layer extends to the side walls thereof; a second solder resist layer mutually insulating said board side lands and having openings having a larger area than the surface area of said board side lands so that a gap exists between the second solder resist layer and said board side lands wherein the gaps respectively between the first solder resist layer and the package side lands and the second solder resist layer and the board side lands have the same dimension and whereby each soldering layer between the complementary package and board side lands does not extend to said first and second solder resist layers; and wherein said complementary package side lands and said board side lands are equal to each other in shape and dimension so that the soldering layers between the complementary package and board side lands are substantially uniform in profile and the first and second solder resist layers are respectively provided between each pair of adjacent package and board side lands but do not overlap the adjacent package and board side lands.