Patent ID: 8680629
Filing Date: 2014-03-25
Classification: H01L

Abstract:
1. A material stack formed on a semiconductor substrate of a semiconductor structure having first and second regions, comprising: an interface preparation layer formed on the semiconductor substrate, in both the first and second regions; a high-k dielectric layer having a high dielectric constant greater than approximately 3.9, the high-k dielectric layer present over both the first and the second regions, wherein the high-k dielectric layer is formed directly on the interface preparation layer in the second region; a germanium (Ge) material layer formed only in the first region, wherein the Ge material layer is formed directly on the interface preparation layer in the first region and the high-k dielectric layer is formed directly on the Ge material layer in the first region; a metal nitride layer formed only in the second region, wherein the metal nitride layer is formed directly on the high-k dielectric layer in the second region; and a conductive electrode layer formed over both the first and the second regions.