Patent ID: 6055642
Filing Date: 2000-04-25
Classification: G06F,Y02D

Abstract:
A microcomputer for a single semiconductor chip having integrated circuit elements comprising:a main circuit, including at least a central processing unit (CPU), a memory which is accessed by said CPU and an interruption control unit (ICU) for controlling an interruption process which is performed by said CPU in response to an interruption request signal;a reference-clock control circuit for supplying a clock to said main circuit, where said reference-clock control circuit transitions between at least two modes in response to control input signals, said at least two modes including a normal mode in which said clock is supplied to all of circuits included in said main circuit which are operated in synchronization with said clock and a small power consumption mode in which supply of said clock to at least a portion of said circuits, including said CPU, in said main circuit is interrupted;a first external terminal for relaying to said ICU an external request signal supplied from outside as said interruption request signal; anda signal line for transmitting a signal output from said ICU in response to said external request signal to said reference-clock control circuit as said control input signal without relay of said signal to said CPU, whereby said transitions are performed without intervention of said CPU.