Patent ID: 6734818
Filing Date: 2004-05-11
Classification: H03M

Abstract:
An improvement to a multistage pipelined Analog-to-Digital Converter (ADC), receiving an analog input signal, havinga plurality of stages, connected one to the next by an interstage amplifier, each stage having a flash analog-to-digital converter (ADC), an ADC of the first stage receiving the analog input signal while ADCs of subsequent stages receive analog signals each from a respective interstage amplifier, producing a multi-level digital signal, a digital-to-analog converter (DAC) converting an associated produced multi-level digital signal to an associated intermediate analog signal, each intermediate analog signal being feed both to a subtractor of the intermediate analog signal from the associated analog signal received by the stage to produce an analog difference signal that is fed to the interstage amplifier of a next following stage, and also to a thermometer encoder producing an associated digital output signal; wherein the digital output signals of all the plurality of stages are summed to produce an overall ADC digital output signal, the improvement wherein the digital-to-analog converter of at least one of the plurality of stages comprises:a digital-to-analog converter (DAC) that is of a dynamic element matching (DEM) type producing, as well as an associated intermediate analog signal, a (i) plurality of random bits and a (ii) plurality of parity bits; and wherein each of the plurality of stages additionally comprises: a Digital Noise Cancellation (DNC) logic circuit, receiving (1) the (i) plurality of random bits and the (ii) plurality of parity bits from the associated DEM-type DAC and (2) a digitized residue sum of the digital output signals of all stages beyond a stage of which the DNC logic circuit is a part, to produce an error estimate for the stage; and a subtractor of the error estimate from the DNC logic circuits of all stages beyond the first from the digital output signal of the first stage to produce a corrected ADC digital output signal.