Patent ID: 6245488
Filing Date: 2001-06-12
Classification: G03F,H01L

Abstract:
A method for forming a feature on a semiconductor substrate, the method comprising the steps of:a) forming a linked feature using hybrid resist on said semiconductor substrate, said linked feature including at least one feature portion and at least one linking portion, the at least one linking portion connecting the at least one feature portion to form the linked feature, wherein the step of forming a linked feature using hybrid resist on said semiconductor substrate comprises the steps of:i) depositing hybrid resist on said semiconductor substrate;ii) exposing said hybrid resist to actinic energy through at least one mask containing a plurality of feature shapes and a plurality of trim shapes, wherein the step of exposing said hybrid resist through at least one mask containing a plurality of feature shapes and a plurality of trim shapes comprises exposing through a first mask having a plurality of blocking feature shapes and exposing through a second mask having a plurality of trim shapes;iii) developing said hybrid resist, said development forming at least one feature space in said hybrid resist where said hybrid resist was exposed to intermediate amounts of exposure and forming at least one trim space in said hybrid resist; andiv) forming the at least one feature portion in said at least one feature space and the at least one linking portion in the at least one trim space;b) trimming said at least one linking portion from said linked feature by removing said at least one linking portion while leaving the at least one feature portion.