Patent ID: 6763448
Filing Date: 2004-07-13
Classification: G06F

Abstract:
A microcomputer comprising:a storage means; a data processing unit capable of making an access to said storage means through a first internal bus and used for executing an instruction; a first data-transfer unit for controlling a transfer of data; a bus-interface means capable of connecting said first internal bus or said first data-transfer unit to an external bus; and a bus-control means for executing bus control and arbitrating requests for a bus-access right; wherein: said storage means, said data processing unit, said first data-transfer unit and said bus-interface means are integrated in a single semiconductor chip; said bus-control means allows an operation to make an access only within said microcomputer by using said first internal bus to be carried out concurrently with an operation carried out by said first data-transfer unit to make an access to an external address space through said bus-interface means; and said bus-control means has: an internal-bus controller for arbitrating requests for a right to make an access to said first internal bus made by bus master means sharing said first internal bus; and an external-bus controller for arbitrating requests for a right to make an access to said external bus; said external-bus controller is capable of arbitrating: a request for a right to make an access to said external bus made by said internal-bus controller in implementing a bus right given by said internal-bus controller to any of said bus master means originally making said request for a right to make an external access; a request for a right to make an access to said external bus made by said first data-transfer unit; and a request for a right to make an access to said external bus made by a component external to said microcomputer.