Patent ID: 8225297
Filing Date: 2012-07-17
Classification: G06F

Abstract:
1. A system comprising: a multiprocessor having at least one central processing unit, the central processing unit having: a cache comprising a plurality of cache lines, wherein a respective cache line of the plurality of cache lines is augmented by a plurality of cache metadata, the plurality of cache metadata including virtual address metadata and software-controlled metadata identifiers that allow a plurality of logical processors to share the plurality of the cache metadata; and a software-visible instruction set, one or more instructions of the software-visible instruction set being executable by each of the plurality of logical processors to interact with the plurality of cache metadata including the virtual address metadata in conjunction with carrying out a corresponding computation; wherein the sharing of the plurality of cache metadata including the virtual address metadata comprises issuing instructions from the software-visible instruction set that include a same metadata identifier as a parameter by different ones of the plurality of logical processors, the same metadata identifier comprising a value that identifies a usage context, instance, or subset of cache metadata.