Patent ID: 7546440
Filing Date: 2009-06-09
Classification: G06F,G11C

Abstract:
1. A method of operating a non-volatile memory redundant erase block control circuit, comprising: programming a selected redirect entry in an erase block redirect look up table of a non-volatile memory redundant erase block control circuit to redirect accesses from a first erase block in a first bank of a non-volatile memory array to a second erase block in a second bank of the non-volatile memory array, wherein each bank of the non-volatile memory array contains a plurality of general use erase blocks and redundant erase blocks; receiving a memory access at the non-volatile memory redundant erase block control circuit wherein receiving the memory access comprises receiving an extended memory address referencing the first erase block of the first bank of the non-volatile memory array where the extended memory address allows general use access to available unutilized redundant erase blocks of each bank; and redirecting accesses from the first erase block of the first bank to the second erase block of the second bank by referencing the selected redirect entry in the erase block redirect look up table; wherein the extended memory address comprises a first portion uniquely addressing one of the general use erase blocks of the first bank of the non-volatile memory array and a second portion allowing the general use access to available unutilized redundant erase blocks of each bank.