Patent ID: 6163177
Filing Date: 2000-12-19
Classification: H03K

Abstract:
A semiconductor integrated circuit device comprising:an internal circuit generating an internal signal in response to an external input signal; andan output buffer generating an external output signal in response to said internal signal, said output buffer including:a first N channel MOS transistor connected between a power supply node and an output node, turned on when said internal signal is in a first state and turned off when said internal signal is in a second state;a second N channel MOS transistor connected between said output node and a ground node, and turned on/off complementarily to said first N channel MOS transistor; anda control circuit supplying a ground voltage to the gate of said second N channel MOS transistor when said internal signal is in the first state, supplying a power supply voltage to the gate of said second N channel MOS transistor and thereafter supplying voltage higher than said power supply voltage when said internal signal is in the second state.