Patent ID: 8482103
Filing Date: 2013-07-09
Classification: H01L

Abstract:
1. A nitride semiconductor template, comprising: a substrate having a plurality of trenches, wherein at least one of the plurality of trenches has a bottom surface, a first inclined sidewall and a second inclined sidewall; a mask layer covering the second inclined sidewall and exposing the first inclined sidewall; a first nitride semiconductor layer disposed on the substrate and the mask layer, the first nitride semiconductor layer being disposed in the plurality of trenches and in contact with the first inclined sidewall, the first nitride semiconductor layer having a plurality of voids located outside the plurality of trenches and a portion of the mask layer being exposed by the plurality of voids, and the first nitride semiconductor layer having a plurality of nano-rods; a dielectric material layer covering sidewalls of the plurality of nano-rods and exposing top surfaces of the plurality of nano-rods, the spaces between the plurality of nano-rods being not entirely filled by the dielectric material layer; and a second nitride semiconductor layer covering the top surfaces of the plurality of nano-rods, and the spaces between the plurality of nano-rods being not entirely filled by the second nitride semiconductor layer, and an included angle between the at least one bottom surface of the plurality of trenches and the (0,0,0,1) orientation of the second nitride semiconductor layer ranging from 27° to 29°.