Patent ID: 7648861
Filing Date: 2010-01-19
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising the steps of: forming a gate electrode over an insulating surface; forming a gate insulating film over the gate electrode; forming a first semiconductor region over the gate insulating film; adding a catalytic element into the first semiconductor region and heating the first semiconductor region; separately forming a second semiconductor film containing an impurity element over the first semiconductor region by a plasma CVD method; heating the first semiconductor region and the second semiconductor film; forming a first conductive layer to be in contact with the second semiconductor film by a droplet discharge method; partially etching the first conductive layer and the second semiconductor film to form a second conductive layer, a source region and a drain region; forming an insulating film over the second conductive layer; partially etching the insulating film and the gate insulating film to partially expose the gate electrode; and forming a third conductive layer to be connected to the gate electrode by a droplet discharge method.