Patent ID: 8271862
Filing Date: 2012-09-18
Classification: G11B,H03M

Abstract:
1. A decoding device for performing error correction decoding of encoded data formed from a combination of an outer code for first error correction and an inner code for second error correction, the device comprising: a demodulator for demodulating the encoded data and creating a data series of likelihood information values; a memory circuit for temporarily storing the data series of likelihood information values; a second error correction decoder for creating a hard decision value series by executing repetitive decoding for the second error correction based on the data series of likelihood information values read from the memory circuit; and a first error correction decoder for detecting a lost bit in the hard decision value series by executing algebraic decoding for the first error correction to the hard decision value series and creating an erasure flag indicating a position of the detected lost bit, wherein the second error correction decoder creates a series of temporary deduced words or deduced words by executing hard decision based on the data series of likelihood information values read for the first time from the memory circuit, and wherein the first error correction decoder detects a lost bit in the series of temporary deduced words or deduced words by executing the algebraic decoding to the created series of temporary deduced words or deduced words and creates an erasure flag indicating a position of the detected lost bit.