Patent ID: 6774499
Filing Date: 2004-08-10
Classification: H01L

Abstract:
A method for fabricating a non-leaded semiconductor package, comprising the steps of:(1) preparing a provisional chip carrier having a front surface and a back surface and whose front surface is predefined into a die-attachment region and a plurality of non-leaded external-connecting regions surrounding the die-attachment region; (2) attaching a chip over the die-attachment region of the provisional chip carrier, wherein the chip has a front surface and a back surface opposite to the front surface and whose front surface is formed with a plurality of I/O pads and whose back surface is attached to the die-attachment region on the provisional chip carrier; (3) coating an electrically-insulative layer over the front surface of the provisional chip carrier and the front surface of the chip but exposing the non-leaded external-connecting regions on the provisional chip carrier as well as the I/O pads on the chip; (4) forming a plurality of redistribution layers over the electrically-insulative layer, wherein each of the redistribution layers is laid at predefined locations for interconnecting one of the I/O pads on the chip to a corresponding one of the non-leaded external connecting regions; (5) forming an encapsulation body over the electrically-insulative layer and the redistribution layers; and (6) stripping away the provisional chip carrier.