Patent ID: 6275406
Filing Date: 2001-08-14
Classification: G11C

Abstract:
A content addressable memory circuit having a redundant array, comprising:a first content addressable memory array for storing data, the first content addressable memory array having a plurality of first entries, each first entry having a plurality of first memory cells, wherein any first entry that includes one or more defective first memory cells is defective;a redundant content addressable memory array having one or more redundant entries of redundant memory cells, each of the one or more redundant entries having a redundant address and being associated with a defective first entry, wherein each redundant entry is configured to store data for the associated first entry;one or more storage devices for associating each of the defective first entries with a redundant entry;a first encoder for outputting a first search result from the first content addressable memory array; anda redundant encoder for outputting a redundant search result from the redundant content addressable memory array.