Patent ID: 6306713
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device on a semiconductor substrate, comprising the steps of:forming a plurality of multi-layer structures on the semiconductor substrate to form core and peripheral regions;forming sidewall spacers around the plurality of the multi-layer structures;forming source and drain regions in the semiconductor substrate adjacent the sidewall spacers;forming a stop layer over the semiconductor substrate, including the plurality of multi-layer structures, the sidewall spacers, and the source and drain regions;forming a dielectric layer over the stop layer,depositing a contact mask over the dielectric layer;processing the contact mask to expose portions of the dielectric layer over the core region and to cover the peripheral region;removing portions of the dielectric layer and portions of the stop layer over the semiconductor substrate between the plurality of multi-layer structures using the contact mask in the core region to form core contact openings;forming secondary sidewall spacers in the core contact openings over the exposed portions of the plurality of multi-layer structures;depositing a second contact mask over the dielectric layer and in the secondary sidewall spacers;processing the second contact mask to cover the core region and to expose portions of the dielectric layer in the peripheral region;removing portions of the dielectric layer and the stop layer over the source and drain regions and portions of the plurality of multi-layer structures in the peripheral region using the second contact mask to form peripheral contact openings;depositing a conductive material over the dielectric layer and in the core and peripheral contact openings; andremoving the conductive material over the dielectric layer whereby the conductive material is left isolated in the core and peripheral contact openings.