Patent ID: 6774941
Filing Date: 2004-08-10
Classification: H04N

Abstract:
An image processing stage for processing an image signal, the image signal having a plurality of pixel periods, the stage comprising:a correlated double sampler (CDS) connectable to receive the image signal, the CDS removing an effect of a reset signal from the image signal in each pixel period to leave a residual signal in each pixel period; a digital-to-analog (D/A) converter that converts offset values into offset signals and outputs the offset signals, the residual signal in each pixel period being combined with an offset signal to leave an offset-corrected signal in each pixel period; a programmable gain amplifier (PGA) that receives gain values, and amplifies the offset-corrected signal in each pixel period by a gain value of the gain values to form an amplified signal in each pixel period; an analog-to-digital (A/D) converter that digitizes the amplified signal in each pixel period to form a digitized value for each pixel period; and a controller that outputs the offset values to the D/A converter, and the gain values to the amplifier.