Patent ID: 6678800
Filing Date: 2004-01-13
Classification: G06F

Abstract:
An apparatus within a multiprocessor system having a storage device, said apparatus comprising:a cache memory storing data from the storage device and information indicative of a status of the data; and a cache controller controlling said cache memory in which the data has the status of a Writable Modified state and allowing sharing performance to be possessed step by step in response to a fetching request, said cache controller further controlling said cache memory in such a manner that: when in response to the fetching request from said apparatus itself for data in which the data has the status of an Invalid state, the data in a Modified state is obtained from another apparatus, the status of the obtained data is changed from an Invalid state to a Writable Modified state; and when the fetching request is received for data in a Modified state from another apparatus, the status of the data is switched from a Modified state to an Invalid state.