Patent ID: 6836158
Filing Date: 2004-12-28
Classification: G11C

Abstract:
A sampling circuit configured for operating in a sampling mode and a hold mode on an alternating basis at a predetermined sampling frequency, said sampling circuit comprising:(a) a primary sampling signal path comprising sampling means configured for sampling a differential input signal (Vin+, Vinâˆ’) and transmitting a sampled signal corresponding to said differential input signal for storage by storage means, during said sampling mode of operation of said sampling circuit, and for blocking said differential input signal from said storage means during a hold mode of operation of said sampling circuit; and, (b) an isolation signal path in parallel with said primary sampling signal path and comprising means for blocking said differential input signal from said storage means during said sampling and hold modes of operation of said sampling circuit, wherein said sampling and blocking means are electrically equivalent to effectively cancel, during said hold mode of operation, any leakage of said differential input signal transmitted through said primary and isolation paths.