Patent ID: 6313663
Filing Date: 2001-11-06
Classification: B24B,G11C,H03K

Abstract:
A bi-directional full swing voltage repeater implemented on a signal line of an integrated circuit, comprising:a first enable node for providing a first enable signal;a second enable node for providing a second enable signal;a first full-swing unidirectional repeater circuit coupled between a first portion of said signal line and a second portion of said signal line, said first full-swing unidirectional repeater being configured to pass a first full swing signal from said first portion of said signal line to said second portion of said signal line when said first enable signal is enabled;a second full-swing unidirectional repeater circuit coupled between said first portion of said signal line and said second portion of said signal line, said second full-swing unidirectional repeater circuit being configured to pass a second full swing signal from said second portion of said signal line to said first portion of said signal line when said second enable signal is enabled,wherein said first full-swing unidirectional repeater circuit and said second full-swing unidirectional repeater circuit are tri-stated when both said first enable signal and said second enable signal are disabled;wherein said first full-swing unidirectional repeater circuit includes:a first inverter coupled to said first portion of said signal line;a first inverting tri-state buffer coupled to receive an output of said first inverter, said first inverting tri-state buffer being configured to be enabled when said first enable signal is enabled, said first inverting tri-state buffer being configured to be tri-stated when said first enable signal is disabled, an output of said first inverting tri-state buffer being coupled to said second portion of said signal line.