Patent ID: 8999764
Filing Date: 2015-04-07
Classification: H01L,Y10S

Abstract:
1. A method comprising: forming a first layer of an integrated circuit (IC) chip, the first layer including at least one of a transistor, resistor, capacitor or interconnecting wire; forming a first metallization layer over the first layer; forming at least one dielectric layer over the first metallization layer, the at least one dielectric layer including ionizing radiation blocking material therein, wherein the ionizing radiation blocking material is configured to block or absorb ionizing radiation, and wherein the ionizing radiation blocking material forms a substantially complete plane over the first layer, wherein the forming of the ionizing radiation blocking material includes: forming an additional dielectric layer over the at least one dielectric layer, wherein the substantially complete plane formed by the ionizing radiation blocking material remains intact during the forming of the additional dielectric layer.