Patent ID: 6403475
Filing Date: 2002-06-11
Classification: H01L,Y10S

Abstract:
A fabrication method for semiconductor integrated circuit devices comprising the steps of:(a) introducing, by ion injection, a first type of impurities into the device surface of a semiconductor integrated circuit wafer having a plurality of unit chip regions on which are formed patterns corresponding to a memory region and to a logic region; (b) arranging said device surface of said wafer into which said first type of impurities have been introduced to be close to and opposed to a second main surface of a light-shielding plate having a size larger than a chip-forming portion of said wafer, said light-shielding plate having first and second main surfaces which are optically more uniform than said device surface of said wafer; (c) heating said light-shielding plate by irradiating said first main surface of said light-shielding plate with light from lamps in a state where said device surface of said wafer is close to and is opposed to said second main surface of said light-shielding plate; and (d) heating said wafer by light radiated from said second main surface of said light-shielding plate that is heated, thereby to anneal said wafer, wherein a converted thickness of said light-shielding plate is not larger than the thickness of said wafer, andwherein a gap between said second main surface of said light-shielding plate and said device surface of said wafer is not larger than 20 times the thickness of said wafer.