Patent ID: 7511558
Filing Date: 2009-03-31
Classification: H01L,H03K

Abstract:
1. A semiconductor device, comprising: a first circuit and a second circuit, said first circuit and said second circuit including a MOS transistor having silicon-on-insulator structure, said silicon-on-insulator structure including double gates and a fully-depleted silicon-on-insulator layer, said double gates being a first gate and a second gate, said second gate being a well layer which exists under a buried oxide film, wherein said second circuit is a circuit for controlling a voltage applied to said first gate or said second gate of said MOS transistor inside said first circuit, and a difference between a highest voltage and a lowest voltage of an output from said second circuit larger than a difference between a highest voltage and a lowest voltage of an input into said first circuit, wherein said voltage applied to said first gate or said second gate of said MOS transistor inside said first circuit is controlled in such a manner that threshold voltage of said MOS transistor becomes smaller at the time of its conduction, and becomes larger at the time of its non-conduction.