Patent ID: 8367486
Filing Date: 2013-02-05
Classification: H01L

Abstract:
1. A method for manufacturing a transistor comprising the steps of: forming a gate electrode over a substrate; forming a gate insulating layer over the gate electrode; forming a source electrode layer and a drain electrode layer over the gate insulating layer; forming a first metal oxide layer including zinc and a crystal structure over the source electrode layer; forming a second metal oxide layer including zinc and a crystal structure over the drain electrode layer; forming an oxide semiconductor layer including zinc and an amorphous structure over the gate electrode and on the first metal oxide layer and the second metal oxide layer; and performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer.