Patent ID: 6043545
Filing Date: 2000-03-28
Classification: H01L,Y10S

Abstract:
A MOSFET device, including:a substrate;a gate electrode formed on the substrate;two source/drain regions, including a lightly doped region and a heavily doped region, wherein the source/drain regions are located in the substrate and at the sides of the gate electrode;an oxide layer, including a first portion and a second portion, wherein the first portion is located on the side walls of the gate electrode, the top of the first portion is lower than the top of the gate electrode, and the second portion is located on the substrate and is connected to the first portion;a conductive spacer formed on the second portion and besides the first portion;a dielectric spacer formed on the second portion and besides the conductive spacer, wherein the top of the conductive spacer and the top of the dielectric spacer are higher than the top of the gate electrode; anda self-aligned metal layer formed on the gate electrode, the conductive spacer, and over the substrate.