Patent ID: 7498858
Filing Date: 2009-03-03
Classification: H04L

Abstract:
1. A method of operating an interpolator system, comprising: receiving a plurality of clock signals at an interpolator of the interpolator system, the interpolator comprising a first differential amplifier configured to receive a first clock signal and a second differential amplifier configured to receive a second clock signal, the first differential amplifier coupled to a first current sink having a first plurality of selectively activated transistors, the second differential amplifier coupled to a second current sink having a second plurality of selectively activated transistors, the interpolator excluding an oscillator; responsive to receiving the plurality of clock signals, variably shifting in phase one or more of the plurality of clock signals until an output clock signal has a defined voltage variation, the variable shifting implemented by selectively activating one or more transistors of the first plurality of selectively activated transistors, one or more transistors of the second plurality of selectively activated transistors, or transistors from a combination of the first and second plurality of selectively activated transistors; comparing a peak voltage level of the defined voltage variation with a reference voltage level; and responsive to the comparison, providing an adjust signal to impedance elements having an adjustable impedance, the impedance elements comprising a plurality of variable capacitors or variable resistors, the adjust signal changing the impedance to set the defined voltage variation.