Patent ID: 6713352
Filing Date: 2004-03-30
Classification: H01L,Y10S

Abstract:
A method of forming a trench MOSFET device comprising:providing semiconductor substrate of first conductivity type; forming a semiconductor epitaxial layer over said semiconductor substrate, said epitaxial layer being of said first conductivity type and having a lower majority carrier concentration than said substrate; forming a region of second conductivity type within an upper portion of said semiconductor epitaxial layer, such that an epitaxial region of first conductivity type remains within a lower portion said semiconductor epitaxial layer; forming a plurality of trench segments in an upper surface of said epitaxial layer, (i) said trench segments extending through the region of second conductivity type and into said epitaxial region of first conductivity type, (ii) each said trench segment being at least partially separated from an adjacent trench segment by a terminating region of said semiconductor epitaxial layer, and (iii) said trench segments defining a plurality of polygonal body regions within said region of second conductivity type; forming a first insulating layer lining each said trench segment; forming a plurality of first conductive regions within said trench segments adjacent to the first insulating layer; forming a plurality of connecting conductive, each of said connecting conductive regions bridging at least one of said terminating regions and connecting one of said first conductive regions to an adjacent first conductive region; and forming a plurality of source regions of said first conductivity type within upper portions of said polygonal body regions and adjacent said trench segments, said plurality of source regions positioned outside the terminating regions.