Patent ID: 6778024
Filing Date: 2004-08-17
Classification: H03L

Abstract:
A phase locked loop, comprising:a voltage controlled oscillator operable to receive a trim signal for adjusting a voltage-to-frequency operating characteristic of the voltage controlled oscillator, and receive a tune signal to generate an output signal having an output frequency determined by the voltage-to-frequency operating characteristic; a loop filter operable to receive an error signal and generate the tune signal in response to the error signal; a trim drive circuit operable to receive the tune signal and generate a trim increment signal or a trim decrement signal in response to the tune signal; and a trim signal generator circuit operable to generate the trim signal and increment or decrement the trim signal in response to the trim increment signal or the trim decrement signal generated by the trim drive circuit; wherein the phase locked loop remains in a locked state during the increment or the decrement of the trim signal.