Patent ID: 6312992
Filing Date: 2001-11-06
Classification: H01L

Abstract:
A method for fabricating a thin film transistor, comprising:forming a source electrode on a substrate;forming a columnar conductive layer connected to the source electrode;forming an insulating film on the substrate inclusive of the source electrode, wherein the thickness of the insulating film above the source electrode is adjusted for fixing a height of an offset region;injecting ions to form a drain electrode in an upper part of the columnar conductive layer;forming a gate insulating film on the insulating film to cover the columnar conductive layer and the drain electrode; andforming a gate electrode on the gate insulating film covering the columnar conductive layer, wherein forming the gate electrode comprises,forming an undoped polysilicon layer on the gate insulating film to cover the columnar conductive layer and the drain electrode, andetching back the undoped polysilicon layer so that the undoped polysilicon layer surrounds the columnar conductive layer and the drain electrode.