Patent ID: 6380624
Filing Date: 2002-04-30
Classification: H01L,H05K

Abstract:
A stacked integrated circuit structure, comprising:a plurality of integrated circuits each at least having a main package body and a plurality of leads, wherein the leads have a plurality of inner leads and a plurality of outer leads, the main package bodies of the integrated circuits are stacked on each other; a substrate located between the outer leads of every two adjacent integrated circuits, the substrate having a central space, a first surface, and a second surface, wherein each surface includes a plurality of terminals on the first surface and the second surface, the substrate includes a plurality of conductive through vias electrically connected to the corresponding terminals on the first surface and the second surface, the terminals are also located corresponding to the leads positions, the central space houses the main package body of one of the two integrated circuits, with the leads of the selected integrated circuit connected to the respective terminals on the first surface, and another adjacent integrated circuit with the leads connected to the respective terminals on the second surface.