Patent ID: 7973899
Filing Date: 2011-07-05
Classification: G02F

Abstract:
1. A thin film transistor array panel comprising: a first gate line extending in a first direction on the array panel; a first data line; a first thin film transistor of a corresponding first pixel area (PA1) connected to the first gate line and to the first data line, the first pixel area (PA1) being subdivided into an upper first pixel area portion (PA1U) and a lower first pixel area portion (PA1L) by the first gate line; a first sub pixel electrode piece of the first pixel area (PA1) and a second sub pixel electrode piece of the first pixel area (PA1), said first and second PA1 sub pixel electrode pieces being electrically connected to the first thin film transistor; a first storage electrode line extending parallel to the first gate line and disposed to overlap the upper first pixel area portion (PA1U); a second storage electrode line extending parallel to the first gate line and disposed to overlap the lower first pixel area portion (PA1L); a first coupling electrode overlapping the first storage electrode line; and a second coupling electrode overlapping the second storage electrode line, wherein the first sub pixel electrode piece of the first pixel area (PA1) is overlapped by the first coupling electrode.