Patent ID: 8189365
Filing Date: 2012-05-29
Classification: B82Y,G11C,H01L,H03K

Abstract:
1. A configuration method for configuring a semiconductor device, wherein: said semiconductor device comprises L (L is a natural number) lanes, each said lane including a plurality of three-terminal variable resistance switching elements each having a source electrode, a drain electrode, and a gate electrode and connected to each other in series, wiring segments through which said three-terminal variable resistance switching element has the source electrode connected to the drain electrode of a three-terminal variable resistance element adjacent to said three-terminal variable resistance switching element; a plurality of potential holding sections connected to said wiring segments for holding a predetermined potential; and a common gate line connected to each of the gate electrodes of three-terminal variable resistance switching elements belonging to a column group, said column group comprised of three-terminal variable resistance switching elements, each of which is arranged in each of said lanes, said configuration method comprising: a first step of holding a first end on a source side of said each lane at a predetermined write voltage with respect to a second end on a drain side of said each lane to a moment at which conduction is established from said first end to said second end; a second step of holding all said gate lines at the write voltage with respect to said first ends, subsequent to said first step; a third step, subsequent to said second step, of holding the first end of a lane to which a desired three-terminal variable resistance switching element is connected and gate lines other than a gate line to which said desired three-terminal variable resistance switching element is connected at the write voltage, until a resistance value, between the first end and said second end of the lane to which said desired three-terminal variable resistance switching element is connected, grows to a larger value than a resistance value between said first end and said second end at the instant when conduction is established between said first end and said second end in said first step; and a fourth step of holding the gate line to which said desired three-terminal variable resistance switching element is connected at the write voltage, subsequent to said third step.