Patent ID: 7557005
Filing Date: 2009-07-07
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device which has a first MISFET including a first gate formed over a principal surface of a first region of a semiconductor substrate through a first gate insulating film, a second MISFET including a second gate which is higher than the first gate, formed over the principal surface of a second region of the semiconductor substrate through a second gate insulating film which is thicker than the first gate insulating film and a memory cell including a control gate formed over the principal surface of a third region of the semiconductor substrate through a third insulating film, a charge storage layer in which one part thereof is formed at one sidewall of the control gate as well as the other part thereof is formed over the principal surface of the semiconductor substrate, and a memory gate which is electrically separated from the control gate through the one part of the charge storage layer, as well as electrically separated from the semiconductor substrate through the other part of the charge storage layer, forming a split gate together with the control gate, the method comprising the steps of: (a) after forming the second gate insulating film over the principal surface of the semiconductor substrate, removing the second gate insulating film in the first region and the third region; (b) forming the first and the third gate insulating films over the principal surface of the semiconductor substrate in the first region and the third region at the same time, as well as making a film thickness of the second gate insulating film in the second region thick; (c) after forming a first electrode film over the first, second and third insulating films and forming a cap insulating film over the first electrode material film, removing the cap insulating film in the second region and the third region and forming a second electrode material film over the first electrode material film; (d) forming the second gate including the first electrode material film and the second electrode material film by patterning the second electrode material film and the first electrode material film in the second region, while protecting the first electrode material film in the first region with the cap film, as well as forming the control gate including the first electrode material film and the second electrode material film by patterning the second and first electrode material films in the third region; and (e) after removing the cap insulating film in the first region, forming the first gate including the first electrode material film by patterning the first electrode material film in the first region.