Patent ID: 6537894
Filing Date: 2003-03-25
Classification: H01L

Abstract:
A method for fabricating a substrate of SOI architecture, said method comprising the steps of:growing a multilayer stack by non-selective full-wafer epitaxy on an initial substrate, the multilayer stack including a Ge or SiGe alloy first layer and a silicon layer on the first layer; defining and masking a plurality of active regions; forming a plurality of insulating pads, the insulating pads being located on the perimeter of each of the active regions at predetermined intervals and being placed against sidewalls of the active regions; etching trenches for separating the active regions; laterally etching the Ge or SiGe alloy first layer so as to form an empty tunnel under the silicon layer; filling the tunnel with a dielectric material; and filling the trenches with a dielectric material.