Patent ID: 8823169
Filing Date: 2014-09-02
Classification: H01L

Abstract:
1. A semiconductor structure at least includes: a carrier having a surface and a plurality of under bump metallurgy layers formed on the surface; and a plurality of hybrid bumps formed on the under bump metallurgy layers, wherein each of the plurality of hybrid bumps comprises a core portion and a connection portion, the core portion comprises a top surface, the connection portion includes a first connection layer and a second connection layer, the first connection layer is formed on the top surface of the core portion and the under bump metallurgy layer, wherein the first connection layer comprises a base portion, a projecting portion and an accommodating space formed by the first connection layer on the to of the core portion, the base portion comprises an upper surface, the projecting portion is protruded to the upper surface and located on top of the core portion, the accommodating space is located outside the projecting portion, the second connection layer covers the projecting portion and the upper surface, and the accommodating space is filled by the second connection layer.