Patent ID: 9034712
Filing Date: 2015-05-19
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising: providing a substrate; forming a well region in the substrate; forming a first shallow trench isolation region on and adjacent to the well region, wherein the first shallow trench isolation region is proximate to a body contact doped with the dopants of a first polarity type; forming a source region on the well region and adjacent to the first shallow trench isolation region; forming a drift region in the substrate adjacent to the well region; forming a second shallow trench isolation region on and adjacent to the drift region; forming a drain region on the drift region and adjacent to the second shallow trench isolation region; forming a gate between the source region and the drain region; forming a sidewall spacer adjacent to sidewalls of the gate; and depositing a stress layer over the semiconductor device, wherein the stress layer is also deposited inside the second shallow trench isolation region, and wherein the stress layer is proximate to the drift region.