Patent ID: 9209824
Filing Date: 2015-12-08
Classification: A61B,H03M

Abstract:
1. A method, comprising: receiving an analog signal by an analog-to-digital (A/D) converter having a full scale range and a total number of bits spanning the full scale range; converting the analog signal to a digital signal by the A/D converter over a plurality of conversion cycles using an adaptable bit number on at least a current conversion cycle of the plurality of conversion cycles, wherein the adaptable bit number comprises an adapted number of bits spanning a portion of the full scale range that is less than the full scale range of the total number of bits; determining whether a sample point of the analog signal is within the portion of the full scale range spanned by the adapted number of bits; decreasing the adaptable bit number used for a subsequent conversion cycle of the plurality of conversion cycles in response to the sample point of the analog signal being within the portion of the full scale range; and decreasing the adaptable bit number after a predetermined number of analog signal sample points are within the portion of the full scale range.