Patent ID: 6603333
Filing Date: 2003-08-05
Classification: H03K

Abstract:
Noise protection circuitry for protecting a dynamic logic circuit having an output voltage at an output node from noise at input signals to the circuit the noise protection circuitry comprising:a first transistor coupled between the output node and a first current flow or evaluate path, wherein the first transistor is selectively activated by a first input signal during an evaluate phase and wherein the first current flow or evaluate path is comprised of at least one transistor which is activated by the input signal at the same time the first transistor is activated, thereby allowing current to flow from the output node through the first current flow or evaluate path toward a low voltage or ground rail and causing the output voltage to drop; and a second transistor, opposite in polarity from the first transistor, coupled between the first current flow or evaluate path, the first transistor, and a high voltage rail, wherein the second transistor is activated by the first input signal if the first transistor is not activated during the evaluate phase, thereby ensuring that current does not flow through the first current flow or evaluate path.