Patent ID: 6242344
Filing Date: 2001-06-05
Classification: H01L,Y10S

Abstract:
A method of forming a dual damascene pattern employing a one step coating of multi-layer photoresist for both trench and via pattern, a one step photoresist stripping step and a one step post etch cleaning step, comprising the steps of:providing a semiconductor substrate having a composite layer of insulation deposited thereon whereby said composite layer of insulation comprises a first layer of photoresist separated form a third layer of photoresist by an intervening intermediate second layer of photoresist;trench patterning said third layer of photoresist by exposing said third layer of photoresist through a first mask;performing development to remove portions of said third layer of photoresist to form a trench pattern in said third layer of photoresist whereby said trench pattern extends through said second layer of photoresist;cross-linking said third layer of photoresist;via patterning said first layer of photoresist by exposing said layer of photoresist through a second mask;performing development to remove portions of said first layer of positive photoresist to form a via pattern in said first layer of photoresist whereby said via pattern extends through said first layer of positive photoresist thereby creating a dual damascene profile that is surrounded by said composite layer of insulation;transferring said dual damascene profile into the surface of said substrate; andremoving said thick layer of photoresist.