Patent ID: 9164889
Filing Date: 2015-10-20
Classification: G06F,G11C

Abstract:
1. A memory system comprising: a nonvolatile memory device having a first data area to store M-bit data using a buffer program operation and a second data area to store N-bit data using a main program operation where M and N are integers and N is greater than M; and a memory controller configured to control the nonvolatile memory device, wherein, in response to determining that the main program operation requires uses of data stored at the first and second data areas, the memory controller calculates values indicating a performance of the main program operation to be executed according to a plurality of main program schemes, selects one of the plurality of main program schemes based on the calculated values, and controls the nonvolatile memory device to perform the main program operation according to the selected main program scheme, wherein the plurality of main program schemes includes a first main program scheme and a second main program scheme, wherein the main program operation is performed based on X-page data stored at the first data area and Y-page data stored at the second data area where X and Y are integers, wherein the main program operation according to the first main program scheme includes operations of reading 1-page data of the Y-page data from the second data area via a page buffer circuit of the nonvolatile memory device, performing an error correcting operation on the read 1-page data, storing the error-corrected page data at the first data area, reading the X-page data and the error-corrected page data from the first data area, and setting up the page buffer circuit with the read X-page data, wherein the reading 1-page data of the Y-page data, the performing an error correcting operation, and storing the error-corrected page data are iterated until each page of the Y-page data is read, and wherein the main program operation according to the second main program scheme includes operations of reading 1-page data of the Y-page data from the second data area via a page buffer circuit of the nonvolatile memory device, performing an error correcting operation on the read 1-page data, and setting up the page buffer circuit with the error-corrected page data and 2-page data read from the first data area, and wherein the reading 1-page data, performing an error correcting operation, and setting up the page buffer circuit are iterated until each page of the Y-page data is read.