Patent ID: 6621110
Filing Date: 2003-09-16
Classification: H01L,Y10S

Abstract:
A semiconductor integrated circuit device having a plurality of word lines extending in a first direction, a plurality of bit lines extending in a second direction intersecting the first direction, and a plurality of memory cells each having a transistor and a capacitor placed on a bit line, said semiconductor integrated circuit device comprising:active regions formed in a surface of a semiconductor substrate, intersecting adjacent first and second word lines among the plurality of word lines and a first bit line among the plurality of bit lines, said active regions extending in a third direction different from the first and second directions and having a predetermined width along a fourth direction perpendicular to the third direction; first and second semiconductor regions formed in the active regions and serving as sources and drains of the transistors; first and second electrodes for each of the capacitors; a dielectric film formed between the first and second electrodes of the capacitors; a first insulating film formed between the bit lines and the first electrodes; a second insulating film formed between the first insulating film and either of the first and second semiconductor regions; a first conducting layer having portions formed in first openings formed in the first insulating film and electrically connecting to the first electrodes of the capacitors; and a second conducting layer having portions formed in second openings formed in the second insulating film and connecting to the first and second semiconductor regions, wherein said first conducting layer is electrically connecting to said second conducting layer; wherein portions of the first conducting layer are arranged in regions surrounded by the word lines and the bit lines when viewed from above, and a distance between adjacent centers of the portions of the first conducting layers viewed from above is smaller than a distance between adjacent centers of the portions of the second conducting layer viewed from above.