Patent ID: 6645796
Filing Date: 2003-11-11
Classification: H01L

Abstract:
A method for implementing reach through buried interconnect in building semiconductors including silicon-on-insulator (SOI) devices comprising the steps of:providing a semiconductor stack including a predefined buried conductor to be connected and including multiple insulator layers and at least one intermediate conductor above said predefined buried conductor; said multiple insulator layers including a first buried oxide layer and a second buried oxide layer; said second buried oxide layer spaced apart from said first buried oxide layer with said at least one intermediate conductor; anisotropically etching a hole through said semiconductor stack to said predefined buried conductor, said etched hole extending through said at least one intermediate conductor and said insulator layers including said first buried oxide layer and said second buried oxide layer to said predefined buried conductor in said semiconductor stack; depositing a thin layer of insulator over an interior of said etched hole; anisotropically etching said deposited thin insulator layer to remove said deposited thin insulator layer from a bottom of said hole exposing said predefined buried conductor in said semiconductor stack with said thin insulator layer covering sidewalls of said hole to define an insulated opening; filling said insulated opening with an interconnect conductor to create a connection to said predefined buried conductor in said semiconductor stack; and wherein the step of anisotropically etching a hole through said semiconductor stack to said predefined buried conductor includes the step of anisotropically etching a hole through an isolation oxide layer and said at least one intermediate conductor and said insulator layers including said first buried oxide layer and said second buried oxide layer to a bulk silicon; said predefined buried conductor comprising said bulk silicon.