Patent ID: 8513079
Filing Date: 2013-08-20
Classification: H01L

Abstract:
1. A method for making a thin-film transistor (TFT) silicon-aluminum oxide-silicon (SAS) memory cell structure, the method comprising: providing a substrate; forming a first insulation layer on the substrate; forming one or more source or drain regions on the first insulation layer, each of the one or more source or drain regions being associated with a first surface and including an N+ polysilicon layer, a barrier layer, and a conductive layer, the N+ polysilicon layer being on the barrier layer, the barrier layer overlying the conductive layer, the first surface comprising N+ polysilicon; forming a second insulation layer on the first insulation layer, the second insulation layer being associated with a second surface, the second surface being substantially co-planar with the first surface; forming a P− polysilicon layer overlying the first surface and the second surface, the P− polysilicon layer being capable of forming a channel from the source region to the drain region; forming an aluminum oxide layer overlying the P− polysilicon layer; forming a P+ polysilicon layer overlying the aluminum oxide layer; and forming at least one control gate by patterning the P+ polysilicon layer; wherein the conductive layer comprises a titanium silicide (TiSi