Patent ID: 9098332
Filing Date: 2015-08-04
Classification: G06F

Abstract:
1. Circuitry for performing arithmetic operations on a plurality of inputs, said circuit comprising: at least first and second respective operator circuits, each of said at least first and second respective operator circuits operating on a respective subplurality of said plurality of inputs; and circuitry for selectively interconnecting said at least first and second respective operator circuits so that they can operate together or separately, according to user selection, on selected ones of (a) said full plurality of inputs, (b) individual ones of said respective subpluralities of said plurality of inputs, or (c) combinations of portions of said respective subpluralities of said plurality of inputs; wherein: at least one of said respective operator circuits includes circuits for simultaneously computing multiple different results and for selecting among said multiple different results based on an output of another one of said respective operator circuits; said multiple different results comprise sum, sum-plus-1 and sum-plus-2 results; and one or more of said multiple different results are selectably usable for both fixed-point operations and floating-point operations.