Patent ID: 6475843
Filing Date: 2002-11-05
Classification: H01L

Abstract:
A method of forming a polysilicon thin film transistor with a self-aligned lightly doped drain (LDD) structure, comprising steps of:providing a transparent insulating substrate, which has a polysilicon layer, a gate insulating layer formed on the polysilicon layer, and a gate layer patterned on the gate insulating layer; performing a first ion implantation process to form a lightly doped region on the polysilicon layer surrounding the gate layer; forming an insulating layer and a barrier layer sequentially on the entire surface of the substrate; removing parts of the barrier layer, wherein the remaining part of the barrier layer is positioned over the sidewall of the gate layer; removing the insulating layer which is not covered by the remaining part of the barrier layer, wherein the remaining part of the insulating layer is positioned on the sidewall of the gate layer; and performing a second ion implantation process to form a heavily doped region on the lightly doped region which is not covered by the remaining parts of the insulating layer and the barrier layer.