Patent ID: 7993957
Filing Date: 2011-08-09
Classification: G11C,H01L

Abstract:
1. A process for forming first and second memory cells adjacent in a first direction, comprising the steps of: forming first and second resistive elements of the first and second memory cells, respectively, each of the first and second resistive elements including a first thin portion having a first sublithographic dimension in a first direction; and forming a common memory region of a phase change material and including a second thin portion in direct electrical contact with said first thin portions and having a second sublithographic dimension in a second direction transverse to said first direction; each resistive element forming, with said second thin portion, a respective contact area of sublithographic extension; wherein said step of forming a common memory region comprises forming a mold layer on top of said resistive elements; forming a first lithographic opening in said mold layer, said lithographic opening extending between said pairs of resistive elements above said first thin portion of said pair of resistive elements; forming spacer portions in said lithographic opening, said spacer portions defining a slit having said second sublithographic dimension; and depositing a phase change layer inside said slit.