Patent ID: 6710735
Filing Date: 2004-03-23
Classification: H03M

Abstract:
A pipelined analog-to-digital converter (ADC) for converting an analog signal to a succession of digital words representing successive magnitudes of the analog signal, the ADC comprising:a sequence of stages, wherein a first stage of the sequence receives said analog signal as its input signal, wherein each stage of the sequence subsequent to the first stage receives as its input signal an analog residue signal generated by a preceding stage of the sequence, wherein for each digital word of the succession, each stage of the sequence generates a sample voltage proportional to a voltage of its input signal, provides output data representing an approximate magnitude of its generated sample voltage, and provides as the input signal to a next succeeding stage of the sequence, if any, an analog residue signal of magnitude proportional to a difference between a magnitude of its generated sample voltage and the approximate magnitude represented by its output data, and wherein one stage of the sequence is powered by a first supply signal and a next succeeding stage of the sequence is powered by a second supply signal of voltage differing substantially from a voltage of the first supply signal.