Patent ID: 6617695
Filing Date: 2003-09-09
Classification: H01L,H05K

Abstract:
A semiconductor device comprising:an IC package having a body with a rear surface over which a plurality of external electrodes are distributed and exposed; and a substrate having first and second surfaces, said IC package being mounted with the first surface of said substrate and the rear surface of said IC package in face-to-face relationship, said substrate including respective lands for mounting to which said external electrodes are correspondingly bonded, said lands for mounting being disposed between the first surface of said substrate and the rear surface of said IC package, lands for external connection disposed on the first surface of said substrate beyond said IC package and including first solder bumps for external connection, and wirings connecting respective lands for mounting to corresponding lands for external connection, wherein said wirings are arranged at a first pitch on opposite sides of said package body, and said lands for external connection include a first group of lands for external connection arranged at a pitch twice as large as the pitch of said wirings, and a second group of lands for external connection arranged at a pitch twice as large as the pitch of said wiring and located farther from said package body than said first group of lands for external connection, said second group of lands for external connection being staggered with respect to said first group of lands for external connection.