Patent ID: 6703713
Filing Date: 2004-03-09
Classification: H01L

Abstract:
A window-type multi-chip semiconductor package, comprising:a substrate having an upper surface and a lower surface opposed to the upper surface, and formed with at least an opening penetrating through the substrate, at least a first chip and a second chip each having an active surface and a non-active surface opposed to the active surface, wherein the active surfaces of the first and second chips are mounted on the upper surface of the substrate respectively at opposing sides with respect to the opening in a manner that the first and second chips protrude from the opposing sides toward each other to leave a gap between the first and second chips, with the gap being smaller in dimension than the opening, allowing bond pads formed on the active surfaces of the first and second chips to be exposed to the opening of the substrate; at least a third chip having an active surface and a non-active surface opposed to the active surface, wherein the active surface of the third chip is mounted on the non-active surfaces of the first and second chips and over the gap, and bond pads formed on the active surface of the third chip are exposed to the gap; a plurality of first bonding wires for electrically connecting the third chip to the first and second chips; a plurality of second bonding wires for electrically connecting the first and second chips to the lower surface of the substrate; a plurality of third bonding wires for electrically connecting the third chip to the lower surface of the substrate; a first encapsulant formed on the upper surface of the substrate, for encapsulating the first, second and third chips; a second encapsulant formed on the lower surface of the substrate and filling into the opening and the gap, for encapsulating the first, second and third bonding wires; and a plurality of solder balls implanted on the lower surface of the substrate at area free of the second encapsulant.