Patent ID: 7031129
Filing Date: 2006-04-18
Classification: H03K

Abstract:
1. A protection circuit, to be provided for a circuit arrangement having an inductive load and an FET as an N-channel MOS transistor provided upstream of the load with respect to a flow of power current, the FET controlling an energization state of the load, the protection circuit comprising: a first connection changer interposed on a connection line between a gate of the FET and a gate drive voltage supply source, the first connection changer changing a connection state between a first connection state in which the gate is connected to the gate drive voltage supply and a second connection state in which the gate is connected to a ground; and a first resistor interposed between the gate and a source of the FET, wherein the protection circuit does not include a zener diode, and protects from overvoltage generated by the load upon discontinuing power to the load.