Patent ID: 7629818
Filing Date: 2009-12-08
Classification: G01R,G11C,H03K

Abstract:
1. A method, comprising: detecting synchronization errors between logic signals of a group of logic signals, the detecting including: providing a shift register that includes a first synchronous cell and a second synchronous cell; loading a control word into the shift register; obtaining a first resulting logic signal by applying an OR logic function to the logic signals of the group of logic signals; clocking the first synchronous cell with the first resulting logic signal; obtaining a second resulting logic signal by applying an AND logic function to the logic signals of the group of logic signals; clocking the second synchronous cell with the second resulting logic signal; propagating the control word in the shift register according to the clocking steps and monitoring the control word during the propagating; and detecting a synchronization error if the control word changes value.