Patent ID: 9219495
Filing Date: 2015-12-22
Classification: H03M,H04L

Abstract:
1. A sigma-delta (Σ-Δ) analog-to-digital (A/D) converter, comprising: a summing stage, configured to receive an input signal and subtract a first feedback signal and a second feedback signal from the input signal to generate a difference signal; a loop filter coupled to an output node of the summing stage, and configured to filter the difference signal; a quantizer coupled to an output node of the loop filter, and configured to quantize the filtered difference signal to generate a quantized signal, and to generate an overload signal according to the filtered difference signal, wherein the overload signal indicates whether the filtered difference signal is overloaded and/or an overload amount of the filtered difference signal; a first digital-to-analog (D/A) converter coupled to the quantizer to receive the quantized signal, and configured to generate the first feedback signal according to the quantized signal; and a second D/A converter coupled to the quantizer to receive the overload signal, and configured to generate the second feedback signal according to the overload signal.