Patent ID: 8941045
Filing Date: 2015-01-27
Classification: H03M,H04N

Abstract:
1. A solid-state imaging apparatus comprising: a pixel circuit to output an analog voltage having a level corresponding to an incident light quantity; a reference voltage generation circuit to generate a reference voltage whose voltage value linearly varies with the time; a counter to generate a counter code whose count value linearly varies with the time at a predetermined cycle; and an integral A/D converter to convert the analog voltage into a digital signal based on the reference voltage and the counter code, wherein the integral A/D converter includes: a comparator to compare the reference voltage with the analog voltage in terms of high and low states; and a latch circuit to latch the counter code based on a comparison result from the comparator when high-low relationship between the reference voltage and the analog voltage reverses, and wherein the counter code includes: a low-order bit code including as many as N clock signals (N is an integer greater than or equal to 2) that have equal frequencies and allow phases to shift from each other by the predetermined cycle; and a high-order bit code including a gray code whose count value varies at a cycle equal to the predetermined cycle multiplied by M (M is an integer greater than N).