Patent ID: 7969239
Filing Date: 2011-06-28
Classification: G11C,H02M

Abstract:
1. A charge pump circuit for use in an integrated circuit die, said charge pump circuit comprising: a capacitor; a plurality of transistors for charging said capacitor and discharging said capacitor thereby increasing the voltage of the charge pump circuit; and said capacitor comprises: a first electrode in a first plane, wherein said first electrode comprises a plurality of first interdigital elements electrically connected to one another; a second electrode adjacent to and spaced apart from the first electrode in the first plane and capacitively coupled thereto, wherein said second electrode comprises a plurality of second interdigital elements electrically connected to one another, with each second interdigital element between a pair of first interdigital elements; a third electrode in a second plane, spaced apart from the first plane and capacitively coupled to the first electrode, wherein said third electrode comprises a plurality of third interdigital elements electrically connected to one another, with each third interdigital element capacitively coupled to a different first interdigital element; and a fourth electrode adjacent to and spaced apart from the third electrode in the second plane and capacitively coupled to the third electrode and capacitively coupled to the second electrode, wherein said fourth electrode comprises a plurality of fourth interdigital elements electrically connected to one another, with each fourth interdigital element between a pair of third interdigital elements, and with each fourth interdigital element capacitively coupled to a different second interdigital element; wherein said first and fourth electrodes are electrically connected and said second and third electrodes are electrically connected; wherein said integrated circuit die further comprises: a semiconductor substrate having a first conductivity, said substrate having a planar surface; a first region of a second conductivity on said planar surface of said substrate; wherein said first region is electrically connected to said first electrode.