Patent ID: 6838378
Filing Date: 2005-01-04
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising the steps of: (a) preparing a semiconductor substrate having a cell region and a peripheral circuit region, the cell region and the peripheral circuit region being provided with a bit line, wherein the cell region is further provided with a storage electrode contact contacting the bit line in the cell region, a storage electrode contacting the storage electrode contact and a dielectric film formed on the storage electrode, and wherein the peripheral circuit region is further provided with a first interlayer insulating film formed on the semiconductor substrate; (b) depositing and patterning a conducting material on the dielectric film and the first interlayer insulating film to simultaneously form a plate electrode in the cell region and a contact pad above the bit line in the peripheral circuit region, the contact pad being electrically isolated from the plate electrode; (c) etching a predetermined region of the contact pad and the first interlayer insulating film therebelow to form a first contact hole exposing a top portion of the bit line in the peripheral circuit region; (d) forming a first contact plug filling the first contact hole with a conductive material; (e) forming a second interlayer insulating film covering the cell region and the peripheral circuit region; (f) etching a predetermined region of the second interlayer insulating film to form a second contact hole exposing the contact pad; and (g) forming a second contact plug by filling the second contact hole with a conductive material, and forming a metal line electrically connected to the second contact plug.