Patent ID: 6057241
Filing Date: 2000-05-02
Classification: H01L

Abstract:
A method of manufacturing a semiconductor integrated circuit device comprising the steps of:(a) thermally oxidizing a semiconductor substrate to form a first silicon oxide film on a main surface of the semiconductor substrate, subsequently forming a silicon nitride film on the first silicon oxide film, and further subsequently etching selectively the silicon nitride film, the first silicon oxide film, and the semiconductor substrate in an element isolation region, thereby to form a groove in the main surface of the semiconductor substrate;(b) etching a portion of the first silicon oxide film which is exposed from the groove to displace the first silicon oxide film backward toward an active region;(c) thermally oxidizing the semiconductor substrate to form a second silicon oxide film on an inner wall of the groove;(d) forming a third silicon oxide film on the main surface of the semiconductor substrate to fill the groove with the third silicon oxide film;(e) subjecting the semiconductor substrate to a heat treatment, thereby to sinter the third silicon oxide film filled in the groove;(f) removing a portion of the third silicon oxide film which is positioned above the silicon nitride film such that the third silicon oxide film remains only in the groove; and(g) removing a portion of the silicon nitride film which is positioned above a surface of the active region whose periphery is defined by the element isolation groove, and subsequently forming a semiconductor element at the active region, wherein:a displacement amount of the first silicon oxide film is set to be equal to or more than a film thickness of the second silicon oxide film and equal to or less than twice the film thickness thereof; andthe film thickness of the second silicon oxide film is set to be more than a film thickness of the first silicon oxide film and equal to or less than three times the film thickness thereof.