Patent ID: 8665010
Filing Date: 2014-03-04
Classification: H02M

Abstract:
1. A circuit for sub-harmonic elimination of a power converter which determines a control signal for switching a power switch by comparing a final current limit signal to a current sense signal derived from a current of the power switch, the circuit comprising: a first current limit signal generator providing a first current limit signal; a second current limit signal generator providing a second current limit signal; a current limit signal controller operative to compare a reference voltage with a ramp signal for generating a signal having a constant duty ratio, detect a duty ratio of the control signal, and generate a switch signal according to the duty ratio of the control signal and the constant duty ratio; and a selector connected to the two current limit signal generators and the current limit signal controller, responsive to the switch signal to select one from the two current limit signals as the final current limit signal; wherein the selector selects the first current limit signal as the final current limit signal when the duty ratio of the control signal is smaller than the constant duty ratio, and selects the second current limit signal as the final current limit signal when the duty ratio of the control signal is larger than the constant duty ratio.