Patent ID: 6717451
Filing Date: 2004-04-06
Classification: H03F,H03K

Abstract:
A level shifting circuit comprising:a reference level shifter having a set of performance characteristics, the reference level shifter for applying offset voltage to an input signal in response to input bias current; a second level shifter having performance characteristics closely matched to the set of performance characteristics of the reference level shifter; a first bias current control for supplying bias current to the reference level shifter, the first bias current control responsive to control voltage; a second bias current control for supplying bias current to the second level shifter, the second bias current control responsive to the control voltage; and an operational amplifier receiving a reference voltage and arranged in a closed-loop control with the first bias current control and the reference level shifter, the operational amplifier providing the control voltage to the first bias current control and to the second bias current control; whereby the second level shifter offsets a second signal by a second offset voltage in proportion to the reference voltage.