Patent ID: 6195729
Filing Date: 2001-02-27
Classification: G06F

Abstract:
A method of deallocating a cache location in a data processing system including first and second logically in line caches connected to a system memory by a system bus, wherein the second cache is logically below the first cache, comprising:selecting a victim cache line within the first cache;writing the selected victim cache line to the system memory utilizing a system bus operation;snooping the system bus operation in snoop logic for the second cache;identifying a corresponding cache line within the second cache which corresponds to the selected victim cache line;determining whether the corresponding cache line within the second cache matches the selected victim cache line;responsive to determining that the corresponding cache line within the second cache does not match the selected victim cache line, checking data for the selected victim cache line snooped from the system bus operation for a parity error; andresponsive to not detecting a parity error in the snooped system bus operation, updating the corresponding cache line within the second cache with data from the snooped system bus operation.