Patent ID: 7719058
Filing Date: 2010-05-18
Classification: H01L

Abstract:
1. A composite semiconductor device including at least one type or polarity of computing logic device and at least one type or polarity of Castellated-Gate MOSFET Device capable of fully depleted operation formed on a semiconductor substrate of a first conductivity type, wherein the Castellated-Gate MOSFET Device comprises: a semiconductor substrate body having an upper portion with a top surface and a lower portion with a bottom surface; a source region, a drain region, and a channel-forming region disposed between said source and drain regions, all of which are formed in said semiconductor substrate body; trench isolation insulator islands surrounding said source and drain regions as well as said channel-forming region and having upper and lower surfaces; said channel-forming region comprising a plurality of thin, spaced, vertically-orientated conductive channel elements that span longitudinally along said device between said source and drain regions; a trenched gate structure in the form of a plurality of spaced, castellated gate elements interposed between said channel elements, and a top gate member interconnecting said gate elements at their upper vertical ends to cover said channel elements, wherein at least one of said plurality of spaced, castellated gate elements is formed into said at least one of said trench isolation insulator islands; and a dielectric layer separating said conductive channel elements from said gate structure.