Patent ID: 6606014
Filing Date: 2003-08-12
Classification: H01L,H03H,H05K

Abstract:
An interconnect system for conductively linking a node of an integrated circuit mounted on an upper surface of a printed circuit board (PCB) to an external circuit, the node having first capacitance, wherein the PCB also has a lower surface, the interconnect system comprising:a trace formed on said PCB and vertically spaced below the upper surface of the PCB, a conductor having first inductance; and a via terminating at the upper surface of the PCB, the via providing a conductive path extending vertically within the PCB to the trace, the via having second capacitance and second inductance, wherein said conductor links the node to the via, and wherein the second capacitance is sized to satisfy a relationship between the second capacitance, the first inductance, the second inductance, and the first capacitance.