Patent ID: 6236108
Filing Date: 2001-05-22
Classification: H01L

Abstract:
A semiconductor packaging chip-supporting substrate comprising:(a) an insulating supporting substrate on one surface of which a plurality of wirings are formed; said wirings each having at least:(i) an inner connection that connects to a semiconductor chip electrode, and(ii) a semiconductor chip-mounting region;(b) an opening provided in said insulating supporting substrate at a part where each of said wirings is formed on said insulating supporting substrate, which is a part where an outer connection is provided conducting to said inner connection; and(c) at least one through-hole provided between said wirings within said semiconductor chip-mounting region of said insulating supporting substrate; wherein(d) said through-hole is provided in such a manner that an insulating film formed at a position on which the semiconductor chip will be mounted later, covering said semiconductor chip-mounting region of said wiring region, forms a hollow between said insulating film and said insulating supporting substrate around said through-hole.