Patent ID: 8846476
Filing Date: 2014-09-30
Classification: H01L

Abstract:
1. A method of forming an integrated circuit product comprised of first and second N-type transistors, wherein said first and second transistors are formed in and above first and second active regions, respectively, comprising: performing a common threshold voltage adjusting ion implantation process on said first and second active regions; forming said first and second N-type transistors in and above said first and second active regions; forming a masking layer that masks said second transistor but leaves said first transistor exposed for further processing; performing an amorphization ion implantation process through said masking layer on said exposed first transistor so as to form regions of amorphous material in said first active region; removing said masking layer; forming a capping material layer above said first and second transistors and above said first and second active regions, said capping material layer comprising a material having a Young's modulus of at least 180 GPa; and after forming said material layer, performing a re-crystallization anneal process to convert at least portions of said regions of amorphous material to a crystalline material.