Patent ID: 6589832
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A process for manufacturing at least one memory cell in a substrate defining a deep trench, said substrate covered by a pad nitride layer with a bottom surface and a top surface having a layer of oxide covering said top surface, said deep trench filled with poly to a level above a trench collar oxide, said process comprising the further steps of:depositing gate poly to cover said pad nitride layer and to underfill said trench thereby leaving an open core in said gate poly extending from a top surface of said nitride layer into said trench; providing an oxide fill to fill said open core and cover said poly; removing said oxide fill and said poly down to said top surface of said pad nitride layer leaving an area of poly with an oxide core; recessing said area of poly; depositing nitride to fill said poly recess and form a nitride spacer; stripping said oxide core leaving an open core in said poly area; and filling said open core with a poly stud extending from said gate poly to a level above the top surface of said nitride spacer.