Patent ID: 6796803
Filing Date: 2004-09-28
Classification: H01R,H05K

Abstract:
A computer system comprising:a plurality of memory slots each of which has a structure for accepting a memory module inserted therein and includes a plurality of connector terminals for being in contact with module pins formed in said memory module; a memory bus which includes a plurality of signal lines coupled to the at least one connector terminal of each of said plurality of memory slots; a memory controller which is coupled to a plurality of memory chips on said memory module inserted in at least one of said plurality of memory slots, through said memory bus; and at least one electric load, and wherein said plurality of memory slots includes a first part of memory slots which is coupled to said memory module and provides electrical contact between the plurality of signal lines of said memory bus and the module pins, respectively, using their corresponding connector terminals, and a second part of memory slots which is not coupled to said memory module and provides electric contact between the plurality of signal lines of said memory bus and the electric load using their corresponding connector terminals.