Patent ID: 6972446
Filing Date: 2005-12-06
Classification: G11C,H01L

Abstract:
1. A semiconductor integrated circuit device comprising: a semiconductor substrate on which a plurality of transistors having gate insulation films of three or more different thicknesses are formed; an input/output terminal formed on the semiconductor substrate, wherein a transistor physically connected directly to the input/output terminal is one of the transistors other than a transistor having the thinnest gate insulation film; an interface circuit connected to the input/output terminal, wherein a transistor included in the interface circuit and connected directly to the input/output terminal is one of the transistors other than the transistor having the thinnest gate insulation film, and wherein said interface circuit includes a level shifter and an output buffer circuit; and a regulator circuit, said level shifter converting a lowered potential level signal obtained from the regulator circuit into a power supply voltage level signal to be supplied to an external terminal, wherein a transistor included in the level shifter and a device directly receiving the lowered potential level signal is the transistor having the thinnest gate insulation film.