Patent ID: 6330187
Filing Date: 2001-12-11
Classification: G11C,H01L

Abstract:
A nonvolatile memory device comprising:a semiconductor substrate of a first conductivity type;a first insulating layer, a floating gate, a second insulating layer and a control gate sequentially stacked on the semiconductor substrate;a highly doped source of a second conductivity type formed around a surface of the semiconductor substrate, spaced away from a sidewall of the floating gate;a lightly doped source of the second conductivity type formed around the surface of the semiconductor substrate, wherein the lightly doped source is connected to the highly doped source and is overlapped by the floating gate, and the lightly doped source has an impurity concentration lower than that of the highly doped source; anda drain of the second conductivity type formed around the surface of the semiconductor substrate, wherein the drain of the second conductivity type is overlapped by the floating gate and is deeper than the highly doped source, the drain of the second conductivity type having an impurity concentration the same as that of the highly doped source.