Patent ID: 7095415
Filing Date: 2006-08-22
Classification: G06F

Abstract:
1. A graphics display architecture, comprising: an Accelerated Graphics Port (AGP) slot; a Peripheral Component Interconnection Express (PCIE) slot; and a control chip set, electrically coupled to both the AGP slot and the PCIE slot; wherein said control chip set uses a shared bus to connect said AGP slot and said PCIE slot and serves to send/receive a signal complied with an AGP interface specification as an AGP graphics adapter is plugged in the AGP slot, said control chip set serves to send/receive the signal complied with a Gfx interface specification as a Graphics (Gfx) adapter is plugged in the AGP slot, and said control chip set serves to send/receive the signal complied with a PCIE interface specification as a PCIE graphics adapter is plugged in the PCIE slot.