Patent ID: 9069971
Filing Date: 2015-06-30
Classification: G06F

Abstract:
1. A method for testing the security of an electronic device against a combination of a side-channel attack and a fault-injection attack implemented during an execution, in the electronic device, of a method of cryptographic processing that includes a step of delivering a signature of a message on the basis of at least one secret parameter, said step of delivering a signature implementing a recombination of at least two intermediate values according to the Chinese remainder theorem, and a step of verifying said signature on the basis of at least one public exponent, wherein the method for testing comprises: a step of transmitting a plurality of messages to be signed by said electronic device; a step of disturbing each message, comprising a modification of said message by the insertion of an identical error into said message, before executing a step of determining one of the intermediate values to be recombined during the step of delivering a signature of said message; a step of obtaining physical measurements during said step of verifying said signature; a step of analyzing said physical measurements as a function of said message to be signed, said identical error, and an assumption of a value of a part of said at least one secret parameter.