Patent ID: 9159628
Filing Date: 2015-10-13
Classification: H01L

Abstract:
1. A combination-type transistor comprising: a first MOSFET that is formed on a substrate, and includes a gate, a first source formed on one side of the gate, and a first drain formed on the other side of the gate; a second MOSFET that includes the gate, a second drain formed on the one side of the gate so as to face the first source, and a second source formed on the other side of the gate so as to face the first drain; a first BJT that is formed such that the first source of the first MOSFET is used as an emitter, the second drain of the second MOSFET is used as a collector, and the substrate is used as a base; and a second BJT that is formed such that the second source of the second MOSFET is used as an emitter, the first drain of the first MOSFET is used as a collector, and the substrate is used as a base.