Patent ID: 6344765
Filing Date: 2002-02-05
Classification: H04L

Abstract:
An input buffer circuit for receiving a signal varying within a voltage range having a center thereof substantially closer to a power supply voltage than to a ground voltage, said input buffer circuit comprising:a level-shift circuit shifting voltage levels of said signal and a reference voltage to produce a level-shifted signal voltage and a level-shifted reference voltage; a target-voltage setting circuit which includes a replica circuit that imitates said level-shift circuit, and compares a predetermined target voltage with a copy of the level-shifted reference voltage generated by said replica circuit so as to produce a control voltage that is supplied to said level-shift circuit and fed back to said replica circuit to adjust the replica of the level-shifted reference voltage, thereby controlling an amount of level-shift generated by said level-shift circuit; and a differential-amplifier circuit amplifying a difference between said level-shifted signal voltage and said level-shifted reference voltage to output a signal reflecting the difference.