Patent ID: 7129149
Filing Date: 2006-10-31
Classification: H01L

Abstract:
1. A method for forming a shallow trench isolation structure comprising: forming a trench within a semiconductor substrate, said trench having a bottom surface and having side surfaces that extend on each side of said bottom surface; depositing an anti-reflective film within said trench such that said anti-reflective film overlies said bottom surface and said side surfaces of said trench, a portion of said anti-reflective film overlying a hard mask that extends over said semiconductor substrate; depositing a dielectric film over said anti-reflective film; heating said semiconductor substrate so as to round corners of said trench; and removing that portion of said anti-reflective film and said dielectric film that overlie said hard mask so as to form an anti-reflective liner that extends within said trench and form a dielectric plug that is disposed within said anti-reflective liner.