Patent ID: 6985390
Filing Date: 2006-01-10
Classification: G11C

Abstract:
1. An integrated memory circuit having a redundancy circuit for replacing a memory area with a redundant memory area, the redundancy circuit comprising: a set of fuse storage elements for setting an address of the memory area which is to be replaced by the redundant memory area, wherein each fuse storage element is initially set to a first state and selectively set to a second state by the respective fuse storage element being permanently changed; an activation fuse storage element for activating the address stored in the set of fuse storage elements; and a deactivation storage element for preventing replacement of the memory area by the redundant memory area when each fuse storage element is set to the second state, wherein the deactivation storage element is connected to the one or more fuse storage elements to determine whether each of the fuse storage elements has been set to the second state.