Patent ID: 6194312
Filing Date: 2001-02-27
Classification: G01J,H01L

Abstract:
A semiconductor device manufacturing method, comprising the steps of:uniformly applying a first photoresist onto a first layer, wherein said first layer is formed on a semiconductor substrate;forming a first resist pattern out of said first photoresist by using a first photomask;etching said first layer by using said first resist pattern, thereby forming a first pattern, wherein said first pattern comprises an active portion, a first peripheral portion surrounding said active portion, and a second peripheral portion surrounding said first peripheral portion, wherein all of said first layer is removed from said first peripheral portion and none of said first layer is removed from said second peripheral portion during said etching of said first layer, and wherein said active portion is patterned to comprise a plurality of regular patterns formed by removing only predetermined areas of said first layer;uniformly applying a second photoresist onto said semiconductor substrate where said first pattern is formed;forming a second resist pattern out of said second photoresist by using a second photomask; andetching said first pattern by using said second [photoresist] resist pattern, thereby forming a second pattern constituted by said first layer, wherein said second pattern comprises said active portion, a third peripheral portion surrounding said active portion and coextensive with said first peripheral portion, a fourth peripheral portion surrounding said third peripheral portion and coextensive with said second peripheral portion, and wherein all of said first layer is removed from said fourth peripheral portion during said etching of said first pattern.