Patent ID: 6338125
Filing Date: 2002-01-08
Classification: G06F

Abstract:
An apparatus for tracking memory requests, the apparatus comprising:an input line providing a first memory operation request and a second subsequent memory operation request to a memory control unit; a memory request bus receiving the first and second memory operation requests; a memory request output line from the memory control unit to a memory; a slot control register storing the source of each memory operation request; a memory request storage connected to the memory request bus and responsive to the slot control register, the memory request storage storing a copy of each of the requested first and second memory operations; a retry flag portion of the memory request storage having a first retry flag being set while the first memory operation request is pending and a second retry flag being set while the second memory operation request is pending; and a connection from the memory request storage to the memory request output line for outputting the copy of each of the first and second memory operation requests in storage on the memory request output line while the respective first and second retry flag is set.