Patent ID: 8966224
Filing Date: 2015-02-24
Classification: G06F

Abstract:
1. A method of performing a deterministic reduction operation in a parallel computer, the parallel computer comprising a plurality of compute nodes, each compute node comprising a plurality of computer processors and a CAU (Collectives Acceleration Unit), the CAU coupling computer processors of compute nodes to one another for data communications in a cluster data communications network, the method comprising: organizing three or more processors of the parallel computer and a CAU into a highly branched tree topology, wherein the CAU is a root of the highly branched tree topology and each processor in the highly branched tree topology is a direct child of the root CAU; establishing a receive buffer comprising a plurality of receive elements, each receive element associated with one of the processors in the highly branched tree topology and configured to store the associated processor's contribution data; receiving, by the root CAU in any order from the processors in the highly branched tree topology, each processor's contribution data; tracking receipt of each processor's contribution data wherein tracking receipt of each processor's contribution data further comprises maintaining a count of the number of processors from which contribution data has been received; and reducing, by the root CAU, only after receipt of contribution data from all processors in the highly branched tree topology, the contribution data stored in the receive buffer in a predefined order wherein reducing the contribution data stored in the receive buffer in a predefined order further comprises reducing the contribution data only after the count is equal to the number of processors in the highly branched tree topology.