Patent ID: 6207539
Filing Date: 2001-03-27
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device for an SRAM memory cell comprising:forming a mask layer covering a semiconductor substrate; selectively removing said mask layer and said semiconductor substrate to form a recess in said semiconductor substrate;performing an oxidation with said mask layer as a mask to form an element isolation film having a substantially planar upper surface in the recess;selectively forming a first conductive film and a second conductive film, said first conductive film being formed on said element isolation film and having an end coincident with an end of said element isolation film and having a substantially flat upper surface, said second conductive film being formed over said semiconductor substrate apart from said first conductive film and said element isolation film;forming a diffusion region on said semiconductor substrate between said first and second conductive films;forming an interlayer insulating film over the entire surface of said semiconductor substrate;forming a resist film on said interlayer insulating film, said resist film having an opening arranged over said end of said first conductive film and a part of said diffusion region;removing a portion of said interlayer insulating film using said resist film as a mask to form a contact hole exposing said end of said first conductive film and said part of said diffusion region.