Patent ID: 6600435
Filing Date: 2003-07-29
Classification: H03M

Abstract:
A digital-analog converting circuit having an input terminal and an output terminal, and configured to output a voltage between a first and second voltages, said voltage corresponding to a digital signal of n bits (n is an integer more than two), comprising:a plurality of first capacitors configured to accumulate electric charges in accordance with values of respective bits, except for a most significant bit, of the n bits of said digital signal; a second capacitor configured to accumulate an electric charge corresponding to said first voltage and a charge accumulated in said plurality of first capacitors; a third capacitor configured to accumulate an electric charge corresponding to the value of the most significant bit of said digital signal and a charge accumulated in the second capacitor; a switching circuit connecting said input, said output, said plurality of first capacitors, said second capacitor, and said third capacitor; and a charge control circuit configured to control charging of the plurality of first capacitors, transferring electric charges from the plurality of first capacitors into said second capacitor, charging said third capacitor with a charge corresponding to the most significant bit of said third capacitor, and transferring electric charges from said second capacitor into said third capacitor.