Patent ID: 7691748
Filing Date: 2010-04-06
Classification: H01L

Abstract:
1. A method for forming a through-silicon via in a semiconductor wafer, said method comprising the steps of: defining a groove in a wafer, said wafer capable of forming a plurality of semiconductor chips; applying a liquid polymer onto the wafer to fill the groove and to cover an upper surface of the wafer by a process including spin coating; removing at least part of the polymer filled in the groove and all of the polymer covering the upper surface of the wafer such that a portion of a bottommost surface of the groove is exposed so as to form an insulation layer on a sidewall of the groove through patterning the polymer; applying a metal to fill the groove, which includes an insulation layer on a sidewall; and back-grinding a backside of the wafer to expose the metal layer filled in the groove, wherein the insulation layer formed on the sidewall of the groove provides a flexible mechanical interface between the sidewall of the groove and the metal filling the groove such that the insulation layer can accommodate variations in thermal expansion coefficients between the wafer having the groove and the metal filling the groove.