Patent ID: 8959131
Filing Date: 2015-02-17
Classification: G06F,H03M

Abstract:
1. Apparatus for processing data comprising: processing circuitry configured to perform processing operations including floating point processing operations having 2 decoder circuitry configured to decode program instructions to generate control signals to control said processing circuitry to perform said processing operations; wherein said decoder circuitry is configured to decode a floating point pre-conversion instruction to generate control signals to control said processing circuitry to perform a data processing operation to give a result the same as given by: receiving a 2 converting said X-bit input mantissa field to a Y-bit intermediate mantissa field with rounding using a round-to-nearest ties to even rounding mode; concatenating said Y-bit intermediate mantissa field with a suffix value comprising (X-Y) zeros to form an X-bit output mantissa field; and generating a 2