Patent ID: 8508270
Filing Date: 2013-08-13
Classification: H03L

Abstract:
1. A system including a phase locked loop circuitry, the system comprising: a voltage controlled oscillator (VCO) having a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided; a phase and frequency detector which generates first VCO input signals indicative of a phase difference between the VCO output signal and a reference signal and a frequency difference between the VCO output signal and the reference signal; a conversion circuitry coupled to translate the first VCO input signals into digital words; a control circuitry, coupled between a supply voltage terminal and a reference voltage terminal, and comprising a current source and at least one digital to analog converter, configured to generate an integral path input signal based on input of the digital words to the digital to analog converter; a first integral path circuitry comprising a first transistor device and a low pass filter, the low pass filter coupled to receive the integral path input signal and provide a low pass filtered version of the integral path input signal to a first terminal of the first transistor device to control conduction through the first transistor device and provide a first adjustment signal from the first transistor device for adjustment of the frequency of the VCO output signal; and a proportional path switching circuitry, coupled between the supply terminal and the first input terminal of the VCO, including: a second transistor device connected to receive the first VCO input signals to control conduction between the supply terminal and the first input terminal of the VCO in order to provide a second adjustment signal from the second transistor for adjustment of the phase of the VCO output signal relative to the reference signal; and a third transistor device connected to the low pass filter to receive the low pass filtered version of the integral path input signal to control conduction through the third transistor device, conduction through the third transistor device controlling current through the second transistor device.