Patent ID: 6496044
Filing Date: 2002-12-17
Classification: H03K

Abstract:
An output circuit compatible with a plurality of voltage levels, comprising:a first data input terminal providing a first data input signal; a second data input terminal providing a second data input signal; an internal node; an output terminal; a level shifter having an input node coupled to the first data input terminal and an output node; a first pull-up coupled between the output terminal and a power high VDDE, and having a gate terminal coupled to the internal node; a first pull-down coupled between the output terminal and a ground GND, and having a gate terminal coupled to the second data input terminal; a second pull-up coupled between the internal node and the power high VDDE, and having a gate terminal coupled to the first data input terminal; a second pull-down coupled between the internal node and the ground GND, and having a gate terminal coupled to receive an inverse signal from the first data input signal; a third pull-up coupled between the internal node and the power high VDDE, and having a gate terminal coupled to the output node of the level shifter; and a pass transistor coupled between the internal node and the output node of the level shifter, and having a gate terminal coupled to the output terminal.