Patent ID: 6400184
Filing Date: 2002-06-04
Classification: H03K

Abstract:
A transistor output circuit comprising:a first and a second transistors, wherein input signals each having an opposite phase to each other are supplied to respective bases of the first and the second transistors, respective emitters of the first and the second transistors are connected together at a common connection point, and respective collectors of the first and the second transistors are connected to a first reference potential via at least a load resistance; a third transistor, wherein a base of the third transistor is connected to the collector of said first transistor, and a collector of the third transistor is connected to said first reference potential; a first level shift, wherein one end of the first level shift is connected to an emitter of said third transistor; a fourth transistor, wherein a base of the fourth transistor is connected to the collector of said second transistor and to the other end of said first level shift, and a collector of the fourth transistor is connected to said first reference potential; a second level shift, wherein one end of the second level shift is connected to an emitter of said fourth transistor; a constant current supply connected between the other end of said second level shift and a second reference potential to provide a bias voltage for setting a value of its current at discretion; and a fifth transistor, wherein a base of the fifth transistor is connected to a common connection point between said constant current supply and the other end of said second level shift, a collector of the fifth transistor is connected to the emitter of said third transistor; wherein: an output is obtained across said second reference potential and a common connection point between the collector of said fifth transistor and the emitter of said third transistor.