Patent ID: 6282120
Filing Date: 2001-08-28
Classification: G11C

Abstract:
A non-volatile memory comprising an array of memory cells, each memory cell having a source, a drain, a charge storage and a control gate, said charge storage receptive to variable amount of charges being stored therein for designating a plurality of memory states, said non-volatile memory further comprising:predetermined voltages being applied respectively to the source, the drain and the control gate of a memory cell being sensed, thereby producing a source-drain current corresponding to one of said variable amount of charges stored in the charge storage of said memory cell being sensed, said source-drain current having an inherent noise fluctuation component; anda sensing circuit connectable to said memory cell to sense the memory state thereof as a function of an average value of said source-drain current over a predetermined period of sensing time sufficient for the noise fluctuation component therein to cancel to a predetermined level.