Patent ID: 7672403
Filing Date: 2010-03-02
Classification: H03D,H03J

Abstract:
1. A radio receiver comprising: an analog front end for receiving a received radio signal containing a selected one of a plurality of channel signals, and for converting the selected one of the plurality of channel signals into a digital signal that includes an in-phase signal and a quadrature phase signal; a digital section, operably coupled to the analog front end, for converting the digital signal into at least one audio signal that corresponds to the selected one of the plurality of channel signals, the digital section having a first in-phase digital submodule and a first quadrature phase digital submodule; and a digital clock generator, operably coupled to the first in-phase digital submodule and the first quadrature phase digital submodule, for generating a first in-phase digital clock signal having a plurality of first in-phase digital clock cycles over a predetermined period and a first quadrature phase digital clock signal having a plurality of first quadrature phase digital clock cycles over the predetermined period, wherein the plurality of first in-phase digital clock cycles are substantially interleaved with the plurality of first quadrature phase digital clock cycles over the predetermined period, wherein the digital clock generator generates a base clock signal at a base clock frequency that varies based on the selected one of the plurality of channel signals, wherein the plurality of first in-phase digital clock cycles and the plurality of first quadrature phase digital clock cycles are substantially constant over the predetermined period, wherein the base clock frequency is less than a carrier frequency of the selected one of the plurality of channel signals, and wherein the base clock frequency and integer multiples of the base clock frequency are not equal to the carrier frequency of the selected one of the plurality of channel signals.