Patent ID: 6150189
Filing Date: 2000-11-21
Classification: H01L

Abstract:
A method of simultaneously forming a photo diode and a CMOS transistor on a semiconductor wafer, the semiconductor wafer comprising a P-type substrate on its surface, and the surface of the P-type substrate comprises at least one N-channel MOS area for forming an NMOS transistor of the CMOS transistor, a P-channel MOS area for forming a PMOS transistor of the CMOS transistor, and a photo sensing area for forming a photo diode, the method comprising the following steps:performing a first ion implantation process to form a P-type well of the NMOS transistor in the NMOS area; andperforming a second ion implantation process to form a first N-type doped area in at least one predetermined area on the surface of the photo sensing area and also to form a N-type well of the PMOS transistor in the PMOS area;wherein the dopants in the first N-type doped area interact with the neighboring P-type substrate to form a depletion region which fills the P-type substrate within the photo sensing area but outside the predetermined area so that the surface of the photo sensing area is completely covered by the first N-type doped area and the depletion region, and the depletion region formed on the surface of the photo sensing area is used to enhance the sensitivity of the photo diode to blue light.