Patent ID: 7466251
Filing Date: 2008-12-16
Classification: H03M

Abstract:
1. A time-interleaved A/D converter device comprising: first and second A/D converter circuits arranged in parallel with each other, said first and second A/D converter circuits receiving first and second clock signals having a predetermined phase relationship therebetween, respectively, and operating a time-interleaved manner; and a phase adjustment circuit provided corresponding to said first and second A/D converter circuits; said phase adjustment circuit including an interpolator that derives an interpolation value corresponding to a case where an input signal is sampled using a second clock signal which is free of a clock skew and has the predetermined phase relationship with respect to the first clock signal, based on an output sequence of said first A/D converter circuit that samples the input signal using the first clock signal; said phase adjustment circuit controlling a phase of the second clock signal so that an actual output of said second A/D converter circuit becomes close to the interpolation value or matches the interpolation value, based on the actual output of said second A/D converter circuit and the interpolation value.