Patent ID: 6815311
Filing Date: 2004-11-09
Classification: H01L,Y10S

Abstract:
A method for fabricating a semiconductor memory device, comprising the steps of:depositing first and second insulating layers on a semiconductor substrate having a shallow trench isolation (STI) region and a deep trench isolation (DTI) region; forming the STI region by selectively etching the second and first insulating layers and the semiconductor substrate; forming a photoresist to cover the STI region and expose the DTI region; curing a surface of the photoresist by implanting high energy argon ions or through an e-beam process, wherein an implanting concentration of argon ions is 1012Ëœ15 cm3 and an implanting energy of argon ions is 10Ëœ200 KeV, said argon employed only to supply energy to said photoresist; and forming the DTI region by using only the cured photoresist and the second insulating layer as a mask.