Patent ID: 9064784
Filing Date: 2015-06-23
Classification: H01L

Abstract:
1. A packaged integrated circuit, comprising: a die, the die including a plurality of bond pads; a plurality of wire bonds electrically contacting the plurality of bond pads; and a substrate comprising a plurality of layers, wherein the plurality of layers include at least (i) an uppermost layer, (ii) a lowermost layer, and (iii) a middle layer disposed between the uppermost layer and the lowermost layer, wherein the substrate is configured to electrically connect the plurality of wire bonds and a plurality of external package connectors, wherein the substrate includes (i) a plurality of mechanical vias, each mechanical via being through all of the plurality of layers of the substrate, and (ii) a plurality of laser vias in the uppermost layer of the substrate but not in the lowermost layer of the substrate, wherein the lowermost layer of the substrate does not include any laser via, wherein each of the plurality of laser vias is closer to the die than each of the plurality of mechanical vias (a) that do not overlap with the die or (b) that are not covered by the die, and wherein each of the plurality of mechanical vias is connected to at least one of the plurality of external package connectors via a corresponding trace on a lowermost surface of the lowermost layer of the substrate.