Patent ID: 7910908
Filing Date: 2011-03-22
Classification: H01L

Abstract:
1. A phase change memory device comprising: a semiconductor substrate having a plurality of phase change cell regions; a plurality of lower electrodes formed on the semiconductor substrate in the phase change cell regions; an insulation layer formed over the semiconductor substrate and covering the lower electrodes, the insulation layer having a plurality of contact holes exposing the lower electrodes; a first heater and a second heater formed in the plurality of contact holes; a conductive pattern formed at least on a left side region of the first heater, on a middle region between the first and second heaters, and on a right side region of the second heater so as to expose the first and second heaters, portions of the insulation layer between the first heater and the conductive pattern and portions of the insulation layer between the second heater and the conductive pattern; a phase change layer pattern formed on the first and second heaters, the conductive pattern, and the portions of the insulation layer between the first heater and the conductive pattern and between the second heater and the conductive pattern; and an upper electrode formed on the phase change layer pattern.