Patent ID: 6356988
Filing Date: 2002-03-12
Classification: G06F

Abstract:
A memory access system comprising:a memory divided into a plurality of banks, 2n in number (n being an integer greater than one), each of which is individually assigned with a bank number B (B being an integer satisfying 0&lE;B&lE;2nâˆ’1) and includes a plurality of row addresses identified by row address numbers A (A being an integer satisfying A&gE;0), said memory being inhibited from successively accessing different row addresses within the same bank of said banks, said memory being for use in memorizing two-dimensional arrangement data comprising a plurality of data elements each of which is represented by a coordinate (X, Y); a memory access unit for accessing said memory to store said two-dimensional arrangement data into said memory, said memory access unit producing the coordinate (X, Y) corresponding to a particular data element of the data elements of said two-dimensional arrangement data when said memory access unit accesses said memory to store said particular data element into said memory; and an address converter comprising a bank number calculating unit for calculating, in response to the coordinate (X, Y) corresponding to said particular data element, the bank number B of a particular bank of said banks where said particular data element is to be memorized, and a row address number calculating unit for calculating, in response to the coordinate (X, Y) corresponding to said particular data element, the row address number A of a particular address of the row addresses of said particular bank where said particular data element is to be memorized, the bank number B and the row address number A being given by: B={YÃ—(2nÃ—m+k)+X}mod 2n A=INT[{YÃ—(2nÃ—m+k)+X}/2n], where m is a positive integer, where k is a positive integer smaller than 2n and other than 1, where mod is an operator for calculating a remainder, and where INT is an operator for obtaining an integral quotient;the bank number B and the row address number A thus calculated being supplied to said memory.