Patent ID: 8037089
Filing Date: 2011-10-11
Classification: G01R

Abstract:
1. A test system, for testing a plurality of devices under test (DUTs), comprising: a tester, providing a plurality of control signals; and determining a plurality of test results for the DUTs according to a plurality of measurement results generated by the DUTs, wherein the tester includes a first measuring instrument, coupled to the tester and the first DUT, for measuring the first DUT according to the first test signal; and a plurality of processors, coupled to the tester, generating a plurality of test signals according to the plurality of control signals, wherein the plurality of DUTs generate the plurality of measurement results according to the plurality of test signals; wherein the tester generates an interface control signal according to the plurality of measurement results, and determines the plurality of test results for the DUTs according to the interface control signals; and wherein the interface control signals include a plurality of end of test signals (EOT signals) indicating when different DUT tests are finished, a pass signal indicating when a DUT corresponding to an EOT signal passes a test, and a fail signal indicating when a DUT corresponding to an EOT signal fails a test.