Patent ID: 6232939
Filing Date: 2001-05-15
Classification: G09G

Abstract:
A liquid crystal display apparatus comprising:an array of pixels;a horizontal scanning circuit responsive to a horizontal scanning direction setting signal;a vertical scanning circuit responsive to a vertical scanning direction setting signal;an image signal supply circuit to which pixel signals are applied externally, said image signal supply circuit being connected with said array of pixels and being driven by said horizontal scanning circuit; anda vertical scanning control circuit connected with said array of pixels and being driven by said vertical scanning circuit,said vertical scanning circuit being cooperative with said horizontal scanning circuit to cause transference of said pixel signals from said image signal supply circuit to said array of pixels, whereineach of said horizontal scanning circuit and vertical scanning circuit includes a series connection of bidirectional shift register stages, each of said bidirectional shift register stages(a) having a pair of latches connected in tandem, one of said pair of latches having an intermediate output terminal connected to the other latch, said other latch having a bidirectional shift register stage output terminal connected to a next bidirectional shift register stage, and(b) being operative with a clock signal to shift a first output from the intermediate output terminal of said one latch to said other latch and to shift a second output from the bidirectional shift register stage output terminal of said other latch to the next bidirectional shift register stage,in said horizontal scanning circuit, the pair of latches of each of said bidirectional shift register stages except those located at both ends of said series connection have respective intermediate and bidirectional shift register stage output terminals electrically connected to said image signal supply circuit, while the pair of latches of the shift register stages located at each end of said series connection have their bidirectional shift register stage output terminals electrically connected to said image signal supply circuit and their intermediate output terminals not connected to said image signal supply circuit, andin said vertical scanning circuit, the pair of latches of each of said bidirectional shift register stages except those located at both ends of said series connection have respective intermediate and bidirectional shift register stage output terminals electrically connected to said vertical scanning control circuit, while the pair of latches of the shift register stages located at each end of said series connection have their bidirectional shift register stage output terminals electrically connected to said vertical scanning control circuit and their intermediate output terminals not connected to said vertical scanning control circuit.