Patent ID: 6262474
Filing Date: 2001-07-17
Classification: H01L

Abstract:
A semiconductor device comprising:a casing;a substrate situated in the casing;at least one semiconductor chip fixed on the substrate;at least one lead-out terminal for connecting the at least one semiconductor chip to outside, said at least one lead-out terminal having a fixed portion fixed to the casing and a plurality of soldered portions branching from the fixed portion and soldered to the substrate; andstress relaxing means disposed between the soldered portion and the fixed portion of the at least one lead-out terminal, said stress relaxing means being arranged such that a ratio of deflection between the soldered portion and the fixed portion relative to displacement at the soldered portion, to which a predetermined temperature change is applied, is at least 0.4 and relieving stress along three axial directions orthogonal to each other.