Patent ID: 6740964
Filing Date: 2004-05-25
Classification: H01L,H05K

Abstract:
A semiconductor package for three-dimensional mounting, comprising:a first substrate having an upper surface on which a first metal pattern is formed and a lower surface on which a second metal pattern is formed, said first metal pattern and second metal pattern being electrically connected to each other; a semiconductor chip which is placed on the upper surface of the first substrate and Is electrically connected to the first metal pattern; a sealing resin layer which is formed on the upper surface of the first substrate and seals the semiconductor chip and the first metal pattern; a conductive wire which passes through the resin layer and has one end electrically connected to the first metal pattern and the other end exposed at a top surface of the resin layer, the exposed other end of said conductive wire and the top surface of the resin layer being substantially level with each other, the exposed other end of said conductive wire being adapted to receive a first solder ball directly thereon; a first electrode which is formed on the lower surface of the first substrate and is electrically connected to the second metal pattern; and a second solder ball directly bonded to said first electrode wherein when the first solder ball is received on the exposed other end of said conductive wire, the first solder ball will be disposed in alignment with said second solder ball, and said second solder ball will be electrically connected to the first solder ball, thereby allowing said first substrate to be connected to another substrate, with said first substrate having a same orientation as the another substrate.