Patent ID: 7932531
Filing Date: 2011-04-26
Classification: H01L

Abstract:
1. A chip package, comprising: a thermal enhanced plate; a plurality of contacts disposed around the thermal enhanced plate, wherein the thermal enhanced plate is separated from the contacts; a film-like circuit layer disposed on the thermal enhanced plate and the contacts and electrically insulated from the thermal enhanced plate; a conductive adhesive layer disposed between the film-like circuit layer and the contacts, wherein the film-like circuit layer and the contacts are electrically connected through the conductive adhesive layer; at least a chip disposed on the film-like circuit layer, wherein the chip has an active surface, a back surface, and a plurality of bumps, the bumps are disposed on the active surface, and the chip is electrically connected to the film-like circuit layer via the bumps; and a first molding at least encapsulating a portion of the thermal enhanced plate, the conductive adhesive layer, parts of the contacts and at least a portion of the film-like circuit layer.