Patent ID: 8773182
Filing Date: 2014-07-08
Classification: G04F,H03L

Abstract:
1. A time-to-digital converter (TDC), comprising: a triggered ring oscillator (TRO) configured, when triggered by a reference signal edge, to generate a periodic TRO signal with a TRO period that is a selected ratio of a voltage-controlled oscillator (VCO) period, wherein the TRO period is greater than or less than the VCO period by the specified ratio; and a stochastic TDC (sTDC) with an event triggered memory including an sTDC component with a plurality of groups of latches, wherein each group of latches is configured to sample and store a VCO state at an edge of a TRO signal, and the sTDC component triggers a capture of a select number of VCO states of the group of latches when one latch in the group of latches transitions to a different digital state referred to as a transition edge, wherein the edge is either a rising edge or a falling edge of a signal.