Patent ID: 9041100
Filing Date: 2015-05-26
Classification: H01L

Abstract:
1. A semiconductor device that has a source region, a channel region, and a drain region disposed in order from a surface of the semiconductor device in a thickness direction of a semiconductor substrate, the semiconductor device comprising: a source metal embedded in a source contact groove, the source contact groove penetrating the source region and reaching the channel region; a gate insulating film formed on a side wall of a gate trench, the gate trench being formed so that the gate trench penetrates the source region and the channel region and reaches the drain region; a polysilicon gate embedded in the gate trench so that at least a region facing the channel region in the gate insulating film is covered with the polysilicon gate and so that all of the polysilicon gate is placed under a surface of the source region; and a gate metal that is embedded in a gate contact groove formed in the polysilicon gate so as to reach a depth of the channel region, the gate metal being in contact with the polysilicon gate; wherein the gate insulating film has an extended portion that covers the surface of the semiconductor substrate outside of the gate trench and a top surface of the polysilicon gate; wherein an interlayer insulating film is formed on the extended portion of the gate insulating film; and wherein the source contact groove and the gate contact groove are formed such that the source contact groove and the gate contact groove penetrate the interlayer insulating film and the extended portion of the gate insulating film.