Patent ID: 6707341
Filing Date: 2004-03-16
Classification: H03F

Abstract:
A semiconductor device comprising:a plurality of transistor cells divided and arranged in a plurality of blocks, for forming a bipolar transistor device; a plurality of first lines provided for said plurality of blocks, respectively, and each electrically coupled with a base region of each said transistor cell of a corresponding one of said blocks; a plurality of second lines provided for said plurality of blocks, respectively, and each electrically coupled with one of collector and emitter regions of each said transistor cell of a corresponding one of said blocks; a reference voltage line electrically coupled with the other of said collector and emitter regions of each of said plurality of transistor cells; and a plurality of bias current supply circuits provided for said plurality of blocks, respectively, and each supplying a bias current to a corresponding one of said plurality of first lines, each said bias current supply circuit decreasing an amount of said bias current to be supplied, when said bias current has increased, each of said bias current supply circuits including: a bias control transistor having a base region receiving a predetermined level of control voltage, electrically coupled between a power supply voltage for generating said bias current and a node supplying said bias current; and a bias adjusting portion electrically coupled between said power supply voltage and said bias control transistor, provided to reduce a current drivability of said bias control transistor as said bias current increases.