Patent ID: 7037836
Filing Date: 2006-05-02
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming a first insulating layer on a semiconductor substrate; forming a conductive line by depositing a conductive material on the first insulating layer and selectively patterning the conductive material; forming a second insulating layer by depositing an insulating material on top of the substrate including on the first conductive line; forming a via hole and a trench by selectively patterning the second insulating layer to expose a certain portion of the first conductive line; removing a natural oxide layer, formed on the first conductive line through natural oxidation of the first conductive line, by heat treating in an H forming a metal barrier by depositing a metal layer on top of the substrate including in the via hole and on the trench; forming a copper seed layer on top of the metal barrier; removing a natural copper oxide layer, formed on the copper seed layer through natural oxidation of the copper seed layer, by heat treating in an H depositing a conductive material for forming a conductive line on top of the substrate including on the metal barrier and the copper seed layer to sufficiently fill the via hole and the trench; forming a plug and a second conductive line by planarizing the conductive material on the second insulating layer in order to expose the second insulating layer; and removing a natural oxide layer, formed on the second conductive line through natural oxidation of the second conductive line, by heat treating in an H