Patent ID: 6372606
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A method of forming an isolation trench in a semiconductor substrate, comprising:forming a first insulating layer over the substrate; forming a second insulating layer over the first insulating layer; etching the first and second insulating layers to define active and non-active regions according to a patterned masking photoresist layer; etching a first portion of the substrate in the non-active region; undercutting the first insulating layer in the active region to expose second portions of the substrate in the active region after etching the first portion of the substrate in the non-active region; etching the substrate using the second insulating layer as a masking layer to form a trench in which exposed edges of the substrate are rounded; forming a third insulating layer on the bottom and side walls of the trench and over the rounded edges of the substrate; and etching the second insulating layer to expose the first insulating layer.