Patent ID: 6720226
Filing Date: 2004-04-13
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, the method comprising the steps of:a) forming a gate insulating film and a gate electrode in this order on a semiconductor layer in a substrate; b) depositing an insulating film and a silicon nitride film, which have resistibility to a wet etching process to be performed on an oxide film, in this order over the substrate and then anisotropically etching back the insulating film and the silicon nitride film, thereby forming a nitride sidewall and a stress-relaxing insulating film that surround the gate electrode, the stress-relaxing insulating film being inter-posed between the gate electrode and the nitride sidewall and between the semiconductor layer and the nitride sidewall so as to have an L-shaped cross section; c) defining source/drain regions in parts of the semiconductor layer below the gate electrode to horizontally sandwich the gate electrode therebetween; and d) siliciding respective uppermost parts of the source/drain regions.