Patent ID: 7885140
Filing Date: 2011-02-08
Classification: G06F,G11C,H03K,Y02D

Abstract:
1. A configurable memory device, comprising: a mode setter for sensing a voltage level of a reference voltage input port and for providing a mode selection signal corresponding to the sensed voltage level; a clock switch coupled to a clock input port for receiving at least one of parallel complementary clock signals and serial complementary clock signals, the clock switch generating complementary internal clock signals corresponding to one of the parallel complementary clock signals in response to a first logic state of the mode selection signal and the serial complementary clock signals in response to a second logic state of the mode selection signal; and, a configurable data input/output buffer coupled to a data input port and the reference voltage input port for sensing data received on the data input port relative to the voltage level in response to the second logic state of the mode selection signal.