Patent ID: 6150204
Filing Date: 2000-11-21
Classification: H01L

Abstract:
A semiconductor processing method of forming complementary NMOS and PMOS type field effect transistors on a substrate, comprising:providing a semiconductor substrate, the substrate comprising an n-type region and a p-type region;forming a PMOS transistor gate over the n-type region and an NMOS transistor gate over the p-type region; andafter forming the PMOS and NMOS transistor gates;blanket implanting a p-type dopant to form LDD regions proximate the PMOS transistor gate and halo regions proximate the NMOS transistor gate;blanket implanting an n-type dopant to form halo regions proximate the PMOS transistor gate and LDD regions proximate the NMOS transistor gate; andoxidizing the sidewalls of the PMOS and NMOS transistor gates after one of the blanket implantings and before the other of the blanket implantings.