Patent ID: 6072209
Filing Date: 2000-06-06
Classification: H01L

Abstract:
A semiconductor memory cell structure fabricated on a substrate of a semiconductor material, the memory cell comprising:a bit line on the substrate;an access transistor fabricated as a vertical structure on a portion of the bit line, the access transistor having a first source/drain region defined by said bit line portion, a second source/drain region, and a vertical channel region located in a generally vertical sidewall portion on only one side of the vertical structure of the access transistor, the access transistor having an upper surface defining an upper active silicon surface for the memory cell structure;a gate oxide formed on the sidewall portion of the access transistor overlying the channel region of the access transistor; anda word line extending along the sidewall portion of the access transistor, with a portion of the word line being formed on the gate oxide on only one side of the vertical structure, and wherein the bit line and the word line are located below the active silicon surface of the memory cell structure.