Patent ID: 7067883
Filing Date: 2006-06-27
Classification: H01L

Abstract:
1. An input protection circuit comprising: a voltage supply node and a ground node; an MOS circuit coupled to the voltage supply node and to the ground node; a transistor coupled to the voltage supply node and to the ground node in parallel with the MOS circuit and having a first junction region coupled to the voltage supply node, a second junction region coupled to the ground node, a junction-free substrate region between the first and second junction regions, an MOS gate electrode overlying the substrate region and separated therefrom by a gate oxide layer, and dielectric sidewall spacers adjacent to opposing sides of the MOS gate electrode and overlying the junction-free substrate region; a compensating diode coupled to the voltage supply node and to the ground node in parallel with the MOS circuit and the transistor; and wherein the second junction region and the substrate region comprise a semiconductor material of the same conductivity type.