Patent ID: 6974996
Filing Date: 2005-12-13
Classification: H01L,Y10S

Abstract:
1. A vertical MOS device having a trench gate structure, the semiconductor device comprising: a semiconductor body having a trench, the trench having an inlet, a sidewall and a bottom; a gate insulation film disposed to cover the sidewall and the bottom of the trench, the gate insulation film comprising a laminate structure of a first silicon oxide film, silicon nitride film and a second silicon oxide film successively laminated in this order from a trench side; and a gate electrode of a polycrystalline silicon which is doped with boron, the gate electrode filling the trench with the gate insulation film interposed, wherein: the semiconductor body has a first region of a first conductivity type, a second region of a second conductivity type, and a third region of the first conductivity type vertically aligned along the trench, and thereby a vertical MOS structure is formed by the gate electrode in the trench, the gate insulation film on the sidewall of the trench, and the first through third region; the laminate structure of the gate insulation film is disposed to cover at least the second region in the trench; the silicon nitride film in the laminate structure has a film thickness and film quality sufficient for suppressing boron from passing through the silicon nitride film; and the first silicon oxide film at the trench side in the laminate structure has a film thickness that is greater than a film thickness of the second silicon oxide film at the gate electrode side.