Patent ID: 9147585
Filing Date: 2015-09-29
Classification: H01L

Abstract:
1. A method for fabricating a plurality of semiconductor devices, the method comprising: providing a plurality of first semiconductor chips, each one of the first semiconductor chips comprising a first main face and a second main face opposite to the first main face; applying a first encapsulation layer over the second main faces of the first semiconductor chips; applying an electrical wiring layer over the first main faces of the first semiconductor chips; applying a vertical metallic bars over the electrical wiring layer, the vertical metallic bars being electrically connected to the electrical wiring layer; applying a second encapsulation layer over the electrical wiring layer in such a way that an upper surface of the second encapsulation layer is flush with an upper surfaces of the vertical metallic bars; reducing a thickness of the first encapsulation layer and thicknesses of the first semiconductor chips; applying first electrical devices over the second encapsulation layer, the first electrical devices being electrically connected with the vertical metallic bars; and singulating thereby obtaining the plurality of semiconductor devices.