Patent ID: 8386972
Filing Date: 2013-02-26
Classification: G06F

Abstract:
1. A computer-implemented method of producing at least a portion of an integrated circuit design, said design including at least one of a processor or processor peripheral device and a graphical user interface for interacting with a user, the method comprising: providing the user with an integrated circuit design for the processor or processor peripheral device, the integrated circuit design associated with a hardware description language model; assigning a set of default design parameters to the hardware description language model associated with the integrated circuit design, the set of design parameters including at least one of a clock parameter, a memory parameter and a cache parameter; receiving one or more inputs from the user for at least one design parameter for processor or processor peripheral device, for customizing the integrated circuit design to be generated; automatically generating a customized hardware description language model for the integrated circuit design of the processor or processor peripheral device based on at least one design parameter and the associated hardware description language model, wherein the at least one design parameter includes one of processor cache size, processor cache length, size of external memory space to be cached, clock period and clock skew; generating test code associated with the customized hardware description language model based at least in part on the at least one design parameter; and conducting a hardware/software co-verification of said at least a portion of said integrated circuit design by using a debugger to run software on at least a portion of the customized hardware description language model using a hardware description language simulator; wherein the customized description language model includes both functional and structural description language elements for the processor or processor peripheral.