Patent ID: 8962428
Filing Date: 2015-02-24
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: forming a plurality of gates on a surface of a substrate; forming sidewalls on side surfaces of the gates; forming a Sigma-shaped recess in the substrate between adjacent gates; forming a SiGe seed layer on an inner surface of the Sigma-shaped recess; forming bulk SiGe doped with boron on a surface of the SiGe seed layer, and filling the Sigma-shaped recess with the boron-doped bulk SiGe; forming a first recess by etching a portion of the SiGe seed layer and the boron-doped bulk SiGe in the Sigma-shaped recess; and forming a SiGe regeneration layer in the first recess beneath the surface of the substrate, wherein the SiGe regeneration layer is doped with boron, and the boron-doped SiGe regeneration layer has a higher concentration of boron than the SiGe seed layer or the boron-doped bulk SiGe.