Patent ID: 6180442
Filing Date: 2001-01-30
Classification: H01L

Abstract:
A method for fabricating an integrated circuit including a bipolar transistor of NPN type, including the following steps:forming an N-type epitaxial layer on a P-type substrate, a buried layer being provided at least at a location of a bipolar transistor;forming a thick oxide layer having an opening at a base-emitter region of the bipolar transistor;forming a first P-type doped polysilicon or amorphous silicon layer and a second oxide layer;forming an opening in the doped polysilicon layer or the silicon layer and the oxide layer at a center of the base-emitter region of the bipolar transistor;diffusing dopants contained in the first silicon layer in the epitaxial layer, to form an extrinsic base of the bipolar transistor, wherein during said diffusion a thin oxide layer forms on exposed silicon surfaces;depositing a layer of silicon nitride and a second layer of polysilicon over the opening, and anisotropically etching the second layer of polysilicon to form spacers at vertical sides of the opening;removing exposed parts of said silicon nitride and overetching said silicone nitrade under the spacers;removing the thin oxide layer at locations where the silicon nitride has been overetched;forming an N-type collector region by implantation;implanting a P-type dopant to form an intrinsic base region of the bipolar transistor;depositing a third highly-doped N-type polysilicon layer into the opening and anisotropically etching to leave a part of the third polysilicon layer where the silicon nitride has been overetched; anddepositing a fourth N-type doped polysilicon layer over the opening and diffusing dopants contained in the third and fourth layers to form an emitter region of the bipolar transistor.