Patent ID: 8514690
Filing Date: 2013-08-20
Classification: H04J,H04L

Abstract:
1. An M-ary orthogonal keying (MOK) modulator comprising: a serial-to-parallel converter configured to generate data symbols based on received input data bits; a first modulator configured to (i) receive a first n bits of each data symbol and (ii) select a corresponding length q orthogonal code modified by a complementary code based on the n bits; a second modulator configured to (i) receive a subsequent m bits of each data symbol and (ii) select a corresponding length r orthogonal code modified by the complementary code based on the m bits; a first logic device configured to, if a first subsequent bit of the data symbol is a first predefined value, change polarity of the modified length q orthogonal code generated by the first modulator; a second logic device configured to, if a second subsequent bit of the data symbol is a second predefined value, change polarity of the modified length r orthogonal code generated by the second modulator; a first mixer configured to modulate the modified length q orthogonal code with a carrier frequency; a second mixer configured to modulate the modified length r orthogonal code with the carrier frequency shifted by 90 degrees; wherein the modulated modified length q orthogonal code and the modulated modified length r orthogonal code are combined and transmitted.