Patent ID: 7696975
Filing Date: 2010-04-13
Classification: G09G

Abstract:
1. A display comprising: an active display area comprising a plurality of display blocks, each display block comprising a plurality of pixel rows; a gate driver for sending a plurality of normal gate signals to the display blocks to drive corresponding pixel rows to display a normal image, the gate driver also sending a dummy gate signal to each display block to simultaneously drive the pixel rows of the display block to display a compensation image; and a plurality of multiplexers, wherein each multiplexer sequentially outputs the normal gate signals to pixel rows of a corresponding display block and outputs dummy gate signals for all the pixel rows of the corresponding display block; wherein each multiplexer comprises a plurality of transistor sets for driving the pixel rows of the corresponding display block, each transistor set comprising a first transistor and a second transistor, in which the gate of the first transistor receives one of the normal gate signals, and the gate of the second transistor receives the dummy gate signal.