Patent ID: 9098302
Filing Date: 2015-08-04
Classification: G06F

Abstract:
1. A method to improve boot speed, comprising: identifying a first serial peripheral interface (SPI) storage device associated with a processor; copying an image from the first SPI storage device to a volatile memory of a baseboard management controller (BMC) in response to receiving power at the BMC; and distinguishing between a read request or a write request directed to the first SPI storage device; in response to identifying the read request, reducing a latency of the read request by blocking access to the first SPI storage device and redirecting the read request to the image stored in the volatile memory of the BMC; and in response to identifying the write request, preparing the first SPI storage device for a subsequent processor power cycle by removing the blocking to the first SPI storage device and updating the first SPI storage device with alternate boot vector instructions.