Patent ID: 9147745
Filing Date: 2015-09-29
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: sequentially forming a sacrificial layer and a semiconductor layer on a substrate; forming a first cover layer on the semiconductor layer, which exposes a first portion of a surface of the semiconductor layer; forming an opening extending into the substrate with the first cover layer as a mask; selectively removing at least a portion of the sacrificial layer through the opening, and filling an insulating material in a gap due to removal of the sacrificial layer; forming one of source and drain regions in the opening with the first cover layer as a mask; forming a second cover layer on the substrate, which exposes a second portion of the surface of the semiconductor layer different from the first portion; forming the other of the source and drain regions with the second cover layer as a mask; removing a portion of the second cover layer to further expose a third portion of the surface of the semiconductor layer in addition to the second portion; and forming a gate dielectric layer, and forming a gate conductor in a form of spacer on a sidewall of a remaining portion of the second cover layer.