Patent ID: 7020817
Filing Date: 2006-03-28
Classification: G01R

Abstract:
1. A method for testing semiconductor chips by using an LSI tester, the method comprising the steps of: (a) detecting a temporal correlation for at least one of the plurality of semiconductor chips on which a function test is performed and storing the correlation in a memory; (b) performing the function test on a chip under test which is one of the plurality of semiconductor chips by using the correlation stored in the memory; and (c) performing, if the chip under test is judged to be defective in the function test, the function test on the chip under test by using another correlation different from the correlation already used in the function test, wherein the step (c) includes performing the function test by using a correlation that has been detected for one of the plurality of semiconductor chips other than the chip under test stored in the memory, and wherein the step (c) includes preferentially using one of the correlations stored in the memory which has been used with high frequency in previous function tests.