Patent ID: 7669164
Filing Date: 2010-02-23
Classification: G06F

Abstract:
1. A processor-implemented method for implementing an electronic design in a high-level modeling system (HLMS), comprising: creating a specification of the electronic design in the HLMS in response to user input, the creating of the specification including selecting a plurality of blocks from at least one library in response to the user input and connecting the blocks with a plurality of interconnections in response to the user input, wherein at least one of the blocks is available for implementation in a selectable one of a software implementation for an embedded processor on a programmable logic device (PLD) and a hardware implementation on the PLD; designating first and second subsets of the blocks of the electronic design, wherein each block of the first subset is designated for a software implementation on the embedded processor and each block of the second subset is designated for a hardware implementation on the PLD; for each block of the first subset, translating a specification of the block obtained from the at least one library into an execution function of the software implementation; for each interconnection of the electronic design that connects a block of the first subset and a block of the second subset, generating a peripheral function for an interface coupling the embedded processor to the hardware implementation of the block of the second subset; and generating a program for the embedded processor that invokes each peripheral function and each execution function in an order determined from the interconnections between the blocks.