Patent ID: 8525712
Filing Date: 2013-09-03
Classification: G01S,H03M

Abstract:
1. A semiconductor integrated circuit that can be mounted in a millimeter wave radar device, the semiconductor integrated circuit comprising: a single A/D converter to A/D-convert a plurality of reception signals generated from a plurality of reception mixers of the millimeter wave radar device, where the single A/D converter includes a foreground digital correction type A/D converter; a receiving interface including a multiplexer having a plurality of input terminals to which the reception signals can be supplied as a multi-input terminal; and a microprocessor unit that responds to an output digital signal of the A/D converter, wherein a correction signal generating unit, a digital correction D/A converter, and a digital correction unit constitute the foreground digital correction type A/D converter, wherein the foreground digital correction type A/D converter sequentially A/D-converts the reception signals output from an output terminal of the multiplexer of the receiving interface, wherein the single A/D converter further includes a pipeline type A/D converter having a plurality of converters that are cascade-coupled, wherein during a calibration operation of the foreground digital correction type A/D converter, a calibration digital signal generated from the correction signal generating unit is supplied to an input terminal of the digital correction D/A converter, wherein a calibration analog signal generated from an output terminal of the digital correction D/A converter is supplied to an input terminal of the single A/D converter via the output terminal of the multiplexer, wherein during the calibration operation, a digital calibration output signal generated from an output terminal of the single A/D converter and the calibration digital signal generated from the correction signal generating unit are supplied to the digital correction unit, and thereby, a foreground digital correction output signal is generated from an output terminal of the digital correction unit, wherein during a normal operation of the foreground digital correction type A/D converter, the reception signals output from the output terminal of the multiplexer are supplied sequentially to the input terminal of the single A/D converter, wherein during the normal operation, a digital normal output signal generated sequentially from the output terminal of the single A/D converter is supplied to the digital correction unit, and thereby, a normal digital correction output signal is generated from the output terminal of the digital correction unit, wherein the receiving interface further includes a plurality of capacitor elements coupled, respectively, between the multi-input terminal and the output terminal of the multiplexer, wherein the receiving interface further includes a plurality of calibration switches coupled, respectively, between the capacitor elements and the output terminal of the digital correction D/A converter, wherein during the normal operation of the foreground digital correction type A/D converter, the reception signals generated from the reception mixers are sampled substantially at the same time by the capacitor elements, wherein during the calibration operation of the foreground digital correction type A/D converter, the calibration switches are controlled sequentially into an ON state, wherein the calibration analog signal generated from the output terminal of the digital correction D/A converter is supplied sequentially to the capacitor elements, and wherein during the calibration operation, the digital correction unit sequentially executes a digital calibration operation for a plurality of digital calibration output signals generated sequentially from the output terminal of the single A/D converter in response to the calibration analog signal supplied sequentially to the capacitor elements.