Patent ID: 7969250
Filing Date: 2011-06-28
Classification: H03L

Abstract:
1. A design structure embodied in a non-transitory machine readable storage device for designing, manufacturing, or testing an integrated circuit, the design structure comprising: a first design structure element representing a controller; and a second design structure element representing a programmable voltage controlled oscillator (VCO) coupled to the controller, wherein the programmable VCO comprises: a plurality of third design structure elements representing a plurality of first programmable delay cells coupled to one another; a plurality of fourth design structure elements representing a plurality of second programmable delay cells coupled to one another; and a plurality of fifth design structure elements representing a plurality of control gates coupled to the plurality of second programmable delay cells, wherein the design structure is configured such that a first control signal is sent from the controller to the plurality of first programmable delay cells to enable a first number of buffers in each of the first programmable delay cells, a second control signal is sent from the controller to the plurality of second programmable delay cells to enable a second number of buffers in each of the second programmable delay cells, and a control voltage is applied to the plurality of control gates.