Patent ID: 6476800
Filing Date: 2002-11-05
Classification: G06F,G09G,Y02D

Abstract:
A program storage device for use in an image display system, said image display system having a Basic Input Output System (BIOS), a display subsystem that generates pixel data and a pixel clock signal for output to a display device, at least one control register, each containing a value to define a frequency of said pixel clock signal in accordance with a predefined mathematical equation, and a mechanism for detecting that the system is switching between power modes, the program storage device tangibly embodying a series of instructions executable by the system to perform method steps for controlling said pixel clock signal, the method steps comprising:in response to detection that the system is switching between power modes, adjusting said pixel clock signal by generating a new value for one or more of said at least one control register, wherein said generating a new value is not a selection of one or more values pre-stored in said BIOS.