Patent ID: 6260073
Filing Date: 2001-07-10
Classification: H04L,Y10S

Abstract:
A network switch, comprising:a plurality of network ports for receiving and transmitting data;a data bus coupled to said plurality of network ports;a processor;a processor bus coupled to said processor;a memory;a memory bus coupled to said memory;a switch manager coupled to said data bus, said processor bus and said memory bus for controlling data flow between said plurality of network ports and said memory and for enabling said processor to access said plurality of network ports and said memory; andthe switch manager comprisinga data bus interface coupled to said data bus and includingpolling logic for periodically polling to determine the status of each of said plurality of network ports; andcontrol logic coupled to said polling logic, the control logic for controlling data flow between the plurality of network ports, the processor, and a memory bus interface;the memory bus interface coupled to said memory bus and said data bus interface; anda processor bus interface coupled to said processor bus, said data bus interface and said memory bus interface.