Patent ID: 9204064
Filing Date: 2015-12-01
Classification: H04N

Abstract:
1. A solid-state imaging device comprising: a rate conversion control section that converts digital first data into digital second data and outputs {n} pieces of the digital second data to a signal processing circuit during a period of time, {n} being an integer number; a column processing section that converts analog image signals into the digital first data and outputs {m} pieces of the digital first data to the rate conversion control section during the period of time, {m} being an integer number that is different from {n}; pixels in a pixel section, the pixel section being configured to convert incident light into the analog image signals and output the analog image signals to the column processing section; and a timing control circuit that generates a reference clock and outputs the reference clock at a frequency of {f1} hertz, wherein the rate conversion control section is configured to convert the reference clock into a sensor control clock and to output the sensor control clock at a frequency of {f2} hertz, wherein: