Patent ID: 7567614
Filing Date: 2009-07-28
Classification: H04B

Abstract:
1. A circuit, comprising: a receive circuitry configured to receive a signal transmitted over a communication link; a clock and data recovery circuit coupled to said receive circuitry, wherein said clock and data recovery circuit is configured to recover a clock signal from said received signal; a noise monitor coupled to a sampling unit in said clock and data recovery circuit, wherein said noise monitor is configured to measure a type of noise in said received signal sampled by said sampling unit; an overall jitter monitor coupled to said sampling unit in said clock and data recovery circuit, wherein said overall jitter monitor is configured to measure an overall jitter in said received signal sampled by said sampling unit; and a controller coupled to said noise monitor and to said overall jitter monitor, wherein said controller comprises: a first module, wherein said first module is configured to receive said measured noise and said measured overall jitter, wherein said first module is further configured to determine a difference between said measured noise and said measured overall jitter, wherein said first module is further configured to use said difference while taking into consideration a quantity of said measured overall jitter to index into a table to obtain an estimator; and a second module coupled to said first module, wherein said second module is configured to classify said noise in said received signal based on said estimator, wherein said second module is further configured to adjust power consumption of said circuit based on said classification of said noise.