Patent ID: 7999799
Filing Date: 2011-08-16
Classification: G09G

Abstract:
1. A data transfer method for sequentially transferring data from a first semiconductor integrated circuit to a plurality of cascade-connected second semiconductor integrated circuits, wherein the data is transferred between the first semiconductor integrated circuit and an initial-stage second semiconductor integrated circuit by means of a differential signal and the data is transferred between each of the second semiconductor integrated circuits by means of a CMOS signal sequentially, wherein each of the second integrated circuits comprises: wherein, in each of the second semiconductor integrated circuits, either the differential signal or CMOS signal can be receivably selected as the data in accordance with the interface mode select signal, wherein, in the initial-stage second semiconductor integrated circuit, the differential signal is selected and the received differential signal is converted into the CMOS signal for each bit and transmitted to a second-stage second semiconductor integrated circuit, and wherein, in the second-stage second semiconductor integrated circuit, the CMOS signal is selected and the received CMOS signal is sequentially transmitted “as is” to third- and subsequent-stage second semiconductor integrated circuits.