Patent ID: 6897522
Filing Date: 2005-05-24
Classification: B82Y,G11C,H01L

Abstract:
1. A non-volatile memory of a type including an array of memory cells that individually has a charge storing dielectric material positioned between conductive material and a surface of a substrate within at least a portion of a semi-conducting channel that extends across the surface between source and drain regions, comprising: programming means including voltage sources connectable with at least the conductive material and the drains for applying voltages to the gate electrodes and the drains with magnitudes that cause charge to be injected from the substrate into at least two defined regions of the charge storing dielectric that are displaced from each other and from the source and drain regions along the channel of individual addressed ones of the memory cells by source-side injection to levels that adjust thresholds of each of at least two defined portions of their individual channels to one of more than two threshold levels corresponding to data being programmed, thereby to store more than one bit of such data in each of the at least two defined regions of the dielectric storage material of individual ones of the cells, and reading means including voltage sources and sense amplifiers connectable with at least the conductive material, sources and drains of individual cells for monitoring a parameter related to the programmed one of more than two threshold levels of each of the at least two defined portions of the individual memory cell channels such that more than one bit of the data are read from individual defined regions.