Patent ID: 7872935
Filing Date: 2011-01-18
Classification: G11C

Abstract:
1. A method of operating a static random access memory (SRAM) cell comprising first and second cross-coupled logic gates, the method comprising: providing power to the first and second cross-coupled logic gates through a power switch circuit of the SRAM cell during a read operation performed on the SRAM cell; interrupting power to the first cross-coupled logic gate during a first write operation performed on the SRAM cell; maintaining power to the second cross-coupled logic gate during the first write operation; interrupting power to the second cross-coupled logic gate during a second write operation performed on the SRAM cell; maintaining power to the first cross-coupled logic gate during the second write operation, wherein the first interrupting and second maintaining operations are performed in response to a first logic signal provided to the power switch circuit, wherein the second interrupting and first maintaining operations are performed in response to a second logic signal provided to the power switch circuit; and wherein each of the first and second interrupting operations further comprise switching off a third switch of the power switch circuit in response to a third logic signal applied to a word line, wherein the third switch is connected with the power source, the first cross-coupled logic gate, and the word line.