Patent ID: 6534352
Filing Date: 2003-03-18
Classification: H01L

Abstract:
A method for fabricating a MOSFET device on a silicon substrate comprising:forming field oxide regions to define an active region on the silicon substrate provided; forming a oxide film on the active region; forming a polysilicon film on the oxide film; forming a hard mask pattern defining a gate formation region on the polysilicon film; forming a sacrificial gate by etching the polysilicon film and the oxide film using the hard mask pattern as an etching mask and thereby exposing regions of the silicon substrate; forming a thermal oxide film on side walls of the sacrificial gate and the exposed regions of the silicon substrate by a re-oxidation process; implanting impurity ions having a desired conductivity into the silicon substrate using the sacrificial gate as an ion implant mask to form LDD regions in the silicon substrate; removing the thermal oxide film; forming a spacer on the side walls of the sacrificial gate and the hard mask pattern; implanting impurity ions having a desired conductivity into the silicon substrate using the sacrificial gate and the spacers as an ion implantation mask to form source/drain regions in the silicon substrate; depositing an interlayer insulating film; removing a portion of the interlayer insulating film and the hard mask pattern to expose an upper surface of the sacrificial gate; removing the sacrificial gate, thereby forming a groove and exposing that portion of the silicon substrate that had been disposed under the sacrificial gate; etching the exposed silicon substrate to remove a desired thickness and form an etched silicon substrate; forming a sacrificial oxide film of a desired thickness on the etched silicon substrate; implanting a predetermined quantity of impurity ions having a desired conductivity through the sacrificial oxide film and into the silicon substrate to produce a desired threshold voltage; removing the sacrificial oxide film to expose portions of the etched silicon substrate; forming a gate insulating film on the exposed portions of the etched silicon substrate; depositing a metal film, the thickness of the metal film being sufficient to fill the groove; and removing a portion of the metal film to expose a surface of the interlayer insulating film and to form a metal gate in the groove above the gate insulating film.