Patent ID: 6274895
Filing Date: 2001-08-14
Classification: G11C,H01L

Abstract:
A semiconductor integrated circuit device, comprising:unit areas placed in plural form in a first direction;a first interconnection extending in the first direction over said plurality of unit areas;a second interconnection extending in the first direction along said plurality of unit areas and outside said plurality of unit areas; andwiring areas provided adjacent to a first unit area of said plurality of unit areas and provided with a third interconnection extending in a second direction intersecting the first direction;wherein said first unit area has one or plural MOSFETs formed therein, for implementing a specific logical function,wherein said third interconnection formed in said each wiring area is used to transfer a signal between a circuit for implementing the logical function, which is formed in said first unit area and said second interconnection, andwherein an input terminal of said circuit is connected to only one of said first interconnection and said third interconnection.