Patent ID: 7168061
Filing Date: 2007-01-23
Classification: G06F

Abstract:
1. A method of specifying a configurable digital system, said method comprising: in at least one hardware definition language (HDL) file, specifying at least one design entity containing a functional portion of the digital system, said at least one design entity logically containing a plurality of configuration latches each having a plurality of different possible latch values, wherein latch values of said plurality of configuration latches collectively define at least a portion of a configuration of said functional portion of said digital system; with at least one statement in said at least one HDL file, specifying a read-only Dial entity and associating the read-only Dial entity with said plurality of configuration latches, said read-only Dial entity having at least one output and a mapping table indicating a mapping between each of a plurality of possible output values that can be present at said at least one output and a respective corresponding setting of said read-only Dial entity, wherein said setting indicates which of a plurality of different possible configurations is represented by said latch values of said plurality of configuration latches; and wherein specifying said read-only Dial entity comprises listing each of a plurality of settings of said read-only Dial entity in said mapping table, wherein all of said plurality of settings comprise enumerated values.