Patent ID: 6683487
Filing Date: 2004-01-27
Classification: G11B,H03K

Abstract:
A current driver circuit comprising:a first current source; a first NMOS transistor having a drain connected to said first current source and a gate connected to the drain of said first NMOS transistor; a second NMOS transistor coupled between a source of said first NMOS transistor and a first voltage, and having a gate receiving a first bias voltage; a third NMOS transistor having a drain coupled to a first node and a gate connected to the gate of said first NMOS transistor, the first node being connected to a first end of an inductance element; a fourth NMOS transistor coupled between a source of said third NMOS transistor and the first voltage, having a gate, and being turned on and off in response to a voltage applied to the gate; a fifth NMOS transistor having a drain coupled to a second node and a gate connected to the gate of said first NMOS transistor, the second node being connected to a second end of the inductance element; a sixth NMOS transistor coupled between a source of said fifth NMOS transistor and the first voltage, having a gate, and being turned on and off in response to a voltage applied to the gate; a second current source; a first PMOS transistor having a drain connected to said second current source and a gate connected to the drain of said first PMOS transistor; a second PMOS transistor coupled between a source of said first PMOS transistor and a second voltage, and having a gate receiving a second bias voltage; a third PMOS transistor having a drain coupled to the first node and a gate connected to the gate of said first PMOS transistor; a fourth PMOS transistor coupled between a source of said third PMOS transistor and the second voltage, having a gate, and being turned on and off in response to a voltage applied to the gate; a fifth PMOS transistor having a drain coupled to the second node and a gate connected to the gate of said first PMOS transistor; and a sixth PMOS transistor coupled between a source of said fifth PMOS transistor and the second voltage, having a gate, and being turned on and off in response to a voltage applied to the gate.