Patent ID: 6738848
Filing Date: 2004-05-18
Classification: G06F

Abstract:
An apparatus, comprising:a first storage device interface; a second storage device interface; a first controller coupled to the first storage device interface, the first controller including an interrupt signal input; a second controller coupled to the second storage device interface; and an interrupt conditioning unit including a decoder, the decoder having a first input that receives a signal indicating whether a storage device is coupled to the first storage device interface, the decoder having a second input to receive an interrupt signal from the first storage device interface, the decoder further having a third input to receive an interrupt pending signal from the second controller, the interrupt conditioning logic to mask the interrupt signal from the first storage device interface if storage device is coupled to the first storage device interface, the interrupt conditioning unit further including a flip-flop, the flip-flop including a data input to receive a mask input signal that indicates whether a storage device is coupled to the first storage device interface, the flip-flop further including a clock input to receive a write command signal, the flip-flop to output an inversion of the mask input signal to the first decoder input.