Patent ID: 7483425
Filing Date: 2009-01-27
Classification: H04Q

Abstract:
1. A communication network node, said node comprising: one or more time slot buses for transferring frames from a number of serial input lines located on a receiving side of the node to a number of serial output lines located on the transmitting side of the node, the serial input/output lines each having one respective FIFO into/from which bits corresponding to the associated serial line are shifted; one or two data buffers for each time slot bus at the receiving side of the node for buffering the frames from the input lines before transmission, said one or two data buffers being shared between all the input lines by means of respective pointers allocating one memory area in a data buffer for each of the input lines; a scheduler for consecutively checking the input lines for data transfer requests, and if a data transfer request exists, transferring one or more data bytes associated with the input line corresponding to the data transfer request to the data bus buffer; and a timer for each input line for indicating the time at which data transfer requests for the respective input line are to occur; wherein the time at which data transfer requests for an input line are to occur is dependent on the number of data bits to be transferred from the input line to the data bus buffer during one frame (NUMBER), the number of clock cycles from frame start to the transfer of the first byte after the header (OFFSET), the average number of clock cycles between each transfer (DISTANCE), the distance from the last transferred byte to the end of the frame (EOF-DIST), and the resolution for the average number of clock cycles between each transfer (DISTANCE_RESOLUTION), according to the following relationships: