Patent ID: 6490674
Filing Date: 2002-12-03
Classification: G06F

Abstract:
A computer system for executing instructions of a computer program, comprising:a plurality of pipelines configured to process said instructions of said computer program; coalescing circuitry coupled to said pipelines, said coalescing circuitry configured to simultaneously receive a plurality of register identifiers from said pipelines and to combine said register identifiers into a single register identifier, said single register identifier having a plurality of bits and identifying each register identified by at least one of said register identifiers combined by said coalescing circuitry, said coalescing circuitry configured to combine at least one bit from one of said register identifiers received by said coalescing circuitry with another bit from another of said register identifiers received by said coalescing circuitry to produce one of said bits of said single register identifier; and hazard detection circuitry coupled to said coalescing circuitry, said hazard detection circuitry configured to receive said single register identifier from said coalescing circuitry and to compare said single register identifier with other information received by said hazard detection circuitry, said hazard detection circuitry further configured to detect whether a particular type of data hazard exists based on a comparison of said single register identifier with said other information received by said hazard detection circuitry.