Patent ID: 7752591
Filing Date: 2010-07-06
Classification: G06F

Abstract:
1. A board layout check apparatus comprising: a print board obtained by forming a guard wiring on a printed wiring layer; a check target wiring detecting unit which detects a check target wiring the influence of noise of which must be reduced from the printed wiring layer; a guard wiring exemption region calculating unit which calculates a guard wiring exemption region in which no guard wiring is formed for the check target wiring; a guard wiring detecting unit which detects a wiring portion in which a guard wiring is formed for the check target wiring in a region except for the guard wiring exemption region; an error determination unit which determines whether or not the guard wirings detected by the guard wiring detecting unit are formed along the check target wiring in all regions except for the guard wiring exemption region calculated by the guard wiring exemption region calculating unit; and an output unit which outputs a wiring portion determined as an error by the error determination unit.