Patent ID: 9023703
Filing Date: 2015-05-05
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming a first hard mask pattern on a semiconductor substrate; etching the semiconductor substrate to form a recess; forming a gate insulating layer and a gate electrode pattern within the recess; planarizing the gate electrode pattern until the first hard mask pattern is exposed; forming a second hard mask pattern on the planarized gate electrode pattern; removing the first hard mask pattern to expose sidewalls of the gate electrode pattern and an upper surface of the gate insulating layer; performing a selective oxidation process on the exposed upper surface of the gate insulating layer; forming a spacer on the exposed sidewalls of the second hard mask pattern and the planarized gate electrode pattern; forming source and drain regions on the semiconductor substrate; and forming a plug on each of the source and drain region.