Patent ID: 7760948
Filing Date: 2010-07-20
Classification: H04N

Abstract:
1. A coefficient labeling circuit arrangement for bitplane coding passes in embedded block coding, comprising: a significance lookahead circuit configured to generate lookahead significance states of coefficients in past, current, and future magnitude stripe slices of a code-block containing the coefficients; and a plurality of context labeling circuits coupled in parallel to the significance lookahead circuit, each context labeling circuit comprising: wherein each significance propagation pass circuit is configured to generate in parallel respective significance context labels for coefficients in the current magnitude stripe slice responsive to the lookahead significance states, wherein each magnitude refinement pass circuit is configured to generate in parallel respective magnitude context labels for coefficients in the current magnitude stripe slice responsive to the lookahead significance states, wherein each cleanup pass circuit is configured to generate in parallel respective significance context labels for coefficients in the current magnitude stripe slice responsive to the lookahead significance states, and wherein the respective significance propagation pass circuit, respective magnitude refinement pass circuit, and respective cleanup pass circuit in each of the context labeling circuits operate in parallel.