Patent ID: 6764939
Filing Date: 2004-07-20
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device comprising the steps of:forming a wiring layer on a semiconductor substrate having an active region formed thereon; forming a first insulating layer containing carbon on said wiring layer; forming a second insulating layer comprising silicon, carbon and nitrogen on said first insulating layer; selectively etching said second insulating layer to form a first hole portion therethrough; selectively etching said first insulating layer with plasma to form a second hole portion therethrough, using said selectively-etched second insulating layer as a first mask pattern; further selectively etching said second insulating layer to form a first groove portion therethrough; further selectively etching said first insulating layer with plasma to form a second groove portion therethrough, using said further selectively-etched second insulating layer as a second mask pattern; and forming a new wiring layer on said second insulating layer after further selectively etching said first insulating layer, said hole portions and groove portions being filled with a material of said new wiring layer.