Patent ID: 8039376
Filing Date: 2011-10-18
Classification: H01L

Abstract:
1. A semiconductor structure fabrication method, comprising: providing a semiconductor structure which includes a semiconductor substrate and a pad layer comprising silicon dioxide, wherein the semiconductor substrate includes a top substrate surface which defines a reference direction perpendicular to the top substrate surface and pointing from outside to inside of the semiconductor substrate, wherein the semiconductor substrate further includes a silicon substrate, a buried oxide layer on and in direct physical contact with the silicon substrate, and an active silicon layer on and in direct physical contact with the buried oxide layer, and wherein the pad layer is on and in direct physical contact with the active silicon layer such that the active silicon layer is disposed between the buried oxide layer and the pad layer; specifying a semiconductor body region within the active silicon layer such that the semiconductor body region is surrounded by a remaining portion of the active silicon layer; specifying a change in threshold voltage of a transistor which is to be formed on the semiconductor body region; selecting an adjustment dose of dopants of a first doping polarity; selecting a base dose of dopants of a second doping polarity; forming a photoresist layer on and in direct physical contact with the pad layer; patterning the photoresist layer resulting in a trench in the photoresist layer such that the trench is aligned over the entire semiconductor body region in the reference direction and such that a portion of the pad layer between the trench and the semiconductor body region is directly exposed to the trench; after said patterning the photoresist layer and said selecting the adjustment dose of dopants, implanting the adjustment dose of dopants into the semiconductor body region by an adjustment implantation process in which the adjustment dose of dopants is implanted into the semiconductor body region after passing through the trench and the portion of the pad layer, wherein ion bombardment of the adjustment implantation process is in the reference direction; after said implanting the adjustment dose of dopants, removing the photoresist layer; after said removing the photoresist layer, patterning the active silicon layer and the pad layer resulting in side walls of the semiconductor body region and sidewalls of the portion of the pad layer being exposed to a surrounding ambient; after said patterning the active silicon layer and the pad layer and said specifying the change in threshold voltage of the transistor and said selecting the base dose of dopants, implanting the base dose of dopants into the semiconductor body region by a base implantation process, wherein ion bombardment of the base implantation process is in a direction which makes a non-zero angle with the reference direction, and wherein the adjustment dose of dopants and the base dose of dopants were selected such that a combination of the adjustment dose of dopants and the base dose of dopants results in the change in the threshold voltage of the transistor.