Patent ID: 6831454
Filing Date: 2004-12-14
Classification: G01R

Abstract:
A semiconductor device handler, comprising:test sockets located at a test site of the handler; a first loading shuttle and a second loading shuttle located on opposite sides of the test sockets and configured to supply semiconductor devices to be tested; a first unloading shuttle, and a second unloading shuttle arranged on opposite sides of the test sockets and configured to receive tested semiconductor devices; at least one support frame located adjacent and over the test sockets; a first index head and a second index head fitted to the at least one support frame, wherein the first and second index heads are independently moveable along the at least one support frame, and wherein the first and second index heads are configured to transport semiconductor devices between the test sockets, the first or second loading shuttle and the first or second unloading shuttle; and first and second drivers for independently moving the first index head and the second index head, respectively, along the at least one support frame.