Patent ID: 7511713
Filing Date: 2009-03-31
Classification: G09G

Abstract:
1. An apparatus for high rate concurrent read-write applications, comprising: a source interface module that receives video frames at a first frame rate, wherein each video frame has video data; first and second single-ported memories coupled to the source interface module; a control logic circuit coupled to the source interface module and the first and second single-ported memories; and an output interface module coupled to the control logic circuit and the first and second single-ported memories, wherein the control logic circuit controls reading of the video frames from the source interface module and writing of the read video frames to the first and second single-ported memories at the first frame rate, and wherein the first frame rate is lower than a second frame rate, wherein the control logic circuit controls reading of the video frames from the first and second single-ported memories and writing of the read video frames to the output interface module at the second frame rate, wherein the first variable frame rate is lower than the second frame rate, and wherein the control logic circuit switches the roles of the first and second single-ported memories, by switching the single ported memory that has finished writing a complete video frame from the source interface module to a read mode to be performed by the output interface module and by switching the other single-ported memory from which the output interface module has finished reading a complete video frame to a write mode to be performed by the source interface module.