Patent ID: 6974739
Filing Date: 2005-12-13
Classification: H01L

Abstract:
1. A method for fabricating an integrated circuit comprising a first gate and a second gate, wherein the second gate is to control a channel region in the integrated circuit, the method comprising: providing a first gate surface which is a surface of the first gate; forming a first dielectric on the first gate surface and a second dielectric on said channel region, wherein at least a portion of the first dielectric and at least a portion of the second dielectric are formed simultaneously; and forming the second gate on the second dielectric; wherein the first dielectric is used to insulate the first gate from the second gate and/or from another element of the integrated circuit; wherein at least a portion of the first dielectric and at least a portion of the second dielectric are formed by simultaneous oxidation of the first gate surface and of the channel region; wherein at least a portion of the first dielectric and at least a portion of the second dielectric are formed by the simultaneous oxidation but are different in thickness.