Patent ID: 8093663
Filing Date: 2012-01-10
Classification: H01L,Y10T

Abstract:
1. A semiconductor device, comprising an active region isolated by an isolation structure on a substrate, wherein in the active region, the device further comprises: a bar-shaped gate electrode extending across the active region and overlying the substrate; a source region within a body and a drain region, disposed on either side of the bar-shaped gate electrode, on the substrate; and a gate dielectric layer, disposed between the substrate and the bar-shaped gate electrode, comprising a relatively-thicker high voltage (HV) dielectric portion and a relatively-thinner low voltage (LV) dielectric portion, wherein the HV dielectric portion includes a first portion in physical contact with the drain region but not in contact with the source region, and a second portion in physical contact with the source region but not in contact with the drain region, and wherein the first portion of the HV dielectric portion and the second portion of the HV dielectric portion are entirely separated by the LV dielectric portion and are not in physical contact with each other, the first portion of the HV dielectric portion occupies a first intersection among the drain region, the isolation structure, and the bar-shaped gate electrode, the LV dielectric portion is separated from the drain region by the first portion of the HV dielectric portion in a top view and adjoins the source region, and at least a portion of the LV dielectric portion is directly above and in physical contact with a region separating the body and the drain region.