Patent ID: 9030868
Filing Date: 2015-05-12
Classification: G11C,H01L

Abstract:
1. A nonvolatile memory device comprising: a substrate having an active region defined by isolation layers and including a plurality of first regions which extend in one direction and second and third regions which are disposed alternately between the first regions to connect the first regions with one another; a source selection line, word lines, and first and second drain selection lines disposed over the substrate and extending to cross the first regions between the second and third regions; first and second contacts disposed over the second and third regions, respectively; and first and second wiring lines respectively connected with the first and second contacts and extending parallel to one another, wherein each of the first and second drain selection lines includes a stack structure of a tunnel dielectric layer, a floating gate, an intergate dielectric layer, and a control gate, and wherein the first drain selection line has portions of the intergate dielectric layer removed at intersections with odd-numbered first regions among the first regions, and the second drain selection line has portions of the intergate dielectric layer removed at intersections with even-numbered first regions among the first regions.