Patent ID: 6477075
Filing Date: 2002-11-05
Classification: G11C,H01L

Abstract:
An integrated device comprising:a first circuit chip including a first circuit formed on a first major surface of a first semiconductor substrate, said first circuit having a plurality of first input/output nodes for electrically interfacing with the exterior of said first circuit chip; a second circuit chip including a second circuit formed on a second major surface of a second semiconductor substrate, said second major surface being face to face with said first major surface and said second circuit having a plurality of second input/output nodes for electrically interfacing with the exterior of said second circuit chip; and a connecting portion electrically connecting said plurality of first input/output nodes to said second input/output nodes respectively, said connecting portion including: a first connecting member for establishing electrical connections from said plurality of second input/output nodes, and a second connecting member, provided between said first connecting member and said plurality of first input/output nodes, for electrically connecting said first connecting member to said plurality of first input/output nodes.