Patent ID: 6453431
Filing Date: 2002-09-17
Classification: G06F,G11C

Abstract:
A circuit for detecting transients comprising:a logic block; a master latch which receives data from said logic block on a data line; a slave latch which receives data from said master latch on said data line; a first sample and hold circuit coupled to said data line between said master latch and said slave latch for sensing a first signal on the data line at a first point in time; a second sample and hold circuit coupled to the data line between said logic block and said master latch for sensing the first signal on the data line at a second point in time such that a time difference between said first and second points in time is small enough so that the first signal is still present on the data line in the absence of a perturbation event and such that the time difference between said first and second points in time is large enough so that any such perturbation event is resolved; and a compare circuit coupled to the first and second sample and hold circuits for comparing the sending of the first signal by the first and second sample and hold circuits and for generating an error signal in response to a non-compare.