Patent ID: 7649261
Filing Date: 2010-01-19
Classification: H01L,Y10S

Abstract:
1. A semiconductor device having a plurality of layers comprising: a semiconductor substrate; a plurality of first conductive patterns formed above said semiconductor substrate and in one of the plurality of layers; first insulating films, each of the first insulating films separately covering corresponding single one of said first conductive patterns; a second insulating film formed between said first conductive patterns, said second insulating film having a second upper surface part being coplanar with a first upper surface of at least one of said first insulating films, the second upper surface part and the first upper surface constituting a single planarized surface; and a contact hole formed in said second insulating film, the contact hole being formed by self align contact process with one of the first insulating films as an etching stopper; wherein the second insulating film does not cover the first upper surface.