Patent ID: 9076370
Filing Date: 2015-07-07
Classification: G09G

Abstract:
1. A scanning signal line drive circuit for periodically driving a plurality of scanning signal lines, the scanning signal line drive circuit comprising: a shift register including a plurality of bistable circuits which are cascade-connected to one another and sequentially making output signals of the plurality of bistable circuits active based on clock signals which are supplied from the outside and periodically repeats an on level and an off level, wherein each of the bistable circuits comprises: the set signal in the bistable circuit in a front stage is a start pulse signal which becomes an on level at a scanning start timing, the set signal in the bistable circuit in a stage other than the front stage is an output signal of the bistable circuit of a preceding stage, the output unit has an output control switching element having a control terminal connected to the first node, a conduction terminal to which one of the clock signals is supplied, and another conduction terminal connected to an output node for outputting one of the output signals, and the drive unit has a first node level down switching element having a control terminal to which a control signal whose potential becomes the on level in a control period as a predetermined period in a vertical blanking period in which all of the output signals of the plurality of bistable circuits are inactive is supplied, a conduction terminal connected to the first node, and another conduction terminal to which a level down signal which becomes a level down potential as a potential lower than the off level at least in the control period is supplied.