Patent ID: 6760092
Filing Date: 2004-07-06
Classification: G02F

Abstract:
A method of fabricating an array substrate for a liquid crystal display device, comprising the steps of:forming a first metal layer on a substrate; patterning the first metal layer to form a gate line, a gate electrode, a gate pad, a first shorting bar, and a second shorting bar; forming a gate insulation layer, a pure amorphous silicon layer, a doped amorphous silicon layer and a second metal layer to cover the patterned first metal layer; patterning the second metal layer and the doped amorphous silicon layer to form first, second and third through-holes and first and second grooves to expose a portion of the pure amorphous silicon layer, the first and second grooves creating an isolated portions of the second metal layer; forming a passivation layer to cover the patterned second metal layer; forming a source electrode, a drain electrode, a data line, a data pad, an insulating segment, and first, second and third contact holes; and forming a pixel electrode, a first connector and a second connector of a transparent conductive material.