Patent ID: 6774407
Filing Date: 2004-08-10
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor layer; a switching element provided on a surface of the semiconductor layer; a substrate at another surface of the semiconductor layer and having an opposite conductivity type of the semiconductor layer, a portion of the semiconductor layer located between the switching element and the substrate having an impurity concentration sufficient enough so that a region adjacent to the substrate is not depleted; a defect region provided in a portion of said semiconductor layer that includes an entire non depletion layer and at least a portion of said substrate, wherein the non-depletion layer is not depleted after a switch-off operation, and a half-valued width of a lattice defect concentration of the defect region is thicker than the thickness of the non-depletion layer; a peak of lattice defect concentration being within said non-depletion layer, wherein said lattice defect concentration in the non-depletion layer is sufficient to shorten lifetime of carriers and reduce turn-off time; and a switching control having a current flowing in a thickness direction of the semiconductor layer when said switching element is turned on and off.