Patent ID: 6552379
Filing Date: 2003-04-22
Classification: H01L,Y10S

Abstract:
A semiconductor device comprising first and second capacitors adjoining each other, the respective lower electrode of which is electrically connected to impurity region in a semiconductor substrate and, the respective upper electrode of which is electrically connected to an external wire,wherein said first and second capacitors, respectively, comprises: lower electrode which contacts the top surface of an insulating layer, formed on said semiconductor substrate, and the top surface of plug wire passing through said insulating layer; dielectric film which contacts the top surfaces of said lower electrode and which have peripheral sidewall surfaces which continue to the peripheral sidewall surfaces of the lower electrode; and first upper electrode which contacts the top surfaces of said dielectric film and a second upper electrode which contact the top surface of said first upper electrode, wherein said semiconductor device further comprises a partition insulating film between said first and said second capacitors which contacts the top surface of said insulating layer and which covers the sidewalls of said lower electrode and of said dielectric film, and wherein said second upper electrode contacts the top surface of said partition insulating film.