Patent ID: 7489552
Filing Date: 2009-02-10
Classification: G11C

Abstract:
1. A semiconductor device comprising: a plurality of word lines; a plurality of bit lines intersecting the word lines; a plurality of memory cells provided at respective intersecting points of the word lines and the bit lines each said memory cell including an information storage portion and a selection element; and a current mirror circuit coupled to the plurality of bit lines, wherein, in a write operation to the plurality of memory cells, the current mirror circuit supplies current to selected ones of the plurality of memory cells, wherein the information storage portion includes a phase change material, wherein the current mirror circuit has a first current mirror circuit and a second current mirror circuit, the second current mirror circuit supplying greater current than the first current mirror circuit, wherein, in crystallization of the phase change material, the first current mirror circuit is selected to supply current, and, in making the phase change material amorphous, the second current mirror circuit is selected to supply current.