Patent ID: 8609501
Filing Date: 2013-12-17
Classification: H01L

Abstract:
1. A method of fabricating a bipolar transistor at a semiconducting surface of an integrated circuit body, comprising the steps of: forming an implant block layer overlying the surface, the implant block layer having an opening exposing a selected portion of the moat region; implanting fluorine ions into the exposed portion of the moat region; then forming an isolation dielectric structure at the implanted location of the moat region; forming a base region of a first conductivity type extending into the surface at the location of the isolation dielectric structure, and extending to the surface along one side of the isolation dielectric structure when formed; forming an emitter region of a second conductivity type into the surface along another side of the isolation dielectric structure; and forming conductors in contact with the base region and the emitter region.