Patent ID: 9000595
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A semiconductor device comprising: a resin sealing portion which has a plurality of first side surfaces and a mounting surface formed between the plurality of first side surfaces; a die pad having an upper surface sealed by the resin sealing portion and a back surface exposed to the mounting surface; a plurality of electrode terminals which are formed of conductor, each electrode terminal having a first surface sealed by the resin sealing portion, a second surface exposed to the mounting surface; a semiconductor chip which has a first main surface and a second main surface opposite to the first main surface, is sealed by the resin sealing portion, includes a plurality of bonding pads on the first main surface and disposed on the upper surface of the die pad; and a plurality of wires which are sealed by the resin sealing portion, the wires electrically connecting the plurality of electrode terminals with the plurality of bonding pads of the semiconductor chip, respectively, wherein a width of the upper surface of the die pad is wider than a width of the back surface of the die pad along the first main surface of the semiconductor chip in a cross section view, and wherein a width of the second main surface of the semiconductor chip is wider than the width of the upper surface of the die pad along the first main surface of the semiconductor chip in the cross section view, wherein the semiconductor chip is disposed on the upper surface of the die pad via a conductive paste so that the second main surface of the semiconductor chip and the upper surface of the die pad face each other, and wherein a width of the conductive paste is wider than the upper surface of the die pad along the second main surface of the semiconductor chip in the cross section view.