Patent ID: 6713851
Filing Date: 2004-03-30
Classification: H01L

Abstract:
A lead-on-chip (LOC) semiconductor device comprising:a semiconductor chip having first and second major surfaces, an integrated circuit being formed on said first major surface; a plurality of conductive leads connected to bond pads on said integrated circuit and extending outward therefrom, said leads being mounted on said first major surface; a metallic element having first and second major surfaces, said first major surface of said metallic element attached to said second major surface of said semiconductor chip, said metallic element transferring heat generated by said integrated circuit to an exterior of said device, wherein the metallic element has substantially the same planar dimensions as the dimension of the semiconductor chip; and an encapsulant covering said chip and a portion of said metallic element to form a package for said device, said second major surface of said metallic element not being covered by said encapsulant.