Patent ID: 9154390
Filing Date: 2015-10-06
Classification: H04L

Abstract:
1. A packet relay apparatus comprising a first packet processing circuit and a second packet processing circuit, the first packet processing circuit executes: discarding of some data packets from among data packets, and transferring the rest of the data packets to the second packet processing circuit; counting discard number of the data packets; determining whether or not the discard number is equal to or greater than a threshold; and transferring, if the discard number is equal to or greater than the threshold, a discard number information packet including discard number information indicating the discard number to the second packet processing circuit; and that the second packet processing circuit executes: discarding some data packets from among the data packets; counting discard number of the data packets; and collecting the discard number counted by the second packet processing circuit and the discard number indicated by the discard number information included in the discard number information packet, wherein the first packet processing circuit does not discard the discard number information packet that is a packet which includes discard number information indicating the discard number and is generated separately from the data packet, but transfers it to the second packet processing circuit, and the packet relay apparatus further comprising a storage unit that stores a queue for accumulating the data packet and the discard number information packet; the first packet processing circuit executes: detecting queue length of the queue; discarding, if the queue length is longer than a first threshold, the data packet other than the discard number information packet; accumulating, if the queue length is shorter than a second threshold that is longer than the first threshold, the discard number information packet in the queue; and transferring packets accumulated in the queue to the second packet processing circuit.