Patent ID: 8135881
Filing Date: 2012-03-13
Classification: G06F

Abstract:
1. A method for controlling a serial peripheral interface, comprising: monitoring serial peripheral interface signal lines including a data signal line, a clock signal line, and a select signal line; detecting a plurality of clock signal transitions on the clock signal line; detecting a plurality of data signal transitions on the data signal line in synchronism with clock signal transitions; detecting initiation of one of a data read and data write operation in accordance with a first protocol in response to a first combination of one or more signals on one or more of the data signal line, the clock signal line, and the select signal line; and detecting initiation of one of a data read and data write operation in accordance with a second protocol in response to a second combination of one or more signals on one or more of the data signal line, the clock signal line, and the select signal line; performing a data read operation upon a register identified by address bits received serially on the data signal line following detection of the initiation of a data read operation; and performing a data write operation upon a register identified by address bits received serially on the data signal line following detection of the initiation of a data write operation.