Patent ID: 7439587
Filing Date: 2008-10-21
Classification: H01L

Abstract:
1. A semiconductor device comprising: an SOI substrate having a structure in which a semiconductor substrate, an insulating layer and a semiconductor layer are layered in this order, the semiconductor substrate being in contact with the insulating layer; a partial-isolation insulating film formed in a main surface of said semiconductor layer; a lower layer region of said semiconductor layer below said partial-isolation insulating film; a first semiconductor element formed in an element formation region defined by said partial-isolation insulating film in said semiconductor layer, said first semiconductor element including source/drain regions formed in contact with said insulating layer; an interlayer insulating film formed on said first semiconductor element and said partial-isolation insulating film, a second semiconductor element formed adjacently to said first semiconductor element in said semiconductor layer, having an operating threshold voltage different from that of said first semiconductor element; and a complete-isolation insulation film formed extending from said main surface of said semiconductor layer, reaching said upper surface of said insulating layer between said first semiconductor element and said second semiconductor element.