Patent ID: 8432343
Filing Date: 2013-04-30
Classification: G09G

Abstract:
1. A liquid crystal display device comprising: a liquid crystal panel including a plurality of pixels defined by a plurality of gate and data lines crossing each other; a gate driver for driving the gate lines; a data driver for charging the pixels with analog video signals through the data lines; and a discharging unit for discharging voltage from the pixels by controlling the output of gate driver to make all the gate lines being divisionally driven or to make all the gate lines being driven at the same time when a power source is turned-off, wherein the gate driver includes a plurality of stages for driving the respective gate lines by using at least any one of a plurality of clock pulses provided with phase differences, wherein each of the plurality of stages output one of plurality of clock pulses as a scan pulse of the corresponding gate line, wherein the discharging unit includes a plurality of discharging parts respectively connected to input terminals of the plurality of stages and inputs a gate start pulse, the output signals from the plurality of stages, and a power source voltage, wherein each of the plurality of discharging parts logically combines a first input signal and a second input signal to provide the corresponding stage with a control signal which enables the corresponding stage when the power source is turned-on and turned-off, wherein the first input signal is a signal which is the inverted gate start pulse or the output signal from the previous stage and the second input signal is the power source voltage, wherein when the power source is turned-on, each the plurality of discharging parts provide the corresponding stage with the control signal, which corresponds to the gate start pulse or the output signal from the previous stage, so that the plurality of stages are enabled sequentially, and wherein when the power source is turned-off, each of the plurality of discharging parts provide the corresponding stage with the control signal so that all the plurality of stages are enabled at the same time, and wherein when the power-source voltage is turned-off, odd stages of the plurality of stages output a first clock pulse as the scan pulse of the corresponding odd gate lines and even stages of the plurality of stages output a second clock pulse as the scan pulse of the corresponding even gate lines, wherein when the power source is turned-on, the first and second clock pulse are used for driving the plurality of stages.