Patent ID: 6583673
Filing Date: 2003-06-24
Classification: H01L,H03F

Abstract:
A multistage power amplifier, comprising:a substrate having a continuous ground plane formed thereon; an input gate lead attached to the substrate and electrically isolated from the continuous ground plane; a first gain stage LDMOS transistor die attached to the substrate at a first die attachment location, the first transistor die having a source contact electrically isolated from the continuous ground plane at the first die attachment location, the source contact electrically connected to a top side source contact on the first die, the top side source contact electrically connected by a wire lead to the continuous ground plane at a first die source location near an edge of the substrate in close proximity to the gate input lead; and a second gain stage LDMOS transistor die attached to the substrate at a second die attachment location, the second die attachment location in close proximity to the first die attachment location, the second transistor die having a source contact electrically connected to the continuous ground plane at the second die attachment location, wherein the first die source and second die attachment locations on the continuous ground plane are sufficiently distant from one another such that the first and second gain stage transistors form substantially separate ground current paths through the continuous ground plane.