Patent ID: 7492817
Filing Date: 2009-02-17
Classification: H03H

Abstract:
1. An adaptive digital filter comprising: a filtering circuit including a delay circuit having a coefficient a defined by a fundamental formula: a[n+1]=a[n]+β·e[n]·q[n]/p[n], where β is a factor having a number greater than 0 and smaller than 2, e[n] is a difference between a filter input and a filter output, q[n]=u[n−1], and p[n]=u[n] a coefficient renewal circuit that calculates a renewal value of the coefficient a upon input of sampling data to the filtering circuit and that renews the coefficient a by utilizing the calculated renewal value; wherein the coefficient renewal circuit calculates 2 wherein 2 wherein the coefficient renewal circuit calculates the renewal value of the coefficient a by a fixed-point system, the coefficient renewal circuit comprising: a first calculator that detects an uppermost digit with a 1 set therein among digits of binary data representing the p[n], and calculates 2 a bit shifting circuit for shifting respective bits of binary data representing a dividend divided by the p[n] in the fundamental formula, the shifting being performed toward a lower digit side by m bits to produce new binary data; and a second calculator that calculates the renewal value of the coefficient a by using said new binary data.