Patent ID: 6414552
Filing Date: 2002-07-02
Classification: G05F,H03F

Abstract:
A non-linear current mirror comprising:a first MOS transistor having gate, drain, and source, wherein said gate and drain are coupled together and are further coupled to a first current input; a second MOS transistor having gate, drain, and source, wherein said gate is coupled to said first MOS transistor gate and said drain is coupled to a second current input; a third MOS transistor having gate, drain, and source, wherein said drain is coupled to said second MOS transistor source and said gate is coupled to said second MOS transistor drain; and a fourth MOS transistor having gate, drain, and source, wherein said gate is coupled to said third MOS transistor gate, said source is coupled to said first MOS transistor source and said third MOS transistor source, and said drain forms a current output, wherein said current output value linearly tracks said second current input value over a first range of relative values between said first and second current inputs, and wherein said current output is a non-linear, large value over a second range of relative values between said first and second current inputs.