Patent ID: 7276406
Filing Date: 2007-10-02
Classification: H01L

Abstract:
1. A method for forming a portion of a semiconductor device structure comprising: providing a semiconductor-on-insulator substrate having a semiconductor active layer, an insulation layer, and a semiconductor substrate; forming a first isolation trench within the semiconductor active layer, depositing a stressor material on a bottom of the first isolation trench, wherein the stressor material includes a dual-use film; and forming a second isolation trench within the semiconductor active layer, wherein the second isolation trench is absent of the stressor material on a bottom of the second trench, and wherein the presence and absence of stressor material in the first and second isolation trenches, respectively, provides differential stress: (i) on one or more of N-type or P-type devices of the semiconductor device structure, (ii) for one or more of width direction or channel direction orientations, and (iii) to customize stress benefits of one or more of a <100> or <110> channel orientation of the semiconductor-on-insulator substrate.