Patent ID: 8738331
Filing Date: 2014-05-27
Classification: G01R

Abstract:
1. A method to be carried out in by a processor for processing digital signals with increased reliability, the method comprising: receiving a signal intended to occupy two logical states at various instances in time and having an unreliable signal level; performing an analog measurement of the signal level; determining if there is a change in the analog signal level; determining if the change fulfills at least one logical state change condition, wherein a first logical state change condition is based on a speed of change of the analog signal level; and determining that there is a change in the signal from one of the logical states intended to be occupied to the other logical state intended to be occupied if at least the first logical state change condition is fulfilled, wherein the first logical state change condition is determined to be fulfilled if the speed of change of the analog signal level is above a speed of change threshold.