Patent ID: 8106478
Filing Date: 2012-01-31
Classification: H01L

Abstract:
1. A semiconductor device comprising: a core cell configuring a logic circuit provided over a main surface of a semiconductor substrate; an interlayer insulating film provided over the main surface of the semiconductor substrate so as to cover the core cell; a first power source trunk line for a first power source of the core cell, the first power source trunk line being provided in the interlayer insulating film; a second power source trunk line for a second power source of the core cell, which is different from the first power source, the second power source trunk line being provided in the interlayer insulating film; a first branch line provided in the interlayer insulating film and electrically connected to the first power source trunk line; and a second branch line provided in the interlayer insulating film and electrically connected to the second power source trunk line, wherein the first and second branch lines are oppositely provided, thereby forming a capacitor between the first and second power sources, wherein first and second element regions to form elements configuring the core cell are adjacently provided over the main surface of the semiconductor substrate, the first branch line is provided so as to extend from the first element region to the second element region, the second branch line is provided so as to extend from the second element region to the first element region, and at least one of the first and second branch lines is provided beyond a boundary between the first and second element regions.