Patent ID: 7553695
Filing Date: 2009-06-30
Classification: B81B,B81C,H01L

Abstract:
1. A method of fabricating a package for a micro component, the method comprising: bonding a first wafer to a second wafer so that the micro component is located in an area defined by the first and second wafers, wherein the first wafer includes feed-through metallization that at least partially fills micro-vias from the front-side of the first wafer, and wherein the feed-through metallization forms part of one or more electrically conductive paths to or from the micro component when the first and second wafers are bonded together; providing cavities in the back-side of the first wafer opposite the micro-vias in the front-side of the first wafer; providing electrically conductive contacts on the back-side of the first wafer that are electrically coupled to the feed-through metallization; and subsequently thinning the first wafer from its back-side, wherein forming the cavities and providing the conductive contacts is performed before thinning the back-side of the first wafer.