Patent ID: 7509532
Filing Date: 2009-03-24
Classification: G01R,G11C,H05K

Abstract:
1. A high-density parallel test system for testing memory modules comprising: a plurality of motherboards, each motherboard being a main board for a computer using memory modules as a memory; test adaptor boards, each coupled to a motherboard in the plurality of motherboards, the test adaptor boards each having a test socket for receiving memory modules for testing by the motherboards, each test adaptor board being a circuit board for electrically connecting a memory module inserted into the test socket to a motherboard attached to the test adaptor board, the motherboard using the memory module inserted into the test socket as a portion of the memory of the motherboard; a plurality of connectors, each connector for electrically connecting one of the test adaptor boards to a motherboard in the plurality of motherboards, wherein the motherboard has a substrate that is substantially perpendicular to the test adaptor board; and a main system interface, coupled to the plurality of motherboards, for commanding the motherboards to test memory modules inserted into a test socket and for receiving test results from the motherboards, whereby the memory modules inserted into the test sockets on the test adaptor boards are tested by motherboards mounted perpendicularly to the test adaptor boards.