Patent ID: 8354598
Filing Date: 2013-01-15
Classification: H01L,H05K,Y10T

Abstract:
1. A packaging substrate, comprising: a first assistant dielectric layer having an inner wiring layer disposed on a surface thereof and a plurality of inner conductive vias disposed therein to electrically connect to the inner wiring layer; a plurality of metal bumps disposed on another surface of the first assistant dielectric layer and electrically connected to the inner conductive vias, wherein the inner wiring layer and a corresponding one of the metal bumps are electrically connected to a wire-connected end and a bump-connected end of each of the inner conductive vias, respectively, and the wire-connected end has a larger diameter than the bump-connected end; a built-up structure disposed on the first assistant dielectric layer and the inner wiring layer, wherein the built-up structure comprises at least a first dielectric layer, a first wiring layer disposed on the first dielectric layer, and a plurality of first conductive vias disposed in the first dielectric layer and electrically connecting the first wiring layer and the inner wiring layer, and the first wiring layer disposed on an outermost portion of the built-up structure has a plurality of first conductive pads; and a first insulating protective layer disposed on the built-up structure and having a plurality of openings corresponding in position to the first conductive pads, respectively, so as for the first conductive pads to be exposed from the first insulating protective layer.