Patent ID: 6486496
Filing Date: 2002-11-26
Classification: H01L

Abstract:
A polysilicon thin film transistor structure, comprising:an insulating substrate; a metal-induced lateral crystallization polysilicon channel layer above the insulating substrate, wherein the metal-induced lateral crystallization polysilicon channel layer includes a channel region, a lightly doped source/drain region and a source/drain region, the lightly doped source/drain region is adjacent to the channel region and the source/drain region is adjacent to the lightly doped source/drain region; an oxide layer above the metal-induced lateral crystallization polysilicon channel layer and covering the channel region and the lightly doped source/drain region; a gate electrode above the oxide layer within the channel region; a spacer over the gate electrode and sidewalls of the gate electrode; an isolation spacer on sidewalls of the spacer; and a self-aligned silicide layer over the top of the gate electrode and an exposed portion of the source/drain region.