Patent ID: 6746944
Filing Date: 2004-06-08
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, the method comprising:forming a gate electrode, having an upper surface and side surfaces over a main surface of a silicon substrate with a gate dielectric layer therebetween; forming shallow source/drain extensions in the substrate; forming dielectric sidewall spacers on the side surfaces of the gate electrode; forming preamorphized regions in the substrate at a first depth overlapping an interface between the silicon substrate and subsequently formed nickel silicide layers in the main surface of the silicon substrate; ion implanting impurities to form deep source/drain implants in the substrate at a second depth overlapping the preamorphized regions; laser thermal annealing to activate deep source/drain regions; and forming nickel silicide layers in the main surface of the substrate with the interface therebetween, and forming a layer of nickel silicide on the upper surface of the gate electrode.