Patent ID: 6473833
Filing Date: 2002-10-29
Classification: G06F

Abstract:
A method of operating a multi-level cache memory of a computer system, said method comprising:determining whether or not a lower-level cache is present; in response to a determination that a lower-level cache is present: allocating a first portion of a general purpose data store of said higher-level cache as a directory of said lower-level cache and allocating a second portion of said general purpose data store to hold data that can be accessed and processed during instruction execution by a processor of the computer system; and building, within said first portion, a directory describing contents of a data store of said lower-level cache; and in response to a determination that a lower level cache is not present, allocating all of said general purpose data store of said higher-level cache to hold data that can be accessed and processed during instruction execution by a processor of the computer system.