Patent ID: 6291282
Filing Date: 2001-09-18
Classification: H01L

Abstract:
A method of forming a first transistor having a first gate electrode and a second transistor having a second gate electrode on a semiconductor substrate, said method comprising the steps of:forming first and second disposable gate structures insulatively disposed over the semiconductor substrate at the locations of the first and second transistors, respectively;forming source/drain regions of a first conductivity type on opposite sides of the first disposable gate structure;forming source/drain regions of a second conductivity type on opposite sides of the second disposable gate structure;forming an insulating layer over the substrate, the insulating layer having a top surface substantially coplanar with top surfaces of the first and second disposable gate structures;removing the first and second disposable gate structures;forming a first conductive material insulatively disposed over the semiconductor substrate at the location from which the first disposable gate structure was removed, said first conductive material having a first work function; andforming a second conductive material insulatively disposed over the semiconductor substrate at the location from which the second disposable gate structure was removed, said second conductive material being comprised of said first conductive material but having a second work function different from said first work function;wherein said first conductive material forms said first gate electrode and said second conductive material forms said second gate electrode.