Patent ID: 6711683
Filing Date: 2004-03-23
Classification: G06F,H04N

Abstract:
A secure computing system comprising:a data processor disposed on a single integrated circuit, said data processor including a read only memory storing a decryption key, and a chip identity read only register storing a unique chip identity number accessible by said data processor; a memory bidirectionally coupled to said data processor and storing data; said data processor being programmed to: receive encrypted and compressed data, decrypt said encrypted and compressed data employing said decryption key stored in said read only memory, employ said memory as a first-in-first-out buffer including encrypting said decrypted data employing at least a part of said chip identity number as encryption key, storing said encrypted data in said memory, recalling said stored data from said memory, and decrypting said recalled data employing at least a part of said chip identity number as decryption key, decompress said decrypted data recalled from said memory, and output decompressed data.