Patent ID: 6833611
Filing Date: 2004-12-21
Classification: H01L,H05K,Y02P

Abstract:
A semiconductor device comprising: a substrate having opposing upper and lower surfaces, the upper surface of the substrate being provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring; at least a surface-mountable device connected across the ground ring and the power ring; a chip disposed on the upper surface of the substrate, the chip having a plurality of bonding pads located about the periphery thereof; and at least a first bonding wire with an elongated portion extending across and immediately above the surface-mountable device, the first bonding wire having one end connected to one of the bonding pads of the chip and the other end connected to the power ring wherein at least one downward depression is formed in the elongated portion.