Patent ID: 7804716
Filing Date: 2010-09-28
Classification: G11C,H01L

Abstract:
1. A flash memory device in which bit lines are disposed based on double patterning technology (DPT), the flash memory device comprising: one or more main bit lines connected to a cell string including a memory cell storing data; a plurality of dummy bit lines disposed parallel to the one or more main bit lines; and a common source line transferring a common source voltage, and disposed on a different layer from a layer on which the one or more main bit lines and the plurality of dummy bit lines are disposed, wherein the plurality of dummy bit lines includes a first dummy bit line transferring a first voltage and a second dummy bit line transferring a second voltage, and the first dummy bit line is disposed parallel to the second dummy bit line, and wherein the first dummy bit line is adjacent to the at least one main bit line, and the second dummy bit line is not adjacent to the at least one main bit line.