Patent ID: 7941607
Filing Date: 2011-05-10
Classification: G06F,Y02D

Abstract:
1. A method for promoting a sequence of traces in an instruction processing circuit, each trace of the sequence of traces are retrieved from a plurality of sources in an order determined by a sequencer circuit, the method comprising: obtaining, from the sequencer circuit, a current trace in the sequence of traces; determining if the current trace is promotable based on a pre-determined criterion; adding the current trace to a sequencing buffer and marking the current trace, by storing a first promotion flag thereof in the sequencing buffer, as promoted if the current trace is promotable; adding the current trace to the sequencing buffer without marking the current trace as promoted if the current trace is not promotable; obtaining, from the sequencer circuit and in response to adding the current trace to the sequencing buffer, a next trace following the current trace in the sequence of traces according to the order; determining if the next trace is promotable based on the pre-determined criterion; adding the next trace to the sequencing buffer without marking the next trace as promoted if both the current trace and the next trace are not promotable; adding the next trace to the sequencing buffer and marking the next trace, by storing a second promotion flag thereof in the sequencing buffer, as promoted if the next trace is promotable; adding the next trace to the sequencing buffer and marking the next trace, by storing a third promotion flag thereof in the sequencing buffer, as promoted if the current trace is promotable and the next trace is not promotable; combining at least the current trace and the next trace from the sequencing buffer to build a multi-block trace in response to marking both the current trace and the next trace as promoted; and executing the multi-block trace as an atomically executed unit.