Patent ID: 9054916
Filing Date: 2015-06-09
Classification: H03K,H04L

Abstract:
1. A receiver that is selectively reconfigurable, comprising: a first input to couple to, in a first selectable configuration of the receiver, a resistor load and a source terminal of a first transistor that is part of a first differential pair of field-effect transistors (FETs) of a first amplifier of the receiver; and the first input to couple to, in a second selectable configuration of the receiver, a gate terminal of a second transistor that is part of a second differential pair of FETs of a second amplifier of the receiver; mode selector circuitry coupled with the first differential pair of FETs and the second differential pairs of FETs for, in the first selectable configuration of the receiver, activating the first differential pair of FETs and deactivating the second differential pair of FETs, and for, in the second selectable configuration, deactivating the first differential pair of FETs and activating the second differential pair of FETs.