Patent ID: 6365454
Filing Date: 2002-04-02
Classification: H01L

Abstract:
A method of manufacturing a cylindrical capacitor, especially suitable for fabricating dynamic random access memory (DRAM), comprising the steps of:providing a substrate having a plurality of conductive sections thereon; sequentially forming an etching stop layer, a first insulation layer and a plurality of bit lines over the substrate and the conductive sections, wherein each bit line has a cap layer on top and spacers on the sidewalls; forming a second insulation layer that covers the substrate; etching away a portion of the second insulation layer and the first insulation layer until a portion of the etching stop layer is exposed so that a plurality of cylindrical openings and a plurality of node contact openings are sequentially formed, wherein the node contact openings are between the spacers and a plurality of gaps links up neighboring cylindrical openings, and width of the gaps is smaller than width of the node contact openings; forming a plurality of conductive spacers on the sidewalls of the cylindrical openings and the node contact openings and at the same time filling up the narrow gaps with a material identical to the conductive spacers so that the conductive spacers and the gap-filling conductive layer together form an upper electrode of a capacitor; forming a dielectric layer over the surface of the upper electrode; etching away the exposed etching stop layer at the bottom of the node contact openings so that a portion of the conductive sections is exposed; and depositing conductive material into the node contact openings and the cylindrical openings to form node contacts and lower electrodes of capacitors respectively.