Patent ID: 8138043
Filing Date: 2012-03-20
Classification: H01L

Abstract:
1. A method of manufacturing a non-volatile semiconductor memory device including a semiconductor substrate having a memory cell array region and a peripheral circuit region, comprising: etching a first upper surface of the semiconductor substrate in the peripheral circuit region except a second upper surface of the semiconductor substrate in the memory cell array region with a dry etching method; forming a first gate insulating film on the first upper surface of the semiconductor substrate, the first gate insulating film including a first thickness; forming a second gate insulating film on the second upper surface of the semiconductor substrate, the second gate insulating film including a second thickness being thinner than the first thickness; simultaneously forming a gate electrode film on the memory cell array region and the peripheral circuit region; simultaneously forming a mask film on the gate electrode film in the memory cell array region and the peripheral circuit region; forming trenches on the memory cell array region and the peripheral circuit region; depositing a buried insulating film on the memory cell array region and the peripheral circuit region; and polishing an upper surface of the buried insulating film in the memory cell array region and the peripheral circuit region with the mask film as a stopper.