Patent ID: 7694267
Filing Date: 2010-04-06
Classification: G03F,G06F

Abstract:
1. A method comprising: obtaining a design layout including features, each feature including edge segments; applying optical proximity corrections to the design layout to produce a first post-OPC layout; simulating, using a computer executing model-based OPC software, a lithography process using the first post-OPC layout and a plurality of models of the lithography process at a plurality of process conditions to produce a plurality of simulated resist images; determining a simulated resist contour for each edge segment of each feature of the design layout in each of the plurality of simulated resist images; determining a weighted average error in a contour metric for each edge segment over the plurality of process conditions, wherein the error in the contour metric is an offset between the contour metric at each of the plurality of process conditions and the contour metric at nominal condition; determining a retarget value for the contour metric for each edge segment using the weighted average error; applying each retarget value to the corresponding edge to produce a retargeted layout; and applying optical proximity corrections to the retargeted layout to produce a second post-OPC layout.