Patent ID: 6847102
Filing Date: 2005-01-25
Classification: H01L

Abstract:
1. A semiconductor device comprising: a package substrate having a first surface, a second surface opposite the first surface, and a cavity formed in the first surface and extending into the package substrate, the cavity having a cavity wall substantially perpendicular to the first and second surfaces; an integrated circuit die, wherein at least a portion of the integrated circuit die is in the cavity, and wherein the integrated circuit die has a first surface, a second surface opposite the first surface, an outer wall substantially perpendicular to the first and second surfaces, a ledge portion at an intersection of the first surface of the integrated circuit die and the outer wall, wherein at least a portion of the outer wall substantially faces the cavity wall; and a conductive material in the cavity, wherein the conductive material thermally couples the outer wall of the integrated circuit die to the cavity wall.