Patent ID: 7049890
Filing Date: 2006-05-23
Classification: H03F

Abstract:
1. An operational amplifier comprising: a first input terminal and a second input terminal; a first differential transistor pair of a first conductivity type and a second differential transistor pair of a second conductivity type which is different from the first conductivity type, each of the second electrodes, i.e., control electrodes, of transistors of the first and second differential transistor pairs being coupled with the first input terminal or the second input terminal; a first current mirror circuit which is coupled with one output of the first differential transistor pair, with one output of the second differential transistor pair, and with a first power supply conductor; a second current mirror circuit which is coupled with the other output of the first differential transistor pair, with the other output of the second differential transistor pair, and with the first power supply conductor; a load circuit (MM an output driver stage circuit which is coupled with the coupling node between the first current mirror circuit and the load circuit, and which has two drive output terminals for controlling first and second output transistors; the first transistor whose second electrode, i.e., control electrode, is coupled with one of the two drive output terminals of the output drive circuit, whose first and third electrodes are coupled with the first power supply conductor and an output terminal of the operational amplifier, respectively; the second transistor whose second electrode, i.e., control electrode is coupled with the other of the two drive output terminals of the output drive circuit, whose first and third electrodes are coupled with the second power supply conductor and the output terminal of the operational amplifier, respectively; first and second current source circuits which are coupled with the first and second differential transistor pairs, respectively, and which are controlled by the output drive signals of the output driver stage circuit; a first phase inverter circuit which responds to a drive output potential level of the output driver stage circuit and which controls a circuit current of the first differential transistor pair in response to the rise or fall of the signal output potential level; and a second phase inverter circuit which responds to the drive output potential level of the output driver stage circuit and which controls a circuit current of the second differential transistor pair in response to the fall or rise of the signal output potential level.