Patent ID: 8860187
Filing Date: 2014-10-14
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a plurality of through silicon vias formed through the semiconductor substrate and spaced at first predetermined intervals in a first direction; a plurality of power supply connection pads each having a first size, and the power supply connection pads being connected to first selected ones of the through silicon vias; a plurality of input/output connection pads each having a second size, smaller than the first size, and the input/output connection pads being connected to second selected ones of the through silicon vias other than the first selected ones of the through silicon vias; a plurality of input/output circuits; and a plurality of wires connecting the input/output circuits to respective ones of the input/output connection pads, and wherein the wires include adjustment portions to provide distance compensation between the input/output circuits and respective input/output connection pads.