Patent ID: 8415670
Filing Date: 2013-04-09
Classification: H01L

Abstract:
1. A thin film transistor (TFT) comprising: a channel area disposed in a crystalline substrate, said crystalline substrate comprising a plurality of grain boundaries that are approximately parallel with each other and are spaced apart with approximately equal spacings, λ, wherein the shape of the channel area comprises a non-equiangular polygon, the polygon having two opposing side edges that are oriented substantially perpendicular to the plurality of grain boundaries and an upper edge and a lower edge, wherein at least a portion of each of the upper and lower edges is oriented at a tilt angle with respect to the plurality of grain boundaries that is greater than 0 and less than or equal to 90 degrees, the tilt angles for the portion of each edge of the upper and lower edges selected such that the number of grain boundaries covered by the polygon is independent of the location of the channel area within the crystalline substrate.