Patent ID: 8558306
Filing Date: 2013-10-15
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: forming a device isolation layer defining a plurality of active regions in a semiconductor substrate: forming a interlayer insulating film over the device isolation layer and the active regions; forming a storage node contact hole exposing two neighboring active regions by etching the interlayer insulating film; filling the storage node contact hole with a storage node contact plug material; etching the interlayer insulating film to form a first bit line region exposing an active region; etching the storage node contact plug material to form a second bit line region passing through the storage node contact plug material so that the storage node contact plug material is divided into first and second storage node contact plugs; forming a concave lower portion of a sidewall of each of the first and the second storage node contact plugs defined by the second bit line region by etching a lower portion of the sidewall of each of the first and the second storage node contact plugs, respectively; forming a spacer over sidewalls of the first and the second bit line regions and a bottom of the second bit line region; and filling the first and the second bit line regions in which the spacer is formed with a bit line conductive material to form a bit line.