Patent ID: 8543635
Filing Date: 2013-09-24
Classification: G06F,H03H,H03K

Abstract:
1. An integrated circuit, comprising: programmable logic blocks including at least a configurable logic block and a digital signal processing block; wherein each digital signal processing block is a dedicated circuit block including a preadder stage, a multiplier stage, an adder stage, internal routing circuitry, and a control bus; the control bus coupled to the preadder stage for dynamically controlling operation of the preadder stage; the preadder stage including: wherein the adder/subtractor is coupled to an output of the first logic gate and an output of the second logic gate, an output of the adder/subtractor is coupled to the multiplier stage using the internal routing circuitry within the digital signal processing block, an output of the multiplier stage is coupled to the adder stage, and the second input port of the first logic gate and the third input port of the second logic gate enable dynamic power gating for power conservation.