Patent ID: 8028119
Filing Date: 2011-09-27
Classification: G06F,G11C,H01L

Abstract:
1. A memory module comprising: a non-volatile memory; a cache memory; and a control circuit which controls accesses between said non-volatile memory and said cache memory, wherein the memory module is provided with a first non-volatile memory interface for accessing said cache memory from an information processing device outside of said memory module and a second non-volatile memory interface for accessing said non-volatile memory from said information processing device outside of said memory module, wherein data stored in the non-volatile memory is output from the second non-volatile memory interface via the cache memory when the information processing device accesses the second non-volatile memory interface, wherein data stored in the non-volatile memory is output from the first non-volatile memory interface without going through the cache memory when the information processing device accesses the first non-volatile memory interface, and wherein the first non-volatile memory interface and the second non-volatile memory interface are both connected to the information processing device, and said non-volatile memory and said cache memory are accessible at the same time independently via said first non-volatile memory interface and said second non-volatile memory interface, respectively.