Patent ID: 8803240
Filing Date: 2014-08-12
Classification: H01L,Y10S

Abstract:
1. An electronic device comprising: a substrate; a source region and a drain region of a transistor disposed in the substrate; a channel region disposed between the source region and the drain region; a dielectric disposed above the channel region; a gate electrode disposed upon the dielectric above the channel region, the gate electrode configured with a step above the dielectric and comprising a combination of a plurality of refractory materials, wherein the gate electrode comprises a stacked gate electrode such that a conductive etch stop material is between a bottom layer and a top layer of the gate electrode; and a first gate spacer contacting the gate electrode and a second gate spacer contacting the gate electrode, the first gate spacer separated from the second gate spacer by the gate electrode, the first and second gate spacer with the gate electrode configured such that a stress condition in a thicker side of the step is different from a stress condition in a thinner side of the step.