Patent ID: 8519480
Filing Date: 2013-08-27
Classification: H01L

Abstract:
1. An electrostatic discharge protection device, comprising: a first transistor having a first drain electrically connected to an input/output pin of a chip, a first source electrically connected to a first voltage input pin of the chip, and a first gate, wherein the first drain is an internally shrunk drain, wherein the first source comprises a first doping region and third doping region, and a second doping region is disposed in the first doping region and a fourth doping region is disposed in the third doping region; a second transistor having a second drain electrically connected to the input/output pin, a second source electrically connected to a second voltage input pin, and a second gate; and an electrostatic discharge clamping circuit electrically connected to the first voltage input pin and the second voltage input pin.