Patent ID: 6295583
Filing Date: 2001-09-25
Classification: G06F

Abstract:
A computing apparatus for multiplexing a full probe with a plurality of tag-only probes, comprising:a clock producing a plurality of clock cycles;a cache comprising:a tag structure which in response to a probe transfers tag information in a clock cycle;a data structure which in response to a probe transfers data during multiple clock cycles of the plurality of clock cycles;an input stream configured to accept a plurality of probes directed to cache;a selector configured to designate each one of the plurality of probes in the input stream to be one of a full probe and a tag-only probe; anda multiplexer configured to access the data structure with one of the probes designated a full probe to transfer data during the multiple clocks cycles, and the multiplexer further configured to access the tag structure with one or more of the probes designated tag-only probes during the multiple clock cycles, each one of the tag-only probes accessing the tag structure to transfer tag information during a respective one of the multiple clock cycles;wherein a probe from the input stream accesses the cache in two stage wherein in the first stage the selector designates the probe to be a tag-only probe and the multiplexer accesses the tag structure with the probe and if the probe returns tag information indicating a cache hit the selector in the second stage designates the probe to be a full probe and the multiplexer then accesses the data structure with the probe.