Patent ID: 7560967
Filing Date: 2009-07-14
Classification: H03C

Abstract:
1. A phase interpolator having two sets of differential inputs, comprising: a plurality of tail current sources that are activated for substantially all times when said phase interpolator is operational; at least two pairs of differential input transistor devices, wherein an input to each pair of said at least two pairs of differential input transistor devices comprises one of said two sets of differential inputs, wherein one pair of said differential input transistor devices is associated with a minimum phase of said phase interpolator and another pair of said differential input transistor devices is associated with a maximum phase of said phase interpolator; and a plurality of current steering switches that provide currents generated by said plurality of tail current sources to one or more of said at least two pairs of differential input transistor devices, based on an applied interpolation control signal, wherein said pairs of differential input transistor devices are weighted to provide a number of desired phase increments, and wherein said pairs of weighted differential input transistor devices are weighted with a weight that substantially matches a weighting of said plurality of tail current sources.