Patent ID: 7007137
Filing Date: 2006-02-28
Classification: G06F

Abstract:
1. An architecture capable of accessing data and instructions of an external memory device using store and forward, comprising: a processor kernel capable of effecting a burst transfer for continuously outputting a data string having a fixed burst length for access; a cache module for storing a portion of data and instructions sent from the memory device, the stored portion of data and instructions being available for the processor kernel to access at high speed; a prefetch module for predicting possible data and instructions to be used by the processor kernel, so as to read the same from the memory device and store the same therein in advance; a switch for switching a connection from the processor kernel to the cache module or the prefetch module; and a store and forward controller for detecting access between the prefetch module and the memory device, so as to command the switch to switch the connection from the processor kernel to the prefetch module when the prefetch module transfers data by burst transfer, such that data and instructions transferred from the memory device to the prefetch module are also transferred to the processor kernel.