Patent ID: 8969176
Filing Date: 2015-03-03
Classification: B81B,B81C,H01L

Abstract:
1. A package for a plurality of semiconductor devices, comprising: an electrical interconnect structure disposed over the plurality of semiconductor devices; an active device structure bonded to the electrical interconnect structure, the active device structure comprising; a semiconductor substrate, the semiconductor substrate having the plurality of semiconductor devices, the active device structure having a first polymer layer on a portion of a surface thereof; wherein the electrical interconnect structure has a second polymer layer on a surface thereof and wherein the first polymer layer on the active device layer structure is in direct contact with and bonded to the second polymer layer on the electrical interconnect structure to bond the active device structure to the electrical interconnect structure; wherein the electrical interconnect structure has a first portion of an the electrical interconnecting arrangement on a lower surface of the electrical interconnect structure; wherein the electrical interconnect structure has a second portion of the electrical interconnecting arrangement is on an upper surface of the interconnecting structure; wherein the active device structure has a third portion of the electrical interconnecting arrangement; and wherein an electrical via passes between the first portion of the electrical interconnecting arrangement, and the second portion of the electrical interconnecting arrangement to the third portion of the electrical interconnecting arrangement to provide electrical interconnection among the semiconductor devices on the semiconductor substrate.