Patent ID: 6395606
Filing Date: 2002-05-28
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, which method comprises:forming a silicon nitride layer on a main surface of a semiconductor substrate; forming an opening in the silicon nitride layer to expose a portion of the main surface, the opening corresponding to a dimension of a transistor gate and having substantially vertical side surfaces; forming sidewall spacers on the side surfaces of the opening extending onto the exposed portion of the main surface; ion implanting impurities into the substrate through the opening to form a threshold implant, using the silicon nitride layer and the sidewall spacers as a mask; forming a gate oxide layer on a part of the exposed portion of the main surface not covered by the sidewall spacers; forming a doped polysilicon layer on the gate oxide and the sidewall spacers; and forming a metal layer to fill the opening.