Patent ID: 8248569
Filing Date: 2012-08-21
Classification: G02F,H01L

Abstract:
1. A semiconductor chip comprising: a semiconductor substrate having a short side and a long side; a plurality of bump electrodes formed over the semiconductor substrate, and arranged along the long side, wherein the plurality of bump electrodes include a first bump electrode arranged in the vicinity of a center portion of the long side and a second bump electrode arranged in the vicinity of an end portion of the long side, wherein the height from the semiconductor substrate to the second bump is greater than the height from the semiconductor substrate to the first bump, wherein the first bump and the second bump are connected to a substrate of a display device through an anisotropic conductive film, wherein the semiconductor chip comprises one or more than one metal layers between the semiconductor substrate and the plurality of bump electrodes, wherein the number of the metal layers between the semiconductor substrate and the second bump is greater than the number of the metal layers between the semiconductor substrate and the first bump, and wherein the metal layers between the second bump and the semiconductor chip comprise a dummy layer.