Patent ID: 7042246
Filing Date: 2006-05-09
Classification: G06F

Abstract:
1. A logic circuit for generating four binary outputs as four threshold functions of four binary inputs to the logic circuit, the threshold functions comprising a first threshold function which is high if at least one of the binary inputs is high, a second threshold function which is high if at least two of the binary inputs are high, a third threshold function which is high if at least three of the binary inputs are high, and a fourth threshold function which is high if all of the binary inputs are high, the logic circuit comprising: first level logic comprising two logic parts, each logic part comprising a NOR gate and a NAND gate and having two first level inputs for receiving the binary inputs and two first level outputs; and second level logic comprising four second level outputs, four second level inputs for receiving second level binary inputs and connected to the four first level outputs, a NAND gate, a first gate generating a logical OR combination of two second level binary inputs and NAND combining the logical OR combination with two other second level binary inputs, a second gate generating logical OR combinations of two pairs of second level binary inputs and NAND combining the logical OR combinations, and a NOR gate; wherein one of said four binary outputs is generated at each of said four outputs.