Patent ID: 8792260
Filing Date: 2014-07-29
Classification: H02M,Y02B

Abstract:
1. A rectifier circuit comprising: a first transistor whose gate electrode is connected to a second node, whose first electrode is connected to a first node, and whose second electrode is connected to a second terminal; a second transistor whose gate electrode is connected to the first node, whose first electrode is connected to the second node, and whose second electrode is connected to a first terminal; a third transistor whose gate electrode is connected to the first node, whose first electrode is connected to a third node, and whose second electrode is connected to the first node; a first capacitor whose first electrode is connected to the first terminal and whose second electrode is connected to the first node; and a second capacitor whose first electrode is connected to the second terminal and whose second electrode is connected to the second node, wherein the first transistor, the second transistor, and the third transistor are n-channel enhancement transistors, and wherein AC voltage input to the first terminal and the second terminal is rectified to DC voltage and the DC voltage is output to the third node.