Patent ID: 8680594
Filing Date: 2014-03-25
Classification: H01L

Abstract:
1. A semiconductor construction, comprising: a first region of a semiconductor substrate having first features, and a second region of the substrate having second features; the first features being more closely spaced than the second features; a first electrically insulative material over the second region, and having a top surface below upper surfaces of the first features; a second electrically insulative material over the first electrically insulative material and having a different composition from the first electrically insulative material; the second electrically insulative material being configured as a structure having an upwardly-extending stem joined to a horizontally-extending bench; the bench having an upper surface at about a common level as upper surfaces of the first features; the stem extending to above the upper surfaces of the first features; and an electrically conductive contact within the second region and extending through the first and second electrically insulative materials.