Patent ID: 6713825
Filing Date: 2004-03-30
Classification: H01L

Abstract:
A poly-crystalline thin film transistor, comprising:a buffer layer on a substrate; a poly-crystalline semiconductor layer on the buffer layer, the poly-crystalline layer including a channel layer, offset regions along sides of the channel layer, sequential doping regions along sides of the offset regions, and drain and source regions along sides of the sequential doping regions, wherein the doping concentration of the sequential doping regions are greater near the drain and source regions than near the offset regions; a gate insulation layer on the semiconductor layer; a gate electrode on the gate insulation layer, wherein the gate electrode is comprised of a main gate electrode and of auxiliary gate electrodes; an interlayer over the gate electrode; and source and drain electrodes on the interlayer, wherein the source electrode contacts the source region through a source contact hole in the interlayer, and wherein the drain electrode contacts the drain region through a drain contact hole in the interlayer.