Patent ID: 7859059
Filing Date: 2010-12-28
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a support substrate; an oxide film layer formed on the support substrate; and an nMOS transistor and a pMOS transistor formed on the oxide film layer, wherein the pMOS transistor is a fully depleted MOS transistor, the pMOS transistor comprising: an n-type region formed on the oxide film layer; a first gate insulating film formed on the n-type region, the first gate insulating film including a high-dielectric insulating film; a first gate electrode formed on the first gate insulating film, the first gate electrode including silicide region ( a source/drain region formed throughout on both portions in the n-type region sandwiching the first gate electrode in the direction of a normal to the surface where the n-type region is in contact with the first gate insulating film, and the nMOS transistor is a fully depleted MOS transistor, the nMOS transistor comprising: a p-type region formed on the oxide film layer; a second gate insulating film formed on the p-type region, the second gate insulating film including a high-dielectric insulating film; a second gate electrode formed on the second gate insulating film, the second gate electrode including silicide region ( a source/drain region formed throughout on both portions in the p-type region sandwiching the second gate electrode in the direction of a normal to the surface where the p-type region is in contact with the second gate insulating film.