Patent ID: 7285864
Filing Date: 2007-10-23
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first semiconductor chip, a first adhesive layer formed on an element-forming surface of the first semiconductor chip; a first bump formed on a first pad on the first semiconductor chip and in the first adhesive layer, the first bump projecting from the first adhesive layer; a first bonding wire which electrically connects the projecting portion of the first bump and a first wiring layer formed on a printed circuit board to each other; a spacer smaller than the first semiconductor chip and mounted on a portion of the first adhesive layer which lies inside the first pad on the first semiconductor chip; a second adhesive layer formed on the spacer and having a fillet formed to cover a connection portion of the first bump and the first bonding wire; a second semiconductor chip mounted on the second adhesive layer and having substantially the same size as the first semiconductor chip; a third adhesive layer formed on an entire surface of an element-forming surface of the second semiconductor chip; a second bump formed on a second pad on the second semiconductor chip and in the third adhesive layer, the second bump projecting from the third adhesive layer; and a second bonding wire which electrically connects the projecting portion of the second bump and a second wiring layer formed on the printed circuit board to each other; wherein the fillet surrounds a ball-bonding portion of the first bonding wire formed on a backside of the second semiconductor chip.