Patent ID: 7649207
Filing Date: 2010-01-19
Classification: H01L

Abstract:
1. A thin film transistor, comprising a substrate; a polysilicon layer formed on the substrate, wherein the polysilicon layer comprises a source region, a drain region and a channel region located therebetween, and the source region has a uniform concentration of doped ions, wherein the uniform concentration of doped ions is substantially the same as that of the drain region, and wherein the channel region is directly connected with the source region and the drain region; a gate insulating layer formed on the polysilicon layer; a gate electrode formed on the gate insulating layer, comprising: a first electrode layer formed on the gate insulating layer; and a second electrode layer formed on the first electrode layer, substantially overlay a top surface of the first electrode layer, wherein each of the first and second electrode layers has a taper angle of less than about 90 degrees; a dielectric interlayer formed on the gate electrode and the gate insulating layer; and source and drain electrodes formed on the dielectric interlayer, electrically connected to the source and drain regions, respectively, wherein the first electrode layer has a Young's modulus different from that of the second electrode layer.