Patent ID: 7173858
Filing Date: 2007-02-06
Classification: B82Y,G11C

Abstract:
1. A nonvolatile memory comprising: n memory transistors electrically connected in series with each other, each of which has a gate electrode, a first electrode, and a second electrode; a select transistor having a gate electrode, a third electrode, and a fourth electrode electrically connected to the first electrode of the memory transistor that is selected from among the n memory transistors; a reference memory transistor having a gate electrode, a fifth electrode, and a sixth electrode; a read circuit electrically connected to the third electrode of the select transistor and the fifth electrode of the reference memory transistor; a verify circuit electrically connected to the read circuit; and a write circuit electrically connected to the verify circuit, the third electrode of the select transistor and the fifth electrode of the reference memory transistor, wherein n is a natural number no less than 2.