Patent ID: 8325800
Filing Date: 2012-12-04
Classification: H04N

Abstract:
1. A computer system comprising a processing unit, memory and storage containing instructions which, when executed by the processing unit, cause the system to perform a method of encoding a sequence of frames organized as plural segments, each of the plural segments comprising a plurality of the frames, the method comprising: selecting a low bit rate at which to encode a given segment of the plural segments for a low bit rate layer, wherein the low bit rate is identical for each of the plural segments; selecting a high bit rate at which to encode the given segment for a high bit rate layer, wherein the high bit rate is set for the plural segments on a segment-by-segment basis depending on complexity of the given segment and a quality threshold for encoding; selecting one or more intermediate bit rates between the low bit rate and the high bit rate at which to encode the given segment for one or more intermediate bit rate layers, respectively, wherein a number of intermediate bit rate layers is variable depending on the high bit rate for the given segment; encoding the given segment at the high bit rate to produce a high bit rate chunk for the given segment; encoding the given segment at the low bit rate to produce a low bit rate chunk for the given segment; encoding the given segment at each of the one or more intermediate bit rates to produce one or more intermediate bit rate chunks for the given segment; and outputting the high bit rate chunk, the low bit rate chunk, and the one or more intermediate bit rate chunks for the given segment.