Patent ID: 6769105
Filing Date: 2004-07-27
Classification: G06F

Abstract:
A method of laying out an integrated circuit using an opportunistic connection gridded system, said method comprising:routing a first layer with a preferred horizontal wiring direction using a first defined wiring pitch; routing a second layer with a preferred vertical wiring direction using a second defined wiring pitch, adding locations where said second defined wiring pitch intersects with said first defined wiring pitch to a via location set; routing a third layer with a first preferred diagonal wiring direction using a third defined wiring pitch, adding locations where said third defined wiring pitch intersects with said first and second defined wiring pitches to said via location set; routing a fourth layer with a second preferred diagonal wiring direction using a fourth defined wiring pitch, adding locations where said fourth defined wiring pitch intersects with said first, second, and third defined wiring pitches to said via location set; and creating vias as necessary from said via location set to connecting wiring on different wiring layers provided no interconnect line on any other wiring layer is affected by an existing via being placed closer than allowed by minimum distance guidelines.