Patent ID: 6100136
Filing Date: 2000-08-08
Classification: H01L

Abstract:
A method of forming a capacitor, comprising the steps of:forming a dielectric layer on a substrate, wherein the substrate comprises a cell array area and a peripheral area;forming a covering layer on the dielectric layer;forming at least a contact electrode through the dielectric layer and the covering layer to contact the substrate;forming a first oxide layer over the substrate;removing a portion of the first oxide layer in the cell array area to form an opening, which exposes the contact electrode;forming a conformal preserve layer over the substrate to cover the first oxide layer and a surface of the opening;forming a second oxide layer over the substrate to cover the preserve layer and fill the opening;removing a portion of the second oxide layer in the cell array area to form an opening, which exposes the contact electrode;forming a conformal first conductive layer over the substrate to cover the second oxide layer and the opening;forming a third oxide layer over the substrate to cover the first conductive layer and fill the opening;performing a planarization step to remove the third oxide layer, the first conductive layer, and the second oxide layer until the preserve layer in the peripheral area is exposed, so as to form a planarized surface over the substrate;removing the third oxide layer and the second oxide layer in the cell array area to expose the first conductive layer;forming a hemispherical grained silicon layer on the exposed first conductive layer; andforming a dielectric film on the hemispherical grained silicon layer; andforming a second conductive layer over the substrate to fill the opening.