Patent ID: 6706633
Filing Date: 2004-03-16
Classification: H01L

Abstract:
A method of forming a self-aligned contact pad for use in a semiconductor device, comprising:forming a gate having a gate mask formed thereon on a semiconductor substrate, the semiconductor substrate including an active region and a non-active region; forming a spacer on both sidewalls of the gate and the gate mask; forming an interlayer insulating layer over the entire surface of the semiconductor substrate, the interlayer insulating layer including an opening formed on the active region of the semiconductor substrate; forming a conductive material layer over the entire surface of the semiconductor substrate to cover the interlayer insulating layer; etching-back the conductive material layer until the interlayer insulating layer is exposed; and performing a multi-step chemical mechanical polishing (CMP) process including a first CMP process for etching the conductive material layer and the interlayer insulating layer using a first slurry; and a second CMP process for etching the conductive material layer using a second slurry, wherein the second slurry has a higher selectivity in the conductive material layer than in the gate mask, to form contact pads in the opening of the interlayer insulating layer, such that the contact pads are electrically insulated from each other.