Patent ID: 6599797
Filing Date: 2003-07-29
Classification: H01L

Abstract:
A method for fabricating a substrate, the substrate having a monocrystalline-silicon layer, an SiO2 layer arranged below and a silicon substrate arranged underneath, a recess in the silicon layer and the SiO2 layer exposed by anisotropic etching, the recess having a lower part in the vicinity of the SiO2, said lower part being widened by isotropic etching of SiO2 so that it has a bulge relative to an upper part of the recess conductive material being deposited and etched back until a bottom of the recess is exposed, so that a conductive structure is produced in the bulge which adjoins the monocrystalline silicon layer and the silicon substrate, and insulating material is introduced into the recess so as to produce a cylinder, a lower part being arranged in the lower part of the recess and being laterally surrounded by the conductive structure.