Patent ID: 6144090
Filing Date: 2000-11-07
Classification: H01L,H05K,Y02P

Abstract:
A ball grid array package comprising:a package board having a bottom surface, a top surface, and peripheral side surfaces, said bottom surface having solder ball pads provided thereon, said top surface having wire bonding pads provided thereon;a semiconductor chip contained on the package board, said semiconductor chip being electrically connected to the wire bonding pads of the package board;solder balls arrayed in a grid formation on the bottom surface of the package board, said solder balls being respectively soldered to the solder ball pads of the package board;electrodes provided on the peripheral side surfaces of the package board, each electrode having a first portion provided on one of the peripheral side surfaces, a second portion provided on the top surface and a third portion provided on the bottom surface; andwiring patterns provided between the bottom surface and the top surface of the package board, said wiring patterns electrically connecting the wire bonding pads with the second portions of the electrodes and electrically connecting the solder ball pads with the third portions of the electrodes,wherein the semiconductor chip is electrically connected to the solder ball pads through said electrodes and said wiring patterns.