Patent ID: 6608383
Filing Date: 2003-08-19
Classification: H01L

Abstract:
A semiconductor memory device, comprising:a capacitor formed on a substrate and including a lower electrode, a dielectric film and an upper electrode; a selection transistor formed at the substrate; an electrically conductive plug for providing electrical connection between the selection transistor and the capacitor; and a diffusion barrier film provided between the electrically conductive plug and the lower electrode of the capacitor; wherein the diffusion barrier film comprises a TaxSi1âˆ’xNy film or a HfxSi1âˆ’xNy film where 0.75&lE;x&lE;0.95, and 0.3 &lE;y&lE;0.5), and the lower electrode includes an Ir film and an IrO2 film which are sequentially formed.