Patent ID: 6605983
Filing Date: 2003-08-12
Classification: H02M

Abstract:
A voltage conversion circuit comprising:an input node for receiving an input DC voltage; a first output node and a second output node; a plurality of MOS transistors; a plurality of capacitive devices for storing and transferring charge; said plurality of MOS transistors forming a switching network for routing charge among said plurality of capacitive devices to produce a predetermined positive voltage at said first output node and a predetermined negative voltage at said second output node, said switching network including first PMOS transistors and first NMOS transistors for producing said predetermined positive voltage at said first output node, and including at least one second NMOS transistor for producing said negative voltage at said second output node, wherein: said first NMOS transistors are formed directly in a p-type active layer of a semiconductor substrate, and said semiconductor substrate further has a first n-well and a second n-well of n-type conductivity in said p-type active layer; said first PMOS transistors are formed in said first n-well; and said second NMOS transistor is formed in a first p-well of p-type conductivity formed in said second n-well.