Patent ID: 9183802
Filing Date: 2015-11-10
Classification: G09G

Abstract:
1. A pixel circuit of a displayer, the pixel circuit belonging to a two data lines and one gate line (2D1G) architecture, the displayer comprising a driving circuit electrically connected to the pixel circuit and configured to provide a driving voltage to the pixel circuit, the pixel circuit comprising: a data line set, electrically connected to the driving circuit, and comprising a first data line, a second data line, a third data line, a fourth data line, a fifth data line, a sixth data line, a seventh data line, and an eighth data line; a first pixel, comprising a first main-pixel and a first sub-pixel, wherein the first main-pixel is electrically connected to the first data line and configured to receive the driving voltage through the first data line while the first main-pixel is in a conducting state, and the first sub-pixel is electrically connected to the second data line and configured to receive the driving voltage through the second data line while the first sub-pixel is in a conducting state; a second pixel, disposed adjacent to the first pixel, comprising a second main-pixel and a second sub-pixel, wherein the second main-pixel is electrically connected to the third data line and configured to receive the driving voltage through the third data line while the second main-pixel is in a conducting state, and the second sub-pixel is electrically connected to the fourth data line and configured to receive the driving voltage through the fourth data line while the second sub-pixel is in a conducting state; a third pixel, disposed adjacent to the second pixel opposite to the first pixel, comprising a third main-pixel and a third sub-pixel, wherein the third main-pixel is electrically connected to the sixth data line and configured to receive the driving voltage through the sixth data line while the third main-pixel is in a conducting state, and the third sub-pixel is electrically connected to the fifth data line and configured to receive the driving voltage through the fifth data line while the third sub-pixel is in conducting state; a fourth pixel, disposed adjacent to the third pixel opposite to the second pixel, comprising a fourth main-pixel and a fourth sub-pixel, wherein the fourth main-pixel is electrically connected to the eighth data line and configured to receive the driving voltage through the eighth data line while the fourth main-pixel is in a conducting state, and the fourth sub-pixel is electrically connected to the seventh data line and configured to receive the driving voltage through the seventh data line while the fourth sub-pixel is in a conducting state; a fifth pixel, disposed adjacent to the first pixel, comprising a fifth main-pixel and a fifth sub-pixel, wherein the fifth main-pixel is electrically connected to the second data line and configured to receive the driving voltage through the second data line while the fifth main-pixel is in a conducting state, and the fifth sub-pixel is electrically connected to the first data line and configured to receive the driving voltage through the first data line while the fifth sub-pixel is in a conducting state; a sixth pixel, disposed adjacent to the second pixel and the fifth pixel, comprising a sixth main-pixel and a sixth sub-pixel, wherein the sixth main-pixel is electrically connected to the fourth data line and configured to receive the driving voltage through the fourth data line while the sixth main-pixel is in a conducting state, and the sixth sub-pixel is electrically connected to the third data line and configured to receive the driving voltage through the third data line while the sixth sub-pixel is in a conducting state; wherein said first pixel, said second pixel, said third pixel, and said fourth pixel are disposed in a first pixel row, and the fifth pixel and the sixth pixel are disposed in a second pixel row directly adjacent to said first pixel row; wherein the first data line, the second data line, the third data line, the fourth data line, the fifth data line, the sixth data line, the seventh data line, and the eighth data line are disposed sequentially, the first data line, the third data line, the fifth data line, and the seventh data line have a first polarity, the second data line, the fourth data line, the sixth data line, and the eighth data line have a second polarity opposite from said first polarity; wherein each respective main pixel and subpixel of each pixel have the same horizontal position, and each row of main pixels is separated from the next row of main pixels by a row of sub-pixels.