Patent ID: 8284611
Filing Date: 2012-10-09
Classification: G11C

Abstract:
1. A verifying method of a nonvolatile memory device, the method comprising: precharging bit lines coupled to strings; supplying a first verification voltage to a selected word line and supplying a pass voltage to word lines other than the selected word line; supplying a first sense pulse to switching elements coupled between the bit lines and sense nodes and detecting memory cells, each having a threshold voltage higher than the first verification voltage; supplying a second verification voltage higher than the first verification voltage to the selected word line and supplying the pass voltage to the word lines other than the selected word line; and supplying a second sense pulse to the switching elements and detecting memory cells, each having a threshold voltage higher than the second verification voltage, wherein a voltage level of the second sense pulse is lower than a voltage level of the first sense pulse.