Patent ID: 7356708
Filing Date: 2008-04-08
Classification: H04L

Abstract:
1. A semiconductor integrated circuit, comprising: a plurality of selectable pathways inter-connected between a plurality of data sources and data destinations; a cryptographic circuit connected to the selectable pathways and arranged to selectively receive data at an input from at least one of the data sources, to decrypt or encrypt the data in accordance with a key, and selectively provide the encrypted or decrypted data to at least one of the data destinations via an output; an instruction circuit arranged to receive on a first input an instruction signal and to generate therefrom an output to control the plurality of selectable pathways to select a data pathway configuration of the circuit, thereby selecting from which of the data sources the cryptographic circuit receives data and to which destination the cryptographic circuit provides the data; wherein the instruction circuit is configurable by a limiting rule signal, received at a second input, to operate in accordance with the rule signal that limits the data pathway configurations that are selectable by the instruction signal, thereby limiting flow of data between the data sources and data destinations.