Patent ID: 6756691
Filing Date: 2004-06-29
Classification: H01L,Y10S

Abstract:
A semiconductor device, comprising:a semiconductor substrate; a semiconductor element formed on said semiconductor substrate by overlaying a plurality of patterned layers; and a position check mark used for overlay of said plurality of layers, wherein said semiconductor element includes: an interlayer insulating film formed on said semiconductor substrate; a contact hole penetrating said interlayer insulating film to reach said semiconductor substrate; a plug that is conductive and fills said contact hole; a barrier metal layer provided to cover said contact hole and to be electrically connected to said plug; and a conductive film formed on said barrier metal layer, and wherein said position check mark includes: a plurality of mark holes formed to penetrate said interlayer insulating film; a plurality of recess plugs that are conductive and provided so that their respective one end portions on a side opposite to said semiconductor substrate are recessed in said plurality of mark holes; and wherein said barrier metal layer is provided to cover said plurality of mark holes and to be electrically connected to said recess plug; and said conductive film is formed on said barrier metal layer.