Patent ID: 7868433
Filing Date: 2011-01-11
Classification: H01L

Abstract:
1. A method for packaging integrated circuit devices, comprising: providing a leadframe having a number of leads suitable for use in packaging an integrated circuit die, each lead having a first surface arranged for connection with an associated bond pad on an active surface of the die and a second surface opposite the first surface, the second surfaces of the leads being adhesively secured to an adhesive film; reflowing solder between the first surfaces of selected leads and selected bond pads on the active surface of the die to form solder joint connections that physically and electrically connect the die with the leadframe; dispensing a viscous thermosetting material substantially around the periphery of the active surface of the die such that the viscous thermosetting material substantially fills any gaps between the solder joint connections between the active surface of the die and the adhesive film, wherein the viscous thermosetting material, the solder joint connections, the active surface of the die and the adhesive film define a cavity between the active surface of the die and the adhesive film that isolates selected regions of the active surface of the die from stresses; and encapsulating at least portions of the die, leads, solder joint connections and the adhesive film with a molding material, wherein the viscous thermosetting material, the active surface of the die and the adhesive film substantially prevent molding material from entering the cavity.