Patent ID: 9021186
Filing Date: 2015-04-28
Classification: G06F

Abstract:
1. A system, comprising: a controller component configured to regulate read and write access to a flash memory component and a buffer memory component, wherein the controller component is configured to control a transfer of a set of data associated with an application between the flash memory component and the buffer memory component in connection with a write operation related to the application based on a defined bursting behavior criterion or a defined bandwidth criterion and wherein the buffer memory component is only visible to the controller component; and a partial allocate component configured to partially allocate the set of data stored in the flash memory component into a working set of the set of data associated with the application that is subject to the write operation and to facilitate storage of write data in the flash memory component, wherein the working set is copied from the flash memory component to the buffer memory component to facilitate an update of the working set in the buffer memory component to updated data based on the write data and the buffer memory component is sized as a function of a change rate of the working set being less than a change rate of an update rate to the flash memory component.