Patent ID: 8518825
Filing Date: 2013-08-27
Classification: H01L

Abstract:
1. A method for manufacturing trench-first copper interconnections, the method comprising the steps of: depositing a first dielectric layer on a silicon substrate; coating a first photoresist on said first dielectric layer; exposing and developing said first photoresist through a first lithographic process; removing a part of said first photoresist so that a remaining of said first photoresist forms a trench structure; coating upper surfaces of said remaining first photoresist and side-walls and bottom surfaces of said trench structure with a curing material; heating said curing material to form a separation film over said first photoresist; Removing excess curing material; coating a second photoresist over said trench structure formed by said remaining first photoresist, so that said second photoresist covers an upper surface of said separation film; exposing and developing said second photoresist through a second lithographic process; removing a part of said second photoresist until a portion of an upper surface of said first dielectric layer is exposed, wherein a first VIA hole structure is formed in said second photoresist above said trench structure; keeping a remaining of said second photoresist as a mask; etching said first dielectric layer to expose a portion of an upper surface of said silicon substrate; removing said remaining second photoresist to form a second VIA hole structure; removing said separation film and etching a rest of said first dielectric layer by using a rest of said first photoresist as a mask; removing said rest of said first photoresist to form a second metal trench; and filling metal material to said second VIA hole structure and said second metal trench to form metal interconnection lines disposed in said second VIA hole structure and said second metal trench.