Patent ID: 6144355
Filing Date: 2000-11-07
Classification: G09G

Abstract:
A display device comprising:a display panel having a plurality of display picture elements electrically connected to a plurality of signal lines;a control circuit for receiving a reference clock signal and a serial digital image data signal and generating(A) a pixel clock signal based on at least the reference clock signal and having the same frequency as the reference clock signal,(B) a horizontal start signal based on at least one among the reference clock signal and the pixel clock signal, and(C) a synchronized serial digital image data signal based on the input serial digital image data signal and the pixel clock signal,said control circuit comprising1) a plurality of latch circuits, said plurality of latch circuits being connected in series and transferring the input serial digital image data signal so as to synchronize the input serial digital image data signal to the pixel clock signal, and2) a duty ratio adjuster circuit for adjusting a duty ratio of the reference clock signal and outputting the pixel clock signal; anda signal line driver circuit for (A) converting the synchronized serial digital image data signal into a parallel digital image data signal corresponding to said signal lines, said parallel digital image data signal being in accordance with the pixel clock signal and the horizontal start signal, and (B) providing an image signal to said signal lines.