Patent ID: 8969967
Filing Date: 2015-03-03
Classification: H01L

Abstract:
1. A manufacture comprising an integrated circuit, said integrated circuit comprising a stack having a semiconductor substrate with a first type of doping, an UTBOX type buried insulating layer, first and second electronic components, said first and second electronic components being formed in a location selected from said group consisting of in said semiconductor substrate and on said semiconductor substrate, first and second ground planes disposed beneath said buried insulating layer so as to be respectively plumb with said first and second electronic components, first and second wells with said first type of doping, said wells being disposed respectively beneath said first and second ground planes, and a bias circuit enabling distinct voltages to be applied to said first and second ground planes by means of said first and second wells, wherein said first and second wells are separated from said semi-conductor substrate by a deep well with a second type of doping, and wherein said first and second wells are separated from each other by a separating structure selected from said group consisting of a lateral well having a second type of doping and a block of insulating material.