Patent ID: 6128225
Filing Date: 2000-10-03
Classification: G11C

Abstract:
A circuit for reading data stored in a low-supply-voltage, flash-type, nonvolatile memory cell having control and output terminals and having a memory threshold that is programmed at either a first or second voltage, the first voltage causing the cell to store a first data value and the second voltage causing the cell to store a second data value, the second voltage greater than the first voltage, the circuit comprising:a read terminal coupled to the control terminal of the memory cell, the read terminal also coupled to receive a read voltage;an amplifier having a first input terminal coupled to the output terminal of the memory cell, the amplifier also having a second input terminal and having an output terminal that provides the stored value;a reference cell having a control terminal coupled to the read terminal and an output terminal coupled to the second input terminal of the amplifier, the reference cell having a reference threshold that is less than the read voltage; anda current mirror having a current input terminal coupled to the output terminal of the memory cell and having a current output terminal coupled to the output terminal of the reference cell, the current mirror configured to amplify memory cell output current by a current mirror ratio N.