Patent ID: 6214688
Filing Date: 2001-04-10
Classification: H01L

Abstract:
A method of forming an integrated circuit capacitor, comprising the steps of:forming a first electrically insulating layer having a conductive plug therein, on a semiconductor substrate;forming a second electrically insulating layer on the first electrically insulating layer and on the conductive plug, said second electrically insulating layer comprising a composite of a nitride layer and a first oxide layer on the nitride layer;forming a third electrically insulating layer comprising a material that is different from the first oxide layer, on the second electrically insulating layer;forming a contact hole that extends through the second and third electrically insulating layers and exposes the conductive plug, an upper surface of the first electrically insulating layer and a sidewall of the second electrically insulating layer;forming a conductive layer in the contact hole and on the third electrically insulating layer;planarizing the conductive layer to define a U-shaped electrode in the contact hole and expose the third electrically insulating layer; andetching-back the third electrically insulating layer to expose sidewalls of the U-shaped electrode and expose the first oxide layer, using the first oxide layer as an etch-stop layer and the second electrically insulating layer to support sides of the U-shaped electrode.