Patent ID: 6374033
Filing Date: 2002-04-16
Classification: H04N

Abstract:
A signal processing apparatus for performing signal processing of image data in units of blocks each consisting of n (vertical)Ã—m (horizontal) pixels, the image data being constructed with luminance component data and chrominance component data of two chrominance components, said apparatus comprising:a) a memory for storing the image data; b) division means for dividing image data in one horizontal period of the image data into burst lengths, each of which equals at least a multiple of m and in which the multiple of mÃ—n is not more than a capacity of said memory; and c) allocation means for allocating data sequences of the burst length at an identical row address of said memory so that all image data in the block are aligned at the identical row address, said allocation means putting together the image data of one picture on a component-by-component basis and allocating the luminance component data in one area of the memory, and the chrominance component data of one of the two chrominance components in a second area of the memory, and the chrominance component data of the other of the two chrominance components in a third area of the memory.