Patent ID: 6052024
Filing Date: 2000-04-18
Classification: H03D,H03F,H04B

Abstract:
A switched amplifier circuit comprising:an input port for receiving input signals;a front-end, low-noise amplifier coupled to said input port for amplifying said input signals and providing amplified output signals;a first coupling device coupled to said low-noise amplifier and developing two input paths, each input path including a phase shifter;a second coupling device coupled to said phase shifters; said phase shifters adapted to receive a clock signal for clocking said phase shifters;at least one buffer amplifier;a third coupling device, said at least one buffer amplifier coupled between said second coupling device and said third coupling device, said third coupling device developing two output paths, each output path including at least one buffer amplifier; anda fourth coupler for coupling said out paths to an output port.