Patent ID: 6507224
Filing Date: 2003-01-14
Classification: H03K

Abstract:
A receiver, comprising:a clock sampled amplifier comprising first and second input/output nodes for receiving an external signal and a reference signal, respectively, in response to a first state of a clock signal and a delayed sampling clock signal, and for amplifying and sampling the voltage difference between the external signal and the reference signal, respectively, in response to a transition of the clock signal and the delayed sampling clock signal to a second state; and a pulse generator comprising first and second output nodes connected between a power source voltage and a ground voltage, for pre-charging the first and second output nodes in response to the first state of the delayed sampling clock signal, and for selectively pulling down one of outputs of the first and second output nodes to a level of the ground voltage to generate a pulse signal, in response to the second state of the delayed sampling clock signal and outputs of the first and second input/output nodes of the clock sampled amplifier.