Patent ID: 7676663
Filing Date: 2010-03-09
Classification: G06F

Abstract:
1. A method of operating a computer having a pipelined processor having a Branch Target Buffer (BTB) table comprising: creating a recent entry queue comprising a small subset of entries in said BTB table logically positioned in parallel with said BTB table; organizing said recent entry queue as a First In First Out (FIFO) queue wherein when a previously presented entry is placed into said recent entry queue, an oldest entry therein is moved out to make room for said previously presented entry; organizing said BTB table with a plurality of multi-associative classes with said recent entry queue being associative; defining said recent entry queue logically as a subset of said BTB table and coupled to track a last number of branches entered into said BTB table; comparing each previously presented entry to most recent entries in said recent entry queue; and blocking duplicate entries from being installed into said BTB table and said recent entry queue by examining contents of said recent entry queue for duplicate entries prior to a write into said BTB table and into said recent entry queue; and in addition allowing decoding to be delayed by a defined number of cycles such that a branch of interest can be delayed from decoding in order to allow a given entry in said BTB table to be detected in time for future decoding of said branch of interest.