Patent ID: 6018179
Filing Date: 2000-01-25
Classification: H01L,Y10S

Abstract:
A transistor formed on a semiconductor substrate, the transistor comprising:a source formed in the semiconductive substrate;a drain formed in the semiconductive substrate;a channel defined in the semiconductive substrate between the source and the drain;a gate dielectric residing above the channel; anda gate conductor residing upon the gate dielectric, the gate conductor having an upper surface, a lower surface, and sloped sidewalls, the lower surface residing upon the gate dielectric, the upper surface having a larger area than the lower surface such that the length of the channel is less than a corresponding length of the upper surface of the gate conductor, wherein a cross-sectional shape of the gate conductor corresponds to a cross-sectional shape of a slope etched void that was formed in an oxide layer that was deposited and slope etched to form the slope etched void.