Patent ID: 8994422
Filing Date: 2015-03-31
Classification: H03L

Abstract:
1. A phase-locked loop for locking a phase of an output signal to a reference signal, the output signal having a frequency that is different from a frequency of the reference signal, comprising: an oscillator configured to generate a plurality of analog signals at a selected frequency, each of the plurality of analog signals having a different phase such that the phases of the plurality of analog signals are distributed equally across a cycle of the frequency of the output signal, and to adjust the phase of the output signal based upon a phase difference signal; a frequency offset module comprising: a frequency divider configured to frequency-divide the intermediate signal by the integer M; and a phase detector configured to receive the frequency-divided intermediate signal and the reference signal, compare the phase of the frequency-divided intermediate signal with the phase of the reference signal, and output the phase difference signal to the oscillator based upon the comparison.