Patent ID: 8112734
Filing Date: 2012-02-07
Classification: G06F

Abstract:
1. A method incorporating adaptive body biasing into an integrated circuit design flow comprising the steps of: providing a cell library for said integrated circuit design flow, wherein said cell library is stored in a non-transitory computer readable medium and specifies a plurality of adaptive body biasing corners, each adaptive body biasing corner defining respective process, voltage, temperature, and body biasing voltage parameters; adding adaptive body biasing input/outputs (I/Os) to a layout of an integrated circuit design to implement said adaptive body biasing, wherein said adaptive body biasing I/Os are added during a bonding layout stage of said integrated circuit design flow; performing a floorplanning operation that includes adding at least one bias voltage source to the integrated circuit design layout by using a computer; performing an adaptive body biasing mesh layout operation; and performing a place and route operation configured to retrieve and utilize at least one of said plurality of adaptive body biasing corners from said cell library.