Patent ID: 6020764
Filing Date: 2000-02-01
Classification: H03K

Abstract:
Emitter coupled logic (ECL) circuitry comprising:an output means including an output terminal, an emitter-follower transistor having an emitter connected to said output terminal, and a load resistor connected between said output terminal and a potential Vtt;a differential amplifier means for receiving an input signal and a reference potential Vbb, and for causing said output means to charge a parasitic capacitor which is parasitic in said output means so that the output of said output means makes a transition to its high state, or discharge a charge stored in the parasitic capacitor to the potential Vtt by way of said load resistor so that the output of said output means makes a transition to its low state, according to whether or not the level of the input signal is larger than the reference potential Vbb; anda discharge switching means having a terminal connected to said output means and another terminal connected to a negative potential Vee, which can switch to its conductive state in response to a control signal from outside the ECL circuitry applied thereto so that the charge stored in the parasitic capacitor is also discharged to the negative potential Vee by way of said discharge switching means, as well as to the potential Vtt by way of said load resistor, when the output of said output means makes a transition from its high state to its low states;wherein said discharge switching means includes a resistor connected to the negative potential Vee, and a third terminal connected to said discharge switching means for receiving a threshold potential, and said discharge switching means can switch to its conductive state according to a difference between the level of the control signal and the threshold potential, so that the charge stored in the parasitic capacitor is also discharged to the negative potential Vee by way of said resistor of said discharge switching means.