Patent ID: 7192805
Filing Date: 2007-03-20
Classification: H01L

Abstract:
1. A semiconductor device manufacturing method comprising: arranging, on a base plate, (i) a plurality of semiconductor structures each of which includes: a semiconductor substrate, a plurality of external connection portions on an upper side of the semiconductor substrate, and a sealing film formed between the external connection portions, such that an upper surface of the sealing film is flush with upper surfaces of the external connection portions, and (ii) an insulating member such that the insulating member is located between adjacent semiconductor structures; providing an insulating film on the semiconductor structures and the insulating member; after providing the insulating film on the semiconductor structures and the insulating member, heating and pressing the insulating member arranged on the base plate to planarize an upper surface of the insulating member; forming, on the insulating film, a plurality of upper wirings each of which includes at least one layer having a connection pad portion, and each of which is connected to at least one of the external connection portions; and cutting the insulating film and the insulating member between the semiconductor structures to obtain individual semiconductor devices, including at least one semiconductor device in which at least one of the connection pad portions is arranged on a region corresponding to the insulating member formed on a side of the semiconductor structure.