Patent ID: 8136059
Filing Date: 2012-03-13
Classification: G06F

Abstract:
1. A computer-implemented method for resolving indeterminate states by inserting logic into a design, the computer-implemented method comprising: receiving, by a computer, an original design input from a requester to form a received original design input; determining, by the computer, whether an output pin in the received original design input is measured at an indeterminate output value; responsive to a determination that the output pin in the received original design input is measured at an indeterminate output value, generating, by the computer, a temporary design file from the received original design input that contains all inputs and a predetermined determinate output value to replace the indeterminate output value; updating, by the computer, the temporary design file by generating a first predetermined replacement value of “1” for all input combinations where an indeterminate value is measured on an original output and generating a second predetermined replacement value of “0” for all input combinations where a determinate value is measured on the original output; synthesizing, by the computer, the received original design input and the temporary design file to form a synthesized original design input and a synthesized temporary design file; merging, by the computer, the synthesized original design input with the synthesized temporary design file to form a final design; and returning, by the computer, the final design to the requester.