Patent ID: 6813740
Filing Date: 2004-11-02
Classification: G01R,G11C

Abstract:
A method for the testing of an electronic component wherein:a first signal is sent, with a first duration, with a first non-monotonic historical pattern, to a first cell of the component through an input of the first cell, a measurement of a second signal available on an output of the first cell is made, said second signal being represented by a second historical pattern of the first cell, the component is accepted if the second pattern conforms to an expected pattern, wherein the duration of the historical pattern of the first signal sent to the input of the first cell is reduced, a second signal of reduced duration on the output of the first cell is measured as, said second signal of reduced duration being represented by a second historical pattern of reduced duration of the first cell, and the component is accepted if said second historical pattern of reduced duration conforms to an expected pattern of reduced duration.