Patent ID: 6211739
Filing Date: 2001-04-03
Classification: H03L

Abstract:
A circuit comprising:a digitally controlled oscillator circuit configured to provide a first output signal having a first frequency of oscillation in response to one or more input signals;a comparator circuit configured (i) to receive said first output signal, (ii) to receive an external signal having a second frequency of oscillation and (iii) to present a second output signal having a first logic state when a difference in frequency between said first output and said external signal is greater than a predetermined value and a second logic state when said difference is less than said predetermined value; anda processor circuit configured to receive said second output signal from said comparator circuit, said processor configured to (i) control the first frequency of oscillation by adjusting said one or more input signals, (ii) adjust the first frequency of oscillation of said first output signal by performing an interrupt routine executed by said processor when said second output signal is at said second logic state and (iii) not adjust the first frequency of oscillation of said first output signal when said second output signal is at said first logic state.