Patent ID: 9106249
Filing Date: 2015-08-11
Classification: H03M

Abstract:
1. A method for calibration of an analog-to-digital converter (ADC) including a plurality of sub-ADCs, comprising: selecting a reference sub-ADC from the plurality of sub-ADCs based on a non-zero input signal applied to each sub-ADC, a corresponding output signal from each sub-ADC, and a stored value; applying a calibration signal to an input node of each sub-ADC of the plurality of sub-ADCs, other than the reference ADC; for each sub-ADC of the plurality of sub-ADCs, other than the reference ADC, generating a corresponding error signal based on output signals of the sub-ADC and a reference sub-ADC; and calibrating each sub-ADC of the plurality of ADCs, other than the reference ADC, based on the corresponding error signal.