Patent ID: 8913362
Filing Date: 2014-12-16
Classification: H01L

Abstract:
1. A circuit comprising: a first transistor comprising a first current terminal, a second current terminal, and a gate terminal, the first transistor having a first operational voltage level and the first current terminal coupled to an output terminal to provide an output signal; a second transistor comprising a first current terminal, a second current terminal, and a gate terminal, the first current terminal of the second transistor coupled to the second current terminal of the first transistor, the second transistor having a second operational voltage level lower than the first operational voltage level and the gate terminal coupled to an input terminal to receive an input signal; a first series of one or more diodes connected in series between the first current terminal and the second current terminal of the second transistor, a first diode of the first series having an anode terminal coupled to the first current terminal of the second transistor and a last diode of the first series having a cathode terminal coupled to the second current terminal of the second transistor; a second series of one or more diodes connected between the gate terminal of the second transistor and the second current terminal of the second transistor, a first diode of the second series having an anode terminal coupled to the gate terminal of the second transistor and a last diode of the second series having a cathode terminal coupled to the second current terminal of the second transistor; and a third series of one or more diodes connected between the gate terminal of the second transistor and the second current terminal of the second transistor, a first diode of the third series having an anode terminal coupled to second current terminal of the second transistor and a last diode of the third series having a cathode terminal coupled to the gate terminal of the second transistor.