Patent ID: 7350079
Filing Date: 2008-03-25
Classification: G06F,G06Q,H04L

Abstract:
1. An apparatus comprising: at least one processor; a memory coupled to the at least one processor; a first program residing in the memory; a second program residing in the memory; a third program residing in the memory; a dynamic key generation mechanism that dynamically generates public/private key pairs; and an inter-program authentication mechanism that authenticates the first program to the second program using a first authentication token that is digitally signed by the first program using a private key that is dynamically generated by the dynamic key generation mechanism, that authenticates the second program to the first program, if required, by digitally signing the first authentication token using a private key corresponding to the second program to generate therefrom a second authentication token, and returning the second authentication token to the first program, and that authenticates the second program to the third program by generating a third authentication token from the first authentication token received from the first program, and sending the third authentication token to the third program.