Patent ID: 6091266
Filing Date: 2000-07-18
Classification: H03K

Abstract:
A circuit arrangement for a digital circuit using differential logic, for use with a power supply, comprising a plurality of cascade-connected switching stages (1, 2, 3) consisting of parallel-connected current paths (I1, I2), characterized in that at least one of the switching stages (12) is connected in series with another switching stage (3) of the plurality of switching stages with respect to the power supply, but is connected purely in cascade with respect to information transfer, the connecting in series accompanied by creating a virtual ground and by re-proportioning the at least one of the series-connected switching stages compared to its proportioning when used in a purely parallel connection, whereby the number of parallel-connected current paths is reduced compared to the number of parallel-connected current paths with the same plurality of switching stages all connected in parallel, and the overall power consumed by the plurality of switching stages is also reduced compared to the overall power consumed by the same plurality of switching stages when all connected in parallel with respect to the same power supply and with the same magnitudes of the supply voltages (V.sub.cc, V.sub.ee), the input voltages (inp, inn), and the output voltages (outp, outn).