Patent ID: 7808089
Filing Date: 2010-10-05
Classification: H01L

Abstract:
1. A semiconductor package comprising: a leadframe having a die attach pad and a plurality of contact leads, the die attach pad having a top surface and a bottom surface and recessed regions in the top surface of the die attach pad that define a multiplicity of pedestals supported by a web, each pedestal having a top surface, the top surfaces of the multiplicity of pedestals being substantially co-planar, there being gaps between adjacent pedestals; a die mounted on the die attach pad such that the die is supported by at least a plurality of the pedestals, wherein selected edge regions of the die are arranged to overlie recessed regions of the die attach pad, the die being electrically connected to at least some of the contact leads; an adhesive that secures the die to the die attach pad, wherein the adhesive is arranged to secure the die to the pedestals that support the die and to the web, wherein the thickness of the adhesive between the web and the die is greater than the thickness of the adhesive between the die and the top surfaces of the pedestals that support the die and wherein the thickness of the adhesive between the edge regions of the die and the web is greater than the thickness of the adhesive between the die and the top surfaces of the pedestals that underlie the die; and an encapsulant that encapsulates the die and at least a portion of the die attach pad.