Patent ID: 6037018
Filing Date: 2000-03-14
Classification: C23C,H01L

Abstract:
A method of fabricating a HDPCVD oxide filled shallow trench isolation comprising the steps of:a) forming a pad oxide layer over a semiconductor substrate;b) forming a barrier layer over said pad oxide layer;c) forming a trench in said semiconductor substrate through said pad oxide layer and said barrier layer; said trench having sidewalls and a bottom;d) forming a thermal oxide layer over said sidewalls and said bottom of said trench;e) forming a protective liner layer on said thermal oxide layer and over said barrier layer; said protective liner layer being composed of silicon oxide formed by an O.sub.3 -TEOS process at a temperature between 400 and 560.degree. C.;f) forming an oxide layer using a HDPCVD process over said protective liner layer filling said trench.