Patent ID: 6963890
Filing Date: 2005-11-08
Classification: H03H

Abstract:
1. A hardware-reconfigurable digital filter having multiple filtering modes, comprising: logic circuitry adapted to process data corresponding to input data, the logic circuitry including logically arrayed in an X-by-Y logical array of registers for supporting at least one first filtering mode using the registers arranged in a linear configuration which at least two rows of the logical array of registers are coupled together to form a single linear shift register and for supporting at least one second filtering mode using the registers arranged nonlinearly in a configuration different than said linear configuration, wherein each of X and Y is at least 2; computational circuitry adapted to perform computations responsive to the logic circuitry and including at least Y multiplication logic circuits and at least Y addition logic circuits; and mode selection circuitry adapted to switch the digital filter between the multiple filtering modes.