Patent ID: 6720903
Filing Date: 2004-04-13
Classification: H03M

Abstract:
A method of operating an SAR-type analog-to-digital converter to match a dynamic range of an input voltage signal to be converted with a full scale range of the converter, the converter including an array of binary weighted capacitors, the method comprising the steps of:obtaining a digital gain code which represents a ratio between the full scale range and the dynamic range of the voltage signal to be converted, the gain code comprising a binary digital code having bits with binary weights; applying the voltage signal to be converted to the capacitor array, so as to charge with the voltage signal to be converted only those array capacitors having binary weights identical to the binary weights of the bits of the gain code that have a selected binary value; and selectively coupling the capacitors of the array to either one of first and second predetermined reference voltage terminals according to an SAR technique to obtain an output digital code corresponding to the input voltage signal; wherein the binary digital code is generated from the following, expression: GainCode=bin[(FSRVINmax)&CenterDot;2N-1](1)where N is the resolution bit number of the converter, bin is the function that converts in binary form the real value within the square brackets, previously approximated to the closes integer, FSR is the full scale range of the converter, and VINmax represents the dynamic range of the input signal voltage to be converted.