Patent ID: 6913962
Filing Date: 2005-07-05
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device including at least two MISFETs, one of which is a P-type MISFET and the other of which is an N-type MISFET, the method comprising: forming a buried insulating film in a semiconductor substrate; forming MISFETs isolated by the buried insulating film; cleaning a surface side of the semiconductor substrate with a cleaning solution; covering a surface side of the buried insulating film with a protective film before cleaning the surface side of the semiconductor substrate, wherein the protective film is resistant to the cleaning solution and the protective film is formed so as to cover a portion of a diffusion region of the P-type MISFET and a portion of a diffusion region of the N-type MISFET; and forming a wiring layer which is formed on the protective film and which electrically connects the diffusion region of the P-type MISFET and the diffusion region of the N-type MISFET.