Patent ID: 6643285
Filing Date: 2003-11-04
Classification: H04L

Abstract:
A packet switch comprising a switching unit (SU) for switching packets between network links, and a computing unit (CU) connected to the SU through a network link for implementing software control functions over the SU, wherein the SU comprises a plurality of functional components that are interconnected by generic buses, and wherein the components communicate with one another using program data units (PDUs) that are formatted and transmitted according to a shared device protocol;wherein PDUs are placed in bus frames that are passed from component to component, wherein information is exchanged between the components by adding information to or dropping information from fields that comprise the PDUs, or by concatenating new fields to the PDUs, as the frames pass from component to component, and wherein a shared device protocol is implemented that allows all components to usefully perform the passing, adding, dropping and concatenating functions; and wherein each component is implemented on a function-specific part of a chip, and wherein the device protocol is implemented on another part of the chip, said other part providing an interface between the buses and the function specific part of the chip, and hereinafter being called an encapsulating logic ring (ELR).