Patent ID: 9070753
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A method for fabricating a memory device, comprising: providing a substrate, wherein the substrate has a first region and a second region; forming a stack layer on the substrate in the first region and the second region, wherein the stack layer comprises a storage layer, a first conductive layer, and a first mask layer; patterning the stack layer to form a plurality of first patterned stack layers, wherein the first patterned stack layers extend along a first direction and from the first region to the second region, and openings are respectively disposed at two sides of each of the first patterned stack layers; forming a filling layer on the substrate, wherein the filling layer fills into the openings; forming a second mask layer on the first region of the substrate, wherein the second mask layer does not cover the filling layer in the second region; and using the filling layer as mask, removing the first patterned stack layers and part of the substrate in the second region, so as to form a plurality of trenches in the substrate in the second region.