Patent ID: 8003470
Filing Date: 2011-08-23
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: forming a first gate electrode and a second gate electrode over a semiconductor body, the first and second gate electrodes being electrically insulated from the semiconductor body; forming a first sidewall spacer along a sidewall of the first gate electrode and a second sidewall spacer along a sidewall of the second gate electrode; forming first and second sacrificial sidewall spacers, the first sacrificial sidewall spacer adjacent the first sidewall spacer, and the second sacrificial sidewall spacer adjacent the second sidewall spacer, wherein the first and second sacrificial sidewall spacers and the first and second sidewall spacers are formed above the semiconductor body; forming a planarization layer over the semiconductor body such that a portion of the planarization layer is adjacent the first and second sacrificial sidewall spacers; removing the first and second sacrificial sidewall spacers to expose a region of the semiconductor body; etching the exposed region of the semiconductor body to form first and second recesses; and forming a semiconductor material in the first and second recesses.