Patent ID: 6067603
Filing Date: 2000-05-23
Classification: G06F

Abstract:
A computer system, comprising:a node interconnect; andat least a first processing node and a second processing node that are each coupled to said node interconnect, said first and said second processing nodes each including a local interconnect, a processor coupled to said local interconnect, a system memory coupled to said local interconnect, and a node controller interposed between said local interconnect and said node interconnect, said node controller of said second processing node having a directory that records remote states of data from the system memory of the second processing node which are held at other processing nodes, wherein the node controller of said first processing node, responsive to receipt of a request transaction including an address on said local interconnect of said first processing node, decodes said address to identify said second processing node as a target and then speculatively transmits said request transaction to said second processing node via said node interconnect prior to receipt of a local combined coherency response, wherein said node controller of said second processing node handles said speculatively transmitted request transaction according to a state in said directory of a datum identified by said address.