Patent ID: 6239466
Filing Date: 2001-05-29
Classification: H01L

Abstract:
An IGBT suitable for ZVS operation, comprising:a MOSFET portion comprising a gate, a source and an IGBT collector; and a BJT portion comprising an emitter, a base, and a BJT collector;the gate, source, base and emitter being situated on one side of the IGBT opposite to another side having the IGBT collector situated thereon with an N- drift layer situated therebetween;the IGBT collector comprising a P+ layer which is relatively thin with respect to the thickness of the drift layer, the P+ layer being doped in a predetermined amount such as to minimize forward voltage drop without substantially increasing total charge stored in the drift layer;an N+ buffer layer situated between the P+ layer and the drift layer, the buffer layer being relatively thin with respect to the drift layer;the drift layer having localized lifetime killers at the edge of the P+/N- BJT collector interface, no lifetime killers being situated in the interior of the drift layer beyond the edge thereof; andP+ diverter regions situated at predetermined locations in the N+ buffer layers for reducing a number of minority carriers stored in the N- drift layer at both turn on and turn off of the IGBT.