Patent ID: 6393498
Filing Date: 2002-05-21
Classification: G06F

Abstract:
A data-processing system comprising:a memory device having first physical storage locations and second physical storage locations; a first peripheral device for accessing the memory device by a first set of addresses dedicated to the first peripheral device; a second peripheral device for accessing the memory device by a second set of addresses dedicated to the second peripheral device; and a system controller, coupled to the memory device, the first peripheral device and the second peripheral device, for mapping the first set of the addresses dedicated to the first peripheral device to the first physical storage locations and mapping the second set of the addresses dedicated to the second peripheral device to the second physical storage locations in a first mode, the system controller being switched to a second mode in which the second set of the addresses dedicated the second peripheral device is mapped to the first physical storage locations in response to a first control signal; wherein the first control signal is activated in response to the case that the first peripheral device finishes writing data to the first physical storage locations; and the second peripheral device reads the data written by the first peripheral device from the first physical storage locations in the second mode.