Patent ID: 9075106
Filing Date: 2015-07-07
Classification: G01R

Abstract:
1. A method comprising: obtaining a light emission map of a circuit to be tested for alterations; obtaining a light emission map of a reference circuit; and comparing an image of said light emission map of said circuit to be tested with an image of said light emission map of said reference circuit, to determine presence of said alterations; wherein said comparing step comprises at least one of performing image processing to subtract the image of said light emission map of said circuit to be tested from the image of said light emission map of said reference circuit, performing image processing to differentiate the image of said light emission map of said circuit to be tested from the image of said light emission map of said reference circuit, and performing image processing to apply a two-dimensional correlation function to correlate the image of said light emission map of said circuit to be tested and the image of said light emission map of said reference circuit; wherein said light emission map of said reference circuit is obtained by simulation; wherein said simulation comprises: calculating a leakage current for each of a plurality of devices of said reference circuit, based on a layout database and a state vector; dividing said reference circuit into a plurality of sub-Nyquist tiles; summing said leakage current for each of said devices in each given one of said sub-Nyquist tiles to obtain a resultant grid; and oversampling said resultant grid, wherein said oversampling comprises convolving an oversampling window with said sub-Nyquist tiles to provide smoothing; and wherein said step of obtaining said light emission map of said circuit to be tested, said step of obtaining said light emission map of said reference circuit, and said step of comparing are performed by one or more hardware devices including a memory and at least one processor, coupled to said memory.