Patent ID: 6111440
Filing Date: 2000-08-29
Classification: H03K

Abstract:
A circuit for generating multiple ramped voltage signals at output nodes such that each of the ramped voltage signals has a controlled maximum amplitude, the circuit including:multiple channels, each of the channels including at least one capacitor coupled to one of the output nodes, wherein the at least one capacitor is configured to be charged and discharged in controlled fashion so as to produce one of the ramped voltage signals at said one of the output nodes, so that each of the channels produces a different one of the ramped voltage signals at a different one of the output nodes;a feedback branch having a first input coupled to receive a reference signal and a second input for receiving a selected one of the ramped voltage signals, wherein the reference signal has a level indicative of a preselected maximum amplitude for the ramped voltage signals, and wherein the feedback branch is configured to produce a correction current whose magnitude depends on the difference between the level of the reference signal and a level of the selected one of the ramped voltage signals; andtime division multiplexing circuitry, coupled between the feedback branch and the output nodes, and configured to connect the output nodes sequentially to the second input of the feedback branch and to enable flow of the correction current between the feedback branch and each of the channels whose output node is connected to the second input of the feedback branch, whereby flow of the correction current causes said each of the channels to correct the amplitude of the ramped voltage signal produced thereby to reduce any difference between the amplitude of said ramped voltage signal and the preselected maximum amplitude.