Patent ID: 6467142
Filing Date: 2002-10-22
Classification: H01G,Y10T

Abstract:
A method of manufacturing chip capacitors comprising the steps of:preparing a terminal frame including a plurality of terminal section pairs arranged in rows and columns, each terminal section pair comprising a flat anode terminal section and a flat cathode terminal section disposed in the same plane with tip ends thereof facing each other with a predetermined spacing disposed therebetween; preparing a plurality of capacitor elements each having a cathode layer disposed on an outer surface thereof and having an anode lead extending therefrom; placing one of said capacitor elements in relation to each terminal section pair, connecting the anode lead of the capacitor element to one of opposing major surfaces of the anode terminal section of that terminal section pair, and connecting the cathode layer of the capacitor element to one of opposing major surfaces of the cathode terminal section of the same terminal section pair lying substantially in the same plane as said one major surface of the anode terminal section; coating said terminal frame and said capacitor elements placed thereon with a resin to encapsulate said capacitor elements therein, with at least a portion of the other major surface of each of said anode terminal sections exposed and with at least a portion of the other major surface of each of said cathode terminal sections exposed; and cutting said coated terminal frame and said capacitor elements coated with said resin so as to sever said anode terminal sections and said cathode terminal sections from said terminal frame.