Patent ID: 8134159
Filing Date: 2012-03-13
Classification: H01L,Y10S

Abstract:
1. A semiconductor device, comprising: a semiconductor layer formed on a semiconductor substrate; a gate electrode formed on the semiconductor layer via a gate insulating film; an impurity diffusion suppression layer formed between the semiconductor substrate and the semiconductor layer and including a C-containing Si-based crystal containing a first impurity including at least boron, the C-containing Si-based crystal being configured to suppress diffusion of a second impurity having a p-type conductivity type and to suppress generation of fixed charge in the C-containing Si-based crystal; and p-type source/drain regions formed in the semiconductor substrate, the impurity diffusion suppression layer and the semiconductor layer located on sides of the gate electrode, the p-type source/drain region having an extension region in the semiconductor layer and containing the second impurity.