Patent ID: 8222146
Filing Date: 2012-07-17
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: forming an lower wiring layer including a first insulating film and a Cu wiring which is formed in said first insulating film and includes copper; depositing a second insulating film on said first insulating film and said Cu wiring; depositing a third insulating film on said second insulating film; forming an upper hole in said second and third insulation films, said upper hole reaching said Cu wiring; performing a wet treatment to the upper hole to remove a residue of the second insulation film; after the performing the wet treatment, depositing a first barrier metal covering an inner wall surface of said upper hole; physically etching said first barrier metal and said Cu wiring which are present below said upper hole to form a lower hole in said Cu wiring, said lower hole narrowing gradually from an upper portion of said lower hole to a lower portion of said lower hole, said upper hole formed over said lower hole; depositing a second barrier metal along an inner wall surface of the first barrier metal and an inner wall surface of the lower hole; and depositing a conductive film containing copper and filling said upper and lower holes, the conductive film formed on the second barrier metal.