Patent ID: 8937366
Filing Date: 2015-01-20
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising: providing a substrate; forming a nanotemplate structure comprising a plurality of dielectric nanoscale features defining a plurality of nanoscale windows over the substrate, the dielectric nanoscale features each having a top surface and side surfaces, a plurality of trenches being formed between the dielectric nanoscale features; and depositing an epitaxial layer within the trenches, the epitaxial layer coalescing over the top surface of the nanoscale features to form a continuous epitaxial layer over the dielectric nanotemplate structure, wherein the temperature of the substrate is maintained at a temperature that is sufficiently high during the depositing of the epitaxial layer so that air gaps are formed between at least the top surface of the dielectric nanoscale features and the epitaxial layer.