Patent ID: 6760346
Filing Date: 2004-07-06
Classification: H04L,H04Q

Abstract:
A packet switching network comprising:a plurality of sending nodes; a plurality of receiving nodes; and a packet switch for switching packets from the sending nodes to the receiving nodes, wherein the sending nodes send the packet switch packets each having a guard time added thereto and the receiving nodes receive the packets from the packet switch, each of the sending nodes comprising: a delay controller for adjusting an amount of delay of a packet to be sent so that the network operates in synchronization with the switch timing of the packet switch; whereineach of the receiving nodes comprises: a switch timing detector for detecting switch timing of the packet switch based on a serial signal received from the packet switch; a packet head detector for detecting head receive timing of a packet based on a packet synchronization pattern included in the packet received from the packet switch, and a time difference detector for detecting a time difference between the switch timing and the head receive timing, wherein the delay controller changes the amount of delay of a packet to be sent depending on the time difference; wherein the switch timing detector detects the switch timing of the packet switch by determining a change in timing of the serial signal between a first predetermined bit pattern and a second predetermined bit pattern; wherein first and second sending nodes send the first and second predetermined bit patterns, respectively, and the packet switch alternately switches the first and second predetermined bit patterns from the first and second sending nodes to a receiving node; wherein the switch timing detector of the receiving node detects the switching timing of the packet switch by detecting a change in bit pattern between the first and second predetermined bit patterns.