Patent ID: 9183925
Filing Date: 2015-11-10
Classification: G11C

Abstract:
1. A nonvolatile memory device, comprising: a memory cell having a variable resistance element which is changed to a resistance state which is reversibly changeable according to an electrical pulse, the change being caused by application of a forming voltage to the memory cell; a voltage application unit configured to apply the forming voltage to the memory cell; a reading unit configured to read resistance value information on the memory cell; a memory unit configured to store the resistance value information read by the reading unit as initial resistance value information before the forming voltage is applied to the memory cell, the resistance value information being read from the memory cell; a control unit configured to control the voltage application unit and the reading unit to cause the voltage application unit to repeat application of the forming voltage to the memory cell and to cause the reading unit to repeat reading of the resistance value information on the memory cell until the resistance value information on the memory cell read by the reading unit satisfies a condition which is set based on the initial resistance value information; and a calculation unit configured to output calculated resistance value information which is obtained by multiplying the initial resistance value information by a predetermined coefficient, wherein the control unit is configured to control the voltage application unit and the reading unit to cause the voltage application unit to repeat application of the forming voltage to the memory cell and to cause the reading unit to repeat reading of the resistance value information on the memory cell until a resistance value indicated by the resistance value information on the memory cell read by the reading unit becomes lower than a resistance value indicated by the calculated resistance value information.