Patent ID: 6724031
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A dynamic random access memory cell comprising:a trench capacitor formed in a silicon substrate; a vertical metal-oxide-silicon field effect transistor formed in said silicon substrate above said trench capacitor, said vertical metal-oxide-silicon field effect transistor having a gate electrode, a first source/drain region extending from a surface of said silicon substrate into said silicon substrate, a buried second source/drain region electrically contacting said trench capacitor, a channel region formed in said silicon substrate between said first source/drain region and said buried second source/drain region and a gate oxide layer disposed between said gate electrode and said channel region; said first source/drain region also belonging to an adjacent vertical metal-oxide-silicon field effect transistor, said adjacent vertical metal-oxide-silicon field effect transistor having a buried third source/drain region electrically connected to an adjacent trench capacitor, said buried second and third source/drain regions extending toward one another; and a punch through prevention region disposed between said buried second and third source/drain regions.