Patent ID: 6028782
Filing Date: 2000-02-22
Classification: G11C

Abstract:
A ferroelectric memory device having stored data comprising a memory cell transistor having a gate connected to a word line and a drain connected to a bit line, a ferroelectric capacitor storing data having a first electrode connected to a cell plate and a second electrode connected to a source of the memory cell transistor, and potential changing means connected to the bit line,wherein a series of operations for transferring the cell plate from a first potential to a second potential and further transferring from the second potential to the first potential is carried out at least once, and then the potential of the bit line is changed to a specified value by the potential changing means, and then the specified value is read out, andwherein whether the operation for changing to the specified value is done after the series of operation of the cell plate, or after transferring the cell plate from the first potential to the second potential is determined by the value of the bit line capacity and the specified supply voltage value of the ferroelectric memory device.