Patent ID: 6576543
Filing Date: 2003-06-10
Classification: H01L

Abstract:
A method for selectively depositing a silicided metal nitride diffusion barrier layer in a semiconductor structure to reduce an electrical contact resistance with respect to an underlying copper layer while maintaining a copper diffusion resistance along the semiconductor feature sidewalls comprising the steps of:providing at least one anisotropically etched opening extending through at least one insulating layer and in closed communication with a copper underlayer; depositing a metal nitride layer over the at least one anisotropically etched opening according to a CVD process under conditions such that the metal nitride layer has a relatively higher deposition rate onto sidewalls of the at least one anisotropically etched opening for a period of time compared to a deposition rate over the copper underlayer; and, exposing the metal nitride layer to a silicon containing gaseous ambient under conditions such that silicon is incorporated into the metal nitride layer to form a silicided metal nitride layer having a thickness over the copper underlayer thinner by about 10 Angstroms to about 60 Angstroms compared to a sidewall thickness.