Patent ID: 7242338
Filing Date: 2007-07-10
Classification: H03M

Abstract:
1. An apparatus, comprising: a first segment comprising a first and second ladders and having a differential input, wherein the first and second ladders comprise R2R ladders; a second segment coupled to said first segment and having a differential output, wherein said second segment comprises a 2R pair array, wherein a ratio of bits for the second segment to bits for the first segment is at least 4/6, and wherein the 2R pair array of the second segment differs from an R2R ladder in that glitch energy may be reduced compared to the R2R ladder by sharing matching among 2B resistors of the second segment instead of a single resistor, where B is the number of bits of the second segment; and at least one or more switches coupled between said first and second ladders to switch between said first and second ladders; wherein a differential digital signal received at the differential input is converted to a differential analog signal at the differential output.