Patent ID: 6121659
Filing Date: 2000-09-19
Classification: H01L

Abstract:
A semiconductor circuit comprising:(a) an active layer doped with impurities to form a plurality of devices;(b) a conductive substrate having a first volume doped with a first dopant and a second volume doped with a second dopant, said first volume for providing power at a power voltage level to at least some of said plurality of devices in said active layer, said second volume for providing a ground for at least some of said plurality of devices in said active layer;(c) an insulator layer disposed between said active layer and said conductive substrate;(d) a plurality of first conductors electrically connecting at least some of said plurality of devices to said first volume, said plurality of first conductors providing power to at least some of said plurality of devices from said first volume; and(e) a plurality of second conductors electrically connecting at least some of said plurality of devices to said second volume, said plurality of second conductors providing a ground for at least some of said plurality of devices.