Patent ID: 6740936
Filing Date: 2004-05-25
Classification: H01L

Abstract:
A transistor with ballast resistor comprising:a substrate in which are formed a source and a drain, the source and drain being separated by a channel region; a gate positioned above and electrically separated from the channel region; and a drain contact electrically connected to the drain at a location separated from the channel region; wherein the ballast resistor is formed from a source/drain (S/D) implant and a lightly doped drain (LDD) implant formed on top of the S/D implant, the LDD implant being less doped than the S/D imDlant, the LDD implant extending continuously from the channel to the drain contact, and the S/D implant extending between the channel and the drain contact but being discontinuous in at least one place between the channel and the drain contact.