Patent ID: 7492179
Filing Date: 2009-02-17
Classification: G01R,G11C

Abstract:
1. A method of testing dies on semiconductor wafers, the method comprising: testing all dies on a test wafer set, wherein dies that fail the testing are categorized into BINs corresponding to a reason the dies failed the testing; retesting all the dies that failed the testing in order to identify all dies that pass the retesting within each BIN; calculating a recovery rate for each BIN based on the identified dies in each BIN that pass the retesting versus all the dies retested; determining a reprobe rate for each BIN based on a time taken for retesting dies in a certain BIN versus a total time for retesting all the dies that failed the testing; establishing a threshold recovery rate per reprobe rate; identifying BINs having a recovery rate per reprobe rate exceeding the threshold; testing all dies on non-test wafers, wherein dies that fail the testing are categorized into the corresponding BINs; and retesting only the dies on the non-test wafers categorized into the identified BINs such that dies in BINs comprising a recovery rate greater than the threshold per a reprobe rate faster than the threshold are retested.