Patent ID: 8952513
Filing Date: 2015-02-10
Classification: H01L

Abstract:
1. A stack type semiconductor package comprising: a lower semiconductor package comprising: a circuit board, a semiconductor chip which is disposed on an upper surface of the circuit board, via-pads which are arrayed on the upper surface of the circuit board around the semiconductor chip, and an encapsulation layer which encapsulates the upper surface of the circuit board and has via-holes through which the via-pads are exposed; and an upper semiconductor package which is stacked on the encapsulation layer, is electrically connected to the lower semiconductor package, and comprises internal connection terminals which are formed on a lower surface of the upper semiconductor package. wherein the stack type semiconductor package further comprises redistribution layers which are electrically connected to and contacting the via-pads through the via-holes and are electrically connected to and contacting the internal connection terminals, and wherein the redistribution layers are formed to protrude inside the via-holes and contact sidewalls of the via-holes.