Patent ID: 7589401
Filing Date: 2009-09-15
Classification: H01L,H05K

Abstract:
1. A hermetically sealed electronics packaging architecture comprising: a generally hollow housing body, made of a first material that is electrically conductive and has a relatively low coefficient of thermal expansion (CTE), and having a relatively thin wall upon which heat-generating electronic circuit components are supported and through which heat generated by said components is to be extracted; and an auxiliary, heat-dissipating, insert, having a top surface that is configured to support said heat-generating electronic circuit components, and being made of a second material, different from said first material, and having a relatively high electrical and thermal conductivity, and having a relatively low coefficient of thermal expansion that is approximate to that of said first material, and having a bottom surface that effectively conforms with an interior surface of said wall of said housing body, and being compressed thereagainst by way of fittings, that are retained in apertures through said wall of said housing body and are hermetically sealed against an exterior surface of said wall of said housing body, whereby thermal energy emanating from electronic circuit components supported on said top surface of said insert is dispersed through said insert and said wall of said housing body, and radiates out said exterior surface of said housing body, thereby cooling said electronic circuit components.