Patent ID: 8352661
Filing Date: 2013-01-08
Classification: G06F,H05K

Abstract:
1. A data storage system comprising: a pair of CPU modules, each one of the modules having a port coupled to a host computer/server and a storage medium, for transferring user data between the host computer/server and the storage medium during an IO transfer, each one of the modules producing a plurality of different types of reset signals, one of such types of reset signals being a software reset signal produced during a software upgrade of the module and other types being produced for events other than during a software upgrade of the module; and wherein, said other types of the reset signals produced by a first one of the pair of modules disables the first one of the modules whereas, in response to the software reset signal produced by the first one of the modules during an IO transfer being performed by the first one of the pair of modules, a second one of the pair of modules, in response to the software reset signal produced by the first one of the pair of modules, couples the port of the first one of the pair of modules to the second one of the pair of modules to enable the IO transfer to be processed by the second one of the pair of modules; and wherein the microcontroller of the first one of the CPU modules inhibits such output reset output signal from passing to the IO controller of the first one of the CPU modules and switch of the first one of the CPU modules.