Patent ID: 8964468
Filing Date: 2015-02-24
Classification: G11C

Abstract:
1. A method of operating a data storage system comprising a controller including a volatile buffer memory, and a non-volatile memory including a memory cell array divided into a first region and a second region, the method comprising: receiving first data in the volatile buffer memory and programming the first data to the first region using a buffer program operation and receiving second data in the volatile buffer memory and programming the second data to the first region using the buffer program operation and receiving third data in the volatile buffer memory and programming the third data to the first region using the buffer program operation; and programming first multi-level memory cells (MLC) connected to a first word line in the second region with at least two of the first data, the second data and third data stored in the first region using a main program operation; then programming second MLC connected to a second word line in the second region using the main program operation; and then, reprogramming the first MLC with the first data, the second data, and the third data stored in the first region using the main program operation, wherein respective threshold voltage distributions for the first MLC are narrowed between the programming and the reprogramming of the first MLC; and then again reprogramming the first MLC with the first data, the second data, and the third data stored in the first region using the main program operation, wherein the respective threshold voltage distributions for the first MLC are further narrowed between reprogramming and again reprogramming of the first MLC, wherein the buffer program operation uses a single bit program scheme to program a bit into each memory cell, and wherein the volatile buffer memory and the non-volatile memory are formed on different dies.