Patent ID: 6309959
Filing Date: 2001-10-30
Classification: H01L

Abstract:
A method for filling an interconnect opening of an integrated circuit, said interconnect opening being within an insulating layer on a semiconductor wafer, the method including the steps of:A. depositing a seed layer of a first conductive material conformally onto sidewalls and a bottom wall of said interconnect opening;B. filling said interconnect opening with a second conductive material by growing said second conductive material from said seed layer to form a conductive fill of said first conductive material and said second conductive material within said interconnect opening;wherein said first conductive material and said second conductive material are comprised of a bulk metal;and wherein at least one of said first conductive material and said second conductive material is a metal alloy having an alloy dopant in said bulk metal;C. polishing away said first conductive material and said second conductive material from said insulating layer surrounding said interconnect opening such that said conductive fill is contained within said interconnect opening;D. performing a plasma treatment process by placing said semiconductor wafer within a plasma reaction chamber with a reducing agent to remove any native metal oxide or native metal hydroxide from a top surface of said conductive fill;E. forming a layer of bulk passivation material over said top surface of said conductive fill in a PVD (plasma vapor deposition) process while said semiconductor wafer is placed within said plasma reaction chamber after said step D; andF. performing an anneal by heating up said semiconductor wafer after said step E such that said alloy dopant of said conductive fill segregates out of said conductive fill to said top surface of said conductive fill to form an intermetallic compound from a reaction of said alloy dopant with said bulk metal at an interface between said layer of bulk passivation material and said top surface said conductive fill;wherein said intermetallic compound is formed with said conductive fill being exposed to substantially zero oxygen since said layer of bulk passivation material covers said conductive fill during said anneal of said step F;and wherein said intermetallic compound is formed to be self-aligned over substantially only said top surface of said conductive fill to prevent drift of said bulk metal of said conductive fill along a bottom surface of said layer of bulk passivation material.