Patent ID: 7248121
Filing Date: 2007-07-24
Classification: H03L,Y10S

Abstract:
1. A variable lock-in circuit for enabling any phase-locked loop including a filter to be locked according to schedule, comprising: a feedback line connected to an output and an input of the variable lock-in circuit and also coupled to an output of a filter; a sensor for sensing a voltage at the output, comparing with a midpoint voltage decided by device aspect ratios of the sensor, and providing its corresponding response; an N-bit binary-weighted triggering circuit array with a base triggering transistor for generating a current corresponding to both an N-bit digital input and an output of the sensor; a base triggering transistor for generating a base current corresponding to only an output of the sensor; a current mirror for receiving a total current and providing the total current to the filter output until a voltage at the filter output reaches the midpoint voltage according to schedule; and a current source coupled to the current mirror and the filter output.