Patent ID: 6544839
Filing Date: 2003-04-08
Classification: H01L

Abstract:
A method of manufacturing a semiconductor integrated circuit device comprising the steps of:(a) forming a first silicon oxide film on the surface of a substrate made from monocrystal silicon by thermally oxidizing the substrate and then an oxidation resistant film on the first silicon oxide film, and selectively exposing the surface of the substrate by etching the oxidation resistant film and the first silicon oxide film of an element isolation region; (b) recessing the end of the first silicon oxide film inward more than the end of the oxidation resistant film after step (a); (c) forming a second silicon oxide film having a thickness larger than that of the first silicon oxide film on the surface of the substrate which is exposed after the above step (b) by thermally oxidizing the substrate; (d) exposing the surface of the substrate in the element isolation region by etching the second silicon oxide film; (e) forming a trench in the substrate of the element isolation region by etching the substrate exposed in the above step (d) and forming a third silicon oxide film on the inner wall of the trench by thermally oxidizing the substrate; (f) forming a fourth silicon oxide film on the oxidation resistant film containing the inside of the trench and then an element isolation trench having the fourth silicon oxide film buried therein in the substrate of the element isolation region by polishing the fourth silicon oxide film using the oxidation resistant film as a stopper; (g) removing the oxidation resistant film and introducing an impurity into the substrate to control the threshold voltage of a MISFET; and (h) exposing the surface of the substrate by etching, and forming a gate insulating film on the surface of the substrate and further a gate electrode for the MISFET on the gate insulating film.