Patent ID: 9170773
Filing Date: 2015-10-27
Classification: G06F

Abstract:
1. A computer system configured to perform a mixed precision estimate, which avoids a need for a normalization and denormalization circuit, the system comprising: a processing circuit, the system configured to perform a method comprising: receiving, by the processing circuit, a floating-point input of a wide precision having a wide precision value; computing, by the processing circuit, a floating-point output of an estimate operation in an output exponent range corresponding to a narrow precision value based on the input having the wide precision value; based on the input having the wide precision value with an input exponent failing to adhere to a valid exponent range of a valid single precision value, generating a mantissa mask based on the input exponent to be applied to a mantissa of the output; generating, by the processing circuit, a formatted output by adding an additional exponent bit beyond eight exponent bits to account for the input exponent failing to adhere to the valid exponent range of the valid single precision value, and applying the mantissa mask to the mantissa of the output to reduce mantissa bits according to a degree in which the input exponent fails to adhere to the valid exponent range; and storing, by the processing circuit, the formatted output having the narrow precision value in a wide precision format register having an architected register storage format in a wide precision format, wherein the wide precision format register includes extra exponent bits compared to a narrow precision format register having an architected register storage format in a narrow precision format for storing the additional exponent bit.