Patent ID: 7800154
Filing Date: 2010-09-21
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a semiconductor substrate of a first conductivity type; a first well of the first conductivity type, which is formed in the semiconductor substrate; a plurality of memory cell transistors that are formed in the first well; a second well of a second conductivity type, which includes a first part that seamlessly surrounds a side region of the first well and a second part that surrounds a lower region of the first well, and electrically isolates the first well from the semiconductor substrate; a third well of the second conductivity type, which is formed in the semiconductor substrate and a bottom surface of the third well is in contact with the semiconductor substrate, the third well having a less depth than the second part of the second well; a fourth well of the first conductivity type that is formed to surround a side region of the first well via the semiconductor substrate region and seamlessly surround an upper region of a side region of the second well; and a first insulated-gate field-effect transistor which is formed on the semiconductor substrate, and including a gate insulation film with a thickness that is greater than a thickness of a gate insulation film of the memory cell transistor and is in a range between 16 nm and 50 nm, the gate insulation film being provided below the gate electrode, the first insulated-gate field-effect transistor on the semiconductor substrate being located on an opposite side of the second well, and wherein the fourth well is positioned between the first insulated-gate field-effect transistor and the second well.