Patent ID: 6128770
Filing Date: 2000-10-03
Classification: H03K

Abstract:
A programmable integrated circuit having a core and a surrounding periphery, said integrated circuit further comprising:(a) a plurality of programmably configurable logic blocks (CLB's) disposed within the core for carrying out program-defined logic functions;(b) a plurality of programmably configurable input/output blocks (IOB's) distributed about said periphery for providing input and output interfacing between components within the core and external circuits;(c) a programmably configurable interconnect network disposed within the core for providing program-defined routing of signals between the plurality of programmably configurable logic blocks (CLB's) and the plurality of programmable configurable input/output blocks (IOB's);wherein said programmably configurable interconnect network includes a plurality of relatively long lines extending within said core, each of said relatively long lines being continuous for a distance greater than the length of each of a majority of other continuous lines within the programmably configurable interconnect network; andwherein each distributed IOB is coupled to a respective first output acquiring means for selecting an output signal for output by the IOB, where the selected output signal is carried by a correspondingly selected one of a first group of plural ones of said long lines and where said first group of long lines extend generally perpendicularly relative to the portion of the periphery occupied by said IOB.