Patent ID: 6516366
Filing Date: 2003-02-04
Classification: G06F

Abstract:
An apparatus comprising:a first integrated circuit having a first serial port wherein said first serial port has only a first bidirectional pin; a system bus coupled to said first integrated circuit; a second integrated circuit having a second serial port wherein said second serial port has only a second bidirectional pin; a serial port input-output line connecting said first bidirectional pin to said second bidirectional pin, said serial port input-output line being a bidirectional line; wherein said second integrated circuit generates a second signal on said second bidirectional pin in response to a first signal from said first integrated circuit on said first bidirectional pin; wherein one of said first and second integrated circuits waits for a signal from the other of said first and second integrated circuits; wherein said first serial port further comprises an internal circuit having a logic element, a parallel bus and a serial port input-output bus coupled to said system bus, said serial port input-output bus comprising a plurality of serial port command lines; wherein in response to a signal on at least one of said serial port command lines, said internal circuit uses said logic element to selectively drive a parallel signal on said parallel bus.