Patent ID: 7427893
Filing Date: 2008-09-23
Classification: H03F

Abstract:
1. A power mode control circuit for a class-D amplifier, comprising: an amplitude detector for providing an amplitude signal according to the absolute signal level of an input signal, wherein the amplitude signal is at a high state when the absolute signal level of the input signal is greater than a first reference voltage and is at a low state when the absolute signal level is smaller than the first reference voltage; and a duration detector for providing a shut-down signal to a switching control circuit of the class-D amplifier according to the length of the time period in which the amplitude signal is at the low state, wherein the shut-down signal is at the high state when the amplitude signal is at the low state for more than a predetermined time period, otherwise the shut-down signal is at the low state, and the switching control circuit is turned off when the shut-down signal is at the high state and is turned on when the shut-down signal is at the low state.