Patent ID: 7892977
Filing Date: 2011-02-22
Classification: H01L,Y10S

Abstract:
1. A method for forming hard mask patterns of a semiconductor device, the method comprising: forming a first layer over a semiconductor substrate; patterning the first layer, thereby forming first hard mask patterns each of which has a line shape, wherein a space is defined between the first hard mask patterns; forming a first auxiliary layer along surface of a resulting structure after forming the first hard mask patterns; forming a second layer over the first auxiliary layer; forming photoresist patterns each of which has a line shape over the second layer, wherein the photoresist patterns are perpendicular to the first hard mask patterns; removing the second layer exposed by the photoresist patterns to expose the first auxiliary layer and such that the second layer remains within the space between the first hard mask patterns, thereby forming a second hard mask pattern having first line portions perpendicular to the first hard mask patterns and second line portions which are positioned between the first hard mask patterns and are parallel to the first hard mask patterns, wherein a space is defined between the first line portions; removing the photoresist patterns; forming a second auxiliary layer along surface of a resulting structure after removing the photoresist patterns; forming a third layer over the second auxiliary layer; removing the third layer to expose the second auxiliary layer such that the third layer remains within the space between the first line portions, thereby forming third hard mask patterns parallel to the first line portions, wherein a space is defined between the third hard mask patterns; and removing the first and second auxiliary layers exposed by an overlap of the space between the third hard mask patterns and the space between the first line portions, thereby exposing contact areas arranged in a two-dimensional pattern.