Patent ID: 9069692
Filing Date: 2015-06-30
Classification: G06F,H03M

Abstract:
1. A method of a fully parallel encoding of a memory system, the memory system comprising a memory cell, a writing circuit, a fully parallel encoder and a decoder, the method comprising the steps of: factorizing a generator polynomial into a plurality of minimal polynomials for the fully parallel encoder of the memory system; deriving the plurality of roots from the minimal polynomials; generating an encoding matrix from the plurality of roots; factorizing the encoding matrix into a plurality of factorized matrices, wherein one of the plurality of factorized matrices is a sub-matrix of a parity check matrix, the parity check matrix corresponding to a hardware circuit of a syndrome calculator of the decoder, the one of the plurality of factorized matrices corresponding to a portion of the hardware circuit; encoding a codeword by the fully parallel encoder using the portion of the hardware circuit; and transmitting the codeword to the memory cell via the writing circuit.