Patent ID: 6628148
Filing Date: 2003-09-30
Classification: G11C

Abstract:
A sample and hold circuit comprising:a pair of first switches connected between an input terminal and first and second nodes, said input terminal receiving an input signal having a voltage that varies with time, said first switches being controlled by a switching signal having alternating first and second states and alternately transferring the voltage of said input signal to said first and second nodes as said states alternate; first and second capacitors which hold the voltage of said input signal transferred to said first and second nodes, respectively; a first differential input unit which generates a voltage corresponding to a potential difference between said first node and an output terminal, said first differential input unit including a first differential pair of transistors, a first constant current source that continuously supplies a first constant current to said first differential pair of transistors, and a first current mirror circuit which continuously sinks said first constant current after passage thereof through said first differential pair of transistors, one of the transistors of the first differential pair being connected to said first current mirror circuit at a first connection point, said voltage corresponding to said potential difference between said first node and said output terminal continuously appearing at said first connection point; a second differential input unit which generates a voltage corresponding to a potential difference between said second node and said output terminal, said second differential input unit including a second differential pair of transistors, a second constant current source that continuously supplies a second constant current to said second differential pair of transistors, and a second current mirror circuit which continuously sinks said second constant current after passage thereof through said second differential pair of transistors, one of the transistors of said second differential pair being connected to said second current mirror circuit at a second connection point, said voltage corresponding to said potential difference between said second node and said output terminal continuously appearing at said second connection point; a pair of second switches which are controlled by said switching signal, transfer the voltage at said second connection point in said second differential input unit to a third node while the voltage of said input signal is being transferred to said first node, and transfer the voltage at said first connection point in said first differential input unit to said third node while the voltage of said input signal is being transferred to said second node; and an output unit which outputs a voltage corresponding to the voltage at said third node to said output terminal.