Patent ID: 6278340
Filing Date: 2001-08-21
Classification: H01P

Abstract:
A balun circuit comprising:(a) a first dielectric substrate having substantially planar opposing surfaces;(b) a first conducting strip disposed on a first one of said opposing surfaces of said first dielectric substrate and having a first terminal and a second terminal;(c) a second conducting strip disposed on said first one of said opposing surfaces of said first dielectric substrate and having a first terminal and a second terminal;(d) a second dielectric substrate having substantially planar opposing surfaces, with a first one of said opposing surfaces of said second dielectric substrate being disposed over said first and second conducting strips disposed on said first opposing surface of said first dielectric substrate;(e) a third conducting strip disposed on a second one of said opposing surfaces of said second dielectric layer and having a first terminal and a second terminal;(f) a fourth conducting strip disposed on said second opposing surface of said second dielectric substrate and having a first terminal and a second terminal; and(g) a groundplane disposed on a second one of said opposing surfaces of said first dielectric substrate, wherein: said third conducting strip overlies said first conducting strip to form a first pair of broadside coupled lines,said fourth conducting strip overlies said second conducting strip to form a second pair of broadside coupled lines,said first terminal and said second terminal of said first conducting strip, said first terminal of said second conducting strip and said second terminal of said fourth conducting strip are electrically grounded, and said first terminal of said third conducting strip and said first terminal of said fourth conducting strip are connected to an unbalanced port, said second terminal of said third conducting strip is connected to a first balanced port, and said second terminal of said second conducting strip is connected to a second balanced port, wherein said first conducting strip and said third conducting strip have substantially the same length and width, and said second conducting strip and said fourth conducting strip have substantially the same length and width, said length of the second conducting strip and said fourth conducting strip being greater than said length of said first conducting strip and said third conducting strip, and said width of said second conducting strip and said fourth conducting strip being greater than said width of said first conducting strip and said third conducting strip.