Patent ID: 8309456
Filing Date: 2012-11-13
Classification: H01L

Abstract:
1. A method for making an electrode in a semiconductor device, the method comprising: forming a trench in a first layer, the first layer being associated with a top surface, the trench being associated with a bottom surface and a side surface; depositing a second layer, the second layer comprising an electrically insulating layer and a diffusion barrier layer on at least the bottom surface, the side surface, and a part of the top surface, the electrically insulating layer and the diffusion barrier layer being made of different materials; removing the second layer from at least a part of the bottom surface; depositing a seed layer on at least the part of the bottom surface and the second layer; and depositing an electrode layer on the seed layer; wherein the removing the second layer includes exposing at least the part of the bottom surface; wherein the removing the second layer is associated with a first etching rate and a first deposition rate related to the bottom surface, the first etching rate being higher than the first deposition rate; wherein the removing the second layer is further associated with a second etching rate and a second deposition rate related to the top surface, the second etching rate being lower than the second deposition rate; and wherein the removing the second layer is further associated with an AC power level equal about 280 Watts and a DC power level equal about 300 Watts, wherein a ratio of the DC power level to the AC power level ranges from 1.0 to 1.3.