Patent ID: 6167080
Filing Date: 2000-12-26
Classification: H04L

Abstract:
An apparatus including a control loop for controlling an adaptive qualization of a data signal, comprising:a signal equalization circuit configured to receive and process one or more equalization control signals and in accordance therewith receive and adaptively equalize an input data signal from a cable and in accordance therewith provide an equalized data signal which corresponds to said input data signal;a data signal peak detection circuit, coupled to said signal equalization circuit, configured to receive and detect said equalized data signal and in accordance therewith provide a plurality of peak parameter signals which indicates whether said equalized data signal has transcended a plurality of predetermined signal levels including predetermined minimum and maximum signal levels;a signal processing circuit, coupled to said data signal peak detection circuit, configured to receive and process said plurality of peak parameter signals and in accordance therewith providea first processed parameter signal which indicates whether said equalized data signal has transcended one of said predetermined minimum and maximum signal levels,a second processed parameter signal which indicates which one of said predetermined minimum and maximum signal levels said equalized data signal has transcended,a third processed parameter signal which indicates whether said equalized data signal has transcended a first predetermined midrange signal level intermediate to a predetermined mean value of said equalized data signal and said predetermined maximum signal level, or has transcended a second predetermined midrange signal level intermediate to said predetermined mean value of said equalized data signal and said predetermined minimum signal level, anda fourth processed parameter signal which indicates which one of said first and second predetermined midrange signal levels said equalized data signal has transcended; andan equalization control circuit, coupled to said signal processing circuit and said signal equalization circuit, configured to receive and process said first, second, third and fourth processed parameter signals and in accordance therewith provide said one or more equalization control signals.