Patent ID: 8823444
Filing Date: 2014-09-02
Classification: G05F

Abstract:
1. A reference voltage generating circuit, comprising: a first variable resistor connected at a first end to a power supply potential; a second variable resistor connected at a first end to the power supply potential; a first bipolar transistor having a collector electrode connected to a second end of the first variable resistor and an emitter electrode connected to a first end of a first resistor; a second resistor connected at a first end to a second end of the first resistor and at a second end to a ground potential; a second bipolar transistor having a collector electrode connected to a second end of the second variable resistor and an emitter electrode connected to the second end of the first resistor and the first end of the second resistor, a base electrode of the second bipolar transistor connected to a base electrode of the first bipolar transistor; a first differential amplifier having a first input terminal connected to the second end of the first variable resistor and a second input terminal connected to the second end of the second variable resistor, an output terminal of the first differential amplifier supplying a reference voltage; an output stage resistor having a first end connected to the output terminal of the first differential amplifier; a resistance dividing circuit connected to a second end of the output stage resistor and the ground potential, the resistance dividing circuit having a connection point connected to the base electrodes of the first and second bipolar transistors; a low-temperature region temperature compensating circuit including a second differential amplifier having a first input terminal connected to a first tap voltage from the resistance dividing circuit and a second input terminal connected to the emitter electrode of the second bipolar transistor and configured to output a first correction current; a high-temperature region temperature compensating circuit including a third differential amplifier having a first input terminal connected to a second tap voltage from the resistance dividing circuit and a second input terminal connected to the emitter electrode of the second bipolar transistor and configured to output a second correction current; and a current mirror circuit configured to output a mirror current based on the first and second correction currents to the second end of the output stage resistor, wherein the first and second bipolar transistors have a different emitter current density.