Patent ID: 6013566
Filing Date: 2000-01-11
Classification: H01L

Abstract:
A method for forming a shallow, doped source/drain region for a semiconductor transistor structure in a semiconductor substrate combining uniform RTP to facilitate solid phase epitaxial recrystallization, simultaneous with ion implantation, while conserving the thermal budget and eliminating the need for subsequent lattice repair anneals, comprising the steps of:heating the semiconductor substrate to approximately 600 degrees Celsius using uniform RTP by using a lamp selected from the group consisting of: an ultraviolet lamp, a mercury lamp, and a tungsten-halogen lamp, to heat at least one of a frontside and a backside of the semiconductor substrate; andsimultaneously implanting the heated semiconductor substrate with a dopant, to form the shallow, doped source/drain region having a depth of approximately 100 to 1,000 angstroms.