Patent ID: 6162689
Filing Date: 2000-12-19
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having source/drain regions each having a silicided contact, which method comprises:forming conductive gates on a main surface of a semiconductor substrate;forming spacers on side surfaces of the gates;forming an oxide layer on the main surface, spacers and gates;forming a mask on the oxide layer, the mask having openings spaced apart from the spacers, the openings corresponding to portions of the main surface where the silicided contacts are to be formed;etching the oxide layer to expose the portions of the main surface where the silicided contacts are to be formed;ion implanting impurities into the substrate through the oxide layer and at the exposed portions of the main surface to form the source/drain regions having a first junction depth below the oxide layer and having a second junction depth, greater than the first junction depth, below the exposed portions of the main surface where the silicided contacts are to be formed;forming a metal layer on the source/drain regions; andheating to form a metal silicide layer;wherein the second junction depth is below the metal silicide layer.