Patent ID: 7388420
Filing Date: 2008-06-17
Classification: G11C

Abstract:
1. A master-slave electronic fuse for selectively configuring a circuit, comprising: a master fuse having a master latch and a nonvolatile memory element coupled between a reset node of the master-slave electronic fuse and the master latch, said master latch comprising cross-coupled inverters and wherein a first one of the cross-coupled inverters has at least one transistor with a gate-width-to-length ratio that is larger than a gate-width-to-length ratio of at least one of the transistors of a second one of said cross-coupled inverters, said nonvolatile memory element comprising a floating-gate transistor having a floating gate, an amount of charge on the floating gate determining said memory value; and a slave latch having a slave-latch input coupled to an output of the master latch and a slave-latch node configured to receive a slave-latch signal, wherein said master latch is configured to settle to a predetermined one of a first state and a second state following application of a reset signal to the reset node, and the slave latch is configured to latch the predetermined state of the master latch upon application of a slave-latch signal to the slave-latch node, said predetermined state of the master latch to which the slave latch is configured to latch being one of two states each corresponding to a different configuration of the circuit such that said fuse is operative to configure the circuit in accordance with a value stored in the nonvolatile memory element and following application of the reset signal, wherein the predetermined state of said master latch is affected by a memory value to which the nonvolatile memory element is programmed, and wherein the master latch is predisposed to settle into said first state when a voltage of said floating gate is relatively high and into said second state when the floating gate voltage is relatively low.