Patent ID: 6678823
Filing Date: 2004-01-13
Classification: G11C,H01L

Abstract:
A method for securing data in a device containing semiconductor memory cells, comprising the steps of:writing data to selected ones of the semiconductor memory cells in order to establish a level of trapped charges within each of the selected cells; identifying each of the selected cells as containing a digital â€œ1â€  or a â€œdigital â€œ0â€ ; determining a level of trapped charges in each of the selected cells by: (a) establishing a voltage threshold for distinguishing a digital â€œ1â€  or a digital 0; (b) performing a read operation on each of the selected cells; (c) noting and storing the voltage threshold used for each cell which was read as having a different digital value than was previously identified; (d) adjusting the voltage threshold for each cell toward a predetermined limit, the limit depending on whether the cell was originally identified as containing a digital â€œ1â€  or containing a digital â€œ0â€ ; (e) repeating steps (b) through (d) until each cell is read as having a content different from the original content or the voltage threshold for each cell reaches the predetermined limit; for each of the selected cells, processing the voltage threshold at which the cell was read as having a content different from the original content in order to determine the level of trapped charges in the cell; and converting the levels of trapped charges in the selected cells to numerical form in order to generate a reference fingerprint reflecting the levels of trapped charges in the selected cells.