Patent ID: 8362817
Filing Date: 2013-01-29
Classification: H03L

Abstract:
1. A phase comparator comprising: a first latch configured to latch input data synchronously with an eye center clock signal; a second latch configured to latch said data latched in said first latch synchronously with an eye edge center clock signal having a phase opposite to the phase of said eye center clock signal; a first detection circuit configured to detect logical mismatching of said input data and said data latched in said first latch; a second detection circuit configured to detect logical mismatching of said data latched in said first latch and said data latched in said second latch; and a charge-pump circuit having the function of a changeover switch configured to change a current generated by said charge-pump circuit from an electrical charging current to an electrical discharging current and vice versa on the basis of logical-mismatching detection results produced by said first and second detection circuits, wherein said first detection circuit, said second detection circuit and said charge-pump circuit are formed as a mismatching-detector/charge-pump compound circuit which is a compound circuit including logical-mismatching determination sections of said first and second detection circuits and said changeover switch configured to change said current from said electrical charging current of said charge-pump circuit to said electrical discharging current of said charge-pump circuit and vice versa, said mismatching-detector/charge-pump compound circuit includes, an output node, a first compound section and a first current source connected to said first compound section in series between a power supply and said output node, and a second compound section and a second current source connected to said second compound section in series between said output node and a reference electric potential line.