Patent ID: 6411159
Filing Date: 2002-06-25
Classification: G05F

Abstract:
A control circuit for a differential logic circuit including a current source and a pair of load transistors, each load transistor including a control terminal, the control circuit comprising:a first transistor having a first conduction terminal coupled to a first voltage source and coupled to the current source of the differential logic circuit so as to form a current mirror therewith; a second transistor having a control terminal coupled to the control terminal of the load transistors and a first conduction terminal coupled to a second voltage source, the second transistor operating in a linear region of operation; and a controllable current source coupled between the second transistor and the first transistor, the controllable current source receiving an input signal generated externally to the control circuit, and controlling the level of current passing through the current source of the differential logic circuit and a resistance of the load transistors based upon the value of the input signal, the product of the current passing through the load transistors and the resistance value of the load transistors being substantially constant.