Patent ID: 7970090
Filing Date: 2011-06-28
Classification: H04L

Abstract:
1. A self-synchronizing system, comprising: a clock source adapted to provide a master clock signal; a first system component coupled to receive the master clock signal at a first clock input and adapted to provide the master clock signal to a plurality of channels; and a second system component coupled to the first system component via a first channel of the plurality of channels, the second system component being adapted to operate in a first phase of operation while receiving synchronization information and in a second phase of operation while receiving operational data, wherein the second system component does not have a dedicated clock signal input terminal coupled to receive the master clock signal, the second system component including a first receiver coupled to the first channel and adapted to extract a primary clock signal from data bits transmitted from the first system component to the second system component on the first channel, wherein the primary clock signal provides the synchronization information for the second system component in the first phase of operation comprising a synchronization phase and has a frequency corresponding to a frequency of the data bits transmitted from the first system component to the second system component on the first channel.