Patent ID: 6812122
Filing Date: 2004-11-02
Classification: H01L

Abstract:
A method of forming a one time, voltage programmable logic element in a semiconductor substrate of a first conductivity type comprising:forming a first diffusion layer beneath the surface of the substrate, the first diffusion layer having a second conductivity type; forming a trench through the surface and passing through the first diffusion layer, the trench having an interior surface; lining the interior surface of the trench with a first layer of dielectric material at a first thickness; depositing a second layer of dielectrical material at a second thickness over the first diffusion layer, such that the second thickness is greater than the first thickness and the second layer is recessed below the top surface of the trench; forming a second diffusion layer in the annular space of the trench on the surface of the substrate; filling the lined trench with a conductive material that abuts the second diffusion layer; connecting the top surface of the trench to the semiconductor substrate to form an ohmic contact region; wherein the logic element is configured so that a predetermined voltage or higher applied between the conductive material and the first diffusion layer results in a programming current to flow through the first diffusion layer and across the first layer of dielectric material below the surface of the substrate; and forming a surface contact structure within the substrate that is coupled to the conductive material filling the trench so as to provide an electrical contact at the top and into the interior surface of the trench, but not to extend to the first layer of dielectric material.