Patent ID: 9110488
Filing Date: 2015-08-18
Classification: G05F

Abstract:
1. A linear regulator comprising: a first feedback loop characterized by a first bandwidth and a first gain, the first feedback loop including a first amplifier characterized by an output impedance which is significantly reduced in order to maximize the bandwidth of the first feedback loop when driving the capacitance of a control input of a series pass element; and a second feedback loop characterized by a second bandwidth and a second gain, the second feedback loop including a second amplifier that controls the current in the first amplifier in the first feedback loop, wherein the first amplifier and the second amplifier receive a same reference voltage level, and wherein the second amplifier of the second feedback loop controlling the current in the first amplifier in the first feedback loop acts to correct gain error resulting from the first gain in the first feedback loop, wherein, the first amplifier is a low gain, high bandwidth amplifier and the second amplifier is a high gain, low bandwidth amplifier.