Patent ID: 6677622
Filing Date: 2004-01-13
Classification: H01L

Abstract:
A semiconductor device comprising:a first-conductivity-type semiconductor substrate having a principal surface; a second-conductivity-type first semiconductor region and a second-conductivity-type second semiconductor region formed apart from each other in the principal surface of said semiconductor substrate; a second-conductivity-type third semiconductor region formed on said first semiconductor region, said third semiconductor region having an impurity concentration higher than that of said first semiconductor region; a first-conductivity-type fourth semiconductor region formed on said third semiconductor region; a first main electrode formed on said fourth semiconductor region; a second main electrode formed on said second semiconductor region; and a gate electrode formed, at least on said first semiconductor region and on the principal surface of said semiconductor substrate between said fourth semiconductor region and said second semiconductor region, with a gate insulating film interposed between said gate electrode and said first semiconductor region and the principal surface of said semiconductor substrate, wherein the third semiconductor region is self-aligned with the gate electrode.