Patent ID: 7706166
Filing Date: 2010-04-27
Classification: G11C

Abstract:
1. A semiconductor device comprising: first and second nonvolatile memory elements, each of which changes information stored therein in response to a programming voltage equal to or greater than a predetermined level; a first memory element programming circuit coupled to the first nonvolatile memory element to program the first nonvolatile memory element, the first memory element programming circuit supplying the first nonvolatile memory element with a first programming voltage that is equal or greater than the predetermined level when the first memory element programming circuit receives a first supply voltage, and with a second programming voltage that is less than the predetermined level when the first memory element programming circuit receives a second supply voltage that is smaller than the first supply voltage; and a second memory element programming circuit coupled to the second nonvolatile memory element to program the second nonvolatile memory element, the second memory element programming circuit supplying the second nonvolatile memory element with a third programming voltage that is equal or greater than the predetermined level when the second memory element programming circuit receives the first supply voltage, and with a fourth programming voltage that is equal to greater than the predetermined level when the second memory element programming circuit receives the second supply voltage.