Patent ID: 7343478
Filing Date: 2008-03-11
Classification: G06F

Abstract:
1. An arithmetic processor, comprising: at least one register file having a plurality of register windows each formed by a set of registers including an in-register, a local register, and an out-register, said plurality of register windows being arranged in a ring-like form; a current window pointer which indicates the position of a current register window by using a pointer value when access is performed to the register windows; a current register which reads data, stored in a register window that is specified by the pointer value indicated by said current window pointer, from a respective register file; a replacing buffer configured between said respective register file and said current register, said replacing buffer holding data which is to be sent from said respective register file to said current register; an arithmetic operation unit which decodes a window switching instruction for switching the register windows and an instruction relating to data stored in said current register or data held in said replacing buffer, the arithmetic operation unit then executing the instructions; and a control unit which transfers, if a window switching instruction is decoded by said arithmetic operation unit, data of the register window which is to be specified by said current window pointer upon completion of execution of the window switching instruction, to said replacing buffer.