Patent ID: 6764910
Filing Date: 2004-07-20
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, the method comprising:forming a gate oxide layer and a first gate electrode on a semiconductor substrate; forming a source/drain extension region by implanting impurity ions into the semiconductor substrate; forming a halo ion-implanted region at both sides of the source/drain extension region by implanting impurity ions at a predetermined angle between a normal to the semiconductor substrate, by using a high angle halo ion implantation method; forming a silicon nitride (Si3N4) layer on the semiconductor substrate on which the halo ion-implanted region is formed; forming an oxide layer on the semiconductor substrate on which the silicon nitride (Si3N4) layer is formed; planarizing the semiconductor substrate on which the oxide layer is formed, by chemical mechanical polishing, so as to expose the first gate electrode; forming a second gate electrode on the first gate electrode using a selective epitaxial growth method; etching back the oxide layer to expose the silicon nitride (Si3N4) layer using the second gate electrode as an etch mask; depositing an insulating layer for forming spacers on the semiconductor substrate and forming a first spacer by anisotropic dry etching; and forming a first deep source/drain region by implanting impurity ions into the semiconductor substrate.