Patent ID: 6284581
Filing Date: 2001-09-04
Classification: H01L

Abstract:
A method of forming a semiconductor device on a semiconductor substrate having a top surface providing an interface on which an epitaxial semiconductor layer is formed, said epitaxial semiconductor layer having an upper surface, said method comprising the steps as follows:forming dielectric, isolation structures in said epitaxial layer extending downwardly from said upper surface said isolation structures separating said epitaxial layer into a bipolar area, an NMOS area and a PMOS area,then forming a buried doped region for a bipolar transistor in said substrate and in said epitaxial semiconductor layer at the bottom of said emitter area deep below said upper surface straddling said interface,then forming a thin silicon oxide layer superjacent to said isolation structures on said top surface of said silicon semiconductor substrate,forming a conductive polysilicon layer superjacent to said thin silicon oxide layer,masking said NMOS and PMOS areas of said substrate with a bipolar mask having a window over said bipolar area of said substrate,ion implanting bipolar dopant into a portion of said conductive polysilicon layer over said bipolar area of said substrate through said window in said bipolar mask,stripping said bipolar mask,annealing said substrate including said thin silicon oxide layer, and said polysilicon layer to drive said dopant into a bipolar region in said bipolar area in said substrate, andforming doped source/drain regions and a bipolar base in said bipolar area of said substrate.