Patent ID: 6320421
Filing Date: 2001-11-20
Classification: H03K

Abstract:
A logic circuit having first and second data input ports, first and second select signal input ports, a reference signal port, and an output port, wherein:either of first and second data items input through said first and second data input ports is selected based on select signals of opposite polarities input through said first and second select signal input ports; anddata selected based on said select signals is output through said output port synchronously with a reference signal input through said reference signal input port,said logic circuit comprising:a first inverter having an output terminal thereof connected to a first transmission gate;a second inverter having an output terminal thereof connected to said output port;a first NOR circuit having said first select signal input port connected to one input terminal thereof and having said reference signal applied to the other input terminal thereof;a second NOR circuit having said second select signal input port connected to one input terminal thereof and having said reference signal applied to the other input terminal thereof;a first transmission gate connected between said first data input port and the input terminal of said first inverter, and controlled based on an output of said first NOR circuit;a second transmission gate connected between said second data input port and the input terminal of said first inverter, and controlled based on an output of said second NOR circuit; anda third transmission gate connected between said first and second inverters, and controlled based on said reference signal input through said reference signal input port.