Patent ID: 7384842
Filing Date: 2008-06-10
Classification: H01L

Abstract:
1. A method for fabricating silicon-on-insulator (SOI) trench memory, the method comprising: forming a trench in a substrate, wherein a buried oxide layer is disposed on the substrate, a SOI layer is disposed on the buried oxide layer, and a hardmask layer is disposed on the SOI layer; implanting ions into the substrate and the SOI layer on a first opposing side of the trench and a second opposing side the trench to partially form a capacitor; depositing a node dielectric in the trench; filling the trench with a first polysilicon; removing a portion of the first polysilicon from the trench to expose a portion of the node dielectric; removing the exposed portion of the node dielectric; filling the trench with a second polysilicon; masking to define an active region on the hardmask layer; forming shallow trench isolation (STI) such that the STI contacts a portion of the buried oxide layer; removing the hardmask layer; and forming a transistor in the active region.