Patent ID: 6433400
Filing Date: 2002-08-13
Classification: H01L

Abstract:
An isolation structure laterally disposed between a first active region and a second active region of a semiconductor substrate, comprising:a trench configured within said semiconductor substrate; a thermally grown oxide layer having a first portion disposed across a bottom of said trench and second and third portions disposed within said trench laterally adjacent to said first and second active regions; and a deposited oxide disposed within said trench above said first portion and between said second and third portions, said deposited oxide having an upper surface which is approximately coplanar with an upper surface of said semiconductor substrate; and barrier atoms incorporated exclusively into barrier regions of said first and second active regions, wherein the barrier regions are proximate said upper surface of said substrate and laterally adjacent to said second and third portions of said thermally grown oxide, and wherein the barrier regions are of limited lateral extent within the active regions, such that a depth to which said barrier atoms are incorporated within each active region is greatest at an interface between the active region and the adjacent portion of the thermally grown oxide, and decreases with distance into the active region and away from the interface.