Patent ID: 8694942
Filing Date: 2014-04-08
Classification: G06F,H01L

Abstract:
1. A computer readable medium, for use with a data processing system provided with a first layout of an integrated circuit design, the first layout defining a plurality of masks, the masks defining a plurality of integrated circuit features when applied in a fabrication process, the features defining a plurality of circuit layout cells having gaps therebetween, for use further with a database defining a plurality of filler cell designs, the layout being for use in fabricating an integrated circuit device according to the design, the medium carrying software instructions which, when applied to the data processing system, performs insertion of a first filler cell in a gap of the gaps, the gap adjacent to a subject circuit layout cell, the first filler cell including a dummy diffusion region longitudinally aligned with the diffusion region of an N-channel transistor in the subject circuit layout cell, the first filler cell lacking any diffusion region longitudinally aligned with the diffusion region of any P-channel transistor in the subject circuit layout cell.