Patent ID: 7880275
Filing Date: 2011-02-01
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor die having a peripheral region around the semiconductor die; a first insulating material deposited in the peripheral region; a conductive via formed through the first insulating material in the peripheral region; a conductive layer formed over the first insulating layer and semiconductor die, the conductive layer being electrically connected to the conductive via and a contact pad of the semiconductor die; a second insulating layer deposited over the first insulating layer, conductive layer, and semiconductor die, the first and second insulating layers having a profile formed in the peripheral region around the semiconductor die; an opening formed in the second insulating layer to expose the conductive layer; and a shielding layer formed over the first and second insulating layers to isolate the semiconductor die from inter-device interference, the shielding layer conforming to the profile in the peripheral region around the semiconductor die and to the opening to electrically connect the shielding layer to the conductive via.