Patent ID: 7297579
Filing Date: 2007-11-20
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: forming a semiconductor layer on an insulating surface; forming a gate insulating film on the semiconductor layer; forming a first conductive film and a second conductive film on the gate insulating film; etching the first conductive film and the second conductive film, forming a first shape gate electrode composed of a first electrode and a second electrode on the semiconductor layer; etching the first electrode and the second electrode, forming a second shape gate electrode composed of a third electrode and a fourth electrode; adding an n-type impurity element to the semiconductor layer in a self aligning manner with the second shape gate electrode as a mask, forming an n-type impurity region containing a first concentration of the n-type impurity element; forming a mask covering a portion of the semiconductor layer; and forming on the semiconductor layer: an n-type impurity region containing a second concentration of the n-type impurity element, adjacent to a channel forming region through the third electrode; an n-type impurity region containing a third concentration of the n-type impurity element, adjacent to the n-type impurity region containing the first concentration of the n-type impurity element; and an n-type impurity region containing the third concentration of the n-type impurity element, adjacent to the n-type impurity region containing the second concentration of the n-type impurity element.