Patent ID: 9003153
Filing Date: 2015-04-07
Classification: G06F,H03M

Abstract:
1. A method of storing a plurality of data blocks in a plurality of physically distinct non-volatile memory devices, each being independently written to or read from, wherein each of the data blocks has a logical address different from that of the others of the data blocks, and wherein at least one of the data blocks has a logical address that is outside of a sequential order of the logical addresses of the others of the data blocks, said method comprising: generating one or more error checking data blocks based upon said plurality of data blocks; storing said plurality of data blocks and said one or more error checking data blocks in said plurality of physically distinct non-volatile memory devices, with each of the data blocks in a different one of the physically distinct non-volatile memory devices; and linking said plurality of data blocks and said one or more error checking data blocks in an address map.