Patent ID: 9202841
Filing Date: 2015-12-01
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure, comprising: providing a substrate defining a connecting section and a functional section, wherein the substrate includes a connecting layer in the connecting section; forming a protective insulating layer over the substrate, the protecting insulating layer covering both the connecting and functional sections; etching the protective insulating layer and the substrate to form at least one first opening, each of the at least one first opening exposing the connecting layer; lining a sidewall of each of the at least one first opening with a sidewall insulating layer; filling a conductive material into each of the at least one first opening to form a conductive structure; forming a metal layer over the protective insulating layer, the metal layer covering both the connecting and functional sections; and performing a selective etching process on the metal layer to form a pad above the connecting section and a metal structure above the functional section, such that the pad is located on the conductive structure and is connected to the connecting layer via the conductive structure.