Patent ID: 6816202
Filing Date: 2004-11-09
Classification: H04N

Abstract:
A picture frame generating circuit, comprising:a coordinate value calculation processor that calculates frame start position (X), frame start position (Y), picture end position (X), picture end position (Y), frame end position (X) and frame end position (Y) using calculation start signal as activation signal, based on picture position (X) register, picture position (Y) register, picture size (X) register, picture size (Y) register and frame size register which are written through a data bus, said processor allowing frame color data to be written into frame color register to designate the color of frame through said data bus; and a selection circuit of frame and picture to which said frame start position (X), said frame start position (Y), said picture end position (X), said picture end position (Y), said frame end position (X), said frame end position (Y), data being inputted through said data bus to said picture position (X) register and said picture position (Y) register, said frame color data, picture data, horizontal display position and vertical display position are input, said circuit selecting said picture data or said frame color data and outputs the selected one as display data.