Patent ID: 6902963
Filing Date: 2005-06-07
Classification: G11C,H01L

Abstract:
1. A method of manufacturing an SRAM cell, the method comprising the steps of: (1) forming a gate on a semiconductor substrate having an isolation layer; (2) depositing an interlayer insulating film on the substrate so as to cover the gate; (3) etching the interlayer insulating film to form contact holes which expose the gate and the substrate, respectively; (4) filling each of the holes with a conductive film to form contact plugs; (5) sequentially depositing an etching barrier film and an insulating oxide film on the interlayer insulating film including the contact plugs; (6) etching the insulating oxide film and the etching barrier film to form trenches of predetermined shapes which expose respective contact plugs; (7) filling each of the trenches with a metal film to form metal interconnection lines; (8) depositing a dielectric film on the insulating oxide film including the metal interconnection lines; (9) etching the dielectric film to expose at least one specified metal interconnection line; and (10) forming a metal plate so that the metal plate is in contact with the metal interconnection line exposed out of the dielectric film.