Patent ID: 6156579
Filing Date: 2000-12-05
Classification: H01L

Abstract:
A method for forming a circuit identifier in an integrated circuit, the method comprising the steps of:providing a substrate;forming a plurality of device layers overlying the substrate to form a redundant circuit;forming a layer of material overlying the device layers; andforming an identification label from the layer of material for specifically identifying a functionality of the redundant circuit, the identification label comprising characters, each character in the identification label being of contiguous geometry where each character of contiguous geometry is a binary, a ternary, or a quaternary numerically encoded character which also functions to identify to a viewer of the integrated circuit a physical orientation of the redundant circuit, each character having a first dimension less than or equal to 3*W and a second dimension less than or equal to 2*W wherein W is a minimum lithographic dimension used to form one character.