Patent ID: 6292061
Filing Date: 2001-09-18
Classification: H03K,H03L

Abstract:
A phase-locked loop (PLL) with a supply voltage Vdd, said PLL comprising:a voltage controlled oscillator (VCO);a loop filter coupled to said VCO, said loop filter having a plurality of MOSFET gate capacitors with a process dependent thresh-hold voltage of approximately Vth, said loop filter having a first filter terminal with a first filter terminal voltage of Vf1 and a second filter terminal with a second filter terminal voltage of Vf2;a differential charge pump (CP) coupled to said loop filter, wherein said differential CP is adapted to sense said thresh-hold voltage Vth and maintain at a node a common-mode reference voltage of Vref approximately equal to (Vdd-Vth)/2, and wherein said differential CP has a common-mode feedback for centering Vf1 and Vf2 around Vref.