Patent ID: 8565019
Filing Date: 2013-10-22
Classification: G11C

Abstract:
1. A method for controlling threshold values in a nonvolatile semiconductor memory device that includes a plurality of memory cells comprising a first memory cell and a second memory cell, each of the plurality of memory cells being capable of having a multi-value state by adjusting threshold voltages, and a word line connected to the memory cells, writing being performed by applying a write voltage to the word line, the method comprising: performing a first operation so that the threshold value of the first memory cell is adjusted to a neighborhood of a first target threshold value, the first operation including a first writing on the first memory cell without verify reading being performed, the first target threshold value being different from the threshold value of an erased state; performing a second operation after performing the first operation so that the threshold value of the second memory cell is adjusted to a neighborhood of a second target threshold value, the second operation including a second writing on the second memory cell without verify reading being performed, the second target threshold value being different from both the first target threshold value and the threshold value of an erased state; performing a third operation until a threshold value on the first memory cell becomes equal to or higher than the first target threshold value after performing the second operation, the third operation including a third writing and a first verify reading on the first memory cell; and performing a fourth operation until a threshold value on the second memory cell becomes equal to or higher than the second target threshold value after performing the third operation, the fourth operation including a fourth writing and a second verify reading on the first memory cell.