Patent ID: 9103878
Filing Date: 2015-08-11
Classification: G01R

Abstract:
1. A method for scan testing a three-dimensional chip, comprising steps of: establishing a scan forest structure for the three-dimensional chip, wherein the scan forest structure comprises a plurality of scan input ports and a plurality of scan tree structures corresponding to the plurality of scan input ports, each of the plurality of scan tree structures comprises a plurality of scan chains, and scan triggers in a same scan chain have different successors; generating a first test set and a plurality of test periods, and dividing the first test set into a plurality of test subsets; distributing test vectors in the plurality of test subsets into the plurality of test periods; obtaining a current hotspot of the three-dimensional chip; obtaining a plurality of temperature rising values of the current hotspot corresponding to the plurality of test subsets respectively according to the scan forest structure, and ranking the plurality of test subsets in accordance with an order of the temperature rising values from small to large to obtain a test vector strategy; selecting the test subsets corresponding to the temperature rising values less than a temperature threshold from the plurality of test subsets according to the test vector strategy, so as to generate a second test set; and applying the second test set to the scan forest structure for scan testing the three-dimensional chip, and updating the current hotspot of the three-dimensional chip.