Patent ID: 8264867
Filing Date: 2012-09-11
Classification: G11C

Abstract:
1. A nonvolatile semiconductor storage device having a plurality of operation modes, comprising: a plurality of first lines; a plurality of second lines that intersect with the plurality of first lines; a plurality of memory cells arranged at positions where the first lines intersect with the second lines, each memory cell including a variable resistive element and a rectifying element that is connected to the variable resistive element in series; a first selection unit that charges a first line to be selected from among the plurality of first lines to a first selection voltage; and a second selection unit that charges a second line to be selected from among the plurality of second lines to an unselection voltage and discharges the second line to be selected to a second selection voltage after the first line to be selected is charged to the first selection voltage by the first selection unit, wherein the second selection unit adjusts at least one of a level of the second selection voltage to which the second line to be selected is to be discharged and a time constant when discharging the second line to be selected, in accordance with an operation mode in which the nonvolatile semiconductor storage device operates among the plurality of operation modes.