Patent ID: 6635510
Filing Date: 2003-10-21
Classification: H01L

Abstract:
A method for making an HDI circuit including backside connections by using parylene as a protective coating, said method comprising the steps of:procuring an insulating substrate defining front and rear surfaces and including an active chip essentially coplanar with said insulating substrate, which active chip has electrical connections on a front surface of said chip facing said rear surface of said substrate and which also has at least one of a thermal and electrical connection exposed on a rear surface of said chip; applying a parylene coating to at least one connection on said rear surface of said chip, to thereby protect said at least one connection; performing additional HDI interconnect processing steps on said front surface of said substrate, including at least via forming, patterning, and metal deposition, which in the absence of said parylene coating may adversely affect said at least one connection; after said step of performing additional HDI front surface interconnect processing steps, selectively removing a portion of said parylene coating in the region of said at least one connection to thereby expose at least a portion of said at least one connection in a selected connection region; and making electrical connection to said at least one connection by application of a conductive material in its liquid state to said selected region, whereby said parylene coating limits the application of said conductive material to said selected region.