Patent ID: 6667227
Filing Date: 2003-12-23
Classification: H01L

Abstract:
A method for fabricating a semiconductor device with a trenched gate electrode comprising:etching a semiconductor substrate to form a trench having substantially upright vertical surfaces and a bottom surface in the semiconductor substrate; forming a trench-to-gate dielectric layer on the substantially vertical surfaces and the bottom surface inside the trench; forming a trenched gate electrode inside the trench by depositing a polysilicon layer; selectively removing the polysilicon layer to form the trenched gate electrode and a residual polysilicon interconnect to another trenched gate electrode; forming a source region and a drain region in the semiconductor substrate, the source and drain regions being spaced apart by the trench immediately contiguous to the substantially upright vertical sides of the trench; and implanting a channel region formed beneath the bottom of the trench and immediately contiguous to the source region and the drain region.