Patent ID: 6933229
Filing Date: 2005-08-23
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: providing a substrate; forming a plurality of conductive structures over the substrate, wherein each conductive structure comprises a conductive layer and a cap layer over the conductive layer; forming spacers on sidewalls of the conductive structures; forming a first dielectric layer over the substrate; removing a portion of the first dielectric layer, a portion of the cap layer and a portion of the spacers between neighboring conductive structures to form a plurality of first openings; forming a liner layer over a bottom and sidewalls of the first openings; forming a bottom plug over the liner layer in the first openings; forming a second dielectric layer over the substrate; forming a plurality of second openings in the second dielectric layer, wherein each second opening exposes a portion of the bottom plug, and the second opening has a critical dimension smaller than the first opening; forming a top plug inside the second openings; and forming a plurality of wire lines over the second dielectric layer so that the wire lines and the top plugs are electrically connected.