Patent ID: 8648403
Filing Date: 2014-02-11
Classification: G11C,H01L

Abstract:
1. A dynamic random access memory cell, comprising: a capacitive storage device comprising a gated diode having a capacitive storage gate stack, said capacitive storage gate stack comprising a capacitive storage gate stack high-K dielectric, wherein said capacitive storage gate stack high-K dielectric has a dielectric constant greater than the dielectric constant of silicon dioxide; a write access transistor, said write access transistor being operatively coupled to said capacitive storage device and having a write access transistor gate stack, said write access transistor gate stack comprising a write access transistor gate stack high-K dielectric, wherein said write access transistor gate stack high-K dielectric has a dielectric constant greater than a dielectric constant of silicon dioxide, and wherein said write access transistor gate stack further comprises a metal gate electrode coupled to said write access transistor gate stack high-K dielectric, and wherein said metal gate electrode substantially exhibits a ¼ gap work function; and a read transistor, said read transistor being operatively coupled to said capacitive storage device and having a read transistor gate stack, said read transistor gate stack comprising a read transistor gate stack high-K dielectric, wherein said read transistor gate stack high-K dielectric has a dielectric constant greater than said dielectric constant of silicon dioxide.