Patent ID: 7776647
Filing Date: 2010-08-17
Classification: B33Y,H01L

Abstract:
1. A method for fabricating a semiconductor component comprising: providing a semiconductor wafer comprising a plurality of semiconductor dice separated by streets, each semiconductor die comprising a substrate having a circuit side with integrated circuits, a back side and a plurality of contacts on the circuit side in electrical communication with the integrated circuits having a first pattern; forming a circuit side polymer layer on the dice and a plurality of polymer filled trenches in the streets; forming a plurality of conductive vias from the backside through the substrate and the contacts in electrical contact with the contacts; forming a plurality of conductors on the backside in electrical communication with the conductive vias configured to redistribute and fan out the first pattern to a second pattern; forming a back side polymer layer on the dice; forming a plurality of terminal contacts on the back side having the second pattern in electrical communication with the conductors; and singulating the wafer through the polymer filled trenches such that each die is encapsulated on six surfaces by polymer layers.