Patent ID: 6704757
Filing Date: 2004-03-09
Classification: G06N

Abstract:
A semiconductor signal processor unit having a multi-loop circuit comprising:an amplifying circuit group composed of a plurality of sets of first amplifiers with a floating gate to which at least one first electrode and a single second electrode are capacitively coupled with a predetermined ratio; a logical operation circuit to which output signals of said amplifying circuit group are inputted and which outputs a logical 0 or 1; and a second amplifying circuit to which an output signal of said logical operation circuit is inputted and whose output is distributed to all of said second electrodes of the amplifying circuit group, such that said second amplifying circuit includes an adjusting circuit which adjusts an output current driving ability and a controlling circuit which controls said adjustment with a predetermined regulation, and said adjustment of said controlling circuit is executed according to variation of said output of said logical operation circuit.