Patent ID: 6512399
Filing Date: 2003-01-28
Classification: G11C

Abstract:
A peak detect-and-hold circuit, which comprises:an amplifier, the amplifier including an inverting input; terminal, a non-inverting input terminal, and an output terminal, the output terminal outputting an output voltage; a first switch, the first switch being electrically connected in series between an input voltage signal and the inverting input terminal of the amplifier, the first switch being directly coupled to the inverting input terminal of the amplifier; at least one capacitor, the at least one capacitor being electrically connected in series between the non-inverting input terminal of the amplifier and ground; a current source, the current source being connected to the non-inverting input terminal of the amplifier, the current source providing current to the at least one capacitor; and a second switch, the second switch being electrically connected in series between the inverting input terminal of the amplifier and the output terminal of the amplifier.