Patent ID: 7437582
Filing Date: 2008-10-14
Classification: G06F

Abstract:
1. In an integrated circuit, a system for dynamically adjusting performance of circuitry blocks, the system comprising: a first circuit domain; an interim storage device coupled to the first circuit domain; the first circuit domain including: a controller coupled to the first circuit domain for adjustment of a first operating voltage of the first circuit domain; a second circuit domain coupled to the first circuit domain via the interim storage device, the controller being coupled to the second circuit domain for adjustment of a second operating voltage of the second circuit domain, the second circuit domain including: a fourth level shifter coupled to an output of the second circuitry block; an input storage device having an output coupled to an input of the first level shifter; and an output storage device having an input coupled to an output of the fourth level shifter, each of the input storage device, the interim storage device, and the output storage device configured to sequentially store data provided respectively thereto, wherein: the input storage device is coupled to receive input data, the input storage device configured to provide the input data to the first level shifter at a first frequency for the first circuitry block, the first circuitry block operated responsive to the first frequency, the input data after processing by the first circuitry block being provided to the interim storage device via the second level shifter as interim data and being clocked into the interim storage device as the interim data at the first frequency; and