Patent ID: 6424132
Filing Date: 2002-07-23
Classification: G05F,H02M

Abstract:
A compensation circuit for introducing a zero in a first circuit being incorporated in a closed loop feedback system, said first circuit including a first terminal generating a first voltage for said closed loop feedback system, a feedback terminal for receiving a second voltage from said closed loop feedback system, an input node in said first circuit receiving a feedback voltage corresponding to said second voltage, said input node being coupled to an error amplifier, said compensation circuit comprising:a first capacitor coupled between said input node in said first circuit and a first node, said first capacitor blocking out the DC component of said feedback voltage; an amplifier coupled between said first node and a second node; and a second capacitor coupled between said second node and a summing node in said error amplifier, said summing node coupled to a summing circuit disposed between a first gain stage and a second gain stage of said error amplifier in said first circuit.