Patent ID: 6711393
Filing Date: 2004-03-23
Classification: H04L

Abstract:
A radio receiver, comprising:a front end circuit for sampling a received signal to produce a sampled received signal containing a DC offset; a first offset estimation circuit, for producing a first estimate of the DC offset from the sampled received signal; a first subtractor, for subtracting the first estimate of the DC offset from the sampled received signal to produce a first estimated sampled signal including a residual DC offset; a first synchronization detection circuit, for estimating a synchronization position of the first estimated sampled signal; a first channel estimator, for producing a first channel estimate based on the estimated synchronization position; a second offset estimation circuit, for producing a second estimate of the residual DC offset in the first estimated sampled signal, after estimation of the synchronization position; a second subtractor, for producing a second estimated sampled signal by subtracting the second estimate of the residual DC offset from the first estimated sampled signal; a second synchronization detection circuit, for estimating a synchronization position of the second estimated sampled signal; a second channel estimator, for producing a second channel estimate based on the second estimated synchronization position; an equalizer, for processing the second estimated sampled signal based on the second channel estimate; and a control unit, for determining whether or not to apply signals to the second synchronization detection circuit and the second channel estimator based on an estimate of the signal quality.