Patent ID: 7183613
Filing Date: 2007-02-27
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a first MOSFET device of a first type including a first gate conductor stack of first height over a first channel region, said first channel region under stress of a first type, wherein said first gate stack is overlain by a first stressing material causing said stress of a first type; and a second MOSFET device of a second type including a second gate conductor stack over a second channel region, said second gate stack having a height less than said first height, and a second channel region under said second gate stack under stress of a second type, wherein said second gate stack is overlain by a second stressing material causing a stress of a second type different than said stress of said first type wherein said second stressing material is delimited by at least one discontinuity in said second stressing material adjacent said second gate conductor, said discontinuity separating said second stressing material from said first stressing material, and wherein said at least one discontinuity in said second stressing material is located at a distance from said second gate stack so that said stress of a second type is maximized in said second channel region.