Patent ID: 6958505
Filing Date: 2005-10-25
Classification: H01L

Abstract:
1. An integrated circuit including a plurality of transistors, a plurality of passive components, and a level of local metal connections formed within a first insulating layer that is deposited on top of the transistors of the integrated circuit, said integrated circuit comprising; a first metal terminal constituting a first stage of contact between one active area of the integrated circuit and a first level of interconnection, having a lower surface that contacts the one active area of the integrated circuit, and having an upper surface that contacts a second stage of contact between the one active area of the integrated circuit and the first level of interconnection; a second metal terminal vertically connecting one active area of the integrated circuit to a passive component that directly contacts the upper surface of the first insulating layer; a third metal terminal horizontally connecting two separate active areas of the integrated circuit; and a second insulating layer above the first insulating layer, the passive component being set into a cavity formed throughout the thickness of the second insulating layer, wherein each of the first, second, and third metal terminals consists of a single layer of metal formed within a cavity passing completely through the thickness of the first insulating layer such that the metal terminal passes completely through the thickness of the first insulating layer.