Patent ID: 8046528
Filing Date: 2011-10-25
Classification: G06F

Abstract:
1. A data writing method suitable for a block of a multi level cell NAND flash memory, wherein the block comprises a plurality of upper page addresses and a plurality of lower page addresses respectively corresponding to the upper page addresses at which a writing speed is higher than that at the upper addresses, the data writing method comprising: (a) receiving a writing command and new data corresponding to the writing command and executing step (b); (b) determining whether an address to be written with the new data is one of the upper page addresses and only when the address to be written with new data is one of the upper page addresses, executing step (c) and when the address to be written with new data is not one of the upper page addresses, executing step (d); (c) continuously copying a plurality of old data from a first lower page address and at least one second lower page address as old data backups and executing step (d), wherein the first lower page address corresponds to the address to be written and the at least one second lower page address is located between the address to be written and the first lower page address; and (d) writing the new data to the address to be written.