Patent ID: 9203557
Filing Date: 2015-12-01
Classification: H04L

Abstract:
1. A receiver comprising: a memory; and a processor coupled to the memory and configured to: calculate a plurality of soft decision values of each of a plurality of bits mapped to a received symbol, select a first soft decision value from the plurality of soft decision values, calculate at least one relative value in at least one second soft decision value of the plurality of soft decision values, each of the at least one relative value being a relative value of each of the at least one second soft decision value with respect to the first soft decision value, the first soft decision value being a soft decision value of a first bit in the plurality of bits, each of the at least one second soft decision value being a soft decision value of each of at least one second bit in the plurality of bits, the first bit and each of the at least one second bit being different bits in the plurality of bits mapped to the received symbol, store the first soft decision value and the at least one relative value in the memory, and estimate the plurality of bits based on the first soft decision value and the at least one relative value which are stored in the memory.