Patent ID: 6203967
Filing Date: 2001-03-20
Classification: H01L,H05K

Abstract:
A method for forming a high density interconnect printed wiring board substrate having a first patterned conductive layer formed over an upper surface of the substrate, said first patterned conductive layer including a plurality of conductive lines having edges that define boundaries of said conductive lines, said substrate also having a dielectric layer formed over said first patterned conductive layer and between the edges of said conductive lines, said method comprising:(a) forming a thin film conductive layer over said dielectric layer; and(b) patterning said thin film conductive layer such that after said patterning step said thin film conductive layer overlies said edges of said conductive lines, wherein said thin film conductive layer is patterned such that, after said patterning step, said thin film conductive layer overlies said edges of said conductive lines by at least 10 microns.