Patent ID: 6815783
Filing Date: 2004-11-09
Classification: B82Y,H01L

Abstract:
A single transistor type magnetic random access memory device comprising:a substrate; first and second doped regions which are spaced apart from each other and are formed by implanting dopants into the semiconductor substrate; a gate dielectric layer formed on a portion of the semiconductor substrate between the first and second doped regions; a magnetic tunnel junction formed on the gate dielectric layer; word lines formed on the magnetic tunnel junction and extending in a first direction which is a same direction as the second doped region; bit lines connected to the first doped region in a second direction perpendicular to the first direction; an insulating layer for covering the gate dielectric layer, the magnetic tunnel junction, and the word lines to insulate the gate dielectric layer, the magnetic tunnel junction, and the word lines from the bit lines; and metal strapping lines which are parallel to sources disposed parallel to the word lines and are connected to sources in a predetermined number of memory devices, wherein the first and second doped regions, the gate dielectric layer, and the magnetic tunnel junction constitute a single transistor.