Patent ID: 6522684
Filing Date: 2003-02-18
Classification: H04B

Abstract:
A delay lock loop, which generates a sample clock and a data clock by tracking a code synchronization between a transmission side and receiving side based upon an in-phase correlation signal between an in-phase component of a complex spectrum spreading signal and a spread code sequence and an orthogonal correlation signal between an orthogonal component of the complex spectrum spreading signal and the spread code sequence, said delay lock loop comprising:a correlation power generation unit which squares the in-phase correlation signal and the orthogonal correlation signal respectively, and adds the in-phase correlation signal and the orthogonal correlation signal that have been squared so as to generate a correlation electric power; a delay correction unit which divides the correlation electric power into N (integer not less than 2) number of portions, and gives the respective portions first delay times different from each other so as to allow the respective electric power portions to have coincided peak timing; a composite correlation power generation unit which adds the respective electric power portions so as to generate a composite correlation power; a composite error signal generation unit which gives a second delay time to the composite correlation power, and generates a composite error signal indicating an advance/delay of the timing phase of the sampling clock by subtracting the composite correlation power that has been added from the composite correlation power that has been delayed; a data clock generation unit which frequency-divides the sample clock based upon an acquisition pulse that is synchronous to the spread code sequence to generate a data clock; and a sample clock generation unit which gives a third delay time to the data clock, eliminates a noise component from the composite error signal that has been latched in synchronized timing with the data clock that has been delayed, and generates a sample clock based upon the composite error signal that has been noise-eliminated.