Patent ID: 8470706
Filing Date: 2013-06-25
Classification: H01L

Abstract:
1. A method for fabricating an interconnect structure comprising: forming an intermetal dielectric layer on a substrate; forming a hard mask directly on said intermetal dielectric layer; forming a via hole within said hard mask and within said intermetal dielectric layer and filling a lower portion of said via hole with a disposable via fill material; forming a line trench in said intermetal dielectric layer over said via hole; forming a sacrificial layer on sidewalls of said line trench and on sidewalls of an upper portion of said via hole, while keeping a bottom surface of said line trench nominally exposed, wherein said sacrificial layer includes a polymeric material containing carbon, hydrogen, fluorine, and silicon; and performing a plasma strip to remove said disposable via fill material, while portions of said intermetal dielectric layer underneath said sidewalls of said line trench and underneath sidewalls of an upper portion of said via hole are protected by said sacrificial layer from damage during said plasma strip, wherein said sacrificial layer is consumed during said plasma strip.