Patent ID: 6221725
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A method of fabricating a silicide layer on a gate, electrode, comprising the steps of:forming a gate oxide layer on a substrate;forming a gate electrode on a first portion of the gate oxide layer;forming a spacer on a sidewall of the gate electrode to cover a second portion of the gate oxide layer;removing the exposed portion of gate oxide layer;removing the spacer to expose the second portion of the gate oxide layer;after removing the spacer to expose the second portion of the gate oxide layer, forming a metallic layer over the substrate to cover a top surface and the sidewall of the gate electrode and the exposed gate oxide layer;performing an annealing step to transform the metallic layer in contact with the gate electrode and the source/drain region into a silicide layer; andremoving the remaining metallic layer.