Patent ID: 6366529
Filing Date: 2002-04-02
Classification: G06F

Abstract:
A FIFO memory storage system comprising:a plurality of RAM memory storage elements; a write ring-counter operatively coupled to the plurality of RAM memory storage elements and operative to communicate with the plurality of RAM memory storage elements such that data words can be selectively written into the plurality of RAM memory storage elements; a read ring-counter operatively coupled to the plurality of RAM memory storage elements and operative to communicate with the plurality of RAM memory storage elements such that data words can be selectively read from the plurality of RAM memory storage elements; a data selector operatively coupled to the read ring-counter and the plurality of RAM memory storage elements; a data output register; and a multiplexer operatively coupled to the plurality of RAM memory storage elements, the data selector and the data output register and operative to selectively transfer data from the plurality of RAM memory storage elements to the data output register via the data selector.