Patent ID: 6847235
Filing Date: 2005-01-25
Classification: H03K

Abstract:
1. An output driver circuit for generating an output signal comprising: a predriver circuit coupled to first and second transistors forming a first complementary MOS transistor pair, the first transistor being coupled to a voltage supply and the second transistor being coupled to a reference voltage supply; third and fourth transistors forming a second complementary MOS transistor pair, the third transistor being coupled between a source-drain path of the first transistor and an output, the fourth transistor being coupled between a source-drain path of the second transistor and the output, a gate of the third transistor and the fourth transistor being coupled to the output and a back gate of at least one of the third and fourth transistors being coupled to the output; a steady state output circuit for generating a first portion of the output signal, wherein the first and second complementary MOS transistor pairs provide an additional portion of the output signal during switching transitions of the output signal; and first and second diodes coupled across source-drain paths of the third and fourth transistors.