Patent ID: 8053810
Filing Date: 2011-11-08
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a handle substrate; a buried insulator layer located on an upper surface of said handle substrate; a single crystalline group IV semiconductor structure having a first lattice constant and comprising a material selected from silicon, germanium, carbon and an alloy thereof located directly on at least one portion of an upper surface of the buried insulator layer; a near-infrared transparent layer in direct contact with an upper surface of said single crystalline group IV semiconductor structure; a single crystalline lattice mismatched group IV semiconductor alloy layer containing a top portion having a second lattice constant located directly on another portion of the upper surface of the buried insulator layer, wherein said second lattice constant is different from said first lattice constant, and wherein the buried insulator layer electrically isolates an entire lower surface of the single crystalline mismatched group IV semiconductor alloy layer from the handle substrate; and a stack of single crystalline compound semiconductor layers, said stack comprising, from bottom to top: