Patent ID: 8279967
Filing Date: 2012-10-02
Classification: H04B,H04J

Abstract:
1. A code division multiplex signal transmitter comprising: an operational circuit for adding up input coded transmission data on a plurality (N) of channels, where N is a natural number more than unity, to produce resultant added data, and for producing pieces of bit transmission data which are indicative of values of respective bits of the added data, when expressed in binary form, the pieces of bit transmission data being equal in number to a number (M) of bit position or positions of the added data when expressed in the binary form, where M is a natural number not less than unity; a modulator unit including a modulator or modulators corresponding in number to the number (M) of the bit position or positions of the added data, a k-th modulator, where k is an integer of 1 to M, inclusive, modulating a k-th piece of bit transmission data to produce a k-th bit modulated signal whose maximum amplitude level is equal to 2 wherein said operational circuit comprises: an adder for adding up the input coded transmission data on the plurality (N) of channels to produce the added data; and wherein said operational circuit further comprises an offset calculator for calculating an amount of offset adjustment A(N) in respect of the plurality (N) of channels by using a formula of where a is an integer satisfying 2 a ≦N≦2 a+1 −1, said transmitter further comprising an offset adjuster for adjusting a direct current level of the code division multiplex signal according to the amount of offset adjustment A(N).