Patent ID: 8376238
Filing Date: 2013-02-19
Classification: G06K,H01L

Abstract:
1. A semiconductor storage device comprising: a memory chip comprising a memory circuit; a controller chip comprising a control circuit to control the memory circuit; a circuit board comprising opposite first and second surfaces and an array of external connection terminals on the first surface, the memory chip and the controller chip being provided on the second surface; an array of connection pads provided on the second surface of the circuit board and outside the memory chip at an external connection terminal side, and connected to the controller chip; an array of resistor devices provided on the second surface and provided along the array of connection pads at the opposite side of the memory chip, the resistors being connected at respective one ends to the connection pads; conductive plugs provided outside near-memory-chip ends of the external connection terminals, and penetrating the first surface and the second surface; a first wiring provided on the second surface, connected at one end to the other end of one resistor device, passing outside the array of resistor devices and outside the array of connection pads, and connected at the other end to one plug at the second surface; and a second wiring provided on the first surface, and connecting one plug and one external connection terminal.