Patent ID: 9099250
Filing Date: 2015-08-04
Classification: H01G

Abstract:
1. A multilayer ceramic capacitor to be embedded in a board, comprising: a ceramic body having a plurality of dielectric layers laminated therein; a plurality of first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, having each of the dielectric layers interposed therebetween; first and second external electrodes formed on both end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively; and first and second plating layers enclosing the first and second external electrodes, wherein when a distance from one end of bands of the first or second external electrode to the other end thereof is defined as A and a distance between points at which a virtual line drawn from a point vertically spaced apart from a surface of the first or second plating layer at a point ½×A from one end of the bands inwardly of the ceramic body by 3 μm in a length direction of the ceramic body intersects points on the surface of the first or second plating layer is defined as B, B/A≧0.6 is satisfied.