Patent ID: 6492225
Filing Date: 2002-12-10
Classification: H01L

Abstract:
A process for making a semiconductor device comprising the steps of:performing a LOCOS operation on an epitaxial layer of a semiconductor substrate to define an active region having a predefined boundary; implanting a first dopant into the epitaxial layer within the active region to create a well of a first type of conductivity; depositing a polysilicon layer over the active region; doping the polysilicon layer to create a poly semiconductor layer of a second type of conductivity; patterning the poly semiconductor layer to create a poly gate over the well and across the active area, the poly gate having first and second ends and a center; performing an ion implant of the second type conductivity between the LOCOS regions and the poly gate to create first and second lightly doped regions, the first and second lightly doped regions being separated by a channel region beneath the poly gate and having a predefined width and length with the width being less than the length and the first lightly doped region being in alignment with the center of the poly gate; depositing an oxide layer over the poly gate and active region; etching the oxide layer to create side spacers on each side of the poly gate; and implanting a heavy dose of the second type of dopant between the LOCOS regions and the side spacers to create source and drain regions, the source and drain regions being separated by the channel region.