Patent ID: 6153476
Filing Date: 2000-11-28
Classification: H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:forming first gate electrodes of a plurality of first transistors, which constitute a memory cell section in a memory cell region on a semiconductor substrate, and forming a second gate electrode of at least one second transistor, which constitutes a peripheral circuit section, in a peripheral circuit region on the semiconductor substrate;depositing a first insulative material on an entire surface of the semiconductor substrate on which the first and second gate electrodes are formed;selectively removing the first insulative material, and thereby forming a first side-wall insulation film of a first insulator on a side-wall portion of each of the first gate electrodes and forming a first insulator on a side-wall portion of the second gate electrode;depositing a second insulative material on the exposed surface of the semiconductor substrate on which the first insulators are formed, there being a desired etching ratio between the first insulative material and the second insulative material;selectively removing the second insulative material to leave a portion of the second insulative material between the first gate electrodes including the first insulator so as to cover the surface of the substrate between the first gate electrodes, and forming a second side-wall insulation film of the first insulator and a second insulator on the side-wall portion of the second gate electrode including the first insulator;forming an interlayer insulation film on the entire surface of the semiconductor substrate after the second side-wall insulation film is formed, there being a desired etching ratio between the interlayer insulation film and the first insulative material; andselectively removing the interlayer insulation film and the second insulative material to form a contact hole in self-alignment with each of the first gate electrodes, the contact hole reaching the surface of the semiconductor substrate.