Patent ID: 7668892
Filing Date: 2010-02-23
Classification: G06F

Abstract:
1. A data processing apparatus for normalizing a data value to produce a result value, comprising: prediction logic circuitry configured to generate a shift indication based on a prediction of the number of bit positions by which the data value needs to be shifted in order to normalize the data value; normalizer logic circuitry configured to apply a shift operation to the data value based on the shift indication; correction logic circuitry configured to operate in parallel with the normalizer logic circuitry and to determine from the data value and a least significant bit of the shift indication whether the shift indication has correctly predicted the number of bit positions by which the data value needs to be shifted in order to normalize the data value, or whether instead the prediction is incorrect, and to generate an output signal dependent on that determination; and shift logic circuitry configured, if the output signal indicates that the prediction is incorrect, to apply a correction shift such that the result value is the normalized data value, wherein the correction logic circuitry is configured to determine from the data value whether the leading one in that data value is at an even bit position or an odd bit position, and then to determine with reference to the least significant bit of the shift indication whether application of the shift operation based solely on the shift indication will cause the data value to be normalized.