Patent ID: 6401217
Filing Date: 2002-06-04
Classification: G06F

Abstract:
A method for recognizing errors in a processor system working with a plurality of programs and which contains at least one processor, comprising the steps of:sending information from a first program to a second program; the second program checking the information received for an error; if an error is detected, the second program then becomes a reporting program, classifies the first program as a faulty program, and outputs an error message to an operating system of the processor, the error message indicating information classified as faulty, the faulty program, and the reporting program; providing the operating system with at least one error message table in which are stored a number of said error messages for programs respectively classified as faulty, each error message indicating the information classified as faulty, the faulty program, and the reporting program; the operating system deleting error messages that are older than a specified monitoring time interval; the operating system initiating an error elimination measure when the number of error messages reaches a threshold; and with the operating system, resetting the program classified as faulty.