Patent ID: 7135764
Filing Date: 2006-11-14
Classification: H01L,H01R

Abstract:
1. A shielded semiconductor chip carrier, comprising: a housing for holding a semiconductor die; a semiconductor die housed within said housing; said housing including a conductive substrate having a plurality of parallel, plated-through holes therein; a corresponding plurality of elongated, electrically conductive first blade contacts, each first blade contact having a dielectric bead material disposed about an intermediate portion thereof, each said first blade contact being press fit into a plated-through hole so that the first blade contact is electrically isolated from said substrate, each said first blade contact having an external portion outside of said substrate and an internal portion within the interior of said substrate, said external portion being electrically connected to said semiconductor die; and a socket including a second conductive substrate having a plurality of parallel, plated-through holes therein, a corresponding plurality of elongated, electrically conductive second blade contacts, each said second blade contact having a dielectric bead material disposed about an intermediate portion thereof, each said second blade contact being press fit into a plated-through hole of said second conductive substrate so that each said second blade contact is electrically isolated from said second conductive substrate, each of said second blade contacts having an external portion outside of said second conductive substrate for connection to a connector component, and an internal portion within the interior of said second conductive substrate for connection to the corresponding internal portion of said first blade contact, said housing and socket being interconnected such that the semiconductor die is electrically connected to the connector component by shielded electrical connections.