Patent ID: 9082887
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A method of manufacturing an integrated circuit package comprising: providing a semiconductor wafer having a chip pad formed thereon, an active side of the semiconductor wafer is in direct contact with a top side of the chip pad and the chip pad includes a lateral sidewall exposed from the semiconductor wafer; providing a wafer frame having a protruding connector formed thereon and extending therefrom; attaching the wafer frame to the semiconductor wafer with a bonding material such that the protruding connector contacts the chip pad; forming an underfill between the wafer frame and the semiconductor wafer such that the underfill forms around the protruding connector, wherein forming the underfill includes forming the underfill in direct contact with the lateral sidewall of the chip pad; and removing the wafer frame exposing the underfill and the protruding connector, wherein the underfill and the protruding connector are substantially planar.