Patent ID: 7534629
Filing Date: 2009-05-19
Classification: G01R

Abstract:
1. A manufacturing method of semiconductor integrated circuit devices comprising the steps of: (a) preparing a semiconductor wafer which is partitioned into a plurality of chip areas, a semiconductor integrated circuit being formed in each of the chip areas, and in which a plurality of first electrodes to be electrically connected to said semiconductor integrated circuits are formed over the main face thereof; (b) preparing a first card having a wiring board over which a first wiring is formed; a plurality of first sheets wherein a plurality of contact terminals to be brought into contact with the first electrodes and a second wiring to be electrically connected to the contact terminals are formed, said second wiring is electrically connected to said first wiring, and the tips of the contact terminals are opposite the main face of said semiconductor wafer, a plurality of sheet holding devices which hold on the bottom face matching ones of the first sheets and are held by said wiring board, a plurality of third wirings for electrically connecting said second wiring and said first wiring, and a plurality of pressing mechanisms for pressing from the rear face a plurality of first areas out of said first sheets in which one or more of said contact terminals are formed; and (c) electrically testing said semiconductor integrated circuits by bringing said tips of the contact terminals into contact with the first electrodes, wherein the first sheets are formed by a process including the steps of: (b1) preparing one first substrate having crystallinity; (b2) forming a plurality of pyramidal or prismoidal first holes by selectively and anisotropically etching said first substrate; (b3) selectively forming above each of the first holes a plurality of first metal films into which the first holes are to be embedded; (b4) forming a first polyimide film over said first substrate and the first metal films; (b5) forming a plurality of first openings reaching the first metal films by selectively etching said first polyimide film; (b6) forming over said first polyimide film a second metal film into which the first openings are to be embedded, and forming by patterning said second metal film a plurality of said second wirings to be electrically connected to the first metal films; (b7) forming a second polyimide film over the second wirings and said first polyimide film; (b8) adhering a second sheet onto said first substrate, and forming by patterning said second sheet a plurality of second openings in said second sheet over said first metal film; (b9) forming a plurality of elastomers to be embedded into the second openings, in a state in which said second sheet is adhered onto said first substrate, in the second openings; (b10) removing said first substrate, forming the contact terminals from the first metal films, and forming one thin-film sheet containing the contact terminals, said first and second polyimide films, the second wirings, said second sheet and the elastomers; and (b11) cutting said thin-film sheet along divided areas to form the first sheets, wherein one of said first sheets matches one or more of said chip areas, and wherein the first sheets formed at said step (b11) are incorporated into one said first card.