Patent ID: 6031478
Filing Date: 2000-02-29
Classification: H03M

Abstract:
A digitizer with increased dynamic range having an analog input and a digitized output consisting of P-bit samples, the digitizer comprising:a gain(attenuation) stage having N channels, each for applying a respective gain or attenuation to said analog input to produce a respective scaled analog signal, where N is an integer greater than or equal to two;N M-bit analog-to-digital converters, each connected to receive a respective one of said scaled analog signals, each for producing a respective M-bit digital sample of the respective one of the scaled analog signals, where M is the sample bit length of the M-bit analog-to-digital converters;a switching circuitry connected to receive as inputs all of said respective M-bit digital samples, for outputting one of the P-bit samples as a function of a selected one of the respective M-bit digital samples, where P>M;an overload detect circuit for selecting the selected one of the respective M-bit digital samples;the overload detect circuit comprising a hysteresis functional block which prevents the switching circuitry from switching between analog-to-digital converters at too rapid a frequency.