Patent ID: 6184571
Filing Date: 2001-02-06
Classification: B24B,H01L,Y10S

Abstract:
A microelectronic substrate, comprising:a semiconductor material having a first surface and a second surface opposite the first surface, the first surface having a device region and at least one isolating region adjacent the device region, semiconductor material being removed from at least one of the device region and the isolating region so that the device region and the isolating region are located at different distances from the second surface of the semiconductor material;a first material disposed on the device region of the semiconductor material;a second material disposed on the first material; andan endpointing material disposed on the second material, the endpointing material having a hardness that is less than a hardness of the second material wherein the first, second and endpointing materials together define a stack, further wherein a thickness of the endpointing material is in the range of approximately 10% to approximately 90% of a thickness of the stack.