Patent ID: 6032256
Filing Date: 2000-02-29
Classification: G06F

Abstract:
In a computer comprising a processor, a memory having a BIOS portion, an input device, and one or more data transfer ports, a method implemented in BIOS for disabling at least one of the one of more data transfer ports, the method comprising the steps of:inputting, at any time during an ON state of the computer, a sequence to the processor via the input device, the input sequence including only control characters;generating a first signal, via the processor, in response to the input sequence; anddisabling, via the processor, said at least one of the one or more data transfer ports in response to the first signal;wherein the memory has a hotkey sequence stored therein, and the processor comprises a system interrupt handler, andwherein the step of generating a first signal comprises the steps of:determining if the input sequence matches the hotkey sequence stored in the memory;generating an interrupt signal, via the processor in response to the determining step; andgenerating, via the system interrupt handler, a device signal to disable said at least one of the one or more data transfer ports in response to the interrupt signal,wherein the input sequence is capable of being inputted via the input device during a boot operation of the computer and during a post-boot, normal operation of the computer, so as to result in either case in the disabling of the one or more data transfer ports without having to reboot the computer.