Patent ID: 6486929
Filing Date: 2002-11-26
Classification: A61B,G02B,G02F,G09G,H01L,H01S,H04N,H05B

Abstract:
A semiconductor device comprising:a semiconductor layer having an insulator region and a plurality of transistors extending over the insulator region, each transistor including a silicon region defining a source and a drain, a gate, a first oxide layer separating the source and drain from the gate, a second oxide layer extending over the gate, and conductive interconnects, at least one of said interconnects extending from the transistor through the second oxide layer; a plurality of pixel electrodes extending over a surface of the semiconductor layer; each pixel electrode conductively connected to the interconnect extending through the second oxide layer of a corresponding transistor; a bonding layer extending over the semiconductor layer; a supporting substrate, the bonding layer bonding the semiconductor layer to the supporting substrate; and a protective layer extending between the bonding layer and a surface of the semiconductor layer that is adjacent to the transistors and opposite the insulator region.