Patent ID: 6272513
Filing Date: 2001-08-07
Classification: G06F

Abstract:
A multiplying device for implementing multiplication between multiplicand data and multiplier data in a two's complement representation form, the multiplicand data and the multiplier data each having n bits, where n denotes a predetermined even number, the multiplying device comprising:1-bit extension means for executing a 1-bit sign extension of the multiplicand data to generate data having n+1 bits, and for outputting the data having n+1 bits;partial product generation means for generating n/2 partial product data pieces on the basis of the data having n+1 bits which is outputted from the 1-bit extension means and on the basis of the multiplier data according to second-order Booth's algorithm, the n/2 partial product data pieces each having n+1 bits; andaddition means including a plurality of adders connected and arranged in a tree configuration, the adders adding the n/2 partial product data pieces generated by the partial product generation means, the adders including a final-stage adder which outputs multiplication result data representing a product of the multiplicand data and the multiplier data, the multiplication result data having 2n-1 bits;wherein the adding means includes a plurality of sign extension means for implementing sign extensions of one data pieces, which correspond to lower bits of the multiplier data, in pairs of data pieces inputted into the adders.