Patent ID: 8254152
Filing Date: 2012-08-28
Classification: H02M

Abstract:
1. A high-voltage-resistant rectifier implemented with standard CMOS transistors, comprising from a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor as base structure, characterized in that includes: in the said bridge full-wave rectifier, a sixth MOS transistor or a first capacitor is connected in series between the gate of a third MOS transistor which endures high voltage and a second input terminal of the rectifier to decrease the voltage imposed on the gate of the said third MOS transistor; a seventh MOS transistor is connected in series between the source of the said third MOS transistor and a first input terminal of the said rectifier, and the voltage between the source and the drain of the said seventh transistor is used to divide the voltage imposed by positive and negative AC input signal between the gate and the source of the said third transistor; in the said bridge full-wave rectifier, a fifth MOS transistor or a second capacitor is connected in series between the gate of a fourth MOS transistor which endures high voltage and the first input terminal of the rectifier to decrease the voltage imposed on the gate of the said fourth MOS transistor; an eighth MOS transistor is connected in series between the source of the said fourth MOS transistor and the second input terminal of the said rectifier, and the voltage between the source and the drain of the said eighth MOS transistor is used to divide the voltage imposed by positive and negative AC input signal between the gate and the source of the said fourth transistor; and when the first and the second MOS transistors in the said bridge full-wave rectifier need to endure high voltage, a ninth MOS transistor or a third capacitor is connected in series between the gate of the first MOS transistor and the second input terminal of the rectifier to decrease the voltage imposed on the gate of the said first MOS transistor; and a tenth MOS transistor or a fourth MOS capacitor is connected in series between the gate of the second MOS transistor and the first input terminal of the rectifier to decrease the voltage imposed on the gate of the said second MOS transistor.