Patent ID: 6684277
Filing Date: 2004-01-27
Classification: G06F

Abstract:
A method for automatically verifying bus transactions, comprising the steps of:(a) parsing a parameter code for the bus transactions, wherein the parameter code comprises a plurality of expected parameter values for the bus transactions, wherein the parsing step (a) comprises: (a1) extracting the plurality of expected parameter values in a Bus Functional Language (BFL) format from the parameter code, (a2) associating BFL names of the plurality of expected parameter values with appropriate Hardware Description Language (HDL) names, and (a3) translating the plurality of expected parameter values from the BFL format to a HDL array element format; (b) automatically integrating the parsed parameter code into a checking program; and (c) automatically executing the checking program, wherein the checking program compares the plurality of expected parameter values with a plurality of actual parameter values for the bus transaction.