Patent ID: 8228096
Filing Date: 2012-07-24
Classification: H04L

Abstract:
1. An output driver circuit comprising: a first pre-driver stage that receives a first data signal and generates a buffered first data signal; a second pre-driver stage that receives the first data signal, the second pre-driver stage including a plurality of first differential pairs that perform current subtraction of a first data signal delayed by a predetermined time from the first data signal to output a second data signal; and an output driver stage electrically coupled to the pre-driver stages that receives the buffered first data signal and the second data signal from the pre-driver stages, the output driver stage including a plurality of second differential pairs that perform current summation of the buffered first data signal from the first pre-driver stage and the second data signal from the second pre-driver stage to transmit an output signal, which is a pre-emphasized signal of the first data signal, along transmission lines.