Patent ID: 6489937
Filing Date: 2002-12-03
Classification: G09G

Abstract:
A light emitting diode (LED) matrix control system, comprising:a matrix LED display including a plurality of LEDs controlled by a plurality of row lines and a plurality of column lines; a first field programmable gate array (FPGA) with a first FPGA programming input and first control outputs connected to said matrix LED display; a second FPGA with a second FPGA programming input and second control outputs connected to said matrix LED display, said second FPGA being substantially identical to said first FPGA, said control outputs of said FPGAs being connected to said plurality of row and column lines; a central processing unit(CPU) connected to said first FPGA via said first FPGA programming input and connected to said second FPGA via said second FPGA programming input with said first FPGA programming input and said second FPGA programming input being connected to said CPU in parallel and being programmed as one FPGA, each of said FPGAs including column control means for only enabling said column lines when one of said LEDs in a respective said column line is to be enabled and a respective said row line of said one LED is enabled.