Patent ID: 6133118
Filing Date: 2000-10-17
Classification: H01L

Abstract:
A method for fabricating an isolation region in a substrate, said method comprising the steps of:forming a first pad oxide layer on said substrate;forming a silicon nitride layer on said first pad oxide layer;etching said first pad oxide layer to form a cave in said first pad oxide layer, said cave being at a bottom of said silicon nitride layer;forming a second pad oxide layer on said substrate;depositing a polysilicon layer over said substrate, said polysilicon layer filling said cave of said first pad oxide layer;forming a sidewall spacer against sides of said first pad oxide layer, said silicon nitride layer, said second pad oxide layer;forming a recessed structure on said substrate by using said first pad oxide layer, said silicon nitride layer, said second pad oxide layer as masks;forming said isolation region in said recessed structure;removing said silicon nitride layer; andremoving said first pad oxide layer.