Patent ID: 9053960
Filing Date: 2015-06-09
Classification: H01L

Abstract:
1. An integrated circuit, comprising: a capacitor including first and second transistors each having first, second and third nodes, wherein the first and second nodes of the first transistor are connected together, the first and second nodes of the second transistor are connected together, and the third node of the first transistor is connected to the third node of the second transistor; and a first rail connected to the first and second nodes of the first transistor, and a second rail connected to the first and second nodes of the second transistor, wherein the capacitor further comprises multiple conductive layers connecting the first and second nodes of the first transistor to the first rail and connecting the first and second nodes of the second transistor to the second rail, and wherein the multiple conductive layers comprise a first conductor and a second conductor having the second conductor formed over the first conductor, wherein the first conductor has a width smaller than a width of the second conductor.