Patent ID: 6791407
Filing Date: 2004-09-14
Classification: H03F

Abstract:
An amplifier comprising:a first stage having at least two power states comprising a first power device and a second power device connected in parallel with said first power device, said first stage having an input for receiving a data signal, a control port, and an output; a second stage having at least two power states comprising a third power device and a fourth power device connected in parallel with said third power device, said third power device and said fourth power device each having an output, said second stage having an input coupled to the output of said first stage, a control port, and a second stage output comprising a combination of said outputs of said third power device and said fourth power device; an output impedance matching circuit having at least two impedance matching states, said output impedance matching circuit having an input coupled to the second stage output, a control port, and an output for coupling to a load; and a state determination circuit coupled to the control port of said first stage for selectively configuring said first stage in one of the at least two power states and further coupled to the control port of said second stage for selectively configuring said second stage in one of the at least two power states and further coupled to the control port of the output impedance matching circuit for selectively configuring said output impedance matching circuit in one of the at least two impedance matching states.