Patent ID: 6064096
Filing Date: 2000-05-16
Classification: H01L

Abstract:
A semiconductor device comprising:a substrate having a first region and a second region;a first gate structure and a second gate structure formed on the first region and the second region, respectively;first impurity regions formed in the first region on each side of the first gate structure;second impurity regions formed in the first region adjacent to each of the first impurity regions;third impurity regions formed in the second region on each side of the second gate structure;fourth impurity regions formed adjacent to each of the third impurity regions;halo impurity regions formed adjacent to each of the one of the second impurity regions and the fourth impurity regions, and the halo impurity regions being of an impurity type opposite an impurity type of the one of the second impurity regions and the fourth impurity regions to which the halo impurity regions are formed adjacent.