Patent ID: 7759720
Filing Date: 2010-07-20
Classification: G11C,H01L

Abstract:
1. A nonvolatile semiconductor memory device, wherein a plurality of memory cells comprise a field effect transistor having: a first semiconductor region of a first conductive type arranged on the main surface of a semiconductor substrate and constitutes a well; a gate arranged on the first semiconductor region through an insulating film; and a second semiconductor region of a second conductive type opposite to the first conductive type and a third semiconductor region of the second conductive type which are arranged on the first semiconductor region so as to sandwich a channel region at a lower part of the gate and constitute a drain/source, the plurality of memory cells are arranged in a first direction and a second direction intersecting the first direction on the main surface of the semiconductor substrate in matrix, and the plurality of memory cells are arranged in a plurality of regions sectioned by a plurality of isolations that are deeper than the first semiconductor region and extend in the second direction, wherein the respective second semiconductor regions of the plurality of memory cells are electrically connected by a first wiring extending in the first direction, the respective third semiconductor regions of the plurality of memory cells are electrically connected by a second wiring extending in the second direction, a contact is provided in the first semiconductor region so as to penetrate through the third semiconductor region, and the contact connecting the second wiring and the third semiconductor region electrically is also electrically connected to the first semiconductor region.