Patent ID: 8962400
Filing Date: 2015-02-24
Classification: H01L,Y10S

Abstract:
1. A method comprising: forming isolation regions in a semiconductor substrate; etching a portion of the semiconductor substrate between opposite sidewalls of the isolation regions to form a first recess; epitaxially growing a first silicon germanium layer in the first recess, wherein the first silicon germanium layer has a first germanium concentration; epitaxially growing a second silicon germanium layer in the recess and over the first silicon germanium layer, wherein the second silicon germanium layer has a second germanium concentration lower than the first germanium concentration; forming a gate stack over the second silicon germanium layer; recessing the second silicon germanium layer to form a second recess adjacent the gate stack; and epitaxially growing a silicon-containing semiconductor region in the second recess to form a source/drain stressor, wherein arsenic is in-situ doped during the step of epitaxially growing the silicon-containing semiconductor region, wherein the silicon-containing semiconductor region comprises silicon germanium stressor having a third germanium concentration lower than the first germanium concentration and the second germanium concentration.