Patent ID: 7191420
Filing Date: 2007-03-13
Classification: G06F

Abstract:
1. A net/wiring selection method for selecting, from among nets/wirings wired on the basis of layout information, a net/wiring whose layout is to be changed with priority in order to improve a delay, said method comprising: a wiring capacitance lower limit computation step for computing wiring capacitance lower limits of respective wirings on the basis of said layout information; an inter-wiring capacitance computation step for computing, as an inter-wiring capacitance, a difference between a real wiring capacitance and the wiring capacitance lower limit computed in said wiring capacitance lower limit computation step; a parallel wiring length extraction step for extracting a parallel wiring length existing between adjacent wirings of said respective wirings, on the basis of said layout information; and a selection step for selecting a net/wiring whose layout is to be changed, on the basis of said inter-wiring capacitance computed in said inter-wiring capacitance computation step, said parallel wiring length extracted in said parallel wiring extraction step, and a slack value.