Patent ID: 7308048
Filing Date: 2007-12-11
Classification: H04L

Abstract:
1. A clock recovery circuit comprising: a. transition detector that receives a plurality of data transitions of various data-transition types, the transition detector including a plurality of data-transition output terminals, each data-transition output terminal producing a data-transition signal in response to a respective one of the data-transition types; b. transition select logic having a plurality of select-logic input nodes, a select-logic output node, and select-logic control terminals, each select-logic input node coupled to a respective one of the data-transition output terminals, wherein the transition select logic conveys at least one of the data-transition signals from a respective one of the select-logic input nodes to the select-logic output node in response to select-logic control signals to the select-logic control terminals; and c. a select-logic control circuit having control-circuit output terminals coupled to the select logic control terminals;