Patent ID: 7251173
Filing Date: 2007-07-31
Classification: G11C

Abstract:
1. A column redundancy system for a memory array having a plurality of memory sub-arrays including memory cells arranged in rows and columns of memory, the plurality of memory sub-arrays coupled to respective sense amplifiers, the column redundancy system comprising: a plurality of sets of local redundant columns of memory, each set of local redundant columns of memory associated with a corresponding one of the plurality of memory sub-arrays, the columns of memory of the sets of local redundant columns of memory adapted to replace defective columns of memory of the respective memory sub-arrays; and shared redundant memory having memory cells arranged in rows and columns of memory, the columns of memory of the shared redundant memory adapted to replace defective columns of memory of the plurality of memory sub-arrays, the shared redundant memory coupled to respective sense amplifiers that are separate from the respective sense amplifiers of the plurality of memory sub-arrays.