Patent ID: 6476467
Filing Date: 2002-11-05
Classification: H01L

Abstract:
A semiconductor device comprising:(1) a substrate having a plurality of electrode pads on one surface thereof; (2) a first device mounted on said one surface of said substrate; and (3) a second device mounted on said one surface of said substrate and stacked over said first device, each of said first and second devices comprising: (a) an insulating tape having a hole of rectangular shape, said hole being defined by a pair of opposed longer side ends extending in a first direction and a pair of opposed shorter side ends extending in a second direction substantially perpendicular to said first direction; (b) a semiconductor chip having a main surface of a rectangular shape, said main surface having a pair of opposed longer edges extending in said first direction and a pair of opposed shorter edges extending in said second direction, said semiconductor chip being disposed in said hole of said insulating tape; said semiconductor chip having: an integrated circuit having a plurality of semiconductor elements, being formed on said main surface; first bonding pads being formed on said main surface and being arranged along one of said pair of opposed longer edges of said main surface of said semiconductor ship and being electrically connected with said integrated circuit, said first bonding pads being arranged at a first interval in said first direction; (c) first leads disposed on said insulating tape and extending in said second direction, said first leads crossing one of said pair of opposed longer side ends of said insulating tape and said one of said pair of opposed longer edges of said main surface of said semiconductor chip, and having one end disposed on said main surface of said semiconductor chip; (d) second leads disposed on said insulating tape and extending in said second direction, said second leads crossing the other of said pair of opposed longer side ends and the other of said pair of opposed longer edges of said main surface of said semiconductor chip, and having one end disposed on said main surface of said semiconductor chip; and (e) a resin member sealing said main surface of said semiconductor chip, said one end of said first and second leads and a space defined by said semiconductor chip and said insulating tape in a plane view, wherein said one ends of said first leads are connected to said first bonding pads via first bump electrodes, wherein said second leads are leads which are not electrically connected to said integrated circuit of said semiconductor chip, wherein a portion of said resin member extends onto said second leads at said space defined by said semiconductor chip and said insulating tape, wherein the other ends of said first and second leads of each of said first and second devices are connected to the corresponding electrode pads of said substrate, and wherein said first and second devices are mounted on said substrate such that said main surface of said semiconductor chip of each of said first and second devices is faced to said one surface of said substrate and a rear surface of said semiconductor chip of said first device is close to said main surface of said semiconductor chip of said second device.