Patent ID: 6806736
Filing Date: 2004-10-19
Classification: H02M

Abstract:
A capacitive pump circuit comprising:(a) a buffer having a supply input coupled to a voltage supply rail, an input for receiving a clocking signal and having an output; (b) a level shifter having an input for receiving said clocking signal and an output; (c) an output stage having a first input, a second input, and an output port for outputting a voltage, and an output capacitor, said first input being coupled to the output of said buffer through another capacitor, said second input being coupled to the output of said level shifter; (d) said output stage including first and second transistors connected in a push-pull configuration, said first and second transistors having a control terminal connected to the output of said level shifter, said first transistor having an input terminal connected to a ground rail and an output terminal connected to an input terminal of said second transistor, said connection forming the first input for said output stage, and said second transistor having an output terminal, said output terminal forming said output port, and said output capacitor having one terminal coupled to said output terminal and another terminal coupled to said ground rail.