Patent ID: 9099240
Filing Date: 2015-08-04
Classification: H01G

Abstract:
1. A multilayered ceramic capacitor comprising: a ceramic body in which a plurality of dielectric layers having an average thickness of 0.2to 2.0 μm are stacked; an active layer including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body, having the dielectric layer interposed therebetween, to form capacitance; an upper cover layer formed above the active layer; a lower cover layer formed below the active layer and being thicker than the upper cover layer; and first and second external electrodes formed to cover the both end surfaces of the ceramic body, wherein the dielectric layer is configured of dielectric grains, when an average thickness of the dielectric layer is defined as td (μm), an average thickness of the first and second internal electrodes is defined as te (μm), and an average grain size of the dielectric grains is defined as Da (μm), Da≦td/3 and 0.2 μm<te<(td) wherein when half of a total thickness of the ceramic body is defined as A, a thickness of the lower cover layer is defined as B, half of a total thickness of the active layer is defined as C, and a thickness of the upper cover layer is defined as D, a ratio ((B+C)/A) of deviation between a center of the active layer and a center of the ceramic body is within a range of 1.063 to 1.745 (1.063≦(B+C)/A≦1.745).