Patent ID: 6017146
Filing Date: 2000-01-25
Classification: H04H

Abstract:
An error correction device comprising:a demodulating circuit for demodulating an input signal to output patterns of demodulated data, and for outputting a reliability information bit, which indicates correctness of the respective demodulated data in the pattern, corresponding to the demodulated data;an error correcting circuit for correcting errors existing in the pattern of demodulated data; anda control circuit for controlling error correction for the pattern of demodulated data according to the reliability information bit,a bit number judging circuit for judging the number of reliability information bits having a predetermined level out of all the outputted reliability information bits, wherein the control circuit controls the error correction according to the number of reliability information bits judged by the bit number judging circuit,wherein the control circuit includes a generating circuit for detecting demodulated data whose corresponding reliability information bit has a predetermined level and for generating patterns of demodulated data which are derived from all possible combinations made using the detected demodulated data, and the error correcting circuit carries out error correction for all the patterns of demodulated data which are generated from the combinations.