Patent ID: 6215342
Filing Date: 2001-04-10
Classification: G06F,H03K

Abstract:
A power-on reset circuit powered by a first high-potential power rail, a second high-potential power rail, and a low-potential power rail, wherein the first high-potential power rail is designed to supply a potential different from a potential to be supplied by the second high-potential rail, and wherein the circuit includes a reset output node, the circuit comprising:a. a voltage divider branch having a first resistor with a high-potential node coupled to the first high-potential power rail and a second resistor having a high-potential node coupled to a low-potential node of said first resistor and a low-potential node coupled to the low-potential power rail, and an output;b. a first reset sub-circuit having a control node coupled to said output of said voltage divider branch, wherein said first rest sub-circuit is coupled to the second high-potential power rail, said first reset sub-circuit having an output coupled to the rest output node; andc. a second reset sub-circuit coupled to the second high-potential power rail and having an output coupled to the reset output node,wherein a signal of said output of said first reset sub-circuit and a signal of said output of said second reset sub-circuit in combination define a signal at the reset output node.