Patent ID: 9218183
Filing Date: 2015-12-22
Classification: G06F

Abstract:
1. A method of copying data in a microprocessor, the microprocessor including an execution unit, a load/store unit, a cache memory, a bus interface unit, and at least one general purpose register, the method comprising: decoding a first instruction using the execution unit of the microprocessor, wherein the first instruction specifies a destination memory address defined by at least a destination base and a destination offset; storing, with the load/store unit operably coupled to the execution unit, the destination memory address in a destination register in the bus interface unit; decoding a second instruction using the execution unit, wherein said second instruction specifies a source memory address defined by at least a source base and a source offset; storing, with the load/store unit operably coupled to the execution unit and as directed by the execution unit, the source memory address in a source register in the bus interface unit; copying, as directed by the execution unit, the contents of a memory location specified by the source memory address to a memory location specified by the destination memory address under control of the bus interface unit; and copying, as directed by the execution unit, the contents of the memory location specified by the source memory address to the cache memory, wherein both the cache memory and the bus interface unit are coupled to the load/store unit, and wherein the execution unit is operably coupled to the bus interface unit, and configured to direct control of the copying to the memory location specified by the destination memory address and the copying to the cache memory to allow the at least one general purpose register to be used for an activity unrelated to the copying to the memory location specified by the destination memory address or the copying to the cache memory.