Patent ID: 8298894
Filing Date: 2012-10-30
Classification: H01L

Abstract:
1. A method, comprising: forming a first gate electrode structure above a first semiconductor region of a semiconductor device and a second gate electrode structure above a second semiconductor region, said first and second gate electrode structures comprising a gate insulation layer including a high-k dielectric material, a metal-containing cap material formed on said gate insulation layer and a placeholder material, at least said second gate electrode structure comprising an etch stop liner located between said metal-containing cap material and said placeholder material; removing said placeholder material in said first and second gate electrode structures; forming one or more first material layers in said first and second gate electrode structures, said one or more first material layers comprising a work function metal for said first gate electrode structure; removing said one or more first material layers selectively from said second gate electrode structure by using a wet chemical agent based on ammonium hydroxide to etch at least one of said one or more material layers; and forming one or more second material layers in said second gate electrode structure, said one or more second material layers comprising a work function metal for said second gate electrode structure.