Patent ID: 6111437
Filing Date: 2000-08-29
Classification: H03K,H04L

Abstract:
An integrated circuit comprising a differential comparator having an input offset voltage comprising:first and second differential voltage inputs;first and second reference voltage inputs;a first comparator circuit for generating an output voltage that is a function of the difference between the first and second differential voltage inputs minus the difference between the first and second reference voltage inputs, whereby the comparator has an input offset that is a function of the difference between the first and second reference voltage inputs; anda second comparator circuit for generating an output voltage that is a function of the difference between the first and second differential voltage inputs minus the difference between the first and second reference voltage inputs, whereby the second differential comparator has an input offset that is a function of the difference between the first and second reference voltage inputs; anda selection circuit responsive to a common-mode input voltage of the first and second input voltages for selecting either the first comparator or the second comparator to provide an output for the differential comparator.