Patent ID: 6204536
Filing Date: 2001-03-20
Classification: H01L

Abstract:
A semiconductor device, comprising:a MOS transistor formed on a semiconductor substrate;at least one silicide protection structure configured to prevent a silicide film formation in a predetermined portion on a surface of an active region outward side faces of a gate electrode;a first semiconductor layer of a first concentration provided in a surface of said semiconductor substrate beneath said at least one silicide protection structure; anda second semiconductor layer of a second concentration provided in a surface of said semiconductor substrate excluding a portion in which said at least one silicide protection structure is formed,wherein said silicide film is provided on said second semiconductor layer,said second semiconductor layer is a source/drain layer of said MOS transistor,said first concentration is lower than said second concentration,said at least one silicide protection structure and said gate electrode of said MOS transistor are formed simultaneously with an identical construction, andsaid first semiconductor layer is a semiconductor layer having a conductivity type identical with that of said source/drain layer of said MOS transistor.