Patent ID: 6633959
Filing Date: 2003-10-14
Classification: G06F

Abstract:
A non-uniform memory access (NUMA) computer system, comprising:a node interconnect; a remote node and a home node coupled to said node interconnect, wherein said home node includes a home system memory and wherein said remote node includes: a local interconnect; at least one processing unit coupled to said local interconnect; a plurality of caches coupled to said local interconnect, said plurality of caches including a cache that caches an unmodified cache line corresponding to data resident in said home system memory, said cache having a cache controller that issues a deallocate operation on said local interconnect in response to deallocating said unmodified cache line; and a node controller coupled between the node interconnect and the local interconnect that transmits the deallocate operation to the home node only in response to a combined response to said deallocate operation on said local interconnect indicating that no other cache in said remote node caches said cache line.