Patent ID: 6694411
Filing Date: 2004-02-17
Classification: G06F

Abstract:
A memory structure to implement a lock to control access to a shared resource by a plurality of requesters in a processor-based device, the memory structure comprising:a plurality of memory locations, the plurality of memory locations comprising: a plurality of waiter locations, the number of the plurality of waiter locations corresponding to at least the number of the plurality of requesters having access to the shared resource, wherein the contents of each waiter location indicates whether ownership of the lock is available; and a token location to store a token for acquiring ownership of the lock, wherein each of the plurality of requesters attempting to acquire ownership of the lock retrieves a token from the token location, wherein the number of the plurality of waiter locations corresponds to the number of the plurality of requesters having access to the shared resource rounded up to the next power of two, wherein a requester waiting at a particular waiter location may acquire ownership of the lock when the contents of the particular waiter location correspond to the value of the token retrieved by that requester from the token location, wherein the value of the token stored at the token location is altered each time the token is retrieved, wherein the value of the retrieved token corresponds to a particular waiter location of the plurality of waiter locations, and wherein only the requester that retrieved the corresponding retrieved token waits at the particular waiter location to acquire ownership of the lock.