Patent ID: 6130553
Filing Date: 2000-10-10
Classification: H03K

Abstract:
A programmable function block comprising a logic block including a full adder with three input terminals and at least one preposition logic, and one or more programmable input switch unit for use in selectively switching a HIGH logic level signal, a LOW logic level signal, and a signal on interconnection lines that run throughout a semiconductor integrated circuit having at least one logic block mounted thereon and available to connect between inputs and outputs of a plurality of circuits mounted on the semiconductor integrated circuit, whereinsaid preposition logic comprises a first multiplexer that selects one of a first input and a second input depending on the value of a control input to produce the selected input, and an exclusive OR circuit for performing an exclusive OR operation on two inputs including said selected input from said first multiplexer, an output of said preposition logic being connected to one of the three input terminals of said full adder and each output of said programmable input switch units being connected to each input of said logic block.