Patent ID: 7592858
Filing Date: 2009-09-22
Classification: H03K

Abstract:
1. An apparatus comprising: an output for controlling a gate; a first transistor for coupling the output to a ground voltage level, having a gate coupled to receive a time varying input signal, a source/drain coupled to ground, and a drain/source coupled to a first node; a second transistor for coupling the output to a pumped voltage transistor, having a gate coupled to receive the time varying input signal, a source/drain coupled to the output and a drain/source coupled to a pumped voltage node; a third transistor for coupling the pumped voltage node to an external voltage; a capacitor coupled between an inverter driver and the pumped voltage node for periodically placing a voltage in excess of the external voltage on the pumped voltage node; a first clamping circuit coupled between the gate of the second transistor and the pumped voltage node, for clamping the voltage at the gate of the second transistor and the voltage at the pumped voltage node so that the voltage difference between them never exceeds a first predetermined voltage; and a second clamping circuit coupled between the output and the first node, for clamping the voltage at the output to the voltage at the first node so that the voltage difference between them never exceeds a second predetermined voltage.