Patent ID: 6459298
Filing Date: 2002-10-01
Classification: G06F

Abstract:
A structure of controlled pipeline logic for overlapping a plurality of instructions, a flowing path being determined according to inputs of each pipe stage; comprising:a plurality of combinational logic elements responsible for part of said inputs; an input and an output of each combinational logic element being connected to respective flip-flops; a random noise generator for generating a random noise as a simulation signal to input said combinational logic element; and an active bit having an active state and an inactive state for controlling said combinational logic element to accept a real input or be enforced to accept said random noise; wherein by said combinational logic elements and said flip-flops, a plurality of data flowing paths are formed; when no input flows into said controlled pipeline logic, said random noise generator will generate random noises, and the active bit will enforce said combinational logic element to accept the random noise as an input so that said controlled pipeline logic is always sustained in said active condition.