Patent ID: 8719459
Filing Date: 2014-05-06
Classification: H03F,H03G,H03K,H03L,H04B

Abstract:
1. A digital control interface comprising: a voltage input/output (VIO) pin configured to receive a VIO signal; a general purpose input/output (GPIO) interface module, the GPIO interface module including an enable level shifter, a first mode level shifter, a second mode level shifter, and a combinational logic block, the combinational logic block configured to provide an enable signal to the enable level shifter for output to a power amplifier controller, the combinational logic block further configured to provide a first mode signal to the first mode level shifter for output to the power amplifier controller and a second mode signal to the second mode level shifter for output to the power amplifier controller; and a serial interface module, the serial interface module including a serial interface core and a reset logic block, the serial interface core configured to provide a serial interface when the VIO signal corresponds to a first logic level, the reset logic block configured to place the serial interface core into a reset mode when the VIO signal corresponds to a second logic level, and the GPIO interface module configured to provide a GPIO interface when the VIO signal corresponds to the second logic level.