Patent ID: 8159437
Filing Date: 2012-04-17
Classification: G09G

Abstract:
1. A semiconductor integrated circuit comprising: a first register which latches display data; a second register which latches the display data of the first register in accordance with a first clock; a gray scale voltage generator which outputs a plurality of gray scale voltages; a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages; and an amplifier including a first transistor, and a second transistor; wherein a first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal, and wherein a phase of the control signal is reversed at intervals of two frame periods.