Patent ID: 8984354
Filing Date: 2015-03-17
Classification: G11C,H03M

Abstract:
1. A testing system, comprising: a BIST circuit, arranged to output a first signal; a storage apparatus, coupled to the BIST circuit, arranged to store the first signal, and arranged to output the stored first signal as a second signal; a first logic circuit, coupled to the storage apparatus, arranged to output a third signal; a second logic circuit, coupled to the storage apparatus; a register, coupled to the storage apparatus and the second logic circuit; and a passby circuit, coupled to the BIST circuit, the first logic circuit and the register; wherein, in a first mode, the BIST circuit transmits the first signal to the storage apparatus, the storage apparatus outputs the second signal to the register thereby the second signal is registered by the register, then the register transmits the registered second signal to the BIST circuit to test the storage apparatus; in a second mode, the first logic circuit transmits a third signal to the register thereby the third signal is registered by the register, the register transmits the registered third signal to the second logic circuit, to test a signal transmitting path between the first logic circuit and the second logic circuit, and to test at least one of the first logic circuit and the second logic circuit.