Patent ID: 8427930
Filing Date: 2013-04-23
Classification: G11B

Abstract:
1. A memory device, comprising: a recording array including recording regions each having recording layers for recording data provided thereon in a matrix arrangement, a first positioning region and a second positioning region, the first and second positioning regions each being provided outside the recording regions; a probe array including a plurality of first probes provided oppositely to the recording regions for executing data writing, reading, and erasing to/from the recording layers, and a plurality of second probes provided oppositely to the first positioning region and second positioning region and used for generating a positioning signal representing position information of the recording regions; an actuator configured to change relative positions of the recording array and the probe array with respect to each other; and a control circuit configured to control an operation of the actuator by using the positioning signal and control data writing, reading, and erasing operations to the recording layers, the first positioning region including a first positioning pattern, the first positioning pattern having a plurality of first line portions extending in a first direction and provided at certain first intervals, the second positioning region including a second positioning pattern, the second positioning pattern having a plurality of second line portions extending in a second direction intersecting with the first direction and provided at certain second intervals, and the control circuit being configured to generate the positioning signal based on whether or not the second probes are in contact with the line portions of the first and second positioning patterns.