Patent ID: 6351362
Filing Date: 2002-02-26
Classification: H02H

Abstract:
A protection circuit for an input inverter circuit of an LCD controller IC, comprising: a first normally-off NMOS transistor connected between an input pad of the LCD controller IC and a first power source line; a second normally-off NMOS transistor connected between the input pad and a second power source line; a third normally-off transistor comprising one of a normally-off PMOS and a normally-off NMOS transistor connected between the first power source line and the input inverter circuits; a fourth normally-off NMOS transistor connected to the second power source line and the input inverter circuit; and a resistor connected between a first connection point between the first and second normally-off NMOS transistors and a second connection point between the third and fourth normally-off transistors; wherein channel widths of the third and fourth normally-off transistors are smaller than channel widths of the first and second normally-off transistors so that an electrostatic discharge may be passed to ground by one of an avalanche current produced in the fourth normally-off NMOS transistor, through drains of the third and fourth transistors, or in the form of a tunnel current between bands in the third and fourth transistors.