Patent ID: 8574933
Filing Date: 2013-11-05
Classification: H01L

Abstract:
1. A fabrication method of a semiconductor device, comprising the steps of: (a) providing a semiconductor wafer having a main surface and a back surface, the main surface being partitioned into a plurality of chip areas by dividing areas, with an integrated circuit being formed in each of the chip areas, the back surface having a pressure-sensitive adhesive tape affixed thereto; (b) cutting the semiconductor wafer along the dividing areas into a plurality of semiconductor chips and holding the semiconductor chips with the pressure-sensitive adhesive tape; (c) radiating first irradiation light emitted from a first light source, from above, to an upper surface of a first semiconductor chip to be peeled off from the pressure-sensitive adhesive tape out of the semiconductor chips held with the pressure-sensitive adhesive tape, radiating second irradiation light to the upper surface of the first semiconductor chip from second light sources disposed so as to surround the first semiconductor chip therebetween in plan view, receiving first reflected light from the upper surface of the semiconductor chip by an image pickup device, and acquiring a first image of the upper surface of the first semiconductor chip; (d) based on the first image acquired in step (c), determining whether the first semiconductor chip is present or not and whether the first semiconductor chip is good or bad, and if, based on the first image, the first semiconductor chip is determined to be present as a good chip, chucking and holding the upper surface of the first semiconductor chip by a chucking collet and thereby peeling off the first semiconductor chip from the pressure-sensitive adhesive tape; and (e) after step (d), die-bonding a lower surface of the first semiconductor chip to a chip mounting area while chucking and holding the upper surface of the first semiconductor chip by the chucking collet, wherein the first semiconductor chip has a substantially rectangular shape, a first side, a second side opposite the first side, a third side and a fourth side, which intersect the first and second sides in plan view, wherein said second light sources include a first unit, a second unit opposite the first unit, a third unit, and a fourth unit opposite the third unit in plan view, and wherein the first side confronts the first unit, second side confronts the second unit, the third side confronts the third unit, and the fourth side confronts the fourth unit.