Patent ID: 6541820
Filing Date: 2003-04-01
Classification: H01L

Abstract:
A power MOSFET comprising:a die of monocrystaline silicon having an upper junction receiving surface; an elongated strip of gate oxide fixed to said upper surface and overlying a shallow invertible channel region of one conductivity type and a conductive polysilicon gate overlying said strip of gate oxide; a first and a second region of the other of said conductivity types disposed on opposite sides of said elongated strip and defining source/drain regions, said first and said second regions extending to a depth below that of said invertible channel; said first and second regions each having lightly doped segments disposed beneath said elongated strip and a central more highly doped contact region, whereby said first and second regions are laterally connected together when said invertible channel region is inverted; and a plurality of spaced contacts electrically connected to said conductive polysilicon gate, and to said first and second regions, wherein said elongated strip follows a serpentine path over said upper surface.