Patent ID: 8963277
Filing Date: 2015-02-24
Classification: G05F,H01L

Abstract:
1. A semiconductor structure with a high voltage area and a low voltage area, the structure comprising: a substrate of a first conductivity type accommodating the high voltage area and the low voltage area; a resistor on the substrate, connecting the high voltage area and the low voltage area, wherein the resistor is configured to reduce bias applied to the high voltage area, and the resistor resides substantially in the high voltage area; a first doped region of the first conductivity type in the substrate between the high voltage area and the low voltage area; a second doped region of a second conductivity type between the substrate and the first doped region; an insulating layer between the resistor and the first doped region; and an output contact, electrically connected to the resistor, wherein at least part of the output contact is located in the high voltage area and another part of the output contact is located in the low voltage area.