Patent ID: 9184126
Filing Date: 2015-11-10
Classification: G02F,H01L

Abstract:
1. A semiconductor device having a first MISFET and a second MISFET formed over a semiconductor substrate, the semiconductor device comprising: (a) the first MISFET including (b) the second MISFET including (c) an insulating film formed over the first MISFET and the second MISFET; (d) a first plug formed in the insulating film and electrically connected to the first semiconductor region; (e) a second plug formed in the insulating film and electrically connected to the second semiconductor region; (f) a third plug formed in the insulating film and electrically connected to the third semiconductor region; (g) a first wiring layer formed over the insulating film and electrically connected to the first plug; (h) a second wiring layer formed over the insulating film and electrically connected to the second plug, the second wiring layer being formed of a second conductive film of a same layer as a layer of the first wiring layer; and (i) a third wiring layer formed over the insulating film and electrically connected to the third plug, the third wiring layer being formed of the second conductive film of the same layer as that of the first wiring layer and the second wiring layer, wherein the first gate electrode is overlapped with the first wiring layer in a plan view, wherein the second wiring layer is spaced away from the second gate electrode in the plan view, and wherein the third wiring layer is spaced away from the second gate electrode in the plan view.