Patent ID: 7406494
Filing Date: 2008-07-29
Classification: G06F

Abstract:
1. A programmable processing device for generating a bit-reverse index array of memory locations in a memory processed by a central processing unit for a wireless communication system, the programmable processing device executing instructions embodied in a portion of said memory instructing the programmable processing device to perform the steps of: (a) initializing a first memory location of an index array of memory locations, in the memory, to 0; using the central processing unit: (b) multiplying the initialized first memory location by the number 2 to generate a first portion of the index array of memory locations; (c) adding the number 1 to the first portion of the index array to generate a second portion of the index array of memory locations, wherein the first portion and the second portion comprise a new set of numbers; (d) multiplying each number in the new set of numbers by the number 2 to generate a new first portion of the index array of memory locations, wherein the new first portion of the index array comprises a new set of numbers; (e) adding the number 1 to each number in the new first portion of the index array to generate a new second portion of the index array, wherein the new first portion and the new second portion comprises a new set of numbers; and (f) repeating steps (d) and (e) until the index array of memory locations grows to a bit-reverse index array of memory locations having a desired length.