Patent ID: 6064236
Filing Date: 2000-05-16
Classification: H03D,H03L,H04L

Abstract:
A phase detector for detecting the phase difference between a data signal and a clock signal, said phase detector comprising:an edge detector for detecting a rising edge and a falling edge of said data signal and outputting an edge signal; anda D flip flop (D-FF) which is provided with a CLOCK input terminal to which a first signal is input, a DATA input terminal to which a second signal is input and an output terminal for outputting a stored logical value, and which stores and outputs the logical value of said second signal in the instant of a rising edge of said first signal and holds said logical signal until the rising edge of the next first signal;wherein said edge signal is input to said CLOCK input terminal of said D-FF as said first signal;said clock signal is input to said DATA input terminal of said D-FF as said second signal; anda signal corresponding to said phase difference between said data signal and said clock signal is taken out of said output terminal of said D-FF.