Patent ID: 8138521
Filing Date: 2012-03-20
Classification: H01L

Abstract:
1. An integrated circuit including a thyrister comprising: an n-type semiconductor region of an n-type impurity concentration formed in or on a substrate, the n-type semiconductor region having an upper surface and a lower surface; an isolation layer formed at the upper surface of the n type semiconductor region; an n-type well region formed spaced above the lower surface in the n-type semiconductor region, the n-type well region having an n-type impurity concentration higher than the n-type impurity concentration of the n-type semiconductor region; a p-type well region formed spaced above the lower surface in the n-type semiconductor region at a position laterally spaced from the n-type well region across a part of the n-type semiconductor region, the p-type well region having a p-type impurity concentration; a first p-type contact region formed at the upper surface in the n type well region, the first p-type contact region defining an anode; a first n-type contact region formed at the upper surface in the n-type well region at a position laterally spaced from the first p-type contact region in a direction away from the p-type well region, the first n-type contact region having an n-type impurity concentration higher than the n-type impurity concentration of the n-type well region and defining an anode gate; the first n-type contact region being separated by isolation material of the isolation layer from the first p-type contact region; a second p-type contact region formed at the upper surface in the p-type well region, the second p-type contact region having a p-type impurity concentration higher than the p-type impurity concentration of the p-type well region, and defining a cathode gate; a second n-type contact region formed at the upper surface in the p-type well region at a position laterally spaced from the second p-type contact region in a direction towards the n-type well region and defining a cathode; the second n-type contact region being separated by isolation material of the isolation layer from the second p-type contact region and from the n-type well region; whereby a thyrister is formed comprising the first p-type contact region defining the anode, the n-type well region, the n-type semiconductor region, the p-type well region and the second n-type contact region defining the cathode.