Patent ID: 6768201
Filing Date: 2004-07-27
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor layer; a source region provided in the semiconductor layer; a drain region provided in the semiconductor layer so as to be spaced apart from the source region; a gate insulating film provided on the semiconductor layer; a gate electrode provided on the gate insulating film; a first interlevel insulating film provided on the semiconductor layer so as to cover the gate electrode; a first gate interconnect provided on the first interlevel insulating film so as to be electrically connected to the gate electrode; a first drain interconnect provided on the first interlevel insulating film so as to be electrically connected to the drain region; and a second interlevel insulating film formed on the first interlevel insulating film so as to cover the first gate interconnect and the first drain interconnect, wherein part of the first gate interconnect extends in the gate width direction so that the parts of the first drain interconnect and part of the first gate interconnect face each other with part of the second interlevel insulating film interposed therebetween.