Patent ID: 6870765
Filing Date: 2005-03-22
Classification: G11C,H01L

Abstract:
1. A non-volatile semiconductor memory device having a memory transistor comprising a source region and a drain region formed at a surface portion of a semiconductor while sandwiching a channel-forming region there between, a gate insulating film comprised of a tunnel insulating film, a nitride film, and a top insulating film sequentially stacked on the channel-forming region and including dispersed charge storing means in the stacked films, and a gate electrode on the gate insulating film, wherein a thickness of said tunnel insulating film and said top insulating film are set so that the thickness of said gate insulating film converted to an oxide film becomes 10 nm or less and the change of the threshold voltage at the time of erasing said memory transistor is regulated by a recombination process of a hole current injected from said channel-forming region side and an electron current injected from said gate electrode side.