Patent ID: 6078993
Filing Date: 2000-06-20
Classification: G06F

Abstract:
A data supplying apparatus having a direct mapping type cache data unit for storing data and a direct mapping type cache tag unit storing tag data and outputting valid information that represents a hit/miss-hit of data, and adapted for sending data that is output from the cache data unit to a data requesting unit, comprising:an output buffer circuit storing the data output from the cache data unit and sending the stored data to the data requesting unit,an address buffer circuit storing address information for the cache data unit designated by a data request in a first-in, first-out (FIFO) manner when said output buffer circuit has data and a data release signal is not issued by the data requesting unit, and when said output buffer circuit has data and address information is present in said address buffer circuit and outputting a control signal indicating whether said address buffer circuit is empty; anda selecting circuit, operating in response to the control signal, selecting address information stored in said address buffer circuit and sending the selected address information to the cache data unit when data is requested and the control signal indicates that said address buffer circuit is not empty, and selecting address information to be stored in said address buffer circuit and sending the selected address information to the cache data unit, bypassing said address buffer circuit, when the control signal indicates that said address buffer circuit is empty.