Patent ID: 8466034
Filing Date: 2013-06-18
Classification: H01L

Abstract:
1. A method of manufacturing a finned semiconductor device structure, the method comprising: forming a semiconductor fin structure from a layer of semiconductor material; depositing an insulating material overlying the semiconductor fin structure such that the insulating material fills space adjacent to the semiconductor fin structure, resulting in deposited insulating material; creating a flat surface from the deposited insulating material, the flat surface being continuous with an upper surface of the semiconductor fin structure; fabricating a dummy gate structure overlying the flat surface, the dummy gate structure transversely overlying the semiconductor fin structure; after fabricating the dummy gate structure, depositing a spacer material overlying the dummy gate structure; after depositing the spacer material, anisotropically and selectively etching the deposited spacer material to form spacers adjacent to sidewalls of the dummy gate structure, wherein etching the deposited spacer material exposes some of the deposited insulating material and exposes some of the upper surface of the semiconductor fin structure; thereafter, removing the dummy gate structure while leaving the spacers substantially intact, to expose the flat surface between the spacers; and thereafter, selectively etching some of the deposited insulating material below an area defined between the spacers, and in a manner that is self-aligned with the spacers.