Patent ID: 6233662
Filing Date: 2001-05-15
Classification: G06F

Abstract:
A method for configuring an interleaver in a computer system; said computer system having at least one memory bank having at least one chunk; said computer system having at least one bank list referring to said memory bank; said method comprising:associating at least one entry model with at least one said memory bank;associating a specified degree of interleave with each said entry model, said specified degrees of interleave being of equal size;associating a range specification with each said entry model, said range specifications being of equal size;associating each said memory bank with a label, and identifying a repetitive order for said memory bank labels in said bank list;associating said chunk with a value, said chunk values being in order;wherein for each said entry model;determining said label for a first said memory bank in said bank list in said entry model, said first memory bank label being different from said first memory bank labels for said bank lists of other said entry models;determining said labels for said memory banks in said bank list in said entry model in said repetitive order, so that distance between occurrences of said memory bank labels in said bank list in said entry model is maximized;mapping said chunk values in said chunk value order, to said memory bank labels in said bank list for said entry model, said memory bank labels being in said repetitive order; andthereby efficiently configuring said interleaver with said entry models by maximizing use of said memory banks via maximization of said distance between occurrences of said memory bank labels in said bank list in said entry model.