Patent ID: 6399475
Filing Date: 2002-06-04
Classification: H01L,H05K,Y02P

Abstract:
A process for producing electrical connections on the surface of a semiconductor package containing an integrated-circuit chip and having metal electrical-connection regions on the surface of the semiconductor package, the process comprising the steps of:covering at least some of an electrical connection region on a semiconductor package with a first metal layer with one or more metals contained therein, so as to form an anti-diffusion barrier; covering the first metal layer with an anti-oxidation second metal layer with one or metals contained therein; and depositing a metal solder drop on the second metal layer, wherein the metal solder drop comprises one or more additional metal particles in suspension which contain at least one of the metals of the first metal layer so as to produce a precipitate comprising these additional metal particles along with at least part of one of the metals of the second metal layer, the precipitate remaining in suspension in the metal solder drop.