Patent ID: 8487673
Filing Date: 2013-07-16
Classification: G06F,H03K,H03L

Abstract:
1. Power-on-reset circuitry that monitors multiple power supply voltages and that produces a corresponding power-on-reset signal, comprising: a plurality of comparator-based trip point detectors each of which includes a comparator, wherein the trip point detectors each compare one of the power supply voltages to a respective trip point voltage; power-on-reset controller circuitry that receives an output signal from each of the trip point detectors and that produces the power-on-reset signal; and a feedback path that supplies the power-on-reset signal to at least a given one of the trip point detectors, wherein the given trip point detector includes circuitry responsive to the power-on-reset signal so that the trip point for the given trip point detector is larger during power-up operations than when detecting brownout conditions during normal operations.