Patent ID: 8959759
Filing Date: 2015-02-24
Classification: H01L,H05K,Y10T

Abstract:
1. A method for assembling a computer module, comprising: positioning a first microelectronic package proximate to a module substrate, the module substrate having a first outermost surface and a second outermost surface opposite the first outermost surface and an aperture extending between the first and second outermost surfaces, the mode substrate including: aligning the first microelectronic package with the aperture of the module substrate, the first microelectronic package having a first package substrate with a first side and a second side opposite the first side, the first side facing and extending over the first outermost surface of the module substrate, the first side carrying a first plurality of semiconductor dies and a first processor die, wherein the first plurality of semiconductor dies has a proximate side facing the first package substrate and distal side facing away from the proximate side, wherein the first processor die is attached to the distal side of the first plurality of semiconductor dies, wherein the first plurality of semiconductor dies and the first processor die are stacked and encapsulated in a first encapsulant, and wherein at least a portion of each of the first plurality of semiconductor dies, the first processor die and the first encapsulant are inside the aperture of the module substrate; and aligning a second microelectronic package with the aperture of the module substrate, the second microelectronic package having a second package substrate with a third side and fourth side opposite the third side, the third side facing and extending over the second outermost surface of the module substrate, the third side carrying a second plurality semiconductor dies and a second processor die, wherein the second plurality semiconductor die has a proximate side facing the second package substrate and a distal side facing away from the proximate side, wherein the second processor die is attached to the distal side of the second plurality of semiconductor dies, wherein the second plurality of semiconductor dies and the second processor die are stacked and encapsulated in a second encapsulant, and wherein at least a portion of each of the second plurality semiconductor dies, the second processor die and the second encapsulant are inside the aperture of the module substrate.