Patent ID: 6670822
Filing Date: 2003-12-30
Classification: H03K

Abstract:
A transceiver driver having an input node and an output node, the driver comprising:a. an inverter including a first inverter transistor and a second inverter transistor, wherein a control node of said first inverter transistor and a control node of said second inverter transistor are coupled to the input node; b. a first always-on transistor coupled between a high-potential power rail and a high-potential node of said first inverter transistor and having a control node coupled to a first independent reference potential source; c. a second always-on transistor coupled between a low-potential power rail and a low-potential node of said second inverter transistor and having a control node coupled to a second independent reference potential source; d. a first capacitive element coupled between said high-potential power rail and said high-potential node of said first inverter transistor; e. a second capacitive element coupled between said low-potential power rail and said low-potential node of said second inverter transistor; and f. an output transistor having a control node coupled to a low-potential node of said first inverter transistor and to a high-potential node of said second inverter transistor, and a high-potential node coupled to the output node, wherein said first capacitive element and said second capacitive element are coupled through said inverter to said control node of said output transistor so as to regulate current delivery thereto.