Patent ID: 9024922
Filing Date: 2015-05-05
Classification: G09G

Abstract:
1. A display device comprising: a plurality of data-line pairs arranged side by side along a first direction; a plurality of gate lines arranged side by side along a second direction; a display section including a plurality of pixels each disposed at an intersection of a data-line pair and a gate line and connected to one or both data lines of the data-line pair; a data-line drive circuit supplying a positive-phase data signal to one of the data-line pair and a negative-phase data signal to the other of the data-line pair, and allowing the data-line pair to stay in a high-impedance state before writing of an image signal to the pixels; and a short circuit connected to both data lines of the respective side by side data-line pair and putting the data-line pair in a short-circuit state while the data-line pair stays in the high-impedance state such that an overall potential of the data-line pair is changed to an intermediate potential that is one half of the sum of a positive-phase potential applied to the first one of the data-line pair and a negative-phase potential applied to the other one of the data-line pair, and then releasing the short-circuit state, wherein, following the release of the short-circuit state, the positive-phase data signal, the negative-phase data signal or both thereof are written into the pixel as the image signal after the overall potential of the data-line pair has changed to the intermediate potential.