Patent ID: 8617925
Filing Date: 2013-12-31
Classification: H01L

Abstract:
1. A method of forming a bonded semiconductor structure, comprising: providing a first substrate structure comprising a relatively thin layer of material on a relatively thick substrate body; forming a plurality of through wafer interconnects through the relatively thin layer of material of the first substrate structure; forming at least one redistribution layer over the relatively thin layer of material of the first substrate structure on the side thereof opposite the relatively thick substrate body; directly bonding a plurality of processed semiconductor structures to the at least one redistribution layer, at least one conductive feature of each of the plurality of processed semiconductor structures respectively electrically coupled with at least one through wafer interconnect of the plurality of through wafer interconnects, each of the plurality of processed semiconductor structures occupying a different area over the first substrate structure; directly bonding a second substrate structure over the plurality of processed semiconductor structures on a side thereof opposite the first substrate structure; removing the relatively thick substrate body of the first substrate structure and leaving the relatively thin layer of material of the first substrate structure bonded to the plurality of processed semiconductor structures; and electrically coupling at least one through wafer interconnect of the plurality of through wafer interconnects to a conductive feature of another structure.