Patent ID: 7485490
Filing Date: 2009-02-03
Classification: H01L

Abstract:
1. A method of forming a semiconductor package comprising: providing a substrate; coupling a first semiconductor chip to a surface of the substrate, the first semiconductor chip having first and second surfaces which are substantially flat in nature; forming at least one input-output pad on the second surface of the first semiconductor chip; coupling at least one first conductive wire from the input-output pad of the first semiconductor chip to the substrate; laying an adhesive layer to the second surface of the first semiconductor chip; providing a second semiconductor chip having first and second surfaces which are substantially flat in nature; and forming an insulator coupled to and covering the entire first surface of the second semiconductor chip, the first conductive wire contacting the insulator, the insulator preventing the first conductive wire from shorting to the first surface of the second semiconductor chip, wherein the second semiconductor chip is coupled to the adhesive layer by the insulator coupled to the first surface thereof.