Patent ID: 6633084
Filing Date: 2003-10-14
Classification: B24B,Y10S

Abstract:
A microelectronic substrate structure for enhancing the performance of mechanical and/or chemical-mechanical planarizing processes comprising:a substrate having an upper surface; a separation layer on the substrate, the separation layer having a top surface; a cavity in the separation layer, the cavity having sidewalls extending from the top surface of the separation layer towards the upper surface of the substrate and a floor; a large area feature on the floor of the cavity, the large area feature having a plurality of raised features projecting upwardly from the floor into the cavity; a pillar in the cavity, the pillar having a crown proximate to a plane defamed by the top surface of the separation layer; and a layer in the cavity having a contoured surface that conforms to a topography of the raised features, wherein the sidewalls of the cavity, the pillar and the contoured surface of the layer define an unoccupied void over the large area feature.