Patent ID: 6728242
Filing Date: 2004-04-27
Classification: H04J,H04L,H04Q

Abstract:
A switching system analyzing a destination of information included in a plurality of fixed-length packets and transferring said fixed-length packets from one of a plurality of input ports to one of a plurality of output ports based on the analyzing, comprising:a first memory storing said received fixed-length packets from one of said plurality of input ports to be transferred to one of said plurality of output ports; a second memory storing managing information for managing write and read addresses of said first memory; and a controller, provided commonly in said first memory and said second memory, controlling writing in and reading out of said fixed-length packets for said first memory and writing of said fixed-length packet being carried out by supplying an address of said first memory to said first memory based on said managing information received from said second memory, said reading of said fixed-length packet being carried out by supplying an address stored in the writing of said fixed-length packet to said first memory, and inputting managing information corresponding to said stored address used for said reading to said second memory.