Patent ID: 8168490
Filing Date: 2012-05-01
Classification: H01L,H02M

Abstract:
1. A method of forming a semiconductor voltage converter, comprising: forming a high-side transistor comprising a lateral diffusion metal oxide semiconductor (LDMOS) device on a substrate of a semiconductor die, wherein forming the high-side transistor includes patterning a gate conductor layer to form a gate of the LDMOS device; forming a low-side transistor comprising a vertical diffusion metal oxide semiconductor (VDMOS) device on the substrate of the semiconductor die such that the LDMOS device and the VDMOS device are electrically coupled to one another via the substrate, wherein forming the low-side transistor includes patterning said gate conductor layer to form a gate of the VDMOS device such that the gate of the LDMOS device and the gate of the VDMOS device are coplanar; and forming a single conductive structure which forms: a gate shield which is interposed between at least one conductive gate portion of the LDMOS device and a conductive structure which overlies the gate shield; and a trench conductor electrically coupled to a semiconductor substrate and to a source region of the LDMOS device.