Patent ID: 7338871
Filing Date: 2008-03-04
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising the steps of: forming a gate electrode over a substrate; forming an N-type doping region in the substrate by a first ion implantation process; depositing an insulating layer over the gate electrode and the N-type doping region; forming an opening to expose a partial portion of the N-type doping region where a conductive pattern will be formed; forming an N-type highly doping region in the partial portion of the N-type doping region, after forming the opening, by a second ion implantation process; depositing a first metal layer over the N-type highly doping region by using a chemical vapor deposition method, wherein a metal silicide is formed between the N-type highly doping region and the first metal layer; forming a conductive layer over the first metal layer; and forming the conductive pattern by selectively etching the conductive layer and the first metal layer.