Patent ID: 8492215
Filing Date: 2013-07-23
Classification: H01L

Abstract:
1. A method for forming a static random access memory (SRAM) cell, the method comprising: forming transistors on a semiconductor substrate, the transistors having active areas in a top surface of the semiconductor substrate such that longitudinal axes of the active areas are parallel, the transistors including a first pull-down transistor, a first pull-up transistor, a second pull-down transistor, and a second pull-up transistor, wherein the first pull-down transistor and the first pull-up transistor share a first common gate structure, and wherein the second pull-down transistor and the second pull-up transistor share a second common gate structure; and forming a first linear intra-cell connection and a second linear intra-cell connection, wherein the first linear intra-cell connection electrically couples active areas of the first pull-down transistor and the first pull-up transistor to the second common gate structure, the first linear intra-cell connection having a first cross-sectional area parallel to the top surface of the semiconductor substrate, all outer edges of the first cross-sectional area forming a rectangle, and wherein the second linear intra-cell connection electrically couples active areas of the second pull-down transistor and the second pull-up transistor to the first common gate structure, the second linear intra-cell connection having a second cross-sectional area parallel to the top surface of the semiconductor substrate, all outer edges of the second cross-sectional area forming a rectangle.