Patent ID: 7102440
Filing Date: 2006-09-05
Classification: H03F

Abstract:
1. An output stage for an amplifier circuit, comprising: input and output terminals, the input terminal being configured to receive an input signal, and the output terminal being coupled to an output load; first and second pre-driver transistors having respective bases, emitters, and collectors, the respective bases of the first and second pre-driver transistors being connected to the input terminal, the collector of the first pre-driver transistor being electrically coupled to a negative power supply source, and the collector of the second pre-driver transistor being electrically coupled to a positive power supply source; first and second driver transistors having respective bases, emitters, and collectors, the base of the first driver transistor being connected to the emitter of the first pre-driver transistor at a first circuit node, the base of the second driver transistor being connected to the emitter of the second pre-driver transistor at a second circuit node, the collector of the first driver transistor being electrically coupled to the positive supply, the collector of the second driver transistor being electrically coupled to the negative supply, and the respective emitters of the first and second driver transistors being electrically coupled to the output terminal; and first and second current sources having respective current outputs, the output of the first current source being connected to the first circuit node, and the output of the second current source being connected to the second circuit node, wherein, in the event a base current of the first driver transistor increases in response to an increased current through the output load, the first current source is configured to provide an increased current to the first circuit node, and wherein, in the event a base current of the second driver transistor increases in response to the increased current through the output load, the second current source is configured to provide an increased current to the second circuit node.