Patent ID: 6035117
Filing Date: 2000-03-07
Classification: G06F

Abstract:
An emulation module comprising:a plurality N of clusters of emulation processors in said module, each one emulation processor of said emulation processors in said module having an input stack memory and an data stack memory, and havingmeans for interconnecting said one emulation processor to other emulation processors of said module to physically couple four or more emulation processors together in a firmly coupled system via their respective input stack memory and data stack memory as distinct clusters in said module;said interconnecting means providing four read locations for said input stack memory and said output stack memory of each one emulation processor to provide each emulation processor with direct-out connections to the other processors of said physically coupled four or more emulation processors of a distinct firmly coupled cluster in said module whereby a value read from a fourth read location to the memory stacks in each processor is immediately available to any of the other three or more processors in a coupled cluster, and wherein each emulation processor in a cluster can both send and receive a bit from either the input stack memory or the data stack memory of any other processor in said firmly coupled cluster;a switching circuit mechanism for interconnection of output from said input stack memory in one cluster to emulation processors in at least one of (N-1) other clusters; andsaid switching circuit mechanism also enabling interconnection of output from said data stack memory in one cluster to emulation processors in at least one of (N-1) other clusters.