Patent ID: 7091113
Filing Date: 2006-08-15
Classification: H01L,Y10S

Abstract:
1. A method of forming a semiconductor construction, comprising: forming a layer of patternable material over a semiconductive substrate material; patterning the layer of patternable material to form at least two patterned blocks, a pair of adjacent blocks being separated by a first gap; forming a coating over the pair of adjacent blocks and across the first gap between the adjacent blocks; selectively removing the coating from across the first gap while leaving the coating along sidewalls and on an upper surface of each of the pair of adjacent blocks; the pair of blocks and coating together defining a pair of enlarged blocks that are separated by a second gap; the second gap being narrower than the first gap; while the enlarged blocks remain over the semiconductive substrate material, implanting at least one dopant within the semiconductive substrate material within the second gap to form a doped region and removing the enlarged blocks from over the semiconductive substrate material.