Patent ID: 9035317
Filing Date: 2015-05-19
Classification: G02F,H01L

Abstract:
1. A pixel structure, disposed on a substrate and comprising: a gate electrode, disposed on the substrate; a first gate insulation layer, disposed on the substrate and covering the gate electrode; a pixel electrode, disposed on the first gate insulation layer; a second gate insulation layer, disposed on the substrate and covering the pixel electrode, wherein the pixel electrode is located between the first gate insulation layer and the second gate insulation layer, and the second gate insulation layer has a first contact opening which exposes a portion of the pixel electrode; a channel layer, disposed on the second gate insulation layer and located above the gate electrode; a data line disposed on the second gate insulation layer; a source electrode and a drain electrode, disposed on the second gate insulation layer, respectively located at two sides of the channel layer and simultaneously contacting the channel layer, wherein the drain electrode is electrically connected with the pixel electrode via the first contact opening of the second gate insulation layer, and wherein the source electrode and the data line are connected with each other; and a common electrode, disposed on the second gate insulation layer, overlapping the pixel electrode and having a plurality of slits locating above the pixel electrode.