Patent ID: 7273777
Filing Date: 2007-09-25
Classification: H01L

Abstract:
1. A method for forming a semiconductor device structure having a fully silicide metal gate, comprising: providing a precursor structure that comprises at least one patterned gate stack with an overlaying dielectric mask and a first set of sidewall spacer structures, and abutting source and drain regions with surface metal silicide layers, wherein said at least one patterned gate stack comprises a polysilicon gate conductor on a gate dielectric layer; forming a first additional set of spacer structures alongside of the first set of sidewall spacer structures and forming a second additional set of spacer structures alongside the first additional set of spacer structures, wherein a portion of said first and second additional sets of spacers is located directly on said surface metal silicide layers to protect an interface between the surface metal silicide layers and said source and drain regions; removing the overlaying dielectric mask to expose the polysilicon gate conductor; and converting the polysilicon gate conductor into a fully silicided metal gate.