Patent ID: 6566207
Filing Date: 2003-05-20
Classification: H01L

Abstract:
A semiconductor device fabricating method, comprising the steps of:forming a deposition structure of pad oxide film/first nitride film/oxide film in first and second active regions on a semiconductor substrate so that a field region is exposed between the first and second active regions; performing an oxidation process using the resultant structure as a mask so that a LOCOS oxide film including a lateral extension is formed in the field region; etching the silicon substrate and the LOCOS oxide film to a predetermined thickness using the resultant structure as a mask so that a trench is formed in the field region; forming a CVD oxide film on the resultant structure so that the trench is sufficiently filled; forming a STI of oxide film material including the lateral extension in the field region by processing the CVD oxide film by a CMP process so that the first nitride film remains in a predetermined thickness on the pad oxide film; removing the remaining first nitride film and the pad oxide film so that the first and second active regions are exposed; performing a CMOS-well ion-implantation process and a channel ion implantation process; performing a nitride film deposition process and an etching process so that a second nitride film remains in the first active region and so that the second active region is exposed; forming a first thermal oxide film for a gate oxide film in the second active region by using the remaining second nitride film as a mask; removing the remaining second nitride film in the first active region; and forming in the first active region a second thermal oxide film for a gate oxide film that is thinner in thickness than the first oxide film.