Patent ID: 6049113
Filing Date: 2000-04-11
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate;a first transistor formed on said semiconductor substrate and having a first gate electrode; anda second transistor formed on said semiconductor substrate and having a second gate electrode,wherein a first thickness of said first gate electrode is different than a second thickness of said second gate electrode,wherein said first transistor is an NMOS transistor and said second transistor is a PMOS transistor,wherein said first gate electrode of said NMOS transistor is made of an N.sup.+ type polycrystalline silicon film and said second gate electrode of said PMOS transistor is made of a P.sup.- type polycrystalline silicon film,wherein said first transistor comprises a first source/drain region formed of an N.sup.+ diffused layer region and said second transistor comprises a second source/drain region formed of an P.sup.+ diffused layer region,wherein said semiconductor substrate is a P.sup.+ type substrate,wherein a P.sup.- type layer is formed over said P.sup.+ type substrate,wherein a P type well and an N type well are formed over said P.sup.- type layer, andwherein said first source/drain region is formed over said P type well and said second source/drain region is formed over said N type well.