Patent ID: 8816426
Filing Date: 2014-08-26
Classification: G11C,H01L

Abstract:
1. A semiconductor device comprising: (a) a semiconductor substrate; (b) a first gate insulating film formed over the semiconductor substrate; (c) a first gate electrode formed over the first gate insulating film; (d) a second gate insulating film formed over the semiconductor substrate and over a side wall of the first gate electrode, the second gate insulating film including a charge accumulation portion; (e) a second gate electrode formed over the second gate insulating film adjacent to the first gate electrode through the second gate insulating film; (f) a well region formed in the semiconductor substrate, the well region including p-type impurities; (g) a first semiconductor region formed in the well region under one side of the first gate electrode, the first semiconductor region including n-type impurities; and (h) a second semiconductor region formed in the well region under one side of the second gate electrode, the second semiconductor region including n-type impurities, wherein the first gate electrode includes n-type impurities, wherein the second gate electrode is formed of a first silicon film having p-type impurities, wherein the first silicon film includes an upper portion and a lower portion located between the upper portion and the second gate insulating film, wherein a first p-type impurity concentration of the upper portion of the first silicon film is higher than a second p-type impurity concentration of the lower portion of the first silicon film, and wherein holes are injected into the charge accumulation portion from the second gate electrode.