Patent ID: 6552700
Filing Date: 2003-04-22
Classification: G09G

Abstract:
A monitor comprising:a display screen for displaying an image; a frame memory for storing one or more frames of display data for display by the display screen; an output clock configured to provide timing for reading display data from the frame memory; and an output clock control means for varying the timing of the output clock according to a reference waveform applied to the output clock, wherein the varying the timing of the output clock comprises the steps of: (a) generating output clock pulses for reading display data out of the frame memory, the timing and frequency of the output clock pulses being a function of two separate input signals; (b) frequency dividing the output clock pulses and producing an output horizontal sync pulse every predetermined number of clock pulses; (c) phase comparing both an input horizontal clock signal from an external source that also supplies the display data to the frame memory and the output horizontal sync pulse to produce a phase error signal representing the difference in phase between the output horizontal sync pulse and the horizontal clock signal and supplying the phase error signal as a first one of the two separate input signals for step (a); and applying a reference signal as a second one of the two separate input signals for step (a) for varying the period and timing of the clock pulses as a function of the waveform of the reference signal.