Patent ID: 7485528
Filing Date: 2009-02-03
Classification: H01L

Abstract:
1. A method of forming a memory device, comprising: forming a plurality of word line structures above a semiconducting substrate within a cell array area, each of said word line structures comprising a gate insulation layer; performing an LDD ion implantation process to form LDD doped regions in said semiconducting substrate between said word line structures within the cell array area; performing a halogen ion implantation process to implant atoms of said halogen into said semiconducting substrate between said word line structures within the cell array area, the halogen ion implantation and the LDD ion implantation being conducted in separate ion implantation steps; and performing at least one anneal process to cause at least some of said atoms of said halogen to diffuse from the semiconducting substrate into the gate insulation layers on adjacent word line structures.