Patent ID: 7773024
Filing Date: 2010-08-10
Classification: H03M

Abstract:
1. A method for performing a successive approximation analog-to-digital conversion with a first set of capacitors and a second set of capacitors, wherein a first plate of each capacitor from the first and second sets of capacitors is coupled to a common node, the method comprising: setting a first set of switches so that an input voltage is sampled on each capacitor from the first set of capacitors, wherein each switch from the first set of switches is associated with at least one of the capacitors from the first set of capacitors; after the step of setting the first set of switches stetting a first switch from the first set of switches so that its associated capacitor is floating; setting a second switch from the first set of switches so that a second plate of its associated capacitor receives at least one of a first reference voltage and a second reference voltage; comparing the voltage on the common node with a comparator reference voltage level to receive a comparison result to be used for a bit decision; and setting the first switch from the first set of switches so that its associated capacitor of the first set of capacitors receives at least one of the first reference voltage and the second reference voltage in accordance with the bit decision.