Patent ID: 6636517
Filing Date: 2003-10-21
Classification: H04L

Abstract:
An ATM cell assembling/disassembling apparatus arranged on an ATM terminal of an ATM network and connected to a physical layer device, a host CPU, and a host memory, said apparatus comprising:cell reception unit for receiving a cell from the physical layer device; reception VC detection unit for deciding whether the reception cell is valid according to a VPI/VCI information in a header of the reception cell; reception control unit for performing DMA transfer request after disassembling and error checking the cell which has been decided to be valid by the reception VC detection unit; reception data storage unit for temporarily storing a reception payload data extracted from the reception cell by the reception control unit; DMA output unit for reading out a reception payload data from the reception data storage unit according to a DMA transfer request from the reception control unit and DMA-transferring the reception payload data to the host memory; and reception clock control unit which starts clock supply to the reception control unit when the reception cell is decided to be valid by the reception VC detection unit, and terminates the clock supply to the reception control unit upon completion of processing for one cell by the reception control unit after the reception control unit performs cell disassembling and error check, stores a reception payload data in the reception data storage unit, and sends a request of a DMA transfer to the DMA output unit.