Patent ID: 8237449
Filing Date: 2012-08-07
Classification: G01R

Abstract:
1. A system for measuring a voltage drop between two nodes in an electrical circuit, the system comprising: a switched capacitor integrator (SCI) coupled to the two nodes and configured to alternately (a) capture samples of charge onto a set of sampling capacitors and (b) selectively accumulate the charge samples onto a pair of integration capacitors, wherein the charge samples include a first charge sample based on the voltage drop and a second charge sample based on a reference voltage, wherein said selectively accumulating includes accumulating the first charge sample, wherein said selectively accumulating includes accumulating the second charge sample only if a digital indicator signal equals one, wherein the SCI is configured to generate an analog output signal that corresponds to a total accumulated charge on the integration capacitors; a comparator circuit configured to generate the digital indicator signal based on the analog output signal, wherein the digital indicator signal indicates whether the analog output signal is positive or negative at each active edge of a clock signal; a counter configured to count a number of ones occurring in the digital indicator signal during a measurement interval, wherein, at the end of the measurement interval, the number represents a measure of the voltage drop.