Patent ID: 7223653
Filing Date: 2007-05-29
Classification: H01L

Abstract:
1. A method of forming a microelectronic structure including a trench capacitor in a semiconductor substrate, comprising: forming a trench in a semiconductor substrate, the trench having a trench sidewall, the sidewall including an upper portion, and a lower portion disposed below the upper portion; forming a dopant source layer along the lower portion of the trench sidewall, the dopant source layer not being disposed along the upper portion of the trench sidewall; forming a barrier layer along the upper portion of the trench sidewall, the barrier layer having a thickness less than about 25 angstroms; and annealing the semiconductor substrate to drive a dopant from the dopant source layer into the semiconductor substrate adjacent to the lower portion of the trench sidewall to form a buried plate region in the semiconductor substrate adjacent to the lower portion of the trench sidewall; removing the dopant source layer; after removing the dopant source layer, forming a node dielectric along the lower portion of the trench sidewall and a node electrode separated from the buried plate region by the node dielectric; and after removing the dopant source layer, forming an isolation collar along at least a part of the upper portion of the trench sidewall.