Patent ID: 6625752
Filing Date: 2003-09-23
Classification: G06F

Abstract:
A method for improving system availability after failure of processors in a processor platform formed by a plurality of processors, the method comprising:processing a prescribed task with one or more of the plurality of processors including splitting the prescribed task into one or more subtasks, which are each processes on the one or more of the plurality of processors, wherein a first logical chain is formed for a duration of the processing of the prescribed task; transferring physical and logical processor data and data describing a current processing state of the prescribed task from one of the plurality of processors arranged in a second logical chain to a next one of the plurality of processors arranged in the second logical chain, the second logical chain comprising the plurality of processors from the first logical chain; and loading back at least one of physical and logical processor data and data describing the current processing state of the prescribed task from the next one of the plurality of processors arranged in the second logical chain to the one of the plurality of processors arranged in the second logical chain when the one of plurality of processors fails and is restarted.