Patent ID: 6608349
Filing Date: 2003-08-19
Classification: H01L

Abstract:
A high performance MOSFET transistor structure comprising:a semiconductor substrate having a first conductivity type; a first linear sequence of a plurality of diffusion regions having a second conductivity type that is opposite the first conductivity type formed in the semiconductor substrate, each diffusion region in the first linear sequence being spaced-apart from a prior diffusion region in the first linear sequence to define a substrate channel region having the first conductivity type therebetween; a second linear sequence of a plurality of diffusion regions having the second conductivity type formed in the semiconductor substrate, each diffusion region in the second linear sequence being spaced-apart from a prior diffusion region in the second linear sequence to define a substrate channel region having the first conductivity type therebetween; an intermediate region of dielectric material formed in the semiconductor substrate between the first linear sequence of diffusion regions and associated substrate channel regions and the second linear sequence of diffusion region and associated substrate channel regions to provide electrical isolation between the first linear sequence of diffusion regions and the second linear sequence of diffusion regions, each substrate channel region of the first linear sequence of diffusion regions corresponding to a substrate channel region of the second linear sequence of diffusion regions to define a plurality of substrate channel region pairs; and a conductive gate electrode that includes a plurality of spaced-apart gate electrode fingers, each of the gate electrode fingers being connected to a common gate electrode portion and each of the gate electrode fingers extending over an associated substrate channel region pair and over the intermediate region of dielectric material and separated from said associated substrate channel region pair by intervening gate dielectric material; and wherein the diffusion regions in the first linear sequence of diffusion regions and the diffusion regions in the second linear sequence of diffusion regions are alternately connected to a source electrode and to a drain electrode to define first and second alternating linear sequences of source regions and drain regions such that the source regions are electrically connected in parallel and the drain regions are electrically connected in parallel.