Patent ID: 8375169
Filing Date: 2013-02-12
Classification: G06F

Abstract:
1. A memory controller for controlling access to a storage device, comprising: an address comparator for comparing a readout address which is output from a host system which processes data stored in the storage device, with one or more second addresses used for readout which are output from the host system previous to the first address; a predetermined address which is previously set and included in the second addresses and treated as having been output before the host system outputs the readout address when the host is turned on; a buffer including a non-volatile memory for storing data at the predetermined address; and a part for outputting data at the readout address which is read out from the buffer to the host system if the readout address is included in the predetermined address, and outputting data at the readout address which is read out from the storage device to the host system if the readout address is not included in the predetermined address, wherein the predetermined address includes a last used address prior to the host being turned off.