Patent ID: 6205493
Filing Date: 2001-03-20
Classification: G06F,H04L

Abstract:
A multiple-register-access capable device connected to a controller through a serial port, said device comprising:a plurality of registers;an address bus, said address bus connected to said plurality of registers;a data bus, said data bus connected to said plurality of registers;a control bus, said control bus connected to said plurality of registers;a multiple-register-access enable indicator from a multiple-register-access enable signal, wherein said indicator has one of either a first state indicating single-register access or a second state indicating multiple-register access;a set of information packets, wherein said set of information packets identifies at least one of said plurality of registers;a state machine to perform a read or write operation on at least one of said plurality of registers, wherein said operation is performed on a specified register when said set of information packets identifies said specified register and said indicator is in either said first state or said second state, and wherein said operation is preformed on a selected group of said plurality of registers when said information packets identifies said selected group and said indicator is in said second state;a port interface to communicate with the controller, said state machine, said address bus, said data bus and said control bus, and to receive said set of information packets; anda plurality of serial links connecting said port interface to each of said controller, said state machine, said address bus, said data bus, said control bus, and said plurality of registers to said address bus, said data bus and said control bus.