Patent ID: 7971104
Filing Date: 2011-06-28
Classification: G06F

Abstract:
1. A method for converting a processor, having a plurality of states and being operative to execute software operations stored in a memory device, into a self-stabilizing processor, the method comprising: providing self-stabilizing watchdog hardware that, with given timing, interacts with the processor in accordance with an interaction sequence that includes at least one trigger that sets the processor to a known state from among a set of at least one known states; providing a processor utilizing system which utilizes said processor, said processor utilizing system comprising a virtual machine monitor executing a plurality of virtual systems which all share said processor; providing at least one design software segment operative to perform a check determining whether a current state of said processor utilizing system is consistent; and ensuring periodic execution of said check by at least one design software segment, wherein said processor is operative to serve an element of a communication network having a communication protocol and a bandwidth and wherein said plurality of virtual systems executed by said virtual machine monitor comprises thereby generating a plurality of separate and separately stabilizing virtual communication layers each having a communication capacity, and each secured from influence of the others' activity.