Patent ID: 6653239
Filing Date: 2003-11-25
Classification: B81B,G01J

Abstract:
A method for constructing a substrate wafer having a vertical thermal isolator for thermally isolating a microstructure from said wafer comprising the steps of:etching one or more trenches in said substrate wafer, said trenches defining the cross-sectional shape of said vertical thermal isolator; etching one or more access holes for each of said trenches; binding a second silicon wafer to the top of said substrate wafer, thereby covering said trenches; performing a conformal deposition of a material on the inside of said trenches through said access boles to form said vertical thermal isolator; etching away said second wafer; constructing a microstructure connected to the top of said vertical thermal isolator; and etching away a portion of said substrate wafer, thereby releasing said microstructure and forming a void between said microstructure and said substrate wafer such that said microstructure is thermally isolated from said substrate wafer by said vertical thermal isolator.