Patent ID: 8970999
Filing Date: 2015-03-03
Classification: G09G,G11C,H01L,H02H,Y10T

Abstract:
1. A driver circuit comprising: a first transistor; a second transistor; a third transistor; and a first protection circuit comprising a fourth transistor, wherein a first terminal of the first transistor is electrically connected to a first clock signal line, wherein a second terminal of the first transistor is electrically connected to a gate of the second transistor, wherein a first terminal of the second transistor is electrically connected to a first power supply line, wherein a second terminal of the second transistor is electrically connected to a gate of the third transistor, wherein a first terminal of the third transistor is electrically connected to a second clock signal line, wherein a first terminal of the fourth transistor is electrically connected to the first power supply line, and wherein a second terminal of the fourth transistor is electrically connected to the gate of the second transistor and a gate of the fourth transistor.