Patent ID: 6034556
Filing Date: 2000-03-07
Classification: G11C,H03F

Abstract:
A sample-and-hold circuit comprising:a charge storage capacitor having one terminal connected to a fixed potential;an operational amplifier having an output terminal and an inverting input terminal connected to another terminal of the charge storage capacitor, and a non-inverting input terminal supplied with an input signal, said operational amplifier having a phase compensation capacitor and a push-pull circuit including a first NPN transistor as one output transistor and a first PNP transistor as another output transistor, for charging the charge storage capacitor in response to the input signal supplied to the non-inverting input terminal thereof; andan output open circuit for cutting off the NPN transistor and the PNP transistor, and for fixing a potential stored on the phase compensation capacitor in response to a hold signal supplied to a hold signal input terminal different from the inverting input terminal and the non-inverting input terminal.