Patent ID: 8422180
Filing Date: 2013-04-16
Classification: H01L

Abstract:
1. An electrostatic discharge (ESD) clamp circuit, comprising: a plurality of identical module circuits, wherein an anode of the first module circuit is coupled to a power terminal of the ESD clamp circuit, an anode of each of the other module circuits is coupled to a cathode of the previous module circuit, a cathode of the last module circuit is coupled to a ground terminal of the ESD clamp circuit, each of the module circuits comprising: a conduction path, coupled to the anode of the module circuit; and a detection circuit, coupled to the anode and the cathode and the conduction path of the module circuit, wherein when a rising speed of a voltage at the anode of the module circuit surpasses a threshold, the detection circuit makes the conduction path conducting, and the detection circuit comprises: a PMOS transistor, coupled between the anode of the corresponding module circuit and a first node; a resistor, coupled between the first node and a second node; a capacitor, coupled between the cathode of the corresponding module circuit and the second node; a first inverter, coupled to the second node and receiving a voltage of the second node; a second inverter, coupled to the first inverter and receiving an output of the first inverter; and a third inverter, coupled to the first node and the second inverter and receiving a voltage of the first node, wherein an output of the third inverter makes the corresponding conduction path conducting or non-conducting.