Patent ID: 6087211
Filing Date: 2000-07-11
Classification: H01L

Abstract:
A method for forming a semiconductor device on a semiconductor wafer, the wafer having:a substrate;a first well formed in the substrate, the first well having a first area, a second area, and a conductivity type; anda second well formed in the substrate, the second well being spaced apart from the first well, and having a conductivity type which is different from the conductivity type of the first well;the method comprising the steps of:forming a layer of first gate oxide over the first area of the first well, and the second well;forming a layer of tunnel oxide over the second area of the first well after the layer of first gate oxide has been formed;forming a layer of first polysilicon (poly-1) over the layer of tunnel oxide and the layer of first gate oxide;forming a layer of interpoly dielectric over the layer of poly-1;forming a layer of nitride over the layer of interpoly dielectric;forming a third well in the substrate after the layer of nitride has been formed, the third well being spaced apart from the first and second wells, and having a conductivity type;forming a fourth well in the substrate after the layer of nitride has been formed, the fourth well being spaced apart from the first, second, and third wells, and having a conductivity type which is different from the conductivity type of the third well;forming a layer of second gate oxide over the third and fourth wells; andforming a layer of second polysilicon (poly-2) over the layer of nitride and the layer of second gate oxide.