Patent ID: 6589828
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A method for the fabrication of a thin film transistor, comprising:forming a gate electrode on an insulating substrate; forming a gate oxide film on the insulating substrate and the gate electrode; depositing a polysilicon layer on the gate oxide film; implanting a BF2 ion into the entire polysilicon layer to control a threshold voltage of the polysilicon layer; forming a first mask on a portion of the polysilicon layer placed on the gate electrode, the first mask having approximately the same width as that of the gate electrode; implanting a BF2 ion and then implanting a N2 ion into the exposed portion of the polysilicon layer using the first mask, to form a lightly doped offset region on a region intended for a drain region, the N2 ion implanted into the polysilicon layer passes through the diffusion paths of the boron ions and inhibits the diffusion of the boron ion; removing the first mask; forming a second mask on the polysilicon layer in such a manner that the second ion-implanting mask covers a portion of the gate electrode and the lightly doped offset region; implanting an ion into the polysilicon layer using the second ion implanting mask to form source/drain regions; and removing the second mask.