Patent ID: 6563348
Filing Date: 2003-05-13
Classification: G11C,H03F

Abstract:
A circuit, comprising:an operational amplifier (op-amp) having first, second, third and fourth input terminals, the third and fourth input terminals of the op-amp coupled to a first potential; and first and second sample and hold (S/H) circuits coupled to receive and sample an input signal, the first and second S/H circuits each having an output terminal coupled to the first and second input terminals, respectively, of the op-amp, the op-amp coupled to alternatingly evaluate the sampled input signals through unswitched connections between the first and second S/H circuits and the op-amp, the first S/H circuit coupled to sample the input signal while the second S/H circuit is evaluated by the op-amp, the second S/H circuit coupled to sample the input signal while the first S/H circuit is evaluated by the op-amp.