Patent ID: 6304950
Filing Date: 2001-10-16
Classification: G06F

Abstract:
A microcomputer comprising:a random access memory (RAM) including a plurality of RAM areas;a read only memory (ROM) including a plurality of ROM areas that can be emulated by the RAM areas;means for assigning at least one of the RAM areas to each of the ROM areas for emulation of the ROM areas;means for replacing each of the ROM areas with a RAM area assigned to the ROM area for emulation of the ROM area, wherein the ROM areas are equal in storage capacity, and the RAM areas have the same storage capacity as the ROM areas; anda plurality of switches respectively associated with the RAM areas, each switch connecting and disconnecting a corresponding RAM area and the ROM area associated with the corresponding RAM area, in response to a control signal applied to an external terminal, wherein each of said plurality of switches is closed and opened respectively to enable and disable replacement of a ROM area with the corresponding RAM area.