Patent ID: 7683372
Filing Date: 2010-03-23
Classification: H01J,H01L

Abstract:
1. A semiconductor apparatus comprising: at least one n-channel TFT formed in a pixel over a substrate, the n-channel TFT comprising a first island like semiconductor including an n-type impurity in source and drain regions thereof; at least one p-channel TFT formed in the pixel over the substrate, the p-channel TFT comprising a second island like semiconductor including an p-type impurity in source and drain regions thereof; an insulating film formed over the substrate to cover the first island like semiconductor and the second island like semiconductor; a gate electrode formed to overlap a portion of the first island like semiconductor and a portion of the second island like semiconductor via the insulating film; and a gate signal line provided between the first and second island like semiconductors, wherein an area of the insulating film which is added with the p-type impurity is larger than an area of the insulating film which is added with the n-type impurity, wherein a portion of the insulating film located between the gate signal line and the first island like semiconductor contains the p-type impurity, and wherein a portion of the insulating film located between the gate signal line and the second island like semiconductor contains the p-type impurity.