Patent ID: 6253292
Filing Date: 2001-06-26
Classification: G06F

Abstract:
A distributed shared memory multiprocessor system comprising:a group of processor nodes, wherein the processor nodes, each node including a storage, arc arranged in the form of a ring and one of the processor nodes generates a request signal for a data block, the remaining processor nodes snoop their own storages, and one of the remaining processor nodes provides the data block; anda ring bus for connecting the processor nodes in the form of the ring and providing a path through which the request signal is broadcast to each of the remaining processor nodes and the data block is provided to the processor node which has generated the request signal,wherein each of the processor nodes further includes:a plurality of processor modules for generating the request signal for the data block;a node controller for providing the data block corresponding to the request signal, wherein the node controller provides the data block corresponding to the request signal stored at a local shared memory or the remote cache of the processor node if the data block corresponding to the request signal is stored at the local shared memory or the remote cache of the processor node, and the node controller transmits the request signal via the ring bus if the data block corresponding to the request signal is not stored at the local shared memory or the remote cache of the processor node; provides the data block corresponding to the request signal to the processor module of the processor node which requires the data block if the data block corresponding to the request signal is provided from one of the remaining processor nodes; and examines whether the data block corresponding to the request signal is stored at its remote cache or the local shared memory and provides the data block if the request signal is provided from one of the remaining processor nodes; anda ring interface for connecting the node controller to the ring bus,wherein the storage contains:a local shared memory for storing data blocks, wherein the data blocks are shared by each of the processor modules; anda remote cache for storing the data block corresponding to the request signal, andwherein the local shared memory contains:a data memory for storing contents of the data block;a memory controller, connected to a local system bus, for providing the data block stored at the data memory to the local system bus if the request signal is provided from the local system bus; anda memory directory cache, connected to the node controller, for storing data on the state of the data block stored at the data memory.