Patent ID: 6285262
Filing Date: 2001-09-04
Classification: H03B,H03K,H03L

Abstract:
A frequency divider comprising:first and second basic gates, each including first and second differential circuits, an adder unit for adding outputs from the first and second differential circuits and a buffer circuit to which an output from the adder unit is input,wherein the adder units of the first and second basic gates receive negative feedback from outputs from the adder units of the first and second basic gates through the second differential circuits of the first and second basic gates and the buffer circuits of the first and second basic gates, respectively, an output from the adder unit of the first basic gate is directly input to the first differential circuit of the second basic gate, and an output from the adder unit of the second basic gate is fed back to an input of the first differential circuit of the first basic gate;a first current source for supplying a current in common to the first differential circuits of the first and second basic gates;a first current switching circuit inserted between the first current source and the first differential circuits of the first and second basic gates; andsecond and third current sources for respectively supplying currents to the second differential circuits of the first and second basic gates,wherein a differential input signal is input to the first current switching circuit and a frequency-divided output signal is obtained from the buffer circuit of the second basic gate.