Patent ID: 6020251
Filing Date: 2000-02-01
Classification: H01L

Abstract:
A method for forming a plurality of buried diffusion junction in a semiconductor device, comprising the steps of:(1) preparing a semiconductor substrate, forming a first oxide layer over the substrate, forming a silicon nitride layer over the first oxide layer, and then removing a first selected part of the silicon nitride layer to thereby expose those areas of the pad oxide layer beneath which the buried diffusion junctions are to be formed;(2) performing an oxidation process so as to transform each of the exposed portions of the pad oxide layer that are uncovered by the silicon nitride layer into a second oxide layer;(3) removing a second selected part of the silicon nitride layer to thereby expose part of the first oxide layer, with the remaining part of the silicon nitride layer covering the active regions;(4) performing an etching process with the silicon nitride layer serving as mask to thereby etch away the exposed portions of the first oxide layer;(5) forming a plurality of STI structures in the substrate to isolate the active regions from each other;(6) forming a doped area in the substrate beneath each of the second oxide layers; and(7) performing an annealing process to transform the doped area into the desired buried diffusion junction.