Patent ID: 6678801
Filing Date: 2004-01-13
Classification: G06F

Abstract:
A method for transferring data between a global resource on a global bus in a multi-processor system and the local bus of a plurality of processor nodes each having a processor associated therewith, comprising the steps of:providing a plurality of memory devices each disposed between the global bus and the local bus of an associated one of the processor nodes; designating a separate and distinct portion of the global address space of the global bus to each of the memory devices such that each of the memory devices occupies a separate and distinct portion of the global address space; designating a portion of the local address space of the local bus of each of the processor nodes to the associated memory device, the local address space of the local bus distinct and separate from the global address space of the global bus such that addressable locations within each of the memory devices exist within the global address space and the local address space of the associated one of the processor nodes; directly transferring data between the global resource and a select one of the memory devices within the portion of the global address space associated therewith and without requiring address translation such that the memory is directly addressable from the global address bus; and directly transferring data between the memory device and the associated processor within the portion of the local address space associated therewith and without requiring address translation such that the memory is directly addressable from the local bus.