Patent ID: 7649529
Filing Date: 2010-01-19
Classification: G09G,H01L

Abstract:
1. A display device comprising: a first pixel comprising a first sub-pixel, a second sub-pixel and a third sub-pixel arranged in a column direction; a second pixel adjacent to the first pixel, the second pixel comprises a fourth sub-pixel, a fifth sib-pixel and sixth sub-pixel arranged in the column direction; a power supply line disposed between the first pixel and the second pixel; a first signal line; a second signal line; a third signal line; a fourth signal line; a fifth signal line; a sixth signal line; a seventh signal line; and a eighth signal line, wherein the first sub-pixel comprises a first transistor, a second transistor, a thirteenth transistor and a first pixel electrode, a gate of the first transistor is electrically connected to the third signal line, one of a source and a drain of the first transistor is electrically connected to the first signal line, the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor, one of a source and a drain of the second transistor is electrically connected to the power supply line, the other of the source and the drain of the second transistor is electrically connected to the first pixel electrode, a gate of the thirteenth transistor is electrically connected to the sixth signal line, one of a source and a drain of the thirteenth transistor is electrically connected to the gate of the second transistor, and the other of the source and the drain of the thirteenth transistor is electrically connected to the power supply line, wherein the second sub-pixel comprises a third transistor, a fourth transistor and a second pixel electrode, a gate of the third transistor is electrically connected to the fourth signal line, one of a source and a drain of the third transistor is electrically connected to the first signal line, the other of the source and the drain of the third transistor is electrically connected to a gate of the fourth transistor, one of a source and a drain of the fourth transistor is electrically connected to the power supply line, the other of the source and the drain of the fourth transistor is electrically connected to the second pixel electrode, a gate of the fourteenth transistor is electrically connected to the seventh signal line, one of a source and a drain of the fourteenth transistor is electrically connected to the gate of the fourth transistor, and the other of the source and the drain of the fourteenth transistor is electrically connected to the power supply line, wherein the first sub-pixel comprises a fifth transistor, a sixth transistor and a third pixel electrode, a gate of the fifth transistor is electrically connected to the fifth signal line, one of a source and a drain of the fifth transistor is electrically connected to the first signal line, the other of the source and the drain of the fifth transistor is electrically connected to a gate of the sixth transistor, one of a source and a drain of the sixth transistor is electrically connected to the power supply line, the other of the source and the drain of the sixth transistor is electrically connected to the third pixel electrode, a gate of the fifteenth transistor is electrically connected to the eighth signal line, one of a source and a drain of the fifteenth transistor is electrically connected to the gate of the sixth transistor, and the other of the source and the drain of the fifteenth transistor is electrically connected to the power supply line, wherein the fourth sub-pixel comprises a seventh transistor, a eighth transistor and a fourth pixel electrode, a gate of the seventh transistor is electrically connected to the third signal line, one of a source and a drain of the seventh transistor is electrically connected to the second signal line, the other of the source and the drain of the seventh transistor is electrically connected to a gate of the eighth transistor, one of a source and a drain of the eighth transistor is electrically connected to the power supply line, the other of the source and the drain of the eighth transistor is electrically connected to the fourth pixel electrode, a gate of the sixteenth transistor is electrically connected to the sixth signal line, one of a source and a drain of the sixteenth transistor is electrically connected to the gate of the eighth transistor, and the other of the source and the drain of the sixteenth transistor is electrically connected to the power supply line, wherein the fifth sub-pixel comprises a ninth transistor, a tenth transistor and a fifth pixel electrode, a gate of the ninth transistor is electrically connected to the fourth signal line, one of a source and a drain of the ninth transistor is electrically connected to the second signal line, the other of the source and the drain of the ninth transistor is electrically connected to a gate of the tenth transistor, one of a source and a drain of the tenth transistor is electrically connected to the power supply line, the other of the source and the drain of the tenth transistor is electrically connected to the fifth pixel electrode, a gate of the seventeenth transistor is electrically connected to the seventh signal line, one of a source and a drain of the seventeenth transistor is electrically connected to the gate of the tenth transistor, and the other of the source and the drain of the seventeenth transistor is electrically connected to the power supply line, and wherein the sixth sub-pixel comprises a eleventh transistor, a twelfth transistor and a sixth pixel electrode, a gate of the eleventh transistor is electrically connected to the fifth signal line, one of a source and a drain of the eleventh transistor is electrically connected to the second signal line, the other of the source and the drain of the eleventh transistor is electrically connected to a gate of the twelfth transistor, one of a source and a drain of the twelfth transistor is electrically connected to the power supply line, the other of the source and the drain of the twelfth transistor is electrically connected to the sixth pixel electrode a gate of the eighteenth transistor is electrically connected to the eighth signal line, one of a source and a drain of the eighteenth transistor is electrically connected to the gate of the twelfth transistor, and the other of the source and the drain of the eighteenth transistor is electrically connected to the power supply line.