Patent ID: 6441473
Filing Date: 2002-08-27
Classification: H01L

Abstract:
A semiconductor chip assembly mounted to a substrate, the substrate having a first thermal expansion coefficient and a surface having at least one electrode thereon, the chip assembly comprising:a semiconductor chip having a second thermal expansion coefficient; at least one bond pad disposed on the active side of the chip; a monolithically-deposited base layer abutting the bond pad having a first surface adjacent the active side of the chip and a second surface adjacent the substrate; at least one solder bump disposed on the chip for coupling the chip to the substrate, the solder bump having an effective thermal expansion coefficient dependent upon the material and thickness of the base layer; metallic interconnect layer deposited on the second surface of the base layer for coupling the solder bump to the bond pad, the interconnect layer having an underside facing the active side of the chip, and the underside is substantially continuously supported by the second surface of the base layer; wherein the base layer is comprised of at least one layer of polymeric material and has a composition and thickness selected wherein, when the solder bump is coupled to the at least one electrode, the base layer will modify the effective thermal expansion coefficient of the at least one solder bump so that the difference between the effective thermal expansion coefficient and the first thermal expansion coefficient is less than the difference between the first and second thermal expansion coefficients.