Patent ID: 9166487
Filing Date: 2015-10-20
Classification: H01L,H02M

Abstract:
1. A package structure integrating a start-up component, a controller, and a power switch for a power converter, wherein said power converter has a primary coil for transferring power and an auxiliary coil for generating a supply voltage, said primary coil has a first end and a second end, and said first end is coupled to a rectifier, said package structure comprising: a first die pad made of a conductor, used for carrying a chip of said controller; a second die pad made of said conductor, used for carrying a chip of said start-up component and a chip of said power switch, wherein said chip of said start-up component has a top surface providing a first gate contact and a first source contact, and a bottom surface providing a first drain contact which is electrically connected with said second die pad; and said chip of said power switch has a top surface providing a second gate contact and a second source contact, and a bottom surface providing a second drain contact which is electrically connected with said second die pad; a plurality of external connection leads, wherein one of said plurality of external connection leads is connected with said second die pad via a wire and is used to couple with said second end of said primary coil; a resin material, used to enclose said chip of said controller, said chip of said start-up component, said chip of said power switch, said first die pad, and said second die pad; the controller being a PWM controller, the start-up component being a first NMOS transistor, and the power switch being a second NMOS transistor; the PWM controller having a first contact and a second contact for connecting with the first NMOS transistor, and a third contact for providing a PWM signal to switch on/off the second NMOS transistor for realizing a power conversion; the second NMOS transistor having a second drain coupled to the second end of the primary coil, a second gate coupled with the PWM signal, and a second source connected with a current sensing resistor for generating a current sensing signal according to a primary current; the second NMOS transistor controlling an “on” period for the primary current to flow through the primary coil in response to the PWM signal; the first drain of the first NMOS transistor and the second drain of the second NMOS transistor sharing the second end of the primary coil as a contact; and the chip of the first NMOS transistor and the chip of the second NMOS transistor being placed on the second die pad.