Patent ID: 9153475
Filing Date: 2015-10-06
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: forming, in a first direction, trenches in isolation regions of a semiconductor substrate; forming an SOG layer over the semiconductor substrate to fill the trenches; performing a heat treatment process to cure a top portion of the SOG layer to form a cured portion of the SOG layer; curing only the top portion of the SOG layer, at a temperature ranging from room temperature to 600° C., to form the cured portion of the SOG layer; performing, at a temperature ranging between 100° C. and 1100° C., furnace annealing or rapid thermal annealing on the SOG layer using a wet atmosphere, a N etching the SOG layer so that a top surface of the cured portion of the SOG layer is at substantially a middle height of each of the gate lines; forming gate lines, in a second direction crossing the first direction, over the isolation layers and over active regions defined between the isolation layers; forming first air gaps, extending in the first direction, by performing an etching process to remove at least a portion of each of the isolation layers; and forming an insulating layer between the gate lines so that an air gap is formed in the insulating layer, wherein the air gap extends in the first direction in the trenches and extends in the second direction between the gate lines.