Patent ID: 6737722
Filing Date: 2004-05-18
Classification: H01L

Abstract:
A lateral transistor comprising;a semiconductor substrate of a first conductivity type; a buried base region of a second conductivity type opposite to the first conductivity type, disposed on said semiconductor substrate; a uniform base region of the second conductivity type disposed on said first buried base region, the uniform base region having a uniform lateral doping profile, the lateral doping profile being measured along a lateral direction parallel to the top surface of said semiconductor substrate; a plug region of the second conductivity type disposed in said uniform base region, the plug region protrudes from a top surface of said uniform base region so as to reach to said buried base region; a first main electrode region of the first conductivity type disposed in and at the top surface of said uniform base region; a graded base region of the second conductivity type disposed in said uniform base region, enclosing bottom and side of said first main electrode region such that said first main electrode region is disposed in the center at the top surface of the graded base region, the graded base region having a doping profile such that impurity concentration decreases gradually along the lateral direction towards said second main electrode region from said first main electrode region when the lateral transistor is not biased, and a second main electrode region of the first conductivity type disposed in and at the top surface of said uniform base region so as to directly contact with said uniform base region, the second main electrode region being aligned in the lateral direction with the first main electrode region configured such that a main current of the lateral transistor flows along the lateral direction between the first and second main electrode regions, wherein a combination of said buried base region, said uniform base region and said graded base region serves as a base region.