Patent ID: 6147398
Filing Date: 2000-11-14
Classification: H01L

Abstract:
A semiconductor device package comprising:a semiconductor chip having a plurality of pad parts disposed on a major surface thereof;a plurality of lead members for electrically connecting the pad parts of said semiconductor chip to a mounting substrate; anda side cover member of insulating material fitted onto the semiconductor chip from a peripheral edge thereof,wherein each of said lead members has a fitting part with a U-shaped cross section fitted onto said semiconductor chip from a peripheral edge thereof, said fitting part including a contact point for conducting therethrough to said pad part and a deposit of insulating material for insulating portions of said lead member from said semiconductor chip, said side cover member integrating said plurality of lead members at a predetermined interval by the deposit of insulating material along the peripheral edge from one of an outermost two of the lead members to the other of the outermost two of the lead members, each of said plurality of lead members being mounted on said semiconductor chip with said contact point being held in electrical contact with the pad part of said semiconductor chip.