Patent ID: 6492797
Filing Date: 2002-12-10
Classification: G01R

Abstract:
A method of calibrating an integrated circuit tester having a fixture for electrical coupling an integrated circuit to the tester, the fixture having a plurality of electrical connections to the integrated circuit, the method comprising:providing a plurality of reference blocks, each reference block fitting in the fixture and having at least two electrical terminals coupled by a trace, wherein the traces on each reference block in the plurality of reference blocks are of about the same electrical path length, and wherein the at least two electrical terminals each electrically contact the fixture; inserting one-by-one each of the reference blocks in the fixture; propagating a signal from the tester through the trace on each reference block while the reference block is inserted in the fixture; measuring a propagation time of the signal for each reference block; and calibrating timing of signal propagation of the tester from the measured propagation times.