Patent ID: 8877623
Filing Date: 2014-11-04
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, comprising: forming a first interfacial material layer by a deposition process on a substrate; forming a dummy gate material layer on the first interfacial material layer; patterning the dummy gate material layer and the first interfacial material layer to form a stacked structure; forming an interlayer dielectric (ILD) layer to cover the stacked structure; removing a portion of the ILD layer to expose a top of the stacked structure; removing the stacked structure to form a trench in the ILD layer; conformally forming a second interfacial layer and a first high-k layer at least on a surface of the trench; and forming a composite metal layer to at least fill up the trench, wherein the substrate is a substrate with fins extending in a first direction, and the stacked structure crosses the fins and extends in a second direction different from the first direction, and wherein the composite metal layer comprises a work function metal layer and a low resistivity metal layer, and further comprises: a bottom barrier layer, disposed between the first high-k layer and the work function metal layer; a top barrier layer, disposed between the work function metal layer and the low resistivity metal layer; and an etch stop metal layer, disposed between the bottom barrier layer and the work function metal layer.