Patent ID: 7576375
Filing Date: 2009-08-18
Classification: G02F,H01L

Abstract:
1. A thin film transistor array, comprising: a substrate; a plurality of scan lines disposed on the substrate; a plurality of data lines disposed on the substrate, wherein the scan lines and the data lines define a plurality of pixel areas on the substrate; a plurality of thin film transistors, each being disposed within a corresponding pixel area, wherein each of the plurality of thin film transistors is driven through a corresponding scan line and data line; a plurality of upper electrodes, each being disposed within a corresponding pixel area above a corresponding scan line and having a protrusion protruding beyond one of the edges of the scan line; and a plurality of pixel electrodes, each being disposed within a corresponding pixel area and electrically connecting to a corresponding thin film transistor and upper electrode, wherein each pixel electrode has at least a slit formed therein, the slit has an end portion near the corresponding scan line, and the end portion is completely shielded by the protrusion of the corresponding upper electrode.