Patent ID: 6476629
Filing Date: 2002-11-05
Classification: G01R

Abstract:
A burn-in board for testing integrated circuit devices disposed in at least two trays, each of said at least two trays having a plurality of cells arranged in a pattern for receiving integrated circuit devices therein in orientations wherein leads thereof are accessible from above, comprising:a generally planar substrate having a substantially planar interface surface; a plurality of footprints disposed on said substantially planar interface surface and arranged substantially congruent with said pattern; wherein each footprint of said plurality of footprints comprises a plurality of electrical contacts, each electrical contact of said plurality of electrical contacts being located on said substantially planar interface surface and configured for establishing direct electrical contact from above with at least one lead extending from one of said integrated circuit devices disposed on one of said at least two trays; at least one other plurality of footprints disposed on said interface surface and arranged substantially congruent with said pattern; wherein each footprint of said at least one other plurality of footprints comprises a plurality of electrical contacts, each electrical contact of said plurality of electrical contacts being located on said substantially planar interface surface and configured for establishing direct electrical contact from above with at least one lead extending from one of said integrated circuit devices disposed on another of said at least two trays.