Patent ID: 6557107
Filing Date: 2003-04-29
Classification: G06F,Y02D

Abstract:
A microcontroller having a power saving mode by which power consumption is reduced, comprising:at least one data port sensing circuit for sensing a level of at least one data signal; a power-save release detection circuit coupled to said at least one data port sensing circuit, for detecting a transition in the level of the at least one data signal during operation in said power saving mode, and for generating a power-save release signal to release said microcontroller from the power saving mode upon the transition in the level of the at least one data signal; an interrupt control circuit for generating an interrupt processing control signal when at least one interrupt is generated by at least one interrupt source; and a logic gate circuit having a first input for receiving the power-save release signal, a second input for receiving a system reset signal to reset a system on which said microcontroller is mounted, a third input for receiving the interrupt processing control signal, and an output for providing a second release signal to release said microcontroller from the power saving mode when at least one of the power-save release signal, the system reset signal and the interrupt processing control signal is activated.