Patent ID: 8174065
Filing Date: 2012-05-08
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a cell region and a peripheral circuit region; a vertical transistor disposed in the semiconductor substrate of the cell region; a contact pad disposed on the vertical transistor; and a peripheral circuit gate electrode disposed on the semiconductor substrate of the peripheral circuit region, and composed of the same material as that of the contact pad, wherein the vertical transistor comprises a semiconductor pillar extending from the semiconductor substrate and having a concave portion formed in a sidewall of the semiconductor pillar, source and drain regions being disposed in an upper portion and a lower portion of the semiconductor pillar, respectively, a cell gate electrode surrounding a center portion of the semiconductor pillar in the concave portion of the semiconductor pillar, and a cell gate insulating layer interposed between the semiconductor pillar and the cell gate electrode.