Patent ID: 6803667
Filing Date: 2004-10-12
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor element; a first electrode layer formed on one main surface side of the semiconductor element; a second electrode layer formed on the one main surface side of the semiconductor element to be spaced from the first electrode layer; an electrically conductive bonding material having a region in contact with the second electrode layer and also having a region overlapping the first electrode layer; an organic protective film, the protective film being disposed between the first electrode layer and the bonding material so as to cover the first electrode layer in the region where the first electrode layer and the bonding material overlap each other, thereby preventing contact of the first electrode layer with the bonding material; and first metal blocks bonded electrically to the second electrode layer through the bonding material; wherein the thickness of the first electrode layer at a peripheral edge portion of the first electrode layer is t1 and a thickness of the protective film around the first electrode layer in a peripheral region is t2, there exists the following relationship: t12, and wherein the bonding material is a Sn-based solder, and given that a thermal expansion coefficient of the first metal block is &agr;1, that of the semiconductor element is &agr;2, a chip size of the semiconductor element is aÃ—b, and a temperature difference between highest and lowest temperatures in a working environment is &Dgr;T, there exists the following relationship: t&it;â€ƒ&it;1<t&it;â€ƒ&it;2&leq;12Ã—a2+b2Ã—&LeftBracketingBar;Î±1-Î±2&RightBracketingBar;Ã—Î”&it;â€ƒ&it;T.