Patent ID: 9082789
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A method comprising: providing a substrate having a first region and a second region; forming a first dielectric layer of a first material over the substrate in the first region; forming a second dielectric layer of a second material over the substrate in the second region, wherein the second material is different from the first material; forming a sacrificial gate layer over the first and second dielectric layers; patterning the sacrificial gate layer, the first and second dielectric layers to form gate stacks in the first and the second regions; forming an ILD layer over the gate stacks in the first and second regions; partially removing the ILD layer in the first and second regions to expose the sacrificial gate layer; removing the exposed sacrificial gate layer to define openings in the ILD layer in the first and second regions and expose the first dielectric layer and the second dielectric layer; and removing the second dielectric layer exposed in at least one of the openings in the ILD layer, removing the second dielectric layer comprising initiating an etching process on the exposed first dielectric layer and the exposed second dielectric layer, the etching process having high etching selectivity between the second dielectric layer and the first dielectric layer.