Patent ID: 9190148
Filing Date: 2015-11-17
Classification: G11C,H01L

Abstract:
1. A semiconductor memory storage device, comprising: a first doped region of a first doping type disposed in a semiconductor substrate defining a source; a second doped region of the first doping type disposed in the semiconductor substrate defining a drain, the second doped region laterally spaced from the first doped region; a gate dielectric extended over the semiconductor substrate between the first and second doped regions; a floating gate disposed on the gate dielectric; and an ultraviolet (UV) light blocking material vertically disposed above the floating gate, the UV light blocking material having a size that covers the floating gate such that the floating gate remains electrically charged after the semiconductor memory storage device is exposed to UV light during programming such that the semiconductor memory storage device stores a logic one, wherein one of the first doped region of the first doping type and the second doped region of the first doping type is coupled to a bit line.