Patent ID: 6363012
Filing Date: 2002-03-26
Classification: G11C

Abstract:
A method of operating a flash memory structure including a programming step, the method comprising:providing a flash memory device, the flash memory device comprising a body of first conductivity type, a source region of second conductivity type being defined in the body and a drain region of second conductivity type defined in the body; applying a drain voltage of first polarity type on the drain region and applying a control gate voltage of first polarity type on a control gate; and applying a source voltage of second polarity type ranging from about 0.1 volt to about 0.5 volt on the source region, while maintaining a ground potential on the body to inject electrons onto a floating gate, wherein the source voltage of second polarity type is applied by a bias-potential generation circuit coupled to the source region, the bias-potential generation circuit being coupled to the source region through a source-bias line.