Patent ID: 6674671
Filing Date: 2004-01-06
Classification: G11C

Abstract:
An apparatus comprising:a source circuit configured to generate a first dynamic data signal and a second dynamic data signal that is a complement of the first dynamic data signal; a first transistor having a first control terminal coupled to receive the first dynamic data signal, wherein the first transistor is coupled to a first node and is configured to drive a first state on the first node responsive to an assertion of the first dynamic data signal; a second transistor coupled to the first node and having a second control terminal, the second transistor configured to drive a second state on the first node responsive to a signal on the second control terminal; and a circuit coupled to receive the second dynamic data signal, and configured to generate the signal on the second control terminal responsive to the second dynamic data signal, wherein the circuit is configured to activate the second transistor responsive to an assertion of the second dynamic data signal.