Patent ID: 6373881
Filing Date: 2002-04-16
Classification: H04B

Abstract:
A code division multiple access communication receiver comprising:a memory for storing samples representing amplitudes of a chip sequence sampled at intervals smaller than chip intervals of the chip sequence; sync search and tracking circuitry for reading, from said memory, a set of chip samples spaced from each other by said chip intervals and spaced from corresponding chip samples of adjacent sets by said smaller intervals, detecting a match or mismatch between the read samples and an incoming data sequence, and determining the read chip samples as a synchronized chip sequence if said match is detected, and reading a next set of chip samples from said memory if said mismatch is detected, and further detecting a match or a mismatch between the chip samples of the next set and said incoming data sequence; and a despreading filter for despreading the incoming data sequence with said synchronized chip sequence.