Patent ID: 6189075
Filing Date: 2001-02-13
Classification: G06F

Abstract:
An information processing system comprising:at least two user devices each comprising one local memory, the local memory being used as a working memory for each of the user devices;at least one priority access processor generating a priority interrupt request for interrupting requests from the user devices;a central memory whose contents can be used by one of the at least two user devices and the at least one priority access processor;a circuit for managing the central memory that receives requests from the user devices and, as a function of the priority interrupt request and of internal information, gives signals to drive the central memory and data exchanges between the central memory and the user devices;a first-in/first-out (FIFO) buffer memory connected firstly between the management circuit and the central memory and secondly between the user devices and the central memory; andthe circuit for managing the central memory enabling the priority access processor to replace the FIFO buffer memory to directly drive the central memory.