Patent ID: 8945953
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a first circuit layer over a first surface of a semiconductor substrate, (b) forming a plurality of through-electrodes electrically coupled to the first circuit layer in the semiconductor substrate, (c) forming a second circuit layer electrically coupled to the through-electrodes over the first circuit layer, (d) forming a plurality of first electrodes electrically coupled to the second circuit layer over the second circuit layer, (e) grinding a second surface of the semiconductor substrate opposite to the first surface to expose a portion of each of the through-electrodes and forming a plurality of second electrodes, (f) testing an electrically coupling state between the first electrodes and the second electrodes, (g) dicing the semiconductor substrate into a plurality of semiconductor chips, (h) providing a wiring substrate, and (i) mounting, among the semiconductor chips, semiconductor chips determined non-defective in the step (f) over a first main surface of the wiring substrate and electrically coupling the wiring substrate to the first electrodes, wherein the electrode pitch between the first electrodes is wider than the electrode pitch between the second electrodes, and wherein in the step (f), conduction between the second electrodes is checked while short-circuiting between the first electrodes.