Patent ID: 8735215
Filing Date: 2014-05-27
Classification: H01L

Abstract:
1. A method of manufacturing a variable resistance memory device, comprising: forming a bottom electrode on a substrate; forming an insulating layer on the substrate, the insulating layer defining a first opening that exposes a portion of the bottom electrode; forming a first variable resistance material layer to fill the first opening, the first variable resistance material layer including a plurality of elements; forming a second variable resistance material layer including a first region disposed in the first opening, and a second region disposed on the first region and the insulating layer by removing a seam of the first variable resistance material layer, the first region having a relatively low ratio of at least one element having a heat of vaporization that is greater than a different element among the plurality of elements, and the second region having a relatively high ratio of the at least one element having a heat of vaporization that is greater than a different element among the plurality of elements; forming a variable resistance material pattern by patterning the second variable resistance material layer, the variable resistance material pattern including the first region and the second region; doping the first region and the second region of the variable resistance material pattern with a dopant, the dopant including the at least one element among the plurality of elements; and forming a top electrode on the variable resistance material pattern, wherein the dopant includes the at least one element having a heat of vaporization that is greater than a different element among the plurality of elements.