Patent ID: 7858492
Filing Date: 2010-12-28
Classification: H01L

Abstract:
1. A method for use in the fabricating of a semiconductor device, the method comprising: providing a substrate having a first trench extending therein from an upper surface of the substrate such that the first trench has an opening at the upper surface, which opening constitutes an entrance to the first trench; forming a preliminary insulating layer on the substrate in conformance with the topography of the substrate including the first trench and to such a thickness that the preliminary insulating layer extends along the bottom and sides of the first trench and along an upper surface of the substrate, the first trench has an unfilled portion at which part of the entrance to the first trench remains open at the top of the substrate, and the preliminary insulating layer has at the entrance an overhanging portion that overhangs an upper unfilled portion of the first trench; while the first trench still has an unfilled portion at which part of the entrance to the first trench remains open at the top of the substrate, doping the overhanging portion of the preliminary insulating layer and the portion of the preliminary insulating layer extending along upper surface of the substrate by selectively implanting impurities into the preliminary insulating layer; removing the doped region of the preliminary insulating layer to form a first insulating layer pattern which extends along the bottom and sides of the first trench, the first insulating layer pattern defining a second trench; and subsequently filling the second trench with an insulating material.