Patent ID: 6503795
Filing Date: 2003-01-07
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, the method comprising:defining an active region by performing a shallow trench isolation process on a semiconductor substrate; forming a gate oxide film on the active region; forming a stacked structure of a gate electrode and a first hard mask on the gate oxide film to cross the active region; forming a first spacer at side walls of the first hard mask and the gate electrode; forming a diffusion region on the semiconductor substrate at a side of the gate electrode; forming a first interlayer insulating film over the resultant structure; forming a landing plug poly contact hole to expose the diffusion region, by removing the first interlayer insulating film on the diffusion region; forming a landing plug poly to fill up the landing plug poly contact hole; forming a second interlayer insulating film over the resultant structure; forming a local interconnection contact hole by removing a predetermined portion of the second interlayer insulating film where a bit line contact of the landing plug poly is to be formed; forming a local interconnection and a second hard mask in sequence, wherein the local interconnection contacts the landing plug poly through the local interconnection contact hole and is thicker than the second interlayer insulating film; forming a second spacer at a side wall of the local interconnection and the hard mask; forming a third interlayer insulating film over the resultant structure; forming a bit line contact hole by sequentially removing the third interlayer insulating film and the second hard mask at a predetermined portion where a bit line contact of the local interconnection is to be formed; forming a bit line and a third hard mask wherein the bit line contacts the local interconnection through the bit line contact hole, and is thicker than the third interlayer insulating film; forming a third spacer at a side wall of the bit line and the third hard mask; forming a fourth interlayer insulating film over the resultant structure; forming a charge storage electrode contact hole, by removing a predetermined portion of layers from the fourth interlayer insulating film to the second interlayer insulating film in sequence where a charge storage electrode contact of the landing plug poly is to be formed, thereby exposing the landing plug poly; and forming a charge storage electrode contact plug to fill up the contact hole.