Patent ID: 9059709
Filing Date: 2015-06-16
Classification: H03K

Abstract:
1. A gate drive circuit for a target transistor, comprising: a drive voltage generation circuit that generates a drive voltage to drive the target transistor; a gate on-drive circuit that turns on a voltage supply path from an output terminal of the drive voltage generation circuit to a gate terminal of the target transistor according to an on command, and turns off the voltage supply path according to an off command; and a gate voltage limiting circuit that limits a gate voltage of the target transistor as equal to or lower than a first limiting voltage, irrespective of a voltage applied to the target transistor, in a first period from a time the on command is generated to a time determination whether a current flowing in the target transistor exceeds a fault determination reference value finishes, and limits the gate voltage as equal to or lower than a second limiting voltage that is higher than the first limiting voltage, irrespective of the voltage applied to the target transistor, in a second period after the first period, the first limiting voltage being determined to a value so that a current flowing in the target transistor is kept equal to or lower than a maximum allowable current, wherein in the second period, the drive voltage generation circuit generates the drive voltage having a second set value that is determined based on a gate withstand voltage of the target transistor and loss of the target transistor when the target transistor is operated in a saturated region, wherein the second limiting voltage is set to a value higher than the second set value of the drive voltage by a predetermined value, and wherein the gate voltage limiting circuit includes;