Patent ID: 6594536
Filing Date: 2003-07-15
Classification: G05B,Y02P,Y10S

Abstract:
A method of determining processing sequence, comprising:providing a group of wafer lots wherein each of said wafer lots has wafers to be processed using a process recipe; providing wafer lot priority information; separating said group of wafer lots into priority wafer lots and non priority wafer wherein said priority wafer lots are to be processed before said non priority wafer lots; providing a number of processing tools wherein each of said processing tools processes wafers according to said process recipes; providing processing tool information wherein said processing tool information comprises processing tool availability and processing tool throughput capability, expressed in wafers per hour, for each of said processing tools processing wafers according to each of said process recipes; forming all possible processing permutations of said non priority wafer lots and those said processing tools available for processing said non priority wafer lots; calculating the longest process time for each of said processing permutations; calculating a permutation wafers per hour for each of said processing permutations wherein said permutation wafers per hour is equal to the total number of wafers in one of said processing permutation divided by said longest process time for that said processing permutation; selecting those said processing permutations having the largest said permutation wafers per hour; calculating a total wafers per hour for those said processing permutations having the largest said permutation wafers per hour wherein said total wafers per hour is equal to the sum of the wafers per hour for each of said tools in said processing permutation; selecting any of those said processing permutations having the largest said permutation wafers per hour and the largest said total wafers per hour; processing said wafers in said selected processing permutation using said tools in said selected processing permutation; and repeating these steps until all of said wafer lots have been processed.