Patent ID: 7910483
Filing Date: 2011-03-22
Classification: H01L

Abstract:
1. A method of etching for an integrated circuit, the method comprising: providing a first hard mask layer over a target layer; providing a second hard mask layer over the first hard mask layer; providing a photoresist layer over the second hard mask layer; forming a pattern in the photoresist layer; transferring the pattern into the second hard mask layer; and trimming the second hard mask layer while the photoresist layer protects a top surface of the second hard mask layer, wherein the second hard mask layer is trimmed at a rate between 1 Å and 10 Å per second on each side of the second hard mask layer, wherein trimming the second hard mask layer comprises providing the trimmed second hard mask layer with an average edge roughness between about 10 Å rms and about 50 Å rms.