Patent ID: 8244988
Filing Date: 2012-08-14
Classification: G06F

Abstract:
1. A method to control ownership of a cache line in a shared memory computing system of the type that includes a plurality of nodes, the method comprising, in a first node among the plurality of nodes: storing a plurality of cache lines for the first node in a cache; in response to storing a cache line from the plurality of cache lines, updating a hardware-based lock prediction data structure with data associated with the cache line, wherein at least a portion of the hardware-based lock prediction data structure includes lock prediction data predictive of whether the cache line is associated with a release operation; in response to a first memory request issued from the first node and associated with the cache line, determining whether the first memory request includes a first synchronization operation that uses the release operation to control access to the cache line or a second synchronization operation that does not use the release operation to control access to the cache line, wherein the first synchronization operation includes at least one acquire operation and the release operation to update the cache line, and wherein the second synchronization operation atomically updates the cache line; updating the hardware-based lock prediction data structure with a respective indication of whether the first memory request includes the first synchronization operation such that the cache line is placed in a non-migratory state or whether the first memory request includes the second synchronization operation such that the cache line is placed in a migratory state, wherein the non-migratory state prevents migrating ownership of the cache line from the first node to a second node among the plurality of nodes, and wherein the migratory state allows migrating ownership of the cache line from the first node to the second node; and in response to a second memory request issued from the second node and also associated with the cache line, accessing the hardware-based lock prediction data structure to determine whether to migrate ownership of the cache line from the first node to the second node based on the hardware-based lock prediction data structure such that ownership of the cache line is migrated and the cache line is invalidated from the cache of the first node in response to the second memory request when the hardware-based lock prediction data structure predicts that the cache line is in the migratory state and ownership of the cache line is not migrated and a read-only copy of the cache line is sent to the second node in response to the second memory request when the hardware-based lock prediction data structure predicts that the cache line is in the non-migratory state.