Patent ID: 6384631
Filing Date: 2002-05-07
Classification: H03K

Abstract:
A voltage level shifter capable of receiving an input signal having a maximum Logic 1 value of VDD and producing an output signal having a maximum Logic 1 value of VDDI/O, where VDDI/O is greater than VDD, said voltage level shifter comprising:1) a first circuit branch comprising A) a first p-type transistor having a source coupled to a first power supply having a level of VDDI/O and B) a first n-type transistor having a source coupled to ground, a drain coupled to a drain of said first p-type transistor, and a gate coupled to said input data signal; and 2) a second circuit branch comprising A) a second p-type transistor having a source coupled to said first power supply and a gate coupled to a drain of said first n-type transistor and B) a second n-type transistor having a source coupled to ground, a drain coupled to i) a drain of said second p-type transistor and ii) a gate of said first p-type transistor, and a gate coupled to an inverted copy of said input data signal, wherein a drain current of said first p-type transistor is larger than a drain current of said second p-type transistor for the same gate-to-source voltage, such that said first p-type transistor turns on faster than said second p-type transistor if said first power supply is powered up to VDDI/O when said first and second n-type transistors are off.