Patent ID: 9059152
Filing Date: 2015-06-16
Classification: H01L,H05K,Y10T

Abstract:
1. A wiring substrate, comprising: a multilayer portion that includes a plurality of interlayer insulation layers, each of the plurality of interlayer insulation layer including via holes having a reverse cone shape and via conductors formed in the via holes, a top-most interlayer insulation layer constituting a substrate main surface; and a plurality of projection electrodes arranged within an electrode formation region on the substrate main surface, each of the plurality of projection electrodes directly formed on a respective via conductor in the reverse truncated cone shaped via hole of the top-most interlayer insulation layer; wherein at least one among the plurality of projection electrodes comprises a variant projection electrode having a recess portion on an upper surface, an outer diameter at an upper end that is larger than an outer diameter at a lower end, and a reverse trapezoidal cross-section shape and a curved portion formed at a boundary area between the upper surface of the variant projection electrode and a lateral surface of the variant projection electrode.