Patent ID: 8400337
Filing Date: 2013-03-19
Classification: H03F,H03M

Abstract:
1. A method, comprising: using a processor to determine a first voltage level and a second voltage level, wherein determining is based at least in part on: (1) a voltage at a drain of a first transistor from a first matched transistor pair connected to a drain of a third transistor from a second matched transistor pair and (2) a voltage at a drain of a second transistor from the first matched transistor pair connected to a drain of a fourth transistor from the second matched transistor pair; setting a body input of the first transistor to the determined first voltage level and a body input of the second transistor to the determined second voltage level to reduce an offset between the first transistor and the second transistor in the first matched transistor pair; and setting a body input of the third transistor to the determined first voltage level and a body input of the fourth transistor to the determined second voltage level to reduce an offset between the third transistor and the fourth transistor in the second matched transistor pair, wherein: