Patent ID: 6785862
Filing Date: 2004-08-31
Classification: H03M

Abstract:
A convolutional interleaver comprising:an interleaver memory partitioned into a plurality of circular buffers, wherein each of said plurality of circular buffers has a write pointer and a read pointer associated therewith; and a processor configured to selectively read input symbols from an input vector and store said input symbols in said interleaver memory in accordance with said write pointers, and to selectively read output symbols from said interleaver memory and store said output symbols in an output vector in accordance with said read pointers; wherein said interleaver memory is characterized by an interleaving depth and includes elements having associated interleaving delay depths, wherein said interleaving delay depths are less than said interleaving depth, wherein each of said plurality of circular buffers is assigned a different interleaving delay depth and wherein said plurality of circular buffers are sorted according to said interleaving delay depths.