Patent ID: 6410937
Filing Date: 2002-06-25
Classification: H01L,H05K

Abstract:
An integrated circuit (IC) chip carrier, comprising:a base formed from a film of dielectric material; a system of oriented and fixed conducting paths on a top surface of the base, wherein a first group of said conducting paths is configured to mate directly with chip contact pads and a second group of said conducting paths are configured to mate with mating contacts on a circuit board; and a plurality of contacts for selectively connecting to the mating chip contact pads and the mating contacts on the circuit board, wherein said plurality of contacts are formed as metallized vias having top edges coupled to the conducting paths on the top surface of the base, and wherein bottom edges of the vias form contact assemblies with the mating contact pads of the chip or with mating contact pads of the circuit board through joints filled with an electric-conductive binder, wherein the mating contact pads of the chip and the mating contact pads of the circuit board face the vias, and wherein the contact assemblies together with conducting paths are configured to electrically couple the chip contact pads directly with contact pads of the circuit board.