Patent ID: 7415092
Filing Date: 2008-08-19
Classification: H03L,H04L

Abstract:
1. A timing generation module for use in a data communications system, said timing generation module comprising: a first variable modulus counter having a first clock input, a first control input, and a first variable modulus counter output, said first clock input to be coupled to a transmitter clock, said first variable modulus counter operable to divide the transmitter clock frequency by a first adjustable integer; a second variable modulus counter having a second clock input, a second control input, and a second variable modulus counter output, said second clock input to be coupled to a network link clock, the network link clock frequency having a predetermined relationship with the transmitter clock frequency, said second variable modulus counter operable to divide the network link clock frequency by a second adjustable integer; wherein said first adjustable integer is selected to be a first value and the second adjustable integer is selected to be a second value such that the quotient of the transmitter clock frequency divided by the first value is substantially the same as the quotient of the network link clock frequency divided by the second value, a phase detector module comprising one or more D flip-flops, the phase detector module coupled to the first clock input and the second clock input to generate one or more data bits to indicate a phase offset between the first clock input and the second clock input; and a modulus control module responsive to said one or more data bits to control said first and second variable modulus counters.