Patent ID: 8826252
Filing Date: 2014-09-02
Classification: G06F

Abstract:
1. A computer-implemented method of vectorizing an iterative loop with data elements of lengths other than the limited number of vector supported data lengths for a vector computer system having vector functional units that operate on a limited number of vector supported data lengths, the method comprising: scanning program code, wherein scanning includes reviewing an iterative loop within the program code to determine memory locations involved in the iterative loop; determining if the iterative loop operates on data elements of lengths other than the limited number of vector supported data lengths, data length being a number of bits in an operand of an operation of the iterative loop; if the iterative loop operates on data elements of lengths other than the limited number of vector supported data lengths, vectorizing the data using a vector atomic memory operation to pack the data into words of vector supported data lengths, the vector atomic memory operation ensuring that an operation to pack a data element into a memory location is performed atomically to prevent a false conflict resulting from multiple data elements being packed into the same memory location.