Patent ID: 7602010
Filing Date: 2009-10-13
Classification: H01L

Abstract:
1. A non-volatile memory device comprising: a semiconductor substrate, doped with impurities of a first conductivity type, which has one or more fins defined by at least two separate trenches formed in the substrate, the fins extending along the substrate in a first direction; pairs of gate electrodes formed as spacers at sidewalls of the fins, wherein the gate electrodes are insulated from the semiconductor substrate including the fins and extend parallel to the fins; storage nodes between the gate electrodes and the fins, and insulated from the gate electrodes and the semiconductor substrate; source regions and drain regions, which are doped with impurities of a second conductivity type, the source regions and drain regions being separately formed and both the source regions and the drain regions being formed at least at top and bottom surface portions of the fins and extending across the first direction of the fins; and channel regions corresponding to the respective gate electrodes and extending between neighboring source and drain regions in the first direction, the channel regions at least at surface regions of the sidewalls of the top and bottom portions of the fins between the source and the drain regions, wherein the source regions and the drain regions are alternately disposed along the first direction.