Patent ID: 8164197
Filing Date: 2012-04-24
Classification: H01L

Abstract:
1. A semiconductor device including: a substrate; an insulating portion on the substrate; a first interlayer dielectric film on the insulating portion; a lower wire formed on the first interlayer dielectric film; a second interlayer dielectric film formed on the first interlayer dielectric film and the lower wire; and an upper wire formed on the second interlayer dielectric film, wherein the first interlayer dielectric film is provided with a groove dug from the upper surface thereof, the groove exposing a part of the insulating portion over a whole width of the groove, the lower wire is formed on a region over a first side and a second side of the groove, the region including inside of the groove, a width of the upper wire is smaller than the width of the groove, at least a portion of the second interlayer dielectric film formed on the lower wire in the groove has a planar upper surface, and the upper wire is formed on the planar upper surface so that the upper wire, throughout a width direction thereof, overlaps with the lower wire in the groove in plan view.