Patent ID: 6410400
Filing Date: 2002-06-25
Classification: H01L

Abstract:
A method of manufacturing a capacitor of a semiconductor device comprising the steps of:preparing a semiconductor substrate incorporating lower patterns; covering the semiconductor substrate with an intermediate insulating layer; forming a lower electrode on the intermediate insulating layer; nitrifying the surface of the lower electrode; depositing a amorphous Ta2O5 thin film on the nitrified surface of the lower electrode; annealing the amorphous Ta2O5 thin film at a first temperature; further annealing the Ta2O5 thin film at a second temperature, the second temperature being both higher than the first temperature and sufficiently high to form a crystalline Ta2O5 thin film dielectric layer; and forming an upper electrode on the crystalline Ta2O5 thin film dielectric layer; wherein the lower electrode is a conductive layer comprising one conductor selected from a group consisting of TiN, TaN, W, WSi, Ru, RuO2, Ir, IrO2, and Pt.