Patent ID: 6297142
Filing Date: 2001-10-02
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, comprising the steps of:providing a semiconductor chip having a plurality of external electrodes, each of the electrodes having a joining portion comprising a metal selected from the group consisting of gold and tin;providing a lead-patterning substrate comprising a pattern of leads on an insulating substrate, each of the leads being provided with an inner lead having a joining portion comprising a metal selected from the group consisting of gold and tin, provided that, when the metal constituting the joining portion of the external electrode is gold, the metal constituting the joining portion of the inner lead is tin, or vice versa;fixing the semiconductor chip to the insulating substrate by bringing into contact the joining portion of the external electrodes to the joining portion of the inner leads to form an assembly and heat-pressing the assembly at a temperature from 230.degree. to 260.degree. C. and at an applied pressure of from 1 to 10 kgf/mm.sup.2 to cause a diffusion reaction of the metal of the joining portion of the external electrodes with the metal of the joining portion of the inner leads to form a joined portion comprising a gold/tin eutectic alloy solder; andsealing the joined portion including the solder with a molding resin.