Patent ID: 6291853
Filing Date: 2001-09-18
Classification: H01L

Abstract:
A nonvolatile semiconductor memory device comprising:first, second and third impurity diffusion regions in a semiconductor substrate;a first gate insulating film on said semiconductor substrate between said first and second impurity diffusion regions;a second gate insulating film on said semiconductor substrate between said second and third impurity diffusion regions;a floating gate electrode on said first gate insulating film;a selection gate electrode on said second gate insulating film;a third gate insulating film on said floating gate electrode;a fourth gate insulating film on said selection gate electrode;a control gate electrode on said third gate insulating film; andan additional gate electrode on said fourth gate insulating film,wherein said first and second impurity diffusion regions, said first and third gate insulating films, said floating gate electrode, and said control gate electrode constitute a memory transistor, said second and third impurity diffusion regions, said second and fourth gate insulating films, said selection gate electrode, and said additional gate electrode constitute a selection transistor, and said memory transistor and said selection transistor having the substantially same structure as each other.