Patent ID: 6528376
Filing Date: 2003-03-04
Classification: H01L

Abstract:
A method for fabricating a field effect transistor (FET) device comprising:providing a semiconductor substrate; forming over the semiconductor substrate a blanket gate electrode material layer; forming over the blanket gate electrode material layer a patterned auxiliary layer; forming adjacent a sidewall of the patterned auxiliary layer and also over the blanket gate electrode material layer a sacrificial spacer layer; etching, while employing at least the patterned auxiliary layer and the sacrificial spacer layer as a mask, the blanket gate electrode material layer to form a once patterned gate electrode material layer; implanting, while employing at least the once patterned gate electrode material layer as a mask, a source/drain region within the semiconductor substrate; stripping from adjacent the sidewall of the patterned auxiliary layer the sacrificial spacer layer; etching, while employing the patterned auxiliary layer but not the sacrificial spacer layer as a mask, the once patterned gate electrode material layer to form a gate electrode; forming adjacent a sidewall of the gate electrode a permanent spacer layer; and implanting, while employing at least the gate electrode and the permanent spacer layer as a mask, at least one additional ion implant structure within the semiconductor substrate.