Patent ID: 6461903
Filing Date: 2002-10-08
Classification: H01L

Abstract:
A method for fabricating SOI devices comprising:preparing a SOI wafer having a stack structure of a base substrate, a buried oxide film, and a semiconductor layer; forming a field oxide film on the semiconductor layer to define an active region; forming a gate on the active region of the semiconductor layer, the gate having two side walls; forming a dummy spacer on the gate and the two side walls; forming a polycrystalline silicon film at a selected width on the two side walls of the gate including the dummy spacer to form a resultant structure; depositing an insulating film on the resultant structure; polishing the insulating film using the dummy spacer as a polishing stop layer; removing the polycrystalline silicon film to expose a part of the semiconductor layer; forming a hole exposing a part of the buried oxide film by dry etching the exposed part of the semiconductor layer; etching the buried oxide film exposed through the hole and an area adjacent thereto using a wet etching process; growing a silicon epitaxial layer from a midpoint of the semiconductor layer to a point higher than an upper surface of the semiconductor layer on a side of the part the semiconductor layer exposed by the hole using a selective epitaxial growth process; etching a surface of the silicon epitaxial layer to be equivalent to a height of the semiconductor layer; removing the dummy spacer and the insulating film; and forming source/drain regions of LDD structure having a first physical isolation space on a first boundary between a source region and a channel region and a second physical isolation space on a second boundary between a drain region and the channel region in the active region of the exposed semiconductor layer.