Patent ID: 6445605
Filing Date: 2002-09-03
Classification: G11C

Abstract:
A circuit for verifying whether an unprogrammed antifuse in a semiconductor memory is leaky, comprising:a verification circuit; an outside transistor having a bottom terminal and a top terminal, said bottom terminal being connected to said verification circuit, said top terminal receiving a first voltage; a first terminal of said unprogrammed antifuse being connected to said verification circuit; and a programming circuit for providing a programming voltage, said programming circuitry being connected to a second terminal of said antifuse wherein said verification circuit comprises: a first transistor having a top terminal and a bottom terminal; said bottom terminal of the outside transistor being connected in series with said top terminal of the first transistor; a second transistor having a top terminal and a bottom terminal, said second transistor being connected in series with a third transistor having a bottom terminal and a top terminal; and said outside transistor in series with said first transistor being connected in parallel with said second transistor in series with said third transistor.