Patent ID: 6049316
Filing Date: 2000-04-11
Classification: G09G

Abstract:
A graphics controller sub-system comprising:an active register for storing a current vertical refresh rate;a vertical synchronization timer, for generating a vertical synchronization pulse having a period corresponding to the current vertical refresh rate stored in the active register;driving means, coupled to the vertical synchronization timer, for driving the vertical synchronization pulse to an external cathode-ray-tube (CRT) monitor, the vertical synchronization pulse for resetting the external CRT from a last line of pixels to a first line of pixels;a default register for storing a default vertical refresh rate, the default register not coupled to the vertical synchronization timer; andhost interface means, coupled to the active register and coupled to the default register, for receiving commands from a program executing on a host processor to write a refresh rate to the active register or to the default register, the host interface means writing the refresh rate to the active register or to the default register;sensing means, coupled to a cable to the external CRT monitor, the cable for transmitting the vertical synchronization pulse to the external CRT monitor and for transmitting pixels from the pixel transfer means to the external CRT monitor, the sensing means for reading from the external CRT monitor a data structure containing configuration data for the external CRT monitor;calculation means, coupled to the sensing means, for calculating a maximum vertical refresh rate from the data structure, the calculation means executing on the host processor; andupdate means, coupled to the calculation means, for writing the maximum vertical refresh rate from the calculation means to the active register when the sensing means reads the data structure from the external CRT monitor, the update means writing the default vertical refresh rate from the default resister to the active register when the sensing means cannot read the data structure from the external CRT monitor,whereby the active register is written with a refresh rate calculated from the data structure from the external CRT monitor or written with the refresh rate from the default register when no data structure is read and whereby a default refresh rate and an active refresh rate are stored in the graphics controller sub-system.