Patent ID: 7151538
Filing Date: 2006-12-19
Classification: G09G

Abstract:
1. A display device comprising: a pixel portion in which a plurality of pixels are arrayed in a matrix and signal lines are laid for every pixel column; a monitor line held at a first potential; a control circuit for generating at least a clock signal and an inverse clock signal having inverse phases to each other and serving as reference of a horizontal scan, monitoring the potential change of the monitor line, and correcting the timings of generation of at least said clock signal and inverse clock signal based on the change of the timing of the potential change; a horizontal scanner; and a monitor circuit, wherein said horizontal scanner includes: a shift register, in which a plurality of shift stages are cascade connected, which is able to switch between a first scanning operation for sequentially shifting from a first stage to a last stage and a second scanning operation for sequentially shifting from the last stage to the first stage in accordance with the switch signal and sequentially outputs shift pulses from the shift stages in synchronization with said clock signal and inverse clock signal at the time of said first scanning operation or the time of said second scanning operation, a first switch group for alternately sequentially sampling said clock signal and inverse clock signal in response to said shift pulses output from the corresponding shift stages of said shift register and outputting them as sample-and-hold pulses, and a second switch group for sequentially sampling video signals-in response to the sample-and-hold pulses from the switches of said first switch group and supplying them to the corresponding signal lines of said pixel portion, and said monitor circuit includes: a selector portion for receiving said switch signal, sampling signals different from the signal sampled by the first shift stage of the shift register in said horizontal scanner among said clock signal and inverse clock signal when the switch signal indicates said first scanning operation and sampling signals different from the signal sampled by the last shift stage of the shift register in said horizontal scanner among said clock signal and inverse clock signal when the switch signal indicates said second scanning operation, and outputting the same as the sample-and-hold pulses, and a third switch for setting the potential of said monitor line at a second potential in response to the sample-and-hold pulses from said selector portion.