Patent ID: 7932885
Filing Date: 2011-04-26
Classification: G09G

Abstract:
1. An electro-optical device comprising: scanning lines; data lines intersecting the scanning lines, the data lines being divided into a plurality of data line groups including a first data line group with a plurality of dummy data lines only, a second data line group with a plurality of display data lines and with a plurality of dummy data lines, one of the plurality of dummy data lines of the second data line group being arranged adjacent to one of the plurality of dummy data lines of the first data line group, pixels corresponding to intersections of the scanning lines and the data lines, the pixels including display pixels that correspond to the display data lines of the second data line group, and dummy pixels that correspond to the dummy data lines of the first data line group and the second data line group; a scanning line driving circuit for selecting one of the scanning lines every horizontal scanning period to sequentially select the scanning lines; a shift register composed of a plurality of stages that are electrically connected to each other and that sequentially transmit a start pulse signal supplied at a beginning of each of the horizontal scanning periods, the shift register including a first stage corresponding to the plurality of dummy data lines of the first data line group and a second stage corresponding to the plurality of display data lines and the plurality of dummy data lines of the second data line group; image signal lines for supplying signals; a plurality of sampling switches electrically connected between the data lines and the image signal lines, the sampling switches including a first sampling switch group that corresponds to the first data line group and a second sampling switch group that corresponds to the second data line group, wherein sampling switches of the first sampling switch group are, based on the pulse signal transmitted at the first stage of the shift register, operated at substantially a same time to sample the signals supplied through the image signal lines and to substantially simultaneously transmit the sampled signals to the dummy data lines of the first data line group, and wherein sampling switches of the second sampling switch group are, based on the pulse signal transmitted at the second stage of the shift register, operated at substantially a same time to sample the signals supplied through the image signal lines and to substantially simultaneously transmit the sampled signals to the display data lines and to the dummy data lines of the second data line group; a first operation circuit for implementing logical operation between a first enable signal and a first start pulse signal transmitted directly and only from the first stage of the shift register; and a second operation circuit for implementing logical operation between a second enable signal and a second start pulse signal transmitted directly and only from the second stage of the shift register, wherein output pulse widths of the first and second operation circuit do not overlap each other.