Patent ID: 7432754
Filing Date: 2008-10-07
Classification: H03K

Abstract:
1. A voltage control circuit comprising: a first voltage supply terminal for receiving a first voltage; a second voltage supply terminal for receiving a second voltage, wherein the second voltage is different from the first voltage; a control logic circuit having an enable terminal for receiving an enable signal; a first driver coupled to the first voltage supply terminal and an external node; a second driver coupled to the second voltage supply terminal and the external node; a first transistor having a first conducting terminal, a second conducting terminal, and a control terminal, wherein the first conducting terminal of the first transistor is coupled to the first voltage supply terminal, the control terminal of the first transistor is coupled to receive a first control signal from the control logic circuit; a second transistor having a first conducting terminal, a second conducting terminal, and a control terminal, wherein the first conducting terminal of the second transistor is coupled to the second conducting terminal of the first transistor, and wherein the control terminal of the second transistor is coupled to receive a second control signal from the control logic circuit; a third transistor having a first conducting terminal, a second conducting terminal, and a control terminal, wherein the first conducting terminal of the third transistor is coupled to the second voltage supply terminal and wherein the control terminal of the third transistor is coupled to receive a third control signal from the control logic circuit; and a fourth transistor having a first conducting terminal, a second conducting terminal, and a control terminal, wherein the first conducting terminal of the fourth transistor is coupled to the second conducting terminal of the third transistor, wherein the control terminal of the fourth transistor is coupled to receive a fourth control signal from the control logic circuit, and wherein the second conducting terminal of the second transistor is further coupled to the first conducting terminal of the fourth transistor, wherein in response to a first value of the enable signal the second voltage is provided to the second driver as a result of the control logic circuit turning off the first transistor and the second transistor and the control logic circuit turning on the third transistor and the fourth transistor and wherein in response to a second value of the enable signal the first voltage is provided to the second driver as a result of the control logic circuit turning on the first transistor, the second transistor, the fourth transistor, and the control logic turning off the third transistor.