Patent ID: 8179643
Filing Date: 2012-05-15
Classification: H02H

Abstract:
1. An electrostatic discharge circuit, comprising: a plurality of first transistors and a plurality of second transistors connected between a first node and a second node in a first circulation loop; and a plurality of third transistors and a plurality of fourth transistors connected between the second node and a third node in a second circulation loop, wherein the leakage current of the circuit is blocked by the resistance of each of the first to fourth transistors, wherein the first transistors are series-connected to each other, the second transistors are series-connected to each other, the third transistors are series-connected to each other, and the fourth transistors are series-connected to each other, wherein one of the plurality of first transistors includes a gate and a source connected in common to the first node, and a drain connected the second node, wherein a gate and a source of the second transistor located at a first position are connected to a drain of one of the plurality of second transistors located at a second position, wherein one of the plurality of third transistors includes a gate and a source connected in common to the third node, and a drain connected to the second node, wherein a gate and a source of one of the plurality of fourth transistors located at a first position are connected to a drain of one of the plurality of fourth transistors located at a second position, and wherein each of the first, second, third, and fourth transistors has a particular predetermined forward-biased internal resistance.