Patent ID: 6420890
Filing Date: 2002-07-16
Classification: G01R

Abstract:
An apparatus for testing a semiconductor die having first and second die terminals, the die being formed on and attached to a silicon wafer, the apparatus comprising:a substrate having a coefficient of thermal expansion approximately equal to a thermal expansion coefficient of the die, the substrate adapted to be positionable proximate to the silicon wafer; first and second test terminals positioned on a surface of the substrate, the first test terminal having a conductive portion adapted to be aligned with a corresponding conductive portion of the first die terminal when the substrate is positioned proximate the silicon wafer, the second test terminal being adapted to be aligned with the second die terminal when the conductive portion of the first test terminal is aligned with the first die terminal; and a layer of dielectric material other than a native oxide material attached to the conductive portion of the first test terminal, the layer of dielectric material being intermediate the conductive portion of the first test terminal and the corresponding conductive portion of the first die terminal when the substrate is positioned proximate the silicon wafer, the layer of dielectric material having a thickness that permits the conductive portion to be capacitively coupled with the corresponding conductive portion of the first die terminal.