Patent ID: 8445350
Filing Date: 2013-05-21
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: forming isolation regions that define an active region in a semiconductor substrate which includes a cell region and a peripheral region providing a guard region in a portion of the peripheral region that is adjacent to the cell region; forming buried gate regions by removing portions of the active region; providing a conductive material within the buried gate regions; forming a first insulating layer over the conductive material the cell region and the peripheral region; etching the first insulating layer in the peripheral region until the guard region is exposed, the etched first insulating layer having a sidewall; forming a second insulating layer over the first insulating layer and the peripheral region ; and etching the second insulating layer to form a spacer on the sidewall of the first insulating layer, the spacer being provided directly over a surface of the guard region.