Patent ID: 6689689
Filing Date: 2004-02-10
Classification: H01L

Abstract:
A method of manufacturing an electrical device which method comprises the sequential steps of:(a) providing a substrate including at least one, metal feature in-laid in the upper, exposed surface of a layer of dielectric material overlying at least a portion of said substrate, the at least one metal feature including an upper, exposed surface substantially co-planar with said upper surface of said layer of dielectric material; (b) selectively depositing at least one layer comprising at least one alloying element for said metal feature on said exposed, upper surface of said at least one metal feature; and (c) annealing to substantially uniformly diffuse at least a predetermined minimum amount of said at least one alloying element from said at least one layer comprising said at least one alloying element into said at least one metal feature for at least a predetermined minimum depth below the upper surface thereof, whereby electromigration of metal of said at least one metal feature is minimized or substantially prevented.