Patent ID: 6900088
Filing Date: 2005-05-31
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: (a) preparing a semiconductor substrate having first and second regions of a first conductivity type defined by isolation regions in a principal surface area of the semiconductor substrate; (b) forming at least a first gate electrode in a partial area of the first region; (c) implanting impurities of a second conductivity type opposite to said first conductivity type into a surface layer of said second region, and thereafter executing a first activation process to form first impurity diffusion region shallower than said isolation regions, the first impurity diffusion region being directly surrounded by said second region of the first conductivity type, and providing a current path for charge carriers of said second conductivity type; (d) forming first spacer film on side surface of said first gate electrode; (e) by using said first gate electrode and said first spacer film as a mask, implanting impurities of said second conductivity type into a surface layer of said first region, and thereafter executing a second activation process to form a second impurity diffusion region; (f) removing said first spacer film; and (g) by using said first gate electrode as a mask, implanting impurities of said second conductivity type into a surface layer in said first region, and thereafter executing a third activation process to form third impurity diffusion region, wherein said third activation process is executed so that the gradient of an impurity concentration distribution in a p-n junction formed by the third impurity diffusion region becomes steeper than the gradient of an impurity concentration distribution in a p-n junction formed by said first impurity diffusion region formed by said first activation process.