Patent ID: 6469343
Filing Date: 2002-10-22
Classification: G11C,H01L

Abstract:
A semiconductor memory device having memory cells, wherein:each of said memory cells comprises at least a semiconductor substrate, a pair of impurity-diffused layers formed in said semiconductor substrate, an electric charge-capturing film, and a gate electrode formed on said electric charge-capturing film and working as a control electrode, said electric charge-capturing film comprises a first electric charge accumulation film, a first insulating film formed on said first electric charge accumulation film, and a second electric charge accumulation film formed on said first insulating film, wherein said first insulating film is a ferroelectric film, and the first and second electric charge accumulation films are film selected from the group consisting of platinum, a titanium compound, a tungsten compound, and a ruthenium compound; and said semiconductor memory device further includes a voltage application means for applying a predetermined voltage to said gate electrode and to said pair of impurity-diffused layers, and said voltage application means has a means for varying the accumulation of electric charge to stepwisely change the state of accumulating the electric charge in said first and second electric charge accumulation films.