Patent ID: 6670621
Filing Date: 2003-12-30
Classification: H01J,H01L

Abstract:
An arrangement for forming integrated circuits on a semiconductor substrate comprising:a first clean room characterized as containing a first reduced level of contaminants; plural vacuum stations arranged in a spaced manner in common alignment; a semiconductor substrate disposed at each vacuum station; plural electron beam sources disposed at each vacuum station and aligned with said semiconductor substrate for directing electron beams onto an associated semiconductor substrate for forming integrated circuits thereon; transport means connected to said first clean room or to said plural vacuum stations for sequentially positioning each vacuum station in said first clean room to permit substrates having integrated circuits formed thereon when the vacuum station is not in said first clean room to be removed from the vacuum station when in the first clean room and be replaced by another substrate; and a second clean room characterized as containing a second reduced level of contaminants, wherein said second reduced level of contaminants is greater than said first reduced level of contaminants and wherein said first clean room and said plural vacuum stations are disposed in said second clean room, and wherein said integrated circuits are formed on a substrate in a vacuum station when the vacuum station is in said second clean room.