Patent ID: 8765566
Filing Date: 2014-07-01
Classification: H01L

Abstract:
1. A method of forming non-volatile memory device structure, comprising: providing a substrate having a surface region; forming a first dielectric material overlying the surface region of the substrate; forming a first wiring material overlying the first dielectric material; forming a junction material overlying the first wiring material and comprising one of a p+ polysilicon material and a p++ polysilicon material; forming a resistive switching material overlying the junction material; forming a active conductive material overlying the resistive switching material; forming a masking layer overlying the active conductive material; subjecting a first stack of material comprising the first wiring material, the junction material, the resistive switching material, and the active conductive material to a first etching process to form a plurality of first structures, each of the plurality of first structures including a first wiring structure being elongated in shape in a first direction and separated by a first gap region in a second direction; forming a second dielectric material filling the first gap region and overlying the plurality of first structures; subjecting the second dielectric material to a first planarizing process to expose a top surface region of the active conductive material and to expose a top surface region of the second dielectric material; forming a second wiring material overlying the top surface region of the active conductive material and the top surface region of the second dielectric material; and subjecting a second stack of material comprising the second wiring material, the plurality of first structures, and the second dielectric material in the first gap region to a second patterning and etching process to form a plurality of second wiring structures and a plurality of resistive switching devices, each of the plurality of second wiring structures being elongated in shape in the second direction and separated by a second gap region in the first direction, each of the plurality of resistive switching devices comprising at least the active conductive material, the resistive switching material, and the junction material, the resistive switching device being configured in an intersection of the first wiring structures and the second wiring structures.