Patent ID: 7982272
Filing Date: 2011-07-19
Classification: H01L

Abstract:
1. A thin-film semiconductor device comprising: a transparent insulating substrate; an island silicon layer formed on the transparent insulating substrate and including a source region containing a first-conductivity-type impurity and a drain region containing a first-conductivity-type impurity and spaced apart from the source region; a gate insulating film and a gate electrode which are formed on a portion of the island silicon layer, which is located between the source region and the drain region; a crystal-recovering layer formed in a surface of the source region and in a surface of the drain region; a sidewall spacer having a 3-ply structure including a first oxide film, a nitride film and a second oxide film, which are respectively formed on a sidewall of the gate electrode at a temperature of 500° C. or less; a stacked source polycrystalline silicon layer formed on the source region and containing the first-conductivity-type impurity and a stacked drain polycrystalline silicon layer formed on the drain region and containing the first-conductivity-type impurity, the stacked source polycrystalline silicon layer and the stacked drain polycrystalline silicon layer being formed by solid-state growth; high-melting-point metal silicide layers formed on the stacked source polycrystalline silicon layer and the stacked drain polycrystalline silicon layer, the high-melting-point metal being one selected from the group consisting of Ni, Ti, Mo, and W; and an interlayer insulating film covering the high-melting-point metal silicide layers and the gate electrode, wherein said source region and said drain region are formed using the sidewall spacer as a mask.