Patent ID: 7489580
Filing Date: 2009-02-10
Classification: G11C

Abstract:
1. A refresh period generating circuit which generates a refresh period in refreshing a DRAM cell, comprising: an oscillation circuit which oscillates at an oscillating frequency with temperature dependence on ambient temperature; a dividing circuit which divides an oscillation output of said oscillation circuit and outputs signals having a plurality of different frequencies; a temperature detector which detects said ambient temperature; a selector which switches and selects among the signals of said dividing circuit based on an output of said temperature detector, and outputs a signal as a reference of said refresh period; and a refresh period adjusting circuit which includes a fuse block, second divider and second selector, wherein said selector selects and outputs a signal of said dividing circuit having a frequency depending on said temperature dependence of analog form when said temperature detector detects a temperature within a range from said first temperature point to said second temperature point,