Patent ID: 6937243
Filing Date: 2005-08-30
Classification: G09G

Abstract:
1. A transmission circuit with dynamic path adjustment, said transmission circuit being between a processing circuit and a memory controller circuit and said transmission circuit receiving a data stream from said processing circuit, said transmission circuit comprising: a dispatching circuit connected to said processing circuit via a first signal line; a calculating circuit connected to said dispatching circuit via a second signal line and connected to said memory controller circuit via a third signal line; and a fast signal line providing a connection between said dispatching circuit and said memory controller circuit,wherein: bandwidths of said first signal line and said fast signal line are both larger than bandwidth of said second signal line; and when said dispatching circuit detects said transmission circuit satisfies a speed-up condition, said dispatching circuit transmits said data stream directly to said memory controller circuit via said fast signal line, and when said dispatching circuit detects said transmission circuit fails to satisfy said speed-up condition, said dispatching circuit transmits said data stream to said calculating circuit via said second signal line.