Patent ID: 8120105
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. A method of forming a lateral DMOS transistor, comprising: providing a semiconductor layer of a first conductivity type; defining an active area in which the lateral DMOS transistor is formed; forming a conductive gate in the active area insulated from the semiconductor layer by a first dielectric layer, the conductive gate delineating a first region and a second region in the semiconductor layer; performing a first implantation using a first type of dopants of the first conductivity type, the first implantation being selectively applied to only the first region in the semiconductor layer; performing a second implantation using a second type of dopants of a second conductivity type, the second implantation being selectively applied to only the first region in the semiconductor layer; performing a third implantation using the first type of dopants of the first conductivity type, the third implantation being a low energy implantation and being applied to the entire active area, the dopants of the third implantation being blocked by the conductive gate and being introduced into the semiconductor layer in the first and second regions only; performing a fourth implantation using a third type of dopants of the first conductivity type, the fourth implantation being a high energy implantation and being applied to the entire active area, the dopants of the fourth implantation penetrating the conductive gate and being introduced into the semiconductor layer in the first and second regions and underneath the conductive gate; annealing the semiconductor layer to form a source region from the first implantation, a body region from the second implantation, the source region being formed in the body region, and a double-diffused lightly doped drain region as a drift region from the third and fourth implantations, the double-diffused lightly doped drain region formed from the fourth implantation extending under the conductive gate into and overlapping with the body region at a channel region of the lateral DMOS transistor, the dopants of the double-diffused lightly doped drain region interacting with the dopants of the body region to adjust a threshold voltage of the lateral DMOS transistor.