Patent ID: 8194370
Filing Date: 2012-06-05
Classification: H01L

Abstract:
1. An ESD protection device comprising: a doped region of a first conductive type disposed above a substrate; a first body of a second conductive type disposed in the doped region as a body of a first transistor; a first heavily doped region of the first conductive type disposed in the doped region and located outside of the first body, wherein the first heavily doped region is electrically coupled to a first rail; a second heavily doped region of the first conductive type disposed in the first body, wherein the second heavily doped region is electrically coupled to a second rail; a resistance path electrically coupled between the first body and the second rail; and a layer located between the first body and the substrate, the first body being isolated from the substrate by the layer, and the layer being consisted of a bury layer of the first conductive type or a insulating layer.