Patent ID: 8390013
Filing Date: 2013-03-05
Classification: H01L

Abstract:
1. A semiconductor package structure, comprising: a dielectric layer, having a first surface and a second surface opposite to each other and an opening going through the first surface and the second surface; a patterned metal layer, disposed on the first surface of the dielectric layer; a carrier, disposed at the second surface of the dielectric layer and having a third surface and a fourth surface opposite to each other and at least a through hole going through the third surface and the fourth surface, wherein a portion of the third surface and the through hole are exposed by the opening of the dielectric layer; a metal layer, disposed on the fourth surface of the carrier and having at least a heat conductive post and a containing cavity, wherein the heat conductive post extends from the fourth surface of the carrier to the through hole and is disposed in the through hole, an end of the heat conductive post protrudes away from the third surface of the carrier, and the containing cavity is located on the end of the heat conductive post; a semiconductor die, disposed in the opening of the dielectric layer and located in the containing cavity; a stress buffer layer, disposed between the containing cavity and the semiconductor die; and a second adhesive layer, disposed between the stress buffer layer and the third surface of the carrier.