Patent ID: 8049562
Filing Date: 2011-11-01
Classification: H03F

Abstract:
1. An amplifier comprising: a first pair of transistors that defines a first output terminal, each transistor of the first pair of transistors having a gate coupled to a first input terminal; a second pair of transistors that defines a second output terminal, each transistor of the second pair of transistors having a gate coupled to a second input terminal; a first pair of capacitors that minimizes degradation of input resistance at the first input terminal, a first capacitor of the first pair of capacitors coupled to the second output terminal and to the gate of a first transistor of the first pair of transistors, and a second capacitor of the first pair of capacitors coupled to the second output terminal and to the gate of a second transistor of the first pair of transistors; and a second pair of capacitors that minimizes degradation of the input resistance at the second input terminal, a third capacitor of the second pair of capacitors coupled to the first output terminal and to the gate of a third transistor of the second pair of transistors, and a fourth capacitor of the second pair of capacitors coupled to the first output terminal and to the gate of a fourth transistor of the second pair of transistors.