Patent ID: 6903423
Filing Date: 2005-06-07
Classification: G11C

Abstract:
1. An integrated semiconductor memory on a semiconductor chip, comprising: at least two subcircuit blocks with switching elements, each of the subcircuit blocks having a functional effect in an operation of the integrated semiconductor memory, the subcircuit blocks being arranged on mutually nonoverlapping area sections of the semiconductor chip; a respective block supply line and a respective block ground line, which are arranged within the area section of each of the at least two subcircuit blocks and are coupled to switching elements for supply with a supply voltage; a chip supply line, the chip supply line being arranged in an area section of the semiconductor chip outside the area sections of the at least two subcircuit blocks, the chip supply line being connected to at least one first contact point of the semiconductor chip, the first contact point being formed for linking to an external supply line; a respective connecting element connected between the chip supply line and each of the block supply lines of the subcircuit blocks; a chip ground line, the chip ground line being arranged in an area section of the semiconductor chip outside the area sections of the at least two subcircuit blocks, the chip ground line being connected to at least one second contact point of the semiconductor chip, the second contact point being formed for linking to an external ground line; and a respective connecting element connected between the chip ground line and each of the block ground lines of the subcircuits, at least one of the connecting elements between the chip supply line and the block supply line of at least one subcircuit block or between the chip ground line and the block ground line of at least one subcircuit block being formed in switchable fashion as a switching device, wherein a subcircuit block has a plurality of operating states and is connected to a memory device, the memory device being arranged in an area section of the semiconductor chip, the memory device storing the operating state of the subcircuit block before an isolation from the supply voltage so that the operating state of the subcircuit block can be re-established after a renewed connection to the voltage supply.