Patent ID: 7405418
Filing Date: 2008-07-29
Classification: G11C,H01L

Abstract:
1. A memory cell, comprising: a layer with an upper surface and a bottom surface, the upper surface of the layer provided with a structure having a plurality of recesses; an electrode with an upper surface and a lower surface, the lower surface of the electrode contacting the upper surface of the layer, wherein the electrode is disposed on the layer such that the upper surface of the electrode is provided with a structure substantially corresponding to the structure of the upper surface of the layer and having a plurality of shoulders or projections substantially corresponding to the plurality of recesses on the upper surface of the layer; and an active material layer, with a top surface and a bottom surface, wherein the top surface of the active material layer contacts the bottom surface of the layer, and wherein the top surface of the active material layer contacts the electrode through the plurality of shoulders or projections.