Patent ID: 6256124
Filing Date: 2001-07-03
Classification: H04J

Abstract:
A method of parallel digital to photonic serial conversion using delay means timing comprising the following steps:providing a first photonic pulse input having a first wavelength, at least first and second digital inputs which constitute a first parallel digital input, a multiplexer output, at least first and second photonic modulators, and at least first and second modulator loading means for loading first modulation states into said first and second photonic modulators using information from said first parallel digital input;routing said first digital input to said first modulator loading means and said second digital input to said second modulator loading means, andproviding a routing systemwhich routes said first modulation states from said first modulator loading means to said first modulator and from said second modulator loading means to said second modulator,which routes input pulses from said first photonic pulse input to said first and second modulator loading means to initiate modulator loading, to said multiplexer output to provide sync pulses, and to said first and second photonic modulators to read said first modulation states loaded into said first and second photonic modulators to provide first photonic digital pulses of said first wavelength, andwhich routes said first photonic digital pulses to said multiplexer output,said routing system including delay means as necessary to time the arrival of said first photonic digital output pulses at said multiplexer output in serial between said sync pulses.