Patent ID: 8778767
Filing Date: 2014-07-15
Classification: H01L

Abstract:
1. A method of forming an integrated circuit, the method comprising: forming a gate structure over a substrate; removing portions of the substrate to form recesses adjacent to the gate structure; and forming a silicon-containing material structure in each of the recesses, wherein the silicon-containing material structure includes at least one first layer and a second layer, wherein the first layer and the second layer are a same material, an edge of the first layer closest to the gate structure is aligned with an edge of the second layer closest to the gate structure, the second layer has a first region and a second region, the second region is closer to the gate structure than the first region, and the first region is formed faster than the second region and therefore is thicker than the second region and the at least one first layer has a substantially constant thickness, and the second region extends above a top surface of the substrate.