Patent ID: 6165901
Filing Date: 2000-12-26
Classification: H01L

Abstract:
A method of fabricating a self-aligned contact in a semiconductor substrate, comprising:forming at least a gate and a source/drain region on the substrate wherein a cap layer is formed on top of the gate;forming first spacers on sidewalls of the gate;forming second spacers on the first spacers and the source/drain region;forming a dielectric layer over the substrate;forming an opening in the dielectric layer, wherein the opening exposes parts of the cap layer, the first spacer, and the second spacers when a misalignment occurs in the step of forming an opening;removing the second spacers exposed by the opening to form a concave region exposing the source/drain region;forming a conductive layer over the dielectric layer to fill the opening and the concave region;removing the conductive layer on the dielectric layer until the dielectric layer is exposed; andforming a plug in the opening and the concave region, the plug electrically coupled to the source/drain region.