Patent ID: 6194784
Filing Date: 2001-02-27
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate;a stack formed on the semiconductor substrate, the stack comprising a floating gate, a control gate, and an ONO insulator disposed between the floating gate and the control gate, the ONO insulator comprising a first silicon oxide layer, a first silicon nitride layer disposed on the first silicon oxide layer, and a second silicon oxide layer disposed on the first silicon nitride layer, the semiconductor substrate comprising a region adjacent to the stack;a first insulative layer encapsulating the stack;an etch-stop layer encapsulating the stack; anda second insulative layer disposed over the semiconductor substrate, the second insulative layer having an opening over the region filled with a conductive material, wherein the conductive material is in direct contact with the region of the semiconductor substrate, the opening covering a region over the stack.