Patent ID: 8994067
Filing Date: 2015-03-31
Classification: H01L

Abstract:
1. A semiconductor device, wherein an operation region of said device is located between a first main surface and a second main surface of a semiconductor, comprising at least one cell of a first kind and/or at least one cell of a second kind and/or at least one cell of a third kind; wherein said cell of said first kind comprises: wherein said cell of said second kind has not only the features of said cell of said first kind, but also has features wherein a portion of said first semiconductor region of a first conductivity type is contacted directly to a portion of said first main surface and is covered by a first insulator layer, said first insulator also covers on a place of said second semiconductor region of a second conductivity type and a place of said second semiconductor region of a first conductivity type on said first main surface, said first insulator layer is covered by a conductor; said portion of said first semiconductor region of a first conductivity type which is contacted directly to said first main surface and said second semiconductor region of a first conductivity type serve as a drain region and a source region of an Insulated-Gate Field-Effect Transistor of a first conductivity type, respectively, said second semiconductor region of a second conductivity type serves as a source-body region, said conductor covering on said first insulator serves as a gate of said Insulated-Gate Field-Effect Transistor of a first conductivity type, a signal applied on said gate controls a current of a first conductivity type between said drain and said source of said Insulated-Gate Field-Effect Transistor of a first conductivity type; wherein said Insulated-Gate Field-Effect Transistor is called as IGFET; wherein said cell of said third kind has not only the features of said cell of said first kind, but also has features wherein one side of said second semiconductor region of a second conductivity type is covered by a second insulator layer, said second insulator layer also covers one side of a semiconductor region of a second conductivity type serving as junction edge termination region outside of an edge of an active region; said junction edge termination region starts from a first side and ends at a second side; said first side is at said edge of said active regions of semiconductor devices, said second side has a feature that a neutral region of said first semiconductor region of a first conductivity type is at a place outside of said second side where no electric field exists under a voltage applied across said first electrode and said second electrode; a conductor covers on said second insulator layer serving as a turn-off gate; a low-voltage circuit is implemented outside of said second side of said junction edge termination region; said low-voltage circuit has two output terminals: a first terminal is connected with said second electrode and a second terminal is connected with said base electrode;