Patent ID: 6294445
Filing Date: 2001-09-25
Classification: H01L

Abstract:
The process of manufacture of a FRED device comprising the steps of(a) forming an insulation oxide layer atop the surface of a monocrystalline N type silicon wafer;(b) forming an insulation nitride layer atop the surface of said oxide layer wherein the insulation nitride layer is thinner than the insulation oxide layer;(c) forming a photoresist layer atop said insulation nitride layer;(d) applying a photolithographic mask to said photoresist layer and forming a plurality of windows in said photoresist layer which define geometry and at least two spaced PN junction segments;(e) sequentially opening windows in said nitride layer and said oxide layer by etching through said windows in said photolithographic mask ;(f) implanting a P type impurity through said window openings in at least said nitride layer and the silicon surface portions underlying said openings;(g) heating said wafer to diffuse said implanted P type impurities into said silicon and laterally with respect to said silicon surface, to define at least two active area diffusions spaced from one another beneath a portion of said oxide layer;(h) fully laterally etching and removing said portion of said oxide layer, thereby to expose the silicon surface which contains said spaced P diffusions and the N type silicon surface which spans between said spaced P diffusions;(i) applying a continuous top metal layer over the said exposed silicon surface to make contact to said P diffusions and to said N type surface spanning between said P diffusions, thereby forming a Schottky contact to said silicon and a PN diode contact to said spaced P diffusions;(j) and applying a bottom metal contact to the bottom surface of said silicon wafer.