Patent ID: 7536780
Filing Date: 2009-05-26
Classification: H01L,H05K,Y10T

Abstract:
1. A method of manufacturing a wiring substrate to which a semiconductor chip is mounted, the method comprising the steps of: forming a base having a surface; forming a peeling layer on the entire surface of the base; forming a capacitor having a plurality of layers on the peeling layer; and forming a plurality of wiring parts in the capacitor for connecting the capacitor to the semiconductor chip; wherein the plural layers of the capacitors are formed by performing the steps of: forming a first electrode layer on the peeling layer, forming a dielectric layer on the first electrode layer, and forming a second electrode layer on the dielectric layer; further comprising a step of: forming via holes in the first and second electrode layers, wherein the wiring parts include via wirings that are mounted in the via holes of the first and second electrode layers; wherein the step of forming via holes In the first and second electrode layers includes the steps of: forming first via holes in the second electrode layer, forming an insulation layer on the second electrode layer after the step of forming the first via holes, and peeling the base from the first electrode layer and forming second via holes in correspondence with the first via holes after the step of forming the insulation layer.