Patent ID: 8954635
Filing Date: 2015-02-10
Classification: G06F

Abstract:
1. A device, comprising: a link interface circuit operable to communicate over a communications link using a plurality of virtual channels; a first plurality of allocated buffers, wherein a different subset of the plurality of allocated buffers is allocated to each of the virtual channels; and a second plurality of non-allocated buffers that are not allocated to a particular virtual channel, wherein the link interface circuit is operable to receive a first transaction over the communications link and assign the first transaction to one of the allocated buffers or one of the non-allocated buffers, wherein the link interface circuit is operable to assign the first transaction to one of the allocated buffers in the subset for a particular virtual channel associated with the first channel or one of the non-allocated buffers based on an opposite of a default routing associated with the particular virtual channel, responsive to the first transaction including a freelist header portion.