Patent ID: 7724024
Filing Date: 2010-05-25
Classification: G01R

Abstract:
1. A method of testing a semiconductor device including a first logics which operates with a first power supply voltage, a voltage regulator which generates a second power supply voltage different from the first power supply voltage, a second logics which operates with the second power supply voltage output from the voltage regulator, and a register which controls an operation of the voltage regulator, said method executing a plurality of operational test items on the semiconductor device, said method comprising: setting the first and second logics and the register in initial states before initiating execution of the operational test items; halting the operation of the voltage regulator by the register after establishing an initial state of the register; after halting the operation of the voltage generator, carrying out the plurality of operational test items for the second logics while a test power supply voltage higher or lower than the second power supply voltage is supplied to the second logics; and after execution of the plurality of operational test items, establishing initial states of the first and second logics while a setting of the initial state of the register is canceled.