Patent ID: 7399695
Filing Date: 2008-07-15
Classification: H01L

Abstract:
1. An integrated die bumping process comprising: providing a load board and a mask including a pattern on a surface; utilizing the pattern of the mask to define a plurality of die regions on a surface of the load board for placing dice of a plurality of die specifications, wherein the die specification comprises die thickness, die size, the quantity of the bump pads, the disposed location of the bump pads, or any combination of the above, and a surface of each of the dice comprises a plurality of bump pads; utilizing a sticking layer to affix a plurality of dice on each die region according to the corresponding die specification; forming a plane layer on the load board surface where the load board surface is not covered by the dice after completing the step of affixing the dice, wherein the surface of the plane layer is even with the surface of the dice; forming a dielectric layer on the surface of the load board and a dielectric layer covering on each bump pad; utilizing the mask to perform a photolithography and etching process for forming at least a contact hole in the dielectric layer and exposing each bump pad; performing an under bump metallurgy process to form a metal layer on the surface of each bump pad and in each contact hole; and forming a solder bump on the metal layer corresponding to the contact hole location.