Patent ID: 7203855
Filing Date: 2007-04-10
Classification: G06F,Y02D

Abstract:
1. A power-saving control circuitry of an electronic device with a digital circuit, the power-saving control circuitiy comprising: a power control circuit, for generating an oscillator power signal, a clock power signal and a digital power signal; an oscillator, for generating an oscillator clock signal, wherein the oscillator operates or shuts down according to the oscillator power signal; a clock pulse generator, for generating an operational clock signal according to the oscillator clock signal, wherein the clock pulse generator operates or shuts down according to the clock power signal; and a multi-enable module, for transmitting a digital clock signal to the digital circuit according to the digital power signal, wherein the multi-enable module produces the digital clock signal according to a select signal and based on one of the following: the operational clock signal and the oscillator clock signal.