Patent ID: 7576576
Filing Date: 2009-08-18
Classification: H03L

Abstract:
1. An electronic circuit with a first PLL circuit including a first phase comparator and a first controllable oscillator, with a second PLL circuit including a second phase comparator and a second controllable oscillator, wherein an input signal is supplied to an input of the first PLL circuit, wherein the input signal or the output of the first PLL circuit is selectively supplied to an input of the second PLL circuit, wherein either the output of the first PLL or the output of the second PLL circuit is selectively connected to an input of the first PLL circuit, wherein a lock detection circuit is provided which detects locking of the respective input signal to the output signal of the first controllable oscillator, wherein, in case the input signal is locked to the output signal of the first controllable oscillator, the output signal of the first PLL circuit is supplied to an input of the second PLL circuit and the output signal of the second PLL circuit is supplied to an input of the first PLL circuit, and wherein the output of the second PLL circuit is the single output of the circuit.