Patent ID: 8169066
Filing Date: 2012-05-01
Classification: H01L

Abstract:
1. A semiconductor package comprising: a first package including a first substrate having a first front side and a first back side opposing the first front side, the first package further including a first semiconductor chip on the first front side and an external connection member on the first semiconductor chip, the external connection member being configured to electrically connect the first semiconductor chip to an external device; a second package including a second substrate having a second front side and a second back side, the second back side facing the first back side of the first substrate, the second front side opposing the second back side, the second package further including a second semiconductor chip on the second front side; and an internal connection member between the first back side and the second back side electrically connecting the first package to the second package, wherein the external connection member includes a first rewiring pad electrically connected to the first substrate and a second rewiring pad electrically connected to the first rewiring pad, wherein the first package further includes a first molding layer on the first semiconductor chip, the first molding layer covering the first rewiring pad and having a hole exposing the second rewiring pad, and the second package further includes a second molding layer on the second semiconductor chip, and wherein the external connection member further includes an external connection terminal in the hole, the external connection member having a first portion in the hole contacting the second rewiring pad and a second portion outside the hole.