Patent ID: 6260157
Filing Date: 2001-07-10
Classification: G06F

Abstract:
A processing device comprising:a program read only memory (ROM) having program instructions and a jump instruction;a patch program;a program random access memory (RAM) capable of storing the patch program for execution;a data memory;a patch vector table stored in the data memory including a patch vector that indicates the location of the patch program;a processor that executes the program instructions in the program ROM and that uses the patch vector table when it reaches the jump instruction to execute the patch program; anda patch engine, wherein the patch program includes a first portion stored in the program RAM and a second portion stored in a further memory, wherein the first portion includes a patch engine call that calls the patch engine, the second portion includes one or more patch instructions and wherein the patch engine, when called, locates the second portion of the patch program in the further memory, loads the second portion of the patch program into the program RAM and runs the second portion of the patch program.