Patent ID: 7795091
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A method of forming a split-gate memory device comprising: forming a select gate having a first work function overlying a first portion of a substrate; forming a control gate having a second work function overlying a second portion of the substrate proximate the first portion, wherein (i) for a first majority carrier type split-gate memory device, wherein the first majority carrier type comprises electrons, the first work function is greater than the second work function and (ii) for a second majority carrier type split-gate memory device, wherein the second majority carrier type comprises holes, the first work function is less than the second work function; forming a first current electrode in the substrate; and forming a second current electrode in the substrate separated from the first current electrode by a channel underlying the control gate and select gate, wherein prior to forming the select gate and the control gate, the method comprising: forming a counter doped region proximate a top surface of the substrate in at least the first and second portions, wherein the counter doped region is configured to modify a work function of a channel region within the first and second portions of the substrate.