Patent ID: 6449672
Filing Date: 2002-09-10
Classification: G06F

Abstract:
An apparatus for interfacing with a bus, comprising:a first agent, said first agent including logic for generating a first request signal which indicates that said first agent requests use of said bus; a second agent, said second agent including logic for generating a second request signal which indicates that said second agent requests use of said bus; and arbitration logic for: receiving the first and second request signals from said first and second agents, respectively, and, on the basis thereof, logically ORing said first and second request signals after a delay in order to allow a previously selected agent to perform a retry operation and in response thereto generating a single bus request signal and transmitting said single bus request signal to an external arbiter; selecting which one of said first or second agents should be allocated use of said bus for a given transaction; receiving a single grant signal in response to the generation and transmitting of the single bus request signal; and granting said selected agent use of said bus.