Patent ID: 8358231
Filing Date: 2013-01-22
Classification: H03M

Abstract:
1. A tracking analog-to-digital converter “ADC” with a self-controlled variable clock, comprising: a digital register; a digital-to-analog converter “DAC” coupled to said digital register and providing an analog feedback signal; a comparator providing a comparison signal based on a comparison between an analog input signal and said analog feedback signal, said comparison signal being coupled to the digital register; a means for determining a comparison ready indicator based on a determination of comparator readiness, indicating said comparator is ready, further indicating said comparison signal can be reliably read; a means for clocking to generate a clock signal to control said digital register in response to at least said comparison ready indicator indicating said comparator is ready; and said digital register being configured to increase or decrease a value of the digital register in response to said clock signal based on said comparison signal of the comparator.