Patent ID: 8416814
Filing Date: 2013-04-09
Classification: H04J,H04L

Abstract:
1. A method for high precision clock recovery over a packet switched network, said method comprising the steps of: generating packets at a local unit carrying information to a remote unit using a local clock signal, wherein each generated packet carries transmission time information; generating a remote timestamp at said remote unit for each said generated packet; providing a minimum network delay estimation for filtering out network jitter, wherein said minimum network delay estimation is defined as a time delay in which a packet remains in the packet switched network, assuming that all transmission queues through which said packet passes are empty, wherein said time delay varies in accordance with network latency, providing a threshold associated with a change in said network latency, said threshold being adjustable in accordance with network conditions; and reconstructing a received clock signal having the same frequency as the local clock signal based on a time difference between said transmission time information and said remote timestamp, wherein said reconstructing step is performed in accordance with said minimum network delay estimation based on said adjustable threshold, the method further comprising the step of: estimating a noise threshold for determining whether each of the detected minimum delay values is noise or not, wherein said noise threshold estimation comprises the steps of: obtaining a minimum delay value over a time window; checking if said obtained minimum delay value is noisy, and if so, increasing said noise threshold, while if not noisy, decreasing said noise threshold; wherein increasing said noise threshold is carried out by multiplying said noise threshold by a “Noise Compensation Factor”; and decreasing said noise threshold is carried out by dividing said noise threshold by a “Smooth Compensation Factor”.