Patent ID: 7863678
Filing Date: 2011-01-04
Classification: H01L

Abstract:
1. An insulated-gate field-effect transistor comprising: (a) a semiconductor substrate having a first and a second opposite major surface extending parallel to each other, and at least a pair of trenches extending from the first major surface of the substrate and terminating short of the second major surface of the substrate; (b) a drain region of a first conductivity type having a surface exposed at the second major surface of the substrate and having a thickness not less than a spacing between the second major surface of the substrate and each of the trenches; (c) a first body region of a second conductivity type with a first prescribed impurity concentration, the first body region being disposed contiguous to both the drain region and the trenches so as to prevent the drain region from being exposed at the first major surface of the substrate between the pair of trenches; (d) a second body region of the second conductivity type with a second prescribed impurity concentration less than the first prescribed impurity concentration, the second body region being disposed between the pair of trenches and contiguous to the first body region and having a surface exposed at the first major surface of the substrate; (e) a source region of the first conductivity type disposed between the pair of trenches and contiguous to both the second body region and the trenches, the source region having a surface exposed at the first major surface of the substrate; (f) a drain electrode disposed on the second major surface of the substrate in ohmic contact with the drain region; (g) a source electrode disposed on the first major surface of the substrate in ohmic contact with the source region and in schottky contact with the second body region; (h) a gate insulator in each trench; and (i) a gate electrode received in each trench via the gate insulator and held opposite those parts of the substrate where channels are to be formed.