Patent ID: 6028361
Filing Date: 2000-02-22
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate having a main surface;an isolation film surrounding an active region on said main surface, and including a body region of substantially constant thickness and a graded region sequentially reduced in thickness towards said active region;a first transistor including a first gate electrode extending in a first direction on said main surface, and a pair of source/drain regions located along a second direction crossing said first direction;a second transistor including a second gate electrode extending in the first direction and located offset from said first gate electrode, and a pair of source/drain regions located along the second direction crossing said first direction;an interlayer insulating film covering said isolation film, said first transistor, and said second transistor;a first contact hole formed by removing a portion of said interlayer insulating film and a portion of said graded region so as to expose one source/drain region of the pair of source/drain regions of said first transistor, said one source/drain region being located at a side opposite to the side where said second transistor is located; anda second contact hole formed by removing a Portion of said interlayer insulating film and a portion of said graded region so as to expose one source/drain region of the pair of source/drain regions of said second transistor said one source/drain region located at a side opposite to the side where said first transistor is located;respective end planes of said isolation film exposed by formation of said first and second contact holes are substantially perpendicular to the main surface of said semiconductor substrate.