Patent ID: 6521960
Filing Date: 2003-02-18
Classification: G11C,H01L

Abstract:
A first column transistor connected to a local data line and a first bit line, comprising a first gate electrode, a first source region, and a first drain region, the first source region and second drain region being formed in an active region;a second column transistor connected to a local data line and a second bit line, comprising a second gate electrode, a second source region, and a second drain region, the second source region and second drain region being formed in the active region, wherein the first column transistor and the second column transistor are positioned adjacent one another and sharing only one of a common source region or a common drain region; and a plurality of column transistors connected to a common sense amplifier wherein each column transistor includes a gate electrode, each of the gate electrodes being connected to one another and to a metal wiring through a single contact.