Patent ID: 6016271
Filing Date: 2000-01-18
Classification: G11C

Abstract:
A circuit for generating a regulated voltage for gate terminals of non-volatile memory cells of a floating gate type, comprising:a generator circuit adapted to generate an unregulated voltage on an output thereof;a comparator circuit coupled to the output of the generator circuit and adapted to output an error signal based upon a difference between the unregulated voltage and an internal reference voltage;a regulator circuit coupled to the output of the comparator circuit and operative to regulate the unregulated voltage based on the value of the error signal, said regulator circuit including a transistor having a source, drain and gate, said gate of said transistor connected to a power supply;said comparator circuit comprising a reference non-volatile memory cell of the floating gate type having a threshold voltage corresponding to the internal reference voltage, and wherein said reference non-volatile memory cell includes a drain connected to said source of the transistor in the regulator circuit; anda circuit for biasing the drain of the reference non-volatile memory cell, wherein the non-volatile memory reference cell before the start of any voltage regulating operation is programmed at a threshold voltage RV1 corresponding to a value intermediate distributions ""01"" and ""00"" and between about 4.5 and 6.2 volts.