Patent ID: 7898548
Filing Date: 2011-03-01
Classification: G06F,G06T,G09G,H04N

Abstract:
1. A computing system comprising: a memory configured to store compressed image data in a compressed data buffer structure, the memory further configured to store intra-picture image data in a first image buffer and predicted-picture image data in a second image buffer; a memory interface coupled to the memory and configured to arbitrate access to the memory; a central processing unit (CPU) coupled to the memory interface and configured to direct operations of the computing system, the CPU sharing the memory with peripheral devices in the computing system; a video controller configured to decode bidirectional image data and send the decoded bidirectional image data to a display adapter; an encoder/decoder configured to share the memory, the encoder/decoder further configured retrieve compressed image data from the compressed data buffer structure and send intra-picture image data to the first image buffer and predicted-picture image data to the second image buffer; the encoder/decoder further configured to send bidirectional image data to the video controller; and a bus coupled to the memory interface, the encoder/decoder, and the video controller, the bus having sufficient capacity to operate as the only bus in the computing system configured to transfer data in real time between the memory, the encoder/decoder, and the video controller.