Patent ID: 7630876
Filing Date: 2009-12-08
Classification: G06F

Abstract:
1. A method for application specific integrated circuit (ASIC) simulation, wherein the ASIC includes plural logical elements, comprising; (a) providing an ASIC simulator, the ASIC simulator configured to emulate the ASIC and configured to communicate with a computing system and receive stimulus from the computing system; (b) monitoring transitions at an output of a logic element of the ASIC by the computing system, after assertion of an enable command to the logic element; (c) checking if the transition at the output of the logic element is to an unknown value (X); (d) verifying if a source of the unknown value X at the output is an unwanted condition and not a real error condition, by checking if an input value to the logic element is also an known value; and if the unknown input value is due to a design error, then concluding that the unknown value (X) at the output to be a real error condition, if not, concluding the unknown value (X) at the output to be an unwanted condition; (e) forcing the output of the logic element to a known value if the source of the unknown value is an unwanted condition and not a real error condition as determined in step (d); (f) propagating the known value to logic elements in the ASIC; and (g) releasing the known value at the output of the logic element after deassertion of the enable command to the logic element received in step (b).