Patent ID: 6473836
Filing Date: 2002-10-29
Classification: G06F

Abstract:
A cache memory control apparatus for controlling a plurality of hierarchically arranged cache memories into which data of high-frequency of access is copied from a main storage unit by a processing unit of a computer system, which processing unit executes various processes using data stored in the main storage unit of the computer system, said apparatus comprising:a command control section issuing a prefetch command to fetch speculative data, which is inclined to become necessary for near future use in the processing unit, from the main storage unit into the hierarchically arranged cache memories prior to execution of a corresponding process by the processing unit; and a prefetch control section controlling the hierarchically arranged cache memories, when the prefetch command issued by said command control section is executed, such that at least one of the hierarchically arranged cache memories to which said speculative data is to be fetched is changeably selected as one or more destination cache memories, according to at least either of status information about one of the hierarchically arranged cache memories and a kind of prefetch for the prefetch command.