Patent ID: 6737221
Filing Date: 2004-05-18
Classification: C23F,H01L,Y10S

Abstract:
A fabrication method of a semiconductor integrated circuit device comprising the steps of:(a) forming an insulating film over a device surface of a wafer; (b) forming a wiring groove in the insulating film by first lithographic treatment; (c) depositing a copper film over the insulating film and in the wiring groove in the insulating film over the device surface; (d) after step (c), cleaning an outer edge portion of the device surface and an entire area of a back surface of the wafer with cleaning liquid, which can dissolve copper, without applying the cleaning liquid to a central region of the device surface; (e) removing the deposited copper film outside the wiring groove by chemical mechanical polishing; (f) after steps (d) and (e), subjecting the wafer to a second lithographic treatment without subjecting the wafer to any lithographic treatment between steps (b) and (f).