Patent ID: 6951774
Filing Date: 2005-10-04
Classification: H01L

Abstract:
1. A semiconductor device manufacturing method comprising the steps of: (a) preparing a mold provided with a cavity having first and second side surfaces facing each other and third and fourth surfaces facing each other and coming in contact with said first and second side surfaces and provided with a plurality of resin injection entrances created on said first side surface and a ventilation hole created on said second side surface; (b) preparing a wiring substrate having a main surface, preparing a first semiconductor chip fixed on said main surface of said wiring substrate and preparing a second semiconductor chip fixed on said first semiconductor chip; (c) placing said wiring substrate, said first semiconductor chip and said second semiconductor chip inside said cavity; and (d) after said step (c) injecting resin concurrently from the plurality of resin injection entrances toward the second side surface of the cavity in order to seal and hold said first and second semiconductor chips, wherein in said step (c), said wiring substrate, said first semiconductor chip and said second semiconductor chip are arranged in such a way that, on a cross section parallel to said third side surface of said cavity, the length of said first semiconductor chip exceeds the length of said second semiconductor chip, and wherein in said step (c), said wiring substrate, said first semiconductor chip, and said second semiconductor chip are arranged in such a way that, on a cross section parallel to said first side surface of said cavity, the length of said first semiconductor chip is smaller than the length of said second semiconductor chip.