Patent ID: 6365457
Filing Date: 2002-04-02
Classification: H01L

Abstract:
A method for manufacturing a nonvolatile memory device comprising a memory cell array having a plurality of cells, the method comprising:(a) forming a field oxide film over a semiconductor substrate to define an active region of the substrate; (b) sequentially forming a tunnel oxide film, a first conductive layer, an interpoly dielectric layer, a second conductive layer, and a first insulating layer over the substrate; (c) forming a stacked gate of the first and second conductive layers over the active region; (d) forming source/drain regions of a first concentration by ion-implanting a first impurity in a portion of the active region exposed by the stacked gate; (e) removing an exposed portion of the field oxide film using the second conductive layer as an etching mask; and (f) exposing the source region of each cell and a portion of the second conductive layer, and ion-implanting second impurity using the exposed second conductive layer as a mask.