Patent ID: 9177874
Filing Date: 2015-11-03
Classification: H01L

Abstract:
1. A method for the manufacture of a semiconductor device, the method comprising: providing a semiconductor substrate comprising a first active device area separated from a second active device area by a first isolation region formed in said semiconductor substrate, wherein said second active device area comprises a transistor in an intermediate processing stage, said transistor comprising a gate electrode; forming a sacrificial oxide layer over said first and second active device areas; forming an optical planarization layer (OPL) over said sacrificial oxide layer, said OPL covering at least said first and second active device areas; forming a patterned mask layer over said OPL, said patterned mask layer covering at least said first active device area and exposing at least a portion of said OPL formed above said second active device area; and etching said exposed portion of said OPL in the presence of said patterned mask layer to expose a portion of said sacrificial oxide layer formed over said gate electrode of said transistor.