Patent ID: 6875673
Filing Date: 2005-04-05
Classification: G01L,H01L,Y10S

Abstract:
1. A method of producing a semiconductor device comprising the steps of: preparing a semiconductor wafer including a first semiconductor layer having a first conductivity and a second semiconductor layer having a second conductivity on said first semiconductor layer; forming, at each chip unit, an impurity diffusion layer with said first conductivity piercing said second semiconductor layer from an surface of said second semiconductor layer opposite to said first semiconductor layer to a surface of said first semiconductor layer contacting said second semiconductor layer, having a predetermined width with respect to said surface of said second semiconductor layer, and extending along said surface of said second semiconductor layer for sectioning said second semiconductor layer into a plurality of blocks for insulation; forming an integrated circuit portion on said surface of said second semiconductor layer at each chip unit; forming, at each chip unit, a wire, at a first end, being connected to said second semiconductor layer at the inside of said chip unit and extending, at the second opposite end, to one of scribe lines defining said chip unit, wherein said wire between said first end and said second end of said wire does not cross said impurity diffusion layer except at said second end; effecting electrochemical etching said first semiconductor layer with said wire to form said hollow portion and said thin portion; and cutting said semiconductor wafer along said scribe lines.