Patent ID: 6235565
Filing Date: 2001-05-22
Classification: H01L

Abstract:
A method of fabricating a CMOS semiconductor device which comprises the steps of:(a) providing a semiconductor substrate of a first conductivity type;(b) implanting in a first region of said substrate a dopant of opposite conductivity type and then masking the region of said substrate doped with dopant of said opposite conductivity type;(c) implanting in a second region of said substrate a dopant of said first conductivity type while retaining said mask on the region of said substrate doped with dopant of said opposite conductivity type;(d) driving each of said implants farther into said substrate to form a first tank of said first conductivity type and a second tank of opposite conductivity type while still retaining said mask on the region of said substrate doped with dopant of said opposite conductivity type;(e) then implanting in said tank of first conductivity type a second implant of said first conductivity type while retaining said mask on the region of said substrate doped with dopant of said opposite conductivity type; and(f) completion of fabrication of said device.