Patent ID: 6242931
Filing Date: 2001-06-05
Classification: G01R,H01L,H01R,Y10T

Abstract:
An interconnect for a semiconductor component comprising:a substrate having a thickness of from about 0.002 inches to 0.014 inches, the substrate comprising a first side, a second side, and a plurality of first contacts on the first side configured to electrically engage a plurality of second contacts on the component;a plurality of conductive vias in the substrate in electrical communication with the first contacts;a second substrate comprising a plurality of third contacts in electrical communication with the conductive vias; anda compliant polymer layer attaching the second substrate to the substrate, such that the substrate and the first contacts can move in a z-direction upon application of a biasing force to accommodate variations in a planarity of the second contacts, the compliant polymer layer comprising a conductive polymer configured to electrically connect the conductive vias to the third contacts.