Patent ID: 6222226
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A semiconductor device comprising:a substrate;a gate oxide layer on the substrate and a floating gate on the gate oxide layer;a first dielectric layer on the floating gate and a control gate on the first dielectric layer;a second dielectric layer on first and second opposing sides of the floating gate and on a portion of a surface of the floating gate substantially perpendicular to the second side;first and second conductive sidewalls respectively formed on the second dielectric layer on the first and second sides of the floating gate, said second conductive sidewall being formed on the second dielectric layer on the second side and the portion of the surface to overlap a corner of the floating gate; andimpurity regions in the substrate at the first and second opposing sides of the floating gate, and wherein a wire layer contacts one of the first and second conductive sidewalls and each of the impurity regions.