Patent ID: 6647603
Filing Date: 2003-11-18
Classification: H01C,H01G,H05K,Y10T

Abstract:
A process for manufacturing electronic device packages, comprising the steps of:preparing a plurality of electronic elements, each of which has two opposite side faces and each of which is formed with two electrode layers on said side faces, respectively; preparing a metal sheet extending in a longitudinal direction; forming said metal sheet into a runner part that extends in said longitudinal direction, and a plurality of spaced apart terminal parts that are connected to said runner part and that are aligned in said longitudinal direction, each of said terminal parts including a pair of spaced apart connecting legs that have lower inserting sections connected to said runner part, and upper soldering sections which extend from said lower inserting sections and which are offset from each other in a transverse direction relative to said longitudinal direction so as to define an inserting gap therebetween; positioning each of said electronic elements into said inserting gap in a respective one of said terminal parts in a manner that said upper soldering sections of said connecting legs of the respective one of said terminal parts confront said electrode layers on said side faces of said electronic element, respectively; and respectively connecting said side faces of each of said electronic elements to said upper soldering sections of said connecting legs of the respective one of said terminal parts via soldering wherein said upper soldering sections of said connecting legs of each of said terminal parts are formed with corrugated surfaces, each of which is formed with a plurality of grooves and a plurality of ridges that abut against a respective one of said electrode layers on said side faces of said electronic elements.