Patent ID: 6495200
Filing Date: 2002-12-17
Classification: C23C,H01L

Abstract:
A method to deposit a seeding layer for electroless copper plating for a semiconductor device to form an interconnect; comprising the steps of:a) forming an insulating layer having an opening over a substrate; said insulating layer having a top surface; b) forming a diffusion barrier layer over said insulating layer; c) forming a seeding film comprised of Palladium (Pd) over said diffusion barrier layer; said seeding film formed by (1) a process selected from the group consisting of dip coating and spin-on; said seeding layer is formed using a seed bath comprised of Palladium acetate, and a solvent of a material selected from the group consisting of chloroform and methylene chloride; and (2) heating said seeding film to thermally decompose said seeding layer to palladium; and d) chemical-mechanical polishing and removing said seeding film and said diffusing barrier layer from over said top surface of said insulating layer; and e) electroless plating Cu over said seeding film forming a copper plug at least filling said hole.