Patent ID: 8823128
Filing Date: 2014-09-02
Classification: H01L

Abstract:
1. A semiconductor structure, comprising: a first well; a second well, separated from the first well; a third well, formed between the first well and the second well; a first doped region, formed in a surface of the third well; a second doped region, formed in the surface of the third well; a third doped region, formed between the first doped region and the second doped region, and separated from the first doped region and the second doped region, the third doped region electrically connected to the first doped region and the second doped region; a fourth doped region, formed in a surface of the first well; a fifth doped region, formed in a surface of the second well and electrically connected to the fourth doped region; a first base region, formed in the surface of the first well and separated from the fourth doped region; a second base region, formed in the surface of the second well and separated from the fifth doped region; a first Schottky barrier, formed and overlaid on a part of the first base region and a part of the first doped region; and a second Schottky barrier, formed and overlaid on a part of the second base region and a part of the second doped region; wherein the first well, the second well, the third doped region, the fourth doped region and the fifth doped region have a first conductivity type, and the third well, the first doped region, the second doped region, the first base region and the second base region have a second conductivity type opposite to the first conductivity type.