Patent ID: 6597583
Filing Date: 2003-07-22
Classification: H01L,H05K,Y10T

Abstract:
A multi-layer circuit board comprising:at least one insulating layer having first and second surfaces thereof; first and second wiring patterns arranged on said first and second surfaces, respectively, of the insulating layer; a ferroelectric layer having a dielectric constant larger than that of the insulating layer and having a same thickness as that of the insulating layer and also having first and second surfaces, said ferroelectric layer being arranged in said insulating layer in such a manner that said first and second surfaces of the ferroelectric layer coincide with said first and second surface of the insulating layer, respectively; first and second electrode films formed on said first and second surfaces of said ferroelectric layer, respectively, to define a capacitor incorporated in said circuit board; said first electrode film and said first wiring pattern which exists on the same surface of said first electrode film being electrically connected to a ground layer; and said second wiring pattern being arranged at a region, other than a capacitor forming area where said second electrode film is arranged, opposite to said first wiring pattern to define a signal pattern.