Patent ID: 8212614
Filing Date: 2012-07-03
Classification: H03F

Abstract:
1. A buffer stage, comprising: a first follower with positive asymmetry connected between a high voltage rail and a low voltage rail and including an input and an output; a second follower with negative asymmetry connected in parallel with the first follower between the high voltage rail and the low voltage rail and including an input and an output, wherein the input of the first follower is connected to the input of the second follower; and a signal summer connecting the output of the first follower with positive asymmetry to the output of second follower with negative asymmetry; wherein the follower with positive asymmetry and the follower with negative asymmetry each comprise transistors of the same type of polarity, but neither comprise transistors of the opposite type of polarity; wherein the first follower with positive asymmetry amplifies positive portions of a signal accepted at the input of the first follower more than negative portions of the signal accepted at the input of the first follower; and wherein the second follower with negative asymmetry amplifies negative portions of a signal accepted at the input of the second follower more than positive portions of the signal accepted at the input of the second follower.