Patent ID: 7961744
Filing Date: 2011-06-14
Classification: H04L

Abstract:
1. A frame multiplexer that multiplexes a plurality of frames of variable length input from a plurality of lines, the frame multiplexer comprising: a plurality of counters each of which is provided for each of the plurality of lines; a flow monitoring unit that adds a value representing a length of a frame that passes through the frame multiplexer to a value of a counter provided for a line from which the frame is input; a bandwidth managing unit that selects, from among the plurality of lines and in a repeated sequence, active lines from which the plurality of frames are input into the frame multiplexer, and that subtracts a constant token value from a value of a counter of an active line selected; and an output control unit that stores the frame that has passed through the flow monitoring unit in a queue buffer, and that reads out the frame from the queue buffer at a constant output rate, wherein each of the plurality of counters includes a counter part having a plurality of bits indicating a counted value, and a sign bit indicating whether the counted value indicated by the counter part is positive, and wherein the active lines are the plurality of lines of which the counted value is positive.