Patent ID: 6548364
Filing Date: 2003-04-15
Classification: H01L

Abstract:
A method of fabricating a self-aligned SiGe HBT BiCMOS on a SOI substrate, comprising the steps of:providing a silicon on insulator substrate having a buried oxide layer; etching a collector region in said buried oxide layer; depositing an epitaxial layer in said collector region; depositing a first polysilicon layer on said epitaxial layer in said collector region; etching a trench in said first polysilicon layer in said collector region; etching a void below said trench wherein said void is operatively connected to said trench and said epitaxial layer; depositing a SiGe base layer in said void such that said SiGe base layer is operatively connected to said trench and is in contact with said epitaxial layer; depositing a second polysilicon layer in said trench such that said second polysilicon layer is in contact with said SiGe base layer; connecting said second polysilicon layer to an emitter contact; and connecting said SiGe base layer to a base contact, wherein said emitter contact and said second polysilicon layer are self-aligned with said SiGe base layer.