Patent ID: 8963821
Filing Date: 2015-02-24
Classification: G09G,G11C

Abstract:
1. A scan driving device, comprising: a plurality of scan driving blocks that are sequentially arranged, with the plurality of scan driving blocks respectively comprising: a first node transmitted with a clock signal input to a first clock signal input terminal; a second node transmitted with an input signal according to a clock signal input to a second clock signal input terminal; a first transistor transmitting a power source voltage to an output terminal according to a voltage of the first node; a second transistor formed to transmit a clock signal input to a third clock signal input terminal to the output terminal according to a voltage of the second node; and a dummy transistor formed to transmit the clock signal input to the third clock signal input terminal to the output terminal according to the voltage of the second node, with one of the second transistor and the dummy transistor being cut off.