Patent ID: 6127230
Filing Date: 2000-10-03
Classification: H01L

Abstract:
A method for manufacturing a vertical semiconductor device comprising the step of:providing a semiconductor substrate having a surface;forming a doped region in the semiconductor substrate;forming an epitaxial silicon layer overlying the surface of the semiconductor substrate and having a side;doping the epitaxial silicon layer with a dopant during the step of forming, wherein the dopant is changed from a first conductivity to a second conductivity to form a first region and a second region, respectively, and the dopant is changed from the second conductivity to the first conductivity to form a third region;forming a first contact to the doped region, wherein the doped region is coupled to the first region of the epitaxial silicon layer so that the first contact is electrically coupled to first region;wherein the step of doping the epitaxial silicon layer to form the second region includes the step of forming a dopant profile comprising a first profile and a second profile, the first profile of the dopant profile being substantially constant and in contact with the third region, and the second profile of the dopant profile has a gradient profile; andforming a gate structure along the side of the epitaxial silicon layer.