Patent ID: 7253669
Filing Date: 2007-08-07
Classification: H03L

Abstract:
1. A digital feedback loop circuit comprising: a controllable output signal generator to generate a loop circuit output signal; a feedback counter to divide said loop circuit output signal by an integer N; a detector to compare said divided loop circuit output signal to an input reference signal and generate a comparison signal; a controller responsive to said comparison signal to generate an output control signal to adjust said controllable output signal generator to lock said loop circuit output signal to said input reference signal; and circuitry to selectably alter said output control signal to adjust resolution of said loop circuit output signal; said circuitry comprising: a control signal modifier responsive to said output control signal to produce a modified control signal; a selector to select one of said output control signal and said modified control signal as an input to said controllable output signal generator for M loop cycles (M<N) and to select said output control signal for N−M loop cycles.