Patent ID: 7700472
Filing Date: 2010-04-20
Classification: H01L

Abstract:
1. A method of forming a gate of a semiconductor device, the method comprising: providing a semiconductor substrate over which a first conductive layer, a dielectric layer and a second conductive layer are formed; pattering the second conductive layer to expose a part of the dielectric layer; forming a first protection layer on sidewalls of the second conductive layer; removing the exposed dielectric layer and the first protection layer at the same time by a first etch process using the first protection layer as an etch mask, wherein the first protection layer prevents the second conductive layer over the dielectric layer from being etched during removal of the dielectric layer; forming a second protection layer on sidewalls of the second conductive layer; and removing the exposed first conductive layer and the second protection layer at the same time by a second etch process using the second protection layer as an etch mask, wherein the second protection layer prevents the second conductive layer over the first conductive layer from being etched during removal of the first conductive layer.