Patent ID: 7656047
Filing Date: 2010-02-02
Classification: H01L

Abstract:
1. A semiconductor device package comprising: a substrate having at least one ground trace extending on an upper surface thereof; a semiconductor device mounted and electrically coupled to the substrate; a package body encapsulating the semiconductor device against a portion of the upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device; wherein the electromagnetic interference shielding layer is a plated metal layer in contact with the package body and in contact with the upper surface of the substrate, and the plated metal layer is connected to the ground trace; and wherein the plated metal layer has a main body and a side wall extending from the main body, and the bottom of the side wall is in contact with the upper surface of the substrate, while the side wall of the plated metal layer is flush with a side surface of the substrate, so as to define a coplanar side surface.