Patent ID: 8987089
Filing Date: 2015-03-24
Classification: H01L

Abstract:
1. A method of fabricating a memory device, comprising: forming a trench through a stack of alternating layers of a first material and a second material different from the first material over a substrate, wherein a bottom of the trench exposes a source region in a portion of a semiconductor channel extending substantially parallel to a major surface of the substrate; filling a bottom portion of the trench with a protective material; etching the stack through the trench to remove at least a portion of the alternating layers of the second material and form recesses between the alternating layers of the first material; forming an electrically conductive material in the trench and within the recesses to form control gate electrodes for a memory device; removing the electrically conductive material from the trench; depositing an insulating material over the sidewalls of the trench and over the protective material at the bottom portion of the trench; etching through the insulating material and the protective material to expose the portion of the semiconductor channel at the bottom of the trench while leaving the insulating material on the trench sidewalls; and filling the trench with an electrically conductive source line such that the source line is in electrical contact with the source region in the semiconductor channel and the insulating material is positioned between the source line and the control gate electrodes along the sidewalls of the trench.