Patent ID: 6635934
Filing Date: 2003-10-21
Classification: H03K

Abstract:
A semiconductor device having a standby cycle and an active cycle and receiving an input signal of a predetermined logical level in said standby cycle, comprising:a first insulated gate field effect transistor connected between a first power source node and a first output node, receiving said input signal on a gate thereof, and having a first tunnel barrier; and a second insulated gate field effect transistor connected between said first output node and a sub-power source node, receiving said input signal on a gate thereof, and rendered conductive complementarily to said first insulated gate field effect transistor, said second insulated gate field effect transistor having a second gate tunnel barrier smaller than said first gate tunnel barrier; and a first switching transistor connected between said sub-power supply node and a second power source node, and selectively rendered conductive in response to an operation cycle instructing signal.