Patent ID: 8841753
Filing Date: 2014-09-23
Classification: H01L

Abstract:
1. A semiconductor device comprising: an interlayer insulating film formed on a substrate; a first seal wiring formed in the interlayer insulating film in a periphery of a chip region; a first protective film formed on the interlayer insulating film having the first seal wiring formed therein; a cap layer formed on the first protective film over the first seal wiring; a second protective film formed on the first protective film; a groove formed in a part of the interlayer insulating film located outside the first seal wiring when viewed from the chip region; a first opening formed in the first protective film such that the groove is directly below the first opening; a second opening formed in the first protective film having a part of the cap layer provided therein to be in contact with the first seal wiring; a third opening formed in the second protective film, wherein: the groove and the cap layer are provided in the third opening.