Patent ID: 8248853
Filing Date: 2012-08-21
Classification: G11C

Abstract:
1. A method of programming a non-volatile memory device, the memory device including: a plurality of memory cell transistors arranged in a plurality of transistor strings, wherein a transistor string includes a plurality of memory cell transistors arranged in series; a plurality of word lines, each word line connected to a corresponding memory cell transistor of each of the different transistor strings; and a plurality of bit lines, each bit line connected to one of the transistor strings, the method comprising: applying a first voltage to a selected word line corresponding to a selected memory cell transistor of a selected transistor string to be programmed; and applying a second voltage to a neighboring word line neighboring the selected word line and corresponding to a neighboring transistor of the selected transistor string, wherein the first voltage is greater than the second voltage, the application of the first and second voltages to the selected and neighboring word lines respectively causing electrons in the active region between the neighboring transistor and the selected memory cell transistor, to be accelerated toward the selected memory cell transistor and injecting into a charge storage layer of the selected memory cell transistor, wherein each transistor string includes a plurality of the memory cell transistors arranged in series between a string select transistor and a ground select transistor and wherein the neighboring transistor is positioned between the selected memory cell transistor and one of the ground select transistor and the string select transistor, and further comprising: