Patent ID: 7525830
Filing Date: 2009-04-28
Classification: G11C

Abstract:
1. A nonvolatile ferroelectric memory device having a perpendicular electrode cell, comprising: a perpendicular electrode cell array including a plurality of perpendicular electrode cells for reading and writing cell data, each perpendicular electrode cell including a plurality of word lines and a plurality of bit lines that cross each other orthogonally and including a ferroelectric capacitor having both electrodes and ferroelectric layers that are formed perpendicular to the bit lines and including a switching device for selectively switching a current direction depending on voltage change between the ferroelectric capacitor and the bit line; a word line driving unit for selectively activating the word line perpendicular electrodes; a sense amplifier unit for sensing cell data applied to the bit line; a data bus for transmitting read data sensed in the sense amplifier unit and write data to be transmitted to the sense amplifier unit; and a main amplifier unit for amplifying the read data applied from the data bus and outputting-the read data to the data buffer, wherein the ferroelectric capacitor includes the word line perpendicular electrode as a first electrode of said both electrodes and a storage perpendicular electrode as a second electrode of said both electrodes, the storage perpendicular electrode being separated a predetermined interval from the word line perpendicular electrode to have a column in the word line perpendicular electrode, and wherein a ferroelectric material is filled in a space where the first electrode is separated from the second electrode to form the ferroelectric layer.