Patent ID: 6062952
Filing Date: 2000-05-16
Classification: B24B,C09G,C09K,H01L

Abstract:
A process of planarizing comprising:providing a polishing surface;providing a polishing slurry comprised of a plurality of abrasive particles, the plurality of abrasive particles having a mean diameter in a range from about 12 nm to about 50 nm;providing a semiconductor structure having a surface composed of a material selected from a group consisting of a dielectric, silicon dioxide, tungsten, polysilicon, aluminum, copper, and Si.sub.3 N.sub.4 ;moving the polishing surface against the surface of the semiconductor structure in the polishing slurry, wherein there is a first material removal rate of material from the surface of the semiconductor structure equal to X, and wherein the surface of the semiconductor structure is non-planar;continuing to move the polishing surface against the surface of the semiconductor structure in the polishing slurry until there is a second material removal rate of material from the surface of the semiconductor structure not greater than X/4 and said surface of the semiconductor structure is planarized.