Patent ID: 6087264
Filing Date: 2000-07-11
Classification: H01L

Abstract:
A method for forming a gate structure on a semiconductor substrate, said method comprising the steps of:forming a layer of a gate material on the semiconductor substrate wherein said step of forming said layer of said gate material comprises forming a silicide layer;forming a patterned mask layer on said layer of said gate material opposite the substrate; andetching said layer of said gate material including said silicide layer with an etching gas including a mixture of chlorine gas (Cl.sub.2) and oxygen gas (O.sub.2) using said patterned mask layer as an etching mask so that said silicide layer is etched with said etching gas including said mixture of chlorine gas (Cl.sub.2) and oxygen gas (O.sub.2) wherein a temperature of the semiconductor substrate is maintained to be in the range of -50.degree. C. to 0.degree. C. and a bias power is applied in the range of 200 W to 250 W and wherein the relation of the temperature of the semiconductor substrate and the bias power is provided such that the bias power is increased as the temperature of the semiconductor substrate decreases.