Patent ID: 7934050
Filing Date: 2011-04-26
Classification: G06F

Abstract:
1. A microcomputer comprising: first rewritable nonvolatile memory that stores an user program, the first rewritable nonvolatile memory divided into blocks having a first predetermined size, the blocks of the first rewritable nonvolatile memory being written to in accordance with a minimum write unit having a second predetermined size, a first area of a first block of the first rewritable nonvolatile memory allocated for storing first data associated with a predetermined total rewrite completion code, a next area of the first block for storing a first flag to enable or disable a partial rewrite of the first rewritable nonvolatile memory, a beginning position and an end position of the partial rewrite area in a second block of the first rewritable nonvolatile memory, the combination of the first area and the next area having a size equal to the minimum write unit, and a first area of the second block for storing second data associated with a predetermined partial rewrite completion code; second memory that stores a rewrite program for causing one of a total rewrite of the first rewritable nonvolatile memory and the partial rewrite of the first rewritable nonvolatile memory to be performed and a determination program for determining whether the one of the total rewrite and the partial rewrite of the first rewritable nonvolatile memory should be performed; and a CPU that reads and executes one or more of the user program, the rewrite program and the determination program, wherein the CPU executes the determination program having instructions of: wherein the rewrite program for performing the total rewrite has instructions of: wherein the determination program further has instructions of: wherein the rewrite program for performing the partial rewrite has instructions of: