Patent ID: 6038655
Filing Date: 2000-03-14
Classification: G06F,H03K

Abstract:
A micro controller capable of indirect addressing comprising:a data bus;a memory having at least one register;a bank select circuit coupled to said memory so as to directly couple a given one of said at least one registers to said data bus such that the contents are directly placed on said bus;wherein the contents of a selected register is provided directly to said data bus, as an address for the completion of an instruction and wherein from the data bus to the selected one of said at least one register, is a read only path to the data bus from the register and wherein said selected at least one register has a fixed address and further wherein the contents of said at least one register directly provides the address for a byte of data which is the address for an instruction to be executed by said micro controller, such that the providing of the address occurs such that the full instruction can be completed within one clock cycle of said micro controller.