Patent ID: 6504876
Filing Date: 2003-01-07
Classification: G06F,H03K

Abstract:
A pulse signal generating apparatus comprising:a control circuit which generates a trigger signal to trigger a transition of a signal level; a shift register having n bits to which level data to define a signal level is set and in which said level data is serially shifted in response to the trigger signal from said control circuit to generate a pulse signal, wherein the pulse signal is generated based on data shifted out from said shift register; a counter which increments a content of said counter according to said trigger signal from said control circuit to generate an interruption signal every time the content reaches a predetermined value, said predetermined value being n; and a processor which sets said level data in said shift register in response to the interruption signal from said counter, wherein said trigger signal is used as a shift clock for said shift register and as a count clock for said counter, and wherein said predetermined value n is an integer greater than or equal to 2.