Patent ID: 6026028
Filing Date: 2000-02-15
Classification: H01L

Abstract:
A flash electrical erasable programmable read only memory structure that utilizes hot carrier injection for programming and negative gate voltage for channel erasing, comprising:a P-type substrate;an N-well located inside the P-type substrate;a P-well located inside the N-well such that the N-well isolates the P-well from the P-type substrate;a pair of source/drain regions located inside the P-well;a floating gate located above the P-well lying between the pair of source/drain regions; anda control gate located above the floating gate;wherein a first positive voltage is applied to the N-well/P-well, a first negative voltage is applied to the control gate and the pair of source/drain regions are at floating state which induces a Fowler-Nordheim tunneling effect between the floating gate and the P-well to erase the flash electrical erasable programmable read only memory.