Patent ID: 6998873
Filing Date: 2006-02-14
Classification: G11C,H03K

Abstract:
1. A data input/output buffer comprising: a PMOS transistor driven according to the data signal which is directly inputted to the PMOS transistor from a peripheral circuit and connected to a power supply voltage terminal; a low voltage-driven NMOS transistor driven according to the data signal which is directly inputted to the low voltage-driven NMOS transistor from the peripheral circuit and connected to the PMOS transistor, wherein the low voltage-driven NMOS transistor having a threshold voltage of 0V; a NMOS transistor connected between the low voltage-driven NMOS transistor and a ground voltage terminal, wherein the NMOS transistor is turned on according to an output enable signal; and a latch unit for inverting and restoring a signal received via the PMOS transistor or the low voltage-driven NMOS transistor.