Patent ID: 8816621
Filing Date: 2014-08-26
Classification: H02P,H03K

Abstract:
1. A PWM (Pulse Width Modulation) output apparatus comprising: a calculating circuit configured to calculate an output width of a PWM output signal of a first signal and a second signal, which have phases different from each other, based on a command value of a PWM output; a comparing circuit configured to compare the output width and a reference period which is set longer than a predetermined dead time period; a set/clear signal generating circuit configured to output a clear signal when the output width is shorter than the reference period, and output a set signal when the output width is longer than the reference period; a PWM output signal generating circuit configured to output the PWM output signal to a dead time inserting block as a corrected PWM output signal, when said set/clear signal generating circuit outputs the set signal, and carry out a correction of setting the first signal of the PWM output signal to be inactive to output to said dead time inserting block as the corrected PWM output signal, when said set/clear circuit outputs the clear signal; and said dead time inserting block configured to correct the corrected PWM output signal such that the second signal is inactivated during the dead time period after the first signal is changed from an active state to an inactive state, to output as a corrected command value.