Patent ID: 6762460
Filing Date: 2004-07-13
Classification: H01L

Abstract:
A protection circuit comprising:a power supply terminal supplied with a power supply potential; a reference terminal supplied with a reference potential; a first p-channel MOS transistor having a first gate, a first source, a first drain and a first back gate, said first gate, said first source and said first back gate being connected to said power supply terminal; a second p-channel MOS transistor having a second gate, a second source, a second drain and said first back gate, said second source of said second p-channel MOS transistor being connected to said first drain of said first p-channel MOS transistor, said second gate and said second drain of said second p-channel MOS transistor being connected to said reference terminal; a first n-channel MOS transistor having a third gate, a third source, a third drain and a second back gate, said third gate, said third source and said second back gate of said first n-channel MOS transistor being connected to said reference terminal; and a second n-channel MOS transistor having a fourth gate, a fourth source, a fourth drain and said second back gate, said fourth source of said second n-channel MOS transistor being connected to said third drain of said first n-channel MOS transistor, said fourth gate and said fourth drain of said second n-channel MOS transistor being connected to said power supply terminal.