Patent ID: 7659844
Filing Date: 2010-02-09
Classification: H03M

Abstract:
1. An analog-to-digital converter (ADC), comprising: an input module for selectively outputting an input voltage and a reference voltage; a first P-type metal oxide semiconductor (PMOS) transistor having a first terminal, a second terminal, and a gate terminal, wherein the first terminal of the first PMOS transistor is coupled to a first bias, and the gate terminal of the first PMOS transistor is selectively coupled to one of the input voltage and the reference voltage; a first N-type metal oxide semiconductor (NMOS) transistor having a first terminal, a second terminal, and a gate terminal, wherein the second terminal of the first NMOS transistor is coupled to a second bias, and the first terminal and the gate terminal of the first NMOS transistor is coupled to the second terminal and the gate terminal of the first PMOS transistor, respectively; a first switch unit, disposed between the second terminal and the gate terminal of the first PMOS transistor, for receiving a first control signal; and an output module coupled to the first terminal of the first NMOS transistor, counting a time that the input voltage is greater than the reference voltage, feeding back a second control signal to the input module, and generating a digital signal.