Patent ID: 7763954
Filing Date: 2010-07-27
Classification: H01L

Abstract:
1. A semiconductor structure, comprising: a substrate having a metal wiring level within the substrate; a capping layer on and above a top surface of the substrate; an insulative layer on and above a top surface of the capping layer; an inductor comprising a first portion in and above the insulative layer and a second portion in and above the insulative layer; and a wire bond pad within the insulative layer, wherein the first portion of the inductor has a height in a first direction greater than a height of the wire bond pad in the first direction, wherein the first direction is perpendicularly directed from the top surface of substrate toward the insulative layer, wherein a top surface of the first part of the first portion of the inductor and a top surface of the first part of the second portion of the inductor are coplanar.