Patent ID: 6465318
Filing Date: 2002-10-15
Classification: H01L

Abstract:
A procedure for the manufacture of a bi-polar transistor by means of differential epitaxy, during which structured zones consisting of a collector zone and surrounding insulation zones are produced on a monocrystal substrate layer, and a monocrystal series of layers is deposited over the collector zone, characterized in that, during the deposition by setting up suitable deposition conditions the amorphous or polycrystal layer is deposited on the insulator zone in greater thickness than an epitaxial layer in the active transistor zone, where the differential epitaxy for the deposition of the monocrystal series of layers in the emitter zone and of a polycrystal or amorphous series of layers on the insulator zone begins with the creation of a part of a buffer layer on the insulator zone at a very low temperature, and further deposition of the buffer layer continues at a higher temperature.