Patent ID: 6696731
Filing Date: 2004-02-24
Classification: H01L

Abstract:
A semiconductor device formed in a semiconductor substrate for protecting against electrostatic discharge comprising:a first region of a first conductivity type formed at a top surface of said substrate and having a first dopant concentration, said first region being coupled to an input pad of an integrated circuit; a first well of a second conductivity type formed in said substrate and positioned adjacent and lateral to said first region; a second region of said second conductivity type formed in said first well and having a dopant concentration greater than a dopant concentration of said first well; a third region of said first conductivity type formed in said second region and being connected to a reference voltage, said third region having a dopant concentration greater than said dopant concentration of said second region; and a fourth region of said second conductivity type formed in said second region and being connected to said reference voltage, said fourth region having a dopant concentration greater than said dopant concentration of said second region; wherein said first region and said first well forms the p-n junction of a trigger diode, and said first region forms a collector region, said first well and said second region form a base and said third region forms an emitter region of an NPN transistor.