Patent ID: 6297136
Filing Date: 2001-10-02
Classification: H01L

Abstract:
A method for fabricating an embedded semiconductor device, comprising the steps of:forming a plurality of device isolation regions and a plurality of active regions on a semiconductor substrate which is divided into a first region for manufacturing a semiconductor device having a predetermined function and a second region for fabricating a semiconductor device having a another predetermined function;forming a gate insulation film, a first conductive film pattern, and a protection film pattern on a predetermined portion in the active regions of the first and second regions;forming a first side wall spacer on the side surfaces of the first conductive film pattern and the protection film pattern of the first and second regions;forming a source/drain near the surface of the semiconductor substrate at both sides of the first side wall spacer of the first region and forming a source/drain near the surface of the semiconductor substrate at both sides of the first side wall spacer of the second region;after forming the first side wall spacer, forming an insulation film over the semiconductor substrate;etching back the insulation film so as to leave the insulation film on the source/drain of the first region, form a second sidewall spacer laterally outward of the first sidewall spacer of the second region, and expose the protection film;removing the exposed protection film pattern; andforming a second conductive film pattern on the upper surface of the first conductive film pattern of the first and second regions and the upper surface of the source/drain formed in the second region.