Patent ID: 8580641
Filing Date: 2013-11-12
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, the method comprising: forming a first dummy gate on a substrate; performing a doping process to the substrate, thereby forming a source and a drain at sides of the first dummy gate; performing a first high temperature annealing to activate the source and drain; forming an inter-layer dielectric (ILD) material on the substrate; removing the first dummy gate to create an ILD trench; forming a first barrier layer within the ILD trench; forming a first high-k dielectric layer within the ILD trench; forming a first dummy cap portion within the ILD trench over the first high-k dielectric layer; performing a second high-temperature annealing to reduce defects in the first high-k dielectric layer; thereafter, replacing the first dummy cap portion with a first metal gate electrode; and forming a second barrier layer and a second metal gate electrode in the ILD trench, the first metal gate electrode and second metal gate electrode being physically and electrically separated from each other by the first barrier layer and second barrier layer.