Patent ID: 7488664
Filing Date: 2009-02-10
Classification: H01L

Abstract:
1. A method for forming a capacitor structure in a semiconductor device, the method comprising: forming a first patterned photoresist over an insulation material such that openings in the first photoresist align to a pair of underlying conductors; etching into the insulation material to form a pair of openings therein, separated by a pillar of insulation, while exposing the pair of underlying conductors; forming a conductive material on the surface of the insulation material, along sidewalls of the pair of openings, and on the surface of the pillar, the conductive material leaving a cavity in each opening; removing the conductive material from the surface of the insulation material and top of the pillar: forming an etch stop that covers the insulation material but exposes the pair of openings and the pillar; filling the cavity in each opening with resist material; forming a second patterned photoresist that covers the etch stop and exposes a majority of each cavity and the pillar; removing the resist material residing in each of the cavities so as to expose the conductive material residing therein; reducing the height of the pillar to be lower than the surface of the insulation material; forming a capacitor dielectric lining the pair of electrically separated capacitor electrodes; and forming a capacitor electrode laying on the capacitor dielectric lining, the capacitor electrode being common to only the pair of electrically separated capacitor electrodes.