Patent ID: 9129831
Filing Date: 2015-09-08
Classification: H01L

Abstract:
1. A method for manufacturing an integrated circuit, the method comprising: providing a semiconductor substrate having a first surface and an opposite second surface; forming a shallow trench isolation in the first surface of the semiconductor substrate; forming a gate of a switching transistor on the first surface; forming a source and a drain of the switching transistor in the semiconductor substrate; concurrently forming, on the first surface, a body electrode, a gate terminal connected to the gate and a source terminal connected to the source; forming a carrier substrate on the first surface; performing a thinning process on the second surface until a surface of the shallow trench isolation is exposed; forming on the thinned second surface a drain terminal connected to the drain; and forming on the thinned second surface a resistive memory cell having a first end connected to the drain terminal.