Patent ID: 6710438
Filing Date: 2004-03-23
Classification: H01L

Abstract:
A chip scale package carrier for electrically connecting an integrated circuit die with ground connections and bond wire signal connections to a primary circuit board, said carrier comprising:a plurality of wire bond fingers on a top side of said carrier to receive bond wires attached to respective ones of the signal connections on the die; a first plurality of solder ball pads on a bottom side of said carrier electrically coupled to said wire bond fingers on said top side; a first etched ground comprising a top layer on said top side of said carrier, said first etched ground plane surrounding said plurality of wire bond fingers and covering a die mounting area on said top side of said carrier; a second etched ground plane comprising a bottom layer on said bottom side of said carrier, said second etched ground plane covering a central area of said bottom side of said carrier, with said first plurality of solder ball pads arrayed generally around said second etched ground plane; a plurality of thermal vias electrically and thermally coupling said first and second etched ground planes; and a second plurality of solder ball pads on said bottom side of said carrier, said second plurality of solder ball pads formed within said etched second ground plane.