Patent ID: 8914272
Filing Date: 2014-12-16
Classification: G06F,Y02P

Abstract:
1. A method for visualizing sensitivity information in an integrated circuit (IC) design, the method comprising: receiving, at an application executing in a data processing system, a plurality of sensitivity information corresponding to a first component in the IC design, wherein the plurality of sensitivity information includes a first sensitivity information indicating a first variation in a first electrical characteristic of a group of components in the IC design as a result of a variation in an electrical characteristic of the first component in the IC design, wherein the plurality of sensitivity information corresponding to the first component is a multi-criteria sensitivity information corresponding to the first component, wherein the multi-criteria sensitivity information includes the first sensitivity information corresponding to the first component and a second sensitivity information corresponding to the first component, wherein the first sensitivity information of the first component corresponds to a first sensitivity criterion of the first component and the second sensitivity information of the first component corresponds to a second sensitivity criterion of the first component; receiving a set of plurality of sensitivity information for a set of components in the IC design, wherein the set of plurality of sensitivity information includes the plurality of sensitivity information corresponding to the first component and the set of components includes the first component; rendering a plurality of aspects of the first sensitivity information in visual form to form a first visualization; and presenting the first visualization on a schematic view of the IC design in an IC design tool such that the first sensitivity information is visually associated with the first component in the IC design.