Patent ID: 6666915
Filing Date: 2003-12-23
Classification: H01L

Abstract:
A process for the preparation of an epitaxial silicon wafer, the epitaxial silicon wafer comprising a front surface, a back surface, a central plane between the front and back surfaces, a front surface layer which comprises a first region of the wafer between the front surface and a distance, D, measured from the front surface and toward the central plane, and a bulk layer which comprises a second region of the wafer between the central plane and front surface layer, the process comprising:depositing an epitaxial layer onto a surface of a silicon wafer; heating the wafer to a temperature of at least about 1175Â° C. during and/or after the epitaxial deposition to form crystal lattice vacancies in the front surface and bulk layers; and cooling the heated wafer for a period of time at a rate of at least about 10Â° C./sec while (a) the temperature of the wafer is greater than about 1000Â° C., and (b) the wafer is not in contact with a susceptor and controlling the cooling rate to produce a non-uniform vacancy concentration profile in the cooled wafer in which the vacancy concentration in the front surface layer being greater than the vacancy concentration in the bulk layer, and the difference in the concentration of vacancies in the front surface and bulk layers being such that a thermal treatment at a temperature in excess of 700Â° C. is capable of forming the front surface layer into a denuded zone and forming oxygen clusters or precipitates in the bulk layer with the concentration of the oxygen clusters or precipitates in the wafer being primarily dependent upon the concentration of vacancies, wherein D is from about 10 to about 100 micrometers, wherein the epitaxial deposition, heating, and cooling are conducted in the same reactor chamber.