Patent ID: 7395489
Filing Date: 2008-07-01
Classification: G06F

Abstract:
1. A memory control device using a tag, comprising: a writing unit writing information to a tag memory module; a reading unit reading the information from said tag memory module; a matching unit judging whether the information from said tag memory module is coincident to a tag inputted from a control unit of said memory control device; an error detecting unit executing a detection of an error in the information in parallel with the judging operation by said matching unit; an error correcting unit correcting the error in the information containing the error detected; a control unit controlling a transfer and a receipt of the information to and from an external device and stopping, when the error is detected, an output of the information to said external device; and an inverting unit inverting a bit pattern of the error-corrected information, wherein said writing unit writes to said tag memory module the error-corrected information with its bit pattern inverted after the error is corrected and sets an invert flag of the error-corrected information to indicate that the bit pattern is inverted; and wherein the inverting unit inverts a bit pattern of the information read from said tag memory module in response to an invert flag indicating that the bit pattern of the read information is inverted.