Patent ID: 7562192
Filing Date: 2009-07-14
Classification: G06F

Abstract:
1. A method for selectively retiring a prefetched cache line from a prefetch buffer to a cache in a microprocessor, the cache comprising an array of storage elements for storing cache lines, the method comprising: prefetching the prefetched cache line into the prefetch buffer in response to a miss in the cache; receiving a request to prefetch a new cache line into the prefetch buffer; determining whether a replacement candidate line in one of the storage elements in the cache is invalid; replacing said replacement candidate line in the cache with the prefetched cache line if said replacement candidate line is invalid; counting a number of accesses to the replacement candidate line in the cache, after said prefetching the prefetched cache line into the prefetch buffer; determining whether the replacement candidate line in the cache memory is valid, in response to said receiving a request to prefetch a new cache line into the prefetch buffer; and if the replacement candidate line in the cache memory is valid, selectively replacing the replacement candidate line in the one of the storage elements with the prefetched cache line from the prefetch buffer based on the number of accesses to the replacement candidate line.