Patent ID: 7390738
Filing Date: 2008-06-24
Classification: G03F,H01L,Y10S

Abstract:
1. A semiconductor device comprising: a gate electrode formed over a semiconductor substrate; first impurity region formed on one side of said gate electrode; a second impurity region formed on the opposite side of said gate electrode; an interconnection layer formed over said first impurity region; a first dielectric anti-reflective coating layer formed of a material selected from the group consisting of silicon oxides, silicon nitrides, and silicon oxy-nitrides formed over substantially the entire upper surface of said semiconductor substrate; an interlayer insulation film formed over said first dielectric anti-reflective coating layer, wherein a contact hole is provided through said first anti-reflective coating layer and said interlayer insulation film exposing said second impurity region; and a second dielectric anti-reflective coating layer formed substantially on the entire upper surface of said interlayer insulation film.