Patent ID: 8343826
Filing Date: 2013-01-01
Classification: H01L

Abstract:
1. A method, comprising: forming a threshold voltage adjusting semiconductor alloy in a semiconductor region of a transistor; forming a gate electrode structure on said threshold voltage adjusting semiconductor alloy, said gate electrode structure comprising a high-k gate dielectric material, a metal-containing electrode material and a semiconductor electrode material, wherein forming said gate electrode structure comprises providing a work function adjusting species in at least one of said high-k dielectric material and said metal-containing electrode material prior to forming said semiconductor electrode material; forming at least one cavity in said semiconductor region in the presence of said gate electrode structure; reducing a volume of at least said semiconductor electrode material by performing an annealing process; and inducing strain in a channel region of said transistor by filling at least a portion of said at least one cavity with a strain-inducing semiconductor alloy.