Patent ID: 8595590
Filing Date: 2013-11-26
Classification: H03M,H04L

Abstract:
1. A system for decoding check-irregular non-systematic irregular repeat accumulate codes, the system comprising: a. a demapper for soft-demodulating a received noisy symbol sequence to produce Log-Likelihood Ratios of a first set of coded bits from received distorted channel symbols and that outputs said Log-Likelihood Ratios to an accumulator decoder; b. a first check node processor that: c. wherein the second check node processor receives from an interleaver interleaved extrinsic information corresponding to the third set of code bits and: d. wherein the accumulator decoder produces outgoing messages corresponding to the second set of coded bits obtained from: e. a bit decoder that processes deinterleaved messages corresponding to the third set of coded bits obtained from a deinterleaver to produce extrinsic information for the third set of coded bits and information bits soft outputs, said bit decoder comprising a repetition bit decoder; f. wherein the interleaver interleaves extrinsic information for the third set of coded bits produced by the bit decoder and its output is supplied to said second check node processor; and g. wherein the deinterleaver deinterleaves the outgoing messages corresponding to the third set of coded bits obtained from said first check node processor and passes said deinterleaved messages to the bit decoder.