Patent ID: 8368465
Filing Date: 2013-02-05
Classification: H03F

Abstract:
1. A power amplification apparatus comprising: a first amplifier turned on at a preset low input power; and a second amplifier connected in parallel with the first amplifier and turned off at a low input power due to a relatively low bias current, wherein output capacitors of the first amplifier and the second amplifier are compensated for by inductors or microstrip lines of dc power supply paths, wherein a first output matching circuit coupled to the first amplifier includes a λ4 transformer, wherein a second output matching circuit coupled to the second amplifier has the phase of 0°, wherein a first input matching circuit coupled to the first amplifier and a second input matching circuit coupled to the second amplifier each include a delay compensation circuit, and wherein the first output matching circuit of the first amplifier, the second output matching circuit of the second amplifier, and a third output matching circuit have the same impedance transformation rates.