Patent ID: 6631464
Filing Date: 2003-10-07
Classification: G06F

Abstract:
An instruction fetch control system for performing a prefetch of an instruction having a decode cycle in a pipeline system and a fetch of a branch target instruction of a branch instruction, comprising:a first branch judgement circuit judging whether a branch condition exists indicating either that a non-condition branch is established or a branch is predictable in a preliminary stage prior to a branch judgement stage in said pipeline system, for every branch instruction executed by said pipeline system; and a start circuit starting a prefetch of instructions following each branch target instruction without waiting for the branch judgement stage of the branch instruction in said pipeline system, when said first branch judgement circuit judges that the branch condition exists, and said first branch judgement circuit comprising: a decoding circuit decoding an instruction code for determining whether a condition branch or non-condition branch exists, a check circuit determining that a plurality of instructions continuing from an immediately prior instruction of the branch instruction do not update a condition code, a branch instruction selection circuit selecting a branch instruction which can be judged as the branch prior to the branch judgement stage, based on a combination of the instruction code and the condition code, and a judging circuit judging that the branch instruction is predictable where said decoding circuit decodes the branch condition, said judging circuit judges that the condition code is not updated in a plurality of cycles continued from an immediately preceding cycle, and said branch instruction selection circuit selects the instruction which becomes the branch instruction.