Patent ID: 6730963
Filing Date: 2004-05-04
Classification: H01L

Abstract:
A semiconductor device including a plurality of transistor cells with each cell comprising:a drain region of a first conductivity type, having a first major surface; a body region of a second conductivity type being located in the drain region and extending into the drain region from the first major surface; a source region of the first conductivity type including a first and second prong, the first and second prongs being spaced apart from each other and each prong having an attached region and a first and second end and a connector region connecting the attached region of the first prong to the attached region of the second prong to create a first and second notch between the first and second prongs, the first and second notches being spaced apart from each other by the connector region, the body region being accessible through the first and second notches; an oxide layer covering the source and body regions having a contact opening position over the source region between the two notches exposing a contact area including the connector region of the source region and at least a portion of the accessible body region through at least the first notch; a source conductor positioned on the oxide layer and passing through the contact opening to connect with the body region and the source region between the first and second prongs without extending to either of the first and second ends of the first and second prongs; and; a gate layer positioned in the oxide layer over a portion of the body region and also over at least one edge of the source region that is furthest from the contact area of each member of the plurality of transistor cell and wherein the first and second prongs of each cell have either a first orientation or a second orientation, and with each cell having prongs with the first orientation being located adjacent to a cell having prongs with the second orientation.