Patent ID: 6790692
Filing Date: 2004-09-14
Classification: H01L

Abstract:
A semiconductor device fabrication method comprising the steps of:(a) forming a template having openings that are located to correspond to a pattern in which a plurality of semiconductor elements in the form of chips are to be arranged. (b) forming a plurality of substrate electrodes for making the associated semiconductor elements electrically conductive, on parts of the principal surface of a substrate where the semiconductor elements are to be arranged, (c) holding the template on the principal surface of the substrate on which the semiconductor elements are to be arranged, (d) spreading the semiconductor elements into a liquid and pouring the semiconductor-element-spread liquid over the substrate on which the template is held, thereby allowing the semiconductor elements to be disposed into the respective openings in the template in a self-aligned manner, and (e) securing the semiconductor elements to the associated substrate electrodes, and then removing the template from the substrate.