Patent ID: 6239729
Filing Date: 2001-05-29
Classification: G09G

Abstract:
An image processing apparatus, comprising:a first dot dock generation circuit that generates a first dot clock signal, which is synchronous with a first synchronizing signal of a first analog image signal and has a frequency suitable for sampling the first analog image signal;an A-D converter that quantizes the first analog image signal to convert the first analog image signal into digital image signals, and sequentially outputs the digital image signals for respective pixels sampled in synchronism with the first dot dock signal,a series-to-parallel converter having Mw signal hold circuits that sequentially hold the digital image signals with respect to Mw consecutive pixels, the series-to-parallel converter outputting in parallel the digital image signals with respect to Nw consecutive pixels, where Mw is an integer of not less than 2 and Nw is an integer of not less than 1 but not greater than Mw, Nw representing a number of signal hold circuits that are actually used;a first sampling dock generation circuit that generates a first sampling clock signal, which is synchronous with the first synchronizing signal and has a frequency that is 1/Nw of the frequency of the first dot clock signal;a second sampling dock generation circuit that generates Nw second sampling dock signals where Nw corresponds to the number of the signal hold circuits used, the Nw second sampling dock signals having the frequency of the first sampling dock signal and different phases that are mutually shifted by one period of the first dot dock signal anda write control signal regulator that regulates, according to the number Nw of signal hold circuits used, the operation of the first sampling clock generation circuit and the second sampling dock generation circuit and supplies the Nw second sampling clock signs to the Nw signal hold circuits, so as to cause the digital image signals with respect to the Nw consecutive pixels to be output from the series-to-parallel converter as one set of digital image signals.