Patent ID: 6192496
Filing Date: 2001-02-20
Classification: G01R

Abstract:
An apparatus for testing component tolerance of a device for testing integrated circuits, the device having a plurality of test connectors disposed at a test head, each test connector having electrical conductors carrying electrical signals for a test channel, wherein each test channel corresponds to a circuit board that includes at least one driver and one receiver, the system comprising:shorting means for establishing a low impedance electrical connection between electrical conductors of a first and second test connector, such that a first driver from a first circuit board is electrically connected across a low impedance path to a first receiver on a second circuit board;a controller configured to control the first driver to output an electrical signal at a predetermined time;evaluating means designed to detect the signal received at the first receiver; andtiming means configured to time a signal delay from the time that the first driver outputs an electrical signal to the time that the evaluating means detects the received signal.