Patent ID: 8710497
Filing Date: 2014-04-29
Classification: H01L

Abstract:
1. An array substrate, comprising: a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode, the gate insulating layer including a first insulator and a second insulator on the first insulator, wherein the first insulator includes an aluminum oxide material and has a first thickness, and the second insulator includes a hafnium oxide material and has a second thickness; an oxide semiconductor layer on the gate insulating layer over the gate electrode; a source electrode and a drain electrode contacting the oxide semiconductor layer, the source electrode and the drain electrode spaced apart from each other; a passivation layer on the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole, wherein the aluminum oxide material includes a phosphate (PO