Patent ID: 8674435
Filing Date: 2014-03-18
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device, comprising: a first dopant region in a semiconductor substrate, the first dopant region extending in a first direction; an isolation region on the semiconductor substrate, the isolation region surrounding the first dopant region; a plurality of first gate portions, the plurality of first gate portions extending in the first direction and spaced apart from each other in a second direction perpendicular to the first direction; and a plurality of second dopant regions arranged along at least the parallel portion of the plurality of first gate portions, the plurality of second dopant regions being spaced apart from each other, and the plurality of first gate portions being between the first dopant region and a respective second dopant region, each of the plurality of second dopant regions being longer in the first direction than the first dopant region, wherein: the first gate portions include a plurality of linear regions, the second dopant regions being arranged along two or more of the linear regions, and the first gate portions have a substantially rectangular shape, the second dopant regions being arranged along two or more sides of the substantially rectangular shape.