Patent ID: 9164884
Filing Date: 2015-10-20
Classification: G06F,G09G

Abstract:
1. A display controller comprising: a processing unit configured to process input data; a memory unit configured to store a first data of the processed input data before a transition signal is enabled; a memory management unit configured to map consecutive virtual addresses of an image displayed on a display panel to physical addresses of the first data stored in the memory unit; and a control unit configured to control the processing unit and the memory management unit in response to a control signal and configured to provide a range of first virtual addresses among the consecutive virtual addresses designated by the transition signal in response to enablement of the transition signal such that the image is displayed on the display panel, wherein the first virtual addresses correspond to second data included in at least two consecutive pages of the first data wherein the memory management unit comprises an address mapper configured to map the consecutive virtual addresses to the physical addresses, wherein the memory unit comprises at least first through fourth frame buffers separate from each other, and wherein at least one of the first through fourth frame buffers has non-consecutive physical addresses corresponding to one of consecutive virtual addresses.