Patent ID: 8791845
Filing Date: 2014-07-29
Classification: H03M

Abstract:
1. A pipeline ADC (analog-to-digital converter) including a pipeline ADC stage, comprising: (a) a residue amplifier having a first input coupled to receive a first residue signal of a previous ADC stage; (b) a first sub-ADC having an input coupled to receive the first residue signal for resolving a predetermined number of bits and producing the predetermined number of bits and a redundancy bit in response to the first residue signal; (c) a first DAC (digital-to-analog converter) for converting the predetermined number of bits and the redundancy bit to an analog signal applied to a second input of the residue amplifier, the DAC having a level-shifting input for receiving a feedback signal, the residue amplifier amplifying a difference between the residue signal and the analog signal to generate a second residue signal; and (d) level-detect circuitry receiving the second residue signal and generating the first feedback signal if the second residue signal is outside of a predetermined voltage range so as to cause the first DAC to shift the second residue signal back within the predetermined voltage range by the end of the amplifying.