Patent ID: 7473604
Filing Date: 2009-01-06
Classification: H01L

Abstract:
1. A method for manufacturing a power semiconductor device comprising the steps of: forming a mask layer over a surface of a semiconductor body of a first conductivity; patterning said mask with a plurality of openings each opening extending to and exposing the surface of said semiconductor body at the bottom thereof; defining trenches in said semiconductor body by etching said semiconductor body through said openings, each trench including sidewalls and a bottom and extending to a first depth; forming an insulation layer on said sidewalls of said trenches; forming a gate electrode in each of said trenches, each gate electrode including a free end and extending above the surface of said semiconductor body into a respective opening in said mask layer; removing said mask layer, whereby each gate electrode becomes proud and extends above the surface of said semiconductor body; and forming a plurality of source regions of said first conductivity in the surface of said semiconductor body such that each of said plurality of source regions extends to a second depth of said semiconductor body, wherein said second depth is approximately equal to or less than a thickness of said insulation layer.