Patent ID: 6466063
Filing Date: 2002-10-15
Classification: H03K

Abstract:
A CMOS push-pull output buffer having an input, and having an output for driving a load, comprising:a pull up section having a first controllable current driver for pulling up the voltage of said buffer output; a pull down section having a second controllable current driver for pulling down the voltage of said buffer output; and first and second slew rate control circuits respectively associated with said first and second current drivers for controlling the rate at which the associated current driver changes the voltage at said buffer output, each of said slew rate control circuits including: (a) first voltage supply circuit for supplying a first, intermediate level of control voltage to the associated current driver, (b) a second voltage supply circuit for supplying a second level of control voltage to said associated current driver higher than said intermediate level, (c) a delay circuit for delaying the delivery of said second level of voltage to said associated current driver, and (d) a logic circuit for controlling said first and second voltage supply circuits.