Patent ID: 6525379
Filing Date: 2003-02-25
Classification: H01L

Abstract:
A memory device comprising:an underlayer portion made of an insulator; a first control electrode provided on a surface of the underlayer portion; a conduction region made of a semiconductor, provided so as to correspond to the first control electrode; a second control electrode provided in a region opposite to a region in which the first control electrode is provided, with the conduction region between the first and second control electrodes; a first impurity region provided adjacent to the conduction region; a second impurity region provided apart from the first impurity region and adjacent to the conduction region; a storage region provided in either a region between the first control electrode and the conduction region or a region between the second control electrode and the conduction region, the storage region for storing an electric charge transferring from the conduction region; a tunnel insulating film provided in a region between the storage region and the conduction region; a first control insulating film provided between the first control electrode and the conduction region; and a second control insulating film provided between the second control electrode and the conduction region.