Patent ID: 9143090
Filing Date: 2015-09-22
Classification: G06F,G09G,H03F

Abstract:
1. An output voltage stabilization circuit of a display device driving circuit, comprising: a power off pulse generator configured to receive positive source voltages and negative source voltages as a high source voltage, receive a low source voltage having a smaller absolute value than the high source voltage, and generate a positive control signal and a negative control signal; a level shifter configured to convert low-voltage data signals into high-voltage data signals; and an output driver configured to output an output signal having the positive source voltage, the negative source voltage, or a ground voltage in response to the positive control signal, the negative control signal, and the high-voltage data signals, wherein the output voltage stabilization circuit stabilizes a voltage of the output signal regardless of a power off sequence of the low source voltage, the positive source voltage, and the negative source voltage, the output driver comprises: an output driver driving unit configured to output the output signal in response to the high-voltage data signals, a positive voltage switch configured to supply, in response to the positive control signal, the positive source voltage to the output driver driving unit, and a negative voltage switch configured to supply, in response to the negative control signal, the negative source voltage to the output driver driving unit, wherein the output driver driving unit outputs the positive source voltage or the negative source voltage as the output signal.