Patent ID: 8547267
Filing Date: 2013-10-01
Classification: G01K,G05B,H03M

Abstract:
1. A hysteretic digital filter for filtering artifacts from an output of a sigma-delta analog-to-digital converter (ADC), comprising: a first multi-bit flip-flop having an input for receiving a series of multi-bit sigma-delta ADC codes, a clock input for receiving a clock signal and an output, the first multi-bit flip flop latching the multi-bit sigma-delta ADC codes to its output under control of the clock signal; a second multi-bit flip-flop having an input coupled to the output of the first multi-bit flip-flop, an output for providing an output code of the digital filter, and an input for receiving a latch control signal, the second multi-bit flip-flop latching its input to its output under control of the latch control signal; and a control circuit for providing the latch control signal, wherein the control circuit is configured to selectively provide the latch control signal to trigger latching by the second multi-bit flip-flop dependent on a running comparison of the output code of the digital filter and the value of individual ones of the multi-bit sigma-delta ADC codes from the series of multi-bit sigma-delta ADC codes.