Patent ID: 8785320
Filing Date: 2014-07-22
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure comprising: providing a structure including at least one semiconductor device located on a surface of a semiconductor substrate, said at least one semiconductor device including at least a material stack having an upper surface that is comprised of a metal semiconductor alloy; forming a single layer of dielectric material on said surface of said semiconductor substrate, said single layer of dielectric material including a contact opening that extends to the upper surface of said material stack, said contact opening having an aspect ratio of greater than 3:1; and partially filling said contact opening in said single layer of dielectric material with at least a metal-containing material that is resistant to corrosion and oxidation and is lower in the Galvanic Series than said metal semiconductor alloy utilizing a selective deposition process selected from chemical vapor deposition, plasma enhanced chemical vapor deposition, atomic layer deposition, and plasma enhanced atomic layer deposition, said metal-containing material is present within a lower region of said contact opening and is in direct contact with said upper surface of said material stack, wherein said metal-containing material has a top surface located beneath a top surface of said single layer of dielectric material.