Patent ID: 8749709
Filing Date: 2014-06-10
Classification: H04N

Abstract:
1. A video receiver configured for receiving a digital video signal comprising a vertical synchronization signal, a horizontal synchronization signal and a data enable signal and comprising: (a) a detection circuit configured for: (b) a vertical synchronization correction circuit configured for correcting the vertical synchronization signal if the magnitude of the difference between the expected total vertical scan lines and the measured total vertical scan lines is within the first range; (c) a horizontal synchronization correction circuit configured for correcting the horizontal synchronization signal if the magnitude of the difference between the expected total horizontal pixels and the measured total horizontal pixels is within the second range; and (d) a data enable correction circuit configured for correcting the data enable signal if the magnitude of the difference between the expected active vertical scan lines and the measured active vertical scan lines is within the third range or the magnitude of the difference between the expected active horizontal pixels and the measured active horizontal pixels is within the fourth range.