Patent ID: 7755937
Filing Date: 2010-07-13
Classification: G11C

Abstract:
1. A semiconductor device, comprising: a memory cell including a thyristor element with a gate having a pnpn structure formed on a semiconductor substrate and having first and second terminals, and an access transistor formed on said semiconductor substrate and having first and second terminals connected to a bit line and said first terminal of said thyristor element, respectively; and a control section including a load current element whose load current flows, upon reading out operation, to the second terminal side of said thyristor element and configured to carry out access control to said memory cell; said control section converting, upon reading out operation, current flowing through said memory cell into a voltage in a state wherein said bit line is fixed to a first voltage and the second terminal side of said thyristor element is set to a second voltage higher than the first voltage to carry out decision of read out data.