Patent ID: 8402248
Filing Date: 2013-03-19
Classification: G06F,Y02D

Abstract:
1. A method in a network element for translating a logical memory address into a physical memory address, the network element including a plurality of memory types and memory sizes, the method comprising the steps of: receiving a memory access request for a data structure with a logical memory address that includes a region identifier and an offset into the region, wherein the region identifier identifies a region that is mapped to one or more memories and is associated with a set of one or more region attributes whose values are based on one or more processing requirements provided by a software programmer and a set of one or more available memories of the network element; accessing a region mapping table entry corresponding to the region identifier in a region mapping table that identifies the set of region attributes that are associated with the region; performing the following steps using at least a portion of the set of region attributes: