Patent ID: 8952512
Filing Date: 2015-02-10
Classification: H01L

Abstract:
1. A wafer-level package structure of a light emitting diode, comprising: a die comprising a first side and a second side opposite to the first side; a first insulating layer on the first side of the die; at least two wires which are arranged on the first insulating layer and electrically isolated from each other; bumps which are arranged on the at least two wires and adapted to be electrically connected correspondingly with electrodes of a bare chip of the light emitting diode; an annular second insulating layer on the at least two wires and the first insulating layer, the annular second insulating layer surrounding an area between the bumps and there being spaces arranged between the annular second insulating layer and the bumps; a light reflecting cup on the annular second insulating layer; at least two discrete lead areas on the second side of the die; and leads in the lead areas, electrically isolated from each other and electrically connected correspondingly with the at least two wires.