Patent ID: 8482675
Filing Date: 2013-07-09
Classification: H04N

Abstract:
1. A multi-chip diversity architecture comprising: a plurality of antennas receiving input signals; a single crystal that generates an electrical signal; a plurality of receiver chips, wherein said plurality of receiver chips comprises: a plurality of crystal oscillator circuits, wherein only a first crystal oscillator circuit of said plurality of crystal oscillator circuits is directly connected to said single crystal and receives said electrical signal to generate a clock signal based on a frequency of said single crystal that is input into each of said plurality of receiver chips except said first receiver chip; a plurality of tuners that amplify said input signals; a plurality of demodulators, wherein each demodulator is directly connected to a tuner of said plurality of tuners, wherein said plurality of demodulators demodulate said input signals received from said plurality of tuners, wherein a first demodulator of said first receiver chip transmits diversity data to a second receiver chip without transmitting a reference clock signal, wherein a second demodulator of said second receiver chip transmits diversity data to a third receiver chip without transmitting a reference clock signal, and wherein a N−1 demodulator of a N−1 receiver chip transmits diversity data to a Nth receiver chip without transmitting a reference clock signal, and wherein a Nth demodulator outputs data from said architecture; and a plurality of crystal oscillator clock buffers, wherein a first crystal oscillator clock buffer of said plurality of crystal oscillator clock buffers is directly connected to said first tuner in said first receiver chip, and wherein said first crystal oscillator clock buffer receives clock signals from a first crystal oscillator circuit of said plurality of crystal oscillator circuits and transmits said clock signals to each of said plurality of tuners except said first tuner, each of said plurality of demodulators except a first demodulator of said plurality of demodulators, and each of said plurality of crystal oscillator clock buffers except said first crystal oscillator clock buffer.