Patent ID: 9014242
Filing Date: 2015-04-21
Classification: H03K,H04L

Abstract:
1. A bus communication transceiver comprising: an input node configured to receive an input signal; a transmission circuit configured to receive the input signal from the input node and generate a transmission signal; a bus connection node connected with an external single wire bus to transmit the transmission signal to the external single wire bus and to receive a reception signal from the external single wire bus; a reception circuit configured to receive the reception signal or the transmission signal from the single wire bus to generate an output signal; an output node configured to output the output signal; and a delay time measurement circuit configured to measure a delay time from a rising time of the input signal to a rising time of the output signal generated from the input signal, and to generate a delay time measurement result signal group showing the measurement results, wherein the transmission circuit comprises an output waveform adjustment circuit configured to adjust a voltage inclination in a falling waveform of the transmission signal generated from the input signal, based on the delay time measurement result signal group.