Patent ID: 6219779
Filing Date: 2001-04-17
Classification: G06F

Abstract:
A processor for decoding and executing an instruction, the processor comprising:an instruction register for storing the instruction;decoding means for decoding the stored instruction;a constant register including a storage region for storing a constant;constant storing means which, when the decoding means has decoded that the instruction includes a constant that should be stored into the constant register, stores the constant included in the instruction into the constant register if no valid constant is stored in the constant register, and, if a valid constant that was included in another instruction is already stored in the constant register, stores the constant included in the instruction into the constant register so as to retain the valid constant; andexecution means which, when the decoding means has decoded that the instruction specifies an operation which uses the constant register, reads an entire value stored in the constant register and executes the operation in the constant register.