Patent ID: 9152251
Filing Date: 2015-10-06
Classification: G06F,G09G

Abstract:
1. A scan driving circuit, comprising: a plurality of shift registers to sequentially output first scan signals to scan lines through shift register output lines during a first section of a frame period; a plurality of simultaneous switching blocks to simultaneously output second scan signals to the scan lines through simultaneous switching block output lines during a second section of the frame period, the first and second sections of the frame period being different from each other; a plurality of switching devices between the simultaneous switching block output lines and the scan lines; and a repair line across the shift register output lines and the simultaneous switching block output lines, wherein: the plurality of simultaneous switching blocks include a normal simultaneous switching block and a defective simultaneous switching block, the normal simultaneous switching block connected to a first scan line of the scan lines through a first switching device of the switching devices and a first simultaneous switching block output line of the simultaneous switching block output lines, the defective simultaneous switching block connected to a second scan line of the scan lines through a second switching device of the switching devices and a second simultaneous switching block output line of the simultaneous switching block output lines, the first simultaneous switching block output line connected to the normal simultaneous switching block is electrically connected to the second simultaneous switching block output line connected to the defective simultaneous switching block through the repair line, and the normal simultaneous switching block simultaneously supplies a corresponding second scan signal of the second scan signals to the first scan line and the second scan line.