Patent ID: 7199031
Filing Date: 2007-04-03
Classification: H01L,Y10S

Abstract:
1. A method for manufacturing a semiconductor system, comprising: forming a pn transition; forming a chip having an edge region, the chip including a first layer of a first conductivity type and a second layer of a second conductivity type opposite to that of the first conductivity type, the first layer having the edge region and a center region, the pn transition being provided between the first layer and the second layer; doping the second layer more weakly in the edge region than in the center region, wherein a boundary surface of the pn transition is non-parallel to the main chip plane at the edge region; and wherein the first layer is manufactured using patterned doping, and wherein the patterned doping is provided by pre-coating the chip with dopant, subsequently removing the coating in a sub-region of the chip, and subsequently introducing the dopant into the chip.