Patent ID: 7445968
Filing Date: 2008-11-04
Classification: H01L,H03H

Abstract:
1. A method for integrated circuit module packaging comprising steps in an order of: mounting at least one semiconductor die on a substrate; covering the at least one semiconductor die and the substrate with a dielectric layer that conforms to the shape of the at least one semiconductor die; removing the dielectric layer on one or more of the at least one semiconductor die exposing a portion of a back surface of the one or more semiconductor die; covering the dielectric layer of the at least one semiconductor die and the exposed surface of the one or more semiconductor die with a metallization layer, the metallization layer being coupled to an electrical ground wherein the at least one semiconductor die is two or more semiconductor dies and the grounded metallization layer is used for: providing an alternate thermal path to a heat sink coupled to the electrical ground for the two or more semiconductor dies within the module through ground vias in the substrate by directly coupling the heat sink and the metallization layer; and providing electromagnetic shielding and isolation between the two or more semiconductor dies in close proximity within the module.