Patent ID: 7525150
Filing Date: 2009-04-28
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a workpiece; a first isolation region and a second isolation region disposed in the workpiece, the first isolation region being proximate a first source region of the workpiece, the second isolation region being proximate a first drain region of the workpiece, the first source region and the first drain region being separated by a first channel region; a first gate over the first channel region of the workpiece with a first and a second sidewall spacer disposed on a first and a second sidewall of the first gate, respectively; a first diffusion region disposed in the first drain region of the workpiece but not in the first source region of the workpiece, the first diffusion region being laterally offset from and partially underlying the second sidewall of the first gate, the first diffusion region comprising a first depth within the workpiece; and second diffusion regions disposed in the first source region of the workpiece and in the first diffusion region in the first drain region, the second diffusion regions comprising a second depth within the workpiece, the second depth being less than the first depth, wherein the second diffusion region in the first source region abuts the first spacer and comprises a source of a first transistor, and wherein the second diffusion region in the first drain region abuts the second spacer and the second isolation region, and the first diffusion region and the second diffusion region in the first drain region comprise a drain of the first transistor.