Patent ID: 6656819
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A process for producing a semiconductor device, comprising the steps of:providing a wafer of given thickness having a surface furnished with semiconductor circuits and a back; forming grooves of a cut depth smaller than the thickness of the wafer, the grooves extending from the wafer surface; sticking a surface protective sheet onto the wafer surface; grinding the back of the wafer so that the thickness of the wafer is reduced to a thickness which is equal to or less than the cut depth of the grooves, which results in the division of the wafer into individual chips with spaces therebetween; sticking a dicing/die bond sheet onto a ground back of the wafer, the dicing/die bond sheet comprising a base and, superimposed thereon, an adhesive layer, wherein the adhesive layer contacts the ground back of the wafer; peeling the surface protective sheet from the wafer surface to thereby cause the adhesive layer of the dicing/die bond sheet to be exposed through each space between neighboring individual chips; cutting the exposed adhesive layer of the dicing/die bond sheet using a dicing blade means, whereby the adhesive layer of the dicing/die bond sheet is cut into pieces of substantially a same size and shape as the chips; detaching the individual chips having the cut adhesive layer adhering thereto from the base of the dicing/die bond sheet; and bonding the individual chips through the adhesive layer to a given substrate.