Patent ID: 6036346
Filing Date: 2000-03-14
Classification: G06F

Abstract:
A semiconductor manufacturing process simulation apparatus for simulating a manufacturing process of a semiconductor using a substrate, comprising:an ion implantation process simulating part which simulates an ion implantation process;a model generating part which generates a diffusion model in which contribution of dislocation loops is considered, said dislocation loops being formed in said substrate during said ion implantation process; anda heat treatment process simulating part which simulates a heat treatment process subsequent to said ion implantation process, said diffusion model generated by said model generating part being used for simulating diffusion of impurities in said substrate during said heat treatment process,wherein a pressure field generated by said dislocation loops in said substrate is defined in said diffusion model by a function of a distance from a layer in which said dislocation loops are formed.