Patent ID: 6553481
Filing Date: 2003-04-22
Classification: G06F

Abstract:
A storage device comprising:a wireless data transmitter; a wireless data receiver; a clock circuit for generating a plurality of clock signals having a periodicity; a computing engine coupled to an energy source, the wireless data transmitter, the wireless data receiver, the clock circuit and a set of operator controls, the computing engine comprising a volatile memory and a non-volatile memory containing a data set, the non-volatile memory further containing a set of instruction codes, wherein the computing engine is powered by the energy source and executes instructions selected from the set of instruction codes, and wherein the computing engine performs an action selected from a list consisting of receiving data from the wireless data receiver and sending data to the wireless data transmitter in response to a stimulus from a control selected from the set of operator controls; a plurality of buffers, the buffers being external to the computing engine; a reset circuit coupled to the computing engine for initializing the computing engine; and a programming circuit coupled to the computing engine for writing to the data set in response to a signal from the computing engine and according to the contents of the plurality of buffers wherein the programming circuit holds the computing engine in a reset state for a duration exceeding about eight periods of the clock signals while data is being written to the data set.