Patent ID: 7416945
Filing Date: 2008-08-26
Classification: B82Y,H01L

Abstract:
1. A method of forming a split gate memory device, the method comprising: forming a layer of select gate material over a substrate; patterning the layer of select gate material to form a first sidewall; forming a sacrificial spacer adjacent to the first sidewall; forming a layer of nanoclusters over the substrate including on the sacrificial spacer; removing the sacrificial spacer after the forming the layer of nanoclusters, wherein the removing removes nanoclusters of the layer of nanoclusters formed on the sacrificial spacer and leaves other nanoclusters of the layer of nanoclusters; forming a layer of control gate material over the substrate after the removing the sacrificial spacer; and forming a control gate of a split gate memory device from the layer of control gate material, wherein the control gate is located over nanoclusters of the layer of nanoclusters.