Patent ID: 7205670
Filing Date: 2007-04-17
Classification: H01L

Abstract:
1. A semiconductor device comprising: a plurality of semiconductor chips having a plurality of terminals; two chip mounting bases on each of which at least one of the semiconductor chips is mounted and a plurality of chip interconnections electrically connected to the terminals of the mounted semiconductor chip are formed into substantially the same pattern and which are stacked in two layers along a direction of thickness; one interconnection base which is interposed between the two chip mounting bases and on which a plurality of intermediate interconnections electrically connected to the chip interconnections are formed into a pattern different from the pattern of the chip interconnections; and a plurality of interlevel interconnections which are formed in a plurality of through holes extending through the chip mounting bases and the interconnection base at once along a stacking direction and electrically connect the chip interconnections and the intermediate interconnections in the stacking direction of the bases.