Patent ID: 7603550
Filing Date: 2009-10-13
Classification: G06F

Abstract:
1. A computer system comprising: a processor configured to initialize a secure execution mode by executing a security initialization instruction and to operate in said secure execution mode by executing a secure operating system code segment; an input/output (I/O) interface coupled to said processor via an I/O link, wherein said I/O interface is configured to receive transactions performed as a result of said execution of said security initialization instruction and to determine whether said processor is a source of said transactions, wherein said transactions include at least a portion of said secure operating system code segment; and a security services processor coupled to said I/O interface via a peripheral bust, wherein said security services processor is separate from the processor and configured to verify whether said at least a portion of said secure operating system code segment is valid during said initialization of said processor into said secure execution mode; wherein said I/O interface is configured to convey said transactions to said security services processor dependent upon determining that said processor is said source of said transactions.