Patent ID: 9209172
Filing Date: 2015-12-08
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure within a semiconductor substrate, the method comprising: forming, on the semiconductor substrate, a first group of fins associated with a first device; forming, on the semiconductor substrate, a second group of fins associated with a second device; forming, on the semiconductor substrate, a third group of fins located between the first group of fins and the second group of fins, the third group of fins associated with a third device; and forming a shallow trench isolation (STI) region between the first group of fins and the second group of fins by recessing the third group of fins into an opening within the semiconductor substrate, the recessed third group of fins having a fin top surface located below a top surface of the semiconductor substrate, the top surface of the semiconductor substrate being substantially coplanar with a fin bottom surface corresponding to the first and the second group of fins.