Patent ID: 8922742
Filing Date: 2014-12-30
Classification: G02F,G09G,H01L

Abstract:
1. A liquid crystal display device comprising: a first substrate and a second substrate placed to sandwich a liquid crystal layer therebetween; and pixels over a plane which faces the liquid crystal layer of the first substrate, each pixel including a first electrode and a second electrode placed over or under the first electrode with a first insulation film intervening therebetween, wherein one of the first and second electrodes serves as a pixel electrode which is supplied with an image signal and the other electrode serves as a common electrode, wherein a plurality of pixels are disposed along a first direction and form a pixel row, wherein a plurality of pixel rows are disposed along a second direction perpendicular to the first direction, wherein each of the pixel rows includes a first pixel and a second pixel which are supplied with a gate signal by a first gate signal line and a second gate signal line, respectively, extending along the first direction, wherein the first pixel is connected to the first gate signal line and the second pixel is connected to the second gate signal line, wherein a first drain signal line and a second drain signal line extending in the second direction are laid to sandwich the first pixel and the second pixel therebetween, wherein the first pixel is configured such that an image signal from the first drain signal line is supplied to the pixel electrode via a first thin-film transistor which is driven by a signal from the first gate signal line and placed close to the first gate signal line, wherein the second pixel is configured such that an image signal from the second drain signal line is supplied to the pixel electrode via a second thin-film transistor which is driven by a signal from the second gate signal line and placed close to the second gate signal line, wherein a source electrode, which is electrically connected to the pixel electrode of the first thin-film transistor, includes an extension part extending into a region of the second pixel, close to the first gate signal line, the extension part being formed overlapping the common electrode formed in the second pixel, when viewed from a planar view, with a second insulation film intervening between the extension part and the common electrode, and wherein a source electrode, which is electrically connected to the pixel electrode of the second thin-film transistor, includes an extension part extending into a region of the first pixel, close to the second gate signal line, the extension part being formed overlapping the common electrode formed in the first pixel, when viewed from a planar view, with the second insulation film intervening between the extension part and the common electrode, and wherein the extension part of the source electrode of the first thin-film transistor of the first pixel is formed on the same layer as the source electrode of the first thin-film transistor but is formed on a different layer from the pixel electrode of the first pixel, and is configured to form a first capacitor with the common electrode in the second pixel, wherein the common electrode overlapping with the extension part of the source electrode of the first thin-film transistor is configured to form a second capacitor with the pixel electrode of the second pixel, wherein the extension part of the source electrode of the second thin-film transistor of the second pixel is formed on the same layer as the source electrode of the second thin-film transistor but is formed on a different layer from the pixel electrode of the second pixel, and is configured to form a third capacitor with the common electrode in the first pixel, and wherein the common electrode overlapping with the extension part of the source electrode of the second thin-film transistor is configured to form a fourth capacitor with the pixel electrode of the first pixel.