Patent ID: 6690154
Filing Date: 2004-02-10
Classification: G01R

Abstract:
A system for high-frequency testing of a semiconductor device under test comprising:a tester having test head electronics associated therewith, said test head electronics having a pin; a DUT board, said DUT board having a socket for said device under test; first and second switches each having an on state and an off state, said first and second switches being disposed between said tester and said socket, and having a common node; a first transmission line extending between said pin and said first switch; a second transmission line extending between said common node and said socket; and a third transmission line extending between said tester and said first and second switches, said third transmission line configured to control said first and second switches, such that when said first switch is in an on state, said second switch is in an off state, and when said first switch is in an off state, said second switch is in an on state; wherein said system is operable to apply a set of test signals to said DUT board of a higher frequency than achievable by said test head electronics alone.