Patent ID: 7880650
Filing Date: 2011-02-01
Classification: H03M

Abstract:
1. A data converter, comprising: a first DAC array; a first comparator coupled to receive an input from the first DAC array, the first comparator providing an output; successive approximation circuitry coupled to the output of the first comparator, the successive approximation circuitry providing an actual test result value; self-test circuitry which generates and provides an expected test result value; a second comparator, coupled to the successive approximation circuitry to receive the actual test result value, and coupled to the self-test circuitry to receive the expected test result value; and one or more conductors coupled to the second comparator which provide one or more signals for indicating whether the actual test result value is within a predetermined range compared to the expected test result value, wherein for a first situation the actual test result value is different than the expected test result value yet the one or more signals indicate that the actual test result value is still within the predetermined range, and wherein for a second situation the actual test result value is different than the expected test result value and the one or more signals indicate that the actual test result is not within the predetermined range.