Patent ID: 9203671
Filing Date: 2015-12-01
Classification: G06F,H04L

Abstract:
1. A system for mapping memory locations of a 3D memory to a buffer, the system comprising circuitry for: determining a first geometric pattern for storing data in the 3D memory based on a type of computation performed using the data as input; storing the data in the 3D memory using the determined first geometric pattern; mapping memory locations arranged in the first geometric pattern in the 3D memory to first memory locations in the buffer; writing data to the first memory locations in the buffer; mapping memory locations arranged in a second geometric pattern in the 3D memory to second memory locations in the buffer, wherein the memory locations in the second geometric pattern in the 3D memory overlap with the memory locations in the first geometric pattern in the 3D memory; reading data from the second memory locations in the buffer after writing data to the first memory locations in the buffer; and writing data to the second memory locations in the buffer after reading data from the second memory locations in the buffer.