Patent ID: 6366157
Filing Date: 2002-04-02
Classification: G06F,Y02D

Abstract:
A method for dynamically adjusting a supply voltage in a digital circuit, the method comprising the steps of:determining a propagation delay of a signal along a signal path in the digital circuit, the signal being clocked along the signal path by a clock signal, and the determining step comprising the steps of: providing a duplicate path, which duplicate path comprises substantially the same components as the signal path and has an input and an output; applying the clock signal to the input of the duplicate path; and comparing the phase of the clock signal at the output of the duplicate path with the phase of the clock signal at the input of the duplicate path to provide a phase error signal which is representative of the determined propagation delay, adjusting the level of the supply voltage in dependence on the phase error signal until the propagation delay is determined to reach a predetermined amount, the supply voltage having a first level when the determined propagation delay reaches the predetermined amount; and providing the supply voltage having the first level to components of the digital circuit.