Patent ID: 9123743
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising: forming a dummy gate electrode layer over a substrate, the dummy gate electrode layer having a first height; forming a first etch stop layer on the dummy gate electrode layer; forming a first hard mask layer on the first etch stop layer; patterning the first hard mask layer; patterning the first etch stop layer to align with the patterned first hard mask layer; and patterning the dummy gate electrode layer to form a dummy gate electrode, the dummy gate electrode aligning with the patterned first etch stop layer, wherein after the patterning the dummy gate electrode layer the first hard mask layer has a vertical sidewall of a second height, the second height being in a range from about 25% to about 50% of the first height.