Patent ID: 7679084
Filing Date: 2010-03-16
Classification: H01L

Abstract:
1. A method of fabricating a thin film transistor array panel, including a pad to be contacted with a bonding wire wherein the pad includes first and second conductive layers, comprising: forming the first conductive layer having a plurality of islands and holes in a pad region of the thin film transistor array panel and on an insulating substrate, wherein the first conductive layer is extended into an array line of the thin film transistor array panel; and forming the second conductive layer so as to cover the plurality of islands and holes of the first conductive layer in the pad region, wherein the second conductive layer directly contacts with all the plurality of islands and holes of the first conductive layer covered by the second conductive layer and has a concave-convex surface structure according to the contours of the plurality of islands and holes of the first conductive layer and further wherein the concave-convex surface is exposed for contacting with the bonding wire.