Patent ID: 8853673
Filing Date: 2014-10-07
Classification: H01L,Y10S

Abstract:
1. A semiconductor device comprising: a silicon substrate; a gate insulating film over the silicon substrate; a gate electrode formed over the gate insulating film; a source region and a drain region formed in the silicon substrate; a first SiGe mixed crystal region formed in the source region; a second SiGe mixed crystal region formed in the drain region; a first silicide layer over the first SiGe mixed crystal region; a second silicide layer over the second SiGe mixed crystal region, wherein a bottom of the first silicide layer and a bottom of the second silicide layer are located higher than a first boundary between the silicon substrate and the gate insulating film; and a sidewall insulating film formed on side wall of the gate electrode, wherein a second boundary between the first SiGe mixed crystal region and the silicon substrate includes at least one facet, and a third boundary between the second SiGe mixed crystal region and the silicon substrate includes at least one facet, wherein the second boundary includes two facets, and a cross-sectional shape of the second boundary includes a first convex portion, and wherein the third boundary includes two facets, and a cross-sectional shape of the third boundary includes a second convex portion.