Patent ID: 6744273
Filing Date: 2004-06-01
Classification: G11C

Abstract:
A semiconductor device comprising:a signal line transmitting a signal; first and second adjacent wirings provided at positions for forming line capacitances together with said signal lines, respectively, in parallel to said signal line; and a capacitance control circuit forming a second line capacitance higher than a first capacitance formed between said signal line and said first adjacent wiring; wherein said capacitance control circuit includes: a first path for directly applying charges constituting a same signal as the signal applied to said signal line, to said second adjacent wiring; a second path for applying said charges to said second adjacent wiring through a resistance; and a switch selectively connecting one of said first and second paths to said second adjacent wiring, wherein said switch connects said first path to said second adjacent wiring when a signal to be transmitted at high speed is applied to said signal line, and connects said second path to said second adjacent wiring when a potential on said signal line is constant.