Patent ID: 6790750
Filing Date: 2004-09-14
Classification: H01L

Abstract:
A method of forming a semiconductor device comprising:forming source, drain, and body regions in a semiconductor layer, forming a gate on the semiconductor layer, forming a semiconductor-metal compound region including part of the source region and part of the body region the semiconductor-metal compound region electrically coupling the source region and the body region, forming another semiconductor-metal compound region including part of the drain region, and prior to the forming the semiconductor-metal compound regions, forming an additional spacer on a drain side of the gate wherein the forming the source, drain, and body regions includes shallow implanting and deep implanting to form the source region and the drain region, wherein the deep implanting is asymmetric about the gate, wherein the semiconductor-metal compound regions are substantially symmetric about the gate, wherein the gate is operatively coupled with the source, drain, and body regions, wherein the forming an additional spacer includes depositing a conformal layer of dielectric material on the semiconductor layer and the gate, anisotropically etching the conformal layer to leave a pair of spacers, one on each side of the gate, and removing one of the spacers to leave the additional spacer on the drain side.