Patent ID: 7916224
Filing Date: 2011-03-29
Classification: G02F

Abstract:
1. A pixel array substrate comprising: a substrate; a first patterned conductive layer, disposed on the substrate, the first patterned conductive layer at least comprising a plurality of scan lines and a plurality of gate electrodes, wherein each gate electrode is connected to the corresponding scan line; a second patterned conductive layer, disposed on the substrate, the second patterned conductive layer at least comprising a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes, and a plurality of capacitor electrodes, wherein the data lines and the scan lines define a plurality of pixel areas, a plurality of pixel storage capacitances C a plurality of pixel electrodes, respectively disposed in the pixel areas on the substrate, wherein each pixel electrode is electrically connected to the corresponding drain electrode and the corresponding capacitor electrode, and a liquid crystal capacitance C wherein in at least one pixel area, the capacitance ratio of the pixel storage capacitance C