Patent ID: 6583042
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A method of making an electrical contact between an electrically conductive line and a node location in a semiconductive substrate comprising:forming a first dielectric layer over the semiconductive substrate; forming a first line layer over the first dielectric layer; forming and patterning a second dielectric layer over the first line layer, the patterning (1) providing a second dielectric layer mask over the first line layer and laterally adjacent to a node location, and (2) exposing portions of the first line layer, at least one exposed portion of the first line layer overlying the node location; forming a second line layer on the exposed portions of the first line layer, wherein the first and second line layers are in electrical contact; etching the first and second line layers to form a line, the etching (1) exposing a portion of the second dielectric layer mask laterally adjacent the node location, and (2) defining the line to have an inner portion of the first line layer which extends laterally relative to an outer portion of the second line layer; removing portions of the first dielectric layer overlying the node location effective to expose the node location; and forming a third conductive layer electrically connecting the line and the node location.