Patent ID: 8289774
Filing Date: 2012-10-16
Classification: G11C

Abstract:
1. An operating method of a flash memory device comprising normal memory cells and dummy memory cells, the normal memory cells are connected in series, and the dummy memory cells are connected to each end of the series connected normal memory cells forming a string of memory cells, the operating method comprising: programming the normal memory cells of the string by applying a first program voltage to a selected normal word line to program a selected normal memory cell; and programming the dummy memory cells by applying a second program voltage to a selected dummy word line to program a selected dummy memory cell, the second program voltage being different from the first program voltage, wherein a dummy pass voltage is applied to all unselected normal and dummy word lines of the string during the programming of the dummy memory cells, and a normal pass voltage is applied to all unselected normal and dummy word lines of the string during the programming of the normal memory cells, the dummy pass voltage being lower than the normal pass voltage.