Patent ID: 6803666
Filing Date: 2004-10-12
Classification: H01L

Abstract:
A semiconductor device comprising:an insulated substrate having a semiconductor chip mounting surface which provides a plurality of partially overlapping chip mounting areas; a plurality of conductive pads in a plurality of groups formed on said insulated substrate corresponding to semiconductor chips mountable on said plurality of chip mounting areas; a semiconductor chip which is mounted on one of said plurality of chip mounting areas, said semiconductor chip having a plurality of conductive pads on the top surface; a plurality of bonding wires to electrically connect said plurality of conductive pads provided on the top surface of said semiconductor chip with said plurality of conductive pads in a group corresponding to a semiconductor chip mounted on said chip mounting area; and a plurality of wirings provided on said semiconductor chip mounting surface and configured to electrically connect said plurality of conductive pads having the same function with each other between groups.