Patent ID: 7256569
Filing Date: 2007-08-14
Classification: G05F

Abstract:
1. A continuous conduction mode (CCM) boost voltage power factor correction (PFC) apparatus with a current-averaging control mode, that is used for an AC/DC electrical power converter, using a cycle signal outputted from an oscillator to control a switch to trim the input current of the AC/DC electrical power converter and make the input current have a sine waveform and its phase be the same as the input voltage, comprising: a voltage error amplifier, connected with the output port of the AC/DC electrical power converter, for obtaining a voltage feedback signal, the voltage feedback signal is compared with a reference voltage to output a difference voltage signal; a first resettable integrator, connected with the voltage error amplifier, for integrating the difference voltage signal to output a first output signal; a second resettable integrator, obtaining an amplified input current signal via a detection resistor and an amplifier and integrating the amplified input current signal to output a second output signal; a comparator, connected with the first resettable integrator and the second resettable integrator, for comparing the first output signal with the second output signal to output a power factor amended signal; a flipflop, a reset port of the flipflop connects with the oscillator and a set port of the flipflop connects with the comparator via a PFC output controller, for receiving a PFC setting signal outputted from the PFC output controller, the flipflop outputs a control signal to control the switch in time according to an output cycle signal outputted from the oscillator; and an integrator status control unit, connected with the oscillator, the flipflop, the first resettable integrator and the second resettable integrator, for receiving the control signal to individually output a first reset signal and a second reset signal to the first resettable integrator and the second resettable integrator, the integrator status control unit resets the first output signal and the second output signal by using a leading edge method.