Patent ID: 8963625
Filing Date: 2015-02-24
Classification: G05F,G06F

Abstract:
1. A semiconductor device comprising: a first power supply terminal for receiving a main power supply voltage; a second power supply terminal for receiving an auxiliary power supply voltage; a first switch coupled between the first power supply terminal and a power supply node; second to Nth switches (N is an integer equal to 3 or higher) that are coupled in parallel between the second power supply terminal and the power supply node; a first internal circuit driven by the voltage of the first power supply terminal; a second internal circuit driven by the voltage of the power supply node; and a control circuit driven by the voltage of the power supply node, wherein when the voltage of the first power supply terminal is higher than a first reference voltage, the control circuit turns on the first switch and turns off the second to Nth switches, and when the voltage of the first power supply terminal is reduced to less than the first reference voltage, the control circuit turns off the first switch, and while the first switch is turned off, sequentially turns on the second to Nth switches to cause the voltage of the power supply node to gradually increase.