Patent ID: 7444365
Filing Date: 2008-10-28
Classification: G01S,H03H

Abstract:
1. A method of non-linearly digitally filtering K input values to produce an output value corresponding to an R th greatest value among said K input values with K≧R≧1, comprising the steps: a) providing said K input values, each respectively in a signed binary fixed-point numerical representation having plural numerical bits in order of a respective bit significance thereof from a most significant bit to a least-significant bit in succession, wherein each one of said numerical bits has a bit value of only 0 or 1, said bit significance diminishes by a factor of ½ from each one of said numerical bits to a next one of said numerical, bits in succession from said most-significant bit to said least-significant bit, and said numerical representation of each one of said K input values respectively may further optionally include a sign bit; b) if said numerical representation does not include said sign bit then skipping the remainder of this step b), otherwise if said numerical representation includes said sign bit then evaluating said sign bits of said K input values as follows: c) after said step b), selecting a respective current selected bit among said numerical bits of each of said K input values beginning with said most-significant bit and progressing successively with said bit significance diminishing toward said least-significant bit; d) after said step c), determining a respective output bit of said output value for said respective current selected bit of said K input values as follows: e) after said step d), revising said numerical bits following said respective current selected bit of said K input values, to the extent necessary as follows, by setting any and all of said numerical bits following said respective current selected bit to be equal to said respective current selected bit respectively in any and all of said input values of which said respective current selected bit does not correspond to said respective output bit; f) repeating said steps c), d) and e) successively with successive ones of said respective current selected bit with said bit significance thereof successively diminishing in successive cycles of said steps c), d) and e), until all of said output bits of said output value have been or can be determined; and g) outputting said output sign indicator to indicate a sign of said R