Patent ID: 6353464
Filing Date: 2002-03-05
Classification: G02F

Abstract:
A TFT array substrate comprising:a plurality of gate lines provided with a gate electrode and formed on a transparent insulating substrate; a plurality of source lines provided with a source electrode and crossing over said gate lines; a semiconductor layer provided on said gate electrode through a gate insulating film; a thin film transistor comprised of said source electrode and said drain electrode connected to said semiconductor layer; an interlayer insulating film formed on said substrate, and of which surface is flattened so as not to produce any step due to said thin film transistor; a picture element electrode composed of a transparent conductive film provided in a wide spread manner on said interlayer insulating film and connected to said drain electrode through a contact hole formed on said interlayer insulating film; and a terminal region in which terminals electrically connected to each of said gate lines and said source lines are arranged on the periphery of an image display section of said substrate to connect each terminal to an external terminal; wherein said interlayer insulating film is provided on said image display section and on a peripheral edge portion, which includes at least an opposite end of said image display section side of each terminal in said terminal region and a guard resistance and a short ring respectively connected to said end, and wherein said interlayer insulating film covers the guard resistance and the short ring.