Patent ID: 8975723
Filing Date: 2015-03-10
Classification: H01L

Abstract:
1. Integrated device comprising: a semiconductor body having a depressed first portion and second portions projecting from the first portion; an STI insulation structure, extending on the first portion of the semiconductor body, having a first sidewall with the second portions of the semiconductor body, the first sidewall disposed at a first angle with respect to a plane defined by a top surface of the second portion that is less than ninety degrees, having an aperture exposing part of the first portion, the aperture having sidewalls disposed at a second angle with respect to the plane defined by the to surface of the second portion that is less than ninety degrees and having a face adjacent to a surface of the first portion of the semiconductor body, the second angle less than the first angle by at least 10 degrees; low-voltage CMOS components, accommodated in the second portions, in a first region of the semiconductor body; and a power component, in a second region of the semiconductor body; wherein the power component comprises at least one conduction region, formed in the first portion of the semiconductor body, and a conduction contact, connected to the conduction region and crossing the STI insulation structure perpendicularly to the plane defined by the to surface of the second portion of the semiconductor body.