Patent ID: 7876636
Filing Date: 2011-01-25
Classification: G11C

Abstract:
1. A semiconductor memory device, comprising: a self refresh oscillator configured to control a self refresh period of the semiconductor memory device: and a control signal generator configured to generate a first control signal and a second control signal, to generate a self refresh control signal in response to the first and second control signals, and to output the self refresh control signal to the self refresh oscillator, wherein the first control signal is enabled in a first temperature range higher than a first temperature, the second control signal is enabled in a second temperature range higher than a second temperature, which is lower than the first temperature by a predetermined value, each control signal has one or more flag signals, and each flag signal is enabled at a predetermined temperature, and wherein the self refresh control signal is enabled when a temperature increases and the first and second control signals are enabled, and the self refresh control signal is disabled when the temperature decreases and the first and second control signals are disabled.