Patent ID: 8719553
Filing Date: 2014-05-06
Classification: G06F,G06T

Abstract:
1. A method of operating a microprocessor system that includes a pipeline comprising a plurality of functional units arranged in a pipelined fashion and in which functional units of the pipeline can process threads for execution at the same time as other functional units of the pipeline are processing other threads for execution, the method comprising: associating a series of instructions to be carried out on successive passes through the pipeline with a thread to be processed, each of said instructions indicating processing to be carried out on said thread during one pass through said pipeline; determining, when the thread reaches the end of the pipeline on a given passage through the pipeline, whether all the instructions of said series of instructions for the thread have been completed and, if all instructions of said series of instructions for the thread have not been completed, recirculating the thread from the end of the pipeline to the beginning of the pipeline and sending the thread through the pipeline again; and wherein, on a given passage of said non-completed thread through the pipeline, if processing for a current instruction of said non-completed thread cannot be carried out by the functional unit the thread has reached, if the processing for the current instruction for said non-completed thread has been carried out on the passage of the thread through the pipeline,