Patent ID: 6552428
Filing Date: 2003-04-22
Classification: H01L

Abstract:
A semiconductor package, comprising:a substrate having a first surface and a second surface; first conductive traces formed on the first surface of the substrate; second conductive traces formed on the second surface of the substrate and electrically connected with the first conductive traces via a plurality of vias formed in the substrate; a semiconductor chip mounted on the first surface of the substrate and electrically connected to the first conductive traces; a plurality of solder balls attached to the second surface of the substrate for electrical connection with the second conductive traces; a heat spreader disposed on the first surface of the substrate, the heat spreader comprising an upper portion, a lower portion formed with an opening in the center for receiving the semiconductor chip, and a connecting portion for connecting the lower portion and the upper portion in a manner that the upper portion is raised to a height above the opening of the lower portion, wherein the lower portion is formed with a plurality of positioning members outwardly extending from edges of the lower portion for preventing the heat spreader on the substrate from being dislocated during a molding process, and further including downward flutes formed on the periphery of the opening for enabling resin to flow underneath the heat spreader; and a plurality of supporting members to support the heat spreader over the substrate to allow a top surface of the upper portion to be exposed to the exterior of an encapsulant subsequently formed to encapsulate the semiconductor chip and a portion of the heat spreader, and to keep the semiconductor chip from being in contact with the heat spreader.