Patent ID: 9099356
Filing Date: 2015-08-04
Classification: H01L

Abstract:
1. An array substrate, comprising: a base substrate; a gate line and a data line formed on the base substrate, the gate line and the data line crossing with each other to define a pixel region; a thin film transistor and a pixel electrode, disposed in the pixel region; a strip-like common electrode, disposed above the pixel electrode and the data line, the common electrode comprising a first common electrode which covers above the data line and has a width greater than that of the data line, and a second common electrode which is disposed above the pixel electrode; an insulating layer, disposed between the common electrode and the pixel electrode as well as between the common electrode and the data line, wherein a region of the first common electrode corresponding to the data line is hollowed out, wherein a resin layer is disposed between the layer where the data line is located and the layer where the pixel electrode is located, wherein, within each pixel region, there are a plurality of second common electrodes, and an edge of the first common electrode is connected with an edge of the second common electrode which is adjacent thereto.