Patent ID: 6016422
Filing Date: 2000-01-18
Classification: H03C,H03D,H04B

Abstract:
An apparatus for generating radio frequency (RF) quadrature local oscillator (LO) signals for a direct conversion receiver or a direct launch transmitter of a radiotelephone, wherein the RF quadrature LO signals are at substantially a same frequency as a desired received signal detected at an antenna of the radiotelephone when the RF quadrature LO signals are used for the direct conversion receiver, and wherein the RF quadrature LO signals are at substantially a same frequency as a transmission signal transmitted from the antenna of the radiotelephone when the RF quadrature LO signals are used for the direct launch transmitter, the apparatus comprising:an oscillator for producing an RF clock signal, wherein the RF clock signal has an RF clock frequency substantially twice the frequency as the desired received signal detected at the antenna of the radiotelephone when the RF quadrature LO signals are used for the direct conversion receiver, and wherein the RF clock signal has the RF clock frequency substantially twice the frequency as the transmission signal transmitted from the antenna of the radiotelephone when the RF quadrature LO signals are used for the direct launch transmitter;a frequency divider coupled to the oscillator for producing a differential frequency divided signal responsive to the RF clock signal, wherein the differential frequency divided signal is at substantially the same frequency as the desired received signal detected at the antenna of the radiotelephone when the RF quadrature LO signals are used for the direct conversion receiver, and wherein the differential frequency divided signal is at substantially the same frequency as the transmission signal transmitted from the antenna of the radiotelephone when the RF quadrature LO signals are used for the direct launch transmitter, the frequency divider consisting of a pair of flip-flops having an output of a first flip-flop of the pair of flip-flops coupled to an input of a second flip-flop of the pair of flip-flops, and having an output of the second flip-flop coupled to an input of the first flip-flop,a phase shift network coupled to the frequency divider for generating a pulse train-pair in response to the differential frequency divided signal, the pulse train-pair including a first differential pulse train and a second differential pulse train, wherein the first differential pulse train and the second differential pulse train are at substantially a same frequency but offset in phase relative to one another by substantially ninety degrees;an input buffer coupled to the oscillator and the frequency divider to produce a buffered differential RF clock signal that is applied to the frequency divider, the frequency divider producing the differential frequency divided signal at the output of the first flip-flop and the second flip-flop responsive to the buffered differential RF clock signal; anda feedback control circuit coupled to receive signals representative of phases of the first and second differential pulse trains, respectively, the feedback control circuit having a phase determining circuit for determining a relative phase difference between the phases of the first and second differential pulse trains and for generating a control signal representative of the relative phase difference for application to the phase shift network, wherein the phase shift network adjusts the relative phase difference when the first and second differential pulse trains are beyond phase quadrature with one another to position and maintain the first and second differential pulse trains in phase quadrature with one another.