Patent ID: 7598760
Filing Date: 2009-10-06
Classification: G01R,H01L

Abstract:
1. A system for parametric testing of at least one die, comprising: a board comprising electronics to interface the at least one die to electronics test equipment; a socket affixed to the board; and at least one package, wherein the at least one package comprises a substrate having a plurality of conductive paths formed integrally thereon, each of the plurality of conductive paths directly connecting a connection point on the at least one die to a corresponding point at an edge of the package, wherein the socket is configured to enable the at least one package to be inserted into the socket in an orientation substantially parallel relative to the board with the at least one package lying flat against the board, the at least one package and the socket are configured such that, when the edge of the package is inserted into a receptacle of the socket, contacts of the socket serve to both electrically connect the conductive paths on the package to respective conductive paths on the board and to mechanically couple the package to the board, and the socket includes a plurality of separators, each separator configured to accommodate a corresponding notch in an edge portion of the at least one package, so as to align the plurality of conductive paths on the edge of the packages to the conductive paths on the board.