Patent ID: 7381588
Filing Date: 2008-06-03
Classification: H01L

Abstract:
1. A process for fabricating a shielded integrated circuit package, comprising: providing a strip having at least one leadless plastic chip carrier comprising a die attach pad for shielding radio frequency and electromagnetic interference signals and having a first side and a second side, a first semiconductor die mounted directly to said first side of said die attach pad, a plurality of contact pads disposed in close proximity to said first semiconductor die, a first plurality of wire bonds connecting said first semiconductor die and ones of said contact pads, and an overmold encapsulating said first plurality of wire bonds and said first semiconductor die, said die attach pad and said contact pads being embedded in said overmold; mounting a plurality of leads on said leadless plastic chip carrier package, proximal to said second side of said die attach pad such that ones of said plurality of contact pads are electrically connected to ones of said plurality of leads; mounting a second semiconductor die on one of said second side of said die attach pad and ones of said plurality of leads and electrically connecting said second semiconductor die to said ones of said plurality of leads, such that radio frequency and electromagnetic interference signals transmitted to and from said second semiconductor die are shielded by said die attach pad; encapsulating such that said second semiconductor die and said plurality of leads are embedded in said encapsulant; and singulating the shielded integrated circuit package from the strip.