Patent ID: 6212122
Filing Date: 2001-04-03
Classification: G06F,G11C

Abstract:
A method for operating a dual port memory suitable for transferring an address pointer across clock domains comprising the steps of:generating a first clock signal having a first frequency wherein circuit elements operating based upon the first clock signal operate in a first clock domain;generating a second clock signal having a second frequency wherein circuit elements operating based upon the second clock signal operate in a second clock domain, and wherein the first and second clock signals are asynchronous;generating a first synchronization signal, wherein the first synchronization signal includes a first token and a second token;receiving a first address pointer based upon the first token of the first synchronization signal;generating a second synchronization signal having a first token, wherein the first token of the first synchronization signal is passed from the first clock domain to the second clock domain and becomes the first token of the second synchronization signal; andtransferring a first address pointer from the first clock domain to the second clock domain based upon the first token of the second synchronization signal.