Patent ID: 9041061
Filing Date: 2015-05-26
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, comprising the steps of: forming a III-V compound semiconductor-containing heterostructure above a substrate, wherein the III-V compound semiconductor-containing heterostructure comprises a buffer layer above the substrate, a channel layer above and in contact with the buffer layer, a barrier layer above and in contact with the channel layer, and an etch stop layer above and in contact with the barrier layer; forming gate spacers on an uppermost surface of the etch stop layer; forming raised source-drain (RSD) regions on the uppermost surface of the etch stop layer, wherein the RSD regions are adjacent to and contacting the gate spacers; forming a dielectric layer on the uppermost surface of the RSD regions, wherein the dielectric layer is adjacent to and contacting the gate spacers, and wherein an uppermost surface of the dielectric layer is higher than an uppermost surface of the gate spacers; removing a portion of the etch stop layer and a portion of the barrier layer between the gate spacers to form an opening, wherein the opening exposes an uppermost surface of the channel layer; and forming a T-shaped gate structure above the uppermost surface of the channel layer in the opening, wherein the T-shaped gate structure comprises: