Patent ID: 9082698
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A method of forming a FinFET device having spaced-apart source/drain regions and a channel region positioned between said spaced-apart source/drain regions, the method comprising: forming a plurality of trenches in a semiconductor substrate to thereby define a fin; performing a well ion implantation process to form a well implant region in at least said substrate; performing a punch-stop implant process to form a punch-stop implant region in said fin; performing at least one neutral implantation process with at least one neutral implant material to form a neutral boron-diffusion-blocking implant region in said fin, wherein said neutral boron-diffusion-blocking implant region is positioned under what will become said channel region of said device and extends into what will become said source/drain regions of said device, and wherein an upper surface of said neutral boron-diffusion-blocking implant region is positioned closer to an upper surface of said fin than either said punch-stop implant region or said well implant region; and after forming said well implant region, said punch-stop implant region and said neutral boron-diffusion-blocking implant region, forming a gate structure above said fin.