Patent ID: 6153494
Filing Date: 2000-11-28
Classification: H01L

Abstract:
A method of forming a stacked-gate flash memory having a shallow trench isolation with a high-step oxide and high lateral coupling comprising the steps of:providing a semiconductor substrate;forming a pad oxide layer over said substrate;forming a high nitride layer over said pad oxide layer;forming and patterning a first photoresist layer over said high nitride layer to define active regions in said substrate;forming a trench in said substrate by etching through patterns in said first photoresist layer;removing said first photoresist layer;forming a conformal lining on the inside walls of said trench;depositing isolation oxide inside said trench to form shallow trench isolation (STI) with a high-step oxide;performing chemical-mechanical polishing of said substrate;removing said nitride layer, to form high steps;removing said pad oxide layer at the bottom of said high steps;after removing said pad oxide layer, forming sacrificial oxide layer over said substrate;removing after forming the sacrificial oxide layer, said sacrificial oxide layer;growing floating gate oxide layer over said substrate;forming a first polysilicon layer conformally over said high steps;forming and patterning a second photoresist layer over said substrate to define said first polysilicon layer and form floating gate regions in said substrate;etching said first polysilicon layer to form floating gates;removing said second photoresist layer;forming interpoly oxide over said floating gates;forming a second polysilicon layer over said interpoly oxide layer;forming and patterning a third photoresist layer over said interpoly oxide layer to define control gate and word line;etching through said patterning in third photoresist layer to form said word line;removing said third photoresist layer;forming and patterning a fourth photoresist layer over said substrate to define self-aligned source (SAS) regions in said substrate;etching said SAS regions; andremoving said fourth photoresist layer.