Patent ID: 9098404
Filing Date: 2015-08-04
Classification: G06F

Abstract:
1. A storage device, comprising: a central processing unit (CPU), a user interface chip, a first non-volatile storage device and a peripheral component interconnect express (PCIE) link, wherein the PCIE link interconnects the CPU, the user interface chip and the first non-volatile storage device; wherein the first non-volatile storage device includes a first controller, a first memory and a first non-volatile storage medium, and wherein: the user interface chip is configured to receive data to be stored, and send a first address request to the CPU; the CPU is configured to send a first PCIE bus memory window address to the user interface chip in response to the first address request; the user interface chip is further configured to write the data into the first memory according to the first PCIE bus memory window address; and the first controller is configured to move the data from the first memory to the first non-volatile storage medium.