Patent ID: 9219003
Filing Date: 2015-12-22
Classification: H01L

Abstract:
1. A method for making an insulator termination semiconductor device, comprising: a) applying a trench mask to a semiconductor substrate; b) etching the semiconductor substrate through the trench mask to form first and second sets of trenches, wherein the trenches in the second set are narrower than the trenches in the first set, wherein the first set includes an isolation trench that surrounds the second set of trenches; c) forming a gate dielectric in the first and second sets of trenches; d) doping a region of the semiconductor substrate under the isolation trench to form a channel stop; e) depositing a conductive material into the first and second sets of trenches, wherein a thickness of the conductive material is selected to fill up the second set of trenches but not the isolation trench; f) isotropically etching back the conductive material to form gate electrodes in the second set of trenches, wherein the conductive material is completely removed from the isolation trench; g) filling the isolation trench with an insulator material to form an isolation structure that surrounds the gate electrodes; h) forming a body layer in a top portion of the entire substrate; i) forming a source layer in a top portion of the entire body layer; wherein portions of the source layer and body layer inside a region surrounded by the isolation trench are at source potential and portions of the source layer and body layer that are outside the region surrounded by the isolation trench are at drain potential.