Patent ID: 9190475
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A semiconductor device manufacturing method comprising: forming a first insulating film over a semiconductor substrate; forming a first wiring layer in the first insulating film, the first wiring layer including a gate electrode; forming a gate insulating film over the gate electrode and at least a portion of the first insulating film; forming a semiconductor layer over the gate insulating film such that the gate insulating film is between the gate electrode and the semiconductor layer; and forming a source electrode and a drain electrode over the semiconductor layer so as to be connected with first and second portions of the semiconductor layer, respectively, wherein the semiconductor layer comprises a p-type metal oxide semiconductor, wherein the forming the drain electrode causes at least the second portion of the semiconductor layer to exhibit n-type semiconductor characteristics, and wherein the gate electrode and the drain electrode are separated from each other in a top view.