Patent ID: 6218272
Filing Date: 2001-04-17
Classification: H01L

Abstract:
A method of fabricating a semiconductor device, comprising:providing a semiconductor substrate having a plurality of wires formed therein, said plurality of wires being surrounded by a first insulating layer;forming a first conductive layer covering said first insulating layer and said semiconductor substrate;etching said first conductive layer to expose said first insulating layer and to remain only between said wires, thereby forming a first pad;forming sequentially second and third insulating layers covering said first pad and said first insulating layer;forming a photoresist pattern having at least one opening for exposing said first pad on said third insulating layer over a surface of said wires, said opening being wider than an upper width of said first pad;etching sequentially said third and said second insulating layers by using said photoresist pattern as a mask until said first pad is exposed;forming a second conductive layer covering said first pad and said third insulating layer after removal of said photoresist patterns; andetching said second conductive layer until said second insulating layer is exposed, thereby forming second pad, said second pad being in contact with said first pad and being wider than said first pad.