Patent ID: 9113192
Filing Date: 2015-08-18
Classification: G09G,H04N

Abstract:
1. A video processor receiving, from a video signal source, original video data including color-difference data formed by alternately arranging first and second color-difference signals, an original synchronization signal indicating synchronization timing of the original video data, and an original data valid region signal indicating a valid pixel region of the original video data, supplementing insufficient part of the original video data relative to a predetermined valid pixel region, and outputting new video data having the predetermined valid pixel region, and a new data valid region signal indicating the predetermined valid pixel region; the video processor comprising: a valid position regeneration controller configured to delay at least one of the original video data or the original synchronization signal to match data positions of the first and second color-difference signals in the original video data to data positions of first and second color-difference signals in the new video data in determining based on the original synchronization signal and the original data valid region signal that the first and second color-difference signals in the new video data are displayed while being replaced with each other; and a controller configured to control operation of the valid position regeneration controller.