Patent ID: 7045378
Filing Date: 2006-05-16
Classification: B82Y,H01L

Abstract:
1. A method of forming a diode, comprising the steps of: forming a superlattice exclusion region configured for inhibiting diffusion of minority carriers from said exclusion region to an active region in said diode, including forming a first layer which forms a barrier that is penetrated by minority carriers using quantum mechanical tunneling and which reduces the mobility of said minority carriers, and forming a second layer on the first layer, said second layer having a sufficiently low energy band gap for requiring said minority carriers to perform said tunneling to reach said active region; repeating both said forming steps for forming a stack of first and second layers and defining a growth direction in which said layers are piled; and performing said repeating step until said thickness of said exclusion region in said growth direction is at least three times a diffusion length of said minority carrier.