Patent ID: 7539965
Filing Date: 2009-05-26
Classification: H03K

Abstract:
1. An integrated circuit layout comprising: a first circuit connection; a second circuit connection; a first and second transistor, the first and second transistors each having a source connection and a drain connection and a predefined maximum reverse voltage between the source connection and the drain connection, a maximum value of a voltage swing, achieved between the first circuit connection and the second circuit connection is greater than the predefined maximum reverse voltage, the source connection of the first transistor is connected to a drain connection of the second transistor, the integrated circuit layout changing potentials at gate terminals of the second transistor and the first transistor substantially synchronously based on a control signal; and a third transistor having a source connection located at a first supply potential connection, a drain connection connected via a first resistor to a second supply potential and via a second resistor to a drain connection of the first transistor, wherein a gate terminal of the first transistor is connected to a center tap of a voltage divider, which lies between the drain connection of the second transistor and the first supply potential.