Patent ID: 6033978
Filing Date: 2000-03-07
Classification: H01L

Abstract:
A process of producing titanium disilicide layers, comprising the steps of:a) preparing a semiconductor structure having a first silicon portion doped with a p-type impurity and a second silicon portion doped with an n-type impurity;b) forming amorphous silicon layers on said first silicon portion and said second silicon portion;c) sputtering a titanium layer on at least said amorphous silicon layers while maintaining said semiconductor structure at a first temperature above all normal ambient temperatures and lower than a second temperature and a third temperature, said second temperature being for producing a titanium disilicide and said third temperature being for crystallizing said amorphous silicon layers, whereby said titanium and said amorphous silicon form mixed amorphous silicon/titanium boundary layers between said first and second silicon portions and said titanium layer, wherein said mixed amorphous silicon/titanium boundary layers trap dopant impurities which are present in said first and second silicon portions in excess of the respective solubility levels of said first and second silicon portions within said mixed amorphous silicon/titanium boundary layers, and further wherein said mixed amorphous silicon/titanium boundary layers are about 6 nanometers in thickness; andd) heating said titanium layer to a fourth temperature not lower than said second temperature and said third temperature for producing titanium disilicide layers on said first and second silicon portions,in which said step b) includes the sub-steps ofb-1) covering said first silicon portion and said second silicon portion with polysilicon layers, respectively, andb-2) implanting an ion into said polysilicon layers, for converting said polysilicon layers into said amorphous layers; andin which said first temperature in step c) is between 300.degree. centigrade to 500.degree. centigrade.