Patent ID: 7061050
Filing Date: 2006-06-13
Classification: G11C,H01L

Abstract:
1. An integrated circuit device, disposed on or in a first semiconductor region or layer which resides on or above an insulating region or layer, wherein the insulating region or layer is disposed on or over a substrate, the integrated circuit device comprising: a memory portion including at least one semiconductor memory cell having at least one transistor to constitute the memory cell, the at least one transistor including: wherein the memory cell includes: a non-memory portion including at least one transistor having: wherein the integrated circuit device further includes a second semiconductor region or layer disposed on or in the substrate and juxtaposed the body region of the at least one transistor of the at least one semiconductor memory cell of the memory portion and separated therefrom by the insulating region or layer, and wherein the second semiconductor region or layer is not disposed on or in a portion of the substrate juxtaposed the body region of the at least one transistor of the non-memory portion.