Patent ID: 7124341
Filing Date: 2006-10-17
Classification: G01R,H01L

Abstract:
1. An integrated circuit comprising: A. a substrate of semiconductor material; B. functional circuitry formed on the substrate, the functional circuitry having a stimulus input bond pad, a functional output bond pad, a first positive power supply bond pad, and a first negative power supply bond pad; C. test circuitry formed on the substrate, the test circuitry having a reference input test pad, a test input test pad, a response output test pad, a strobe input test pad, a second positive power supply test pad separate from the first positive power supply bond pad, a second negative power supply test pad separate from the first negative power supply bond pad, and a comparator having inputs connected to the test and reference input test pads, power leads connected to the second positive and second negative power supply test pads, a strobe input connected to the strobe input test pad, and an output connected to the response output test pad; D. a lead frame having separate leads; and E. bond wires extending from only the bond pads and not the test pads to the lead frame leads.