Patent ID: 6137344
Filing Date: 2000-10-24
Classification: H02M

Abstract:
A charge pump circuit operable with at least first to fourth phase clock signals, said charge pump circuit comprising:charge transfer devices that are connected in series through nodes, said charge transfer devices being connected to first side capacitors which are applied with second and fourth phase clock signals alternately so as to control charge transfer operations of said charge transfer devices with said second and fourth phase clock signals,said nodes being connected to second side capacitors which are applied with first and third clock signals,each of said charge transfer devices including a charge transfer field effect transistor connected in series between input and output ones of said nodes on opposite sides of said each charge transfer device and a boosting field effect transistor connected in series between a gate of a respective said charge transfer field effect transistor and said input one of said nodes,wherein a gate of each of said boosting field effect transistor is connected to a respective one of said nodes that is positioned closer to an output of said charge pump circuit than an output node of the corresponding charge transfer device by at least one of said charge transfer devices.