Patent ID: 7345508
Filing Date: 2008-03-18
Classification: H03K

Abstract:
1. A programmable logic device (PLD) configurable to implement a user design, the PLD comprising: a programmable interconnect circuit having a plurality of input ports and a plurality of output ports, each of the input and output ports including at least one signal line, the programmable interconnect circuit configurable to connect the signal lines of the output ports to the signal lines of the input ports; a plurality of programmable logic circuits, each coupled to a respective one of the output ports of the programmable interconnect circuit, each of the programmable logic circuits configurable to implement a first programmable function of signal values from the respective output port of the programmable interconnect circuit, the first programmable function generating a plurality of one-bit signal values; a plurality of one-bit registers, each coupled to one of the programmable logic circuits and arranged to store a respective one of the one-bit signal values from the one of the programmable logic circuits; wherein the coupling of each register to a programmable logic circuit bypasses the programmable interconnect circuit; a plurality of programmable selector circuits, each coupled to output ports of a plurality of the one-bit registers, wherein each of the one-bit registers is coupled to a respective one of the programmable logic circuits; wherein the coupling of each programmable selector circuit to at least one of the registers bypasses the programmable interconnect circuit; and a plurality of programmable input/output blocks, each coupled to an output port of a respective one of the programmable selector circuits and to a respective one of the input ports of the programmable interconnect circuit, wherein each of the programmable selector circuits is a look-up table configurable to implement a second programmable function of values from the output ports of the one-bit registers and to supply a value of the second programmable function to the output port of the programmable selector circuit.