Patent ID: 8988261
Filing Date: 2015-03-24
Classification: H03M

Abstract:
1. A delta-sigma D/A converter, by which a digital valued, input signal is convertible into a binary, clock signal time discrete, output signal, wherein: by forming an average value of the output signal over a number of clock signal cycles, an analog value of the input signal can be displayed; the delta-sigma D/A converter is embodied in such a manner that, in use, it provides the output signal by serial arrangement of signal patterns of a set of signal patterns; said signal patterns of the set are, in each case, binary, clock signal time discrete and extend over a signal pattern cycles total of a plurality of clock cycles; at least two signal patterns of the set have mutually different, signal pattern average values, which are formed over the respective signal pattern cycles total; and all signal patterns of the set have, in each case, the same number of edges; wherein all signal patterns of the set have, in each case, exactly one rising edge and exactly one falling edge.