Patent ID: 6107686
Filing Date: 2000-08-22
Classification: H01L

Abstract:
An interlevel dielectric comprising:a single first dielectric layer situated on a semiconductor wafer, said first single dielectric layer having an upper surface;a plurality of lines comprised of a single conductive material extending along said upper surface of said single first dielectric layer, each line of said plurality of lines having upper and lower surfaces, and adjacent lines of said plurality of lines having a space situated therebetween, the lower surfaces of each line of said plurality of lines being in contact with said upper surface of said single first dielectric layer;a single second dielectric layer above both said plurality of lines and said single first dielectric layer, said single second dielectric layer having a lower surface in contact with the upper surface of each line of said plurality of lines; anda single dielectric material situated in said space between adjacent lines of said plurality of lines, said single dielectric material not extending over the upper surface of each line of said plurality of lines, the upper surface of said single dielectric material being higher than the upper surface of each line of said plurality of lines, the lower surface of said single dielectric material being lower than the lower surface of each line of said plurality of lines.