Patent ID: 6639460
Filing Date: 2003-10-28
Classification: H03F

Abstract:
An amplifier circuit configured for providing chopper stabilization while reducing residual offset errors, said operational amplifier circuit comprising:an input stage having an input offset voltage and providing an output signal at output terminals configured for chopper stabilization; a first switching block configured for chopper stabilizing of said amplifier circuit, said first switching block coupled to said input terminals of said input stage; at least one following stage for providing an output signal; a second switching block configured for chopper stabilizing of said amplifier circuit, said second switching block coupled to an input of said at least one following stage; a second gain stage coupled between said input stage and said second switching block, wherein said second gain stage is configured such that any offset voltage occurring at an input of said second gain stage suitably appears at said output terminals of said input stage with identical polarity during each phase of chopper stabilization of said amplifier circuit, thus reducing any residual DC offset resulting from changes in voltage across parasitic capacitances on said output terminals of said input stage, and a local feedforward circuit, said local feedforward circuit comprising a feedforward stage coupled to said output terminals of said input stage and to said following stage, said feedforward stage being configured to increase stability within said amplifier circuit.