Patent ID: 7795638
Filing Date: 2010-09-14
Classification: H01L

Abstract:
1. A semiconductor device having a U-shape drift region comprising a semiconductor substrate; said substrate having at least one trench filled with an insulator formed in a first main surface of said substrate; wherein said substrate is a first conductivity type or a combination of a first conductivity type and a second conductivity type; wherein in said combination of a region of a first conductivity type and a region of a second conductivity type, said second conductivity type region surrounds said trench and is surrounded by said region of said first conductivity type; said trench with its surrounding semiconductor forms a cell, and said semiconductor device consists of at least one cell; two device feature regions of said device are formed on said substrate at each side of said trench beneath said first main surface, where the first device feature region is at the first side and the second feature region is at the second side; said U-shape drift region is started from said first device feature region, through said semiconductor substrate and terminated at said second device feature region; wherein said first device feature region is an insulated gate field effect transistor (IGFET) of a first conductivity type for injecting carriers of first conductivity type into said drift region of U-shape in the on-state, said IGFET of a first conductivity type having at least a first source region of a first conductivity type in said first device feature region, said first source region surrounded by a first source-body region of a second conductivity type except at said first main surface; wherein a part of said first source region and a part of said first source-body region are contacted with a first electrode at said first main surface; wherein said first electrode is the first source electrode of said IGFET of a first conductivity type; wherein a first insulator layer is formed on part of said first main surface of said first side; and a first gate electrode is formed on the top of said first insulator layer; said first gate electrode covering a part of said first source region of said IGFET of a first conductivity type, a part of said first source-body region and a part of said substrate; wherein said second device feature region comprises a passive device region or an active device region; wherein said passive device region of said second device feature region comprises a p-n junction for injecting carriers of second conductivity type into said drift region of U-shape in the on-state; said junction is formed by a region of semiconductor of a second conductivity type surrounded by a region of semiconductor of a first conductivity type except at said first main surface; wherein a part of said region of semiconductor of second conductivity type of said second device feature region is in contact with a second electrode; and whereby the current from said second electrode to said first electrode is determined by the voltage between said second electrode and said first electrode, and the voltage between said first gate electrode and said first electrode altogether; wherein said active device region of said second device feature region comprises at least one IGFET of a second conductivity type with a second source region of a second conductivity type located in said second device feature region and in contact with said second electrode and wherein said second electrode is a second electrode of said IGFET of a second conductivity type; wherein in said IGFET of a second conductivity type, a second drain region is formed by a region of a second conductivity type in said second device feature region, and a region of a first conductivity type is located adjacent to said second drain region and is connected to said second drain region through an electrode at the first main surface, whereby said second drain region is connected to said substrate; an insulator layer is formed on part of said first main surface of said second device feature region; a second gate electrode covers at least a part of said second source region of said IGFET of a second conductivity type, a part of said second drain region of said IGFET of a second conductivity type and an area between said second source region and said second drain region, said area is a region of a first conductivity type in contact with said substrate; and whereby the current from said second electrode to said first electrode is determined by the voltage between said second electrode and said first electrode, and the voltage between said first gate electrode and said first electrode as well as the voltage between said second gate electrode and said second source electrode altogether; wherein said first device feature region also serves as a region for collecting carriers of said second conductivity type from said drift region of U-shape; and wherein said second device feature region also serves as a region for collecting carriers of said first conductivity type from said drift region of U-shape; wherein a surface opposite to said first main surface of said substrate is defined as a second main surface, and wherein a third electrode is in contact through an ohmic contact or a heavily doped layer of a first conductivity type with said second main surface; and wherein said third electrode is connected through an outer connection to a part of said region of semiconductor of first conductivity type in said second device feature region; and wherein said drift region serves as a voltage-sustaining region.