Patent ID: 7705925
Filing Date: 2010-04-27
Classification: G02F

Abstract:
1. A method of fabricating a thin film transistor substrate, comprising: forming a gate electrode on a substrate; forming a gate pad and a data pad, at least one of the gate pad and the data pad having a pad hole therein; forming a gate insulation layer on the gate electrode and on the substrate; forming an active layer on the gate insulation layer; forming source and drain electrodes on the active layer to form a thin film transistor, the source and drain electrodes being spaced apart from each other and located over the gate electrode, wherein the drain electrode has a first side facing the source electrode and a second side facing said first side; forming a protection layer on the thin film transistor and on the gate insulation layer, wherein forming the protection layer includes etching the protection layer to cover the first side but not the second side of the drain electrode, and wherein the protection layer includes a contact hole exposing the pad hole; forming a pixel electrode having a plurality of regions wherein a first region is separated from the protection layer at an interval and a second region directly on the gate insulation layer, wherein the second region electrically contacts the second side of the drain electrode, wherein the pixel electrode is formed using a back exposure; and forming a gate pad electrode and a data pad electrode electrically contacting the gate pad and the data pad, respectively, wherein the at least one of the gate pad electrode and the data pad electrode is formed using the back exposure light of which passes through the pad hole, wherein a region where the pad hole is formed is within a region where the contact hole is formed, and wherein the at least one of the gate pad electrode and the data pad electrode is within the region where the contact hole is formed.