Patent ID: 8379518
Filing Date: 2013-02-19
Classification: H04J

Abstract:
1. A scheduling method for controlling access to processor and bandwidth resources in a processing device, the method comprising the steps of: separating incoming traffic into multiple traffic flows; scheduling data blocks of the traffic flows for access to the processor resource using a first scheduling algorithm; processing the data blocks of the traffic flows by the processor resource as scheduled by the first scheduling algorithm; scheduling the processed data blocks of the traffic flows for access to the bandwidth resource using a second scheduling algorithm; providing the processed data blocks to the bandwidth resource as scheduled by the second scheduling algorithm; wherein said steps are performed by the processing device; the processing device comprising a multi-stage scheduler having a serial arrangement of first and second scheduler stages for implementing the respective steps of scheduling for access to the processor resource using the first scheduling algorithm and scheduling for access to the bandwidth resource using the second scheduling algorithm; the first scheduler stage being operative to ensure that particular ones of the data blocks requiring a relatively high level of the processor resource do not prevent other ones of the data blocks requiring a relatively low level of the processor resource from accessing the bandwidth resource.