Patent ID: 7749901
Filing Date: 2010-07-06
Classification: H01L

Abstract:
1. A fabrication method of a semiconductor device comprising: a first step of forming a mask layer which is composed of material whose etching rate is smaller than a semi-insulating substrate on a surface of another side of the semi-insulating substrate where an electrode is formed on a surface of one side; a second step of forming a resist layer on the mask layer; a third step of illuminating the resist layer through a mask pattern which provides a region along which light passes, and forming a first aperture in the resist layer; a fourth step of heating the resist layer in which the first aperture is formed, and forming a first tapered region where a thickness becomes thin toward the first aperture side around the first aperture of the resist layer; a fifth step, after the fourth step, of forming a second aperture such that a part of the surface of the another side of the semi-insulating substrate is exposed by etching the mask layer using the first aperture of the resist layer, and forming a second tapered region where a thickness becomes thin toward the second aperture side around the second aperture; a sixth step, after the fifth step, of removing the resist layer which remains on the mask layer; a seventh step, after the sixth step, of forming a third aperture having a third tapered region where an inside diameter of a part located in the surface of the another side of the semi-insulating substrate is larger than an inside diameter of a part located in the surface of the one side by etching the semi-insulating substrate using the second aperture; and an eighth step of forming a conductive layer in an inner surface of the third aperture.