Patent ID: 8438442
Filing Date: 2013-05-07
Classification: G06F

Abstract:
1. A method of testing a processor, the method comprising: performing a test of at least one logic block of a processor of a data processing system; receiving an interrupt; stopping the performing the test of the processor to respond to the interrupt, wherein the stopping the performing the test includes storing test data of the test to a memory prior to the processor responding to the interrupt; and after the processor responds to the interrupt, resuming performing the test, wherein the resuming performing the test includes retrieving the test data from the memory and using the retrieved test data for the resuming performing the test, wherein the test data includes scan chain data from the at least one logic block, wherein the resuming the performing the test includes restoring the scan chain data to the at least one logic block and using the scan chain data for the resuming performing the test.