Patent ID: 6239643
Filing Date: 2001-05-29
Classification: H03F

Abstract:
An offset correction circuit for correcting an offset error occurring in an output signal of a DC amplification circuit comprising first and second DC amplifiers and first and second resistors wherein the offset error is caused by temperature instability or power supply variations, the first resistor is connected between an output of the first DC amplifier and an input of the second DC amplifier, and the second resistor is connected between the input of the second DC amplifier and ground, and the first and second resistors are match resistors for cascading the first and second DC amplifiers, said offset correction circuit comprising:an integrator for performing predetermined integration processing for integrating a separation signal separated from an output signal from the first DC amplifier to generate a correction signal and outputting the correction signal to the input of the second DC amplifier, said integrator being connected between the output of the first DC amplifier and the input of the second DC amplifier,wherein the correction signal output from the integrator is combined with the output signal from the first DC amplifier and inputted to the second DC amplifier so that the offset error occurring in the output signal of the DC amplification circuit is corrected.