Patent ID: 7262447
Filing Date: 2007-08-28
Classification: H01L,H03K

Abstract:
1. A semiconductor apparatus including a MOS transistor, said MOS transistor comprising: a semiconductor substrate configured to provide a channel region between a source and a drain; an impurity diffusion layer formed between the source and drain; and a gate electrode formed over the semiconductor substrate and over a gate oxide film; wherein a source side of the channel region has a first channel impurity density and a drain side of the channel region has a second channel impurity density different from the first channel impurity density, the difference in channel impurity density producing a threshold voltage of the source side region of the MOS transistor which is higher than that of the drain side region in a longitudinal direction of the channel region; wherein said channel region is formed from a drain side channel region being formed between the drain and the impurity diffusion layer, and the source side channel region being formed between the impurity diffusion layer and the source; wherein said gate electrode includes a drain side gate electrode formed on the drain side channel region via a drain side gate oxide film, and a source side gate electrode formed on the source side channel region via a source side gate oxide film; wherein said source side region at least includes the source, the impurity diffusion layer, the source side channel region, the source side gate oxide film, and the source side gate electrode so as to collectively form a source side MOS transistor; and wherein said drain side region at least includes the drain, the impurity diffusion layer, the drain side channel region, the drain side gate oxide film, and the drain side gate electrode so as to collectively form a drain side MOS transistor.