Patent ID: 6525954
Filing Date: 2003-02-25
Classification: H01L

Abstract:
A metal programmable ROM, comprising:a memory cell array having a plurality of wordlines and a plurality of bitlines; and a first group of transistors coupled to a first subset of wordlines of the plurality of wordlines, comprising: a first transistor having a first terminal and a second terminal, the first terminal being coupled to a bitline of the plurality of bitlines, and a first gate terminal coupled to a first wordline of the first subset of wordlines; and a second transistor having a first terminal and a second terminal, the second terminal being coupled to a first ground, and a second gate terminal coupled to a second wordline of the first subset of wordlines, wherein at least one programmed transistor in the first group of transistors includes a first terminal, a second terminal, and gate region coupled to a particular wordline of the first subset of wordlines, wherein the first terminal and the second terminal are shorted together.