Patent ID: 7554140
Filing Date: 2009-06-30
Classification: H01L

Abstract:
1. A NAND-type nonvolatile memory device comprising: first common drains and first common sources disposed alternatively in an active region, the active region defined in a semiconductor substrate and extending in at least one direction; a semiconductor pattern disposed on a first insulating layer, the semiconductor pattern extending in the at least one direction and positioned over the active region; second common drains and second common sources disposed alternatively in the semiconductor pattern in the at least one direction; a second insulating layer covering the semiconductor substrate; a source line pattern continuously penetrating the second insulating layer, the semiconductor pattern and the first insulating layer and connected to the first and second common sources; a bit line plug continuously penetrating the second insulating layer, the semiconductor pattern and the first insulating layer and connected to the first and second common drains; and seed contact structures formed within the first insulating layer, contacting the active region and the semiconductor pattern, and arranged at regular spacing in the at least one direction, wherein the bit line plug or the source line pattern is disposed at a center between separate seed contact structures that are immediately adjacent to each other.