Patent ID: 6832280
Filing Date: 2004-12-14
Classification: G06F

Abstract:
A data processor comprising:a central processing unit; a first requesting resource counted to the central processing unit, and adapted to request use of a communications bus for transmitting or receiving data; a second requesting resource coupled to the central processing unit, and adapted to request use of the communications bus for transmitting or receiving data; and a bus interface unit coupled to the central processing unit, the first requesting resource, and the second requesting resource, and adapted to be coupled to the communications bus, the bus interface unit further comprising: a priority controller coupled to receive a first request from the first requesting resource and a second request from the second requesting resource, and to assign a priority to each of the first and second request based on a threshold corresponding to one of the first requesting resource and the second requesting resource, wherein the priority controller comprises storage circuitry for storing a first resource threshold corresponding to the first requesting resource, a second resource threshold corresponding to the second requesting resource, and a control value corresponding to the first and second requesting resources.