Patent ID: 6404219
Filing Date: 2002-06-11
Classification: G01R

Abstract:
A burn-in test apparatus for examining all of the internal circuits of a semiconductor chip in an accelerated life test, the apparatus comprising:a burn-in apparatus having a pulsed power supply device for supplying a pulse voltage that varies in pulse from in a range from 0V to a burn-in voltage; and configured for testing a semiconductor chip that is supplied with the pulse voltage from the pulsed power supply device, wherein said semiconductor chip has an internal circuit and a load capacitor in said internal circuit, said internal circuit being given current stress in such a manner that a current is caused to flow through said internal circuit by charging said load capacitor when a voltage of the power supply supplied to said semiconductor chip is at a predetermined burn-in voltage, and discharging said load capacitor when the voltage of the power supply is at 0 V, the current stress being imposed on all of said internal circuits of the semiconductor chip.