Patent ID: 9214416
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A semiconductor package structure comprising: molded leadless surface mount package architecture with leadframe or laminate bottom-side sub-structures; open cavity(s) in the bottom of leadframe or laminate sub-structures; die attached into the open cavity(s) making mechanical, electrical & thermal contact to leadframe or laminate pad areas; space on top-side of sub-structure that can accommodate additional die and components forming a double sided sub-structure; over-molded top-side of sub-structure, top-side die and components, and open spaces within leadframe or laminate sub-structures; and pads on bottom-side of die and leadframe or laminate sub-structures are exposed on the bottom-side of the molded leadless surface mount package after over-mold creating external pads for mechanical, electrical and thermal connection to a mounting surface or mother-board.