Patent ID: 7184339
Filing Date: 2007-02-27
Classification: G11C

Abstract:
1. A process for inputting and/or outputting test data and/or semi-conductor component operating control data into or from a semi-conductor component, whereby the semi-conductor component comprises one or more useful data memory cells for storing useful data, and one or more test data and/or semi-conductor component operating control data registers for storing test data and/or semi-conductor component operating control data, comprising: applying a control signal to the semi-conductor component for switching over the semi-conductor component from a first to a second operating mode; and applying an address signal to the semi-conductor component, wherein in the second operating mode one or more of the test data and/or semi-conductor component operating control data registers of the semi-conductor component is addressed by the address signal, and in the first operating mode one or more of the useful data memory cells.