Patent ID: 6261849
Filing Date: 2001-07-17
Classification: H01L

Abstract:
A method of forming an integrated circuit capacitor, comprising the steps of:forming a diffusion barrier layer on a substrate;forming a first capacitor electrode on the diffusion barrier layer, opposite the substrate;selectively etching a sidewall of the diffusion barrier layer so that a recess is formed between the sidewall of the diffusion barrier layer and a sidewall of the first capacitor electrode;forming a first oxidation barrier layer comprising a first material on the sidewall of the first capacitor electrode and in the recess;forming a second oxidation barrier layer comprising a second material on the first oxidation barrier layer, said second oxidation barrier layer extending opposite the sidewall of the first capacitor electrode and in the recess; andselectively etching the second oxidation barrier layer to define an electrically insulating spacer in the recess, using the first oxidation barrier layer as an etch-stop layer.