Patent ID: 9015025
Filing Date: 2015-04-21
Classification: G06F

Abstract:
1. A computer program product for verifying processor-sparing functions, the computer program product comprising: a computer readable storage medium that is not a propagated signal the computer readable storage medium having computer usable program code embodied therewith, the computer usable program code comprising a computer usable program code configured to: execute a first simulation for a simulated processor core: block instruction dispatch; determine whether queues for the simulated processor core have drained; unblock instruction dispatch to continue the first simulation in response to determining that the queues have not drained, wherein the first simulation is continued for a random number of simulated processor cycles; create a simulation model dump of the first simulation in response to a determination that the queues have drained; execute a second simulation for the simulated processor core; create a saved state of the simulated processor core during the second simulation; quiet the second simulation; replace the state of the simulated processor core according to a state saved in the simulation model dump; set the simulated processor core to execute processor-sparing code, wherein the processor-sparing code is configured to transfer a last good state of a failed processor core to a different processor core, wherein second simulation configures the simulated processor core as the different processor core; and resume the second simulation.