Patent ID: 6097325
Filing Date: 2000-08-01
Classification: H03M

Abstract:
A synchronous sigma-delta modulator for an analog input signal comprising:an integrating filter;a decision circuit including a plurality of samplers capable of providing phase shifted output pulses, wherein said decision circuit is arranged to compare a signal from said integrating filter with a reference level and to generate the phase shifted output pulses dependent on a comparison result at synchronously clocked instants;an adder coupled to said decision circuit to determine a sum of the phase shifted output pulses; anda feedback circuit coupled to said adder to provide a value based on the sum and the analog input signal to said integrating filter, wherein said synchronous sigma-delta modulator has a specific square wave frequency at zero input signal, the square wave frequency at the zero input signal being substantially lower than half an effective sampling frequency at which the plurality of samplers operate.