Patent ID: 6451666
Filing Date: 2002-09-17
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, the method comprising the steps of:a) preparing an active matrix provided with at least one transistor, a plurality of conductive plugs electrically connected to the transistors and an insulating layer formed around the conductive plugs; b) forming barrier metals on top of the conductive plugs and forming anti-reflection coating (ARC) films on portions of the active matrix which are not covered with diffusion barriers; c) forming a seed layer on top of the active matrix; d) forming a dummy oxide layer on the seed layer; e) patterning the dummy oxide layer into a predetermined configuration, thereby exposing portions of the seed layer which are located on top of the conductive plugs; f) filling the exposed portions with a conductive material to a predetermined thickness; g) removing the dummy oxide layer; h) removing portions of the seed layer which are not covered with the conductive material, thereby obtaining lower electrodes; i) forming a capacitor dielectric on the lower electrodes; and j) forming an upper electrode layer on the capacitor dielectric layer.