Patent ID: 9053786
Filing Date: 2015-06-09
Classification: G11C,H01L

Abstract:
1. A resistance-change memory comprising: a memory cell which comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode; and a control circuit which applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading, wherein during the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse, wherein during the reading, the control circuit applies a third voltage pulse between the first electrode and the second electrode, the third voltage pulse having a same polarity as the first voltage pulse, at least one of pulse amplitude or pulse width of the third voltage pulse being smaller than that of the first voltage pulse, during the reading, the control circuit applies the second voltage pulse between the first electrode and the second electrode after applying the third voltage pulse.