Patent ID: 9224444
Filing Date: 2015-12-29
Classification: G06F,G11C,Y02D

Abstract:
1. A method for synchronizing a clock signal data path, a write strobe signal data path, and a write data signal data path, comprising: determining, by a memory controller, an amount of phase shift between the clock signal data path and the write strobe signal data path and between the clock signal data path and the write data signal data path; gating, by the memory controller, a clock signal to generate strobe clock signals that are phase shifted by one or more of a plurality of phase shifts in accordance with the amount of phase shift; applying, by the memory controller, a fine phase shift to the strobe clock signals where the strobe clock signals have an overall phase shift that is approximately equal to the amount of phase shift, where the overall phase shift comprises the one or more plurality of phase shifts applied by the gating and the fine phase shift; and synchronizing, by the memory controller, a launch of the clock signal data path, the write strobe signal data path, and the write data signal data path using the strobe clock signals with the overall phase shift.