Patent ID: 6456217
Filing Date: 2002-09-24
Classification: H03M

Abstract:
A digital/analog converter for (m+n)-bit digital input data comprising:a sigma-delta type pulse modulation circuit for receiving lower-order n bits of said digital input data to generate 1-bit data corresponding to said lower-order n bits in synchronization with a clock signal, said sigma-delta type pulse modulation circuit including a feedback loop with a signal transformer that transforms said 1-bit data into n-bit digital data which is combined with subsequent input data received by said sigma-delta type pulse modulation circuit; an m-bit adder, connected to said sigma-delta type pulse modulation circuit, for adding said 1-bit data to upper-order m bits of said digital input data; an m-bit digital/analog conversion section, connected to said m-bit adder, for performing a digital-to-analog conversion upon an output value of said m-bit adder; and a low-pass filter, connected to said m-bit digital/analog conversion section, for removing a high frequency component of an output value of said m-bit digital/analog conversion section to generate an analog data corresponding to said (m+n)-bit digital input data.