Patent ID: 7955947
Filing Date: 2011-06-07
Classification: H01L

Abstract:
1. A method of forming an isolation structure in a semiconductor substrate comprising: depositing a first mask layer on the substrate; depositing a second mask layer on the first mask layer; patterning the second mask layer to form a first opening having a first width; etching the first mask layer through the first opening to form a second opening having a width substantially equal to the first width; etching the substrate through the second opening to form a first trench having a width substantially equal to the first width; removing the second mask layer; depositing a third mask layer over a remaining portion of the first mask layer; patterning the third mask layer to form a third opening having a second width, the second width being unequal to the first width; etching the first mask layer through the third opening to form a fourth opening having a width substantially equal to the second width; etching the substrate through the fourth opening to form a second trench having a width substantially equal to the second width; depositing a first dielectric material so as to completely fill the first and second trenches; and removing a portion of the first dielectric material such that surfaces of the first dielectric material in the first and second trenches, respectively, are located at a first level, the first level being no higher than a plane substantially coplanar with a surface of the substrate, wherein removing a portion of the first dielectric material comprises removing a portion of the first dielectric material such that surfaces of the first dielectric material in the first and second trenches, respectively, are located below a plane defined by the surface of the substrate, thereby forming a first recess in the first trench and a second recess in the second trench.