Patent ID: 7320482
Filing Date: 2008-01-22
Classification: G05F

Abstract:
1. A semiconductor memory device which has a power supply circuit, the power supply circuit comprising: a differential amplifier including a first input terminal, a second input terminal, and an output terminal, being supplied with a high supply voltage and a low supply voltage having a voltage lower than the high supply voltage, which amplifies a difference of an input signal from the first input terminal and an input signal from the second input terminal and outputs the difference as an output signal; a transistor that is controlled on the basis of the output signal, and generates a voltage different from the high supply voltage and the low supply voltage; a first resistor connected between the output terminal of the transistor and the second input terminal of the differential amplifier; a second resistor connected between the second input terminal of the differential amplifier and the low supply voltage and forms a voltage-dividing resistor stage with the first resistor, and a memory cell array having a plurality of memory cells coupled to the output terminal of the transistor, wherein the power supply circuit includes a first phase compensating capacitor whose one end is coupled to the low supply voltage and the other end is connected to the voltage-dividing resistor stage and the second input terminal of the differential amplifier.