Patent ID: 7711899
Filing Date: 2010-05-04
Classification: G06F

Abstract:
1. An information processing device, comprising: a plurality of processing units; a plurality of cache memories corresponding to said plurality of processing units, storing temporarily data read by said plurality of processing units from a main memory in combination with tag information indicating a state of said data that will be stored; and a system controller for controlling the access of said plurality of processing units to said main memory, comprising; a tag copy unit holding a copy of the tag information that will be stored in said cache memories, a plurality of write cues, corresponding to said plurality of processing units, storing write requests outputted respectively by said plurality of processing units, and a store buffer storing the arbitration results relating to a plurality of write requests that will be stored in said plurality of write cues, and said system controller, in the case where said tag information contained in said cache memories and said tag information contained in said tag copy unit are asynchronous when a read request from one processing unit of said plurality of processing units is inputted, searches said plurality of write cues to find whether a write request relating to the address corresponding to said read request has been inputted by another processing unit that is different from said one processing unit and, when determining that a request has been inputted in any of said plurality of write cues, updates the main memory using the data contained in the write request from the write cue inputting the write request relating to the address corresponding to said read request to the one processing unit without waiting for the arbitration relating to the store buffer.