Patent ID: 8575495
Filing Date: 2013-11-05
Classification: H01L,H05K,Y10T

Abstract:
1. A wiring substrate comprising: a substrate body; an uppermost layer wiring formed on the substrate body and including a first wiring layer part, wherein the first wiring layer part is independently formed on the substrate body and includes an upper surface and a side wall, the upper surface forming a recognition mark; and an insulation layer formed on the substrate body and the uppermost layer wiring, wherein the insulation layer includes a recess which entirely exposes the upper surface of the first wiring layer part, wherein the insulation layer further includes a lower side wall and an upper side wall, the lower side wall being adjacent to the side wall of the first wiring layer part and surrounding the side wall of the first wiring layer part, and the upper side wall forming a part of the recess, and wherein the recess includes a bottom surface that is larger than the upper surface of the first wiring layer part, wherein the bottom surface of the recess includes a curved portion curved in a concaved manner from an edge of the recognition mark to the upper side wall of the insulation layer.