Patent ID: 7084026
Filing Date: 2006-08-01
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device comprising the steps of: a) forming in an upper part of a semiconductor substrate a first semiconductor layer including a first semiconductor region into which an impurity of a first conductivity type is doped and a second semiconductor region into which an impurity of a second conductivity type is doped as a complementary device; b) forming on the first semiconductor layer a second semiconductor layer and a third semiconductor layer which is formed of a semiconductor having a wider band gap than the second semiconductor layer; c) forming a mask on part of the third semiconductor layer located in the first semiconductor region, and then introducing an impurity of the first conductivity type into part of the third semiconductor layer located at least in the second semiconductor region, using the mask; d) removing the mask and then forming a gate insulating film and a gate electrode on part of the third semiconductor layer located in the first semiconductor region and part of the third semiconductor layer located in the second semiconductor region, respectively; and e) forming source/drain regions of the second conductivity type and source/drain regions of the first conductivity type in the first semiconductor region and in the second semiconductor region, respectively, by implanting ions of respective impurities into the first, second and third semiconductor layers using each of the gate electrodes as a mask.