Patent ID: 8934736
Filing Date: 2015-01-13
Classification: G06K,G06T

Abstract:
1. An image processing apparatus connectable to a main memory in which a plurality of pixel values of unconverted image is stored and a cache memory comprising a plurality of cache blocks, each of the cache blocks comprising a plurality of cache lines, the apparatus comprising: a counter configured to determine a coordinate within converted image according to a predetermined execution sequence; a coordinate determination module configured to determine a plurality of coordinates within unconverted image of the pixel values of unconverted image necessary to calculate a pixel value of converted image corresponding to the coordinate within converted image; a memory controller configured to obtain the pixel values of unconverted image from the main memory in units of the cache lines and transfer the obtained pixel values of unconverted image to the cache blocks corresponding to each of the coordinates within unconverted image; a cache access module configured to read out all the pixel values of unconverted image necessary to calculate the pixel value of converted image from the cache blocks; a pixel value calculator configured to calculate the pixel value of converted image by referring to the pixel values of unconverted image read out by the cache access module; and an output module configured to output the pixel value of converted image, wherein: