Patent ID: 8190951
Filing Date: 2012-05-29
Classification: G06F

Abstract:
1. A data processing apparatus, comprising: processing circuitry for performing data processing operations; a cache storage having a plurality of cache records for storing data values for access by the processing circuitry when performing said data processing operations, each cache record for storing one or more data values and an associated address indication for said one or more data values; a replicated address storage having a plurality of entries, each entry having a predetermined associated cache record within the cache storage and being arranged to replicate the address indication stored in said associated cache record; first error detection circuitry associated with said cache storage; a cache location avoid storage having at least one record, the cache location avoid storage being associated with the first error detection circuitry; responsive to a cache record of the cache storage being accessed, the first error detection circuitry being arranged to determine whether a cache record error exists for said accessed cache record; on detection of said cache record error, said cache location avoid storage being arranged to cause one of said at least one record to be allocated to store a cache record identifier for the accessed cache record; second error detection circuitry associated with said replicated address storage; responsive to an entry of the replicated address storage being accessed, the second error detection circuitry being arranged to determine whether an entry error exists for said accessed entry; on detection of said entry error, the second error detection circuitry preventing use of the address indication currently stored in the accessed entry, and issuing a command to said cache location avoid storage to cause one of said at least one record of said cache location avoid storage to be allocated to store the cache record identifier for the cache record of said cache storage associated with said accessed entry of the replicated address storage; and any cache record whose cache record identifier is stored in the cache location avoid storage being logically excluded from the plurality of cache records of the cache storage for the purposes of subsequent operation of the cache storage.