Patent ID: 6262748
Filing Date: 2001-07-17
Classification: G06T,G09G

Abstract:
A frame buffer memory comprising:two or more banks of memory configured to store pixel data usable to form a visual image on a display device;a pixel cache coupled to send and receive pixel data to and from said two or more banks of memory, wherein said pixel cache provides faster access to pixel data than said banks of memory;a pixel ALU coupled to receive pixel data from said pixel cache and from an external source, wherein the pixel ALU is configured to perform a pixel processing function on said pixel data, wherein the pixel ALU is configured to transfer results from said pixel processing function to said pixel cache; andone or more video buffers coupled to said banks of memory, wherein said video buffers are configured to shift out said stored pixel data for display on said display device, wherein said banks of memory, said pixel cache, said pixel ALU, and said video buffers are each a portion of a single frame buffer memory chip.