Patent ID: 7266169
Filing Date: 2007-09-04
Classification: H03K,H03L

Abstract:
1. A phase interpolator comprises: plurality of clock phase input sections, wherein each of the plurality of clock phase input sections is coupled to receive one of a plurality of reference clock phases; plurality of clock phase switching sections operably coupled to the plurality of clock phase input sections; plurality of current sources operably coupled to the plurality of clock phase input sections via the plurality of clock phase switching sections based on a phase control signal having multiple bits, wherein a total number of current sources determines a phase granularity selected between the reference clock phases, wherein each of the current sources is to be switched to one or more corresponding clock phase switching sections based on a particular phase of the phase granularity identified by the phase control signal, but in which all of the plurality of current sources are switched on through one or two clock phase switching sections at any particular phase of the phase granularity; and load coupled to the plurality of clock phase input sections to receive current from all of the plurality of current sources at each phase granularity to provide a phase adjusted clock signal.