Patent ID: 6455402
Filing Date: 2002-09-24
Classification: H01L,Y10S

Abstract:
A method of fabricating a semiconductor device comprising:selectively forming at least one insulating oxide layer in a semiconductor substrate having a first conductivity type; performing a blanket ion implantation with first dopants having a second conductivity type at a second energy on the entire semiconductor substrate so as to simultaneously form a counter-doped layer of a first retrograde well having the first conductivity type and an upper layer of a second retrograde well having the second conductivity type; performing first serial ion implantations with the first dopants at a first energy and a third energy so as to sequentially form a lower layer and a threshold voltage controlling layer of the second retrograde well, respectively, wherein the first energy is greater than the second energy, and wherein the third energy is smaller than the second energy; and performing second serial ion implantations with second dopants having the first conductivity type at a fourth energy, a fifth energy and a sixth energy so as to sequentially form a lower layer, an upper layer and a threshold voltage controlling layer of the first retrograde well, respectively, wherein the second dopants implanted to form the upper layer of the first retrograde well have a dose greater than that of the first dopants blanket-implanted to form the counter-doped layer of the first retrograde well, such that the first dopants in the counter-doped layer are annihilated by the second dopants in the upper layer of the first retrograde well.