Patent ID: 7713873
Filing Date: 2010-05-11
Classification: H01L

Abstract:
1. A method of forming a contact structure in a semiconductor device, comprising: providing a semiconductor substrate including active regions and word lines crossing the active regions; forming a first interlayer dielectric layer on the semiconductor substrate; forming direct contact plugs extending through the first interlayer dielectric layer to contact selected ones of the active regions; forming bit line structures on the first interlayer dielectric layer and crossing the word lines that are coupled to the selected ones of the active regions by the direct contact plugs; forming a second interlayer dielectric layer on the semiconductor substrate including the bit line structures; forming barrier patterns extending in parallel with bit line structures and into the second interlayer dielectric layer, wherein the barrier patterns extend into the second interlayer dielectric layer; forming mask patterns overlying an entirety of top surfaces of the direct contact plugs on the second interlayer dielectric layer and the bit line structures; etching the second and first interlayer dielectric layers using the mask patterns, the barrier patterns and the bit line structures as an etching mask to form buried contact holes; and forming buried contact plugs in the buried contact holes, wherein an upper surface of the buried contact plugs is at a same level as an upper surface of the barrier patterns.