Patent ID: 7005303
Filing Date: 2006-02-28
Classification: C23C,H01L

Abstract:
1. A CVD process for depositing bismuth on a substrate from a bismuth precursor, comprising using as said bismuth precursor tris(β-diketonate) bismuth, and carrying out said CVD process at a deposition temperature not exceeding 600° C. wherein the CVD process is used for the manufacturing of a member selected from the group consisting of: a) a thin film ferroelectric capacitor; b) ferroelectric memory; c) a bismuth-containing ferroelectric film in a memory cell structure having a W or poly-Si plug as a connection between the drain of a MOS-FET and the bottom electrode; d) a bismuth-containing ferroelectric film in a memory cell structure having a layer or layers between a bottom electrode and a plug which act as either an adhesion layer and/or a diffusion barrier; e) a bismuth-containing ferroelectric film in a memory cell structure having a layer between the bottom electrode and the ferroelectric thin film selected from the group consisting of seed layers, conducting layers, paraelectric layers, and dielectric layers: f) a strontium bismuth tantalate (SBT) film on top of a Pt bottom electrode connected by a plug with a transistor located in the substrate; g) strontium bismuth tantalate (SBT) film on top of a Pt bottom electrode connected by a plug with a transistor located in the substrate and having a Pt top electrode on the SBT layer; h) a thin film ferroelectric SBT capacitor; and i) a ferroelectric field effect transistor.