Patent ID: 9036441
Filing Date: 2015-05-19
Classification: G11C

Abstract:
1. An anti-fuse circuit, comprising: an anti-fuse array including one or more anti-fuse blocks including a first anti-fuse block having a plurality of anti-fuse cells, the anti-fuse array configured to store anti-fuse program data; a data storage circuit configured to receive and store the anti-fuse program data from the anti-fuse array through one or more data buses; and a first selecting circuit configured to output anti-fuse program data of a selected anti-fuse block of the one or more anti-fuse blocks in response to a first selection signal, wherein the anti-fuse program data is configured to be monitored outside of the anti-fuse circuit while the anti-fuse program data is transmitted from the anti-fuse array to the data storage circuit.