Patent ID: 6399415
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method of packaging integrated circuits comprising:fabricating an array of leadless integrated circuit devices using a conductive substrate panel having a matrix of device areas thereon, each device area including a plurality of contacts formed from the substrate panel and a die, each die being electrically connected to associated contacts within the same device area, wherein the conductive substrate panel further defines a plurality of tie bars that support the contacts during fabrication; molding at least one cap over the substrate, each cap being arranged to encapsulate an array of the device areas, thereby forming a molded substrate structure having an array of packaged devices, wherein molding material used in the molding serves to hold the contacts and die in place relative to one another; and removing at least portions of the tie bars to electrically isolate the contacts from one another after the molding operation while leaving sufficient portions of the molded structure intact to facilitate handling the structure in panel form.