Patent ID: 7170321
Filing Date: 2007-01-30
Classification: H03K

Abstract:
1. A gate drive circuit providing negative offset comprising: (a) an isolator stage capable of introducing a voltage waveform with positive values and providing electrical isolation; (b) a driver stage electrically coupled to said isolator stage, said driver stage boosting power of said voltage waveform to produce a gate drive signal with positive values; (c) an offset stage electrically coupled to said driver stage, said offset stage modifying said gate drive signal to include negative values; (d) a shaping stage electrically coupled to said offset stage, said shaping stage modifying said gate drive signal so as to square transitions; and (e) a switching stage comprising a voltage controlled device electrically coupled to said shaping stage and said isolator stage, said driver stage and said offset stage electrically coupled between said switching stage and said isolator stage.