Patent ID: 8583897
Filing Date: 2013-11-12
Classification: G06F

Abstract:
1. A register file comprising a plurality of register entries for storing data values for use in the execution of data processing instructions permitting parallel execution of primary and secondary data processing instructions which instructions require write access to the register file, said register file comprising: at least one write port and at least one read port; circuitry, responsive to a write request in response to the execution of said primary data processing instruction, configured to update one of said plurality of register entries identified by an address specified by said write request with a data value specified by said write request; and further circuitry, responsive to a control signal generated in response to the execution of the secondary data processing instruction, configured to set at least a portion of a predetermined one of said plurality of register entries to a predetermined value without using any write port and without using any read port, wherein said further circuitry is hardwired to generate said predetermined value.