Patent ID: 7129098
Filing Date: 2006-10-31
Classification: G11C,H01L

Abstract:
1. A method for fabricating a magnetoelectronics memory element, the method comprising: depositing a fixed magnetic portion overlying a digit line; forming a tunnel barrier portion overlying said fixed magnetic portion; depositing a first magnetic portion overlying said tunnel barrier portion, said first magnetic portion comprising a material having a magnetization that is no greater than a magnetization of Ni forming an anti-ferromagnetic coupling layer overlying said first magnetic portion; and depositing a second magnetic portion overlying said anti-ferromagnetic coupling spacer layer, said second magnetic portion comprising a material having a magnetic moment that is no greater than a magnetization of Ni forming a bit line overlying said second magnetic portion; wherein said first magnetic portion, said anti-ferromagnetic coupling layer, and said second magnetic portion form a free SAF structure and wherein said first magnetic portion and said second magnetic portion are formed such that said free SAF structure is substantially balanced and has a resultant magnetic moment oriented at an angle with respect to said digit line and said bit line.