Patent ID: 6693550
Filing Date: 2004-02-17
Classification: H04L

Abstract:
A visual indicator array comprising:(a) (MÃ—N)/2 pairs of indicator devices arranged in a two-dimensional, linear array having M rows and N columns, where M is an integer greater than or equal to two, and N is an integer greater than or equal to two; (b) M/2 enable lines, each connected to all of the indicator devices in two of the M rows to deliver enable signals to the indicator devices in the two rows; (c) N status lines, each connected to all of the indicator devices in one of the N columns; (d) MÃ—N status signals containing status information to be displayed visually by the indicator devices; (e) N selectors, each of which is connected to a corresponding one of the status lines and is configured to: (1) receive M of the status signals; and (2) selectively apply the M status signals to the corresponding status line one at a time; and (f) a buffer circuit that drives one of the M/2 enable lines at a time, wherein, for each of the M/2 enable lines, the buffer circuit is configured to sink current for some portion of a timing cycle, to source current for some portion of the timing cycle, and to provide a high impedance output for the remainder of the timing cycle, and wherein the buffer circuit and selectors are operative to activate multiple indicators connected to one of said enable lines simultaneously in response to multiple corresponding status signals when the buffer circuit sources or sinks current to said enable line.