Patent ID: 6110799
Filing Date: 2000-08-29
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device using a trench for conductor formation comprising the steps of:(a) providing a semiconductor of a first polarity;(b) providing a first mask for a surface of the semiconductor to thereby define an active region on the semiconductor;(c) implanting an impurity of a second semiconductor polarity in the surface exposed by the active region mask and annealing the semiconductor to drive in the second polarity semiconductor impurity to thereby create a second polarity region in the semiconductor;(d) implanting an impurity of the first polarity in the channel region and annealing the semiconductor to drive the first polarity impurity into the channel region to thereby create a first polarity surface region adjacent the surface of the semiconductor;(e) providing a second mask defining a trench region on the exposed surface;(f) forming first and second spaced apart trenches extending downwardly through the second mask, the source region and the channel region into the semiconductor;(g) forming a gate oxide layer over the exposed upper surface of the semiconductor and the walls and bottom of the first and second trenches;(h) providing a layer of polysilicon over the gate oxide layer completely filling the first and second trenches;(i) providing a third mask to thereby define an area larger than the active region to protect the polysilicon layer for later gate contact;(j) etching back the polysilicon layer overlying the gate oxide in the area not protected by the third mask to leave the trenches filled with polysilicon;(k) forming a layer of BPSG over the exposed surface of the semiconductor, gate oxide layer and first and second trenches;(l) forming a fourth mask over the BPSG layer defining a third trench intermediate the first and second trenches;(m) doping the semiconductor at the bottom of the third trench with an impurity of the second polarity to thereby create a density greater than the density of the impurity of the second polarity in the channel region to thereby create a high concentration region adjacent the bottom of the third trench; and(n) forming a metal layer overlying both the BPSG layer and the area of the third trench to thereby establish electrical contacts with the first polarity layer and the second polarity layer.