Patent ID: 6674313
Filing Date: 2004-01-06
Classification: H03K,H04L

Abstract:
An output buffer circuit having a function of accomplishing pre-emphasis, and transmitting a logic signal to a transmission line acting as a distributed parameter circuit, comprising:(a) a first buffer which receives a first logic signal defining a logical value of a logic signal to be transmitted to said transmission line, and drives said transmission line; and (b) a second buffer which receives a second logic signal having a predetermined logical relation with said first logic signal, and cooperates with said first buffer to drive said transmission line, wherein said second buffer is activated in accordance with whether a pre-emphasis step is to be carried out or not, wherein said second buffer has an output impedance higher than an output impedance of said first buffer. said first buffer is comprised of (a1) a first p-channel field effect transistor having a current path between a higher voltage source of two voltage sources and an ouput terminal, and having a gate electrode electrically connected to a first input terminal, and (a2) a first n-channel field effect transistor having a current path between a lower voltage source of said two voltage sources and said output terminal, and having a gate electrode electrically connected to said first input terminal, said second buffer is comprised of (b1) a second p-channel field effect transistor having a current path between said higher voltage source and said output terminal, and having a gate electrode electrically connected to a second input terminal, and (b2) a second n-channel field effect transistor having a current path between said lower voltage source and said output terminal, and having a gate electrode electrically connected to said second input terminal, said first p-channel field effect transistor has a driving capacity higher than a driving capacity of said second n-channel field effect transistor, and said first n-channel field effect transistor has a driving capacity higher than a driving capacity of said second p-channel field effect transistor, and wherein said second buffer is comprised of one or more tri-state type buffer(s).