Patent ID: 8865562
Filing Date: 2014-10-21
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming first gate lines and second gate lines over a semiconductor substrate, wherein each of the second gate lines has a greater width than each of the first gate lines; forming a first insulating layer surrounding top and side walls of the first and the second gate lines so that first air gaps are formed between the first and second gate lines adjacent to each other and between the first gate lines; forming a first reaction region in the first insulating layer by diffusing an etchant to a depth less than a target depth from a surface of the first insulating layer; removing the first reaction region; forming second reaction regions in the first insulating layer by diffusing the etchant to the target depth from the surface of the first insulating layer; and removing the second reaction regions so that a portion of each of the first and the second gate lines is exposed.