Patent ID: 8013386
Filing Date: 2011-09-06
Classification: H01L

Abstract:
1. A semiconductor device, comprising: an STI (Shallow Trench Isolation) region formed on a semiconductor substrate; an active region surrounded by the STI region; a gate trench formed in a predetermined direction to cross the active region; a gate insulating film formed on a side surface of the gate trench; an insulating film that is formed on a bottom of the gate trench and is thicker than the gate insulating film; and a gate electrode, at least a part of which is formed in the gate trench, wherein said semiconductor substrate present in the active region includes a first portion located on both sides of the gate trench with respect to the predetermined direction and a second portion located between a side surface of the STI region and the side surface of the gate trench, wherein said first portion of the semiconductor substrate functions as a source region and a drain region, and said second portion of the semiconductor substrate functions as a channel region, and wherein the insulating film formed on the bottom of the gate trench is set to have a thickness within a degree such that no channel is formed in the semiconductor substrate located on the bottom of the gate trench.