Patent ID: 8344454
Filing Date: 2013-01-01
Classification: H01L

Abstract:
1. A semiconductor device comprising a field effect transistor over a main surface of a semiconductor substrate having an SOI structure, the semiconductor device comprising: a well region of a first conductivity type formed over the main surface of the semiconductor substrate and extending in a first direction along the main surface of the semiconductor substrate; a gate electrode formed over the well region via an insulating film and extending in the first direction; source and drain regions of a second conductivity type formed in the main surface of the semiconductor substrate along the first direction to sandwich the well region; a gate wiring formed over the semiconductor substrate in the same layer as the gate electrode and integrated with the gate electrode; a coupling layer of the first conductivity type formed in the well region in a region overlapping with the gate wiring in a plane of the semiconductor substrate, electrically coupled to the well region, and having a low resistance than the well region; and a first wiring formed above the gate electrode and the gate wiring and supplying a predetermined potential to the well region, wherein the coupling layer and the first wiring are provided in a first hole portion formed in the gate wiring in a region where the coupling layer and the semiconductor substrate planarly overlap with each other and are electrically coupled with each other via a coupling member insulated from the gate wiring.