Patent ID: 9203426
Filing Date: 2015-12-01
Classification: H03M

Abstract:
1. A method for estimating static mismatch errors of a digital-to-analog converter (DAC) comprising of a plurality of unit elements (UEs), each unit element configured for generating currents having complementary values, and the DAC provides feedback for an analog-to-digital converter (ADC), the method comprises: forcing a first UE of the UEs to output an opposite value of a default value of the first UE; storing a first output value of the ADC while the first UE is forced to output the opposite value of the default value of the first UE; forcing a second UE of the UEs to output an opposite value of a default value of the second UE; storing a second output value of the ADC while the second UE is forced to output the opposite value of the default value of the second UE; and determining a first relative error between the first UE and the second UE based on the first output value and the second output value.