Patent ID: 8934341
Filing Date: 2015-01-13
Classification: H04L

Abstract:
1. An assembly comprising an apparatus for receiving and storing data packets and a plurality of de-queuing processors or processes, the apparatus comprising a storing unit, a controlling unit and a plurality of data receiving and storing elements, wherein: the storing unit is configured to hold at least part of a plurality of data packets in a plurality of queues thereof, each queue comprising a number of storing elements each being defined by an address, each processor or process is configured to de-queue data from a first group of the queues, the queues of the individual first groups being non-overlapping, the processors/processes being configured to forward information to the controlling unit in relation to a de-queuing of data from a queue, each data receiving and storing unit comprises a first processor configured to: the controlling unit comprises a second processor configured to: for a received/accessed data packet, determining a second group of queues, each second group of queues comprising a queue from each first group of queues, the queues of the second groups of queues being non-overlapping, if the fill level of a presently selected first queue of the determined second group exceeds a predetermined level, selecting a second queue of the determined second group, selecting the address as an address of the selected queue of the second group, the process/processor relating to the selected second queue being configured to not process this queue, until the selected first queue with the exceeded predetermined level is empty.