Patent ID: 7049871
Filing Date: 2006-05-23
Classification: H03K

Abstract:
1. A flip-flop, comprising: a clock input for the application of a clock signal; a data input for the application of a data signal; a non-inverted output; an inverted output; a data acceptance unit having a first switching element and a second switching element; a storage unit having first and second inverter circuits connected in a feedback loop to provide feedback between said first and second inverter circuits; an activation input to activate the flip-flop with an activation signal, said first switching element and said second switching element being activated or inhibited, respectively, dependent upon the clock signal, the data signal present at said data input, and the activation signal, causing information of said storage unit to remain stored independently of the clock signal present and the data signal present, in an event of a deactivated activation signal; said first inverter circuit having: said second inverter circuit having: said data acceptance unit allocating, dependent upon the data signal present and the clodk signal present, a predetermined programming potential either to said first input or to said second input and to apply no potential to the respective other input of said first and second inverter circuits, said first switching element of said data acceptance unit applying said predetermined programming potential to said first input dependent upon the clock signal and the data signal, and said second switching element of said data acceptance unit applying said predetermine programming potential to said second input dependent upon the clock signal and the data signal.