Patent ID: 6930001
Filing Date: 2005-08-16
Classification: H01L

Abstract:
1. A method for manufacturing a NAND flash device, comprising the steps of: providing a semiconductor substrate on which a drain select transistor for selecting a drain terminal of a flash cell and a source select transistor for selecting a source terminal of the flash cell, wherein the drain select transistor and the source select transistor have drain region and a source region on the surface of the semiconductor substrate; forming a first interlayer insulating film over the semiconductor substrate; removing a portion of the first interlayer insulating film to form a source line contact hole, wherein the source region of the source select transistor is exposed at the bottom of the source line contact hole; removing a portion of the first interlayer insulating film to form a drain contact hole, wherein the drain region of the drain select transistor is exposed at the bottom of the drain contact hole; forming a source line plug and a drain contact plug in the source line contact hole and the drain contact hole, respectively; forming a second interlayer insulating film over the semiconductor substrate including the source line plug and the drain contact plug; forming an etch-stop layer on the second interlayer insulating layer; forming a third interlayer insulating film on etch-stop layer; selectively etching the third interlayer insulating film, the etch-stop layer and portions of the second interlayer insulating layer and forming a first trench over the drain contact plug and a second trench over the source line plug, wherein the first trench is larger than the second trench; selectively removing the second interlayer insulating layer and forming a first via hole under the first trench and the second via hole under the second trench, wherein the first via hole exposes the drain contact plug and the second via hole exposes the source line plug; filling the first trench, the second trench, the first via hole and the second via hole with a metal film; and forming a bit line passing the first trench and the first via hole and a common source line contact passing the second trench and the second via hole by polishing the metal film.