Patent ID: 7344905
Filing Date: 2008-03-18
Classification: B82Y,H01S

Abstract:
1. A method for forming a semiconductor substrate, the method comprising: providing a single semiconductor wafer having a first end and a second end in opposition to one another, a longitudinal axis formed between the first end and the second end, a top surface and a bottom surface in opposition to one another, a plurality of quantum wells disposed in the semiconductor wafer, and the plurality of quantum wells having a given bandgap; depositing a first dielectric cap to entirely cover the top surface of the single semiconductor wafer the covered top surface defining a first given portion; and rapid thermal annealing the single semiconductor wafer and the first dielectric cap deposited on the top surface of the single semiconductor material so as to tune the plurality of quantum wells disposed in the semiconductor wafer beneath the first dielectric cap from the given bandgap to a first tuned bandgap; wherein the first tuned bandgap is greater than the given bandgap; wherein the top surface of the single semiconductor is entirely covered by the first given portion; and further comprising the steps of depositing a second dielectric cap on the top surface of the single semiconductor wafer subsequent to the step of rapid thermal annealing the first dielectric cap, the second dielectric cap configured to cover a second given portion of the top surface of the single semiconductor wafer, the second given portion having a smaller surface area than the first given portion, and rapid thermal annealing of the second dielectric cap deposited on the top surface the single semiconductor material to further tune the plurality of quantum wells disposed beneath the second dielectric cap from the first tuned bandgap to a second tuned bandgap, wherein the second tuned bandgap is greater than the first tuned bandgap.