Patent ID: 6718441
Filing Date: 2004-04-06
Classification: G06F

Abstract:
A method comprising:formatting a first memory access from a central processing unit for a first information associated with a first address into a request packet; altering at least one information packet of the request packet so that the request packet requests the first information and a second information being prefetch information associated with a speculative address; incrementing the first address to produce the speculative address; temporarily storing at least the first information in an output buffer before transferring the first information to the central processing unit; storing the second information in at least one input buffer; outputting one of the first information and the second information to the output buffer by a select element; receiving in series the first information and the second information; and outputting the first information to the select element and outputting the second information to the at least one input buffer by a de-select element using an address select circuit.