Patent ID: 8214698
Filing Date: 2012-07-03
Classification: G06F

Abstract:
1. A solid state storage system comprising: a memory area including a plurality of memory blocks; a buffer configured to store address mapping and location information of the memory blocks; and a memory controller configured to control a failure associated with a first bad page in a bad block of the memory blocks, the memory controller configured to store link information of a prior valid page into the buffer wherein the prior valid page is that page in the bad block which was successfully operated on immediately prior to the failure in the first bad page, the memory controller is configured to allocate a first physical block to resume operations of the bad block past the first bad page by copying all remaining portions of the bad block past the first bad page into the first physical block, the memory controller is configured to update and to store mapping information of logical and physical addresses in the buffer as a first link index such that the first link index is associated with the remaining portions of the bad block past the first bad page which are copied in the first physical block, and the memory controller is configured to merge together those valid pages from among the bad block into a final physical block by merging together all prior successfully operated valid pages from among the bad block which are associated with successful operations prior to the failure in the bad page of the bad block to be merged with any subsequently successfully operated valid pages which are associated with successful operations subsequently to the failure in the first bad page of the bad block.