Patent ID: 8397010
Filing Date: 2013-03-12
Classification: G06F

Abstract:
1. A network device, comprising: a plurality of requestors to: a memory that includes a plurality of memory parts, each memory part, of the plurality of memory parts, including a plurality of memory banks; and a control block to: identify, for each address, of the addresses included in the received requests, a memory bank, of the plurality of memory banks, based on the second address space, generate, for each identified memory bank, of the identified memory banks, a bank request vector that identifies a requestor, of the plurality of requestors, from which a request, intended for the identified memory bank, was received, generate a bank availability vector that is based on an availability of each identified memory bank, of the identified memory banks, generate a result vector that is based on the bank request vector and the bank availability vector, identify, based on the result vector, a set of requests, of the received requests, that are each associated with an available memory bank, of the available memory banks, when identifying the set of requests, the control block is to: send each of the requests, of the identified set of requests, to the identified memory bank, associated with each request during a single clock cycle.