Patent ID: 6636075
Filing Date: 2003-10-21
Classification: H01L

Abstract:
A method for fabricating a semiconductor integrated circuit device, the method comprising:forming a first-conductivity-type region and a second-conductivity-type region over a semiconductor substrate; forming a second-conductivity-type MOSFET for constituting a CMOSFET arrangement and a first switching transistor comprising a first MOSFET switch, different from the second-conductivity-type MOSFET, in the first-conductivity-type region; forming a first-conductivity-type MOSFET for constituting a CMOSFET arrangement and a second switching transistor comprising a second MOSFET switch, different from the first-conductivity-type MOSFET, in the second-conductivity-type region; forming a first power-supply-voltage line to which a first power supply voltage is to be applied and to electrically connect with a source of the second-conductivity-type MOSFET for constituting the CMOSFET arrangement; forming a second power-supply-voltage line to which a second power supply voltage is to be applied and to electrically connect with a source of the first-conductivity-type MOS FET for constituting the CMOSFET arrangement; forming a third line to electrically connect with one of a source and drain of the first MOSFET switch and the first-conductivity-type region; forming a fourth line to electrically connect with one of a source and drain of the second MOSFET switch and the second-conductivity-type region; forming a first control signal line to electrically connect with a gate electrode of the first MOSFET switch; forming a second control signal line to electrically connect with a gate electrode of the second MOSFET switch; applying the first and second power supply voltages to the first and second power-supply-voltage lines, respectively; applying a first and a second control signal to the first and second control signal lines, respectively, to turn off the first and second switching transistors; controlling threshold voltages of the first and second-conductivity-type MOSFETs by applying a third voltage and a fourth voltage to the third line and the fourth line, respectively, so that the threshold voltages of the first and the second-conductivity-type MOSFETs when the first and second switching transistors are turned off are higher in magnitude than that of the first and second-conductivity-type MOSFETs when the first and second switching transistors are turned on; and after the controlling of the threshold voltages thereof, performing a test of the first and the second-conductivity-type MOSFETs.