Patent ID: 8129214
Filing Date: 2012-03-06
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: forming an interlayer insulating layer on a semiconductor substrate; forming an opening within the interlayer insulating layer wherein the opening exposes the semiconductor substrate; sequentially forming first and second conductive layer patterns to cover a bottom surface and a sidewall of the opening; forming a buried insulating pattern within the opening and on the first and second conductive layer patterns; forming a phase change material pattern on the first and second conductive layer patterns, wherein the phase change material pattern contacts a top surface of the second conductive layer pattern and is spaced apart from a top surface of the first conductive layer pattern; forming a buffer pattern between the top surface of the first conductive layer pattern and a bottom surface of the phase change material pattern, wherein the buffer pattern comprises an oxide containing at least one element constituting the first conductive layer pattern; and forming a conductive plug electrically connected to the phase change material pattern, wherein the buffer pattern comprises titanium oxide, tantalum oxide or a combination thereof.