Patent ID: 6620681
Filing Date: 2003-09-16
Classification: H01L

Abstract:
In a self-alignment method of forming a floating gate and associated active region in a substrate of a semiconductor memory device, a method comprising:forming a gate oxide layer on the substrate; forming a first conductive layer on the gate oxide layer; forming a buffer oxide layer on the first conductive layer; forming a stopping layer on the buffer oxide layer; patterning the stopping layer and buffer oxide layer and forming a stopping layer pattern and a buffer oxide layer pattern; patterning the first conductive layer to form a floating gate layer as a first conductive layer pattern, and etching the gate oxide layer and the upper portion of the substrate to form a gate oxide layer pattern and a trench; oxidizing an inner surface portion of the trench to form a trench oxide layer in the inner surface portion of the trench, and forming a bird's beaks at upper and lower portions of the floating gate layer to prevent the formation of a positive profile at sidewalls of the patterned floating gate layer; and forming a field oxide layer for filling up the trench, wherein the field oxide layer is formed by forming an oxide layer covering the stopping layer while filling up the trench, and etching the oxide layer to have a smooth surface via at least one of a chemical mechanical polishing method and an etchback method until the surface of the stopping layer pattern is exposed.