Patent ID: 6057205
Filing Date: 2000-05-02
Classification: H01L

Abstract:
A method for fabricating a capacitor on a semiconductor device, said method comprising:forming a first dielectric layer on said semiconductor device, said semiconductor device being on a substrate;forming a second dielectric layer on said first dielectric layer;etching said first dielectric layer, said second dielectric layer and said semiconductor device to form a hole contacting said substrate;forming a first conductive layer in said hole and on said second dielectric layer;patterning said first conductive layer to form a bottom electrode of said capacitor, wherein said first conductive layer comprises doped poly-silicon;forming a third dielectric layer on said first conductive layer, a portion of said first conductive layer is not covered by said third dielectric layer;oxidizing said third dielectric layer and said first conductive layer to form a silicon dioxide layer on said third dielectric layer and said portion of said first conductive layer;removing said silicon dioxide layer;etching said third dielectric layer and said portion of said first conductive layer till said third dielectric layer on the top surface of said first conductive layer is removed;patterning a dielectric film on said first conductive layer and on said third dielectric layer at side wall of said first conductive layer to form the dielectric film of said capacitor; andpatterning a second conductive layer on said dielectric film to form a top electrode of said capacitor, said first conductive layer, said third dielectric layer at side wall of said first conductive layer, said dielectric film on surface of said first conductive layer and on said third dielectric layer at side wall of said first conductive layer, and said second conductive layer constituting said capacitor.