Patent ID: 8541768
Filing Date: 2013-09-24
Classification: H01L

Abstract:
1. A semiconductor device including: a first structural body having a first semiconductor device formed over a first region of a semiconductor substrate, a metal film formed over the first structural body being insulated from the first semiconductor device, a second structural body having a second semiconductor device formed over the metal film being insulated from the metal film, a third structural body formed over a second region of the semiconductor substrate and having a third semiconductor device insulated from the metal film, and a first connection member for electrically connecting the first semiconductor device and the third structural body, and a second connection member for electrically connecting and the second semiconductor device and the third structural body, wherein the metal film has a thermal conductivity lower than that of the first connection member and the second connection member, and wherein the second semiconductor device includes: a plurality of first interconnects in a stripe shape extending in a first direction of the main surface of the semiconductor substrate; a plurality of diodes formed each at a predetermined distance over each of the first interconnects and electrically connected with the first interconnects respectively; a plurality of non-volatile memories formed over the diodes respective and electrically connected with the diodes; and a plurality of second interconnects in a stripe shape extending in a second direction perpendicular to the first direction formed over the non-volatile memories and electrically connected with the non-volatile memories, wherein each of the diodes has a columnar stacked structure where a polycrystal semiconductor layer of a first conduction type and a polycrystal semiconductor layer of a second conduction type are stacked, wherein each of the nonvolatile memories has a columnar stacked structure comprised of a first metal electrode film, a phase-change material layer, and a second metal electrode film stacked successively over the corresponding diode, and wherein the first interconnects and the second interconnects configure word lines and bit lines for selecting the non-volatile memories.