Patent ID: 7326615
Filing Date: 2008-02-05
Classification: H01L

Abstract:
1. A method for manufacturing a non-volatile memory device integrated on a semiconductor substrate, the device including a matrix of memory cells and associated circuitry, the method comprising the following steps: forming a plurality of gates of said memory cells projecting from said semiconductor substrate in said matrix, said plurality of gates comprising a plurality of conductive layers; forming at least one conductive layer in said circuitry; forming source and drain regions of said memory cells in said semiconductor substrate; forming a filling dielectric layer on the matrix and circuitry until said plurality of gates of said cells and said at least one conductive layer formed in said circuitry are completely covered; removing said filling dielectric layer until upper portions of said plurality of gates of said cells are exposed and said at least one conductive layer formed in said circuitry is completely exposed; after removing said filling dielectric layer from said at least one conductive layer, defining a plurality of gate electrodes of transistors of said circuitry in said conductive layer formed in said circuitry; and forming source and drain regions of said transistors of said circuitry in said semiconductor substrate.