Patent ID: 6034428
Filing Date: 2000-03-07
Classification: H01L,H05K

Abstract:
A semiconductor device comprising:a semiconductor chip; anda multi-layered member connected to the semiconductor chip, said multi-layered member comprising one or a plurality of wiring layers and one or a plurality of insulating layers alternately stacked, said one or the plurality of insulating layers having holes,said multi-layered member having electrode parts which include deformed portions of said one or the plurality of wiring layers obtained by deforming said one or the plurality of wiring layers via said holes,wherein said deformed portions include projections that serve as bumps oriented opposite to the semiconductor chip and being used for external connections with conductors formed on a member on which the semiconductor device is to be mounted, andwherein said deformed portions include projections oriented toward the semiconductor chip and used for connections with the semiconductor chip.