Patent ID: 7340596
Filing Date: 2008-03-04
Classification: G06F

Abstract:
1. A method of operating a programmable logic integrated circuit comprising: loading an initial value in a count register that is a part of a watchdog timer circuit integrated as part of a programmable logic integrated circuit disposed on a single die; clocking the count register to advance the count register to a next value with each clock; periodically reloading the count register with the initial value, wherein the reloading is caused by receiving a first magic value, wherein the first magic value when received configures the watchdog timer circuit to respond to a second magic value that is different from the first magic value, wherein the second magic value when received configures the watchdog timer circuit to respond to a third magic value that is different from the second magic value, wherein after receiving the first magic value, upon receiving the second magic value, resetting the watchdog timer circuit to the initial value, wherein after receiving the second magic value, upon receiving the third magic value, resetting the watchdog timer circuit to the initial value; when the stored count value held in the count register that is a part of the watchdog timer circuit reaches a final value, asserting a triggered signal output; and upon receiving the triggered signal output in a reset logic block on the programmable logic integrated circuit, causing reloading of configuration data from an external source into the programmable logic integrated circuit.