Patent ID: 8648407
Filing Date: 2014-02-11
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate having a first opening and a second opening adjacent thereto; a first dielectric layer, disposed in a lower portion of the first opening; a charge-trapping dielectric layer, disposed in an upper portion of the first opening to cover the first dielectric layer; a doping region of a predetermined conductivity type, formed in the semiconductor substrate adjacent to the first opening and the second opening, wherein the doping region of the predetermined conductivity type has a polarity which is different from that of the charges trapped in the charge-trapping dielectric layer; a gate electrode, disposed in a lower portion of the second opening; and a liner insulating layer interposed between the lower portion of the first opening and the first dielectric layer and between the upper portion of the first opening and the charge-trapping dielectric layer.