Patent ID: 6956437
Filing Date: 2005-10-18
Classification: G05F,H01L,H03F

Abstract:
1. A packaged power transistor integrated circuit (IC) device, comprising: a metal-oxide-semiconductor (MOS) transistor device including a gate terminal, a source terminal and a drain terminal, the gate terminal being operatively coupled to a first package lead of the IC device, the drain terminal being operatively coupled to a second package lead of the IC device, and the source terminal being adapted for connection to a negative voltage supply; and a bias generator operatively coupled to the gate terminal of the MOS device, the bias generator generating a bias output for biasing the MOS device at a substantially constant quiescent operating point, the bias generator being configured such that the bias output varies as a function of a junction temperature of the MOS device; wherein the IC device is configured to receive both an input radio frequency (RF) signal and a substantially direct current (DC) reference source signal on the first package lead, the bias generator being adapted to receive the reference source signal and to generate the bias output as a function thereof.