Patent ID: 7045869
Filing Date: 2006-05-16
Classification: B81B,B81C,G02B

Abstract:
1. A semiconductor wafer comprising a support substrate and a component substrate carried on the support substrate, the component substrate comprising: a membrane layer having a plurality of spaced apart micro-machined components formed therein, and a handle layer supporting the membrane layer and having a plurality of cavities corresponding to the micro-machined components extending through the handle layer to the respective corresponding micro-machined components, the support substrate having a first surface facing in a first direction and defining a second surface facing in a second direction away from and opposite to the first direction, the support substrate defining an intermediate surface at a level intermediate the first and second surfaces and facing in the second direction, the support substrate comprising: a plurality of spaced apart pedestals extending in the second direction from the intermediate surface into respective corresponding ones of the cavities in the handle layer of the component substrate, each pedestal terminating in the second surface spaced apart from the corresponding micro-machined component for accommodating movement of the micro-machined component, at least one electrode carried on the second surface of each pedestal for co-operating with the corresponding micro-machined component, a plurality of electrically conductive addressing tracks on one of the first and the intermediate surfaces of the support substrate for carrying address signals to be conducted to the respective electrodes, and an electrical conductor corresponding to each electrode extending through a corresponding via through the corresponding pedestal from the electrode to a corresponding one of the addressing tracks on the support substrate for conducting the corresponding address signal to the corresponding electrode.