Patent ID: 8122423
Filing Date: 2012-02-21
Classification: G01R

Abstract:
1. A method of testing an analog circuit, the method comprising selecting an initial set of test input vectors for the analog circuit under control of a test selection computer; selecting a set of faults comprising faults that each correspond to a respective node in the analog circuit and corresponding fault voltage value for that node under control of the test selection computer; computing, under control of the test selection computer, a measure of overlap between probability distributions of test output signal values for the analog circuit in response to the test input vectors in the presence and absence of each of the faults from said set of faults respectively, as a function of estimated statistical spread of component and/or process parameter values in the analog circuit; selecting test input vectors from the initial set of test input vectors for use in testing on the basis of whether the measure of overlap for at least one if the faults is below a threshold value in response to the selected test input vector under control of the test selection computer wherein said computing comprises: selecting for each fault a parameter or group of parameters of a component or a group of components that is directly connected to the node defined by the fault; selecting deviating values for the parameter or group of parameters with a size that has the effect of changing the voltage at the node to the node voltage defined by the fault; computing the measure of overlap between probability distributions using circuit behavior in the presence of the fault computed for a version of the analog circuit wherein the parameters or group of parameters has or have the selected deviation values.