Patent ID: 7586320
Filing Date: 2009-09-08
Classification: G01R

Abstract:
1. A plunger for a chip-testing module having a probe card with a circuit board and a membrane, wherein the membrane having a circuit layer disposed on a first surface of the membrane, at least one conductive through-via penetrating the membrane, and a plurality of bumps disposed on a second surface located in a pushed area of the membrane, wherein the second surface is opposite to the first surface, wherein at least one of the bumps is connected to the circuit layer through the conductive through-via, the plunger comprising: a body having a pushing part and a base part; and a conductive layer disposed directly on a surface of the pushing part and the base part, wherein the circuit layer located in the pushed area is suitable for contacting and being connected to the conductive layer located on the pushing part, and at least one of the bumps is connected to the conductive layer through the conductive through-via.