Patent ID: 6306676
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A method of making a self aligned high energy implanted photodiode, the method comprising the steps of:providing an imaging area on a semiconductor substrate of a first conductivity type, the imaging area having at least one gate dielectric layer on a major surface with at least one gate electrode layer on top of the dielectric layer on the major surface;providing the imaging area with a plurality of photodetectors and at least one CCD formed within the imaging area, the CCD having a plurality of cells arranged such that each of the photodetectors is adjacent to one of the cells within the CCD and each photodetector is coupled to the CCD through a transfer gate on one side of the photodetector area, the photodetector having a channel stop formed of the first conductivity type on the opposite side of the photodetector;the method further comprises the steps in the sequence set forth:(a) providing the photodetector area having a gate electrode layer and a gate dielectric layer existing over the photodetector area;(b) first etching the gate electrode layer during formation of the CCD;(c) patterning a masking layer to block high energy implants such that openings in the masking layer are formed over the photodetector areas and a portion of the channel stop;(d) second etching anisotropically down through the gate electrode layer over the photodetector areas and the portion of the channel stop while leaving the gate dielectric layer essentially intact; and(e) using a high energy implant to create a photodiode of a second conductivity type opposite the first conductivity type within the photodetector areas such that the photodiode is self aligned with at least one edge of the transfer gate and the photodiode overlaps the channel stop.