Patent ID: 8006217
Filing Date: 2011-08-23
Classification: H03K

Abstract:
1. A method for manufacturing a semiconductor device having a multistage frequency-division circuit comprising first to nth stages which converts a first signal to a second signal having a lower frequency than the first signal by inputting the first signal into the multistage frequency-division circuits wherein the first to nth stages are electrically connected so that the output of a preceding stage frequency-division circuit becomes the input of a following stage frequency-division circuit, wherein a basic cell corresponding to the preceding stage frequency-division circuit and a basic cell corresponding to the following stage frequency-division circuit are placed so that parasitic capacitance of a wiring of the preceding stage frequency-division circuit or parasitic capacitance of the wiring which is electrically connected to the preceding stage frequency-division circuit is smaller than parasitic capacitance of a wiring of the following stage frequency-division circuit or parasitic capacitance of the wiring which is electrically connected to the following stage frequency-division circuit.