Patent ID: 7679131
Filing Date: 2010-03-16
Classification: H01L

Abstract:
1. A semiconductor device comprising: a TFT formed over a substrate; an active layer formed in the TFT; and a first region, a second region and a third region formed in the active layer, the third region being formed between the first region and the second region, wherein the third region includes a channel forming region, wherein the third region has a first width and a second width, wherein the first width and the second width of the third region are narrower than a width of the first region and a width of the second region, wherein each of the first width and the second width of the third region is a length in a direction perpendicular to a carrier flow direction, and the direction of the first width and the direction of the second width are the same, wherein each of the width of the first region and the width of the second region is a length in the direction perpendicular to the carrier flow direction, wherein a portion of the third region is convexed or concaved in the direction perpendicular to the carrier flow direction, which is parallel to a plane of the substrate, the convexed portion being a part of the second width, wherein the number of grain boundaries crossing the channel forming region in a width direction of the channel forming region is zero, wherein the first width is narrower than the second width, and wherein the convexed or concaved portion becomes an origin of crystal growth.