Patent ID: 7041590
Filing Date: 2006-05-09
Classification: H01L

Abstract:
1. A method for forming a plurality of conductive bumps, comprising: providing a wafer; forming an under-bump-metallurgy structure on said wafer; forming a first photo resist layer on said under-bump-metallurgy structure; removing a portion of said first photo resist layer to form a plurality of first openings, wherein said first openings expose a portion of said under-bump-metallurgy structure; forming a second photo resist layer in said first openings to cover said portions of said under-bump-metallurgy structure; removing a portion of said second photo resist layer to form a plurality of second openings so as to have said portions of said under-bump-metallurgy structure partially exposed through said second openings to form exposed portions of said under-bump-metallurgy structure, wherein the diameter of each said second opening is smaller than the diameter of each said first opening; forming a conductive layer on said exposed portion of said under-bump-metallurgy structure; removing said first photo resist layer; removing said second photo resist layer; removing said under-bump-metallurgy structure with said conductive layer as a mask formed thereon; and reflowing said conductive layer to form said plurality of conductive bumps.