Patent ID: 8350553
Filing Date: 2013-01-08
Classification: G05F

Abstract:
1. A reference voltage generation circuit comprising: a current mirror unit supplied with a source voltage and generating a current at first to Nth (wherein N is an integer of 4 or more) current output terminals; a first field effect transistor operating as a linear resistance, and having a drain terminal connected to the second current output terminal side, a source terminal connected to ground side, and a gate terminal connected to a reference voltage output terminal; a combined voltage generating unit having one or more field effect transistor pairs in which currents are generated at drain terminals from any of the third to Nth current output terminals, source terminals are mutually connected and a combined voltage with a positive temperature coefficient is generated between gate terminals, one gate terminal of the field effect transistor pairs being connected to an input side, the other gate terminal of the field effect transistor pairs being connected to the reference voltage output terminal side; and a second field effect transistor in which current is generated at a drain terminal from the third current output terminal, a gate terminal is connected to an input terminal of the combined voltage generating unit, a source terminal is connected on the ground side, and a voltage with a negative temperature coefficient is generated between the gate terminal and source terminal.