Patent ID: 6266291
Filing Date: 2001-07-24
Classification: G11C

Abstract:
A memory device receiving from an external power source an external power signal having increasing and decreasing variance, the memory device comprising:an internal power source having an input terminal coupled to the external power source to receive the external power signal and an output terminal to provide an internal power signal having a voltage proportional with the voltage of the external power signal;a logic circuit having an input coupled to the output of the internal power source and an output terminal providing a compensation signal having an output level with a first proportionality to the internal power signal;a voltage regulator having an input coupled to the output of the internal power source and an output terminal providing a supply signal having a second proportionality to the internal power signal that is less than the first proportionality;a programmable coupling device; anda continuity detecting circuit coupled to the programmable coupling device and having a supply terminal coupled to the output of the voltage regulator, a compensation terminal coupled to the output of the logic circuit, a control terminal coupled to receive an activation signal, and an output terminal, the continuity detecting circuit generating at the output terminal when activated an indicator signal having a first logic level if the programmable coupling device is electrically continuous and having a second logic level if electrically discontinuous.