Patent ID: 7494850
Filing Date: 2009-02-24
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a substrate; a first field effect transistor above said substrate; a second field effect transistor above said substrate and positioned laterally adjacent to said first field effect transistor; and a semiconductor layer above said substrate and below said first field effect transistor and said second field effect transistor, wherein a first portion of said semiconductor layer below said first field effect transistor is doped and comprises a back gate for said first field effect transistor and wherein a second portion of said semiconductor layer below said second field effect transistor is un-doped, and wherein said first field effect transistor and said second field effect transistor each comprise planar metal oxide semiconductor field effect transistors with source and drain diffusion regions and a channel region between said source and drain diffusion regions in a section of a sub-20 nm silicon layer above said substrate.