Patent ID: 7298003
Filing Date: 2007-11-20
Classification: H01L

Abstract:
1. A nonvolatile semiconductor device, comprising: trench isolation layers formed in a semiconductor substrate, each trench isolation layer having a protruding portion disposed above a device surface of the semiconductor substrate; a control gate electrode disposed across an active region defined between the trench isolation layers; a floating gate disposed beneath the control gate electrode on the active region; a gate interlayer dielectric film disposed between the floating gate and the control gate electrode; and a tunnel oxide layer disposed between the floating gate and the active region, wherein a portion of the floating gate between the trench isolation layers has a sidewall profile continuously tapering towards the semiconductor substrate to directly contact the tunnel oxide layer, and the protruding portion of the trench isolation layer has a sidewall profile continuously tapering away from the substrate to an end of an upper portion of the protruding portion, and wherein the floating gate includes two discontinuous floating gate layers in direct contact, the two discontinuous floating gate layers including a lower floating gate layer on the active region and an upper floating gate layer on the lower floating gate layer and partially overlapping the trench isolation layers.