Patent ID: 6180429
Filing Date: 2001-01-30
Classification: H01L,H01S

Abstract:
A method for the manufacture of a III-V heterostructure device comprising the steps of:a. depositing on a III-V semiconductor substrate a plurality of semiconductor layers, said plurality including a bottom layer, at least one intermediate layer, and a top layer, the top layer having a first III-V composition,b. forming a lift-off mask layer on said top layer, said lift-off mask layer comprising(i.) an etch mask layer comprising a material selected from the group consisting of silicon dioxide, silicon nitride, and silicon oxynitride,(ii.) a spacer layer having a thickness of at least 0.1 micron and comprising a III-V semiconductor with a second III-V composition different than the said first III-V composition and having an incongruent vaporization temperature that is higher than that of said first III-V composition,c. lithographically masking said etch mask layer,d. etching said etch mask layer to form an etch mask,e. etching in a single step the spacer layer, and the plurality of III-V semiconductor layers, to form a spacer and a mesa of III-V semiconductor layers,f. selectively forming by regrowth a III-V semiconductor blocking layer on said mesa, leaving said spacer free of blocking layer, andg. removing said spacer and said etch mask.