Patent ID: 9214354
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A manufacturing method for a semiconductor device including a non-volatile memory FET and a MOSFET, comprising: (e) forming a first gate electrode film on the entire surface of a semiconductor substrate; (i) opening a region having the non-volatile memory FET formed therein and exposing a semiconductor surface of the semiconductor substrate, after the step (e); (m) forming a charge storage three-layer film by sequentially depositing a first potential barrier film, a charge storage film, and a second potential barrier film, after the step (i); (n) forming a second gate electrode film on the charge storage three-layer film, after the step (m); (o) patterning a gate electrode of the non-volatile memory FET after the step (n); (p) forming a resist film in a region of the non-volatile memory FET and a region having a gate electrode of the MOSFET formed therein, using lithography, after the step (o); and (q) etching the first gate electrode film which is not covered with the resist film formed in the step (p), after the step (p), wherein a value of a product of S/L and H/L is specified in a case that a line of the gate electrode of the non-volatile memory FET is set to L, a space thereof is set to S, and a height thereof is set to H so that in the step (p), a thickness of the resist film on the gate electrode of the non-volatile memory FET is set to a thickness which is not lost by the etching step of the step (q).