Patent ID: 8508197
Filing Date: 2013-08-13
Classification: H02J,Y02E

Abstract:
1. A static compensator comprising: a transformer connected with a bus of a power system; an inverter operating according to a control signal and connected to the transformer in series; a tap changer changing turn ratio of the transformer; a voltage controller controlling an output quantity of a reactive current according to a predetermined voltage control reference value; a reactive current controller controlling a phase angle of an output voltage of the inverter using a difference in values between a reactive current inputted by the voltage controller and a reactive current measured by the inverter; and a tap changer controller extracting an integrated value of a bus voltage if the bus voltage inputted from the bus and the reactive current controller is greater or smaller than a predetermined reference value, comparing the extracted integrated value with a predetermined excessive integration threshold value, and outputting any of a tap up signal or a tap down signal controlling the tap changer, wherein the voltage controller comprises: a first D/Q changing unit receiving the bus voltage and converting the bus voltage into and outputting an active voltage of the bus voltage and a reactive voltage of the bus voltage; an intensity calculating unit outputting a bus voltage by using an active power and a reactive power from the D/Q changing unit; and a first PI controller controlling an output quantity of the reactive current by compensating a difference between the predetermined voltage control reference value and the bus voltage outputted from the intensity calculating unit, and wherein the tap changer controller comprises: a first comparing unit generating an ON or OFF signal by comparing the bus voltage with the predetermined reference value; an integrator extracting an integrated value of the bus voltage; a timer placed between the integrator and the first comparing unit and transmitting a time delay signal to the integrator if the ON signal is received from the comparing unit; and a second comparing unit outputting the tap up or tap down signal by comparing the integrated value with the excessive integration threshold value.