Patent ID: 8707002
Filing Date: 2014-04-22
Classification: G06F

Abstract:
1. A control apparatus which is connected to a plurality of memory devices and which controls operation of the plurality of memory devices based on an access request, the apparatus comprising: a queue buffer configured to hold a plurality of access requests; a setting unit configured to set a referring range of the plurality of access requests held in the queue buffer based on a power state of a target memory device; an issuing unit configured to issue a command in accordance with an access request selected from a plurality of access requests held in said queue buffer; a management unit configured to activate the target memory device, of the plurality of memory devices, which is a target for the access request selected from the plurality of access requests held in the referring range of said queue buffer; and a processing unit configured to execute memory access for the target memory device based on the access request, and to activate or inactivate the power state of at least one of the plurality of memory devices other than the target memory device at the same clock cycle of the memory access for the target memory device based on the access request.