Patent ID: 7098538
Filing Date: 2006-08-29
Classification: H01L

Abstract:
1. A system semiconductor device, comprising: a system LSI cell portion which includes a plurality of functional blocks for realizing specific functions, each of the functional blocks serving as a unit circuit and being arranged on a semiconductor chip; and a global wiring layer comprising a conductor disposed in a substrate and at least one wiring layer arranged on the conductor, the global wiring layer being laminated with the system LSI cell portion so that the functional blocks are electrically connected to each other; wherein the conductor in the global wiring layer is a buried via disposed in the substrate and the at least one wiring layer comprises first and second wiring layers, the first wiring layer being disposed on the buried via, and insulating layer being disposed on the first wiring layer, the second wiring layer being disposed on the insulating layer and electrically connected to the first wiring layer through the via, and an adhesive layer being disposed on the insulating layer in an area where the second wiring layer is not positioned.