Patent ID: 6486513
Filing Date: 2002-11-26
Classification: H01L

Abstract:
A semiconductor device comprising:an insulating layer; a semiconductor layer of a first conductivity type provided on said insulating layer; first and second impurity regions of a second conductivity type opposite to said first conductivity type, which are provided apart from each other in an upper surface of said semiconductor layer so as to be kept from contact with said insulating layer, each of said first and second regions including a first impurity layer and a second impurity layer; and an electrode opposed to a portion of said upper surface of said semiconductor layer which is sandwiched between said first and second impurity regions, with an insulation film in between, wherein a depletion layer formed by said first impurity layer of each of said first and second regions and said semiconductor layer extends to said insulating layer without application of voltage from outside, wherein said first impurity layer is formed by introducing impurities of said second conductivity type into said semiconductor layer; and the following equation holds: (2&it;&epsi;&it;â€ƒ&it;s/q)&CenterDot;((Ne+Nb)/Ne&CenterDot;Nb)&CenterDot;(kT/q)&it;ln&af;(Ne&CenterDot;Nb/ni2)&GreaterEqual;twhere t is the thickness of said semiconductor layer between said insulating layer and said first impurity layer; Nb is the impurity concentration of said semiconductor layer; Ne is the impurity concentration of said first impurity layer; q is the elementary charge; k is Boltzman's constant; T is the absolute temperature; and ni, âˆˆs are the intrinsic carrier concentration and the dielectric constant of said semiconductor layer and said first impurity layer.