Patent ID: 7979755
Filing Date: 2011-07-12
Classification: G11C

Abstract:
1. A semiconductor integrated circuit device for a display controller, comprising: a display memory having a storage area and configured to store display data for a display device into the storage area; a spare storage area provided outside of a regular storage area for storing the display data; a repair circuit configured to repair a defect by replacing an area including a defect in the display memory with the spare storage area in accordance with repair information set in a repair information circuit; a clocked inverter circuit including a plurality of clocked inverters corresponding to data output terminals of the display memory; a logic circuit for receiving data transmitted from the clocked inverter circuit; a data bus for transmitting output data from the clocked inverter circuit to the logic circuit; and a control circuit to transfer display data from the clocked inverter circuit to the logic circuit in a time division manner, wherein the control circuit controls the logic circuit in a time division manner, and controls the clocked inverter circuit via the repair circuit in a time division manner, wherein transfer addresses are assigned to the plurality of clocked inverters of said clocked inverter circuit, each said transfer address comprising a plurality of groups, each said group corresponding to one pixel, wherein the logic circuit includes a plurality of logic subcircuits, and the transfer addresses are assigned to the plurality of logic subcircuits as a plurality of said groups, and wherein one pixel includes a first bit, a second bit, and a third bit.