Patent ID: 7139194
Filing Date: 2006-11-21
Classification: G11C,H01L

Abstract:
1. A nonvolatile semiconductor memory comprising: a plurality of nonvolatile memory cell transistors that are arranged in matrix form and have directivities that a current flows from a drain to a source only and that charge is exchangeable only at a source; a plurality of word lines that are connected to respective control gate groups of the memory cell transistors that are arranged in one direction; a first bit line that is connected to a source of one of a pair of the memory cell transistors and to a drain of the other of the pair of memory cell transistors, said pair of memory cell transistors being adjacent to each other and connected to one of said word lines; and a second bit line that is connected to a drain of the one of said pair of memory cell transistors and a source of the other of said pair of memory cell transistors.