Patent ID: 6573620
Filing Date: 2003-06-03
Classification: H05K

Abstract:
An apparatus, comprising:a motherboard, including: a bus bridge mounted on the motherboard, the bus bridge having a configuration input terminal and an output terminal, the bus bridge generating a first and second initialization signal on the output terminal in response to receiving a first and second configuration signal on said configuration input terminal, respectively; and a first electrical connector mounted on said motherboard, the first electrical connector having a first and second terminal, said first terminal being coupled to the configuration input terminal of said bus bridge; and a daughterboard including a processor mounted on the daughterboard, the processor having a second electrical connector mounted on the daughterboard and having a first and second terminal, said second electrical connector being mateable with said first electrical connector to electrically engage the first and second terminals of the first and second electrical connectors, said first terminal of said second electrical connector being adapted to be connected to one of a first and second voltage supply to generate one of the first and second configuration signals on the configuration input terminal of said semiconductor device in response to the first and second electrical connectors being mated together.