Patent ID: 8943256
Filing Date: 2015-01-27
Classification: G06F

Abstract:
1. An integrated circuit (IC) device, comprising: a serial communication first interface (I/F) circuit electrically coupled to first physical connections of the IC device, and configured to respond to communication signals received at the first physical connections; at least one serial communication second interface (I/F) circuit electrically coupled to second physical connections of the IC device, and configured to enable data transactions over the second physical connections, wherein the at least one serial connection second I/F circuit includes a plurality of master I/F circuits, each electrically coupled to a corresponding set of master physical connections of the IC device; and a bypass circuit configured to bypass the serial communication first I/F circuit and the at least one serial connection second I/F circuit, enable serial communication signals to be transmitted between the first and second physical connections, and to enable serial communication signals to pass between the first physical connections and one of the master physical connections according to mapping data stored on the IC device, wherein the mapping data includes an assigned and unique global ID value for each downstream device connected to the IC device, a local ID value for each downstream device, and the master physical connections to which each downstream device is attached.