Patent ID: 6424030
Filing Date: 2002-07-23
Classification: G11C,H01L,H05K

Abstract:
A semiconductor memory module comprising:(a) a substrate of a plate shape having a first surface and a second surface opposite to said first surface, said substrate having wirings, first and second electrode pads formed on said first and second surfaces of said substrate respectively; (b) a plurality of first devices disposed on said first surface of said substrate; and (c) a plurality of second devices disposed on said second surface of said substrate, each of said first and second devices having a semiconductor chip and leads which are electrically connected to said semiconductor chip, said semiconductor chip having a memory circuit comprising a plurality of semiconductor elements, said leads including electrically common leads and an electrically independent lead, tips of said leads of said first and second devices being contacted with said first and second electrode pads respectively; wherein said electrically common leads of said first and second devices are commonly coupled to one another by first ones of said wirings, wherein said electrically independent leads of said first devices are commonly coupled to one another by second ones of said wirings, wherein said electrically independent leads of said second devices are commonly coupled to one another by third ones of said wirings, and wherein said electrically independent leads of said first devices and said electrically independent leads of said second devices are electrically independent from each other.