Patent ID: 7704884
Filing Date: 2010-04-27
Classification: C23C,C25D,H01L

Abstract:
1. A semiconductor processing method, comprising: forming a first layer of a composition across a front side of a semiconductor construction while forming a second layer of the composition across a back side of the semiconductor construction, where the back side is in opposing relation to the front side; forming a layer of insulative material over the first layer of the composition; etching a pattern of openings extending through the layer of insulative material and through the first layer of the composition; dipping the semiconductor construction in a plating bath to form conductive material within the openings; and wherein the forming the first and second layers of the composition comprises utilization of plasma-enhanced atomic layer deposition; and wherein the semiconductor construction remains in an orientation with the front side facing up during the recited utilization of the plasma-enhanced atomic layer deposition, formation of the layer of insulative material, and etching of the pattern of openings.