Patent ID: 6531391
Filing Date: 2003-03-11
Classification: H01L,Y10S

Abstract:
A method of fabricating a conductive path in a semiconductor device, comprising:applying a layer of a first material onto a substrate material; applying a layer of a second material onto said layer of said first material; forming an edge feature in said layer of said second material; forming an edge feature in said layer of said first material; applying a layer of a third material onto said edge features of said layers of said first and second materials; removing a portion of said layer of said third material to define a remaining portion of said layer of said third material; removing a portion of said layer of said first material not covered by said remaining portion of said layer of said third material to define a pore in said layer of said first material; removing said remaining portion of said layer of said third material; and applying a layer of a fourth material to define a conductive path in said pore in said layer of said first material.