Patent ID: 6337650
Filing Date: 2002-01-08
Classification: H03L,H04L

Abstract:
A clock signal regenerating system for regenerating a clock signal by feeding back a phase difference between a demodulated analog data signal and said clock signal, comprising:an analog/digital converter for using said clock signal to over-sample said demodulated analog data signal, thus converting said demodulated analog data signal into a digital signal; a data-change-direction detecting circuit for using a change in data of said demodulated analog data signal sampled at a peak position thereof by said analog/digital converter using said clock signal, to detect whether a data-change direction of said demodulated analog data signal is an ascending direction or a descending direction; a threshold selecting circuit for holding a threshold and also deciding whether said data of said demodulated analog data signal sampled at a zero-crossing position thereof by said analog/digital converter using said clock signal is of a positive or negative value, thereby selecting said threshold; a phase-difference detecting circuit for comparing said data of said demodulated analog data signal sampled at said zero-crossing position thereof by said analog/digital converter using said clock signal and said threshold selected by said threshold selecting circuit, to detect data sampled in excess of said threshold as a phase difference; and a multiplier for multiplying data of a phase difference detected by said phase-difference detecting circuit by data of said data-change direction detected by said data-change-direction detecting circuit, to feed back a resultant said phase difference.