Patent ID: 7091537
Filing Date: 2006-08-15
Classification: H01L

Abstract:
1. A ferroelectric memory device comprising: a semiconductor substrate; a first trench formed in the semiconductor substrate to extend in a first direction and having a first depth; a second trench formed in the semiconductor substrate to extend in a second direction and having a second depth and including an upper region and a lower region, the second direction extending across the first trench, the second depth being smaller than the first depth; a first element isolation insulating film buried in the first trench; a first gate electrode formed in the lower region of the second trench via a first gate insulating film; a first insulating film formed in the upper region of the second trench; a first diffusion layer formed in the semiconductor substrate on one side-surface side in the second trench; a second diffusion layer formed in the semiconductor substrate on the other side-surface side in the second trench; a first ferroelectric capacitor disposed on the first diffusion layer and including a first lower electrode, a first ferroelectric film, and a first upper electrode; a first contact disposed on the first ferroelectric capacitor; a first wiring layer disposed on the first contact; a second contact disposed on the second diffusion layer; and a second wiring layer disposed on the second contact and disposed in the same level as that of the first wiring layer.