Patent ID: 8661422
Filing Date: 2014-02-25
Classification: G06F

Abstract:
1. A method for configuring a memory in a computing apparatus, the computing apparatus comprising at least one processor, the method comprising: receiving program source code in a memory, the program source code comprising loop nests with arbitrary parametric affine iteration domain containing at least one array reference; identifying during compilation, based on at least in part an analysis of the program source code, by the at least one processor and a local memory compaction module, inefficiencies in memory usage, the inefficiencies relating to at least one of access to and memory footprint of at least one array associated with the at least one array reference within the program source code; allocating during the compilation of the program source code, by the processor and the local memory compaction module, at least one local array for accessing at least a fraction of data associated with the at least one array; and mapping during the compilation, by the processor and the local memory compaction module, a portion of the at least one array to one of the at least one local array, wherein the memory size requirement of the at least one local array is smaller than the memory size requirements of the at least one array, such that the memory usage inefficiencies are reduced in compiled program source code.