Patent ID: 6199089
Filing Date: 2001-03-06
Classification: G06F

Abstract:
A floating point unit comprising:a first adding unit receiving a first set of data from a first data path and a second set of data from a second data path, wherein said first adding unit produces a sum of said first data and said second data;a rounding unit coupled to said first adding unit, wherein said rounding unit receives at least one least significant bits of said sum, and said rounding unit produces a carry in bit and at least one rounded least significant bit;an incremented sum unit coupled to said first adding unit, wherein said incremented sum unit produces an incremented sum; anda multiplexer coupled to said first adding unit, said incremented sum unit, and said second adding unit, wherein said multiplexer receives the carry in bit to select one of said sum and said incremented sum;wherein said at least one rounded least significant bit is united with the selected one of said sum and said incremented sum.