Patent ID: 6862266
Filing Date: 2005-03-01
Classification: H04L,H04W

Abstract:
1. A loop test apparatus of a packet routing bus comprising: a transmitting node and a receiving node, each including a transmitting driver and a receiving driver and each having a loop path for a data packet from the corresponding transmitting driver to the receiving driver; a transmitting bus master including a register for storing an address of one of the transmitting node and receiving node for managing a transfer of the data packet on a transmitting packet routing bus; a receiving bus master including a register for storing an address of one of the transmitting node and receiving node for managing a transfer of the data packet on a receiving packet routing bus; and a testing element for writing a test data packet to one of the transmitting node and the receiving node and writing the address of one of the transmitting node and the receiving node to transmit or receive the test data packet to or from the register of the corresponding bus master.