Patent ID: 6566744
Filing Date: 2003-05-20
Classification: H01L,Y10T

Abstract:
An integrated circuit package comprising:a substrate, said substrate having a top first dielectric layer, said substrate having at least one recessed receptor region for receiving an integrated circuit; at least one integrated circuit deposited in said receptor region, said integrated circuit having a wired side, said integrated circuit being deposited into said receptor region by fluidic self-assembly such that said wired side is facing outward from said receptor region; a conductive layer on said first dielectric layer, said conductive layer forming conductive interconnects to said integrated circuit; a second dielectric layer on said conductive layer, said second dielectric layer having openings for receiving conductive elements; conductive elements, said conductive elements being deposited in said openings so that said conductive elements are in contact with said conductive layer, said conductive elements being attached in said openings.