Patent ID: 6400171
Filing Date: 2002-06-04
Classification: G01R

Abstract:
A method of processing an integrated circuit comprising a first logic portion and a second circuit portion, wherein said second circuit portion has an adjustable standby current, the method comprising:providing the integrated circuit with a third circuit portion for sensing voltages applied to the integrated circuit; applying a given voltage to the integrated circuit, during a burn-in procedure, to accelerate and test for any failures in the first logic portion of the integrated circuit, wherein the standby current through the second circuit portion tends to impede said acceleration of, and tends to mask, failures in the first logic portion; using the third circuit portion to sense the application of the given voltage to the integrated circuit, and, in response, to generate a signal; and applying said signal to the second circuit portion to reduce the standby current therethrough and thereby to improve the effectiveness of the burn-in procedure at accelerating and identifying failures in the first logic portion of the integrated circuit.