Patent ID: 6794223
Filing Date: 2004-09-21
Classification: H01L

Abstract:
A process of fabricating a microelectronic package, comprising:providing a die affixed to a carrier substrate, the substrate having formed therein a through-hole extending from a first exterior surface to a second exterior surface of the substrate, the through-hole configured to allow the flow of an underfill encapsulation material into a gap between the die, the substrate, and a heat spreader; coupling the heat spreader to the backside of the die using heat conductive adhesive, the heat spreader including a plurality of pillars surrounding the die to shift thermally induced stress away from the corners and edges of the die to the pillars of the heat spreader; and dispensing of an underfill encapsulation material through the through-hole such that the underfill encapsulation material flows into a gap between the die, the heat spreader, and the substrate.