Patent ID: 7364951
Filing Date: 2008-04-29
Classification: H01L,Y10S

Abstract:
1. A method for manufacturing a nonvolatile semiconductor memory device, comprising: forming a first gate electrode, which has a first gate length, on a peripheral circuit portion of a semiconductor substrate and a second gate electrode, which has a second gate length shorter than the first gate length, on a memory cell portion of the semiconductor substrate; introducing impurity into the peripheral circuit portion and memory cell portion; forming a first insulating film above at least the memory cell portion; and annealing the semiconductor substrate into which the impurity has been introduced, whereby a first transistor having the first gate electrode and source and drain diffusion layers containing the diffused impurity is formed in the peripheral circuit portion and a second transistor having the second gate electrode and source and drain diffusion layers containing the diffused impurity is formed in the memory cell portion.