Patent ID: 8553753
Filing Date: 2013-10-08
Classification: G06F,H04L

Abstract:
1. A clock-synchronized method for a clock-synchronized system wherein the clock-synchronized system has a host unit and a controlled device, and the controlled device comprises a receiver, a transmitter and a clock/data recovery device, the clock-synchronized method comprising the steps of: (a) transmitting a periodic signal to the host unit during a first time interval by the transmitter; (b) transmitting a first training signal of equalization (TSEQ) to the receiver based on an operation clock during a second time interval by the host unit wherein the transmitter continuously sends the periodic signal to the host unit during the second time interval; (c) extracting the first training signal of equalization (TSEQ) for generating an extracted clock signal and a data signal by the clock/data recovery device during the second time interval; and (d) transmitting a second training signal of equalization (TSEQ) to the host unit based on the extracted clock signal by the transmitter during a third time interval wherein the receiver and the transmitter commonly refer to the extracted clock signal.