Patent ID: 6469354
Filing Date: 2002-10-22
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate having a substrate region of a first conductivity type or a second conductivity type opposite to said first conductivity type, a first well region of said first conductivity type formed on a surface region of said semiconductor substrate and having a first impurity concentration, said first well region receiving therein at least one MOS transistor, a guard ring of said first conductivity type disposed on a surface region of said semiconductor substrate and within a second well region, said at least one MOS transistor having source/drain regions of said second conductivity type and surrounded by said second well region, and a diffused region formed on the substrate region and disposed between said first well region having said at least one MOS transistor and said second well region having said guard ring therein, said diffused region being of said first conductivity type implemented by a portion of said substrate and having a second impurity concentration lower than said first concentration.