Patent ID: 8953292
Filing Date: 2015-02-10
Classification: G06F,H03K

Abstract:
1. A bus interface comprising: pre-driver logic to receive an input signal and a first control signal or a second control signal; a driver stage coupled to the pre-driver logic to receive at least one signal from the pre-driver logic and to generate a driver stage output signal; and evaluation logic to determine when a short-circuit condition exists on an output signal path based on a voltage level at a bond pad and a state of the input signal, the evaluation logic including a first logic gate coupled to the pre-driver logic and a second logic gate coupled to the pre-driver logic, the first logic gate to provide the first control signal to the pre-driver logic and the second logic gate is coupled to an additional logic gate, the additional logic gate to provide the second control signal to the pre-driver logic, and wherein the evaluation logic further comprises a first plurality of logic elements to generate a short-to-ground control signal when the driver stage output signal fails to exceed a high reference voltage, the first plurality of logic elements including the first logic gate, and a second plurality of logic elements to generate a short-to-bus control signal when the driver stage output signal fails to fall below a low reference voltage, the second plurality of logic elements including the second logic gate and the additional logic gate, wherein the driver stage output signal is provided to the bond pad by the driver stage, and wherein the driver stage is disabled when the short-circuit condition is indicated by the first control signal or the second control signal provided by the evaluation logic, the first control signal and the second control signal generated based on the voltage level of the bond pad, the state of the input signal, and a state of a delayed version of the input signal, wherein the predriver logic is to re-enable the driver stage either after a predetermined period of time or when the first control signal or the second control signal do not indicate that the short-circuit condition exists, wherein the predriver logic tristates the driver stage when the short-circuit condition is indicated by the first control signal or the second control signal, wherein the first control signal comprises the short-to-ground control signal and the second control signal comprises the short-to-bus control signal, wherein the first plurality of logic elements generate the short-to-ground control signal when the driver stage output signal fails to exceed the high reference voltage when both the input signal and the delayed-version of the input signal are at a low state, and wherein the second plurality of logic elements generate the short-to-bus control signal when the driver stage output signal fails to fall below a low reference voltage when both the input signal and the delayed-version of the input signal are at a high state.