Patent ID: 6919602
Filing Date: 2005-07-19
Classification: H01L

Abstract:
1. An ESD protection circuit providing an ESD path from a first to a second node when an ESD voltage applied to the first node, the circuit comprising: a timing-control circuit outputting a first voltage when the ESD voltage is applied to the first node; a voltage divider outputting a second voltage divided from the ESD voltage when activated by the first voltage output from the timing-control circuit, wherein the voltage divider comprises: an inverter having an input receiving the first voltage output from the timing-control circuit, and an output; and a resistor having one end coupled to the second node, and the other end outputting the second voltage; and a shunt transistor having a drain coupled to the first node, a source coupled to the second node and a gate coupled to the other end of the resistor and the output of the inverter, and entering into a snapback to provide the ESD path from the drain to the source when the ESD voltage is applied to the first node.