Patent ID: 7085668
Filing Date: 2006-08-01
Classification: G01R

Abstract:
1. A time measurement circuit comprising: inputs adaptable for receiving N input signals conveying events; and N time measurement units each coupled to a different one of the N inputs and each receiving a plurality of reference signals having the same frequency and different phase, wherein each of the N time measurement units includes circuitry for providing a phase value, relative to the plurality of reference signals, at which an event occurs; a plurality of memory elements each constructed and arranged for storing a value indicative of a count of elapsed cycles of one of the plurality reference signals; a selector having a plurality of inputs respectively coupled to the plurality of memory elements and an output for providing one of the plurality of inputs responsive to the phase value; multi-phase generating circuitry for generating the plurality of reference signals; a first counter coupled to the multi-phase generating circuitry for receiving a first of the plurality of reference signals; and a second counter coupled to the multi-phase generating circuitry for receiving a second of the plurality of reference signals, wherein the first counter is coupled to a first of the plurality of memory elements and the second counter is coupled to a second of the plurality of memory elements for providing respective counts thereto.