Patent ID: 7361550
Filing Date: 2008-04-22
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor memory device, the method comprising: forming an insulating layer on a semiconductor substrate having an active region therein; forming a lower electrode conductive pad extending through the insulating layer and electrically contacting the active region at a lower surface thereof; forming a bitline conductor on the semiconductor substrate and on at least a portion of an upper surface of the lower electrode conductive pad; forming a recess in the insulating layer adjacent to a sidewall of the lower electrode conductive pad: forming a residual insulating layer on at least a portion of the sidewall of the lower electrode conductive pad in the recess; and forming a lower electrode conductive plug on at least a portion of the lower electrode conductive pad opposite the bitline conductor and contacting the lower electrode conductive pad at the upper surface and at one sidewall thereof; wherein the residual insulating layer is between the lower electrode conductive plug and the sidewall of the lower electrode conductive pad.