Patent ID: 7012444
Filing Date: 2006-03-14
Classification: G01R

Abstract:
1. A semiconductor tester, comprising: a driver circuit for supplying a signal of a predetermined waveform to be applied to an IC pin of a device under test (DUT) via a predetermined transmission line, wherein said driver circuit comprises: means for receiving a driver input pulse of a logic signal, detecting a rising edge of said driver input pulse and generating a differential rise correction pulse to perform a peaking correction on a rise of a waveform; means for receiving a driver input pulse of a logic signal, detecting a falling edge of said driver input pulse and generating a differential fall correction pulse to perform a peaking correction on a fall of a waveform; and means for performing said peaking correction on a rising part of a waveform outputted from said driver circuit based on said differential rise correction pulse, while performing a peaking correction on a falling part of a waveform outputted from said driver circuit based on said differential fall correction pulse.