Patent ID: 8084313
Filing Date: 2011-12-27
Classification: H01L

Abstract:
1. A method for forming a bipolar junction transistor and a metal oxide semiconductor field effect transistor in a semiconductor layer, comprising: forming first MOSFET structures in a MOSFET region of a semiconductor layer; forming bipolar junction transistor structures including forming an extrinsic base material layer over the semiconductor layer and an emitter material layer overlying the extrinsic base material layer in a bipolar junction transistor region of the semiconductor layer; forming a first material layer over the emitter material layer and the extrinsic base material layer; patterning the first material layer using a hardmask to form a thermal barrier layer over the emitter material layer and the extrinsic base material layer; patterning the emitter material layer with the hardmask to form a patterned emitter; patterning the extrinsic base material layer; forming second MOSFET structures in the MOSFET region; and heating the semiconductor layer with the thermal layer in place.