Patent ID: 6015728
Filing Date: 2000-01-18
Classification: H01L

Abstract:
A method for fabricating static random access memory polyload resistor comprising:providing a semiconductor substrate having a transistor formed thereon, wherein the transistor includes a gate terminal, a source region and a drain region;forming a dielectric layer over the substrate;removing a portion of the dielectric layer using photolithographic and etching operations to form a plurality of vias;forming a polysilicon layer over the substrate;patterning the polysilicon layer using photolithographic and etching operations, and then doping ions into the exposed polysilicon layer to form a doped polysilicon layer;forming an anti-oxidation layer over the substrate;removing a portion of the polysilicon layer and a portion of the anti-oxidation layer using photolithographic and etching operations to form an interconnect region and a load resistor region;performing a thermal oxidation; andremoving the anti-oxidation layer.