Patent ID: 7223647
Filing Date: 2007-05-29
Classification: H01L,Y10S

Abstract:
1. A method for forming a semiconductor device comprising: forming a plurality of transistors with un-annealed source/drain regions, said plurality of transistors including a PMOS transistor and an NMOS transistor; forming an oxide film on said plurality of transistors; depositing a stressed silicon nitride film on said oxide film over said NMOS transistor and said PMOS transistor then removing said stressed silicon nitride film from over said PMOS transistor, said stressed silicon nitride film being under tensile stress; annealing said source/drain regions with said stressed silicon nitride film over said said NMOS transistor; and after said annealing, stripping said stressed silicon nitride film from over said NMOS transistor such that said removing and said stripping diminish a thickness of said oxide film over said PMOS transistor.