Patent ID: 6582982
Filing Date: 2003-06-24
Classification: G02F,H01L

Abstract:
A manufacturing method of a TFT substrate for a display, comprising:depositing a metal layer made of Al or Al alloy on a substrate; depositing a MoW alloy layer including tungsten of 0.01 atm % to 20 atm %, the rest of molybdenum and inevitable impurity, on the metal layer and the substrate; forming a gate line, a gate electrode connected to the gate line, and a gate pad connected to the gate line by patterning the MoW alloy layer and etching the metal layer using an etchant; depositing a gate insulating layer; forming an un-doped amorphous silicon layer and a doped amorphous silicon layer; forming a data pattern including a data line, a source and a drain electrode, and a data pad connected to the data line; etching the doped amorphous silicon layer using the data pattern as an etch mask; depositing a passivation layer; patterning the passivation layer along with the gate insulating layer to expose portions of the gate pad, the data pad and the drain electrode; depositing a transparent conductive layer; and etching the transparent conductive layer to form a gate conductive layer connected to the gate pad and a pixel electrode connected to the drain electrode, wherein the metal layer comprises an aluminum and a transition metal or a rare earth metal less than 5%, wherein the etchant is CH3COOH/HNO3/H3PO4/H2O having HNO3 of the concentration of 8-14%, and wherein the data pattern comprises a lower layer made of chromium and an upper layer made of a MoW alloy layer including tungsten of 0.01 atm % to 25 atm %, the rest of molybdenum and inevitable impurity, and the data pattern is etched by using HNO3/(NH4)2Ce(NO3)6/H2O.