Patent ID: 7755374
Filing Date: 2010-07-13
Classification: G01R

Abstract:
1. An apparatus for testing a plurality of semiconductor devices, the apparatus comprising: a housing; a body contained within said housing comprising a first member configured as a drawer to be movable in and out of said housing in a generally horizontal direction; said first member comprising a receptacle portion having at least one opening in the bottom thereof; said receptacle portion configured to receive a tray assembly containing the plurality of semiconductor devices having exposed electrical contacts; said tray assembly comprising a top portion and a bottom portion, said bottom portion comprising a plurality of structures for retaining bottoms of the semiconductor devices in fixed positions, tray openings associated with each of said structures providing access to said electrical contacts and means for securing said top portion to said bottom portion, said top portion comprising a plurality of surfaces on a bottom of said top portion for contacting tops of the semiconductor devices; a second member for substantially retaining said first member when said first member is in said housing, said second member configured to move said first member in a generally vertical direction within said housing; a tester pack contained within said housing for receiving said tray assembly when said second member moves said first member proximate said tester pack, said tester pack configured to send and receive electrical signals to the semiconductor devices by way of said electrical contacts; and a test computer in communication with said tester pack where said test computer provides at least one instruction to said tester pack allowing said tester pack to test the semiconductor devices and return test information to said test computer.