Patent ID: 6271091
Filing Date: 2001-08-07
Classification: H01L,Y10S

Abstract:
A method of fabricating a flash memory cell, comprising the steps of:forming a field insulating layer on a substrate;forming a first gate oxide layer on the substrate;forming a floating gate, a first insulating layer and a control gate on the first gate oxide layer;forming sidewall insulating layers at both sides of the floating gate and the control gate, wherein a first side of the sidewall insulating layers on the floating gate and the first side of the sidewall insulating layers on the control gate are formed at different times, and the first side of the sidewall insulating layers on the control gate acts as a mask in forming both the floating gate and a source/drain region;forming sidewall conductive layers on the sidewall insulating layers; andforming a source and drain region in the substrate.