Patent ID: 8932940
Filing Date: 2015-01-13
Classification: B82Y,H01L,Y02E,Y10S

Abstract:
1. A method for direct heteroepitaxial growth of vertical III-V arsenide, phosphide or nitride semiconductor nanowires on a silicon substrate having a native oxide, the method comprising: treating the silicon substrate to remove the native oxide, and promptly handling and placing the silicon substrate into a reaction chamber after said treating and without any pre-deposited material on a surface of the silicon substrate but with some native oxide reformation to create a non-uniform native oxide on the silicon substrate; heating the silicon substrate without any pre-deposited material and with the non-uniform native oxide on its surface and having it reach thermal equilibrium at a growth temperature after a stabilization time; providing Group III-V precursors of the arsenide, phosphide or nitride into the reaction chamber having the silicon substrate without any pre-deposited material but with some native oxide reformation to create the non-uniform native oxide on the surface to establish a total flow rate of the Group III-V arsenide, phosphide or nitride precursors and allow self-assembled Group III-V arsenide, phosphide or nitride islands to nucleate confined by the non-uniform native oxide, each with a chosen molar fraction; and allowing growth of the vertical III-V arsenide, phosphide or nitride semiconductor nanowires to continue for a growth time.