Patent ID: 6372539
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A method of packaging integrated circuits comprising:patterning a conductive substrate sheet formed from a conductive material to define a multiplicity of device areas, each device area including a plurality of contact landings formed from the substrate sheet, wherein the patterning define troughs in the substrate sheet that separate the contact landings; attaching a multiplicity of dice to the substrate sheet, each die having a plurality of associated bond pads; electrically connecting the bond pads on the dice to their associated contact landings; molding at least one cap over the device areas to encapsulate the dice and to fill at least some of the troughs; and bulk removing excess portions of the substrate sheet to electrically isolate the contact landings thereby exposing molding material segments between the contact landings that are substantially co-planar with remaining exposed portions of the contact landings, thereby forming electrically isolated independent contacts in a molded package wherein the molding material serves to hold the contacts in place and electrically isolate the independent contacts.