Patent ID: 6291340
Filing Date: 2001-09-18
Classification: C23C,H01L

Abstract:
A process for fabricating a contact structure in an integrated semiconductor circuit comprising:providing a silicon region on a surface of a semiconductor wafer for electrical contact thereto;depositing a dielectric layer over the silicon region;etching a contact opening through said dielectric layer, said contact opening exposing a portion of said silicon region, said contact opening having a side wall;depositing a titanium metal layer within the contact opening, said titanium metal layer covering the portion of the silicon region exposed by the contact opening;depositing an amorphous titanium carbonitride film having no definite crystalline structure and having virtually no crystalline titanium therein, said amorphous titanium carbonitride film lining the side wall of the contact opening and overlaying the titanium metal layer covering the portion of the silicon region exposed by the contact opening; andfilling at least a portion of the contact opening with a conductive material.