Patent ID: 6875921
Filing Date: 2005-04-05
Classification: H01L,H05K

Abstract:
1. An assembly, comprising: an integrated circuit die having a substantially planar surface, a power supply conductor, a ground conductor and a signal conductor; a package, the package housing the integrated circuit die and having an inside upper surface and a landing pad; and a caposer having a first surface, a first conductive layer, a second conductive layer, and a second surface, wherein the first conductive layer and the second conductive, layer are substantially planar and are parallel to one another, the first conductive layer being coupled to the power supply conductor, the second conductive layer being coupled to the ground conductor, the caposer having a through-hole that extends from the first surface, through the first and second conductive layers and to the second surface, wherein the signal conductor of the integrated circuit die is coupled to the landing pad through the through-hole without being coupled to the first conductive layer or the second conductive layer, wherein the first surface of the caposer is disposed adjacent to the substantially planar surface of the integrated circuit die, and wherein the second surface of the caposer is disposed adjacent to the inside upper surface of the package.