Patent ID: 6127856
Filing Date: 2000-10-03
Classification: G11C

Abstract:
A sample-and-hold circuit comprising:a current mirror circuit having first terminal connected to one side of said current mirror circuit and a second terminal connected to an opposite side of said current mirror circuit, wherein said current mirror circuit is designated to flow a desired current therein;an input terminal that receives an input voltage and that is connected to said first terminal of said current mirror circuit to enable said input voltage to be sampled by said sample-and-hold circuit;a switching circuit that generates a switching signal that switches the operation of said current mirror circuit such that said desired current flows through said current mirror circuit during a sampling mode to sample said input voltage and does not flow through said current mirror circuit during a holding mode, wherein said switching signal is supplied to said second terminal of said current mirror circuit; anda second current mirror couple to said input terminal.