Patent ID: 6104659
Filing Date: 2000-08-15
Classification: G11C

Abstract:
A memory device comprising:a plurality of banks each of which includes an array of memory cells; andat least a first and a second internal power generator, provided for each of said plurality of banks, for generating an internal power source voltage which differs from a voltage supplied by an external power source,wherein, when a common internal power source voltage in said memory device is lower than a first voltage, said first and second internal power generators in said plurality of banks are activated,wherein, when said common internal power source voltage in said memory device is higher than said first voltage and lower than a second voltage, which is higher than said first voltage, said second internal power generators in said plurality of banks are activated, andwherein, when said internal power source voltage in a bank in the activated state is lower than a third voltage, said first and second internal power generators in the corresponding bank are activated.