Patent ID: 8291175
Filing Date: 2012-10-16
Classification: G06F

Abstract:
1. A method for processing a read request identifying an address, comprising: receiving, at a module comprising a flash memory and a memory buffer, the read request from a requesting processor node, determining, using a coherence directory controller within the module, that a copy of the cache line is stored in a second cache memory in a remote processor node, sending a coherency message from the module to the remote processor node to change a state of the copy of the cache line in the second cache memory; receiving, at the module, the copy of the cache line from the remote processor node; sending, using the processor bus and in response to the read request, the cache line to the requesting processor node; identifying a requested page stored within the flash memory of the module based on the address; storing a copy of the requested page in the memory buffer of the module; and writing the cache line to the copy of the requested page in the memory buffer of the module.