Patent ID: 9070552
Filing Date: 2015-06-30
Classification: H01L

Abstract:
1. A standard cell complementary metal oxide semiconductor (CMOS) device, comprising: a first power rail extending across the standard cell, the first power rail being connected to one of a first voltage or a second voltage less than the first voltage; a second power rail extending across the standard cell, the second power rail being connected to an other one of the first voltage or the second voltage, the second power rail including a metal x layer interconnect and a set of metal x−1 layer interconnects connected to the metal x layer interconnect; a set of CMOS transistor devices between the first power rail and the second power rail and powered by the first power rail and the second power rail; and an x−1 layer interconnect extending under the second power rail and orthogonal to the second power rail, the x−1 layer interconnect being coupled to the set of CMOS transistor devices.