Patent ID: 9202001
Filing Date: 2015-12-01
Classification: G06F

Abstract:
1. A computer-implemented method for routing in an electronic circuit design comprising: assigning, using one or more computing devices, a plurality of rats interconnecting one or more terminals associated with a layout of the electronic circuit design to a bundle; sequencing, using the one or more computing devices, the plurality of rats within the assigned bundle to generate a defined sequence of rats within the assigned bundle, wherein sequencing involves altering an initial assignment of the plurality of rats; performing one or more bundle rake swaps associated with the electronic circuit design; visually displaying updates of the one or more bundle rake swaps via a flow rake display after the one or more bundle rake swaps are performed; and routing, using the one or more computing devices, the plurality of rats between the one or more terminals, based upon, at least in part, the defined sequence of rats and the one or more bundle rake swaps.