Patent ID: 6420210
Filing Date: 2002-07-16
Classification: H01L,H05K,Y02P

Abstract:
A method for manufacturing a semiconductor device, comprising:adhering a first adhesive surface of a dielectric tape layer onto a pad mounting surface of a semiconductor chip, the dielectric tape layer being formed with a plurality of holes at positions registered with bonding pads provided on the pad mounting surface to expose the bonding pads, each of the holes being confined by a wall that cooperates with a registered one of the bonding pads to form a contact receiving space; placing a plurality of conductive contacts in the contact receiving spaces, respectively; and adhering a circuit layout surface of a printed circuit board onto a second adhesive surface of the dielectric tape layer opposite to the first adhesive surface, and bonding circuit traces formed on the circuit layout surface to the conductive contacts to establish electrical connection with the bonding pads, wherein the second adhesive surface is provided with a heat-curable adhesive having a curing point that is lower than a melting point of the conductive contacts, and adhering of the printed circuit board onto the dielectric tape layer and bonding of the circuit traces to the conductive contacts are performed simultaneously through a heat curing operation such that the circuit layout surface is already adhered onto the second adhesive surface prior to melting of the conductive contacts.