Patent ID: 6404019
Filing Date: 2002-06-11
Classification: G11C,H01L

Abstract:
A semiconductor structure comprising:two rows of field effect transistors with each transistor having output regions of a first conductivity type separated by portions of a semiconductor body of a second opposite conductivity type and having a U-shaped gate electrode separated from a top surface of the semiconductor body by a dielectric layer; first and second isolation regions extending from the top surface of the semiconductor body into same and being separated by a first portion of the semiconductor body in which active portions of the transistors exist; each U-shaped gate electrode having right and left arms and a central portion which connects a right arm portion to a left arm portion; and each of the right and left arms having an end portion and a middle portion with the middle portion being adjacent the central portion; the end portions of the right and left arms of the U-shaped gate electrodes of the first row being located over portions of the first isolation region, and the middle portions of the right and left arms of the first row and the central portions of the first row being located over the first portion of the semiconductor body; the end portions of the right and left arms of the U-shaped gate electrodes of the second row being located over portions of the second isolation region, and the middle portions of the right and left arms of the second row and the central portions of the second row being located over the first portion of the semiconductor body; the U-shaped gate electrodes of the second row of transistors being displaced from the U-shaped gate electrodes of the first row with a left arm of a gate electrode of a transistor of the second row being located below a right arm of a gate electrode of a transistor of the first row and a right arm of a gate electrode of a transistor of the second row being located below a left arm of a gate electrode of a transistor of the first row.