Patent ID: 8744831
Filing Date: 2014-06-03
Classification: G06F

Abstract:
1. A simulation apparatus that manages a simulation time which indicates an elapsed time for executing processing by a verification target when the verification target performs hardware processing and software processing, and reproduces an execution timing of each processing by the verification target, the simulation apparatus comprising: a hardware model execution unit that executes a hardware model that simulates processing of hardware installed in the verification target and notifies of a hardware simulation time indicating an elapsed time for processing by the hardware model; a software model execution unit that executes a software model that simulates processing of software installed in the verification target and notifies of a software simulation time indicating an elapsed time for processing by the software model; a simulation time management unit that stores a first simulation time indicating a total elapsed time of the hardware simulation time and a second simulation time indicating a total elapsed time of the software simulation time, acquires the hardware simulation time whenever the hardware model notifies the hardware simulation time, adds the hardware simulation time to the first simulation time to set the first simulation time ahead by the hardware simulation time, acquires the software simulation time whenever the software model notifies the software simulation time and adds the software simulation time to the second simulation time to set the second simulation time ahead by the software simulation time; an execution instruction unit that compares the first simulation time with the second simulation time, instructs the software model execution unit to execute the software model when the first simulation time is later than the second simulation time, and instructs the hardware model execution unit to execute the hardware model when the second simulation time is later than the first simulation time; and an interrupt management unit that stores information that indicates whether or not an interrupt notification by the hardware model to the software model exists at present, wherein the execution instruction unit queries the interrupt management unit whether or not the interrupt notification exists, instructs the software model execution unit to execute an interrupt handler of the software model when the interrupt notification exists, instructs the software model execution unit to execute a task of the software model when the interrupt notification does not exist, instructs, when the software model awaits an interrupt from the hardware model, the hardware model execution unit to execute only the hardware model instead of execution of an idle loop of the software model until the interrupt from the hardware model occurs, and sets the second simulation time ahead to the first simulation time when the interrupt from the hardware model occurs to reduce a simulation time in an idling state.