Patent ID: 7485923
Filing Date: 2009-02-03
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first insulating layer; a semiconductor layer formed on said first insulating layer; a second insulating layer on a part of said semiconductor layer; and a gate electrode formed on said semiconductor layer through said second insulating layer, wherein said semiconductor layer comprises: a low concentration region formed under said gate electrode and said second insulating layer; two diagonally or obliquely implanted high concentration regions formed in at least two regions on outer sides of said low concentration region, substantially all of said high concentration regions being under said gate electrode and said second insulating layer, and having an impurity concentration higher than that of said low concentration region, respectively; and two source/drain regions formed in side portions outside said high concentration regions to have low concentration region side end portions, respectively, and a width of said high concentration regions is between 20 nm and 30 nm.