Patent ID: 9159456
Filing Date: 2015-10-13
Classification: G11C

Abstract:
1. A semiconductor device comprising: a memory configured to hold data; a register configured to store a first data group including test data to be written in the memory and read/write instruction data instructing an operation of reading or writing to the memory; a first inversion portion having a function of inverting a value of the test data outputted from the register; a second inversion portion having a function of inverting a value of the read/write instruction data outputted from the register; a first input portion configured to input a data inversion instruction to the first inversion portion; a second input portion configured to input the data inversion instruction to the second inversion portion; and a data switching portion configured to switch between a test data group obtained by applying predetermined processing to the first data group outputted from the register through the first and second inversion portions and a second data group used for reading/writing of the data held in the memory during a system operation as input data to the memory.