Patent ID: 7171496
Filing Date: 2007-01-30
Classification: G06F

Abstract:
1. A data bus width conversion apparatus for receiving N-bit data (N is a positive integer) from a first device having a first bus width and outputting the N-bit data to a second device having a second bus width, wherein the first device divides the N-bit data into a plurality of bit data groups and the plurality of bit data groups are transferred to the apparatus, the apparatus comprising: a setting section for arbitrarily setting the total number of transfer operations required for the first device to transfer the plurality of bit data groups, and for arbitrarily setting a division pattern of the N-bit data for dividing the N-bit data into the plurality of bit data groups; a receiving section for receiving data indicated by each of the plurality of bit data groups in accordance with the total number of transfer operations and the division pattern; and an output section for producing the N-bit data from the received data indicated by each of the plurality of bit data groups and outputting the produced N-bit data to the second device.