Patent ID: 9129855
Filing Date: 2015-09-08
Classification: H01L

Abstract:
1. A method of making a semiconductor structure using a substrate having a non-volatile memory (NVM) portion and a logic portion, comprising: forming a select gate over the substrate in the NVM portion and a first protection layer over the logic portion; forming a control gate and a charge storage layer over the substrate in the NVM portion, wherein a top surface of the control gate is substantially coplanar with a top surface of the select gate and the charge storage layer is under the control gate, along adjacent sidewalls of the select gate and control gate, is partially over the top surface of the select gate; forming a second protection layer over the NVM portion and the logic portion; removing the second protection layer and the first protection layer from the logic portion leaving a portion of the second protection layer over the control gate and the select gate; and forming a gate structure over the logic portion comprising a gate dielectric of high k material and a metal gate over the gate dielectric.