Patent ID: 6646654
Filing Date: 2003-11-11
Classification: G09G

Abstract:
A modulation circuit for outputting pulse signals modulated according to a value of a binary code, comprising:a selecting means for dividing the binary code from the most significant bit to least significant bit into a plurality of parts, and selecting and outputting the therefore obtained divided binary codes in a preset order; and a pulse outputting means for receiving the divided binary codes from the selecting means, and outputting a plurality of said pulse signals of a predetermined period each having a pulse width and a level corresponding to one of the divided binary codes; wherein for each of the divided binary codes, the selecting means divides the predetermined period into a plurality of sub-frame periods of lengths corresponding to the bit lengths of the divided binary codes and selects and outputs the divided binary code corresponding to a sub-frame period in that sub-frame period; and further comprising a clock counting means for receiving clock pulses, counting the clock pulses from an initial value at the beginning of each sub-frame period, and outputting the clock count, wherein the pulse outputting means detects the time when the magnitudes of the clock count and the value of the divided binary code invert and inverts the level of the pulse signal near this time.