Patent ID: 7092018
Filing Date: 2006-08-15
Classification: G06T,G09G,H01L,H04N

Abstract:
1. An image signal processor for processing a plurality of image signals associated with in each of a plurality of screens, comprising: an image memory circuit for storing a signal corresponding to a target pixel and signals corresponding to a plurality of peripheral pixels adjacent to the target pixel; a deficiency candidate detection circuit, connected to the image memory circuit, for comparing the signal of the target pixel with a threshold value set in accordance with the signals of the plurality of peripheral pixels to detect a deficient pixel candidate and generating a comparison result; a deficiency determining circuit, connected to the deficiency candidate detection circuit, for determining a deficient pixel according to continuity of the deficient pixel candidate based on a plurality of comparison results over the plurality of screens; a position memory circuit, connected to the deficiency determining circuit for storing deficiency information of a position of the deficient pixel determined by the deficiency determining circuit; and a deficiency correction circuit, connected to the position memory circuit, for correcting the signal of the target pixel which is deficient in accordance with the deficiency information, wherein the deficiency candidate detection circuit computes a difference between a maximum level and a minimum level of the signals of the plurality of peripheral pixels, producing a first threshold value by adding the difference to an average level of the signals of the plurality of peripheral pixels and producing a second threshold value by subtracting the difference from the average level.