Patent ID: 8299499
Filing Date: 2012-10-30
Classification: H01L

Abstract:
1. A field effect transistor comprising: a Schottky layer; a stopper layer formed of InGaP and provided in a recess region on said Schottky layer; a cap layer provided on said stopper layer and formed of GaAs; and a barrier rising suppression region configured to suppress rising of a potential barrier due to interface charge between said stopper layer and said cap layer, wherein said cap layer comprises: a high concentration cap layer; and a low concentration cap layer having an impurity provided directly or indirectly under said high concentration cap layer and having an impurity concentration lower than said high concentration cap layer, wherein said barrier rising suppression region is provided for a layer between said stopper layer and said low concentration cap layer, and comprises a GaAs electron compensation layer which contains said impurity of a higher concentration than said low concentration cap layer.