Patent ID: 9130794
Filing Date: 2015-09-08
Classification: H04B,H04L

Abstract:
1. An apparatus for driving data on a differential channel including a first output terminal and a second output terminal, the apparatus comprising: a differential high-speed driver circuit; and a first pre-driver and a second pre-driver; wherein the first pre-driver includes a first set of sub-pre-driver circuits, each sub-pre-driver circuit of the first set connected to a first end of a respective capacitor, a second end of the respective capacitor connected to the first output terminal; wherein the second pre-driver includes a second set of sub-pre-driver circuits, each sub-pre-driver of the second set connected to a first end of a respective capacitor, a second end of the respective capacitor connected to the second output terminal; wherein each sub-pre-driver circuit may output a logic ‘0’, a logic ‘1’, or a high-impedance state; wherein one or more of the sub-pre-driver circuits are operable to enter into the high-impedance state before a start of data communication and are prohibited from entering into the high-impedance state during data communication; wherein each sub-pre-driver circuit that is not in the high-impedance state outputs logic ‘1’ when the associated pre-driver is driving a logic ‘1’ and outputs logic ‘0’ when the associated pre-driver is driving logic ‘0’, and wherein the transitions of sub-pre-driver circuits of a pre-driver from logic ‘0’ to logic ‘1’ and from ‘1’ to ‘0’ are synchronized with each other; wherein the first pre-driver is to output a logic ‘1’ on the first output terminal when the differential high speed driver circuit is driving a logic ‘1’ on the first output terminal, and the first pre-driver is to output a logic ‘0’ on the first output terminal when the differential high speed driver circuit is driving a logic ‘0’ on the first output terminal; and wherein the first and second pre-drivers are to drive data complimentary to each other.