Patent ID: 7691720
Filing Date: 2010-04-06
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of forming a semiconductor device structure, the method comprising: forming a conductive pad on a substrate; growing at least one semiconducting nanotube extending substantially vertically from the conductive pad between a first end electrically coupled with the conductive pad and a second free end; applying a first insulating layer on the conductive pad and the at least one semiconducting nanotube such that a portion of the first insulating layer defines a gate dielectric on the at least one semiconducting nanotube; applying a conductive layer on the first insulating layer and the at least one semiconducting nanotube; patterning the conductive layer to form a gate electrode electrically insulated from the conductive pad by the first insulating layer and overlying the conductive pad with the at least one semiconducting nanotube extending vertically through an aperture in the gate electrode and electrically isolated from the gate electrode by the gate dielectric; and forming a contact electrically coupled with the second end of the at least one semiconducting nanotube and electrically insulated from the gate electrode.