Patent ID: 6801504
Filing Date: 2004-10-05
Classification: H04L

Abstract:
A node device in an Asynchronous Transfer Mode ATM network comprising:line processing interfaces provided for respective lines of said ATM network; an ATM switch to which Virtual Path VP output from said line processing interfaces are connected and from which VP input to said line processing interfaces are connected; and a processor for controlling said ATM switch and all of said line processing interfaces; and at least one of said line processing interfaces comprises: a line receiving portion for receiving an ATM cell; a failure notification portion for communicating a failure of a VP when the failure is detected at said line receiving portion by interruption of the ATM cell; a cell extracting/generating portion for making a copy of the ATM cell which is input from said ATM switch to said at least one line processing interface according to an instruction from said failure notification portion, when the failure of said VP is detected, and for generating a failure alarm cell using copied data of a header of the ATM cell; a cell inserting portion for transferring the failure alarm cell generated at the cell extracting/generating portion to said ATM switch; and a line sending portion for sending the cell input from said ATM switch to said cell extracting/generating portion from the at least one line processing interface.