Patent ID: 6060784
Filing Date: 2000-05-09
Classification: H01L,Y10S

Abstract:
A semiconductor device comprising:a semiconductor substrate having a first region with first transistors therein and a second region with second transistors therein;an insulating layer on said substrate and having a planar top surface extending over said first region and said second region;plural first conductive interconnection lines directly on said top surface of said insulating layer and first vias connecting respective ones of said first interconnection lines to respective ones of said first transistors, said first interconnection lines having lengths across said top surface whose average length is a first average length, and each of said first interconnection lines having a first thickness perpendicular to said top surface and a first width parallel to said top surface; andplural second conductive interconnection lines directly on said top surface of said insulating layer and second vias connecting respective ones of said second interconnection lines to respective ones of said second transistors, said second interconnection lines having lengths across said top surface whose average length is a second average length that is greater than said first average length, and each of said second interconnection lines having said first width and a second thickness perpendicular to said top surface that is greater than said first thickness.