Patent ID: 7277148
Filing Date: 2007-10-02
Classification: G02F,H01L

Abstract:
1. A thin film array panel comprising: a gate line formed on a substrate; a first insulating layer on the gate line; a data line formed on the first insulating layer; a second insulating layer formed on the data line and having an opening, a pixel electrode formed on the first insulating layer and overlapping the data line and the second insulating layer; and a third insulating layer disposed between the pixel electrode and the first insulating layer, wherein a center portion of the pixel electrode is formed on the third insulating layer and an edge portion of the pixel electrode overlaps a lateral surface of the second insulating layer, wherein the center portion of the pixel electrode is in direct contact with the third insulating layer, and wherein the second insulating layer further has a top surface and the pixel electrode does not overlap the top surface of the second insulating layer.