Patent ID: 7531890
Filing Date: 2009-05-12
Classification: H01L

Abstract:
1. A multi-chip package (MCP), comprising: a plurality of stacked semiconductor chips, each chip including: a chip pad on a main surface thereof; a first insulating layer overlying the chip pad, the first insulating layer having an opening to expose a portion of the chip pad; a pad redistribution line formed on the first insulating layer; a second insulating layer covering the pad redistribution line, wherein a via hole is formed through the chip, the first insulating layer, the pad redistribution line and the second insulating layer; a protective layer formed on the bottom of the lowest semiconductor chip, the protective layer including a conductive pad formed opposite the bottom of the lowest semiconductor chip; a conductive bar extending through the via holes of the stacked semiconductor chips, from the conductive pad, and being electrically connected to the pad redistribution line of the stacked semiconductor chips.