Patent ID: 7781278
Filing Date: 2010-08-24
Classification: H01L

Abstract:
1. A method for forming a semiconductor device, comprising: forming a semiconductor substrate comprising first and second device regions that are isolated from each other by an isolation region, wherein the first device region has a planar surface with a first crystalline orientation, the second device region has a second crystalline orientation which is different from said first crystalline orientation, and the isolation region is formed by crystallographic etching which etches the semiconductor substrate along the first crystalline orientation at a rate faster than along the second crystalline orientation, thereby forming an isolation trench having a V-shaped bottom, followed by filling the isolation trench with an insulator material to form an insulator structure having a V-shaped bottom portion, and wherein said crystallographic etching concurrently forms at least one V-shaped trench within the second device region which has interior surfaces with the second crystalline orientation; forming a first field effect transistor (FET) at the first device region, wherein said first FET comprises a channel that extends along the planar surface of the first device region; and forming a second, complementary FET at the second device region, wherein said second FET comprises a channel that extends perpendicularly across the at least one V-shaped trench and along the interior surfaces of said at least one V-shaped trench, and wherein a dopant concentration near the top part of the at least one V-shaped trench is different from that near the bottom of the at least one V-shaped trench.