Patent ID: 9177807
Filing Date: 2015-11-03
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device comprising the steps of: (a) forming a first insulating film over a semiconductor substrate having a formation region of a first field effect transistor driven by a first power supply voltage, and a formation region of a second field effect transistor driven by a second power supply voltage higher than the first power supply voltage; (b) depositing a dummy gate film over the first insulating film; (c) depositing a hard mask film over the dummy gate film; (d) processing the hard mask film so that thickness of the hard mask film of the formation region of the second field effect transistor becomes thicker than the thickness of the hard mask film of the formation region of the first field effect transistor; (e) patterning the dummy gate film and the hard mask film after the step (d); (f) after the step (e), forming a semiconductor region for the source and drain of the first field effect transistor; (g) after the step (e), forming a semiconductor region for the source and drain of the second field effect transistor; (h) after the step (f) and step (g), performing heat treatment to activate the semiconductor regions for the source and drain of the first field effect transistor and the second field effect transistor; (i) after the step (h), depositing a second insulating film over the semiconductor substrate and thereafter removing the second insulating film until the dummy gate film is exposed; (j) after the step (i), removing the dummy gate film exposed from the second insulating film; (k) after the step (j), forming a third insulating film having a dielectric constant higher than the first insulating film in the removal region of the dummy gate film; and (l) after the step (k), forming a gate electrode formed of a conductor film containing metal as a main component via the third insulating film in the removal region of the dummy gate film.