Patent ID: 7830715
Filing Date: 2010-11-09
Classification: G11C,H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate including a first element region which is surrounded by an element isolation insulation layer; a first transistor including a gate electrode which is provided on the first element region via a gate insulation film, and a source region and a drain region which are provided in the first element region and are spaced apart such that the gate electrode is interposed between the source region and the drain region; a first auxiliary wiring layer and a second auxiliary wiring layer which extend in a channel length direction and are provided on the element isolation insulation layer such that the first transistor is interposed between the first auxiliary wiring layer and the second auxiliary wiring layer; and a control circuit which sets, while the first transistor is in an ON state, the first auxiliary wiring layer and the second auxiliary wiring layer at a first voltage of the same polarity as a gate voltage of the first transistor that is in the ON state.