Patent ID: 8536855
Filing Date: 2013-09-17
Classification: G05F

Abstract:
1. An adjustable regulator circuit comprising: a first current path having a first bipolar transistor, having a collector, an emitter and a base; a second current path having a second bipolar transistor, having a collector, an emitter and a base, with the emitter of the second bipolar transistor smaller than the emitter of the first bipolar transistor; a first load having a first end connected to the emitter of the first bipolar transistor, and a second end connected to the emitter of the second bipolar transistor; a second load having a first end connected to the second end of first load, and a second end; a third load having a first end connected to the collector of the first bipolar transistor, and a second end; a fourth load having a first end connected to the collector of the second bipolar transistor, and a second end; a MOS transistor having a source, a drain and a gate, with the gate connected to the collector of the second bipolar transistor; and the source connected to the second ends of third load and the fourth load; and the drain connected to the second end of the second load; and a resistive load having two resistors connected in series at a node, said resistive load having a first end connected to the source of the MOS transistor and a second end connected to the drain of the MOS transistor, and with the node connected to the bases of the first and second bipolar transistors.