Patent ID: 7514767
Filing Date: 2009-04-07
Classification: H01L

Abstract:
1. A fan out type wafer level package structure, comprising: a metal alloy base, wherein material of said metal alloy base comprises Alloy 42, Fe—Ni—Co alloy, Cu—Fe alloy, Cu—Cr alloy, Cu—Ni—Si alloy, Cu—Sn alloy or Fe—Ni alloy with fiber glass material laminated; an adhesion material formed on said base; a die having a plurality of pads on a top surface that is opposite a bottom surface which is on said adhesion material; a first dielectric layer formed on said metal alloy base and filled in a space except said die on said metal alloy base, wherein the first dielectric layer includes silicone rubber, epoxy, resin or BCB to act as a buffer layer for releasing stress; a second dielectric layer formed on said first dielectric layer and said die, and said second dielectric layer having first openings for contact with said plurality of pads; a contact conductive layer formed on said plurality of pads of said die and within said first openings to electrically couple with said first pads, respectively; a plurality of conductive lines formed on said second dielectric layer and in contact with, said contact conductive layer and substantially filling said first openings, and said conductive lines being extended out from corresponding said first contact conductive layer to corresponding end points; an isolation layer formed on said conductive lines and said second dielectric layer, and said first isolation layer having second openings on said first conductive lines; and UBM (under ball metallurgy) and/or solder balls passing through said isolation layer welded on said second openings for coupling with said conductive lines, respectively.