Patent ID: 6233651
Filing Date: 2001-05-15
Classification: G06F

Abstract:
A method of operating a plurality of first in, first out (FIFO) queues, each related to a respective network port, in a FIFO memory device, comprising:defining at least a first FIFO memory area and a second FIFO memory area in a memory, each of the areas being defined between a respective top delimiter and a respective bottom delimiter;providing a respective top pointer and a respective bottom pointer for each of the FIFO memory areas;writing data for a first port into the first FIFO memory area at a location defined by the top pointer for the first FIFO memory space, reading out data for the first port at a location defined by the respective bottom pointer for the first FIFO memory space and circulating the top pointer and the bottom pointer through the first FIFO memory space;writing data for another port into the second FIFO memory space at a location defined by the respective top pointer for the second FIFO memory space, reading out data for the other port at a location defined by the respective bottom pointer for the second FIFO memory space and circulating the top pointer and the bottom pointer through the second FIFO memory space;monitoring the position of the respective top and bottom pointers for each of the FIFO memory spaces;moving a top delimiter for any of the FIFO memory spaces only when the respective top pointer is above the respective bottom pointer; andmoving a bottom delimiter for any of the memory spaces only when the bottom delimiter for any of the memory spaces is below the respective bottom pointer of the respective memory space.