Patent ID: 7839678
Filing Date: 2010-11-23
Classification: G11C

Abstract:
1. A NAND type flash memory comprising: a first selection transistor; a second selection transistor; a first memory cell transistor, a second memory cell transistor, and a third memory cell transistor having current paths connected in series between one end of a current path of the first selection transistor and one end of a current path of the second selection transistor, and each having a control gate and a charge storage layer; the first memory cell transistor being provided between the first selection transistor and the third memory cell transistor; the second memory cell transistor being provided between the second selection transistor and the third memory cell transistor; the third memory cell transistor being positioned between the first memory cell transistor and the second memory cell transistor; the third memory cell transistor holding data having not less than three bits; the first memory cell transistor holding 2-bit data in which a middle page and an upper page is written by skipping to write a lowest page; and a lowest page verify voltage being set when writing the middle page, and a middle page verify voltage being set when writing the upper page.