Patent ID: 6615394
Filing Date: 2003-09-02
Classification: G06F

Abstract:
A method of forming a model for a circuit for simulating an electromagnetic interference, said model being described by a combination of at least one variable resistance and at least one load capacitance,wherein a variable resistance value of said at least one variable resistance and a load capacitance value of said at least one load capacitance are obtained based on at least one current flowing through at least one current path between at least one set of power terminals, wherein said model includes at least one set of first and second power terminals; a first series connection of first and second variable resistances between said first and second power terminals; a second series connection of first and second load capacitances between said first and second power terminals, and a first intermediate node between said first and second variable resistances being connected to a second intermediate node between said first and second load capacitances, wherein a first variable resistance value of said first variable resistance and a second load capacitance value of said second load capacitance are obtained based on a first current which flows from said first power terminal through said first variable resistance and said second load capacitance to said second power terminal, and wherein a second variable resistance value of said second variable resistance and a first load capacitance value of said first load capacitance are obtained based on a second current which flows from said first power terminal through said first load capacitance and said second variable resistance and to said second power terminal.