Patent ID: 6480049
Filing Date: 2002-11-12
Classification: G06F,H03L,Y10S

Abstract:
An apparatus for generating a quadrature clock of frequency F corresponding to a reference clock of frequency F comprising:a voltage controlled oscillator with M-phase outputs (MPVCO) having frequency F/N set in response to a control voltage where N is greater than one; an M-output phase detector (MPD) receiving said reference clock and said M-phase outputs of said MPVCO, said MPD generating M-detector outputs in response to 2M-sampled phase outputs of said M-phase outputs and said reference clock; a Sync State logic circuit receiving said M-detector outputs of said MPD, said Sync State logic circuit generating M-Sync State outputs and an error signal, said error signal processed to generate said control voltage; and a quadrature logic circuit receiving said M-phase outputs and said M-Sync State outputs, said quadrature logic circuit generating a quadrature clock with a frequency F corresponding to said reference clock in response to said M-phase outputs and said M-Sync State outputs.