Patent ID: 6417065
Filing Date: 2002-07-09
Classification: H01L

Abstract:
A method of fabricating a bottom electrode, comprising:providing a substrate having a conductive layer therein; forming a first dielectric layer over the substrate; forming a conductive plug through the first dielectric layer to electrically couple with the conductive layer; forming a cap layer over the substrate to cover the conductive plug; forming an isolation layer over the cap layer; forming a plurality of bit lines over the isolation layer; forming a second dielectric layer over the isolation layer to cover the bit lines; forming a node contact opening through the second dielectric layer, the bit lines and the first isolation layer, wherein the node contact opening is formed between the bit lines; forming a conformal isolation layer over the substrate to partially fill the contact node opening; forming a third dielectric layer having an opening over the substrate, wherein the opening is aligned with the node contact opening; performing an etching step to remove a portion of the conformal isolation layer exposed by the opening to form an isolation spacer on a sidewall of the node contact opening, and remove the cap layer exposed by the isolation spacer at the same time; forming a conformal conductive layer in the opening and the node contact opening to make contact with the conductive plug.