Patent ID: 6707128
Filing Date: 2004-03-16
Classification: H01L

Abstract:
A semiconductor device comprising:a first semiconductor layer of a first conductivity type provided on a semiconductor substrate of the first conductivity type; a base layer of a second conductivity layer provided in the first semiconductor layer, the base layer defining a vertical MISFET including a plurality of source regions and gate electrodes, each of the gate electrodes being provided on a gate insulation film; a Schottky barrier diode (SBD)-forming region provided in the first semiconductor layer to surround the base layer; a guard ring region of the second conductivity type provided to surround the SBD-forming region; a first main electrode disposed above the first semiconductor layer to cover both the SBD-forming region and the source regions, the first main electrode being provided in common as a source electrode of the MISFET and an anode of the SBD; a surface gate electrode disposed above the first semiconductor layer to be isolated from the first main electrode by an insulation film, the surface gate electrode being electrically connected to the gate electrodes; and a second main electrode provided in common as both a drain electrode of the MISFET and a cathode of the SBD.