Patent ID: 6059983
Filing Date: 2000-05-09
Classification: H01T,H05K

Abstract:
A method of fabricating an overcoated printed circuit board having a clean area free of contamination from the overcoating material, said method comprising the steps of:forming first and second printed circuit traces on a substrate, said first and second printed circuit traces defining a channel having first and second ends;depositing a layer of soldermask onto said substrate so as to cover at least a portion of said first and second printed circuit traces and to cover said channel except at an aperture, said aperture comprising said clean area;covering said first and second printed circuit traces and said channel with a capping device;applying an overcoating material to the printed circuit board; andallowing said overcoating material to infiltrate said channel from both of said first and second ends underneath said capping device, but not to infiltrate said aperture.