Patent ID: 8865377
Filing Date: 2014-10-21
Classification: G03F,H01J,Y10S

Abstract:
1. A method for fracturing or mask data preparation of a semiconductor device layout design to be formed on a wafer, the layout design comprising a diagonal pattern, wherein a portion of the diagonal pattern comprises a constant-width or nearly constant-width track on the wafer, and wherein an inner transition region of the diagonal pattern is adjoined on one side by an outer transition region and on the other side by a central core region, the method comprising the steps of: determining a set of at least three non-overlapping variable-shaped beam (VSB) outer transition shots which are capable of forming on a surface the portion of the diagonal pattern in the outer transition region; determining a set of VSB core shots which are capable of forming on the surface the portion of the diagonal pattern in the central core region, wherein each shot in the set of core shots overlaps another shot in the set of core shots; determining a series of at least three VSB inner transition shots which are capable of forming on the surface the portion of the diagonal pattern in the inner transition region, wherein an inner transition region pattern characteristic smoothly transitions between the pattern defined by the outer transition shots and the pattern being defined by the core shots; and outputting the set of outer transition shots, the set of core shots and the series of inner transition shots.