Patent ID: 6986081
Filing Date: 2006-01-10
Classification: G11B,H03M

Abstract:
1. A block interleaving apparatus comprising: a storage means for data writing and data reading, to which (L×M) pieces of addresses are allocated wherein L and M are integers≧2; an address generation means for generating addresses for writing and reading blocks, each block having (L×M) pieces of data as a unit to be subjected to block interleaving, into/out of the storage means; and a control means for controlling the storage means so that the storage means switches, based on the addresses generated by the address generation means, between data writing and data reading; said address generation means comprising: a first overflow processing means having a first comparison means for comparing the product obtained by the multiplication means with a comparison reference value (L×M)−1, and subtracting to a difference of not less than zero (L×M)−1 from the product on the basis of the result of the comparison to suppress overflow of the product, thereby outputting an address increment value REG corresponding to of the block having the block number b; an addition means for successively adding the (n−1)th address Ab(n−1), wherein n is an integer 1≦n≦(L×M)−1 of the block having the block number b, to the address increment value REG outputted from the first overflow processing means, every time the block of the block number b is inputted, thereby successively generating the n-th address Ab(n) in the block of the block number b; and a second overflow processing means having a second comparison means for comparing a sum obtained by the addition means with the comparison reference (L×M)−1, and subtracting to a different of not less than zero (L×M)−1 from the sum on the basis of the result of the comparison to suppress overflow of the sum, thereby outputting an address to be supplied to the storage means; wherein, when the first comparison means is for comparing the product obtained by the multiplication with the comparison reference value (L×M)−1, and for employing as a comparison reference value instead of the value (L×M)−1, the minimum value A which exceeds value (L×M)−1 and is included in the product.