Patent ID: 9110137
Filing Date: 2015-08-18
Classification: G01R,G06F

Abstract:
1. A method of scanning pattern data into a scan chain which interconnects multiple scan cells embedded in one or more functional units of an integrated circuit, comprising: receiving an external clock signal from a source outside the integrated circuit at a scan interface of the integrated circuit, the external clock signal having first frequency; receiving an input serial data stream representing the pattern data at an input of the scan interface of the integrated circuit; passing the input serial data stream from the input of the scan interface to the scan chain as shift data using first transport logic; shifting the shift data through the scan chain controlled by an internal clock signal to generate return data, the internal clock signal having a second frequency which is faster than the first frequency; and passing the return data from the scan chain to an output of the scan interface as an output serial data stream using second transport logic.