Patent ID: 8110914
Filing Date: 2012-02-07
Classification: H01L

Abstract:
1. A wafer level package comprising: a chip; a removable resin layer formed to surround side surfaces and a lower surface of the chip, the chip being re-used by being easily removed from the removable resin layer, the removable resin layer being made of a high contrast, i-line sensitive epoxy-based photoresist that is developed in an aqueous alkaline-based developer; a molding material formed on a lower surface of the removable resin layer; a dielectric layer formed over the removable resin layer including the chip and including via holes to expose portions of the chip; a plurality of redistribution lines formed on the dielectric layer including insides of the via holes to be connected to the chip; and a solder resist layer formed on the dielectric layer to expose portions of the redistribution lines.