Patent ID: 6633620
Filing Date: 2003-10-14
Classification: B60C,H03K,H04L

Abstract:
A data receiver comprising:receiver means for receiving a pulse string in which each bit of binary data is represented by a pulse width between two consecutive pulse edges synchronized with regular reference clock signals; edge detection means for sequentially detecting a pulse edge from said pulse string; determination means for determining whether a pulse width between the preceding pulse edge and the present pulse edge is synchronized with the reference clock signals when the present pulse edge is newly detected by said edge detection means; edge invalidation means for invalidating the present pulse edge so that the present pulse edge is not inputted to said determination means when said pulse width is shorter than one cycle of reference clock signals; and data restore means for restoring said binary data by determining each bit of said binary data based on said pulse width when said determination means determines that said pulse width is synchronized with the reference clock signals, wherein, when said determination means determines that said pulse width is not synchronized with the reference clock signals, it is determined that a receipt error occurs, and data restore operation by said data restore means is stopped.