Patent ID: 7062618
Filing Date: 2006-06-13
Classification: G06F

Abstract:
1. A memory apparatus comprising: a volatile memory having a first capacity for storing data; a nonvolatile memory having a second capacity for storing data less than the first capacity; and a control circuit for controlling data transfer among a host, the volatile memory and the nonvolatile memory, wherein when the control circuit receives a command from a host, it interprets the command, when the interpreted command is a write command, the control circuit transfers the data from the host to the volatile memory, when the interpreted command is a read command, the control circuit transfers the data stored in the volatile memory to the host, and when the interpreted command is a transfer command, and not either of the read or write commands, the control circuit starts a data transfer to copy a part of data from the volatile memory to the nonvolatile memory, or to copy data from the nonvolatile memory to the volatile memory.