Patent ID: 6714997
Filing Date: 2004-03-30
Classification: G06F

Abstract:
In a network computing system having a main storage capable of connecting to at least one application server and an interface element with at least one adapter and a plurality of subchannels, said system being capable of establishing processing communication with at least one application user(s), a method providing an enhanced interpretive instruction execution comprising the steps of:determining if a second level of interpretive execution is needed by assessing whether said computing system contains one or more logically partitioned environments; determining if a second level of interpretive execution is needed by assessing whether said computing system contains an hypervisor environment created within another hypervisor environment; creating an I-bit in said subchannels for controlling all I/O instructions and allowing said bit to indicate which I/O instructions are to be interpretively executed when said second level is not present; creating a new bit within the interpretive-execution state description; defining a mechanism designed for controlling all second level execution; said mechanism signalling that interception of all I/O instructions has to be made when said second level is not present, when both the I-bit for the applicable subchannel and said new bit in said system are set to zero; said mechanism prohibiting interception and allowing for interpretive execution of commands when either the I-bit or said new bit has a value of one; in case a second level of interpretive instruction execution is detected, said mechanism allowing interception to occur when either said new bit in second-level state description is zero, or when both said I-bit for applicable subchannel and said new bit are zero; in case a second level of interpretive instruction execution is detected, said mechanism prohibiting interception but allowing for interpretive execution of commands when said new bit in said second-level state description is one and either the I-bit for the subchannel or said new bit contains a value of one.