Patent ID: 8271912
Filing Date: 2012-09-18
Classification: G06F

Abstract:
1. An automated method for designing an integrated circuit using a computer system, comprising: receiving a circuit description which includes a plurality of circuits having a common clock domain with distinct clock signal terminations at multiple clock distribution nodes of the common clock domain by executing first instructions in the computer system; identifying at least two functionally related circuits in the circuit description for which radiation tolerance is desired by executing second instructions in the computer system; selectively assigning a first one of the at least two circuits to a first one of the clock distribution nodes by executing third instructions in the computer system; selectively assigning a second one of the at least two circuits to a second one of the clock distribution nodes by executing fourth instructions in the computer system; optimizing the circuit description for logical-to-physical translation after said assigning of the first and second clock distribution nodes by executing fifth instructions in the computer system; determining that said optimizing has assigned the first and second circuits to a common one of the first and second clock distribution nodes by executing sixth instructions in the computer system; in response to said determining, reassigning the first circuit to the first clock distribution node and reassigning the second circuit to the second clock distribution node by executing seventh instructions in the computer system; and storing the circuit description with clock distribution node assignments in a storage device of the computer system.