Patent ID: 6080610
Filing Date: 2000-06-27
Classification: H01L

Abstract:
A method for manufacturing an SOI substrate for a CMOS transistor comprising the steps of:providing grooves in a silicon substrate to form a plurality of convex silicon regions;forming a back gate insulation film on a surface of said silicon substrate;forming back gate electrodes associated with said convex silicon regions, said back gate electrodes being disposed on said back gate insulation film, wherein said back gate electrodes are electrically isolated from each other and are respectively connected to different, independent electrodes such that different voltages can be applied independently to respective back gate electrodes;introducing a p-type impurity in at least one of said back gate electrodes associated with a convex silicon region where an nMOS transistor is to be formed and introducing an n-type impurity in at least one of said back gate electrodes associated with a convex silicon region where a pMOS transistor is to be formed;forming an insulation layer over said back gate electrodes and forming a polycrystalline silicon layer on said insulation layer;grinding a surface of said polycrystalline silicon layer;bonding a second substrate with the surface of said polycrystalline silicon layer; andremoving some of said silicon substrate to expose said back gate insulation film and isolate said convex silicon regions.