Patent ID: 8004023
Filing Date: 2011-08-23
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate having a first region and a second region; a gate electrode on the first region, the gate electrode having a first sidewall and a second sidewall; a first source region in the first region proximate to the first sidewall of the gate electrode; a first drain region in the first region proximate to the second sidewall of the gate electrode; an upper electrode on the second region, the upper electrode having a first sidewall and a second sidewall; a second source region in the second region proximate to the first sidewall of the upper electrode; and a second drain region in the second region proximate to the second sidewall of the upper electrode, wherein: an impurity doping concentration of the first source region and the first drain region is greater than an impurity doping concentration of the second source region and the second drain region, a depth of the second source region and the second drain region is about ⅓ to ½ of a depth of the first source region and the first drain region, and plug regions extend into the second region and defining electrical connection regions of the second source region and the second drain region, the plug regions being offset from the upper electrode, a depth of the plug regions being greater than a depth of the second source region and the second drain region, and each plug region dividing one of the second source region and the second drain region into at least two portions such that the plug region is disposed between the at least two portions.