Patent ID: 7478258
Filing Date: 2009-01-13
Classification: G06F

Abstract:
1. A method for identifying a location of software execution in a multiprocessor computer system, wherein each processor in the multiprocessor computer system includes a different high frequency clock having a clock value represented as a set of binary digits, the method comprising: initiating execution of a software routine in a first processor; setting, by a clock setter at an initiation of a runtime of a software routine, a first value of a first clock in the first processor in a multiprocessor computer system, wherein the first value of the first clock is represented by a first sixty-four bit unsigned clock value, wherein the first sixty-four bit unsigned clock value includes a first unique identifier for the first processor in a first leading set of three most significant bits in the first sixty-four bit unsigned clock value, wherein a first remainder of sixty-one bits of the first value is reserved for a first value of a first time that is set in the first processor when the software routine initiates execution in the first processor, and wherein identification of the first processor and identification of the first value of the first time is enabled to be performed in a first single indivisible operation that prohibits any first intervening step; redispatching the software routine from the first processor to the second processor: setting, by the clock setter at a conclusion of a runtime of the software routine, a second value of a second clock in the second processor in the multiprocessor computer system, wherein the second value of the second clock is represented by a second sixty-four bit unsigned clock value, wherein the second sixty-four bit unsigned clock value includes a second unique identifier for the second processor in a second leading set of three most significant bits in the second sixty-four bit unsigned clock value, wherein a second remainder of sixty-one bits of the second value is reserved for a second value of a second time that is set in the second processor when execution of the software routine is completed in the second processor, and wherein identification of the second processor and identification of the second value of the second time is enabled to be performed in a second single indivisible operation that prohibits any second intervening step; reading, by a clock getter, a start clock value from the first processor, wherein the start clock value is the first value of the first clock that is set by the clock setter when the software routine initiates execution in the first processor, wherein the start clock value describes both the first unique identifier of the first processor and a start time for initiating execution of the software routine in the first processor; and reading, by the clock getter, an end clock value from the second processor, wherein the end clock value is the second value of the second clock that is set by the clock setter when the execution of the software routine completes executing in the second processor, wherein the end clock value describes both the second unique identifier of the second processor and an ending time for completing execution of the software routine in the second processor, wherein the first clock value and the second clock value identify a starting processor and a finishing processor that are both used to execute the software routine.