Patent ID: 9214528
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A method of forming an integrated circuit having at least two transistor devices, the method comprising: forming a buffer layer on a substrate; forming a GaN layer over the buffer layer; forming a barrier layer over the GaN layer; forming a dielectric layer over the barrier layer; forming at least one device contact opening in the dielectric layer for each of the at least two transistor devices and an isolation contact opening in the dielectric layer between the at least two transistor devices; forming a metal layer over the dielectric layer, the device contact openings and the isolation contact opening; forming a photoresist film above each of the device contact openings, the photoresist film defining a metal mask window; etching the metal layer and, as part of the same metal layer etching step, etching a portion of the barrier layer and the GaN layer to form an isolation region where the metal mask window and isolation contact opening overlap.