Patent ID: 8982523
Filing Date: 2015-03-17
Classification: H02H,H04B

Abstract:
1. A circuit for biasing a signal line transient suppression device, the transient suppression device having a clamp voltage level at which it clamps voltage on at least a first signal line and a second signal line, a power voltage differential being provided between the first signal line and the second signal line, the circuit comprising: an input network having a first input operable to be coupled to the first signal line and a second input operable to be coupled to the second signal line, the input network produces a direct current (DC) voltage between a positive input line and a negative input line from the power voltage differential between the first signal line and the second signal line; and a bias voltage generator having a positive input connected to the positive input line of the input network and a negative input connected to the negative input line of the input network, the bias voltage generator circuit operable to produce a DC voltage output between a positive output and a negative output, the positive output coupled to a positive side of the transient suppression device, the negative output coupled to a negative side of the transient suppression device, the DC output voltage is at a level above the sum of a maximum amplitude of the power voltage differential between the first and second signal lines and a signal level between the first and second signal lines, wherein the input network comprises: a first input impedance coupled between the first input and a center point between a first diode pair coupled in series between the positive line and the negative line of the input network; and a second input impedance coupled between the second input and a center point between a second diode pair coupled in series between the positive line and the negative line of the input network.