Patent ID: 6849514
Filing Date: 2005-02-01
Classification: H01L

Abstract:
1. A method of manufacturing a SONOS flash memory device comprising the steps of: forming a lower oxide layer, a tunnel nitride layer, a sacrificial oxide layer, and an insulating layer for a hard mask on a semiconductor substrate having device isolation regions; removing a portion of the insulating layer for a hard mask by an etching process to expose a portion of the sacrificial oxide layer; forming spacers on sidewalls of the insulating layer etched; removing some part of the sacrificial oxide layer and the tunnel nitride layer by an etching process using the insulating layer and the spacers as a mask to expose a portion of the lower oxide layer; removing the insulating layer, the spacers, and the sacrificial oxide layer; removing a portion of the lower oxide layer by an etching process using the tunnel nitride layer etched as a mask to expose a portion of the substrate; depositing an upper oxide layer and a polysilicon layer in sequence over the resulting structure; and forming a gate having two separate tunnel nitride layer parts by removing some parts of the polysilicon layer, the upper oxide layer, and the tunnel nitride layer in sequence by an etching process.