Patent ID: 6521496
Filing Date: 2003-02-18
Classification: C30B,H01L

Abstract:
A method of making a non-volatile memory comprising:forming a source region and a drain region in a silicon substrate and defining a channel region therebetween; forming a tunnel oxide layer adjacent the silicon substrate; forming a polysilicon floating gate layer adjacent the tunnel oxide; forming a control gate oxide layer adjacent the polysilicon floating gate layer by growing a first oxide portion by upwardly ramping the polysilicon floating gate layer to a first temperature lower than a glass transition temperature, and exposing the polysilicon floating gate layer to an oxidizing ambient at the first temperature and for a first time period, and growing a second oxide portion between the first oxide portion and the polysilicon floating gate layer by exposing the polysilicon floating gate layer to an oxidizing ambient while upwardly ramping the polysilicon floating gate layer at a modulated ramp rate to a second temperature higher than the glass transition temperature for a second time period so that the second oxide portion has a thickness in a range of about 25 to 75% of a total thickness of the control gate oxide layer; and forming a control gate layer adjacent the control gate oxide layer.