Patent ID: 9143142
Filing Date: 2015-09-22
Classification: H03L,H04B,H04J

Abstract:
1. A transceiver, comprising: a first clock recovery circuit, the first clock recovery circuit configured to recover a first clock signal from a first signal received from an Ethernet network; a first synchronizer, the first synchronizer configured to multiply the first clock signal by a ratio M/N to produce a second clock signal to time a second signal transmitted to an optical transport network, where M and N are integers, wherein M and N are selected based on a rate of the first signal received from the Ethernet network and a rate of the second signal transmitted to the optical transport network; and an asynchronous mapper, the asynchronous mapper configured to asynchronously map frames of the first signal to produce frames of the second signal, wherein each of the first signal and the second signal are synchronous to one another based on the ratio M/N.