Patent ID: 6178486
Filing Date: 2001-01-23
Classification: G06F

Abstract:
A buffer memory control including access arbitration apparatus for arbitrating access to a single buffer memory array embedded within a disk drive among requests presented by a plurality of disk drive channels including at least a disk data channel, a host interface data channel, a microprocessor channel, and a plurality of other miscellaneous data channels seeking buffer access, the access arbitration apparatus comprising:means for arranging the disk data channel, the host interface data channel, the microprocessor channel and the plurality of other miscellaneous data channels into a round-robin circular priority queue such that the disk data channel is assigned a highest priority for buffer access within the queue,means for conducting an arbitration cycle by progressively servicing buffer access requests pending within the queue, beginning with providing buffer access to the disk data channel,resettable timer means for establishing an arbitration cycle completion interval beginning upon completion of buffer access to the disk data channel,buffer memory access control means for progressively providing access to the host interface data channel, the microprocessor channel and at least one of the plurality of other miscellaneous data channels during the arbitration completion interval, the buffer memory access control means responsive to elapsed time of the resettable timer means and access request from the disk data channel, for returning access to the disk data channel prior to expiration of the arbitration cycle completion interval.