Patent ID: 8946022
Filing Date: 2015-02-03
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of forming non-volatile memory: forming a peripheral transistor including a gate comprising a first conductive layer, the first conductive layer being separated from a substrate by a first dielectric layer; forming a plurality of storage elements including nanodot charge storage structures separated from the substrate by a second dielectric layer, the storage elements having control gates formed from a second conductive layer separated from the nanodot charge storage structures by a third dielectric layer, the second conductive layer being formed after the first conductive layer, the second dielectric layer being formed after the first dielectric layer, the third dielectric layer being formed after the second dielectric layer; and forming a select gate for the plurality of storage elements including a gate formed from a third conductive layer, the third conductive layer being separated from the substrate by a fourth dielectric layer, the third conductive layer being formed after the second conductive layer, the fourth dielectric layer being formed after the third dielectric layer.