Patent ID: 6137311
Filing Date: 2000-10-24
Classification: H03K

Abstract:
Interface circuit, comprising:at least one semiconductor switching means (44; 68) having a first link terminal (54; 64), a second link terminal (56; 66) and a control terminal (52; 72),said first link terminal (54; 64) being connected to a first circuit means (48; 80),said second link terminal (56; 66) being connected to a second circuit means (50; 82), andsaid semiconductor switching means (44; 68) being adapted to connect said first circuit means (48; 80) to said second circuit means (50; 82) when a potential difference between said control terminal (52; 72) and one of said first link terminal (54; 64) and said second link terminal (56; 66) exceeds a predetermined threshold value, andfailure prevention means (60, 58; 70, 76, 78) adapted to apply the maximum potential of said first link terminal (54; 64) and said second link terminal (56, 66) to said control terminal (52; 72) in case said interface circuit is powered off, whereinsaid failure prevention means (60, 58; 70, 76, 78) comprises:a first maximum generating means (58; 70) adapted to output the maximum potential of said first link terminal (54; 64) and said second link terminal (56, 66), anda first selector means (60) connected to said first maximum generating means (58, 70) and being adapted to select the output thereof as power supply potential of a control amplifier feeding said control terminal (52; 72)in case said interface circuit is powered off.