Patent ID: 8872685
Filing Date: 2014-10-28
Classification: H03F,H03M

Abstract:
1. A digital-to-analog converter (DAC) comprising: a plurality of input stages delivering currents to first and second current summing nodes in response to a digital signal received by the DAC; a first transistor having a first terminal coupled to the first current summing node, and a second terminal coupled to a first output node of the DAC; a second transistor having a first terminal coupled to the second current summing node, and a second terminal coupled to a second output node of the DAC; and an amplifier having a first differential input terminal coupled to the first terminal of the first transistor, a second differential input terminal coupled to the first terminal of the second transistor, a first differential output terminal coupled to a gate terminal of the first transistor, and a second differential output terminal coupled to a gate terminal of the second transistor, said amplifier adapted to maintain an impedance of each of the first and second current summing nodes within a range defined by a gain of the amplifier.