Patent ID: 8161242
Filing Date: 2012-04-17
Classification: G06F

Abstract:
1. A method, in a data processing system, for improving cache performance, the method comprising: monitoring a counter associated with a cache; determining whether the counter indicates that a plurality of non-dedicated cache sets within the cache should operate as spill cache sets or receive cache sets; responsive to an indication that the plurality of non-dedicated cache sets should operate as the spill cache sets, setting the plurality of non-dedicated cache sets to spill an evicted cache line to an associated cache set in another cache in the event of a cache miss, wherein the indication that the plurality of non-dedicated cache sets should operate as the spill cache sets is indicated by the most significant bit of the counter indicating a first value; and responsive to an indication that the plurality of non-dedicated cache sets should operate as the receive cache sets, setting the plurality of non-dedicated cache sets to receive an evicted cache line from another cache set in the event of the cache miss, wherein the indication that the plurality of non-dedicated cache sets should operate as the receive cache sets is indicated by the most significant bit of the counter indicating a second value that is different from the first value.