Patent ID: 8530950
Filing Date: 2013-09-10
Classification: B82Y,H01L

Abstract:
1. A method for forming a split gate memory cell, the method comprising: forming a conductive gate layer over a substrate; forming a first sidewall of the conductive gate layer, wherein the conductive gate layer is removed from over the substrate in a first region laterally adjacent to the first sidewall; forming a layer of charge storage material over the substrate including along the first sidewall; forming a second gate structure over the layer of charge storage material and laterally adjacent the layer of charge storage material located along the first sidewall; removing a portion of the charge storage layer located along the first sidewall to expose an upper portion of the first sidewall, wherein a remaining portion of the charge storage layer along the lower sidewall remains after the removing; etching the upper portion of the first sidewall of the conductive gate layer that is exposed, wherein at least a portion of the lower portion of the first side wall remains after the etching; forming dielectric material along the upper portion of the first sidewall that was etched and over the remaining portion of the charge storage layer located along the first sidewall, wherein the first side wall is part of a sidewall of a first gate structure of the split gate memory cell and the second gate structure is of the split gate memory cell.