Patent ID: 6124212
Filing Date: 2000-09-26
Classification: H01L

Abstract:
A method for forming a patterned polysilicon layer within a microelectronics fabrication comprising:providing a substrate layer employed within a microelectronics fabrication;forming upon the substrate layer a blanket polysilicon layer;forming upon the blanket polysilicon layer a blanket organic polymer layer;forming upon the blanket organic polymer layer a patterned photoresist layer, the patterned photoresist layer having a high areal density region and a low areal density region;etching through a first plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the blanket organic polymer layer to form a patterned organic polymer layer while reaching the blanket polysilicon layer, the patterned organic polymer layer having a high areal density region corresponding with the high areal density region of the patterned photoresist layer and a low areal density region corresponding with the low areal density region of the patterned photoresist layer, the blanket polysilicon layer having formed thereupon an organic polymer residue layer within the low areal density region of the patterned organic polymer layer, the first plasma etch method employing a first etchant gas composition comprising an oxygen containing etchant source gas, a nitrogen containing etchant source gas and a bromine containing etchant source gas; andetching through a second plasma etch method while employing at least the patterned organic polymer layer as an etch mask layer the blanket polysilicon layer to form a patterned polysilicon layer, the patterned polysilicon layer having a high areal density region corresponding with the high areal density region of the patterned photoresist layer and a low areal density region corresponding with the low areal density region of the patterned photoresist layer.