Patent ID: 7588978
Filing Date: 2009-09-15
Classification: H01L

Abstract:
1. A method comprising: depositing a first oxide layer over a surface of a semiconductor substrate including high voltage and low voltage wells, the first oxide layer having a predetermined thickness corresponding to a high voltage area of the well; forming a first photoresist pattern over a surface of the first oxide layer, performing an etching process using the first photoresist pattern as a mask, so that the first oxide layer is selectively etched until the semiconductor substrate is partially exposed, to form a first oxide layer pattern; depositing a second oxide layer over a surface of the semiconductor substrate including the first oxide layer pattern using a first photoresist pattern as a mask, the second oxide layer having a predetermined thickness corresponding to a low voltage area of the well; removing said first photoresist pattern, and coating a polysilicon layer over the surface of the semiconductor substrate including the first oxide layer pattern and the second oxide layer; forming a second photoresist pattern over a surface of the polysilicon layer, performing an etching process using the second photoresist pattern as a mask, so that the polysilicon layer is selectively etched until the first oxide layer pattern and the second oxide layer are partially exposed; and removing the second photoresist pattern, performing an impurity ion implantation process using the polysilicon layer, the first oxide layer pattern, and the second oxide layer as a hard mask, to form a drift area in the semiconductor substrate.