Patent ID: 6212620
Filing Date: 2001-04-03
Classification: G06F,H04W,Y02D

Abstract:
A single-chip microcomputer operable in a slave mode or a master mode, the microcomputer comprising:a central processing unit;an internal bus coupled to the central processing unit;a serial communication interface circuit which is coupled to the internal bus and which controls the communication of serial data to and from outside of the microcomputer;data terminals to be externally coupled to an external data bus, the data terminals being coupled to the internal bus;a first terminal;a second terminal;a mode terminal to which a mode selection signal is received from outside of the microcomputer; anda bus control circuit, which is coupled to the internal bus and is coupled to the first terminal, the second terminal and the mode terminal and is responsive to the mode selection signal and controls the use of the first terminal for outputting a bus request signal indicating a request for a right to use the external data bus by the microcomputer and the second terminal for inputting a bus acknowledge signal indicating an acknowledgement of the right to use the external data bus by the microcomputer if the microcomputer is set to operate in a slave mode in accordance with the mode selection signal of a first level, and controlling the use of the first terminal for outputting a bus by the microcomputer grant signal indicating a grant of the right to use the external data bus and the second terminal for inputting a bus release signal indicating a request of the right to use the external data bus by the microcomputer if the microcomputer is set to operate in a master mode in accordance with mode selection signal of a second level.