Patent ID: 7589587
Filing Date: 2009-09-15
Classification: H03F

Abstract:
1. A feedback amplifier circuit comprising: an amplifier for amplifying an input signal and outputting an amplified signal; a first switching device for executing an auto-zero operation by inputting a signal outputted from the amplifier to an input terminal of the amplifier during an auto-zero operation interval prior to an amplification interval; a first capacitor provided in a feedback circuit interposed between an output terminal of the amplifier and the input terminal of the amplifier, the first capacitor accumulating and holding an offset voltage at the output terminal of the amplifier during the auto-zero operation interval, and then canceling an offset voltage at the input terminal of the amplifier by an accumulated and held offset voltage during an amplification interval subsequent to the auto-zero operation interval; a second switching device for grounding the feedback point of the feedback circuit during the auto-zero operation interval; a second capacitor inserted between the input terminal of the amplifier and the feedback point of the feedback circuit so as to be connected in series with the first capacitor, the second capacitor blocking a DC voltage, and accumulating and holding an offset voltage at an output terminal of the amplifier during the auto-zero operation interval, and thereafter cancelling an offset voltage at an input terminal of the amplifier by the offset voltage accumulated and held together with the first capacitor during an amplification interval subsequent to the auto-zero operation interval.