Patent ID: 6596594
Filing Date: 2003-07-22
Classification: H01L

Abstract:
A method for fabricating a field effect transistor device comprising:providing a semiconductor substrate of a first polarity; forming over the semiconductor substrate a gate electrode such as to define within the semiconductor substrate a source region separated from a drain region by a channel region defined beneath the gate electrode; forming simultaneously within the semiconductor substrate a first source extension region within the source region, separated from a first drain extension region within the drain region, each of the foregoing first extension regions being of a second polarity opposite the first polarity; forming simultaneously within the semiconductor substrate a first source side pocket implant region within the channel region adjoining the source region, separated from a first drain side pocket implant region within the channel region adjoining the drain region, each of the foregoing first pocket implant regions being of the first polarity; forming within the semiconductor substrate a second doped source extension region of the second polarity formed at a location such as to at least in part overlap the first source extension region, but not a second drain extension region of the second polarity formed at a location such as to at least in part overlap the first drain extension region; and forming within the semiconductor substrate a second source side pocket implant region of the first polarity formed at a location such as to at least in part overlap the first source side pocket implant region, but not a second drain side pocket implant region formed at a location such as to at least in part overlap the first drain side pocket implant region.