Patent ID: 8956955
Filing Date: 2015-02-17
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device, comprising the steps of: (a) providing a semiconductor wafer having a principal surface, a back surface opposite the principal surface, a plurality of device regions formed on the principal surface, and a scribe region disposed between the device regions; (b) supplying a grinding fluid and grinding the back surface of the semiconductor wafer on which a protective sheet covering the principal surface is stuck to the principal surface of the semiconductor wafer; and (c) after the step (b), cutting the semiconductor wafer by running a dicing blade along the scribe region to divide the semiconductor wafer into a plurality of chips each having a respective device region, wherein the device regions of the semiconductor wafer each include a plurality of semiconductor elements formed on the principal surface, a first insulating layer formed so as to cover the semiconductor elements, an uppermost wiring layer formed over the first insulating layer, a plurality of terminals formed at a same layer of the uppermost wiring layer and electrically coupled to the semiconductor elements, and a second insulating layer formed so as to cover the uppermost wiring layer and having a plurality of openings exposing the terminals, respectively, wherein in a part of the scribe region of the semiconductor wafer, the first insulating layer is formed over the principal surface, a first metal pattern is formed at the same layer of the uppermost wiring layer, and the second insulating layer in the scribe region covers an entire upper surface of the first metal pattern, wherein the second insulating layer in the device region and the second insulating layer in the scribe region are separated in a plan view, and wherein the step (b) is carried out after sticking the protective sheet to the second insulating layer.