Patent ID: 7872497
Filing Date: 2011-01-18
Classification: G06F,H03K

Abstract:
1. A logic module for a field programmable gate array integrated circuit device including: a first input node; a second input node; a third input node; a fourth input node; an output node; a carry input node; a carry output node; a first LUT having a first data input coupled to the first input node, a second data input coupled to the second input node, and a third data input coupled to the third input node, the first LUT further having an output; a second LUT having a first data input coupled to the first input node, a second data input coupled to the second input node, and a third data input coupled to the third input node, the second LUT further having an output; a first multiplexer having a first data input coupled to the fourth input node, a second data input coupled to the carry input node, a select input, and a data output; a second multiplexer having a first data input coupled to the output of the first LUT, a second data input coupled to the output of the second LUT, a select input coupled to the output of the first multiplexer, and a data output coupled to the output node;