Patent ID: 7714820
Filing Date: 2010-05-11
Classification: G02F

Abstract:
1. A thin film transistor array panel, comprising: a display cell array circuit including a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, and a plurality of pixel electrodes; a gate driving circuit supplying gate signals to the gate lines; and a signal line connected to the gate driving circuit and including first and second line segments separated from each other; a first insulating layer formed on the first line segment, the second line segment being formed on the first insulating layer; a second insulating layer formed on the second line segment; and a connection member formed on the second insulating layer and connected to the first and second line segments through at least a contact hole exposing at least one of the first and the second line segments, wherein the contact hole has a toothed or sinuous boundary.