Patent ID: 7426587
Filing Date: 2008-09-16
Classification: G06F,Y02D

Abstract:
1. A semiconductor integrated circuit, comprising: a bridge circuit which controls a bus line, wherein the bus line includes a first main bus line having a first end connected to the bridge circuit and having a second end opposite the first end, a second main bus line, a first branch bus line connected to the first main bus line, and a second branch bus line connected to the second main bus line; a first control circuit, connected to the second end of the first main bus line and an end of the second main bus line, and that receives a select signal and transfers a data from the first main bus line to the second main bus line in accordance with a logic state of the select signal; and a plurality of peripheral circuits which are connected to the first and second branch bus lines, wherein the first and second main bus lines and the first and second branch bus lines are address bus lines, and the data transferred are addresses of the peripheral circuits.