Patent ID: 6596567
Filing Date: 2003-07-22
Classification: H01L

Abstract:
A method for fabricating a semiconductor device which includes a semiconductor substrate and a conductive layer formed above said semiconductor substrate, comprising a step of forming said conductive layer, whereinsaid step of forming said conductive layer includes: a first step of forming a non-doped silicon film above said semiconductor substrate; a second step of introducing impurities to said non-doped silicon film so as to form an impurity layer, which contains said impurities, at only an inner intermediate portion of said non-doped silicon film; a third step of forming a high melting-point metal film on said non-doped silicon film having said impurity layer at only said inner intermediate portion; and a fourth step of reacting said non-doped silicon film having said impurity layer at only said inner intermediate portion with said high melting-point metal film through a heat treatment to form a silicide film at an interface and near the interface between said high melting-point metal film and said non-doped silicon film having said impurity layer at only said inner intermediate portion wherein said impurity layer decelerates the solid state reactions of the polycrystal silicon film with said high melting-point metal film.