Patent ID: 7843038
Filing Date: 2010-11-30
Classification: H03F,H03G

Abstract:
1. A method of operating a transistor switch arranged in an integrated circuit, the transistor switch having a first semiconductor region of a first conductivity type, and an array of semiconductor wells formed in the first semiconductor region, the array including multiple first wells of a second conductivity type and multiple second wells of the second conductivity type, at least one of the first wells being surrounded from four sides with the second wells, the first wells being electrically connected with each other to provide a first terminal of the transistor switch, the second wells being electrically connected with each other to provide a second terminal of the transistor switch, the first semiconductor region providing a third terminal of the transistor switch; the integrated circuit having an input node, a ring region of the second conductivity type surrounding the array and connected to the first semiconductor region, and a second semiconductor region of the second conductivity type beneath the first semiconductor region, the method comprising the steps of: providing current via the input node to turn the switch ON, forward-biasing all first and second wells when the switch is ON, and controlling the current injected into the second semiconductor region using the ring region connected to the first semiconductor region so as to enable the switch to operate in an ON state.