Patent ID: 6740983
Filing Date: 2004-05-25
Classification: G01R,H01L,H05K,Y02P

Abstract:
A method of constructing a memory module having at least one first UL ball grid array semiconductor package having a substrate of a preselected cross-sectional thickness having a first surface, a second surface, and an aperture extending from the first surface through the substrate to the second surface, a plurality of substrate bond pads located on the first surface proximate to the aperture, said method comprising:providing a module board having a first surface and a second surface, the module board having at least one electrical circuit adapted to accommodate connective elements of the at least one first ball grid array semiconductor package; providing a plurality of contact elements located on the second surface of the substrate, each of the plurality of contact elements extending an approximate preselected distance from the second surface and being arranged in a preselected grid array pattern having at least one preselected pitch dimension between adjacent contact elements of the plurality of contact elements; providing a semiconductor device having an active surface and a plurality of bond pads thereon, the semiconductor device attached to the second surface of the substrate, the semiconductor device extending a preselected distance from the second surface of the substrate; providing a plurality of bond wires extending through the aperture, each of the plurality of bond wires connecting one of the plurality of bond pads on the active surface of the semiconductor device with one of the plurality of substrate bond pads on the first surface of the substrate; providing the substrate with a plurality of mutually discrete electrically conductive circuit traces, each circuit trace of the plurality of circuit traces selectively extending from one of the plurality of substrate bond pads to one of the plurality of contact elements; positioning the at least one first ball grid array semiconductor package adjacent to at least one of the first and the second surfaces of the module board; and attaching the connective elements of the at least one first ball grid array semiconductor package to the module board and placing the connective elements in electrical communication with the at least one electrical circuit of the module board.