Patent ID: 6710458
Filing Date: 2004-03-23
Classification: H01L

Abstract:
A tape, for chip on film, on which a semiconductor element is mounted and resin is applied for sealing the semiconductor element, the tape for chip on film comprising:an insulating tape, wherein the semiconductor element is supported by the insulating tape and no aperture is defined in the insulating tape in an area under the semiconductor element; a plurality of wiring patterns formed on the insulating tape; a solder resist partially covering the wiring patterns in a form such that an opening is defined in the solder resist at least in all or part of an area under the semiconductor element; and a dummy pattern supported by the insulating tape adjacent a corner of a region for the semiconductor element to be mounted so as to control flow of the resin from the corner to a space between a surface of the semiconductor element and the insulating tape during resin sealing.