Patent ID: 7495594
Filing Date: 2009-02-24
Classification: H03M

Abstract:
1. A D/A converter comprising: a plurality of capacitors, each having a capacitance weighted according to a weight of a corresponding bit of digital signals and comprising a first terminal connected with a common node and a second terminal; a selection circuit that selects, for each of the capacitors, either a first reference electric potential or a second reference electric potential according to a value of a corresponding bit of the digital signals and applies the selected reference electric potential to the second terminal of a corresponding capacitor; and a reset switch provided for each of the capacitors and connecting, in response to a reset signal, the first and second terminals of a corresponding capacitor so that the first reference electric potential is applied to the first and second terminals of the corresponding capacitor, wherein the converter is configured so that an analog signal is obtained from the common node by applying the selected reference electric potentials to the second terminals of the capacitors after applying the first reference electric potential to the first and second terminals of the capacitors by the reset switches.