Patent ID: 9013520
Filing Date: 2015-04-21
Classification: G09G,H01L

Abstract:
1. A display device including pixels arranged in a matrix having m rows and n columns, m being an integer greater than or equal to 4, and n being an integer greater than or equal to 1, the display device comprising: a first signal line and a second signal line that are disposed, in a column direction, corresponding to every m pixels that correspond to the respective n columns in the matrix, the first signal line and the second signal line being for applying, to the pixels, a signal voltage which determines luminance of the pixels, and the m pixels being included in the pixels, a first power source line and a second power source line; and a scanning line disposed in each of the rows, wherein the pixels compose at least two drive blocks each of which includes at least two of the rows, each of the pixels includes: each of the pixels in a kth drive block of the drive blocks further includes a first switching transistor that includes a gate connected to the scanning line, one of a source and drain connected to the first signal line via a first connecting line, and the other of the source and the drain connected to the current control unit, the first switching transistor switchably interconnecting the first signal line and the current control unit, k being a positive integer, each of the pixels in a (k+1)th drive block of the drive blocks further includes a second switching transistor that includes a gate connected to the scanning line, one of a source and a drain connected to the second signal line via a second connecting line, and the other of the source and the drain connected to the current control unit, the second switching transistor switchably interconnecting the second signal line and the current control unit, the first signal line is disposed on one of the left side and the right side of the first switching transistor and the second switching transistor included in the pixels in the corresponding column, the second signal line is disposed on the other of the left side and the right side of the first switching transistor and the second switching transistor included in the pixels in the corresponding column, the first connecting line is disposed without crossing with the second signal line, the second connecting line is disposed without crossing with the first signal line, at least one of a threshold voltage detection period and an initialization period is provided in common for the pixels in a same one of the drive blocks, and at least one of the threshold voltage detection period and the initialization period provided in common in the same one of the drive blocks is provided independently for the pixels in different ones of the drive blocks, the threshold voltage detection period being a period during which a threshold voltage of the current control unit is detected, and the initialization period being a period during which the current control unit is initialized, in an ith column in the matrix, where i is an integer satisfying 1≦i≦n−1: the first signal line is disposed on the one of the left side and the right side of the first switching transistor and the second switching transistor included in the pixels in the corresponding column; and the second signal line is disposed on the other of the left side and the right side of the first switching transistor and the second switching transistor included in the pixels in the corresponding column, and in an (i+1)th column in the matrix: the first signal line is disposed on the other of the left side and the right side of the first switching transistor and the second switching transistor included in the pixels in the corresponding column; and the second signal line is disposed on the one of the left side and the right side of the first switching transistor and the second switching transistor included in the pixels in the corresponding column.