Patent ID: 6281127
Filing Date: 2001-08-28
Classification: H01L,Y10S

Abstract:
A method of fabricating a copper damascene structure, on a semiconductor substrate, featuring a boron containing copper layer formed via implantation of boron into a partially formed copper damascene structure, which is defined using a first chemical mechanical polishing (CMP), followed by a second CMP procedure used to complete the formation of said copper damascene structure, comprising the steps of:providing an underlying metal interconnect structure;depositing an insulator layer on said underlying metal interconnect structure;forming an opening in said insulator layer, exposing a portion of the top surface of said underlying metal interconnect structure;depositing a barrier layer on the walls of said opening; on the portion of said underlying metal interconnect structure, exposed in said opening; and on the top surface of said insulator layer;depositing a thick copper layer, on said barrier layer, completely filling said opening, located in said insulator layer;performing said first chemical mechanical polishing, (CMP), procedure, removing regions of said thick copper layer, and of said barrier layer, from the top surface of said insulator layer, resulting in said partially formed copper damascene structure, located in said opening, in said insulator layer;performing a boron ion implantation procedure, at an energy between about 20 to 40 KeV, to a region of said partially formed copper damascene structure, to create said boron containing copper region, in a top portion of said partially formed copper damascene structure; andperforming said second CMP procedure, to insure complete removal of regions of said thick copper layer, and of said barrier layer, from the top surface of said insulator layer, creating a final copper damascene structure, in said opening, with said boron containing copper region between about 800 to 1500 Angstroms in thickness, located in a top portion of said final copper damascene structure.