Patent ID: 8022750
Filing Date: 2011-09-20
Classification: H02M

Abstract:
1. A boost circuit comprising: a first charge transfer circuit with first transistors connected in series between a voltage input node and a voltage output node; a second charge transfer circuit with second transistors connected in series between the voltage input node and the voltage output node; first capacitors, one ends of which are connected to first connection nodes between the first transistors and are connected to gates of the second transistors, respectively, the other ends thereof being applied with clocks with plural phases; and second capacitors, one ends of which are connected to second connection nodes between the second transistors and are connected to gates of the first transistors, respectively, the other ends thereof being applied with the clocks with plural phases, wherein the first charge transfer circuit and the second charge transfer circuit are connected in parallel between the voltage input node and the voltage output node, and the corresponding first and second connection nodes in the first and second charge transfer circuits are driven with substantially reverse phases via the first and second capacitors, respectively, while the corresponding gates of the first and second transistors are driven with substantially reverse phases via the second and first capacitors, respectively.