Patent ID: 7256448
Filing Date: 2007-08-14
Classification: H01L

Abstract:
1. A split gate type nonvolatile semiconductor memory device, the device comprising: a semiconductor substrate which has a plurality of source regions in a word line direction; a plurality of floating gate pairs formed to interpose a gate insulating layer therebetween on the semiconductor substrate, and which share the source region with an adjacent memory cell while facing with one another; inter-gate insulating layers which are formed on surfaces of the floating gate pair; tunneling insulating layers which are formed along an opposite facing sidewall of the floating gate; and a plurality of control gate pairs which have a protrusion vertically extending at a position by a predetermined distance from the sidewall of the floating gate while being in contact with surfaces of the tunneling insulating layers, and which extends to have a cover part encompassing the floating gate between the protrusion and a sidewall and an upper surface of the floating gate.