Patent ID: 6249395
Filing Date: 2001-06-19
Classification: G11B

Abstract:
A data recover system wherein data is represented by a sequence of preamble pulses followed by data pulses, such system, comprising:an analog to digital converter for converting samples of the preamble pulses and the data pulses into digital words in response to clock pulses fed to a clock input of the converter;an asymmetric finite impulse response filter fed by an output of the analog to digital converter;a pair of feedback loops, a selected one thereof being coupled to the output of the analog to digital converter to produce the clock pulses for the converter;(i) a first one of the feedback looks being operative during a data recovery mode, the first one of the feedback loops including an asymmetric digital filter producing clock pulses during a data recovery mode in accordance with a first phase error signal being related to a phase difference between the clock pulses to the converter and data pulses produced by the asymmetric digital filter, the first one of the feedback loops being adapted to adjust the phase of the clock pulses to the converter in accordance with the first phase error signal to produce a predetermined phase difference between the converted data pulses and the clock pulses;a second one of the feedback loops being operative during a preceding preamble acquisition mode, the second one of the feedback loops by passing the asymmetric digital filter during a preceding preamble acquisition mode and producing the clock pulses to the converter during the preamble acquisition mode, the second feedback loop producing a second phase error signal related to a phase difference between the clock pulses to the converter and converted preamble pulses produced by the analog to digital converter and an offset phase, between the converted preamble pulses and the clock pulses, the offset phase being related to a phase shift produced by the asymmetric digital filter.