Patent ID: 9165969
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. An apparatus comprising: a photodetector array; a peripheral region at a periphery of the photodetector array, wherein the peripheral region is disposed around the photodetector array; a thinner interconnect line formed in the photodetector array disposed within one or more insulating layers; a thicker interconnect line formed in the peripheral region disposed within the one or more insulating layers; a taller via disposed below and coupled to the thinner interconnect line; and a shorter via disposed below and coupled to the thicker interconnect line, wherein the thicker interconnect line is thicker than the thinner interconnect line by a distance d, a depth of the taller via being equivalent to a sum of a depth of the shorter via and the distance d, and wherein the longer via is coupled to the photodetector array and the shorter via is coupled to a peripheral circuit within the peripheral region, the peripheral circuit and the photodetector array disposed at a same level within a substrate, wherein a top of the thinner interconnect line and a top of the thicker interconnect line are at a common interconnect level.