Patent ID: 7038523
Filing Date: 2006-05-02
Classification: G11C

Abstract:
1. A method for adjusting a level of a voltage at an output node, the voltage being generated internally to an integrated circuit device, the method comprising: providing a voltage dividing circuit with a plurality of serially connected resistors; supplying the voltage dividing circuit with a reference voltage, resulting in a different voltage level at nodes of the voltage dividing circuit formed between the serially connected resistors; providing a plurality of switches, each switch configured to selectively couple the output node to a single node of the voltage dividing circuit; providing control signals to close a single one of the switches at any given time, wherein each of the control signals corresponds to a different one of the switches and only one of the control signals is asserted at any time to close a single switch; and generating the control signals as a function of states of one or more non-volatile storage elements, wherein the states are determined based on an output of a voltage comparator comparing the voltage at the output node to an external reference voltage.