Patent ID: 6731255
Filing Date: 2004-05-04
Classification: G09G

Abstract:
A circuit for driving a plasma display panel to show images formed by a succession of frames, wherein each frame is composed of at least one odd field and at least one even field, the plasma display panel has address electrodes and scan electrodes perpendicular to the address electrodes, scan electrodes associated with an odd field being at least a first set identified as odd ones of the scan electrodes, and scan electrodes associated with an even field being at least a second set identified as odd ones of the scan electrodes, and the circuit comprises:a scan driver coupled to the scan electrodes, a data driver coupled to the address electrodes, and a control circuit coupled to the scan driver and the data driver to control a timing thereof, characterized in that the control circuit is adapted to address said electrodes and sustain corresponding pixels forming a respective frame in the following order: first address one of said sets of the scan electrodes, then address an other of said sets of the scan electrodes, and complete addressing of the sets of scan electrodes forming the respective frame before sustaining both the pixels corresponding with the odd and the even ones of the scan electrodes for the respective frame.