Patent ID: 6921964
Filing Date: 2005-07-26
Classification: H01L

Abstract:
1. A semiconductor device having a non-volatile memory transistor formed on a semiconductor layer, the semiconductor device comprising: an interlayer dielectric layer provided over the semiconductor layer and the non-volatile memory transistor with the interlayer dielectric layer being in direct contact with a component of the non-volatile memory transistor, a wiring layer provided on and in direct contact with the interlayer dielectric layer, wherein the interlayer dielectric layer includes a first oxide film provided as a lowermost layer of the interlayer dielectric layer, a layer containing nitride provided on and in direct contact with the first oxide film, a second oxide film provided on and in direct contact with the layer containing nitride, the first oxide film is an oxide film that is formed by a reduced pressure CVD method using TEOS, and the first oxide film has a thickness of 30-70 nm.