Patent ID: 6790770
Filing Date: 2004-09-14
Classification: H01L

Abstract:
A method for improving a photolithographic patterning process in a dual damascene process comprising the steps of:providing a via opening extending through a thickness of layers comprising a dielectric anti-reflectance layer (DARC), and a dielectric insulating layer; forming a resinous layer over the DARC layer to include filling the via opening; removing the resinous layer to expose the DARC layer to form a via plug covering at least the dielectric insulating layer portion of the via sidewalls; forming a photoresist layer over the DARC layer for photolithographically patterning a trench line opening disposed substantially over the via opening; photolithographically forming a trench line opening disposed substantially over the via opening to expose a portion of the DARC layer forming a trench line pattern; etching according to the trench line pattern through at least a thickness of the DARC layer to include a portion of the via plug; and, etching according to the trench line pattern through a thickness portion of the dielectric insulating layer to form a trench line opening disposed substantially over a remaining portion of the via opening.