Patent ID: 8481397
Filing Date: 2013-07-09
Classification: H01L

Abstract:
1. A method of making a resistive polycrystalline semiconductor device of a microelectronic element, comprising: (a) forming a layered stack including a dielectric layer contacting a surface of a monocrystalline semiconductor region of a substrate, a metal gate layer overlying the dielectric layer, a first polycrystalline semiconductor region adjacent the metal gate layer, and a second polycrystalline semiconductor region spaced from the metal gate layer by the first polycrystalline semiconductor region and adjoining the first polycrystalline semiconductor region, the first polycrystalline semiconductor region having a first predominant dopant type being either p or n, and the second polycrystalline semiconductor region having a second predominant dopant type being either p or n and being opposite the first predominant dopant type; and (b) forming first and second contacts in conductive communication with the second polycrystalline semiconductor region, the first and second contacts being spaced apart so as to achieve a desired resistance; wherein step (a) further includes forming a polycrystalline semiconductor region then implanting a p-type dopant into the polycrystalline semiconductor region and annealing to form the first polycrystalline semiconductor region adjacent to the metal gate layer and having the p-type predominant dopant type wherein the p-type dopant is substantially uniformly distributed in the first polycrystalline semiconductor region, and then implanting an n-type dopant into the polycrystalline semiconductor region and performing laser annealing to form the second polycrystalline semiconductor region having the n-type predominant dopant type.