Patent ID: 6052772
Filing Date: 2000-04-18
Classification: G06F

Abstract:
A method for use in a computer system comprising a central processor and a hierarchical memory system having at least one memory card and having a memory controller and interface logic with a memory requestor, comprising the steps of:processing a memory request with protocol logic providing a cancel window of a predetermined finite number of cycles where a memory card cannot accept another command due to a resource conflict to provide an opportunity to re-balance requests to the memory controller via the cancel window in which a memory request can be withdrawn (""cancelled"") without penalty and allowing another memory request to be accepted by the memory controller so that it can be processed once the memory card is no longer busy; andwherein a memory request is sent to a memory card having said controller every eight cycles synchronized with a key access cycle within the memory card whereby said controller knows exactly when to send a new request or when not to send a request to the memory card, and further when a memory requestor has been given the priority to send an access request to the memory controller, if subsequently the memory requester has determined that it wants to ""cancel"" its request before the memory controller has accepted it for execution, the memory controller uses the memory requester cancel window for that particular requestor to safely withdraw its request such that the memory controller and the memory card will not process the request and no memory cycles will be wasted, while making memory resources immediately available for other memory requesters.