Patent ID: 8603878
Filing Date: 2013-12-10
Classification: H01L

Abstract:
1. A method of manufacturing a vertical-type non-volatile memory device, comprising: alternatively stacking two different layers on a substrate to form a multi-layered structure, forming a trench penetrating the different layers vertically with respect to the substrate; forming a tunnel oxide layer, a charge-trapping layer and a blocking dielectric layer in the trench; forming a semiconductor layer in the trench; forming a layer including metal on the semiconductor layer; thermally treating the layer including metal and the semiconductor layer; and removing the layer including metal, wherein forming the multi-layered structure comprises: partially etching the stacked layers of sacrificial layers and insulation interlayers to form an opening that has a linear shape extending in a first direction and exposes a surface of the substrate; forming an insulation layer pattern in the opening, the insulation layer pattern being spaced apart from a sidewall of the opening; forming a semiconductor pattern on both sidewalls of the opening to fill the opening, the semiconductor pattern having a pillar shape.