Patent ID: 7437699
Filing Date: 2008-10-14
Classification: G06F

Abstract:
1. A method to layout a semiconductor integrated circuit driven by plural power supply voltages, the method comprising: specifying a power supply terminal corresponding to a signal terminal designated for the input level fixation by circuit connectivity information representing connecting relations between circuit components in a layout object circuit, the specifying done on a basis of terminal correspondence information representing, for each circuit component, a corresponding relation between a signal terminal and a power supply terminal which is connected to one of a receiving circuit that receives a signal from the signal terminal and an output circuit that outputs a signal to the signal terminal within the circuit component; specifying a power supply voltage corresponding to the specified power supply terminal on a basis of power supply information representing a corresponding relation between a power supply voltage and a power supply terminal; and routing a power supply line of the specified power supply voltage to the signal terminal designated for the input level fixation and connecting the power supply line and the signal terminal.