Patent ID: 8958514
Filing Date: 2015-02-17
Classification: H04J

Abstract:
1. An apparatus, comprising: a data flow circuit that is configured to extract client data, which is encapsulated in an inner frame that is encapsulated in at least an outer frame, and to output the extracted client data in accordance with a client clock signal; and a clock recovery circuit, which comprises a first clock recovery module that is configured to recover a first clock signal that matches payload data in the outer frame, and a second clock recovery module that is configured to derive from the first clock signal a second clock signal that matches the client data in the inner frame, and to produce the client clock signal from the second clock signal, for use by the data flow circuit, wherein each of the first and second clock recovery modules is configured to accept a respective input sequence of clock pulses, to produce the first or second clock signal by generating a gapped sequence that comprises locations each filled with either a clock pulse of the respective input sequence or a gap, and to reduce an average clock rate of the respective input sequence by a factor equal to a ratio between a total number of the locations of the gapped sequence and a number of the clock pulses filled in the gapped sequence.