Patent ID: 7212035
Filing Date: 2007-05-01
Classification: H03K

Abstract:
1. A circuit for driving a data signal on a transmission line comprising: a number of J driver stages each having an output coupled to a common node forming a driver output node and a P input and an N input forming a number of 2J inputs, wherein the J driver stages couple the common node to a first power supply potential through a first group of K resistors in response to a first logic state of the P input and couples the common node to a second power supply potential with a second group of K resistors in response to a second logic state of the N input; and a control logic circuit for setting the logic states on the 2J inputs of the J driver stages in response to a one or more of a present logic state of the data signal, a previous state of the data signal, and mode control signals to vary a source resistance of the driver output node, wherein the mode control signals are set by generating a test data signal as the data signal and varying the first and second resistance values and determining an optimal first resistance value and an optimal second resistance value to optimize a signal quality characteristic of the data signal propagated on the transmission line.