Patent ID: 7519439
Filing Date: 2009-04-14
Classification: G06F

Abstract:
1. A digital processor for a power supply, comprising: an addressable coefficient product memory for storing coefficient product values corresponding to a plurality of coefficients multiplied by each of a plurality of available input values, wherein each of a plurality of addresses is associated with a plurality of coefficient product values; an address circuit for applying an address to the coefficient product memory corresponding to a received input value; a first adder circuitry, for additively combining a selected plurality of coefficient product values, responsive to a program instruction, to produce an output value, wherein the output value determines the level of an output voltage of the power supply; and wherein the first adder circuitry comprises circuitry for at least one of adding or subtracting a selected plurality of coefficient product values responsive to a program instruction, the adding and subtracting comprises a first adder, coupled to receive first and third coefficient product values, the third coefficient product value corresponding to a twice-delayed coefficient product value, at least one of an adder or a subtractor coupled to receive an output of the first adder and a second coefficient product value, the second coefficient product value corresponding to a once-delayed coefficient product value, for selectively adding or subtracting the second coefficient product value to or from the output of the first adder responsive to a program instruction.