Patent ID: 6583451
Filing Date: 2003-06-24
Classification: B82Y,H01L

Abstract:
A method for fabricating a network of nanometric lines made of single-crystal silicon on an insulating substrate, comprising:producing a substrate comprising a silicon body, a lateral isolation region defining a central part in the body, a recess formed in the central part having a bottom wall of a dielectric material, a first pair of opposed parallel sidewalls of the dielectric material, and a second pair of opposed parallel sidewalls, at least one of the opposed parallel sidewalls of the second pair being formed from single-crystal silicon; epitaxially growing in the recess, from the at least one opposed sidewall made from single-crystal silicon of the recess, an alternating network of single-crystal SiGe alloy parallel lines and single-crystal silicon parallel lines; and etching the single-crystal SiGe alloy lines, to form in the recess, a network of single-crystal silicon parallel lines insulated from each other.