Patent ID: 7700437
Filing Date: 2010-04-20
Classification: H01L,Y10S

Abstract:
1. A method of fabricating a non-volatile memory device with a buried control gate comprising: sequentially stacking a first oxide layer, a first nitride layer and a disposable oxide layer on a semiconductor substrate; patterning the semiconductor substrate with the disposable oxide layer thereon to form a trench by partially etching the semiconductor substrate, and forming a channel oxide layer within the trench; depositing a polysilicon layer for a control gate on the channel oxide layer by filling the trench and planarizing the polysilicon layer; forming a spacer using the disposable oxide layer at a side of the polysilicon layer; forming source/drain regions in the semiconductor substrate via ion implanting, using the spacer as a mask; removing the spacer, an upper portion of the polysilicon layer, the first nitride layer and the first oxide layer disposed on the semiconductor substrate; sequentially forming a tunnel oxide layer, a charge trapping layer, and a blocking oxide layer on the semiconductor substrate and a remaining lower portion of the polysilicon layer comprising the control gate; and forming a word gate on the blocking oxide layer.