Patent ID: 7061084
Filing Date: 2006-06-13
Classification: H01L,H05K

Abstract:
1. A multilayer substrate for use in forming a lead-bond type chip package, the multilayer substrate comprising: an interlayer circuit board having opposing upper and lower surfaces, said interlayer circuit. board further having conductor circuits formed therein and a slot extending therethrough; an upper dielectric layer on the upper surface of the interlayer circuit board; a plurality of leads on the upper dielectric layer wherein the leads extend integrally from one of the conductor circuits and are adapted for electrically connecting to a semiconductor chip, and each of the leads has at least a portion extending across the slot of the interlayer circuit board; a lower dielectric layer on the lower surface of the interlayer circuit board; a plurality of solder pads for making external electrical connection disposed on the lower dielectric layer, wherein the solder pads are electrically connected to the corresponding leads; a solder mask on an upper surface of the multilayer substrate wherein areas on the leads for electrically connecting to a semiconductor chip and the solder pads are exposed from the solder mask; and a metal coating on the solder pads and the exposed portions of the leads.