Patent ID: 7446008
Filing Date: 2008-11-04
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising: forming a first barrier pattern to cover a first region of a semiconductor substrate while exposing a second region and a third region of the semiconductor substrate; forming a first oxide layer pattern on the second region and the third region; forming a second barrier pattern to cover the third region while exposing the first region and the second region; forming a second oxide layer pattern on the first region and the second region; removing the second oxide layer pattern formed on the first region and the first oxide layer pattern formed on the third region to form a third oxide layer pattern on the second region; forming a silicide metal layer on the first region, second region, and third region; and selectively forming silicide on the first region and the third region by performing an annealing process with respect to the silicide metal layer.