Patent ID: 9093168
Filing Date: 2015-07-28
Classification: G11C

Abstract:
1. A nonvolatile latch circuit, comprising: a latch circuit; a charge absorption circuit; and a first ferroelectric capacitor including a first electrode connected to a plate line and a second electrode connected to the charge absorption circuit, wherein: when information is read from the first ferroelectric capacitor to the latch circuit, the plate line is operated to cause the charge absorption circuit to absorb at least part of charges outputted from the first ferroelectric capacitor so as to suppress a variation in a potential of the second electrode of the first ferroelectric capacitor; the charge absorption circuit comprises: a second ferroelectric capacitor that absorbs the at least part of charges, and a first transistor having a drain connected to the second electrode of the first ferroelectric capacitor and a source connected to a reference potential node; and the nonvolatile latch circuit further comprises: a third ferroelectric capacitor having a first electrode connected to a power supply potential node and a second electrode connected to the latch circuit; a first current mirror circuit that draws a current resulting from mirroring a current of the first transistor, from the second electrode of the third ferroelectric capacitor, and a charge transfer circuit that transfers charges from the first ferroelectric capacitor to the second ferroelectric capacitor.