Patent ID: 6466055
Filing Date: 2002-10-15
Classification: H04L

Abstract:
A method of operating an integrated circuit input buffer circuit comprising:receiving differential input signals on input connections; activating a first buffer circuit coupled to the input connections; and placing a second buffer circuit, coupled to the input connections, in a standby state, wherein a current conducted by the second buffer circuit is less than a current conducted by the first buffer circuit; wherein placing a second buffer circuit in the standby state comprises electrically isolating a tail current from the second buffer; and wherein the first and second buffer circuits each comprises: first and second differential transistors coupled to receive the differential input signals, a standby transistor electrically coupled between the first and second differential transistors and a lower voltage supply (Vss), a tail current transistor electrically coupled between the first and second differential transistors and the lower voltage supply (Vss) to establish an operation current conducted through the first and second differential transistors, and a trickle current transistor electrically coupled between the first and second differential transistors and the lower voltage supply (Vss) to establish a trickle current conducted through the first and second differential transistors during the standby state.