Patent ID: 6249151
Filing Date: 2001-06-19
Classification: H03K

Abstract:
An inverter for outputting high voltage, wherein an inverter circuit generates high voltage in use of low voltage transistors, the inverter comprising:a first PMOS of which gate is supplied with a high input signal and of which source is connected to a power supply terminal;a second PMOS of which source is connected to a drain of the first PMOS and of which drain is connected to an output terminal;a first NMOS of which gate is connected to a low input signal and of which source is connected to a ground terminal;a second NMOS of which source is connected to a drain of the first NMOS and of which drain is connected to the output terminal;a third PMOS of which gate and source is connected to a high input signal and of which drain is connected to a gate of the second PMOS; anda third NMOS of which gate and source are connected to a low input signal and of which drain is connected to a gate of the second NMOS and the drain of the third PMOS.