Patent ID: 7958314
Filing Date: 2011-06-07
Classification: G06F

Abstract:
1. A method for target computer processor unit (CPU) determination during cache injection using input/output (I/O) hub/chipset resources, comprising: creating a cache injection indirection table on the input/output (I/O) hub/chipset that comprises one of an input/output (I/O) hub and a system chipset, the cache injection indirection table including fields for address or address range, CPU identifier, and cache type; and in response to receiving an input/output (I/O) transaction, the I/O hub/chipset performs: reading the address in an address field of the I/O transaction; looking up the address in the cache injection indirection table; injecting the address and data of the I/O transaction to a target cache associated with a CPU as identified in the CPU identifier field when, in response to the look up, the address is present in the address field of the cache injection indirection table; monitoring a processor complex by the I/O hub/chipset for memory write I/O transactions; extracting addresses from memory write I/O transactions found in response to the monitoring; looking up the addresses of the memory write I/O transactions in the cache injection indirection table; and for addresses in the cache injection indirection table that match the addresses in the memory write I/O transactions, evicting the matching addresses from the cache injection indirection table, the matching reflecting stale addresses.