Patent ID: 6570523
Filing Date: 2003-05-27
Classification: H03M

Abstract:
An analog to digital converter (ADC), comprising:a sampler that regularly samples an input analog signal and that provides a stream of sample signals; a first stage, coupled to the sampler, that flash converts the stream of sample signals into corresponding primary multiple bit values and that subranges a reference ladder for each primary multiple bit value into corresponding sets of reference signals; at least one secondary stage, each secondary stage coupled in sequential order after the first stage, that amplifies each set of residual signals from a prior stage, that interpolates each set of amplified residual signals using a resistive ladder, that flash converts each set of amplified residual signals into corresponding secondary multiple bit values, and that subranges the resistive ladder into corresponding sets of residual signals for each corresponding secondary multiple bit value; and a final stage that amplifies each set of residual signals from a prior stage and that flash converts each set of amplified residual signals of the final stage into corresponding final multiple bit values; and an error corrector, coupled to the first and final stages and each secondary stage, that combines each primary multiple bit value with one or more corresponding secondary multiple bit values and a corresponding final multiple bit value to provide a corresponding stream of digital values representative of the input analog signal.