Patent ID: 7745559
Filing Date: 2010-06-29
Classification: H02J

Abstract:
1. An integrated circuit device comprising: an internal circuit disposed on an inside area of the integrated circuit device; and at least one regulator circuit that generates a regulation voltage formed by stepping down a rower supply voltage provided from outside, wherein: an output terminal of the regulator circuit is connected to a first pad that is an external terminal of the integrated circuit device and a power supply line of the internal circuit, the regulator circuit controls the state of the output terminal based on a plurality of control signals inputted respectively to a plurality of control terminals, the regulator circuit includes a differential amplifier circuit having a first input terminal that receives as an input a reference voltage and a second input terminal that receives as an input the regulation voltage of the regulator circuit, and amplifies a voltage difference between the reference voltage and the regulation voltage, and an output circuit that is connected to an output terminal of the differential amplifier circuit and outputs the regulation voltage, the output circuit includes a first conductivity type first output transistor provided between the output terminal of the regulator circuit and a first power supply and having a gate connected to the output terminal of the differential amplifier circuit, and a second conductivity type second output transistor provided between a second power supply and the output terminal of the regulator circuit and having a gate connected to the output terminal of the differential amplifier circuit, the differential amplifier circuit includes a differential section having the first and second input terminals, a first output section connected to a first output terminal of the differential section, and a second output section connected to a second output terminal of the differential section, the differential section includes a second conductivity type first transistor for generating bias current provided between the second power supply and a first node, a second conductivity type second transistor provided between the first node and a second node and having a gate that serves as the first input terminal, a second conductivity type third transistor provided between the first node and a third node and having a gate that serves as the second input terminal, a first conductivity type fourth transistor provided between the second node and the first power supply and having a gate connected to the second node, and a first conductivity type fifth transistor provided between the third node and the first power supply and having a gate and a drain connected to the third node, the first output section includes a second conductivity type sixth transistor provided between the second power supply and a fourth node and having a gate connected to the fourth node, and a first conductivity type seventh transistor provided between the fourth node and the first power supply and having a gate connected to the second node, and the second output section includes a second conductivity type eighth transistor provided between the second power supply and a fifth node and having a gate connected to the fourth node, and a first conductivity type ninth transistor provided between the fifth node and the first power supply and having a gate connected to the third node.