Patent ID: 7098828
Filing Date: 2006-08-29
Classification: H03M

Abstract:
1. A complex band-pass ΔΣ AD modulator comprising: a subtracter device for subtracting a DA converted complex analog signal from first and second DA converters, from a complex analog signal including inputted first and second analog signals orthogonal to each other, and outputting a subtracted complex analog signal; a complex band-pass filter for band-pass-filtering the subtracted complex analog signal and outputting a band-pass-filtered complex analog signal; first and second AD converters for AD converting the band-pass-filtered complex analog signal into an AD converted complex digital signal including first and second digital signals orthogonal to each other, and outputting the AD converted complex digital signal; and said first and second DA converters for DA converting the AD converted complex digital signal into the DA converted complex analog signal, and outputting the DA converted complex analog signal to said subtracter device; characterized in that said complex band-pass ΔΣ AD modulator further comprises first and second multiplexers, and first and second logic circuits, wherein a clock signal has a predetermined period of time, and has first and second timings alternately generated, wherein at the first timing, said first multiplexer inputs and outputs the first and second digital signals from said first and second AD converters to said first and second logic circuits, respectively, and at the second timing, inputs the first and second digital signals from said first and second AD converters, and outputs the first digital signal to the second logic circuit and outputs the second digital signal to said first logic circuit, wherein said first and second logic circuits substantially noise-shapes non-linearities of said first and second DA converters by realizing a complex digital filter as virtually provided at the previous stage of said first and second DA converters and a complex analog filter as virtually provided at the next stage of said first and second DA converters, using a high-pass element rotation method for the first digital signal and a low-pass element rotation method for the second digital signal, and wherein, at the first timing, said second multiplexer inputs and outputs the first and second digital signals from said first and second DA converters as first and second DA converted analog signals to said subtracter device, respectively, and at the second timing, inputs the first and second digital signals from said first and second DA converters, and outputs the first digital signal as a second DA converted analog signal to said subtracter device and outputs the second digital signal as a first DA converted analog signal to said subtracter device.