Patent ID: 6642088
Filing Date: 2003-11-04
Classification: H01L

Abstract:
A method to form a SCR device in the manufacture of an integrated circuit device comprising:providing a SOI substrate comprising a silicon layer overlying a buried oxide layer wherein said silicon layer further comprises a first well of a first type and a second well of a second type; forming a first heavily doped region of said first type in said second well to form an anode terminal; and forming a second heavily doped region of said second type in said first well to form a cathode terminal; forming a third heavily doped region of said first type in said first well and coupling said third heavily doped region to said cathode terminal wherein no other heavily doped region lies between said second and third heavily doped regions; and forming a gate overlying said silicon layer and between said second and third heavily doped regions wherein said gate comprises a conductive layer overlying said silicon layer with an insulating layer therebetween to complete said SCR device.