Patent ID: 6799234
Filing Date: 2004-09-28
Classification: G06F

Abstract:
A method for assigning resources to slave devices coupled to a PCI backplane, with at least one master device and multiple slave devices coupled to first and second GNT/REQ line pairs that form bus lines of a multiplexing control bus including multiple time slots, each time slot comprising a plurality of bit positions, aggregated into a frame, said method comprising the acts of:at the slave device: generating a random delay number based on an elapsed time interval from the time the slave device is reset; detecting unassigned time slots and decrementing the random delay number for each unassigned time slot detected; upon expiration of the random delay number, asserting an assigned bit in a detected unassigned time slot to select an assigned time slot; at the master device: upon detecting that the slave device has asserted the assigned bit, asserting a chip select bit in the assigned time slot and reading slave ID data from the slave device utilizing a data bit in the assigned time slot; subsequent to reading the slave ID device data, utilizing the chip select bit and data bit in the assigned slot to load data into configuration registers on the slave device.