Patent ID: 7482274
Filing Date: 2009-01-27
Classification: C23F,H01B,H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming an insulating layer over a substrate; forming an amorphous semiconductor layer on the insulating layer; forming a crystalline semiconductor layer on the insulating layer by crystallizing the amorphous semiconductor film; forming at least one semiconductor island by patterning the crystalline semiconductor layer; forming a gate insulating film on the semiconductor island; forming at least first and second conductive films on the gate insulating film; forming a resist pattern on the second conductive film; performing a first etching treatment for the first and second conductive films; performing a second etching treatment for the first and second conductive films, thereby etching the second conductive film selectively; forming impurity regions in the semiconductor island by doping impurity elements; and forming an interlayer insulating film over the first and second conductive films and the semiconductor island, wherein the first etching treatment is performed by ICP etching under conditions that bias power density is 0.5 W/cm