Patent ID: 6294434
Filing Date: 2001-09-25
Classification: H01L

Abstract:
A method of fabricating a metal oxide semiconductor field effect transistor (MOSFET), device on a semiconductor substrate, comprising the steps of:forming a gate insulator layer on said semiconductor substrate;forming a gate structure on said gate insulator layer;forming insulator spacers on the sides of said gate structure;forming a heavily doped source/drain region in an area of said semiconductor substrate not covered by said gate structure or by said insulator spacers;performing a blanket ion implantation procedure to place metal ions into a top portion of said heavily doped source/drain region, and into a top portion of said gate structure;performing a first anneal procedure to form first metal silicide layers on the top surface of said heavily doped source/drain region, and to form a second metal silicide layer on the top surface of said gate structure, resulting in a salicide gate structure comprised of said second metal silicide layer, on underlying, said gate structure, leaving unreacted metal ions located on said insulator spacers;selectively removing said unreacted metal ions; andperforming a second anneal cycle to convert said first metal silicide layers, and said second metal silicide layer, to lower resistance, metal silicide layers.