Patent ID: 9166029
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, the method comprising: forming, in each of a plurality of element regions of a semiconductor wafer, surface electrodes and a insulating layer on peripheral parts of the surface electrodes so that a height of the insulating layer from a front face of the semiconductor wafer is higher than that of the surface electrodes; forming, on the front face of the semiconductor wafer, a dicing line groove for surrounding a periphery of the surface electrodes with the insulating layer being sandwiched between the surface electrodes and the dicing line groove in a plane view, the dicing line groove being formed so that a height of the dicing line groove from the front face of the semiconductor wafer is lower than that of the insulating layer and the dicing line groove extends to an outer circumferential edge of the semiconductor wafer; after forming the dicing line groove, bonding adhesive layers onto the surface electrodes in the each of the plurality of element regions so that a height of the adhesive layers from the front face of the semiconductor wafer is higher than that of the insulating layer, and bonding, onto a front side of the adhesive layers, a base material for covering the front face of the semiconductor wafer; and processing a rear face of the semiconductor wafer of which the front face is covered with the base material, wherein the adhesive layers are formed without having a part disposed on the insulating layer whereby no part of the adhesive layers is formed between the insulating layer and the base material.