Patent ID: 6581137
Filing Date: 2003-06-17
Classification: G06F

Abstract:
A data storage system wherein a host computer is in communication with a bank of disk drives through an interface, such interface comprising:a memory; a plurality of directors for controlling data transfer between the host computer and the bank of disk drives as such data passes through the memory; a plurality of busses in communication with the directors and the memory; and wherein each one of the directors includes a central processing unit, such central processing unit comprising: (A) a microprocessor; (B) a main memory; (C) a microprocessor interface, comprising: a semiconductor integrated circuit having formed therein: (i) a data rebuffering section disposed in the chip and adapted to couple data from a one of a plurality of bi-directional data ports to a bi-directional data port of the microprocessor selectively in accordance with a control signal; and (ii) a main memory interface adapted for coupling to a main memory for the microprocessor, such main memory interface being adapted for coupling to the microprocessor and being coupled to the data rebuffering section for providing control signals to the main memory section for enabling data transfer between the main memory and the microprocessor through the data rebuffering section; (D) a controller coupled to the data rebuffering section for producing the control signal.