Patent ID: 6616268
Filing Date: 2003-09-09
Classification: B41J

Abstract:
A heater chip for use in a printhead of an inkjet printer having a printer controller, comprising:a substrate having a substrate side and a device surface opposite the substrate surface, wherein the device surface further includes a power side and a ground side, and wherein the power side and the ground side are in opposing relation on the device surface of the chip, a plurality of transistor devices located on the device surface of the chip between the power and ground sides of the heater chip, each transistor device having a gate region, source region and drain region, and each transistor device being selectively activated according to a logical input from the printer controller, a plurality of resistive heating devices located on the device surface of the substrate electrically connected to the plurality of transistor devices, each resistive heating device having a first end and a second end, wherein each heating device is selectively activated according to the activation of a respective transistor, a plurality of ink vias located in a spaced apart array for providing ink from an ink reservoir to one or more of the resistive heating elements, wherein the ink vias are located between the transistor devices and the power side of the heater chip, at least one ground input defined by a single layer of conductive material during a chip manufacturing process, wherein the ground input is located proximate the ground side of the device surface of the chip an selectively electrically connected to each source of each transistor device for providing a logical input to a selected transistor device, a plurality of address lines partially defined by the single layer of conductive material during the chip manufacturing process, located proximate the ground side of the device surface of the chip, each address line selectively connecting a gate of a transistor device for providing a logical input to a selected transistor device, at least one power input defined by the single layer of conductive material during the chip manufacturing process, located proximate the power side of the device surface of the chip, wherein the power input is selectively electrically connected to each drain of each transistor device for providing a logical input to a selected transistor device, and an electrical trace configuration defined by the single layer of conductive material during the chip manufacturing process, electrically connecting the resistive heating elements to the power and ground inputs.