Patent ID: 6900645
Filing Date: 2005-05-31
Classification: G01R

Abstract:
1. A method of testing a semiconductor wafer having first and second areas, wherein the first and second areas each include a hole pattern having a plurality of holes that are disposed in the semiconductor wafer or disposed in a layer which is disposed on or above the semiconductor wafer, the method comprising: irradiating the hole pattern of the first area with an electron beam, wherein irradiating the hole pattern of the first area includes scanning the electron beam across the hole pattern of the first area; measuring a first current wherein the first current is generated in response to the electron beam irradiated on the hole pattern of the first area; irradiating the hole pattern of the second area with an electron beam, wherein irradiating the hole pattern of the second area includes scanning the electron beam across the hole pattern of the second area; measuring a second current wherein the second current is generated in response to the electron beam irradiated on the hole pattern of the second area; and comparing the first current to the second current to detect a difference.