Patent ID: 6507060
Filing Date: 2003-01-14
Classification: H01L

Abstract:
A PT/PZT/PT sandwich structure for integrated circuit device, the structure comprising:a semiconductor substrate; a dielectric layer formed over the substrate; a first conductive metal film formed over the dielectric layer; a second conductive metal film formed over the first conductive metal film; a first ferroelectric film formed over the second conductive metal film; a second ferroelectric film formed over the first ferroelectric film; a third ferroelectric film formed over the second ferroelectric film, wherein dielectric constants of the first and the third ferroelectric films are lower than that of the second ferroelectric film, wherein the first and the third ferroelectric films are made of a same material, and wherein a thickness ratio of the second ferroelectric film to the first or the third ferroelectric film ranges from about 1 to about 200; a third conductive metal film formed over the second ferroelectric film; and a fourth conductive metal film formed over the third metal conductive film.