Patent ID: 8134386
Filing Date: 2012-03-13
Classification: G06F,H03L,H04B,H04J,H04L

Abstract:
1. A hybrid circuit comprising: a driver circuit configured to receive a differential input signal, wherein the differential input signal includes first and second input signals, wherein the driver circuit is further configured to buffer the differential input signal to generate a first signal for transmission to a load, wherein the first signal is based, at least in part, on the differential input signal, wherein the driver circuit includes a first driver circuit configured to receive the first input signal and a second driver circuit configured to receive the second input signal, and wherein at least one of the first or second driver circuits comprises a transistor further configured to receive at least one of the first or second input signals at a gate terminal; a terminal coupled to the driver circuit and configured to provide the first signal to the load and receive a second signal through the load, wherein the first and second signals are respectively provided and received at least partially simultaneously; a replica circuit configured to receive the differential input signal, at least partially replicate an operation of the driver circuit, and generate an output signal, wherein the replica circuit includes a first replica circuit configured to receive the first input signal and a second replica circuit configured to receive the second input signal; a load replica coupled to the replica circuit, wherein the load replica has an impedance based, at least in part, on an impedance of the load, wherein the load replica is configured to receive the output signal and generate an adjusted output signal, and wherein the load replica includes a first load replica coupled between an output of the first driver circuit and an output of the second replica circuit and a second load replica coupled between an output of the second driver circuit and an output of the first replica circuit; and a combiner coupled to the terminal and the load replica and configured to subtract the adjusted output signal from a combination of the first and second signals received at the terminal.