Patent ID: 6098193
Filing Date: 2000-08-01
Classification: G11B,H03M

Abstract:
A data reproducing-device, comprising:a subtraction absolute value circuit for calculating a subtraction absolute value from a pre-equalized reproduce data and an estimate data as a branchmetric, in the lump, to the continuous K clocks of said reproduce data;a comparison and selection circuit for calculating a new pathmetric, from a previously calculated pathmetric of K clocks before and K clocks of said branchmetric calculated by said subtraction absolute value circuit, to each state associated with the new pathmetric, and outputting a selection signal to show which path is selected;an estimate data storing circuit for storing an estimate data of pre-equalized reproduce data;an address generating circuit for reading out in the lump estimate data needed for the calculation at said subtraction absolute value circuit from said estimate data storing circuit according to said selection signal output from said comparison and selection circuit;a path memory circuit for storing said selection signal output from said comparison and selection circuit over several stages to tens of states, obtaining the most probable path by unifying paths, then outputting the most probable data; anda correction control circuit for renewing said estimate data of said estimate data storing circuit, based on said reproduce data concerned and estimate data of said estimate data storing circuit obtained by using continuous output data of said path memory circuit as an address, in the lump, to K clocks of reproduce data obtained by delaying said pre-equalized reproduce data by a predetermined value.