Patent ID: 6331784
Filing Date: 2001-12-18
Classification: G06F,H03K

Abstract:
A secure programmable logic integrated circuit system, comprising:a multi-chip module having external pins;a programmable logic chip mounted in said multi-chip module and in communication with said external pins; anda configuration memory chip mounted in said multi-chip module, the configuration memory chip storing configuration data for programming a configuration of said programmable logic chip via a data transfer connection internal to said multi-chip module, the configuration memory in communication with said external pins for program and erase commands and configuration data to be stored in said configuration memory chip,wherein said configuration memory chip includes a security bit, said security bit having a first state in which configuration data may be programmed and read-back through said external pins of said multi-chip module, said security bit having a second state in which only an erase command can be communicated via said external pins and in which said internal data transfer connection is enabled.