Patent ID: 6760252
Filing Date: 2004-07-06
Classification: H01L

Abstract:
A floating gate memory cell for nonvolatile storage of information including at least one of information units and binary bits, comprising:a floating gate configuration for storing the information, said floating gate configuration having floating gates each independently storing the information and, as a result, storing a corresponding plurality of one of the information units and the binary bits independently of one another in the memory cell; a source/drain configuration accessing said floating gate configuration; a control gate configuration controlling access to said floating gate configuration, said control gate configuration having control gates each associated with a respective one of said floating gates, access to said respective one of said floating gates being controlled by each respective one of said control gates; and said source/drain configuration having two source/drain regions jointly provided for said floating gates and said control gates to permit access of all of said floating gates through said two common source/drain regions.