Patent ID: 6043163
Filing Date: 2000-03-28
Classification: H01L

Abstract:
A method of forming metal lines having a vertical profile in the fabrication of an integrated circuit comprising:providing semiconductor device structures in and on a semiconductor substrate;covering said semiconductor device structures with an insulating layer;depositing a barrier metal layer overlying said insulating layer;depositing a metal layer overlying said barrier metal layer;depositing a hard mask layer overlying said metal layer;covering said hard mask layer with a layer of photoresist;exposing said photoresist layer to actinic light and developing and patterning said photoresist layer to form the desired photoresist mask;etching away said hard mask layer where it is not covered by said photoresist mask leaving a patterned hard mask;etching away said metal layer not covered by said patterned hard mask to form said metal lines wherein said etching is performed by the etchant gases BCl.sub.3, Cl.sub.2, and N.sub.2 ;overetching to remove said barrier layer where it is not covered by said hard mask wherein said overetching is performed by the etchant gases HCl, Cl.sub.2, and N.sub.2 whereby hydrogen ions from said HCl gas react with said metal layer and said barrier metal layer to form a passivation layer on the sidewalls of said metal lines thereby preventing undercutting of said metal lines resulting in said metal lines having said vertical profile;removing said photoresist mask; andcompleting said fabrication of said integrated circuit.