Patent ID: 6021048
Filing Date: 2000-02-01
Classification: H01R,H05K

Abstract:
A high-speed memory module defined by first and second elements:a) said first element comprising:i) a plurality of flexible, interior layers laminated together to form a substrate having opposed exterior surfaces, said substrate having a network of conductive traces and vias forming data paths therein;ii) at least two substantially quadrangular, rigid circuit boards, each of said boards laminarly split into substantially symmetric half-sections;iii) each of said half-sections having solder lands formed on a first face for mounting electronic components thereto and conductive traces and vias incorporated therein forming a continuation of said data paths;iv) each of said half-sections having an opposite second face for bonding to said exterior surfaces of said substrate;v) said half-sections laminated together on either side of a portion of said substrate with said substrate being sandwiched therebetween;vi) wherein any gap between two parallel spaced-apart edges of any two adjacent boards is wide enough to allow mounting of said boards in a parallel, face-to-face, layered arrangement by folding said substrate at said gap;vii) said gap being wide enough to allow for an air space between any opposite facing component attached to separate boards;b) said second element comprising:i) a rigid circuit board having a network of conductive traces and vias incorporated therein said board defined by spaced-apart first and second elongated edges;ii) a comb of connecting terminals integral with said second element along said first elongated edge, said comb connected to said traces and vias to continue said data paths;iii) said comb sized and dimensioned to engage a connecting port on a supporting structure; and,iv) a first plurality of feed-through holes engaging said data paths in said first element arranged for connection to a like second plurality of feed-through holes engaging said data paths formed in said second element; and,c) means for interconnecting said first and said second feed-through holes so that said data paths from each of said half-sections through to said support structure are of substantially equal lengths.