Patent ID: 7436723
Filing Date: 2008-10-14
Classification: G11C

Abstract:
1. A method for sensing current in a two-terminal memory, comprising: providing an array including a plurality of first conductive traces and a plurality of second conductive traces; receiving an address associated with a selected first conductive trace from the plurality of first conductive traces and one or more selected second conductive traces from the plurality of second conductive traces; applying a first select voltage to one or more selected second conductive traces during a first cycle and during a second cycle; applying a non-select voltage potential to the plurality of first conductive traces and unselected second conductive traces during the first cycle; sensing one or more leakage currents flowing through the one or more selected second conductive traces during the first cycle; applying a second select voltage to the selected first conductive trace during the second cycle while applying the non-select voltage potential to unselected first and second conductive traces; and sensing one or more total currents flowing through the one or more selected second conductive traces during the second cycle.