Patent ID: 6771115
Filing Date: 2004-08-03
Classification: G05F,G11C

Abstract:
An internal voltage generating circuit generating an internal voltage of a semiconductor memory device, said internal voltage generating circuit staying in an operating state even when said semiconductor memory device is in a standby state, comprising:a boosting circuit configured for performing a charge pump operation to generate said internal voltage from a drive voltage produced from a supplied power supply voltage; a reference voltage generating circuit configured for generating a reference voltage, said reference voltage generating circuit supplying, as said reference voltage, a voltage having its upper limit corresponding to a voltage level that can be driven by said boosting circuit in operation; and a level sensing circuit configured for comparing said internal voltage with said reference voltage to output, to said boosting circuit, a signal indicative of result of the comparison to control on and off of said charge pump operation, wherein said reference voltage generating circuit includes a constant voltage circuit configured for generating a predetermined voltage corresponding to a target level of said internal voltage, a drive voltage input unit for inputting the drive voltage of said boosting circuit in operation, and a comparing circuit for comparing said predetermined voltage with said drive voltage of said boosting circuit and selecting, as said reference voltage, one of said voltages that has a lower voltage level to supply the selected voltage to said level sensing circuit.