Patent ID: 7523448
Filing Date: 2009-04-21
Classification: G06F

Abstract:
1. A compiling method comprising optimizing load instructions to read out data from a memory in an object program targeted for optimization, the step of optimizing comprising the steps of: performing partial redundancy elimination on the load instructions to read out variable data from the memory in the object program whose variables are at least in part unassigned to registers so that spilling does not take place when the variables are assigned to the registers; acquiring frequencies of the load instruction execution and frequencies of use instruction execution, the use instructions using data read out by the load instructions; detecting, by a free register detecting means, sets of the free registers, which are not assigned to any variable, at load instruction execution locations and use instruction execution locations; detecting by a backward register detecting means, free registers, which are not assigned to any variable, along execution paths traced in reverse order of execution, starting backward from use instructions to use data read out by the load instructions and extending to the load instructions; detecting, by a forward register detecting means, free registers, which are not assigned to any variable, along execution paths traced in order of execution, starting forward from the load instructions and extending to use instructions to use data read out by the load instructions; updating said free register sets by one or more of: said backward register detecting means, and forward register detecting means, said updating including calculating intersections of the sets of free registers obtained by said free register detecting means with said free registers detected by either said forward register detecting means or said backward register detecting means; calculating a sum of the frequencies of load instruction execution and a sum of the frequencies of use instruction execution for each of the free registers at the load instruction locations or the use instruction execution locations; and, assigning the updated free registers to target variables from which the load instructions read out the data, the updated free registers having a maximum sum of the execution frequencies among the free registers at the load instruction execution locations, wherein the target variables are assigned, which are judged as being unassignable to registers by a register assignment processing, to registers which are not yet assigned to any variable even after the end of the register assignment processing.