Patent ID: 7265703
Filing Date: 2007-09-04
Classification: H03M

Abstract:
1. A semiconductor integrated circuit device comprising: a pipelined A-D conversion circuit which has a plurality of stages and is coupled in series with an input terminal to which an analog signal to be converted is inputted, wherein the stages other than at least one stage, coupled to the input terminal through the one stage, respectively have two or more sample and hold circuits and an amplifier coupled in common with the two or more sample and hold circuits, and the two or more sample and hold circuits perform interleave operations; wherein the stages comprise: a sub-A-D converter that carries out A-D conversion to convert an analog signal into a digital signal of a small number of bits; a sub-D-A converter that converts from the digital output signal of the sub-A-D converter to analog; a subtracter that generates a signal indicating the difference between the analog output signal of the sub-D-A converter and the analog signal to be converted; and an amplifier that amplifies, samples, and holds the output signal of the subtracter, wherein the sample and hold circuits comprise the sub-D-A converter and the subtracter; and wherein the stages in which the interleave operation is performed comprise two or more sample and hold circuits and two or more sub-A-D converters, and the sample and hold circuits and the sub-A-D converters perform synchronous operations.