Patent ID: 6765248
Filing Date: 2004-07-20
Classification: H01L

Abstract:
A method for fabricating a field effect transistor, which comprises the steps of:providing a substrate having a surface; forming a gate oxide on the surface; depositing a first layer for a gate electrode on the gate oxide, the first layer containing a polycrystalline doped silicon; depositing a second layer for the gate electrode on the first layer; structuring the second layer, leaving the first layer at least partly clear and forming a sidewall at the second layer extending substantially perpendicular to the surface of the substrate; depositing a layer containing silicon on the sidewall of the second layer and on an exposed portion of the first layer; performing a structuring step such that the first layer gets structured and the structuring extends into the gate oxide but leaving intact the layer containing silicon at the sidewall of the second gate electrode; incorporating a dopant into the substrate forming a first doping region and a second doping region; forming an insulating spacer layer on the sidewall of the second layer extending to the first and second doping regions; and forming a contact adjoining the insulating spacer layer, the contact makes contact with one of the first and second doping regions.