Patent ID: 6423580
Filing Date: 2002-07-23
Classification: H01L

Abstract:
A method of manufacturing a dual chip package using tape wiring boards, comprising:(A) preparing an upper tape wiring board, a lower tape wiring board, and a lead frame, wherein each of said tape wiring boards comprises: a polymeric tape having windows patterned therein, the polymeric tape having a lower and upper surfaces; metal patterns formed on the lower surface of the polymeric tape at either sides of said windows, said metal patterns having pad connection portions exposed through the window, and lead connection portions extending outwardly from said polymeric tape; and an adhesive layer formed on the lower surface of the tape; and wherein said lead frame comprises: a die pad having a low surface and an upper surface; a plurality of inner leads extending inwardly toward the die pad; and a plurality of outer leads integrated with the inner leads and extending outwardly; (B) attaching a lower chip to the lower surface of the die pad, said lower chip comprising an active surface having a plurality of electrode pads at approximately the center and a rear surface attached to the lower surface of the die pad; (C) attaching an upper chip to an upper surface of the die pad, said upper chip comprising an active surface having a plurality of electrode pads at approximately the center and a rear surface attached to the upper surface of the die pad; (D) attaching each of the adhesive layers of the upper tape wiring board and the lower tape wiring board to a respective one of the active surfaces of the upper chip and the lower chip, wherein the windows of the lower and upper tape wiring boards expose the electrode pads of the lower and upper chips, respectively; (E) electrically connecting each of the pad connection portions to a respective one of the electrode pads; and (F) electrically connecting each of the lead connection portions to a respective one of the inner leads.