Patent ID: 7167727
Filing Date: 2007-01-23
Classification: G06F,H04B,H04J,H04L,H04W

Abstract:
1. A wireless receiver system comprising: a receiver circuit that receives a wireless signal; a demodulator coupled to the receiver, circuit, the demodulator recovering a data signal and at least one clock signal from at least one signal output by the receiver circuit; a computer configured to generate a read signal; and a first-in first-out memory coupled to the demodulator to receive the data signal and the at least one clock signal, wherein the first-in first-out memory stores the data signal in response to the at lest one clock signal, and wherein the first-in first-out memory is coupled to the computer to receive the read signal; wherein the computer reads the data signal from the first-in first-out memory without synchronizing a clock to the at least one clock signal.