Patent ID: 6018181
Filing Date: 2000-01-25
Classification: H01L

Abstract:
A single gate thin film transistor, comprising:a gate electrode formed on an insulating layer and having opposite sidewalls;a dielectric layer formed on said insulating layer and covering upper and side surfaces of said gate electrode, said dielectric layer overlying said gate electrode having a thickness t; anda polycrystalline silicon layer formed on an upper surface of said dielectric layer, said polycrystalline silicon layer having a channel region formed above said gate electrode and having a pair of impurity regions formed respectively at opposite sides of said channel region, said channel region having a length equal to or greater than the length of the gate electrode, and a shave of said channel region having no corners or edges conforming to a shape of the sidewalls of the gate electrode,an interface between said dielectric layer and said polycrystalline silicon layer lying in a single plane throughout a first region beneath said channel region and a second region extending beyond each said sidewall of said gate electrode by a distance greater than said thickness t of said dielectric layer, whereinsaid dielectric layer comprises a first insulating layer formed in contact with said side wall of said gate electrode and has a film thickness equal to that of said gate electrode and a second insulating layer has a flat surface formed on the surface of this first insulating layer.