Patent ID: 8938365
Filing Date: 2015-01-20
Classification: G06F

Abstract:
1. A computer-implemented method in which a computer system performs operations comprising: designating by said computer system a first clock of a plurality of clocks on a printed circuit board (PCB) as a reference clock; providing by said computer system a reference clock counter in communication with said reference clock, said reference clock counter counting cycles of said reference clock; providing by said computer system a counter for each other clock of said plurality of clocks, each counter counting cycles of a respective clock; starting by said computer system said reference clock counter and each of said counters at a same time; and determining by said computer system when said reference clock counter reaches a maximum count value and when said reference clock counter reaches said maximum count value then storing by said computer system value of each of said counters and determining by said computer system if said stored values are expected values.