Patent ID: 6692629
Filing Date: 2004-02-17
Classification: C25D,H01L

Abstract:
A flip-chip bumping method for use on a semiconductor wafer predefined with a plurality of integrated circuit chips which are delimited from each other by a predefined cutting line and each of which is formed with a plurality of bond pads, the flip-chip bumping method comprising the steps of:(1) forming a plating bus having a main portion over and along the cutting line and a plurality of branches extending from the main portion, each of the branches being connected to one of the bond pads which are exposed to outside of the plating bus; (2) performing a UBM fabrication process, wherein a first plating electrical current is applied through the plating bus to each bond pad for fabricating a UBM layer over each bond pad through plating; and (3) performing a solder-bump fabrication process, wherein a second plating electrical current is applied through the plating bus to each bond pad for plating of a selected solder material over the UBM layer on each bond pad to thereby form a solder bump over the UBM layer on each bond pad.