Patent ID: 6205540
Filing Date: 2001-03-20
Classification: G06F

Abstract:
A processor for executing a computer program stored as a plurality of opcodes in a digital memory, comprising:a set of dual function opcodes, each of said dual function opcodes having a first function and a second function,a setting opcode, anda resolving flag having a set state and a clear state,means for fetching of said setting opcode; said fetching forcing said resolving flag into said set state,means for fetching of any one of said dual function opcodes, when said resolving flag is in said set state, resulting in the execution of said second function by said processor,means for fetching of any one of said dual function opcodes, when said resolving flag is in said clear state, resulting in the execution of said first function by said processor,said setting opcode being fetched immediately prior to the fetching of one of said dual function opcodes for execution of said second function thereof.