Patent ID: 8242027
Filing Date: 2012-08-14
Classification: H01L

Abstract:
1. A semiconductor device manufacturing method, comprising: forming a PMOS transistor and an NMOS transistor; forming a silicon oxide film having a first thickness covering one of the PMOS transistor and the NMOS transistor and having a second thickness different from the first thickness covering the other of the PMOS transistor and the NMOS transistor; providing, over the first and second thickness of the silicon oxide films, a stress layer covering both the PMOS transistor and the NMOS transistor to apply a stress to one transistor of the PMOS transistor and the NMOS transistor; removing a portion of the stress layer over the other transistor of the PMOS transistor and the NMOS transistor, and leaving a portion of the stress layer over the one transistor of the PMOS transistor and the NMOS transistor, such that the first and second thickness of the silicon oxide film are made to be substantially equal; performing thermal treatment of the one transistor of the PMOS transistor and the NMOS transistor and the portion of the stress layer over the one transistor of the PMOS transistor and the NMOS transistor; removing the portion of the stress layer over the one transistor of the PMOS transistor and the NMOS transistor; and removing a portion of the silicon oxide film over the PMOS transistor and the NMOS transistor, wherein both the silicon oxide film having the first thickness and the silicon oxide film having the second thickness are the same compositions, and wherein the first and second thickness of the silicon oxide film are made to be substantially equal in the step of removing a portion of the stress layer over the other transistor of the PMOS transistor and the NMOS transistor and leaving a portion of the stress layer over the one transistor of the PMOS transistor and the NMOS transistor.