Patent ID: 7350091
Filing Date: 2008-03-25
Classification: G06F,G09G

Abstract:
1. A control apparatus for controlling a plurality of computers, comprising: a memory coupled to directly receive a digital image signal, the memory receiving a memory clock; a clock generator, which generates a system clock; a clock switch circuit coupled to receive the system clock and a synchronization signal of the digital image signal, the clock switch circuit generating a pixel clock based on the synchronization signal of the digital image signal and switching between the system clock and the pixel clock for generating the memory clock; and a main module coupled to the memory and the clock switch circuit, the main module causing the clock switch circuit to switch the memory clock between the pixel clock and the system clock, wherein the memory stores the directly received digital image signal when the clock switch circuit switches the memory clock to the pixel clock, and wherein the main module reads out stored digital image signal from the memory when the clock switch circuit switches the memory clock to the system clock, the main module sending the digital image signal read from the memory to a remote computer.