Patent ID: 8195437
Filing Date: 2012-06-05
Classification: G06F

Abstract:
1. A computing device for simulating power distribution from a power source in an electrical system over a sequence of one or more events, comprising: a plurality of building block modules implemented on a first computing device, each said module including an interconnect resistance for one or more series-connected physical interconnects and one or more event-driven fixed power levels for a single load, a current meter for each said physical interconnect that calculates a current derating value from design parameters and provides an indicator of whether a load current exceeds the current derating value and a volt meter that provides an indicator of whether a load voltage meets an under voltage specification and an over voltage specification for the load; a topology processor that interconnects a power source model with the plurality of building blocks at nodes into an electrical topology for the electrical system, said processor applying a source voltage to said topology and calculating load voltages and load currents pulled from the power source to the nodes for a single event; and a system processor that provides the topology processor with source voltages and the event-driven fixed power levels for each said event in the sequence and monitors the current meters and voltage meters to determine a source voltage for the power source so that the load voltages satisfy the under voltage specifications for all events in the sequence and monitors the current meters to adjust the interconnect design parameters so that the load currents do not exceed the current derating values for all events in the sequence.