Patent ID: 7663224
Filing Date: 2010-02-16
Classification: B33Y,H01L

Abstract:
1. A semiconductor device assembly, comprising: a semiconductor die having a plurality of bond pads on an active surface thereof; a dielectric film having at least one conductive trace disposed upon a surface thereof and at least one conductive via formed through therethrough; an electrically conductive layer disposed between the active surface of the semiconductor die and the dielectric film and operably coupled to the at least one conductive via, the electrically conductive layer comprising at least one electrical current isolation slot formed therethrough and a surface providing at least one electrical conductor landing area, wherein at least a portion of the at least one electrical current isolation slot extends between the dielectric film and the active surface of the semiconductor die, and wherein at least a portion of the at least one electrical current isolation slot is located directly under and covered by the dielectric film; and a plurality of electrical conductors, wherein at least one of the plurality of electrical conductors operably couples at least one of the plurality of bond pads to the at least one electrical conductor landing area and at least one other of the plurality of electrical conductors operably couples at least one other of the plurality of bond pads to the at least one conductive trace.