Patent ID: 8933831
Filing Date: 2015-01-13
Classification: H03M

Abstract:
1. An analog-to-digital converter for sampling an input analog voltage and converting the input analog voltage into a digital value, comprising: a phase locked loop that uses a reference clock as a source oscillation, has a higher frequency than the reference clock, and generates a sampling clock synchronizing with the reference clock; an analog-to-digital conversion unit that samples the input analog voltage using the sampling clock and converts the input analog voltage into a digital value; a time-to-digital converter that detects a time difference between a voltage transition timing of the reference clock and a voltage transition timing of the sampling clock and converts the time difference into a differential digital value; and a digital correction unit that interpolates the differential digital value to obtain an interpolation value corresponding to each sampling timing and digitally corrects influence of jitter of the sampling clock included in a raw digital output of the analog-to-digital conversion unit by the interpolation value.