Patent ID: 7566932
Filing Date: 2009-07-28
Classification: H01L

Abstract:
1. A static random access memory (SRAM) unit, comprising: a substrate having a trench formed therein; a gate dielectric layer disposed on the substrate; a gate disposed on the gate dielectric layer; a trench capacitor disposed in the trench on one side of the gate; an isolation structure disposed in part of the trench capacitor and in part of the substrate; a passing gate disposed on the isolation structure; a source/drain region disposed in the substrate on the respective sides of the gate, wherein the source/drain region on one side of the gate is located between the gate and the trench capacitor; a first contact electrically connected to the trench capacitor and disposed between the passing gate and the gate; and a second contact electrically connected to the source/drain region on the other side of the gate.