Patent ID: 6767828
Filing Date: 2004-07-27
Classification: H01L,H05K,Y10T

Abstract:
A method for forming an electrically conductive layer having patterns for semiconductor devices, comprising the steps of:providing a substrate; forming a first insulation layer on the substrate; forming a second insulation layer on the first insulation layer, the second insulation layer having predetermined functional groups; forming a patterned polymer layer having the patterns on the second insulation layer; etching the second insulation layer in accordance with the patterns of the patterned polymer layer to create a patterned insulation layer; stripping the patterned polymer layer to expose the patterned insulation layer; treating the patterned insulation layer and resulting exposed first insulation layer with a coupling agent reacting with the predetermined functional groups; treating the patterned insulation layer with a catalyst-containing solution; and selectively depositing the electrically conductive layer having patterns on the patterned insulation layer.