Patent ID: 8815726
Filing Date: 2014-08-26
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising: forming a gate insulating film, a first polycrystalline silicon film, an inter-gate insulating film, and a second polycrystalline silicon film one above another in a memory cell region and a peripheral circuit region of a semiconductor substrate; forming a silicon nitride film serving as a mask layer above the second polycrystalline silicon film; patterning the silicon nitride film located in the memory cell region into a dense pattern and the silicon nitride film located in the peripheral circuit region into a sparse pattern; dry etching, while controlling a temperature of the semiconductor substrate placed in an etching chamber at 50 degrees Celsius or higher, the second polycrystalline silicon film, the inter-gate insulating film, and the first polycrystalline silicon film one after another using the dense pattern in the memory cell region and the sparse pattern in the peripheral-circuit region as masks, the second polycrystalline silicon film being dry etched under a first etching condition, the inter-gate insulating film being dry etched under a second etching condition to expose the first polycrystalline silicon film, and the first polycrystalline silicon film being dry etched under the first etching condition to a predetermined thickness; and removing etch residues of the first polycrystalline silicon film by a mixture of a hydrogen bromide (HBr) gas, an oxygen (O wherein the first etching condition includes supplying an etching gas composed of a hydrogen bromide gas and a fluoromethane based gas into the chamber, and generating plasma in the chamber, and wherein the supplying comprises supplying at least one of a difluoromethane gas (CH