Patent ID: 7394160
Filing Date: 2008-07-01
Classification: G11C,H01L,H05K,Y02P

Abstract:
1. An inline memory module (IMM) architecture comprising: a printed circuit board (PCB); a first array of memory devices on a first side of the PCB; a second array of memory devices on a second side of the PCB; and a plurality of vias; wherein at least some of the memory devices of the first array are arranged so as to substantially overlap, relative to a reference axis of the PCB, positional-twin memory devices of the second array, respectively; and at least some of the plurality of vias include: a first opening along the first side of the PCB, a second opening along the second side of the PCB, and at least one signal path that passes through both the first opening and the second opening of the vias and connects I/O terminals of a first memory device in the first array to corresponding I/O terminals of a second memory device in the second array that is adjacent to a third memory device in the second array, where the third memory device is a positional-twin corresponding to the first memory device.