Patent ID: 6544846
Filing Date: 2003-04-08
Classification: B82Y,G11C,H01L,Y10S

Abstract:
A method of forming a memory device having first and second array of memory cells, the method comprising:forming a first group of bodies of semiconductor material for the first array; forming a second group of bodies of semiconductor material for the second array; forming a first contact at a first end of each of body of the first and second groups; forming a second contact at a second end of each body of the first and second groups, the second end distant from the first end; forming pores extending into the bodies of the first and second groups; forming a first dielectric layer on interior surfaces of the pores of the first group having a first thickness; forming a second dielectric layer on interior surfaces of the pores of the second group having a second thickness; forming a conductive material in the interiors of the pores of the first and second groups; and forming a third dielectric on exposed portions of the conductive material.