Patent ID: 7824972
Filing Date: 2010-11-02
Classification: G02F,H01L

Abstract:
1. A method of producing a thin film transistor substrate, the method comprising: forming a gate wiring line comprising a gate electrode on an insulating substrate; forming a data wiring line comprising a source electrode and a drain electrode on the gate wiring line; forming a passivation layer pattern on the data wiring line except for a part of the drain electrode and a pixel region; and forming a pixel electrode electrically connected to the drain electrode and comprising aluminum-doped zinc oxide (ZAO), wherein the forming of the passivation layer pattern comprises: forming a passivation layer on the gate wiring line and the data wiring line; forming a photoresist pattern on the passivation layer to remove the passivation layer from the drain electrode and the pixel region, the photoresist pattern including a first region and a second region, the first region formed on the gate wiring line and the data wiring line with the exception of a part of the drain electrode, and the second region formed between an end of the drain electrode and the pixel region, the second region being thinner than the first region; and overetching the passivation layer using the photoresist pattern as an etching mask.