Patent ID: 7067377
Filing Date: 2006-06-27
Classification: H01L

Abstract:
1. A method of fabricating a memory device with a recessed channel comprising: selectively etching trenches in a semiconductor substrate; forming an oxide layer within at least the trenches; depositing a first conductive layer over the semiconductor substrate and in the trenches; planarizing the device to selectively remove portions of the first conductive layer while leaving portions of the first conductive layer in the trenches to form gates; performing one or more bitline implants to form bitlines adjacent to the gates; removing portions of the oxide layer located in the trenches adjacent to the gates to a first depth defining gap regions; partially filling the gap regions with a lower insulating layer; depositing a charge trapping material within at least the gap regions on the lower insulating layer; and forming an upper insulating layer on the deposited charge trapping material.