Patent ID: 9070278
Filing Date: 2015-06-30
Classification: A61B,B06B,G01T,G08C,H04N

Abstract:
1. A method for forming a fault tolerant detector assembly, comprising: providing a sensor array having a plurality of sensor elements; providing an electronics layer having a plurality of electronics cells, wherein the plurality of electronics cells corresponds to the plurality of sensor elements in the sensor array; introducing a status indicator element in each of the plurality of the electronics cells, wherein the status indicator element is configured to store a status of a corresponding sensor element, and wherein a first value of the status comprises an operational status of the corresponding sensor element and a second value of the status comprises a poorly yielding status of the corresponding sensor element; scanning the plurality of sensor elements in the sensor array to identify the status of the plurality of sensor elements in the sensor array; generating a functionality map based on the identified status of the plurality of sensor elements in the sensor array; selectively programming the status indicator elements based on the functionality map to form a fault tolerant detector assembly, wherein selectively programming the indicator elements based on the functionality map comprises changing a status of a status indicator element from a first value to a second value based on the functionality map; and excluding, during operation of the fault tolerant detector assembly, sensor elements corresponding to electronics cells having an associated status indicator element set to the second value, wherein excluding the sensor elements comprises configuring the sensor elements to drive a signal terminal such that a signal terminal voltage is equal to a bias terminal voltage of the corresponding sensor element.