Patent ID: 9029990
Filing Date: 2015-05-12
Classification: H01L

Abstract:
1. An integrated circuit (IC) package comprising: a pad with a top surface and a bottom surface; an interposer comprising an interposer leadframe and having a top surface and a bottom surface, said interposer leadframe having a plurality of inner pad portions and a plurality of outer pad portions provided thereon, said outer pad portions being integrally connected to said inner pad portions, said bottom surface of said interposer being attached to said top surface of said pad, at least one field-effect transistor (FET) overlying and electrically connected to at least one of said outer pad portions of said patterned metal layer; a flipchip die having a first surface and an opposite second surface, said second surface having a plurality of solder bumps extending therefrom that are connected to said plurality of inner pad portions of said interposer leadframe; a top leadframe having a top surface and a bottom surface and having a plurality of lead portions with inner ends and outer ends, wherein at least one of said lead portions is connected at said inner end thereof to at least one of said outer pad portions of said interposer leadframe and wherein at least one of said lead portions is connected at said inner end thereof to said at least one FET; wherein said bottom leadframe is soldered to said top leadframe; at least one passive circuit device mounted on said top surface of said top leadframe and electrically connected to at least one of said lead portions of said top leadframe; and a mold compound covering said at least one passive circuit device and portions of said top and bottom leadframes and exposing outer portions of said lead portions and exposing a bottom surface of said pad.