Patent ID: 6259160
Filing Date: 2001-07-10
Classification: H01L

Abstract:
A semiconductor device having an encapsulated copper interconnect structure, said semiconductor device comprising:(a) a semiconductor substrate that requires electrical interconnect structure;(b) a first copper interconnect structure comprising an elevated copper interconnect structure portion over a first metallic barrier, said first copper interconnect structure being formed within a via structure lined with a metallic barrier material,said via structure being formed within a first insulating layer fabricated over said semiconductor substrates,said via structure having a cross-sectional area of high aspect ratio in a range of at least 3:1;(c) a second copper interconnect structure disposed directly on said elevated copper interconnect structure portion of said first copper interconnect structure;said elevated copper interconnect structure portion being supported by exposed portions of said first metallic barrier,said elevated copper interconnect structure portion and said portion of said first copper interconnect structure formed within said via structure, comprising a composite copper interconnect structure; and(d) a second metallic barrier over said elevated copper interconnect structure portion, said second metallic barrier being formed such that said exposed portions of said first metallic barrier bond with corresponding portions of said second metallic barrier to form an encasement that encapsulates said composite copper interconnect structure; and(e) second insulating layer over said first insulating layer and about said encased composite copper interconnect structure.