Patent ID: 6165855
Filing Date: 2000-12-26
Classification: G03F,H01L

Abstract:
A method for fabricating a microcircuit gate structure having a length dimension of less than about 0.20 .mu.m, using an antireflective coating, a deep ultraviolet exposure source, and a deep ultraviolet photoresist, comprising the steps of:providing a semiconductor substrate,said substrate having an active region defined by a plurality of isolation structures, said active region having a gate oxide layer formed thereon, said plurality of isolation structures, and said gate oxide layer having a layer of gate electrode material formed thereon;forming a tri-layer antireflective coating on top of said gate electrode layer by:a) forming a first titanium layer over said gate electrode layer;b) forming a titanium nitride layer over said first titanium layer; andc) forming a second titanium layer over said titanium nitride layer;forming a patterned layer of said deep ultraviolet photoresist over said second titanium layer,whereby said antireflective coating facilitates absorption of deep ultraviolet light emitted from said deep ultraviolet exposure source during said forming of said patterned deep ultraviolet photoresist layer, andwhereby said antireflective coating prevents said titanium nitride layer member from releasing nitrogen into said patterned deep ultraviolet photoresist layer;selectively etching unprotected portions of said antireflective coating, said gate electrode material, and said gate oxide layer to form a gate structure having a length dimension of less than about 0.20 .mu.m; andstripping said deep ultraviolet photoresist.