Patent ID: 8963582
Filing Date: 2015-02-24
Classification: G11C,H03F,H03K

Abstract:
1. A signal amplification circuit comprising: a differential amplification unit configured to differentially amplify an input signal and an input signal bar obtained by inverting the input signal, to output an amplified signal to a first node, and to output an amplified signal bar to a second node; a first inverting element configured to output a first logic value to a first output node when the level of the amplified signal is higher than a logic threshold, and to output a second logic value to the first output node when the level of the amplified signal is lower than the logic threshold; a second inverting element configured to output the first logic value to a second output node when the level of the amplified signal bar is higher than the logic threshold, and to output the second logic value to the second output node when the level of the amplified signal bar is lower than the logic threshold; a first current path connected between the first node and the second output node; and a second current path connected between the second node and the first output node, wherein the first current path includes a first resistive element connected between the first node and the second output node, and the second current path includes a second resistive element connected between the second node and the first output node.