Patent ID: 6240151
Filing Date: 2001-05-29
Classification: H04L

Abstract:
A method of asynchronously receiving serial data via a serial port of a digital signal processor including: a reception timer period register for storing pulse section information representing how many clock pulses correspond to one bit of the serial data, when a 1-bit time section of transmitted serial data is expressed as a pulse section composed of a plurality of clock pulses; and a reception timer counter for counting generated clock pulses up to a value determined by said reception timer period register, resetting the reception timer counter to a counted value of zero, and counting again starting from zero, said method comprising the steps of:determining whether a start bit is received;enabling, when it is determined that said start bit has been received, said serial port when said start bit falls from a high logic value to a low logic value;setting an initial value of said reception timer counter to half the value in said reception timer period register, when said serial port is enabled;incrementing the value of said reception timer counter in response to said clock pulses;receiving one bit of data whenever the value of said reception timer counter becomes equal to the value in said reception timer period register;resetting said reception timer counter to zero, after the step of receiving one bit of data whenever the value of said reception timer counter becomes equal to a value in said reception timer period register;determining whether a stop bit is received;returning to said step of incrementing said value of said reception timer counter when it is determined that said stop bit has not been received; anddisabling said serial port when said stop bit is received.