Patent ID: 6033947
Filing Date: 2000-03-07
Classification: H01L

Abstract:
A process for making a control circuit for electronic semiconductor devices monolithically integrated along with at least one power component, being of a type which comprises a first epitaxial layer growing step carried out using a first dopant type, a step of implantation of a second dopant type to define an isolation well, and a second growing step of a second epitaxial layer, characterized in that it comprises further implantation steps to first define said isolation well, enclosing at least a first well in the second epitaxial layer, and subsequently define a second well to accommodate at least one field-effect transistor and being housed within and in direct contact with said first well wherein said further implantation steps result in an additional well to accommodate a second field-effect transistor being defined in the second epitaxial layer, said additional well being in turn protected by said isolation well.