Patent ID: 7709350
Filing Date: 2010-05-04
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor elemental device including an SOI structure in which an SOI layer is laminated, the method comprising the steps of: setting transistor forming regions and a device isolation region to the SOI layer, forming a pad oxide film over the SOI layer and forming an oxidation-resistant film over the pad oxide film; forming a resist mask in a region corresponding to each of the transistor forming regions, and etching the oxidation-resistant film and the pad oxide film with the resist mask as a mask to expose the SOI layer of the device isolation region; removing the resist mask and oxidizing the exposed SOT layer by a LOCOS method using the oxidation-resistant film to form a field oxide film; removing the oxidation-resistant film to expose the pad oxide film; forming another resist mask in a region excluding a pMOS region for forming a pMOS element; depositing an oxide over the pad oxide film of the pMOS region with the another resist mask as a mask to grow the pad oxide film; and removing the another resist mask and implanting germanium ions in the SOI layer in each of both an nMOS region containing an edge portion formed in the SOI layer in the nMOS region and the pMOS region upon formation of the field oxide film to thereby amorphize the edge portion.