Patent ID: 8948267
Filing Date: 2015-02-03
Classification: H04N

Abstract:
1. A multi-core processor system for processing video data, the multi-core processor system comprising: a memory system configured to store a plurality of data blocks; a plurality of processing cores, wherein the plurality of processing cores includes a control core and a plurality of other cores, and wherein the plurality of processing cores are configured to execute parallel processing of the plurality of data blocks; and an interconnect fabric that connects the plurality of processing cores and the memory system, wherein the plurality of processing cores is configured to execute parallel processing of the plurality of data blocks by wherein in one of the first set and the second set, the respective right-most data blocks of the rows follow a stairstep path in which each successive right-most block is horizontally offset from the immediately preceding right-most block by an offset in a common direction; wherein in the other one of the first set and the second set, the respective left-most data blocks of the rows follow the same stairstep path; and wherein the second set is located alongside the first set, with each of the right-most blocks located alongside a corresponding one of the left-most blocks.