Patent ID: 8201267
Filing Date: 2012-06-12
Classification: G06F,G07B

Abstract:
1. A cryptographic device comprising: a tamper detection circuit having a physical security boundary; a volatile memory device located within the physical security boundary; a battery, external to the physical security boundary, coupled to a power input of the memory device for providing power to the memory device under normal operating conditions; a capacitor, located within the physical security boundary, having a first node coupled to the power input of the memory device and a second node coupled to ground, the capacitor storing charge from the battery under normal operating conditions, the capacitor, when the battery is shorted, providing the stored charge to the memory device to allow the memory device to perform a clearing operation; and a discharge prevention means, located within the physical security boundary, having a first node coupled to the first node of the capacitor and a second node coupled to the battery, the discharge prevention means preventing the stored charge from the capacitor from discharging through the battery when the battery is shorted.