Patent ID: 6674118
Filing Date: 2004-01-06
Classification: H01L

Abstract:
A PIP (Poly-Interpoly-Poly) capacitor with high capacitance integrated with a split-gate flash memory cell comprising:a semiconductor substrate having a split gate region and a capacitor region, and a first gate dielectric layer formed on said split gate region and said capacitor region; a first polysilicon layer forming the floating gate of said memory cell in said split gate region, and the first electrode of said PIP capacitor in said capacitor region; a poly-oxide layer formed on said floating gate; a second polysilicon layer forming the control gate of said memory cell in said split gate region, and the second electrode of said PIP capacitor in said capacitor region; a second gate dielectric layer beneath said control gate and over said poly-oxide on said floating gate and over said substrate in said split gate region, said second gate dielectric and said poly-oxide forming an inter-gate dielectric layer; said second gate dielectric layer as the insulator layer between said first electrode and said second electrode of said PIP capacitor.