Patent ID: 6400604
Filing Date: 2002-06-04
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device having a data reprogram mode, comprising:a memory cell array in which a plurality of memory cells are arranged in a matrix form; a page buffer configured to store one page data to be programmed to memory cells which are selected in accordance with a page address signal; an internal column address generating circuit configured to generate column addresses of the one page by inputting the page address signal; a column decoder configured to receive the column addresses from the internal column address generating circuit; and a control circuit configured to execute a data reprogram operation which includes a load operation, an erase operation, and a program operation continuously, the load operation loading the one page data in accordance with the page address signal, the erase operation erasing the one page data stored in the memory cells which are selected, and the program operation programming the one page data stored in the page buffer to the selected memory cells.