Patent ID: 7352316
Filing Date: 2008-04-01
Classification: H03M

Abstract:
1. A time-interleaved AD converter, comprising: M number of first AD (analog to digital) converters ADC a second AD converter ADC (M) with a sampling speed of M×FS [Hz] and a resolution of K2<K1[bit], wherein the time-interleaved AD converter, after commonly connecting together analog input terminals of the first AD (analog to digital) converters ADC generates an output signal y[n] through linear filter operation based on an inner product of vector signals Xv[n]=(x[n], x[n−1], . . . , x[n−(N−1)])′ of an N number of signals as elements with a sample delay of 0, 1, . . . , N−1, respectively, in the x[n], and weight vectors Wv[n]=(w connects the second AD converter ADC (M) so as to have the input terminals in common with the first AD converters ADC creates a residual signal e[n]=d[n]−y[n] by subtracting the output signal y[n] from the instruction signal d[n], and adds a product of the residual signal e[n] multiplied by a gain vector Kv[n] to the current weight vector Wv[n] so as to perform updating to a weight vector Wv[n+M] after M number of samples, and generates the gain vector Kv[n] based on the vector signal Xv[n] by applying adaptation algorithm which operates so as to minimize a root mean square of the residual signal e [n].