Patent ID: 7078292
Filing Date: 2006-07-18
Classification: H01L

Abstract:
1. A method of forming a storage node contact, the method comprising: preparing a semiconductor substrate that includes at least one storage node contact pad in contact with an active region of a memory cell transistor through an insulation layer; forming a bit line capping layer and a bit line on an upper part of the semiconductor substrate; and forming a storage node contact having a lower region and an upper region, a width of the upper region greater than a width of the lower region, a volume of the upper region greater than a volume of the lower region, the lower region in contact with an upper part of the at least one storage node contact pad, the upper region extending in a gate length direction of the memory cell transistor, the storage node contact configured to electrically connect the at least one storage node contact pad wit a storage node, wherein forming the storage node contact includes