Patent ID: 8405212
Filing Date: 2013-03-26
Classification: H01L

Abstract:
1. A semiconductor package, comprising: a substrate, comprising a top surface, a pad and a solder mask, wherein the pad is disposed adjacent to the top surface of the substrate, and the solder mask overlies and directly contacts a part of the pad and defines a first opening so as to expose a remaining part of the pad; at least one chip, mounted on the substrate; a plurality of conductive elements, electrically connecting the chip and the substrate; a conductor, disposed over the pad; and a molding compound, disposed on the top surface of the substrate, wherein the molding compound defines a second opening so as to expose a remaining part of the conductor and a top end of the conductor is recessed below a top surface of the molding compound, and wherein the second opening has a side surface extending from the top surface of the molding compound to the conductor, and the side surface is curved.