Patent ID: 8289258
Filing Date: 2012-10-16
Classification: G09G

Abstract:
1. A display, comprising: a display panel including a first group of data lines and second group of data lines, a plurality of gate lines crossing the first and second groups of data lines, and a plurality of picture cells arranged in a matrix; a first source printed circuit board (PCB) coupled to first data integrated circuits (ICs) to supply a first data voltage to the first group of data lines; a second source PCB coupled to second data ICs to supply a second data voltage to the second group of data lines; a timing controller having an single output port configured to output a video data to both the first and second data ICs, and to output a timing control signal to control both the first and second data ICs; and a first connection cable coupling the single output port of the timing controller to at least one of the first and second source PCBs to transmit the video data and the timing control signal from the timing controller to the at least one of the first and second source PCBs, wherein the first data ICs and second data ICs are configured to generate the first and second data voltages, respectively, based on the video data and the timing control signal, wherein the timing controller is configured to receive an input video data at a first frequency and to output the video data at a second frequency that is substantially higher than the first frequency, and wherein the timing controller includes: