Patent ID: 6960940
Filing Date: 2005-11-01
Classification: G01R,G06F,H03K

Abstract:
1. An integrated circuit comprising: data processing circuitry capable of generating output user data; a tri-state line driver capable of receiving said output user data and, in an active state, driving an output line of said integrated circuit and in a high impedance state, converting said output line to a high impedance; a short-circuit detector capable of detecting a short-circuit condition on said output line and, in response, changing a state of a short status signal generated by said short-circuit detector; and a latch for detecting a state transition of said short status signal and generating a self-clearing reset signal on an output, wherein said reset signal is capable of putting said tri-state line driver in said high impedance state, said latch comprising: a transfer gate capable of passing said short status signal to a first node in said latch when said input transfer gate is enabled; a transition detector capable of detecting a transition of said first node from a first state to a second state, wherein said transition detector, in response to said transition, disables said transfer gate and enables said reset signal; and a feedback loop circuit capable of detecting enabling of said reset signal, wherein said feedback loop circuit, in response to said enabling, changes said first node from said second state back to said first state, and wherein said transition detector, in response to said changing of said first node back to said first state, disables said reset signal.