Patent ID: 6844254
Filing Date: 2005-01-18
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device having a bonding pad electrode of a multi-layer structure, said method comprising: preparing a semiconductor substrate; forming a lower electrode layer on said semiconductor substrate; forming a cover insulating film on said lower electrode layer; forming an opening in said cover insulating film to expose at least a portion of said lower electrode layer, wherein a step portion is provided at a side wall of said opening of said cover insulating film, the size of said opening at the upside portion of a step surface of said step portion is larger than the size of said opening at the downside portion of said step surface; and forming an upper electrode layer on said portion of said lower electrode layer exposed via said opening, wherein said upper electrode layer being made of material having corrosion resistance against substance which is corrosive to said lower electrode layer, and said upper electrode layer overlaps said step surface of said step portion, wherein said forming an opening in said cover insulating film to expose at least a portion of said lower electrode layer comprises: forming a photo resist film having a first opening on said cover insulating film; and isotropically etching said cover insulating film by using said photo resist film as an etching mask, wherein said cover insulating film is side-etched with respect to said first opening of said photo resist film; wherein said forming an upper electrode layer on said portion of said lower electrode layer exposed via said opening is performed by using a lift-off method in which said photo resist film is used as a mask.