Patent ID: 8513058
Filing Date: 2013-08-20
Classification: H01L

Abstract:
1. A method for producing a semiconductor device provided in such a manner that a first layer and a second layer are laminated to ensure that their TSVs are arranged in almost a straight line, comprising: first layer production step comprising steps of preparing a substrate, forming a transistor of an input/output circuit on an upper surface of the substrate, forming an insulation layer so as to contact with and cover the transistor, and forming a TSV (Through Silicon Via) so as to penetrate through the insulation layer; second layer production step comprising steps of preparing a substrate, forming a transistor of a logic circuit on an upper surface of the substrate, forming an insulation layer so as to contact with and cover the transistor, and forming a TSV so as to penetrate through the insulation layer; a connection step of connecting surfaces of the first layer and the second layer on a side opposite to substrates of the first layer and the second layer to ensure that the TSV of the first layer and the TSV of the second layer are arranged in almost a straight line; and a step of removing the substrate of the first layer, wherein at least one of the first and second layer production steps further comprises the step of forming at least one wiring contacting the TSV, and the at least one wiring is smaller in width than the TSV.