Patent ID: 9184127
Filing Date: 2015-11-10
Classification: H01L

Abstract:
1. A semiconductor package comprising: a substrate; a semiconductor element mounted on a surface of the substrate; a dielectric member; a conductive member having a frame shape or ring shape, disposed on the surface of the substrate to which the semiconductor element has been mounted by way of the dielectric member, such that the semiconductor element is exposed from an opening portion of the frame shape or ring shape; a wiring pattern formed on the substrate so as to face the conductive member; a signal wiring layer formed on the semiconductor element; and a terminal formed at the signal wiring layer as either a ground terminal or a power source terminal; wherein the wiring pattern is electrically connected to the terminal formed at the signal wiring layer formed on the semiconductor element; and wherein an electrostatic coupling capacity value between the conductive member and the wiring pattern is not less than an electrostatic coupling capacity value between the conductive member and the signal wiring layer.