Patent ID: 7403964
Filing Date: 2008-07-22
Classification: G06F

Abstract:
1. A Galois field multiplier array for diverse applications, the Galois field multiplier array comprises: first register for storing bits of first operand; second register for storing bits a second operand; third register for storing a generating polynomial corresponding to one of the diverse applications; and a plurality of multiplier cells arranged in a plurality of rows and columns, wherein each of the plurality of multiplier cells outputs a sum and a product, wherein each of the plurality of multiplier cells includes a first input for receiving a preceding cell product value, a second input for receiving at least one bit of the second operand, a third input for receiving a preceding cell sum value, a fourth input for receiving at least one bit of the generating polynomial, and a fifth input for receiving a feedback term from a preceding cell, wherein multiplier cells of the plurality of multiplier cells in a first row of the plurality of rows is initialized based on information contained within the first and second registers, and wherein at least one of the sum outputs and product outputs of multiplier cells of the plurality of multipliers cells in a last row of the plurality of rows provides an output of the Galois field multiplier array for the one of the diverse applications.