Patent ID: 7251712
Filing Date: 2007-07-31
Classification: G11C

Abstract:
1. A semiconductor memory device comprising: an interface for sending and receiving data to and from an outside; at least one buffer for storing said data temporarily; a read only memory section capable of reading the data by a block and comprising a user region having a plurality of user blocks, each of said user blocks composed of a plurality of bits for storing said data from said outside (hereinafter “said outside data”) and a spare region having a plurality of spare blocks, each of said spare blocks composed of a plurality of bits for storing said outside data instead of a defective user block in said user region; substitute information storing means having a plurality of blocks, each of said blocks composed of a plurality of bits for storing substitute information describing a substitution of said spare block for said defective user block; and controlling means for controlling said interface, buffer, read only memory section, and substitute information storing means such that when any of said user blocks becomes defective because of an error produced during writing said outside data in said user region, said outside data is written in one of said spare blocks instead of said defective user block and said substitute information is written in one of the blocks in said substitute information storing means, when said one of said spare blocks becomes unusable during writing said outside data, said outside data is written in another spare block and writing information describing a substitution of the another spare block for the unusable spare block is written in one of said blocks of said substitute information storing means, and when said one of said blocks becomes unusable during writing said substitute information or said writing information in said one of said blocks, said substitute information or said writing information is written in another block of said substitute information storing means.