Patent ID: 6108319
Filing Date: 2000-08-22
Classification: H04B,H04J

Abstract:
A rate alignment apparatus for a satellite comprising:an on-board clock;an input switch;an output switch;a ping-pong buffer pair comprising first and second buffers and connected to said input switch and said output switch, said first and second buffers each receiving a stream of digital baseband symbols recovered from an uplink signal depending on the operation of said input switch and said output switch, said first buffer of said buffer pair receiving bits in said stream in accordance with an uplink clock rate obtained from said uplink signal, said second buffer of said buffer pair substantially simultaneously emptying the stored contents thereof in accordance with said on-board clock, the operations of said first and second buffers being reversed upon actuation of said input switch and said output switch;first and second correlators connected to said first and second buffers, respectively, and operable to generate a spike when a header denoting a frame in said stream of baseband symbols is detected, said buffer pair being operable to continue to write said stream of baseband symbols into one of said buffer pair until said spike occurs, said input switch and said output switch being switched to the reverse states thereof, said first and second buffer receiving said uplink signal being read to the output thereof in accordance with said on-board clock rate;a sychronized pulse oscillator connected to said first and second correlators and operable to generate a smoothed pulse for each of said symbols read to said output; anda counter connected to said oscillator to count said smoothed pulses, a number of bits being added to or removed from said header being read to said output in accordance with the value of said counter.