Patent ID: 6600206
Filing Date: 2003-07-29
Classification: H01L

Abstract:
A high voltage semiconductor device comprising:a high voltage transistor, and a low voltage region surrounding the high voltage transistor and an isolation region disposed between the low voltage region and the high voltage transistor, said high voltage transistor having corner portions at one side thereof with the corner portion facing each other and separated from each other by a portion of the isolation region, the isolation region disposed between the low voltage region and the high voltage transistor for electrically separating the low voltage region from the high voltage transistor, said isolation region comprising a lateral double diffused metal-oxide-semiconductor (LDMOS) transistor for transmitting a signal from the low voltage region to the high voltage transistor, said LDMOS having a drain region disposed between the opposite corner portions of the high voltage transistor region, said LDMOS drain region having a pair of corners with each corner facing an opposing corner of the high voltage transistor and wherein the opposite corners of the high voltage transistor and drain region of the lateral LDMOS transistor are curved to reduce the electric field between the high voltage transistor and the drain of the LDMOS.