Patent ID: 8090894
Filing Date: 2012-01-03
Classification: G06F

Abstract:
1. A controller circuit comprising: an endpoint buffer circuit having a plurality of storage locations configurable as endpoints according to a USB protocol; and a data switching circuit coupled to the endpoint buffer circuit configurable to provide communication paths that enable a first host interface (I/F) and a second host I/F to access at least an individual function I/F of one or more function I/Fs of the controller circuit configured to allow access to at least one predetermined circuit function, and to enable first and second host I/F's to communicate with one another, wherein the communication paths include a first communication path that enables the first host I/F to access at least the individual function I/F without passing through the second host I/F and a second communication path that enables the second host I/F to access at least the individual function I/F without passing through the first host I/F, and wherein the data switching circuit comprises a multiplexer (MUX) and a de-multiplexer (DE-MUX) coupled to the endpoint buffer circuit, the second host I/F and the at least one individual function I/F to selectively provide the communication paths.