Patent ID: 9224765
Filing Date: 2015-12-29
Classification: G02F,H01L

Abstract:
1. A fabricating method of an array structure, comprising: forming a thin film transistor comprising a gate, a source and a drain, wherein the method of forming the thin film transistor comprises: sequentially forming a passivation layer and a pixel electrode material layer, overlaying the thin film transistor; forming a first contacting opening in the pixel electrode material layer and the passivation layer to expose the drain; patterning the pixel electrode material layer to define a pixel electrode; forming a connecting material layer, overlaying the pixel electrode and filling into the first contacting opening; forming a first spacer on the connecting material layer, wherein the first spacer is correspondingly disposed over the first contacting opening; and forming a first connecting layer by using the first spacer as a mask to remove the connecting material layer which is not covered by the first spacer, and the pixel electrode is electrically connected to the drain through the first connecting layer.