Patent ID: 6188102
Filing Date: 2001-02-13
Classification: G11C,H01L

Abstract:
A non-volatile semiconductor memory device having a memory cell and comprising:a semiconductor substrate having a major surface of P type;a drain region of N type and a source region of N type, said drain region and said source region each formed in said major surface of said semiconductor substrate;a channel region formed between said drain region and said source region;a first insulating film on an upper surface of said channel region, and a second insulating film; andat least a first and second floating gate having lower surfaces which contact said first insulating film and upper surfaces which contact said second insulating film;wherein a width of said first floating gate is different from a width of said second floating gate and each of at least a first and a second floating gate is capable of storing one of two data states in accordance with charge stored on each of said first and second floating gates; andwherein said first and second floating gates are disposed side by side in the direction of the channel width.