Patent ID: 6131114
Filing Date: 2000-10-10
Classification: G06F

Abstract:
A system for interchanging data between data processor units referred to as ""agent"" units, the system comprising processor means such as processors which are interconnected by an external multiwire interchange bus common to said units, with bus sharing being orchestrated by an arbitrator, each unit comprising:means for storing, at least temporarily, data which is conserved in organized manner at determined addresses enabling the data to be written and/or read on demand, the assembly formed by said units including data storage means constituting an interchange memory assembly shared amongst said units, common to all of said units, and accessible by all of them via the interchange bus; each unit including a fraction of the storage means of said assembly in the form of an interchange memory which is accessible both by the processor means of the unit and by the processor means of the other unit via the interchange bus;interface means in each unit for the local processor bus and the interchange memory and for the interchange bus, which interface means are interconnected to interchange data between the storage means constituted by the interchange memory of the unit, the processor means of said unit, and the processor means of other units via the interchange bus to which said other units are connected;wherein the interchange system comprises intermediate storage means in each unit, between the interchange memory and the interchange bus, said means being constituted by fast access buffer memories to which the processor of the unit can have access at its own clock rate and to which the other units can have access at the rate of the clock then governing said interchange bus; andwherein each unit includes means for generating a first clock signal for transmission over the interchange bus to the other units, and means for recovering a second clock signal from the interchange bus, in order to produce a third clock signal for use in local operations on data suitable for transmission to said unit from another unit, at the rate of the second clock signal.