Patent ID: 6092124
Filing Date: 2000-07-18
Classification: G06F

Abstract:
A direct memory access (DMA) circuit for use with an input/output device and a system memory, the DMA circuit storing a first reference value pointing to a data structure which describes a buffer portion of the system memory in which data is stored for transfer to the input/output device, a first value, and a second value, wherein the first value determines a position within the buffer portion of the system memory beginning at which a next sequence of data is to be placed, and the second value determines a position within the buffer portion of the system memory beginning at which a next sequence of data is to be copied to the input/output device, wherein the DMA circuit includes:data transfer circuit configured to read data from the buffer portion of the system memory beginning at the position from which the next sequence of data is to be copied and to write the data read to the input/output device; andA state machine configured to respond to a jump instruction read by the data transfer circuit from the buffer portion by causing the DMA circuit to reset the second value.