Patent ID: 7752354
Filing Date: 2010-07-06
Classification: G06F

Abstract:
1. A restart system in a data processing system, said restart system comprising: a cache restart control system controlled by at least one cache, said cache restart control system operably connected to a multiplexer; an override system capable of generating an auxiliary override signal in response to an input signal, said override system operably connected to the multiplexer; an auxiliary restart control system operably connected to the multiplexer; wherein the multiplexer transmits a first signal to a dispatch unit in response to a receipt by the multiplexer of one of a second signal transmitted by the cache restart control system and a third signal transmitted by the auxiliary restart control system, and wherein the multiplexer is configured to transmit only the first signal only if the multiplexer receives the auxiliary override signal, and wherein the first signal comprises the third signal, and further wherein one of the second signal and the third signal is transmitted to the multiplexer in response to a cache miss of the at least one cache caused by an instruction, and still further wherein the multiplexer receives as the multiplexer's inputs only the second signal, the third signal, and the auxiliary override signal; and re-dispatching, by the dispatch unit, the instruction that missed the at least one cache in response to a receipt by the dispatch unit of the first signal.