Patent ID: 7660185
Filing Date: 2010-02-09
Classification: G11C

Abstract:
1. A chip select controller, comprising: a first chip enable signal transfer unit for buffering a first chip enable signal and a second chip enable signal according to a level of a control signal; a second chip enable signal transfer unit for buffering a third chip enable signal and a fourth chip enable signal according to the level of the control signal; a first chip select pad connected to a ground voltage pad or a power supply voltage pad, wherein the first chip select pad is configured to transfer a first chip select signal; a second chip select pad selectively connected to the power supply voltage pad, wherein the second chip select pad is configured to transfer a second chip select signal; a third chip select pad selectively connected to the ground voltage pad, wherein the third chip select pad is configured to transfer the second chip select signal; and a chip select unit for addressing a specific chip according to the first chip select signal and the second chip select signal.