Patent ID: 7496341
Filing Date: 2009-02-24
Classification: H04B

Abstract:
1. A communication system capable of conducting DC-offset mitigation, the system comprising: an input analog-to-digital converter configured to receive an input signal and produce a digital signal from the input signal; and a DC-offset estimation device coupled with the input analog-to-digital converter, the DC offset estimation device being configured to produce a quantized DC-offset estimate and a residual DC off-set estimate based on the digital signal, wherein the input analog-to-digital converter is also configured to receive the quantized DC-offset estimate as a second input and to adjust a DC offset accordingly and wherein if the output of the input analog-to-digital converter contains a residual offset, the residual offset will be adjusted digitally using the residual DC off-set estimate, wherein the input analog-to-digital converter is a pipeline analog-to-digital converter comprising a plurality of analog-to-digital converter stages connected in a pipeline.