Patent ID: 6525417
Filing Date: 2003-02-25
Classification: H01L,Y10S

Abstract:
An integrated circuit having a reduced step height between first and second conductive lines that are laterally spaced apart on an integrated circuit substrate, but that do not overlap on the integrated circuit substrate, the first conductive line being elevated on the integrated circuit substrate relative to the second conductive line to create the step height the integrated circuit comprising:an integrated circuit substrate; a dummy conductive line on the integrated circuit substrate below the second conductive line; and first and second conductive lines on the integrated circuit substrate such that the second conductive line vertically overlaps the dummy conductive line by an amount that is greater than zero but less than one half the width of the second conductive line to further elevate the second conductive line on the integrated circuit substrate and thereby reduce a step height between the first and second conductive lines as compared to an absence of the dummy conductive line.