Patent ID: 8383952
Filing Date: 2013-02-26
Classification: G11C,H01L,H05K,Y10T

Abstract:
1. A layout for a printed circuit, comprising: a first layout for a first layer of the printed circuit, the first layout consisting essentially of a first plurality of features overlying a substrate corresponding to a set of first structures in the printed circuit, each of the first plurality of features overlying the substrate independently consisting essentially of a first print-compatible shape having an orientation that is either orthogonal or parallel to the orientation of every other feature in the first plurality of features; and a second layout for a second, printed layer of the printed circuit, the second layout consisting essentially of a second plurality of features each corresponding to a set of printed structures in the printed circuit, each of the second plurality of features independently consisting essentially of a second print-compatible shape having an orientation that is either orthogonal or parallel to the orientation of every other feature in the second plurality of features and to the orientation of every feature in the first plurality of features; wherein: