Patent ID: 6211013
Filing Date: 2001-04-03
Classification: B82Y,H01L,Y10S

Abstract:
A method for fabricating a single electron transistor on a semiconductor substrate, the method comprising the steps of:forming a first gate insulating film on the semiconductor substrate;implanting impurity ions into source/drain regions of the semiconductor substrate to form source/drain impurity regions;forming a lower gate on the first gate insulating film over a channel region between the source/drain impurity regions;forming a second gate insulating film on the lower gate and the first gate insulating film;forming a third insulating film on the second gate insulating film;selectively removing a portion of the third insulating film over the channel region in a direction perpendicular to a direction between the source/drain impurity regions to define a groove in the third insulating film; andforming an upper gate in the groove of the third insulating film.