Patent ID: 8110501
Filing Date: 2012-02-07
Classification: H01L,Y10S

Abstract:
1. A method of fabricating a landing plug in a semiconductor memory device, comprising: forming a landing plug contact hole on a semiconductor substrate having an impurity region to expose the impurity region; forming a landing plug by filling the landing plug contact hole with a polysilicon layer, wherein the landing plug comprises a first region, a second region, a third region, and a fourth region, with the first region being disposed between the substrate and the second region and having a first doping concentration, the second region being disposed over the first region and under the third region and having a second doping concentration that is higher than the first doping concentration, the third region being disposed over the second region and under the fourth region and having a third doping concentration that is higher than the second doping concentration, and the fourth region being disposed over the third region and not being doped; and annealing the resulting product formed with the landing plug.