Patent ID: 8160859
Filing Date: 2012-04-17
Classification: G06F

Abstract:
1. A computer-readable recording medium storing a logic simulation program, the program allowing a computer to execute: a step that acquires information concerning a predetermined observation point on a simulation target; a step that generates information concerning a jitter detection circuit for determining whether a time variation occurs in a signal passing between a first circuit and a second circuit, the first circuit being arranged at the front stage on the simulation target relative to the predetermined observation point and configured to output a signal with a clock output from a predetermined clock source and the second circuit being arranged at the front stage on the simulation target relative to the predetermined observation point and at the rear stage relative to the first circuit and configured to output a signal with a clock output from a clock source different from the above predetermined clock source; and a step that generates information concerning a constraint circuit that is configured to create a signal to be output at the predetermined observation point using a logical expression of an output signal of the second circuit and output, based on the logical expression and output signal of the jitter detector circuit, a constraint signal constrained by the output signal of the jitter detector circuit and the output signal of the second circuit.