Patent ID: 6707701
Filing Date: 2004-03-16
Classification: G11C

Abstract:
A driving method of a semiconductor memory, comprising:a first step of reading out information stored in a first memory cell and inducing a first electric potential onto a first bit line; a second step of reading out stored information from a first dummy memory cell having a ferroelectric capacitor polarized to a first direction and inducing a second electric potential onto a second bit line; a third step of reading out stored information from a second dummy memory cell having a ferroelectric capacitor polarized to a second direction opposite to said first direction and inducing a third electric potential onto a third bit line; a fourth step of short-circuiting said second and third bit lines by first short-circuit means after said third step; a fifth step of releasing said short-circuited second and third bit lines; and a sixth step of activating a first sense amplifier, comparing an electric potential of said first bit line with an electric potential of said second bit line and outputting an amplified voltage to each of said first and second bit lines in accordance with a result of said comparison.