Patent ID: 6348839
Filing Date: 2002-02-19
Classification: H03B,H03K

Abstract:
A delay circuit for a ring oscillator, comprising:a first electric potential line; a pair of output lines; a pair of first transistors arranged between said first electric potential line and said pair of output lines, respectively; a second electric potential line; and a pair of second transistors arranged between said second electric potential line and said pair of output lines, respectively; wherein gates of said first transistors are connected to said pair of output lines, respectively, said first transistors are connected to each other center-symmetrically, and said second transistors are connected to each other center-symmetrically, wherein said delay circuit further comprises: a third electric potential line, said pair of output lines being connected to said third electric potential line, a pair of third transistors arranged between said pair of output lines and said first electric potential line, and gates of said first transistors are center-symmetrically connected to gates of said third transistors.