Patent ID: 6735142
Filing Date: 2004-05-11
Classification: G11C

Abstract:
A power-up control circuit with a power-saving mode of operation, comprising:a power-up voltage level detection circuit that senses the level of an external supply voltage VDD and that provides a normal power-up level detection output signal NPWRUP when the level of the VDD supply voltage exceeds a predetermined voltage level; a special-command detection circuit that receives a power-saving enable input control signal ZZE and that provides a special-command detection control output signal, said special-command detection circuit has an initialization pulse generator that provides an initialization control pulse signal that a predetermined duration and that is triggered by the trailing edge of an active ZZE signal wherein the special-command detection control output signal is active either when the power-saving enable input control signal ZZE is active or when the initialization control pulse signal is inactive; a combined output driver circuit that receives the normal power-up level detection output signal NPWRUP and the special command output signal and that provides at an output terminal a combined power-up output signal CPWRUP that is normally active when the normal power-up level detection output signal NPWRUP is active and when either the ZZE signal is active or the initialization control pulse signal is inactive.