Patent ID: 9038012
Filing Date: 2015-05-19
Classification: G06F,H03K

Abstract:
1. A method of physically designing a triple redundant state machine on a semiconductor substrate, comprising: obtaining a pipeline semiconductor layout of a single redundant state machine arranged within a plurality of cell rows; splitting the pipeline semiconductor layout into pipeline block layout stripes having a total of a number, N, of the plurality of cell rows by inserting placement stripes into the pipeline semiconductor layout, wherein each of the placement stripes is at least N empty cell rows wherein for each pipeline block layout stripe of the pipeline block layout stripes, two adjacent placement stripes of the placement stripes are designated to the pipeline block layout stripe; for each of the pipeline block layout stripes, inserting a copy of the pipeline block layout stripe into one of the two adjacent placement stripes that are designated to the pipeline block layout stripe and another copy of the pipeline block layout stripe into an other of the two adjacent placement stripes that are designated to the pipeline block layout stripe.