Patent ID: 9197234
Filing Date: 2015-11-24
Classification: H01L,H03M,H04N

Abstract:
1. A readout circuit comprising: a first analog circuit configured to receive an output of a first sub-array of a pixel array, wherein the first analog circuit is configured to output a first analog signal based on the received output of the first sub-array; a second analog circuit configured to receive an output of a second sub-array of the pixel array, wherein the second sub-array comprises at least one pixel on a same row of the pixel array as at least one pixel of the first sub-array, and the second analog circuit is configured to output a second analog signal based on the received output of the second sub-array; and a first digital circuit configured to receive the first analog signal and to convert the first analog signal to a first digital signal, wherein the first digital circuit is further configured to receive the second analog signal and to convert the second analog signal to a second digital signal.