Patent ID: 7087478
Filing Date: 2006-08-08
Classification: H01L,Y10S

Abstract:
1. A method of forming a semiconductor construction, comprising: forming a layer of dielectric material over a semiconductive substrate material; patterning the dielectric material utilizing photolithographic processing to form at least two patterned blocks, a pair of adjacent blocks being separated by a first gap, each block having a sidewall within the first gap formed during the photolithographic processing; forming a pair of spacers along the sidewalls and within the first gap, the spacers having lateral edges separated by a second gap, the second gap being narrower than the first gap; while the spacers remain along the sidewalls, implanting at least one dopant into the semiconductive material within the second gap to form a doped region; removing the spacers from along the sidewalls; after removing the spacers, conformally depositing a layer of polysilicon over the semiconductive material within the gap and along the sidewalls; and after depositing the layer of polysilicon, depositing a metal-comprising material comprising at least one of a metal and a metal nitride within the gap.