Patent ID: 6342407
Filing Date: 2002-01-29
Classification: H01L

Abstract:
A method of forming a sealed electronic circuit package comprising:providing a ceramic chip carrier having a top surface and a cover having a mating surface confronting the top surface of the ceramic chip carrier, forming a seal at the peripheral edge of the ceramic chip carrier between the ceramic chip carrier having a top carrier surface, and the mating surface of the cover by the steps as follows: a) forming a peripheral non-metallic soft frame on the top surface of the chip carrier, the soft frame having a top soft frame surface which faces upwardly, b) providing a cover frame surface on the mating surface of the cover which is exposed downwardly, c) forming a lower adhesion frame over the soft frame hermetically sealed to the ceramic chip carrier, and d) joining the top surface of the lower adhesion frame and the cover frame surface with solder reaching to the top surface of the chip carrier to form a hermetic via-seal between the cover frame surface and the top carrier surface of the ceramic chip carrier.