Patent ID: 8729927
Filing Date: 2014-05-20
Classification: H03K

Abstract:
1. A drive circuit, comprising: an output node configured to be coupled to a load circuit supplied from a first reference voltage node that is configured to receive a first reference voltage; a first transistor having a source-drain path coupled between the output node and an intermediate node; a second transistor having a source-drain path coupled between the intermediate node and a second reference voltage node that is configured to receive a second reference voltage, wherein the second transistor has a gate configured to receive a switching control signal; a current source coupled between a gate of the first transistor and a third reference voltage node that is configured to receive a third reference voltage; and a clamping circuit coupled between the gate and a source of the first transistor, said clamping circuit configured to clamp the gate-to-source voltage of the first transistor when the second transistor is turned on by said switching control signal.