Patent ID: 6594891
Filing Date: 2003-07-22
Classification: H01L,H05K,Y10T

Abstract:
A process of forming a multi-layer electronic structure, said process comprising the steps of:a) providing at least one core including at least one electrically conducting material and at least one electrically insulating material on both sides of the one electrically conducting material, said at least one core including a plurality of plated through holes formed therethrough, and plated with an electrically conducting material; b) providing a cap structure, wherein the cap structure comprises a plane of conducting material and a plurality of electrically conducting sites extending from the plane of conducting material; c) attaching the cap structure to the at least one core, wherein the conducting sites overlap some or all of the plurality of plated through holes of the at least one core; and d) removing a portion of the plane of conducting material to provide a plurality of pads.