Patent ID: 7883739
Filing Date: 2011-02-08
Classification: C23C,H01L,Y10T

Abstract:
1. A method for processing a microelectronic topography, comprising: selectively depositing a second dielectric layer upon a first dielectric layer of the microelectronic topography, wherein the first dielectric is arranged adjacent to and coplanar with a first metal layer of the microelectronic topography, and wherein the second dielectric layer comprises a hydrophobic material selected from a group comprising halogenated silanes and polymeric silanes; exposing the microelectronic topography to deionized water to strengthen the adherence of the second dielectric layer to the first dielectric layer; subsequently selectively depositing a second metal layer upon the first metal layer; and removing the second dielectric layer subsequent to the step of selectively depositing the second metal layer.