Patent ID: 6181151
Filing Date: 2001-01-30
Classification: G01R

Abstract:
An integrated circuit (IC) tester for performing a test on an IC by carrying out test activities at terminals of the IC, wherein the test activities include transmitting test signals to the terminals and sampling IC output signals appearing at the terminals, the IC tester comprising:a plurality of tester channels, each for carrying out test activities at a separate terminal of said IC during said test;a first bus connected to each of said tester channels;a disk drive including a disk for storing data words on the disk and reading data words from the disk, each data word referencing at least one of said test activities to be carried out during said test; andcontroller means for responding to a control signal by signaling said disk drive to read a data word stored on said disk and by transmitting the data word read by said disk drive to said plurality of tester channels via said first bus,wherein each said tester channel comprises:instruction memory means for storing and reading out a sequence of instructions; andinstruction execution means for causing said instruction memory means to read out said sequence of instructions during said test, and for executing each instruction of said sequence of instructions when it is read out of said instruction memory means,wherein said sequence of instructions includes normal cycle mode instructions and serial mode instructions,wherein said instruction execution means executes each of said normal cycle mode instructions during said test by carrying out a test activity referenced by the normal cycle mode instruction, andwherein said instruction execution means executes each of said serial mode instructions during said test by transmitting said control signal to said controller thereby causing said controller to signal said disk drive to read a data word stored on said disk and to transmit that data word via said first bus, by receiving a data word transmitted via said first bus, and by carrying out at least one test activity referenced by the data word it receives via said first bus.