Patent ID: 6501184
Filing Date: 2002-12-31
Classification: H01L

Abstract:
A semiconductor package comprising:a semiconductor chip having a first surface, an opposite second surface, and bond pads at said first surface; an insulative substrate having a first surface, an opposite second surface, a throughhole therebetween, and electrically conductive circuit patterns at the first surface of the substrate, each circuit pattern including a ball land, wherein the semiconductor chip is within the throughhole, the first surface of the semiconductor chip faces a same direction as the first surface of the substrate, and the second surface of the semiconductor chip is in a horizontal plane above a horizontal plane of the second surface of the substrate; electrical conductors each extending over a portion of said throughhole and between the circuit pattern at the first surface of the substrate and one of the bond pads; encapsulation material within said throughhole and covering the first surface of the semiconductor chip, the electrical conductors, and a portion of the first and second surfaces of the substrate around the throughhole, wherein the second surface of the semiconductor chip is exposed; and conductive balls each fused onto one of the ball lands at the first surface of the substrate.