Patent ID: 6017810
Filing Date: 2000-01-25
Classification: H01L

Abstract:
A method for fabricating a semiconductor device which comprises:providing a semiconductor substrate having an insulating layer on said substrate; conductive-forming layer on said insulating layer and isolation regions through said conductive-forming layer, said insulating layer and into said substrate;forming a resist layer on said isolating regions and on said conductive-forming layer;forming an opening through said resist layer having a preselected shape at least over a portion of said conductive-forming layer;partially etching some of the conductive-forming layer through said opening;depositing a conductive material on the etched conductive layer through said opening;planarizing said isolation regions, said conductive-forming layer and said conductive material, including removing said resist layer; andremoving said conductive-forming layer and said insulating layer except for those portions located beneath said conductive material, including exposing portions of said substrate for forming source/drain regions in said substrate.