Patent ID: 6900074
Filing Date: 2005-05-31
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising the steps of: (a) providing a first semiconductor chip having a semiconductor substrate, a first integrated circuit formed on one surface of the semiconductor substrate thereof and electrodes electrically connecting the first integrated circuit, the first integrated circuit having a first function; (b) providing a second semiconductor chip having a semiconductor substrate and a second integrated circuit formed on one surface of the semiconductor substrate thereof and electrodes electrically connecting the second integrated circuit, the second integrated circuit having a second function that is different from the first function; (c) providing a first wiring substrate and a second wiring substrate each having wirings; (d) electrically connecting the electrodes of the first semiconductor chip with the wirings of the first wiring substrate; (e) after step (d), sealing the first semiconductor chip with a first resin sealing body; (f) electrically connecting the electrodes of the second semiconductor chip with the wirings of the second wiring substrate; (g) after step (f), sealing the second semiconductor chip with a second resin sealing body; (h) superimposing the second wiring substrate on the first wiring substrate, and the second semiconductor chip with the second resin sealing body on the first semiconductor chip with the first resin sealing body; and (i) after step (h), electrically connecting the wirings of the first wiring substrate with the wirings of the second wiring substrate; wherein the second semiconductor chip has a memory circuit, wherein the second semiconductor chip has electrodes for control signal terminals of the memory circuit, and the electrodes for control signal terminals of the memory circuit are electrically connected with the electrodes of the first semiconductor chip through the wirings of the first wiring substrate and the wirings of the second wiring substrate, wherein the first integrated circuit of the first semiconductor chip has a function to generate a control signal and output the control signal to the electrodes for control signal terminals of the memory circuit, and wherein the memory circuit of the second semiconductor chip is controlled by the control signal generated by the first integrated circuit.