Patent ID: 6087881
Filing Date: 2000-07-11
Classification: H03K

Abstract:
An integrated circuit chip comprising:a dual voltage level shifter having single dielectric layer devices;at least three bias supply circuits each providing a different bias voltage value for distributing bias voltages among the devices such that dielectric voltage stress across single dielectric layers is reduced; andthe dual voltage level shifter further having;a first voltage level shifting stage coupled to a first one and a second one of the bias supply circuits, for receiving a first input signal having a first voltage level swing and for converting the first voltage level swing to a second voltage level swing for providing a first output signal corresponding to the first input signal and having the second voltage level swing;a second voltage level shifting stage coupled to the second one and a third one of the bias supply circuits, for receiving the first output signal, for converting the second voltage level output signal swing of the first output signal to a third voltage level swing, and for providing a final output signal having the third voltage level swing.