Patent ID: 8956943
Filing Date: 2015-02-17
Classification: H01L

Abstract:
1. A method for manufacturing a non-volatile memory, the method comprising steps of: forming a gate structure on a substrate, wherein the gate structure comprises a gate dielectric layer and a gate conductive layer; removing a part of the gate dielectric layer, and thereby forming a symmetrical opening among the gate conductive layer, the substrate and the gate dielectric layer as well as forming a cavity on two end sides of the gate dielectric layer; forming a first oxide layer on a sidewall and bottom of the gate conductive layer, and forming a second oxide layer on a surface of the substrate isolated from the first oxide layer; forming a nitride material layer covering the gate structure, the first oxide layer, the second oxide layer and the substrate, filling into the opening, and physically contacting with the gate dielectric layer; and performing an etching process to remove a part of the nitride material layer and thereby forming a nitride layer disposed on the sidewall of the gate conductive layer and extending into the opening.