Patent ID: 6323904
Filing Date: 2001-11-27
Classification: H04N

Abstract:
A circuit capable of adopting a number of different configurations, each having a distinct function for use with compressed video signals, comprising:a picture signal input terminal for receiving a picture signal;an information bus input terminal for receiving an information bus signal representing compression coding decisions;an elementary stream input terminal for receiving an elementary stream;a picture signal output terminal;an information bus output terminal;an elementary stream output terminal;a variable length decoder having an elementary stream input, an information bus output and a quantised coefficient strewn output and being connected to receive at the elementary stream input an elementary stream from said elementary stream input terminal;a variable length coder having an information bus input, a quantised coefficient stream input and an elementary stream output and being connected to deliver at the elementary stream output terminal an elementary stream from said elementary stream output;a decoder comprising an inverse quantiser and an inverse transform, the decoder having a quantised coefficient stream input, an information bus input and a picture signal output;a coder comprising a quantiser and a transform, the coder having a picture signal input, an information bus input and a quantised coefficient stream output;a first crosspoint switch capable of routing an information bus signal from the information bus input terminal to the variable length coder, to the decoder and to the coder and of routing an information by signal from the variable length decoder to the decoder; anda second cross point switch capable of routing a picture signal from the picture signal input terminal to the coder and a quantised coefficient stream from the coder to the decoder and the variable length coder,wherein in one configuration, the routing by the first and second crosspoint switches of the information bus signal and the quantised coefficient stream to the decoder enables the circuit to perform decoding functions, andwherein in another configuration, the routing by the first and second crosspoint switches of the information bus signal and the picture signal to the coder enables the circuit to perform coding functions.