Patent ID: 6521937
Filing Date: 2003-02-18
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate; a dielectric interlayer film disposed on the semiconductor substrate; and a plurality of memory cells disposed on the dielectric interlayer film, each memory cell including a capacitor, the capacitors of adjoining memory cells being respectively located in first and second layers, the first layer being farther from the semiconductor substrate than the second layer, the capacitors being arranged so that a first region including a first capacitor in the first layer partially overlaps a second region adjoining the first region and including a second capacitor in the second layer, when viewed in a plane parallel to the semiconductor substrate, each of the capacitors including first and second electrically conductive cell plates separated by respective insulating layers, wherein each of the capacitors in the first layer has a first side insulating film and a second side insulating film, the first side insulating film being farther from the semiconductor substrate than the second side insulating film, the second side insulating film being thicker than the first side insulating film, each of the capacitors in the second layer has a side adjacent the second side insulating film so that a cell plate of the capacitor in the first layer is directly opposite and separated by the second side insulating film from a cell plate of a capacitor in the second layer, and each of the capacitors in the second layer has a cell plate in contact with the dielectric interlayer film.