Patent ID: 9122893
Filing Date: 2015-09-01
Classification: G06F

Abstract:
1. A computer system, wherein the computer system comprises a Trusted Platform Module System (TPMS), and wherein the TPMS comprises: a first Trusted Platform Module (TPM), wherein the first TPM is a hardware module that comprises a first secure cryptographic processor that provides a first set of cryptology services as defined by a first TPM specification; a first index register within the first TPM, wherein the first index register is a hardware register that controls a state of an output from a general purpose input/output (GPIO) pin on the first TPM; a second TPM, wherein the second TPM is a hardware module that comprises a second secure cryptographic processor that provides a second set of cryptology services as defined by a second TPM specification, wherein the second TPM specification is different from the first TPM specification; a toggle input device, wherein the toggle input device causes the state being output from the GPIO pin on the first TPM to switch from a first state to a second state; a physical presence detection device, wherein the physical presence detection device detects a local physical change to the computer system to prove a local physical presence of a user at the computer system, and wherein proof of the local physical presence of the user is required by the toggle input device to change the state, being output from the GPIO pin on the first TPM, from the first state to the second state; a TPM switch for selectively coupling the first TPM or the second TPM to a central processing unit in the computer system, wherein the TPM switch switches a connection between the central processing unit and the first TPM to a connection between the central processing unit and the second TPM in response to the state being output from the GPIO pin on the first TPM changing from the first state to the second state; and a hardware logic gate, wherein inputs to the hardware logic gate are outputs from the first TPM and the second TPM, and wherein an output from the hardware logic gate controls the TPM switch to selectively couple the first TPM or the second TPM to the central processing unit in the computer system.