Patent ID: 7180168
Filing Date: 2007-02-20
Classification: H01L

Abstract:
1. A semiconductor device comprising: a plurality of stacked semiconductor chips having top surfaces and side surface, each of the semiconductor chips having an integrated circuit and electrodes; insulating layers continuously formed from the top surfaces to the side surfaces; first conductive layers formed on the insulating layers above the side surfaces, the first conductive layers arranged in row and columns, each of the rows of the first conductive layers arranged in a width direction of each of the side surfaces, each of the columns of the first conductive layers arranged in thickness direction of the stacked semiconductor chips; and a second conductive layer electrically connecting one of the first conductive layers of one of the semiconductor chips to one of the first conductive layers of another one of the semiconductor chips, the second conductive layer having two portions positioned above two of the side surfaces of two of the semiconductor chips, the two portions positioned on two of the first conductive layers arranged in different rows and different columns, wherein the second conductive layer has a third portion to connect the two portions in order to electrically connect the two of the first conductive layers.