Patent ID: 8793639
Filing Date: 2014-07-29
Classification: G06F

Abstract:
1. A method for creating a combined timing waveform from a max ASCII timing report and a min ASCII timing report for an application specific integrated circuit (ASIC), each timing path in an ASIC being described by max and min timing, the method being performed in a computer, the method comprising: calculating x-y coordinates for a first timing waveform based on data contained in the max ASCII timing report, calculating x-y coordinates for a second timing waveform based on data contained in the min ASCII timing report, shifting the calculated x-y coordinates of the second timing waveform by an adjustment factor, which further comprises iterating an algorithm that determines a clock edge difference between a max capturing clock edge and a min capturing clock edge, the clock edge difference representing the adjustment factor by which the x-y coordinates of the second timing waveform are shifted to align with the x-y coordinates of the first timing waveform, and generating a combined timing waveform with the calculated x-y coordinates of the first timing waveform and the shifted x-y coordinates of the second timing waveform, the combined timing waveform reflecting the behavior of an electrical signal in the ASIC.