Patent ID: 6787901
Filing Date: 2004-09-07
Classification: H01L

Abstract:
An integrated circuit apparatus comprising:a substrate including a plurality of bond fingers that are located in an area surrounding a die area offset from a center of the substrate; a first lower die coupled to the substrate in the die area and having a plurality of pads on its periphery that are electrically coupled to the bond fingers with lower bond wires, the first lower die further including a second row of periphery pads on at least one side; a second lower die coupled to the substrate laterally from the first lower die, the second lower die including pads grouped along a first side closest to the first lower die; bridge bond wires coupling the pads of the second lower die to the second row of periphery pads such that the bridge bond wires span the lower bond wires; and a stacked die electrically coupled, with bond wires, directly to the first lower die and a subset of the plurality of bond fingers.