Patent ID: 6495452
Filing Date: 2002-12-17
Classification: H01L

Abstract:
A method of fabricating a copper damascene structure, on a semiconductor substrate, in which the copper damascene structure is encapsulated by conductive barrier layers, and with a tantalum nitride barrier shape which directly overlays said copper damascene structure, defined using identical photolithographic mask used to define the opening said copper damascene structure, comprising the steps of:depositing a first insulator layer, on an underlying conductive active device region, in said semiconductor substrate, or an underlying metal structure, forming an opening in a positive photoresist layer, via development of a region of said positive photoresist layer, exposed through an opening in a first photolithographic exposure plate; performing a first anisotropic reactive ion etching procedure, using said opening in said positive photoresist layer as a mask, to create a first opening, in said first insulator layer, exposing a portion of the top surface of said underlying conductive active device region, depositing a first conductive barrier layer on the top surface of said first insulator layer, on the sides of said first opening, and on the portion of said underlying conductive active device region, exposed at the bottom of said first opening; depositing a copper layer on said first conductive barrier layer, completely filling said first opening; performing a chemical mechanical polishing procedure, removing the regions of said copper layer, and the regions of said first conductive barrier layer, which overlay the top surface of said first insulator layer, creating a copper damascene structure, in said first opening, with said copper damascene structure partially encapsulated with first conductive barrier shapes; depositing a blanket tantalum nitride layer; applying a negative photoresist layer, using said first photolithographic exposure plate as a mask to expose the portion of said negative photoresist layer, exposed in an opening, in said first photolithographic exposure plate; forming a photoresist shape via development of non-exposed regions of said negative photoresist layer, with said photoresist shape overlying a region of said blanket tantalum nitride layer, which directly overlays partially encapsulated, copper damascene structure; performing a second anisotropic reactive ion etching procedure, to remove regions of said blanket tantalum nitride layer, not protected by said photoresist shape, creating a fully encapsulated, copper damascene structure, comprised with a top surface encapsulated by overlying said tantalum nitride barrier shape, and with said first conductive barrier shapes, located on the sides, and located underlying, said copper damascene structure; depositing a second insulator layer, forming a dual damascene opening in said second insulator layer, exposing a portion of said tantalum nitride barrier shape, located at the bottom of said dual damascene opening, depositing a metal layer, completely filling said dual damascene opening; and patterning of said metal layer to create an upper level metal interconnect structure.