Patent ID: 6784057
Filing Date: 2004-08-31
Classification: H01L

Abstract:
A process for fabricating a semiconductor device comprising first and second semiconductor elements comprising:the step of forming a lower electrode in a region wherein said first semiconductor element is formed within a region wherein said first and second semiconductor elements are formed above a semiconductor substrate; the step of forming a multilayered insulating film which extends from said lower electrode in the region wherein said first semiconductor element is formed to said semiconductor substrate in the region wherein said second semiconductor element is formed; the step of forming a conductive film on said multilayered insulating film so as to extend above the region wherein said first and second semiconductor elements are formed; and the step of forming an upper electrode located on said multilayered insulating film in the region wherein said first semiconductor element is formed and of forming a gate electrode located on said multilayered insulating film in the region wherein said second semiconductor element is formed by partially removing said conductive film through etching.