Patent ID: 6192428
Filing Date: 2001-02-20
Classification: G06F,H04L

Abstract:
A method comprising:detecting data received in a first-in/first-out (FIFO) from one or more devices from a first bus;asserting a request to a bus arbiter that is coupled to a second bus having a plurality of devices coupled thereto to access the second bus for draining data from the FIFO, the bus arbiter receiving one or more other requests from one or more other devices to access the second bus;determining a difference between a location where a receiving unit of data is to be written and a location where a draining unit of data is to be drained in the FIFO;detecting when the difference has reached a predetermined high watermark value by comparing the predetermined high watermark value to the difference;asserting a higher priority request to the bus arbiter to gain access to the second bus over other pending requests, if any, responsive to detecting when the difference has reached the predetermined high watermark value; andrequesting a highest priority to the bus arbiter by a DMA engine to drain the FIFO to the one or more devices coupled to the second bus, the DMA engine being one of an asynchronous and isochronous DMA engines.