Patent ID: 6294408
Filing Date: 2001-09-25
Classification: H01L

Abstract:
A method for assembling an electronic chip assembly, comprising the steps of:(a) providing a substrate having a surface with at least one electronic circuit chip affixed to the surface and at least one connection location on the surface;(b) providing a lid adapted for covering the at least one chip and including an upper sealing member for coupling to the substrate;(c) applying a thermal interface material over a surface of the chip, the thermal interface material having an original thickness greater than a final gap spacing;(d) applying a sealant to at least one of the upper sealing member and the at least one connection location on the surface of the substrate disposed for coupling the upper sealing member to the at least one connection location;(e) applying a first force thereby joining the substrate to the lid, the upper sealing member being coupled to the substrate, the lid covering the chip and contacting the thermal interface material, the thermal interface material being compressed to a final thickness, wherein the first force is within the range of 15 to 100 pounds along a joining direction; and(f) curing the sealant by heating and applying a second force being at most equal to the first force,wherein the final gap spacing comprises a distance between a lower surface of the lid and the top surface of the chip in the electronic chip assembly.