Patent ID: 8664926
Filing Date: 2014-03-04
Classification: H02M

Abstract:
1. A DC-DC converter comprising: a first input-output circuit; first and second capacitors connected in series; a second input-output circuit connected to the first and second capacitors; a switching part, responsive to switching signals comprising: a first switch configured to connect a positive side terminal of the first input-output circuit to a positive terminal of the first capacitor and a positive side terminal of the second input-output circuit; a second switch configured to connect the positive side terminal of the first input-output circuit to a negative terminal of the first capacitor and a positive terminal of the second capacitor; a third switch configured to connect a negative side terminal of the first input-output circuit to the negative terminal of the first capacitor and the positive terminal of the second capacitor; and a fourth switch configured to connect the negative side terminal of the first input-output circuit to a negative terminal of the second capacitor and the negative side terminal of the second input-output circuit; a voltage detector to detect voltages across the first and second capacitors and a voltage through the first and second capacitors; and a control circuit part configured to generate the switching signals control on the basis of the voltage through the first and second capacitors, and to calculate a difference between the voltages across first and second capacitors, wherein the control circuit part controls a pulse duration in one of the switching signals to control the duty ratios of the switching durations to generate a current flowing in series through the first and second capacitor and to decrease the difference between the voltage of the first capacitor and the voltage of the second capacitor, wherein, when the voltage of the first capacitor is greater than the voltage of the second capacitor, the control circuit part is configured to advance the pulse for the second switch and delay the pulse for the third switch, and wherein, when the voltage of the first capacitor is not greater than the voltage of the second capacitor, the control circuit part is configured to delay the pulse for the second switch and advance the pulse for the third switch.