Patent ID: 6762488
Filing Date: 2004-07-13
Classification: H01L

Abstract:
A stacked package semiconductor device comprising:a semiconductor chip package including a sealing package made of a certain material and a semiconductor chip made or a semiconductor material brittler than said certain material, provided with a first group of conductive pads on a first surface thereof, sealed in said sealing package and having a second surface reverse to said first surface and exposed to the outside of said sealing package; a semiconductor element provided over said semiconductor chip and having a second group of conductive pads on a certain surface thereof; a connector electrically connected between certain conductive pads selected from said first group and corresponding conductive pads of said second group, and buried in a piece of synthetic resin held in contact with said semiconductor chip package and said semiconductor element; a package in which said semiconductor chip package, said semiconductor element and said connector are sealed; and an array of external terminals electrically connected to remaining conductive pads of said first group and remaining conductive pads of said second group.