Patent ID: 6401151
Filing Date: 2002-06-04
Classification: G06F

Abstract:
A method for configuring a bus architecture under software control to selectively switch a plurality of peripheral devices between a plurality of buses using switching circuitry, the plurality of peripheral devices including a first peripheral device and a second peripheral device, the plurality of buses including a first bus and a second bus, wherein the first bus is a shared bus coupled to more than one peripheral device and the second bus is a high-speed bus coupled to at most one peripheral device, the method comprising:receiving configuration information in a configuration register, the configuration information specifying connections between the plurality of peripheral devices and the plurality of buses; tracking a usage of the first peripheral device and the second peripheral device; determining which one of the first peripheral device and the second peripheral device is most active; writing configuration information to the configuration register to cause the most active peripheral device to be coupled to the second bus so that the most active peripheral device has exclusive access to the second bus; if the configuration information specifies a first configuration, configuring the switching circuitry so that the first peripheral device communicates with the first bus and the second peripheral device communicates with the second bus; and if the configuration information specifies a second configuration, configuring the switching circuitry so that the first peripheral device communicates with the second bus and the second peripheral device communicates with the first bus.