Patent ID: 7300837
Filing Date: 2007-11-27
Classification: H01L

Abstract:
1. A FinFET transistor device comprising: a semiconductor on insulator substrate comprising: a bottom layer of silicon or silicon germanium, a buried oxide layer disposed upon the bottom silicon layer; at least two fins formed spaced apart upon the buried oxide layer, wherein each of the at least two fins have an associated top wall, and two associated side walls; an epitaxial layer formed over and upon each of the at least two fins to form at least two source regions, wherein the at least two source regions are interconnected by said epitaxial layer bridging between said at least two fins and said at least two source regions to form a source pad; and, an epitaxial layer formed over and upon each of the at least two fins to form at least two drain regions, wherein the at least two drain regions are interconnected by said epitaxial layer bridging between said at least two fins to form a drain pad.