Patent ID: 6297098
Filing Date: 2001-10-02
Classification: H01L

Abstract:
An optimum implant angle method of forming a DDD (Doubly Doped Drain) in a stacked flash memory cell comprising the steps of:providing a silicon substrate having a plurality of active and field regions defined;forming a gate oxide layer over said substrate;forming a floating gate over said thick gate oxide layer;forming an inter-gate oxide layer over said floating gate;forming a stacked control gate over said inter-gate oxide;forming oxide spacers on sidewalls of said stacked gate;performing a first lightly doped implantation with an optimum tilt-angle between about 40 to 50 degrees once from the right and once from the left with respect to the sidewalls of said stacked gate; and thenperforming a second heavily doped implantation with said optimum tilt-angle once from the right and once from the left with respect to the sidewalls of said stacked gate.