Patent ID: 7324028
Filing Date: 2008-01-29
Classification: H03M

Abstract:
1. A data conversion circuit comprising: a delta-sigma modulator for generating a discrete-time output sequence, wherein the delta-sigma modulator comprises a continuous-time loop filter comprising at least two integrator circuits and a switching circuit configured for selectively bypassing at least one of the integrator circuits, the switching circuit bypasses at least one of the integrator circuits during calibration such that the delta-sigma modulator has a lower order continuous-time loop filter and restores at least one of the bypassed integrator circuits after calibration such that the delta-sigma modulator has a higher order continuous-time loop filter, and the delta-sigma modulator is configured to receive a calibration signal and a continuous-time input signal; an estimator circuit configured to generate an error signal based on the calibration signal and the discrete-time output sequence; and a controller circuit configured to adjust at least one time constant of the integrator circuits based on the error signal.