Patent ID: 6049250
Filing Date: 2000-04-11
Classification: H03F

Abstract:
A distributed amplifier topology comprising:an input terminal;one or more input transmission lines coupled to said input terminal;an output terminal;one or more output transmission lines coupled to said output terminal;one or more amplifier stages coupled between said one or more input transmission lines and said one or more output transmission lines; each amplifier stage including at least one field effect type transistor having gate, drain and source terminals, said field effect type transistor connected in a common source configuration, each amplifier stage further including a capacitor coupled to said gate of said field effect type transistor, said capacitor configured to form a voltage divider with the gate to source capacitance of said field effect transistor in order to reduce the gain of the amplifier stage, at least one amplifier stage including a negative feedback network;means for biasing a plurality of said distributed amplifier stages, said biasing means coupled to said gate terminal and said capacitor;an input line termination impedance coupled to said input transmission line; andan output line termination impedance coupled to said output transmission line.