Patent ID: 6304203
Filing Date: 2001-10-16
Classification: H03M

Abstract:
A successive approximation AD converter in which an analog signal is successively compared with a reference voltage by a comparator to be converted into a digital signal, said converter comprising:a reference voltage generating circuit which generates plural reference voltages including first and second reference voltages;a switch which switches the plural reference voltages either to be supplied to an input node of said comparator or not to be supplied to said input node;a capacitor group consisting of an n (n is a natural number which is equal to or larger than 2) number of capacitors;a switch group consisting of an n number of switches which selectively connect said n number of capacitors in parallel to said input node of said comparator; anda control circuit which controls on/off operations of said switch and said n number of switches,wherein, in accordance with a result of the comparison by said comparator, said control circuit causes plural intermediate reference voltages to be generated at said input node of said comparator, and said comparator successively compares each of the intermediate reference voltages with the analog signal, the intermediate reference voltages being obtained by dividing the first and second reference voltages.