Patent ID: 6408351
Filing Date: 2002-06-18
Classification: G06F,Y02D

Abstract:
A computer system comprising:a computer including a microprocessor, memory and a bus host controller; a bus operatively connected to said computer, said bus being controlled by the bus host controller; and a codec apparatus operatively connected to said computer via said bus, said codec apparatus being completely powered by said bus, wherein said bus is a serial bus, said codec apparatus is a codec modem, and said codec modem comprises a codec for performing analog-to-digital conversions on incoming signals and digital-to-analog conversions on outgoing signals; a hybrid circuit, said hybrid circuit couples the outgoing signals to a transmission medium and couples incoming signals to the transmission medium; wherein the serial bus is a USB bus and said codec modem further comprises: a USB bus interface coupled between the USB bus and said codec and said USB bus interface comprises: a USB peripheral bus interface that couples to the USB bus and interacts with the serial bus host controller to transmit data packets between said computer and said codec modem; a transmit buffer that temporarily stores data to be transmitted by said codec modem over the transmission medium; a receiver buffer that temporarily stores data received by said codec modem over the transmission medium; a buffer management and control unit, said buffer management and control unit operates to manages said transmit buffer and said receive buffer and to control overall operation of said USB bus interface; a power manager, said power manager manages the power consumption of said modem codec based on a mode of the USB bus; and a remote wakeup unit, said remote wakeup unit monitors external signals and notifies said buffer management and control logic unit at least when a wakeup of the USB bus and/or said modem codec is needed.