Patent ID: 9059739
Filing Date: 2015-06-16
Classification: H03M,H04L

Abstract:
1. An encoding assembly implemented by an electrical circuit or by a processor accessing a computer readable storage medium storing instructions executable by the processor to implement is coding circuit to establish a systematic encoder for a code C to encode data prior to transmission of the data to ameliorate the effects of noise, wherein the code C is an affine subspace of a range space of a transform G, the transform G having a form P(F 1 {circumflex over (x)}G 1 )Q , wherein P is a row-permuter, F 1 is a first kernel transform, G 1 is a first-tier transform, Q is a column permuter, the row permuter is a permutation matrix, the column permuter is a permutation matrix, the first kernel transform F 1 having a size greater than one, the first-tier transform having a size smaller than a size of the transform G wherein the coding circuit being configured to: derive from an input data word d a plurality of first-tier data words d for each i from 1 to k, carry out systematic encoding of the i th first-tier data word d combine the plurality o f first-tier code words x a transmitter for receiving the code word x from the coding circut for transmitting the code word x to a receiver system.