Patent ID: 7002223
Filing Date: 2006-02-21
Classification: H01L

Abstract:
1. A semiconductor device comprising: an active region defined at a predetermined region of a semiconductor substrate; a gate electrode crossing over the active region; first and second insulating layer patterns which are sequentially stacked on sidewalls of the gate electrode, respectively, the first and second insulating patterns each having a vertical surface and a horizontal surface, the vertical surface substantially vertical to the horizontal surface; an epitaxial layer formed on the active region to be adjacent to the first and second insulating layer patterns, the epitaxial layer having an edge that contacts an edge of the second insulating layer patterns, wherein an edge of the first insulating layer pattern adjacent to the epitaxial layer is protruded from the edge of the second insulating layer pattern to be covered with the epitaxial layer, and wherein a predetermined region of the epitaxial layer is silicided; and an impurity region formed in the active region adjacent the gate electrode, the impurity region including a lightly doped diffusion region and a heavily doped diffusion region, the heavily doped diffusion region deeply formed below the epitaxial layer and shallowly formed below the first and second insulating layer patterns.