Patent ID: 6728666
Filing Date: 2004-04-27
Classification: G06F,G06N,Y10S

Abstract:
An evolvable circuit comprising:a) a plurality of transistors having terminals, the transistors coupled between a power source terminal and a power sink terminal in a topology capable of admitting power between the power source terminal and the power sink terminal; and b) a reconfigurable means responsive to a chromosome pattern for selectively controlling the coupling of the plurality of transistors, the reconfigurable means coupling each transistor of the plurality of transistors to at least one other of the plurality of transistors, the reconfigurable means coupling the plurality of transistors so that a permutation of switch states of the reconfigurable means provides a set of transistor-to-transistor circuit connections for a selected topology, the reconfigurable means providing less than a total number of possible transistor terminal to transistor terminal couplings.