Patent ID: 8750438
Filing Date: 2014-06-10
Classification: H03M

Abstract:
1. A circuit for sampling a signal comprising: an attenuator configured to receive a chipping sequence and an attenuation value, the attenuator attenuating the chipping sequence based on the attenuation value to output a corresponding mixing sequence; a mixer configured to receive a data signal and modulate the data signal according to the mixing sequence, the mixer generating a modulated data signal; an integrator configured to receive the modulated data signal and generate a filtered modulated data signal; and a sample-and-hold circuit configured to sample the filtered modulated data signal; wherein the attenuator value is generated to attenuate the chipping sequence such that the mixing sequence enables the mixer to cancel interference in the data signal at the analog front end, before analog to digital conversion has incorporated interfering signal power into the signal of interest; and wherein the attenuator value is generated based on information relating to one or more of a signal of interest contained within the data signal, anticipated noise within the data signal, and anticipated interference within the data signal to compose a compressive measurement operator that is consistent with compressive sampling theory of operation.