Patent ID: 7855116
Filing Date: 2010-12-21
Classification: H01L

Abstract:
1. A manufacturing method of a nonvolatile semiconductor memory device comprising: forming element isolation trenches in a surface portion of a substrate to isolate a nonvolatile memory cell portion, a low-voltage operating circuit portion of a peripheral circuit region and a high-voltage operating circuit portion of the peripheral circuit region from one another, filling an insulating film having fluidity into the element isolation trenches to form filling insulating films and setting an upper surface of the filling insulating film to a preset height portion higher than a surface of the substrate, setting the upper surfaces of the filling insulating film in the memory cell portion and the filling insulating film in the low-voltage operating circuit portion to a portion lower than the upper portion of the filling insulating film in the high-voltage operating circuit portion by simultaneously etching back the filling insulating film in the memory cell portion and the filling insulating film in the low-voltage operating circuit portion, and setting the upper surface of at least part of the filling insulating film in the low-voltage operating circuit portion to a portion lower than the upper surface of the filling insulating film in the memory cell portion and lower than the surface of the substrate by etching back at least part of the filling insulating film in the low-voltage operating circuit portion.