Patent ID: 7256086
Filing Date: 2007-08-14
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising a trench provided in a semiconductor substrate of a first conductivity type; a source region of a second conductivity type formed in the substrate surface region, outside said trench; a base region of the first conductivity type formed below said source region, outside said trench; a drift region of the second conductivity type formed below said base region along the side portions of said trench, outside said trench; a drain region of the second conductivity type formed in the bottom portion of said trench; a gate insulating film formed inside said trench along the side portions and bottom portion of said trench; a first conductor formed on the inside of said gate insulating film; and a second conductor formed on the inside of said first conductor via an interlayer insulating film, and electrically connected to said drain region, wherein, in an active region of said device, the gate insulating film on the bottom surface of said trench extends from the side wall of said trench to said second conductor and contacts said second conductor, and wherein the gate insulating on the bottom surface of said trench becomes thicker, as measured in the direction of the depth of the trench from the side wall of said trench or said first conductor toward said second conductor, the method comprising the steps of: forming the trench in the surface region of the semiconductor substrate; forming the drift region around the periphery of said trench; forming a nitride film inside said trench and on the substrate surface; removing, in at least a region corresponding to the active region, part of said nitride film covering the bottom portion of said trench; performing selective oxidation with said nitride film serving as a mask; forming the gate insulating film inside said trench along the bottom and side portions of said trench; forming the first conductor along the surface of said gate insulating film; etching back said first conductor in the region corresponding to the active region such that said first conductor remains only on the lateral surfaces of said trench; forming the base region and the source region in the substrate surface region, outside said trench; forming the interlayer insulating film on the inner side of said first conductor; selectively removing the bottom portion of said interlayer insulating film and said gate insulating film in the region corresponding to the active region; forming the drain region on the bottom portion of said trench; and providing the second conductor inside said trench, electrically connecting said second conductor to said drain region.