Patent ID: 6282198
Filing Date: 2001-08-28
Classification: H04L

Abstract:
A frequency band control device for use in an ATM circuit, wherein a plurality of channels share a single frequency band on a frequency band division basis, comprising:a plurality of input buffers for storing cells, each buffer assigned to a different one of the plurality of channels for storing a cell from the channel to which the buffer is assigned, wherein during each of consecutive time slots, each buffer that stores at least one cell produces a respective corresponding send request signal,a priority order assigning circuit interconnected to said plurality of input buffers, said priority order assigning circuit, during each of the consecutive time slots,receiving the produced send request signals, andassigning a priority order to the received send request signals, the priority order being defined by an ordering of the buffers that produced the received send request signals; anda cell conflict controller interconnected to said order assigning circuit, said cell conflict controller, during each of the consecutive time slots,selecting the one of the send request signals highest in the priority order, andthen sending an acknowledge signal to the buffer that produced the selected one send request signal;wherein, in response to receipt of the acknowledge signal, the buffer receiving the acknowledge signal sends out a cell stored therein, whereby the plurality of input buffers send out the cells which they store during the consecutive time slots in response to the acknowledge signals.