Patent ID: 6407573
Filing Date: 2002-06-18
Classification: G01R,H01L

Abstract:
An insulated gate transistor characteristic evaluation device using at least two insulated gate transistors differing from each other only in mask channel length and including a first insulated gate transistor having a longer channel length and a second insulated gate transistor having a shorter channel length, said insulated gate transistor characteristic evaluation device for evaluating a characteristic of said second insulated gate transistor using a characteristic of said first insulated gate transistor as a reference, said insulated gate transistor characteristic evaluation device comprising:threshold voltage estimation means for extracting a threshold voltage for said first insulated gate transistor to estimate a threshold voltage for said second insulated gate transistor to define the estimated value as a first estimated value; extraction means for extracting a hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when first and second gate overdrives are slightly changed, based on a characteristic curve drawn in an X-Y plane with said mask channel length measured on an X-axis and said total drain-to-source resistance measured on a Y-axis, said characteristic curve indicating the relationship between said mask channel length of said first and second insulated gate transistors and said total drain-to-source resistance, the value of said mask channel length and the value of said total drain-to-source resistance at said hypothetical point being defined as second and third estimated values, respectively, said extraction means also extracting the slope of said characteristic curve at said hypothetical points to define the value of the slope as a fourth estimated value, said first gate overdrive being defined as the difference between the gate voltage of said first insulated gate transistor and the extracted threshold voltage of said first insulated gate transistor, said second gate overdrive being defined as the difference between the gate voltage of said first and second insulated gate transistors and said first estimated value; threshold voltage determination means for determining optimum second to fourth estimated values that are respective ones of said second to fourth estimated values which satisfy that the amount of change in said third estimated value equals the product of the amount of change in said second estimated value and said fourth estimated value when said first and second gate overdrives are slightly changed, to determine an optimum first estimated value associated with said optimum second to fourth estimated values, thereby to determine a true threshold voltage of said second insulated gate transistor based on said optimum first estimated value; and channel length reduction determination means for determining the difference between said mask channel length and an effective channel length, and a series resistance, based on said true threshold voltage.