Patent ID: 6489828
Filing Date: 2002-12-03
Classification: H03K

Abstract:
A level shifting circuit comprising:a circuit input that swings between a low supply and ground; a circuit output that swings between a high supply and said ground; an inverter with input connected to said circuit input and output forming inverted circuit input; a first NMOS transistor with gate is connected to said circuit input and with source connected to said ground; a first PMOS transistor with gate connected to said circuit output, with source connected to said high supply, and with drain connected to said first NMOS transistor drain; a second NMOS transistor with gate connected to said inverted circuit input, with source connected to said ground, and with drain connected to said circuit output; a second PMOS transistor with gate connected to said first NMOS transistor drain, with source connected to said high supply, and with drain connected to said circuit output; a transistion pulse circuit with output wherein said output is ground at steady state and wherein said output pulses to said low supply for a short duration when said circuit input changes state; and a third NMOS transistor with gate connected to said output of said transition pulse circuit, with source connected to said circuit output, and with drain connected to said first NMOS transistor drain.