Patent ID: 6359309
Filing Date: 2002-03-19
Classification: H01L

Abstract:
An N channel MOSFET having low on resistance and a high breakdown voltage, comprising:a high resistance body of Nâˆ’ epitaxial silicon atop a N+ drain in the form of an N+ silicon substrate; a layer of gate insulation on a top surface of said high resistance body of Nâˆ’ epitaxial silicon; a polysilicon gate on said layer of gate insulation; a P type channel region extending downward from said top surface, vertically partially overlapping said polysilicon gate; two N+ source regions, disposed within said P channel region; ohmic contacts to said source and gate; a metallic layer on said N+ drain from a back side of said N+ silicon substrate; a shunt region of N type silicon in contact with, and extending upward from, said N+ drain, through said high resistance body of Nâˆ’ epitaxial silicon and terminating at a distance from said upper surface and underlying said polysilicon gate and not contacting said P type channel region; and wherein said distance is between about 0.5 and 5 microns.