Patent ID: 6841394
Filing Date: 2005-01-11
Classification: G11C

Abstract:
1. A method for fabricating a nonvolatile ferroelectric memory device, the method comprising: defining a first active region and a second active region on a semiconductor substrate; forming a first split wordline across the first active region and a second split wordline across the second active region; forming first and second source and drain regions in the first and second active regions, respectively, wherein the source and drain regions are at opposite sides of the first and second split wordlines; forming an insulating layer on an entire surface including first and second split word lines and the first and second active regions; forming contact holes by selectively removing the insulating layer, wherein the contact holes includes first contact holes exposing the first and second drain regions and second contact holes exposing the first and second source regions; forming first plugs coupled to the first and second drain regions through the first contact holes; forming second plugs coupled to the first and second source regions through the second contact holes; respectively forming first electrodes of first and second ferroelectric capacitors over the second and first split wordlines; forming ferroelectric layers on the first electrodes; respectively forming second electrodes of the first and second ferroelectric capacitors on surfaces of the ferroelectric layers; forming a conductive material layer on an entire surface including the second electrodes of the first and second ferroelectric capacitors; respectively forming conductive layers by selectively removing the conductive material layer, wherein that the conductive layers couple the second plugs with the second electrodes of the first and second ferroelectric capacitors; and forming first and second bitlines across the first and second split wordlines, wherein the first and second bitlines are coupled to the first and second drain regions through the first plugs.