Patent ID: 6261900
Filing Date: 2001-07-17
Classification: H01L

Abstract:
A method for fabricating a DRAM capacitor, comprising the steps of:(a) providing a semiconductor substrate having a transistor and a bit line;(b) forming a lower insulating layer covering the transistor and the bit line, an etching stop layer, and an upper insulating layer;(c) forming a photoresist layer having an opening on the upper insulating layer;(d) forming a bowl-shaped opening by etching the upper insulating layer by the pattern of the opening in the photoresist layer;(e) forming a contact window by dry etching the etching stop layer and the lower insulating layer by the pattern of the bowl-shaped opening and the opening in the photoresist layer;(f) removing the photoresist layer;(g) forming a first conducting layer on the upper insulating layer and filling the contact window; and(h) forming a bowl-shaped capacitor by forming a dielectric layer and a second conducting layer on the first conducting layer.