Patent ID: 7205234
Filing Date: 2007-04-17
Classification: H01L

Abstract:
1. A method of forming metal silicide on regions of a metal oxide semiconductor field effect transistor (MOSFET) device, comprising the steps of: providing a MOSFET device on a semiconductor substrate comprised with a conductive gate structure on an underlying gate insulator layer and with a heavily doped source/drain region located in an area of said semiconductor substrate not covered by said conductive gate; forming an interlayer material on said MOSFET device having a thickness less than 15 Angstroms; forming a metal layer on said interlayer material; performing an anneal procedure to form said metal silicide on said heavily doped source/drain region and on top surface of said conductive gate structure, while forming a layer comprised of said metal layer and said interlayer material on insulator spacers located on sides of said conductive structure; and removing said layer comprised of said metal layer and said interlayer material from insulator spacers.