Patent ID: 6391210
Filing Date: 2002-05-21
Classification: H05K

Abstract:
A process for developing a commercial multi-layer circuit board, the process comprising the steps of:(a) making a prototype multi-layer circuit board, said prototype multi-layer circuit board having a structure comprising a substrate having a top side and a bottom side, a first-level circuitry pattern on at least one of said sides, a layer of permanent photoimageable dielectric material over said first-level circuitry pattern, a layer of conductive metal having a second-level circuitry pattern over said layer of permanent dielectric material, and vias in said layer of permanent dielectric material, said vias containing conductive material that electrically connects said second-level circuitry pattern with said first-level circuitry pattern, by a method comprising, in order, the steps of: (i) applying said layer of permanent photoimageable dielectric material over said first-level circuitry pattern, (ii) blanket exposing said layer of permanent photoimageable dielectric material to radiation, (iii) laminating said layer of conductive metal to said layer of dielectric material, (iv) making holes in said layer of conductive metal to uncover portions of said dielectric material and making holes in said layer of permanent dielectric material to uncover portions of said first-level circuitry pattern by a method selected from the group consisting of laser ablation, plasma ablation, and mechanical drilling, and (v) making said second-level circuitry pattern on said layer of dielectric material including placing said conductive material in said holes and forming said vias; (b) evaluating said prototype; and (c) making the commercial multi-layer circuit board, said commercial multi-layer circuit board having a structure and materials of construction identical to said prototype multi-layer circuit board, by a method comprising, in order, the steps of: (i) applying a layer of said permanent photoimageable dielectric material over said first-level circuitry pattern, (ii) pattern exposing said layer of permanent photoimageable dielectric material to radiation and forming a pattern for said holes, (iii) developing away unexposed regions of said layer of permanent photoimageable dielectric material and forming said holes, (iv) curing said layer of permanent photoimageable dielectric material, (v) roughening the surface of said layer of permanent photoimageable dielectric material, (vi) plating a layer of said conductive metal onto said layer of permanent dielectric material, and (vii) etching said layer of conductive material and forming said second-level circuitry pattern.