Patent ID: 9082634
Filing Date: 2015-07-14
Classification: H01L

Abstract:
1. A stack package comprising: a cover film; a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and the first semiconductor chip, and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member; and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern, wherein the first adhesive member seals only one side of the surface of the cover film, wherein the cover film consists of an insulation material, and wherein the first and second semiconductor chips have first and second bumps, respectively, the first semiconductor chip is electrically connected to one face of the first circuit patterns using the first bump and the second semiconductor chip is electrically connected to the other face of the first circuit patterns using the second bump.