Patent ID: 7791064
Filing Date: 2010-09-07
Classification: H01L,Y10S

Abstract:
1. A semiconductor device, comprising: a silicon substrate including a channel region therein; a gate electrode formed on said silicon substrate via a gate insulation film in correspondence to said channel, said gate electrode carrying a pair of sidewall insulation films on respective, mutually opposing sidewall surfaces thereof; source and drain extension regions of a p-type diffusion region formed in said silicon substrate at both lateral sides of said gate electrode so as to oppose with each other across said channel region; source and drain regions of a p-type diffusion region formed in said silicon substrate at respective outer sides of said sidewall insulation films respectively in continuation to said source and drain extension regions; and a pair of SiGe mixed crystal regions formed in said silicon substrate at respective outer sides of said sidewall insulation films in epitaxial relationship to said silicon substrate, said SiGe mixed crystal regions being formed so as to be included by said source and drain regions respectively; each of said SiGe mixed crystal regions being grown to a height beyond a gate insulation film interface formed between said gate insulation film and said silicon substrate, said SiGe mixed crystal regions being defined by respective sidewall surfaces facing with each other, wherein, in each of said SiGe mixed crystal regions, said sidewall surface is defined by a plurality of facets forming respective, mutually different angles with respect to a principal surface of said silicon substrate, wherein said semiconductor device further comprises a p-type Si layer on each of said SiGe mixed crystal regions, a silicide layer being formed in said p-type Si layer.