Patent ID: 9053274
Filing Date: 2015-06-09
Classification: G06F

Abstract:
1. A method comprising: executing, using a processor, a design synthesis process on a representation of an integrated circuit design to obtain a netlist for the integrated circuit design; performing a retiming operation on the netlist of the integrated circuit design based on a plurality of retiming commands in a script file, wherein each of the plurality of retiming commands is associated with a different optimization of the netlist, and wherein each different optimization of the netlist is selected from a group consisting of handling of register power-up conditions, modifying asynchronous signals in registers, avoiding the creation of bad behavior in the integrated circuit design due to metastability, avoiding bad behavior in the integrated circuit design by retiming between unrelated clock domains, prohibiting user-specified types of retiming, creating options to prohibit user-specified types of retiming in the netlist, and inferring don't touch conditions on specific types of registers.