Patent ID: 8054111
Filing Date: 2011-11-08
Classification: G09G,H01L,H03K

Abstract:
1. A semiconductor device comprising: a first transistor; a second transistor; a first inverter and a second inverter; a first power source applying a first potential; a second power source applying a second potential; a first circuit; a second circuit; and a first pixel including a first display element and a second pixel including a second display element, wherein each of the first and second inverters comprising: a third transistor; and a fourth transistor, wherein one of a source and a drain of the second transistor is electrically connected to the second power source, wherein the other of the source and the drain of the second transistor is electrically connected to each of the first and second inverters, wherein one of a source and a drain of the first transistor is electrically connected to the first power source, wherein the other of the source and the drain of the first transistor is electrically connected to each of the first and second inverters, wherein the first transistor is electrically connected to the second transistor through at least one of the first and second inverters, wherein a gate of the first transistor is electrically connected to the second circuit, wherein a gate of the second transistor is electrically connected to the first circuit, wherein the first inverter is electrically connected to the first pixel, and wherein the second inverter is electrically connected to the second pixel.