Patent ID: 8105950
Filing Date: 2012-01-31
Classification: H01L

Abstract:
1. A method for forming fine patterns in a semiconductor device, the method comprising: forming a first hard mask layer and a second hard mask layer over an etch target layer; forming a first anti-reflection layer over the second hard mask layer; forming first mask patterns over the first anti-reflection layer; first etching the first anti-reflection layer and the second hard mask layer using the first mask patterns as an etch mask, wherein the etching profile of the second hard mask layer has a positive slope; removing the first mask patterns and the first anti-reflection layer; forming a second anti-reflection layer over the resultant structure where the first mask patterns and the first anti-reflection layer are remove; forming second mask patterns over the second anti-reflection layer, wherein openings of the second mask patterns are not overlapped with openings of the first mask patterns; second etching the second anti-reflection layer and the first etched second hard mask layer using the second mask patterns as an etch mask, wherein the etching profile of the second hard mask layer has positive slope; removing the second mask patterns and the second anti-reflection layer; and etching the first hard mask layer and the etch target layer using the second etched second hard mask layer as an etch mask.