Patent ID: 6081572
Filing Date: 2000-06-27
Classification: H03D,H03L

Abstract:
A lock-in aid circuit for generating a signal for use in locking a second signal on a first signal, each of the first and second signals having an associated frequency, a first beat note signal and a second beat note signal being generated from the first and second signals, respectively, when the frequencies of the first and second signals are not equal, the circuit comprising:a first flip-flop configured to receive the first and second beat note signals for generating a first state signal, the first flip-flop generating the first state signal by sampling the second beat note signal at a first periodic interval of the first beat note signal;a second flip-flop configured to receive the first and second beat note signals for generating a second state signal, the second flip-flop generating the second state signal by sampling the second beat note signal at a second periodic interval of the first beat note signal; anddetector circuitry coupled to receive the first and second state signals from the first and second flip-flops for detecting a polarity of the frequency difference between the first and second signals, the polarity of the frequency difference being defined in a tri-state having a positive state, a negative state, and a zero state.