Patent ID: 6973544
Filing Date: 2005-12-06
Classification: G06F

Abstract:
1. A method for maintaining cache coherence in a multiprocessor system having a plurality of nodes, each node having at least one cache, a memory device local to the node, and at least one processor device, the method comprising: storing information regarding the state of data exclusively in an interconnect communicatively connecting said nodes with one another, such that the interconnect is a sole repository of cache coherence information within the multiprocessor system; checking said stored information to determine the location of the most current copy of a requested portion of data, in response to a request by a requesting node for the requested portion of data; retrieving said current copy of requested portion of data and directing said data to the requesting node; checking said stored information to determine the location of the requested data portion; and simultaneous to the retrieval of said current copy of the requested portion of data, directing the system to send said requested data portion to the requesting node without going through said interconnect.