Patent ID: 9037788
Filing Date: 2015-05-19
Classification: G06F,G11C,Y02D

Abstract:
1. A method comprising: A. rebooting a processor that is configured to access a persistent main memory in response to an occurrence of a disruptive event experienced by said processor, said persistent main memory comprising volatile and nonvolatile memory; B. determining validity of a base table maintained in the persistent main memory with a memory controller, wherein if the base table is invalid, the processor is rebooted so that the base table is reloaded from an external drive, and wherein if the base table is valid proceed to step C; C. validating an individual page referenced by the validated base page table by the memory controller, wherein if the individual page is not valid, reload the individual page from the external drive and proceed to step E, and wherein if the individual page is valid proceed to step D; D. re-using valid individual page information; and E. repeating step C until every individual page in the validated base page table is validated.