Patent ID: 8878577
Filing Date: 2014-11-04
Classification: H03L,H03M

Abstract:
1. A method for frequency multiplication jitter correction, the method comprising: accepting an analog reference signal having a first frequency; using the analog reference signal, deriving a system clock signal having a second frequency, greater than the first frequency; sampling an amplitude of the analog reference signal using the system clock signal; converting the sampled analog reference signal into a digitized reference signal; comparing the digitized reference signal to an ideal digitized reference signal; in response to the comparing, deriving a phase error correction for the system clock signal at a first instance of time; accepting an analog data signal at the first instance of time; sampling an amplitude of the analog data signal with a system clock signal; converting the sampled analog data signal into a digitized data signal; and, applying the phase error correction to the digitized data signal.