Patent ID: 7122884
Filing Date: 2006-10-17
Classification: H01L

Abstract:
1. A semiconductor package comprising: (a) a semiconductor die including a first side and a second side, wherein the semiconductor die further includes a bond pad at the first side, the bond pad comprising an uneven surface: (b) a leadframe structure comprising (i) a substantially planar die attach region, and (ii) a plurality of leads extending away from the die attach region; (c) a plurality of solder structures between the semiconductor die and the leadframe structure and coupling the die attach region to the semiconductor die; (d) a depression formed in the leadframe structure, the depression being between the one of the solder structures in the plurality of solder structures, and one of the leads in the plurality of leads, and wherein the depression is formed at an edge region of the die attach region; and (e) a molding material covering the die attach region of the leadframe structure, the plurality of solder structures, and the first side of the semiconductor die, wherein the leads in the plurality of leads extend laterally away from and outside of the molding material, and wherein the solder structures are on the die attach pad and wherein the die attach pad includes a portion that is between and bridges the solder structures.