Patent ID: 8716813
Filing Date: 2014-05-06
Classification: H01L

Abstract:
1. A field effect transistor (FET) device, comprising: a first gate stack portion and a second gate stack portion formed on a substrate; the first gate stack portion further comprising a first interfacial (IL) layer formed on the substrate, a dielectric layer formed on the first IL layer, a stoichiometric TiN layer formed over the dielectric layer, and a capping layer formed over the stoichiometric TiN layer; and the second gate stack portion further comprising a second IL layer formed on the substrate, the dielectric layer formed on the second IL layer, the stoichiometric TiN layer formed over the dielectric layer, and the capping layer formed over the stoichiometric TiN layer; wherein the second IL layer has a reduced oxygen content and an increased silicon content with respect to the first IL layer such that an equivalent oxide thickness (EOT) of the second gate stack portion is reduced with respect to the first gate stack portion; wherein the second gate stack portion further comprises: