Patent ID: 6465300
Filing Date: 2002-10-15
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, the method comprising steps of:a) preparing an active matrix provided with at least one diffusion region and an insulating layer formed thereon; b) patterning the insulating layer into a predetermined configuration, thereby exposing the diffusion region; c) forming metal silicide films on the exposed diffusion region; d) forming a metal layer on the exposed diffusion region and the insulating layer; e) patterning the metal layer to a preset configuration, thereby obtaining supporting members on the metal silicide films and carrying out a first plasma treatment to surfaces of the supporting members in the presence of a gas containing silicon (Si) to form Tiâ€”Siâ€”N layers; f) forming bottom electrodes on the supporting members; and g) forming capacitor dielectrics and top electrodes on the bottom electrodes.