Patent ID: 8164131
Filing Date: 2012-04-24
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a semiconductor body with a first semiconductor region having first conductivity; a channel formation region that is a surface portion of the first semiconductor region having a second conductivity; a second semiconductor region that is adjacent the channel formation region and has the second conductivity; a third semiconductor region that is spaced apart from the second semiconductor region and adjacent the channel formation region at a side opposite the second semiconductor region and has the second conductivity; a laminated insulating film structure formed over the channel formation region; and a control electrode formed above the laminated insulating film, wherein the laminated insulating film includes a first insulating film, a charge storage film having a charge storage ability, and a second insulating film in order from the channel formation region side, the control electrode extends to a location that is perpendicularly above at least one of the second semiconductor region and the third semiconductor region, and the charge storage film being adjacent a third insulating film having a charge storage ability lower than that of the charge storage film, and wherein the charge storage film is surrounded by insulating material that is located perpendicularly below the control electrode, and further wherein the second and third semiconductor regions each extend to locations that are perpendicularly beneath the insulation at corresponding sides of the charge storage film, and further wherein substantially none of the charge storage film extends directly above the second and third semiconductor regions, the charge storage film being centrally located above and between the second and third semiconductor regions and extending proximate boundaries for the second and third semiconductor regions.