Patent ID: 6333206
Filing Date: 2001-12-25
Classification: C08L,H01L

Abstract:
A process for the production of a semiconductor device comprising a semiconductor element on a printed circuit board with a plurality of connecting electrode portions interposed therebetween, and a gap between said printed circuit board and said semiconductor element being sealed with an underfill resin layer, wherein said process comprises melting a lamellar solid resin interposed between said printed circuit board and said semiconductor element to form said underfill resin layer, wherein said solid resin of the following epoxy resin composition (A):comprises an epoxy resin composition comprising components (a) to (c), the proportion of said component (c) being not more than 90% by weight of the total weight of said epoxy resin composition:(a) epoxy resin;(b) phenol resin; and(c) inorganic filler having a maximum grain diameter of not more than 100 .mu.m.