Patent ID: 8883567
Filing Date: 2014-11-11
Classification: H01L

Abstract:
1. A method of making a stacked semiconductor package having at least a leadframe, a first die mounted above and soldered to the lead frame and a first clip mounted above and soldered to the first die comprising: applying a first layer of solder paste to one of a top surface of the leadframe and a bottom surface of the first die; positioning the first die on the leadframe with the first layer of solder paste sandwiched between the top surface of the leadframe and the bottom surface of the first die; applying a second layer of solder paste to one of a top surface of the first die and a bottom surface of the first clip; positioning the first clip on the first die with the second layer of solder paste positioned between the top surface of the first die and the bottom surface of the first clip and with a leg portion of the first clip extending to the leadframe; nonsolderingly locking the first clip in laterally nondisplaceble relationship with the leadframe; applying a third layer of solder paste to one of a top surface of the first clip and a bottom surface of a second die; positioning the second die on the first clip with the third layer of solder paste positioned between the top surface of the first clip and a bottom surface of the second die; applying a fourth layer of solder paste to one of a top surface of the second die and a bottom surface of a second clip; positioning the second clip on the second die with the fourth layer of solder paste positioned between the top surface of the second die and the bottom surface of the second clip and with a leg portion of the second clip extending to the leadframe; and nonsolderingly locking the second clip in laterally nondisplaceble relationship with the leadframe.