Patent ID: 8995800
Filing Date: 2015-03-31
Classification: G02B,H01P

Abstract:
1. A method of fabricating a silicon waveguide structure with an embedded circuit, comprising the steps of: 1) providing a silicon-on-insulator (SOI) wafer; 2) providing a double masking layer on said SOI wafer, leaving at least one portion of the surface of said SOI wafer unmasked, said double masking layer comprising: 3) etching the at least one unmasked portion of said SOI wafer through the buried insulator layer of said SOI wafer to define a portion of the first half of said at least one waveguide, to a depth equal to said desired waveguide depth minus said embedded circuit thickness; 4) removing said second masking layer, unmasking at least one additional portion of said SOI wafer; and 5) etching through the unmasked portions of said SOI wafer to define said circuit recess and to complete the etching of the remaining portion of said desired waveguide depth, the resulting waveguide structure providing the first half of a silicon waveguide.