Patent ID: 8679920
Filing Date: 2014-03-25
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: forming an insulation structure having a first end and a second end, the second end stacked on a substrate such that the second end is closer to the substrate than the first end, the insulation structure including vertically stacked insulation patterns stacked from the first end to the second end such that a thickness of the insulation structure at the second end is greater than a thickness of the insulation structure at the first end, the vertically stacked insulation patterns separated from each other by gap regions; forming a first conductive layer in the gap regions and on a sidewall of the insulation structure; and forming a second conductive layer covering the first conductive layer such that a thickness of the second conductive layer at the first end is greater than a thickness of the second conductive layer at the second end by depositing a material of the second conductive layer at a deposition rate that varies along the sidewall of the insulation structure, the deposition rate being greater at the first end than at the second end.