Patent ID: 7489005
Filing Date: 2009-02-10
Classification: G11C,H01L

Abstract:
1. An EEPROM having a nonvolatile memory cell, said nonvolatile memory cell comprising: a first MOS transistor; a second MOS transistor; a floating well formed of a first conductivity type; wherein said first MOS transistor and said second MOS transistor comprise a floating gate electrode in common, and said first MOS transistor and said second MOS transistor are of a same conductivity type; wherein the first MOS transistor and the second MOS transistor are associated with a second well; and wherein in data reading, a reading potential is applied to said second MOS transistor, a first potential is applied to a source and P-well of the first MOS transistor, and a second potential is applied to a drain of the first MOS transistor is an accumulation mode and the second MOS transistor is in an inversion mode.