Patent ID: 7915705
Filing Date: 2011-03-29
Classification: H01L

Abstract:
1. A SiC semiconductor device comprising: a substrate made of SiC and having a first conductive type, wherein the substrate includes a first surface and a second surface; a drift layer disposed on the first surface of the substrate, wherein the drift layer is made of SiC and has the first conductive type, and the drift layer has an impurity concentration lower than an impurity concentration of the substrate; a semiconductor element disposed in a cell region of the drift layer; an outer periphery structure disposed on an outer periphery of the cell region, wherein the outer periphery structure includes a reduced surface field (RESURF) layer having a second conductive type, and the RESURF layer is disposed in a surface portion of the drift layer and surrounds the cell region; and an electric field relaxation layer having the second conductive type, wherein the electric field relaxation layer is disposed in another surface portion of the drift layer so that the electric field relaxation layer is separated from the RESURF layer, the electric field relaxation layer is disposed on an inside of the RESURF layer so that the electric field relaxation layer is disposed in the cell region, and the electric field relaxation layer has a ring shape, wherein the electric field relaxation layer includes a plurality of concentric layers, each of which is disposed on the inside of the RESURF layer, the plurality of concentric layers are spaced apart from each other, the plurality of concentric layers includes an utmost outer concentric layer, which is disposed on utmost outer side of the electric field relaxation layer, the utmost outer concentric layer contacts an edge of the RESURF layer, the edge of the RESURF layer is disposed on utmost inner side of the RESURF layer, each concentric layer has a width in a range between 0.5 μm and 2.0 μm, a distance between two adjacent concentric layers is in a range between 0.5 μm and 2.5 μm, each concentric layer has a depth in a range between 0.3 μm and 1.0 μm, the semiconductor element is one of a Schottky barrier diode (SBD), a PN diode, a metal oxide semiconductor field effect transistor (MOSFET), and an insulated gate bipolar transistor (IGBT), the outer periphery structure further includes a guard ring layer, the guard ring layer has the second conductive type, the guard ring layer is disposed in further another surface portion of the drift layer and surrounds the RESURF layer, and the electric field relaxation layer has a depth, which is equal to a depth of the guard ring layer and a depth of the RESURF layer.