Patent ID: 6580650
Filing Date: 2003-06-17
Classification: G11C

Abstract:
A method of biasing and monitoring a sample cell access device for regulating the word line selection voltage of a dynamic random access memory (DRAM) chip, said method comprising:(a) providing a sample cell access device wherein said sample cell access device substantially tracks the process parametric fluctuations of any one of a plurality of memory cell access devices within the DRAM chip; (b) forcing a constant DC current through said sample cell access device; (c) providing a DC voltage equal to the bitline selected voltage applied to a first terminal of said sample cell access device; and (d) providing an amplifying circuit connected between the gate terminal and a second terminal of said sample cell access device for regulating the voltage at the second terminal of said sample access device at a predetermined voltage greater than or less than the bitline selected voltage wherein said amplifying circuit outputs a reference voltage.