Patent ID: 7366015
Filing Date: 2008-04-29
Classification: G11C,H01L

Abstract:
1. A semiconductor integrated circuit device with a non-volatile memory including memory cells, comprising: a semiconductor substrate, at least one floating gate formed over the semiconductor substrate, at least one control gate extending in a first direction, in a plan view of a principal surface of the semiconductor substrate, and formed over the floating gate, and at least one bit line extending in a second direction, in the plan view, that crosses the first direction, wherein each memory cell of the non-volatile memory comprises a floating gate and a control gate and is coupled to a bit line, wherein an upper surface of a middle part of the floating gate is at a lower height than that of both opposing end sides of the floating gate, in a sectional view thereof extended in the first direction, wherein the floating gate is comprised of a first portion, a second portion and third portion, which together define the shape of the floating gate, wherein the first portion is located between the second portion and the semiconductor substrate, wherein the second portion and the third portion are located on the first portion, and wherein the second portion and the third portion exist in an extent of and limited by a width of the first portion in the first direction.