Patent ID: 6022779
Filing Date: 2000-02-08
Classification: H01L

Abstract:
A method of fabricating a mask ROM, comprising:forming a trench at a surface of a semiconductor substrate of a first conductivity type;implanting an impurity ion of a second conductivity type in the surface of the semiconductor substrate including a bottom surface of the trench;simultaneously forming an impurity region of the second conductivity type and an insulating layer at the surface of the semiconductor substrate including the bottom surface of the trench, wherein the insulating layer is formed on the impurity region, and forming gate oxide layers simultaneously with the impurity region and the insulating layer, the gate oxide layers being formed at an exposed surface of the semiconductor substrate where the impurity ion is not implanted;forming first and second gates on the gate oxide layers; andforming a channel of a first conductivity type by implanting an impurity ion of a first conductivity type in one side of the trench.