Patent ID: 6563159
Filing Date: 2003-05-13
Classification: H01L

Abstract:
A substrate of a semiconductor integrated circuit comprising:a first semiconductor surface layer made of a single crystal having a single orientation and almost uniform first impurity concentration and configured to form a first circuit section including a plurality of semiconductor elements; a second semiconductor surface layer made of a single crystal having the same orientation and conductivity type as that of said first semiconductor surface layer, having an almost uniform second impurity concentration, and configured to form a second circuit section including a plurality of semiconductor elements; and a semiconductor substrate layer which is made of a substrate single crystal having the same orientation and conductivity type as that of each of said first and second semiconductor surface layers, having an almost uniform third impurity concentration and configured to serve as a formation substrate for each of said first and second semiconductor surface layers, said semiconductor substrate layer having first and second principal planes having different heights from each other, wherein a thickness of said semiconductor substrate layer between a bottom face and said first principal plane thereof is larger than a thickness of said semiconductor substrate layer between said bottom face and said second principal plane thereof, said first semiconductor surface layer is directly formed on said first principal plane, said second semiconductor surface layer is directly formed on said second principal plane, and said third impurity concentration is higher than each of said first and second impurity concentrations, and the first circuit functions as a memory circuit, and the second circuit functions as an input/output circuit.