Patent ID: 8504752
Filing Date: 2013-08-06
Classification: G06F

Abstract:
1. A virtual machine control device comprising: a virtual machine control unit that controls switching of a plurality of virtual machines operating on a CPU; a plurality of interrupt controllers that output an interrupt request notifying a generation of an interrupt as one virtual machine from among the plurality of virtual machines performs processing; an interrupt control unit that receives the interrupt request from the plurality of interrupt controllers and controls notification of the interrupt to the virtual machine control unit on the basis of an interrupt level indicating a priority of the generated interrupt; and an idle detection unit that detects that the CPU has executed a command for implementing a transition to an idle state and outputs the interrupt request to the interrupt control unit, wherein the virtual machine control unit includes: the interrupt control unit includes: the virtual machine includes a first virtual machine and a second virtual machine; the plurality of interrupt controllers include a first interrupt controller corresponding to the first virtual machine, and a second interrupt controller corresponding to the second virtual machine; the second interrupt controller includes an interrupt level notifying unit that notifies an interrupt level that has been set with respect to each interrupt processed by the second virtual machine at the time of interrupt generation; the interrupt control unit further includes a notification level reception unit that receives the interrupt level from the interrupt level notifying unit and notifies the received interrupt level to the second interrupt type determination unit; the second interrupt type determination unit outputs the interrupt level notified by the notification level reception unit to the interrupt level setting unit, and the interrupt level setting unit takes the interrupt level outputted by the second interrupt type determination unit as an interrupt level relating to a notification from the second interrupt controller.