Patent ID: 6501125
Filing Date: 2002-12-31
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate having a first conductivity type; device isolation regions formed on a main surface of said semiconductor substrate; a tunnel insulating film formed on the main surface of said semiconductor substrate except for said device isolation regions; a first-layer floating gate formed on said tunnel insulating film; diffusion regions having a second conductivity type formed on the main surface of said semiconductor substrate and at both ends of said first-layer floating gate; an insulating film having a first raised irregularity formed over said diffusion regions having the second conductivity type and a second raised irregularity formed over said device isolation regions; a second-layer floating gate formed on said insulating film; and a control gate formed on said second-layer floating gate, wherein: the insulating film is formed under said second-layer floating gate and on side surfaces of said first-layer floating gate and the insulating film is formed on said device isolation regions, respectively, have raised protrusions.