Patent ID: 6739953
Filing Date: 2004-05-25
Classification: B24B,H01L,Y10S

Abstract:
A method of planarizing a surface on a semiconductor substrate, the method comprising:forming a conductive layer inlaid in a dielectric layer of the semiconductor substrate; disposing the semiconductor substrate opposite to a polishing pad and providing relative movement between the pad and the substrate; flowing a slurry over at least one of the polishing pad and the substrate, wherein the slurry includes an electrolytic solution for electropolishing and abrasive particles for chemical mechanical polishing of the substrate surface; applying a voltage or current between the polishing pad and the substrate to create electrolytic action in the electrolytic solution and to perform electropolishing of the conductive layer on the substrate; and controlling the removal rate of the surface by adjusting at least one of an adjustable down force applied to the substrate and voltage or current applied between the polishing pad and the substrate, wherein the planarization comprises a sequence of an initial simultaneous electropolishing and light chemical mechanical polishing of the conductive layer, a primary polishing of the conductive layer using electropolishing; and a polishing of at least one of a seed and barrier layer formed prior to the conductive layer using a simultaneous application of electropolishing and chemical mechanical polishing.