Patent ID: 6093613
Filing Date: 2000-07-25
Classification: H01L

Abstract:
A method for making lateral bipolar transistors with improved current gain on a semiconductor substrate compatible with CMOS comprising the steps of:providing a silicon substrate having a first conductive type dopant;forming doped wells having a second conductive type dopant;forming a pad oxide on said substrate;depositing a silicon nitride layer on said pad oxide layer thereby providing an oxidation barrier layer;patterning said silicon nitride layer and leaving portions over device areas while removing said silicon nitride layer over field oxide regions;forming a field oxide isolation in said field oxide regions;removing said silicon nitride layer and said pad oxide layer;growing a gate oxide layer and depositing a polysilicon layer;patterning said polysilicon layer and said gate oxide layer leaving portions over base areas in said device areas while removing portions of said polysilicon layer over emitter and collector areas for said lateral bipolar transistors, and concurrently patterning said polysilicon layer and said gate oxide layer to form gate electrodes for field effect transistors (FETs) elsewhere on said substrate;ion implanting selectively said second conductive type dopant in said device areas to form a base contact for said lateral bipolar transistors;using a first photoresist mask and selectively implanting buried base regions with said second conductive type dopant in said emitter areas and lying within said wells to improve said current gain of said lateral bipolar transistors;using a second photoresist mask and said patterned polysilicon layer as an implant mask and selectively ion implanting said first conductive type dopant in said emitter and collector areas to form emitters and collectors, respectively, wherein said emitters form junctions with said buried base regions, and thereby completing said lateral bipolar transistors with said improved current gain.