Patent ID: 7046056
Filing Date: 2006-05-16
Classification: G06F,H03K,H03L

Abstract:
1. A system comprising: a reference circuit to output reference clock signals in response to at least one input clock signal; a voltage regulation circuit to adjust upper and lower supply voltages in response to a phase difference between a predetermined pair of the reference clock signals; a storage circuit to store a plurality of offset control values that correspond to a plurality of devices; a mixing circuit to receive a selected pair of the reference clock signals and an offset control value of the plurality of offset control values, the mixing circuit to output a transmit clock signal in response to the selected pair of reference clock signals and the offset control value; a transmit circuit to output an output signal in response to the transmit clock signal; and a receive circuit to receive the output signal, wherein the offset control value corresponds to a distance that a clock signal travels from the transmit circuit to the receive circuit.