Patent ID: 8519876
Filing Date: 2013-08-27
Classification: H03K,H03M

Abstract:
1. A comparing circuit unit for an analog-to-digital converter (ADC), the comparing circuit unit comprising: a first resistor of which one end is electrically connected to a power source and the other end is used for providing a first level voltage; a second resistor of which one end is electrically connected to the power source and the other end is used for providing a second level voltage; and a CMOS transistor comprising a PMOS transistor and an NMOS transistor, wherein the base of the PMOS transistor is electrically connected to the power source and the base of the NMOS transistor is connected to the source of the NMOS transistor, and the CMOS transistor comprises: a signal input port located at the gate of the CMOS transistor and utilized for receiving an analog signal; a first level port located at the source of the NMOS transistor and utilized for receiving the first level voltage; a second level port located at the source of the PMOS transistor and utilized for receiving the second level voltage; and a signal output port located at the drain of the CMOS transistor and utilized for outputting a digital signal; wherein the digital signal is generated based on results of comparing a gate-to-source voltage (V