Patent ID: 7033950
Filing Date: 2006-04-25
Classification: H01L,Y10S

Abstract:
1. A method for fabricating a graded junction termination extension for an electronic device using ion implantation in a silicon carbide substrate, comprising the steps of: spinning a positive photoresist onto the silicon carbide substrate; exposing the positive photoresist to ultraviolet light through a mask with a surface of the positive photoresist separated from the mask; developing the photoresist/substrate in a solution wherein the photoresist dissolves at a rate proportional to the amount of light absorbed during the exposure to produce edges that are gradually sloped; annealing the photoresist/substrate to convert the photoresist into a carbon film on the substrate; adding an additional mask layer to the annealed substrate to bring the low energy ions to the surface; implanting a plurality of ions into the annealed substrate with varying energies using an accelerator; and annealing the substrate implanted with a plurality of ions to activate the ions.