Patent ID: 9142178
Filing Date: 2015-09-22
Classification: G09G

Abstract:
1. A liquid crystal display device having a plurality of pixels arranged in a matrix of a first direction and a second direction crossing with the first direction, comprising: an array substrate including: the first driver circuit including a first sequential circuit is electrically connected with the odd scanning lines and the odd auxiliary capacitance lines, and supplies scanning signals to the odd scanning lines in order, and further, the first driver circuit supplies first and second auxiliary capacitance voltages different from each other to the odd auxiliary capacitance lines, respectively, by turns for every cycle period after image signals have been written into the pixel electrode, the second driver circuit including a second sequential circuit is electrically connected with the even scanning lines and the even auxiliary capacitance lines, and supplies the scanning signals to the even scanning lines in order, and further, the second driver circuit supplies the first and second auxiliary capacitance voltages different from each other to the even auxiliary capacitance lines, respectively, by turns for every cycle period after image signals have been written into the pixel electrode, the timing control circuit is supplied with a first control signal and a second control signal from an outside control portion, and generates a first synchronization signal and a second synchronization signal, and supplies the first synchronization signal to the first driver circuit and the second synchronization signal to the second driver circuit, the first and second driver circuits supply the scanning signals to the scanning lines in order for every line, and also supply a first auxiliary capacitance voltage and a second auxiliary capacitance voltage to the auxiliary capacitance lines upon receiving the first synchronization signal and the second synchronization signal from the timing control circuit, the first driver circuit includes a plurality of shift registers of a number the same as a number of odd scanning lines, and the second driver circuit includes a plurality of shift registers of a number the same as a number of the even scanning lines, and the first and second driver circuits respectively include an auxiliary capacitance power selection circuit connected with each shift register and driven by the timing control circuit.