Patent ID: 6314026
Filing Date: 2001-11-06
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device comprising:a memory section including a plurality of variable threshold voltage type memory cell, the variable threshold voltage type memory cell storing data according to a threshold voltage of the memory cell; anda signal line which transmits a potential related to data stored by the variable threshold voltage type memory cell, whereinduring a data stored in the memory cell is erased, a soft erase operation to gradually shift the threshold voltage of the memory cell in one of a negative direction or a positive direction is carried out, whereina plurality of the memory cells are connected in series and constitute an NAND type cell;during a data write operation carried out after the soft erase operation,a write voltage is applied to a control gate of a selected memory cell in the NAND cell;a first voltage lower than the write voltage is applied to control gates of the memory cells adjacent to the selected memory cell; anda second voltage lower than the write voltage and higher than the first voltage is applied to control gates of the memory cells except for the selected memory cell and the adjacent memory cells.