Patent ID: 9048143
Filing Date: 2015-06-02
Classification: H01L

Abstract:
1. A thin film transistor array panel, comprising: a substrate; a gate line and a storage electrode line disposed on the substrate; a gate insulating layer disposed on the gate line and the storage electrode line; a semiconductor disposed on the gate insulating layer; a data line disposed on the semiconductor and including a source electrode, the data line having an end and a lengthwise portion extending from the end to the source electrode; a drain electrode disposed on the semiconductor and facing the source electrode; a first electrode disposed on the gate insulating layer; a protection electrode disposed along and contacting the data line so as to substantially cover the lengthwise portion of the data line; a passivation layer disposed on the first electrode and the protection electrode; and a second electrode disposed on the passivation layer, directly connected to the storage electrode line, and configured to receive a reference voltage from the storage electrode line, wherein the protection electrode comprises the same material as the first electrode.