Patent ID: 6221704
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A method for fabricating a semiconductor device which comprises:providing a semiconductor substrate;forming isolation regions in said substrate;forming a first insulating layer on said isolation regions and on said substrate;forming a conductive-forming layer on said first insulating layer;forming a second image reversal insulating layer on said conductive-forming layer;forming a resist layer on said second insulating layer;forming an opening through said resist layer down to the second insulating layer whereby said opening is located vertically between said isolation regions;removing those portions of said second insulating layer located beneath said opening down to said conductive forming layer;depositing a conductive material through said opening over said conductive forming layer and over said second insulating layer;planarizing said second insulating layer and said conductive material;removing said second insulating layer;removing said conductive-forming layer and said first insulating layer except for those portions located beneath said conductive material whereby said conductive material acts as a mask thereby defining a gate; andforming source/drain regions in said substrate.