Patent ID: 6251791
Filing Date: 2001-06-26
Classification: H01L

Abstract:
A method for forming a narrow contact hole and a wide trench simultaneously in the fabrication of an integrated circuit, where the depth of said narrow contact hole is equal to the depth of said wide trench, said method comprising following steps:providing a substrate;forming a dielectric layer on said substrate;forming a photo-resist on said dielectric layer;effecting a photolithography process to form a first opening and a second opening in said photo-resist, where said first opening has a first width and said second opening has a second width which is larger than said first width;effecting a partial etching process to etch part of said dielectric layer, and then a narrow contact hole miniature form is formed underlying said first opening and a wide trench miniature form is formed underlying said second opening, wherein the depth of said narrow contact hole miniature form is less than the depth of said wide trench miniature form;forming a coating layer on said photo-resist and filling said narrow contact hole miniature form and said wide trench miniature form, where the depth of said coating layer on the bottom of said narrow contact hole miniature form is smaller than the depth of said coating layer on the bottom of said wide trench miniature form;effecting an etching process to etch both said narrow contact hole miniature form and said wide trench miniature form, a narrow contact hole and a wide trench are formed in said dielectric layer and directly contact with said substrate, wherein a difference of etching rate between said narrow contact hole miniature form and said miniature of said wide trench is cancelled by a difference of depth of said coating layer between said bottom of said narrow contact hole miniature form and said bottom of said miniature of said wide trench, and the depth of said narrow contact hole is equal to the depth of said wide trench; andremoving, said photo-resist.