Patent ID: 6545979
Filing Date: 2003-04-08
Classification: H04J,H04L,Y10S

Abstract:
A system for calculating a processing interval at a network element in a packet switched digital network, said system comprising: first detection means at an ingress port of said network element to detect an arrival of a designated loopback cell; first timing means to generate a first time stamp value upon detecting the arrival of the designated loopback cell; second detection means at an egress port of said network element to detect the sending of said designated loopback cell from said network element; second timing means to generate a second time stamp value upon detection of the sending of the designated loopback cell; and processing means to calculate a processing interval by subtracting said first dime stamp value from said second time value, and to store said processing interval in said designated loopback cell for transmission to a downstream network element, the calculation of said processing internal being independent of a network synchronization clock.