Patent ID: 7062003
Filing Date: 2006-06-13
Classification: H04L

Abstract:
1. A data processing apparatus for automatic baud rate detection of asynchronous data input comprising: an edge detector receiving asynchronous data input; an externally supplied sampling clock of many times higher frequency than expected baud rate; a master counter coupled to said sampling clock, said master counter counting between successive asynchronous data edges; a holding register coupled to sampling clock; a first comparator coupled to said sampling clock said first comparator acting to replace count in holding register with count in master counter if master count is less than holding count held in holding register, said replacement count fixed upon second detected edge; a sample counter coupled to sampling clock and further coupled to said edge detector, said sample counter driving a second comparator detecting a desired input sampling condition and driving a multiplexer with output coupled to data input of a data sampling register, said data sampling register also coupled to sampling clock and storing asynchronous data when sample counter value becomes equal to a predetermined fraction of holding count.