Patent ID: 7804916
Filing Date: 2010-09-28
Classification: H04L

Abstract:
1. A frequency-shift keying (FSK) signal detector comprising: a binarizing circuit for receiving an FSK signal and expressing amplitude of the FSK signal in binary; a correlator for receiving the FSK signal expressed in binary and acquiring a correlation of the FSK signal; and an arithmetic unit for performing an arithmetic operation on an output of said correlator to detect and output the FSK signal; said correlator comprises: a plurality of stages of shift register for sequentially shifting the FSK signal in response to a clock signal; a first correlation filter for obtaining the correlation by a correlation signal sequence and a window function signal sequence which obtain a correlation value at a first frequency of two frequency components generated by frequency-shift keying; and a second correlation filter for obtaining the correlation by a correlation signal sequence and a window function signal sequence which obtain a correlation value at a second frequency of the two frequency components; a third correlation filter for obtaining the correlation by a correlation signal sequence and a window function signal sequence which obtain a correlation value at the first frequency of two frequency components generated by frequency-shift keying; and a fourth correlation filter for obtaining the correlation by a correlation signal sequence and a window function signal sequence which obtain a correlation value at the second frequency of the two frequency components; wherein said plurality of stages of shift register are provided to correspond to a time length associated with a wavelength of a frequency corresponding to a modulating speed; and said arithmetic unit generates demodulated data based on a width which varies in response to the clock signal supplied to said shift register; and wherein said arithmetic unit comprises: first and second subtracters for subtracting a predetermined value respectively from output values of said first and second correlation filters; first and second absolute value converters for respectively calculating absolute values of outputs of said first and second subtracters; first and second low-pass filters for respectively averaging outputs of said first and second absolute converters; and a first difference calculator for calculating a difference between outputs of said first and second low-pass filters; third and fourth subtracters for subtracting a predetermined value respectively from output values of said third and fourth correlation filters; third and fourth absolute value converters for respectively calculating absolute values of outputs of said third and fourth subtracters; a first adder for adding up outputs of said first and third absolute value converters; a second adder for adding up outputs of said second and fourth absolute value converters; third and fourth low-pass filters for respectively averaging outputs of said first and second adders; and a second difference calculator for calculating a difference between outputs of said third and fourth low-pass filters.