Patent ID: 6984563
Filing Date: 2006-01-10
Classification: H01L

Abstract:
1. A method for manufacturing a floating gate semiconductor component, comprising: providing a semiconductor substrate having an active region and an isolation structure; forming a first layer of dielectric material on the active region and the isolation structure of the semiconductor substrate; forming a first layer of semiconductor material over the active region and the isolation structure, wherein a first portion of the first layer of dielectric material is between the active region and the first layer of semiconductor material and a second portion of the first layer of dielectric material is between the isolation structure and the first layer of semiconductor material; forming a second layer of dielectric material on the first layer of dielectric material and over the isolation structure; and planarizing the second layer of dielectric material wherein, after planarizing the second layer of dielectric material, the first portion of the first layer of dielectric material that is between the semiconductor substrate and the first layer of semiconductor material and the second portion of the first layer of dielectric material that is between the isolation structure and the first layer of semiconductor material remain.