Patent ID: 6051462
Filing Date: 2000-04-18
Classification: H01L

Abstract:
A process for producing a semiconductor device comprising:a first step, in which a conductive pattern is formed on a first region and a second region of a semiconductor substrate, a first insulating film is formed along a shape of said conductive pattern on said semiconductor substrate, and a second insulating film comprising a material that ensures an etching selectivity with said first insulating film is formed on said first insulating film to make its surface flat;a second step, in which a contact hole is formed at least in said first insulating film and said second insulating film in said first region, and a side wall comprising a material that ensures an etching selectivity with said second insulating film and prevents its own silicidation is formed on an inner wall of said contact hole;a third step, in which a plug is formed by embedding a conductive material in said contact hole via said side wall;a fourth step, in which said second insulating film is removed by etching, to expose said plug and said first insulating film, and said first insulating film only in said second region is subjected to etch back, to form a spacer side wall comprising said first insulating film on a side wall of said conductive pattern in said second region, and to expose a surface of said semiconductor substrate in said second region;a fifth step, in which a silicide layer is formed on said exposed surface of said semiconductor substrate; anda sixth step, in which a third insulating film comprising a material that ensures an etching selectivity with said first insulating film is formed over said plug, said first insulating film and said conductive pattern, and a surface of said third insulating film is flattened to expose an upper surface of said plug.