Patent ID: 7821116
Filing Date: 2010-10-26
Classification: H01L

Abstract:
1. A semiconductor die package comprising: a leadframe structure comprising a die attach pad comprising a die attach surface, a folded edge structure disposed adjacent to the die attach surface, an opposite surface opposite to the die attach surface, and a plurality of leads extending laterally away from the die attach pad, the folded edge structure having a first major surface, a second major surface that is opposite and parallel to the first major surface, and a thickness between the first and second major surfaces, the first major surface having a first edge that abuts a portion of the die attach surface, a second edge that is parallel to the first edge, and an area disposed between the first and second edges and that rises above and extends laterally away from said first edge and the die attach surface; a semiconductor die comprising a first surface and a second surface, wherein the first surface is attached to the die attach surface of the die attach pad; and a molding material around at least a portion of the leadframe structure and at least a portion of the semiconductor die, and disposed on each of the first and second major surfaces of the folded edge structure, wherein the opposite surface of the leadframe structure is exposed through the molding material and terminal ends of the leads are substantially co-extensive with lateral surfaces of the molding material; and wherein the first edge of the first major surface is disposed closer to the semiconductor die than the second edge of the first major surface.