Patent ID: 8767504
Filing Date: 2014-07-01
Classification: G11C,H03H,H03K

Abstract:
1. An activate signal generating circuit, to which a first and a second activate signal are inputted, configured to generate an internal activate signal, the first and a second activate signal being pulse signals, the activate signal generating circuit comprising a first delay element, wherein: the internal activate signal is activated based on timings of front edges of the first and second activate signals; when a timing of a rear edge of the first activate signal is earlier than a timing of a rear edge of the second activate signal, the internal activate signal is inactivated based on the timing of the rear edge of the first activate signal; and when the timing of the rear edge of the first activate signal is later than the timing of the rear edge of the second activate signal, the internal activate signal is inactivated after a predetermined delay time based on a delay time of the first delay element.