Patent ID: 6294476
Filing Date: 2001-09-25
Classification: H01L

Abstract:
A microelectronics fabrication having a silicon oxide dielectric layer formed according to the steps comprising:providing a substrate employed within a microelectronics fabrication;forming over the substrate a silicon oxide dielectric layer, the silicon oxide dielectric layer being formed through use of a chemical vapor deposition (CVD) method employing tetra-ethyl-ortho-silicate (TEOS) as a silicon source material;treating the silicon oxide dielectric layer with an oxygen plasma to form from the silicon oxide dielectric layer an oxygen plasma treated silicon oxide dielectric layer; andforming upon the oxygen plasma treated silicon oxide dielectric layer a patterned photoresist layer, where the oxygen plasma treatment of the silicon oxide dielectric layer enhances adhesion of the patterned photoresist layer to the oxygen plasma treated silicon oxide dielectric layer.