Patent ID: 8640230
Filing Date: 2014-01-28
Classification: G06F

Abstract:
1. A method for securely communicating data within a processor chip that includes a plurality of hardware threads coupled to one another in an on-chip network of a network on chip (NOC) arrangement, the method comprising: in response to a request by a respective hardware thread on behalf of a respective process to access a respective inter-thread communication hardware resource connected to the on-chip network, accessing permission data from a process context translation data structure, wherein the process context translation data structure maps each of a plurality of processes to a plurality of inter-thread communication hardware resources, and stores permission data for each mapped process, the permission data indicating which inter-thread communication hardware resources each mapped process is permitted to access; determining from the permission data whether the respective process is permitted to access the respective inter-thread communication hardware resource; and in response to determining that the respective process is not permitted to access the respective inter-thread communication hardware resource, denying the request to access the respective inter-thread communication hardware resource; wherein the permission data indicates, for each mapped process, one or more access types for one or more inter-thread communication hardware resources, wherein the one or more access types includes a receive type access type and a send type access type, the receive type access type authorizing a process to receive data from an inter-thread communication hardware resource, and the send type access type authorizing a process to send data to an inter-thread communication hardware resource.