Patent ID: 8980738
Filing Date: 2015-03-17
Classification: H01L,Y10T

Abstract:
1. A method, comprising: producing at least one electrical connection via made of an electrically conductive material passing through a semiconductor substrate die and linked to a connection portion of a front electrical interconnect network in a layer on a front face of the semiconductor substrate die, wherein producing said electrical connection via comprises embedding the electrically conductive material in both a through hole extending through the semiconductor substrate die and a rear void extending into the semiconductor substrate die adjacent to the through hole, wherein the rear void is open out vertically only towards a rear face of the semiconductor substrate die and is further open out laterally into the through hole; producing an electrical connection pillar made of an electrically conductive material placed on a rear part of the electrical connection via and positioned vertically aligned over the rear void; and producing an external protection layer at least partly covering the electrical connection via and the electrical connection pillar.