Patent ID: 9196368
Filing Date: 2015-11-24
Classification: G06F,G11C

Abstract:
1. A method of erasing data associated with a logical block address, the method comprising: determining a programming mode associated with the logical block address, wherein the programming mode determines a number of physical memory blocks allocated to the logical block address for storing data, the number of physical memory blocks being one or more and wherein the programming mode comprises either a single-level cell mode or a multi-level cell mode; querying a block allocation table to determine a physical block address of the one or more physical memory blocks corresponding to the logical block address, wherein the block allocation table has one or more entries associating the logical block address to the physical block address of the physical memory blocks; erasing the one or more physical memory blocks at the physical block address determined from the block allocation table; and clearing the one or more entries of the block allocation table.