Patent ID: 6201273
Filing Date: 2001-03-13
Classification: H01L

Abstract:
A double wall capacitor having a horizontal fin for a DRAM cell on a substrate; said substrate having a MOS transistor with a source region and a drain region; comprising:a storage electrode having an upright pedestal and an upper portion;said upright pedestal in electrical contact with a source region in a substrate;said upper portion positioned over said upright pedestal; said upper portion having an outer wall and a concentric inner wall attached to said outer wall;said outer wall of said upper portion has a lower horizontal portion and an outer vertical wall; said lower horizontal portion and said outer vertical wall join at about a 90.degree. angle; said concentric inner wall is a vertical cylinder;said outer vertical wall having a horizontal fin, said horizontal fin having outer vertical sidewalls; outer spacers on said outer vertical sidewalls of said horizontal fin; anda capacitor dielectric layer and a top electrode covering said upper portion.