Patent ID: 9129982
Filing Date: 2015-09-08
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first-conductivity-type semiconductor layer including an active region in which a transistor having a plurality of impurity regions is formed and a marginal region surrounding an outer periphery of the active region; a second-conductivity-type channel layer formed between the active region and the marginal region so as to form a front surface of the semiconductor layer; at least one gate trench formed in the active region to extend from the front surface of the semiconductor layer through the channel layer; a gate insulation film formed on an inner surface of the at least one gate trench; a gate electrode formed inside the gate insulation film in the at least one gate trench; at least one isolation trench formed in a trench isolation region arranged between the active region and the marginal region to surround the outer periphery of the active region and formed to extend from the front surface of the semiconductor layer through the channel layer, the at least one isolation trench having a depth equal to a depth of the at least one gate trench; an inter-layer insulation film formed on the semiconductor layer; and an electrode film including a first terminal formed on the inter-layer insulation film and connected to the gate electrode through the inter-layer insulation film, and a second terminal formed on the inter-layer insulation film and connected to one of the impurity regions of the transistor through the inter-layer insulation film; and a cut-out region formed between the first terminal and the second terminal and at the outside of the first terminal, wherein the cut-out region corresponds to a portion from which the electrode film is removed to prevent the first terminal and the second terminal from making contact with each other, and wherein the trench isolation region is formed to extend along the cut-out region.