Patent ID: 7476932
Filing Date: 2009-01-13
Classification: H01L

Abstract:
1. A U-shape Metal-Oxide-Semiconductor (UMOS) device, comprising: a P-base layer; an N+ source region disposed in the P-base layer, the N+ source region having a first surface that is coplanar with a first surface of the P-base layer; a dielectric layer extending through the P-base layer and forming a U-shape trench having side walls and a floor enclosing a trench interior region; a conducting gate material filling the U-shape trench interior region; a first accumulation channel layer disposed along a first side wall of the H-shape trench and in contact with the N+ source region and the first side wall of the U-shape trench; a P-junction gate disposed adjacent to the dielectric layer floor and in proximity to the first accumulation channel layer; an N-drift region, wherein the P-junction gate is disposed between the dielectric layer and the N-drift region; a N+ drain region adjacent to a second wall of the U-shape trench, the second wall being disposed on a side opposite from the first side wall; and a second accumulation channel layer along the second side wall of the trench and in contact with the N+ drain region.