Patent ID: 6061508
Filing Date: 2000-05-09
Classification: G06F

Abstract:
A method comprising:acquiring a plurality of capacitance values for a group of interconnecting wires that interconnect a plurality of components in a chip with a plurality of conductor segments, using a data set comprised of technology data for said chip, and geometry and environment data for a first segment of said conductor segments and for a corresponding environment of said first segment, by:determining a parallel plate capacitance matrix, a frontal 2-dimensional capacitance matrix, and a lateral 2-dimensional capacitance matrix from said data set;merging said parallel plate, frontal and lateral matrices into a merged capacitance matrix;extracting from said merged capacitance matrix a self capacitance value, and a plurality of values for a plurality of coupling capacitances between said first conductor segment and each of a plurality of other conductor segments defined in said environment data; andstoring said self capacitance value and said values of coupling capacitances, anddesigning and/or evaluating the chip using said self capacitance value and said values of coupling capacitances.