Patent ID: 8090024
Filing Date: 2012-01-03
Classification: H04N

Abstract:
1. A machine-implemented method for processing a first data frame in an external memory against a second data frame in the external memory, wherein the first data frame and the second data frame are divided into a plurality of blocks, comprising: ordering the blocks of the second data frame into a pre-defined order; defining an addressable data block (ADB) in an on-chip memory over the first data frame; defining a motion search range (MSR) within the ADB; loading selected blocks of the first data frame from the external memory into the ADB in the on-chip memory; loading one or more blocks of the second data frame from the external memory in the pre-defined order; and processing, with a chip, the one or more blocks of the second data frame against the selected blocks of the first data frame in the MSR, where the size of the MSR and the size of the ADB are defined as a function of the data transfer bandwidth between the on-chip memory and the external memory.