Patent ID: 6791613
Filing Date: 2004-09-14
Classification: H04N

Abstract:
A signal processing apparatus comprising:clamp capacitance means for receiving, at one electrode thereof, first and second outputted from a signal source; a signal transfer transistor of which one main electrode is connected to an other electrode of said clamp capacitance means; signal accumulating capacitance means connected to an other main electrode of said signal transfer transistor; reset means for fixing the potential of said signal accumulating capacitance means; and control means for fixing the potential of said signal accumulating capacitance means by said reset means while the first signal is outputted from said signal source and maintaining said signal accumulating capacitance means in a floating state while the second signal is outputted from said signal source, and controlling said signal transfer transistor in such a manner that the potential of said one main electrode of said signal transfer transistor is different from that of the other main electrode while the signal charge is transferred through said clamp capacitance means and said signal transfer transistor during the output of said first and second signals, thereby causing the saturation current to transfer said signal charge.