Patent ID: 7638369
Filing Date: 2009-12-29
Classification: H01L

Abstract:
1. A method of fabricating semiconductor chips by forming fuses with a mask having a plurality of fuse patterns formed thereon, comprising: forming a plurality of fuses on a first semiconductor substrate using a first fuse-forming mask; from among the plurality of fuses on said first semiconductor substrate, identifying a fuse to be blown that is common to each of a plurality of second semiconductor substrates; producing a second fuse-forming mask having a plurality of fuse patterns corresponding to said plurality of fuses except said fuse to be blown, said second fuse-forming mask having a fuse residue pattern which includes only an incomplete part of a fuse pattern at a site corresponding to said fuse to be blown; and on each of said second semiconductor substrates, forming said plurality of fuses and said part of a fuse pattern using said second fuse-forming mask.