Patent ID: 7479410
Filing Date: 2009-01-20
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure comprising: providing a hybrid orientation substrate having at least two coplanar surfaces of different surface crystal orientations, wherein one of said coplanar surfaces is a bulk semiconductor region and the other coplanar surface is a semiconductor-on-insulator (SOI) region; forming a doped region of a second conductivity type in a bulk layer of a first conductivity type of the hybrid orientation substrate, said doped region is located beneath a buried insulator layer and extending from a first of said bulk regions under a first of said semiconductor-on-insulator regions to a second of said bulk regions; and forming semiconductor devices on each of said coplanar surfaces of different surface crystal orientations, wherein each semiconductor device in the bulk regions includes a well region, wherein the well region of said first bulk region and the well region of said second bulk region are electrically coupled by said doped region.