Patent ID: 6128636
Filing Date: 2000-10-03
Classification: H03M

Abstract:
In a computer having a memory and facilities for running two processes, a method for interfacing a floating point-based process with an integer-based process comprising the steps of:providing a floating point process;providing an integer process; andinitiating a transfer of data from said floating point process to said integer-based process, the transfer comprising the steps of selecting a memory location containing a floating point value to be handed off to the integer-based process, causing a first logical AND operation to be performed on the value of said memory location with a first mask, causing a second logical AND operation to be performed on the value of said memory location with a second mask, causing a first addition operation to be performed, said operation accomplishing the adding of the results of said second logical AND operation with a magnitude of 0.5, causing a first logical OR operation to be performed on said results of said first addition operation with said results of said first logical AND operation;wherein said first and said second mask each comprise the same number of bits as said floating point value, all bits in said first mask are set low (e.g. to a ""0"") except for the most significant bit of said first mask which is set high (e.g. to a ""1""), and all bits in said second mask are set high (e.g. to a ""1"") except for the most significant bit of said second mask which is set low (e.g. to a ""0"").