Patent ID: 6642581
Filing Date: 2003-11-04
Classification: H01L

Abstract:
A semiconductor device, comprising:a semiconductor substrate; a pair of first diffusion layers formed within said semiconductor substrate; a gate insulating film formed on that portion of said semiconductor substrate which is positioned between said paired diffusion layers; a gate electrode including a first gate portion formed on said gate insulating film and a second gate portion formed on said first gate portion, a first width in a channel direction of said first gate portion being substantially equal to a width in said channel direction of said gate insulating film, and a second width in said channel direction of said second gate portion being larger than said first width; a gate side wall insulating film including a first side wall portion formed on a side surface of said first gate portion and on a side surface of said gate insulating film and a second side wall portion formed on a side surface of said second gate portion; a second diffusion layer formed apart from said first diffusion layers within that portion of said semiconductor substrate which is positioned below said gate insulating film; and a third diffusion layer including a first diffusion portion formed below said first diffusion layers under said first side wall portion and a second diffusion portion formed below said second diffusion layer, wherein a distance of a peak portion of a impurity concentration in said first diffusion portion from a surface of said semiconductor substrate is less than a distance of a peak portion of a impurity concentration in said second diffusion portion from the surface of said semiconductor substrate, and wherein a conductivity type of said third diffusion layer is equal to the conductivity type of said semiconductor substrate.