Patent ID: 6708248
Filing Date: 2004-03-16
Classification: G06F,Y02D

Abstract:
A memory system operating in either a first mode or a second mode of operation and comprising:a memory controller connected to a plurality of solid-state memory devices via at least one channel, the memory controller configured to communicate at least one command to each one of the plurality of solid-state memory devices via the at least one channel, wherein each of the plurality of solid-state memory devices is configured to electronically store data in a row and column configuration; such that, wherein the memory system is configured to operate in the first mode, such that one of the memory devices responds to the at least one command to accomplish transfer of data between the one memory device and the memory controller during a first time period; and, wherein the memory system is configured to operate in the second mode, such that a plurality of the memory devices responds to the at least one command to accomplish transfer of data between the plurality of memory devices and the memory controller during the first time period.