Patent ID: 6781221
Filing Date: 2004-08-24
Classification: H01L,H05K

Abstract:
A packaging substrate, for electronic elements, on which substrate two or more electronic elements are mounted through flip chip bonding and wire bonding, said packaging substrate comprising:at least one first area designed to receive thereon an electronic element through flip chip bonding and at least one second area designed to receive thereon an electronic element through wire bonding; the first area of said packaging substrate having at least one bonding pad to which an external terminal of the electronic element is connected, the bonding pad comprising a copper-based material having directly applied on a surface thereof a coating of a solder material; and the second area of said packaging substrate having at least one bonding pad to which an end portion of the bonding wire, extended from an external terminal of the electronic element, is connected, the bonding pad comprising a copper-based material having applied on a surface thereof a plating layer comprising a combination of nickel plating and gold plating.