Patent ID: 6608792
Filing Date: 2003-08-19
Classification: G11C

Abstract:
A circuit for protecting sensitive data, comprising:an input data path; a memory area for storing the sensitive data, the memory area coupled to the input data path; a first one-time programmable device coupled to the input data path which when placed in a first state, sensitive data applied to the input data path is allowed to be loaded into the memory area, and when it is placed in a second state, sensitive data applied to the input data path is not allowed to be loaded into the memory area; and wherein the one-time programmable device comprises a logic protection circuit comprising: a first logic gate having a first input port coupled to the input data path and an output port coupled to the memory area; a register having a protection bit stored therewith; a second logic gate having a first input port coupled to the output port of the first logic gate and a second input port coupled to the register, and an output port; said first logic gate having a second input port coupled to the output port of the second logic gate; and wherein when said protection bit stored within the register is presented to the second logic gate, the first logic gate prevents data located in the input data path from being sent to the memory area.