Patent ID: 6181699
Filing Date: 2001-01-30
Classification: H04L

Abstract:
An apparatus including a circuit for assigning a VLAN tag to a data frame received at a port of a switch, said circuit comprising:a content addressable memory which stores tagging information, said tagging information including lookup data and associated tag data:a data frame memory which stores at least part of a data frame, said Dart including data frame information;a search circuit, connected to said content addressable memory and said data frame memory, which reads said data frame information, searches said content addressable memory for said lookup data corresponding to said data frame information, and reads a corresponding subset of said associated tag data; anda tagging circuit, connected to said search circuit and said data frame memory, which writes in said data frame memory a VLAN tag including said corresponding subset of said associated tag data, wherein:said data frame information comprises an associated source address and an associated destination address;said lookup data comprises a plurality of hashes of reference source and destination addresses; andsaid search circuit searches said content addressable memory for one of said Plurality of hashes corresponding to said associated source address and said associated destination address.