Patent ID: 7782277
Filing Date: 2010-08-24
Classification: G09G

Abstract:
1. A display device comprising: a plurality of pixels for displaying an image corresponding to first data currents, each of the pixels including a plurality of sub-pixels; a plurality of scan lines through which scan signals are applied to the plurality of pixels; a plurality of first data lines through which the first data currents are transmitted to the plurality of pixels; a scan driver for outputting the scan signals to the plurality of scan lines; a data driver for transmitting second data currents to a plurality of second data lines; and a demultiplexer comprising a plurality of demultiplexing circuits, each of the demultiplexing circuits for demultiplexing a corresponding one of the second data currents transmitted through one of the second data lines into at least two of the first data currents, and for transmitting the at least two of the first data currents to at least two of the first data lines, wherein a pre-charge voltage is applied to all of the first data lines in the display device before the first data currents are respectively transmitted to the first data lines, wherein at least one of the demultiplexing circuits comprises: wherein the plurality of sample/hold circuits comprise a first group sample/hold circuit and a second group sample/hold circuit, wherein the second group sample/hold circuit outputs at least one of the at least two of the first data currents corresponding to at least one previously sampled said corresponding one of the second data currents for a period when the first group sample/hold circuit samples the corresponding one of the second data currents, and the first group sample/hold circuit outputs at least another one of the at least two of the first data currents corresponding to at least another previously sampled said corresponding one of the second data currents for a period when the second group sample/hold circuit samples the corresponding one of the second data currents, and wherein at least one of the sample/hold circuits comprises: