Patent ID: 6875682
Filing Date: 2005-04-05
Classification: H01L

Abstract:
1. A method of forming a bonding pad that is immune to IMD cracking, comprising: providing a partially processed semiconductor wafer having all metal levels completed; forming a blanket dielectric layer over the uppermost metal level; patterning and etching said dielectric layer to form horizontal and vertical arrays of trenches passing through said dielectric layer such that none of said horizontal trenches completely intersects any of said vertical trenches and separating said dielectric layer into cells, whose dimensions are small compared to dimensions of a bonding pad, such that cracks will not propagate in any direction much beyond a cell before being stopped by a trench in order to limit the propagation of any cracks that may form, filling said trenches with a conducting material and performing CMP over said dielectric layer and said filled trenches to obtain a top surface; depositing bonding metal patterns over said top surface; bonding wires onto said bonding metal patterns; forming a passivation layer over said top surface and said bonding layer patterns.