Patent ID: 6205118
Filing Date: 2001-03-20
Classification: H04L,H04Q

Abstract:
An apparatus for scheduling communications traffic from a node over an ATM network such that a low latency requirement of certain virtual channels (VCs) can be satisfied while maintaining overall high throughput, said apparatus comprising:a VC table including an array of VC descriptors, each said VC descriptor associated with a virtual channel identifier (VCID) pointing to said VC descriptor;at least one time slot ring including an array of time slots, wherein each of said time slots contains a VCID of a VC to be serviced;processing means for placing VCIDs in said time slots of said at least one time slot ring, wherein said time slots are circularly processed and said placed VCIDs are retrieved from said circularly-processed time slots in a continuous fashion to schedule transmission of associated ATM cells in said network; anda plurality of pending queues, said plurality of pending queues including a first pending queue for storing VCIDs associated with low latency VCs, wherein said VCIDs associated with low latency VCs are serviced from the first pending queue before servicing VCIDs other than said VCIDs associated said low latency VCs.