Patent ID: 7298898
Filing Date: 2007-11-20
Classification: G06T

Abstract:
1. A digital signal processing apparatus, comprising: a buffer memory operable to store pixel data; a histogram generating module in communication with the buffer memory, the histogram generating module operable to generate a histogram of the pixel data; a statistics generating module in communication with the buffer memory, the statistics generating module operable to generate statistics regarding the pixel data; a threshold select module for selecting one of a plurality of thresholds and an apply threshold module for applying the selected threshold to data stored in the buffer; and a control module for controlling each of the buffer, histogram, statistics and threshold modules by updating registers in at least one of the buffer, histogram, statistics and threshold modules to cause a re-flow of the data through at least one of the buffer, histogram, statistics and threshold modules, wherein a portion of the data is passed through at least one of the buffer, histogram, statistics and threshold modules at least twice based on the statistics generated for the portion of the re-flowed data, wherein a histogram and exceedance data that exceed the selected threshold are provided to a downstream general purpose processor.