Patent ID: 6775806
Filing Date: 2004-08-10
Classification: G06F

Abstract:
A method for designing an integrated circuit using a computer having a memory, said method comprising:mapping said integrated circuit into locations of said memory as multiple production layers with said multiple production layers including a plurality of data objects; identifying locations in one of said multiple production layers at which to vary data object characteristics; varying said characteristics at said locations to form varied data objects; storing information in said memory concerning said varied data objects as a construction layer; generating a rules file, in response to varying said characteristics, with said rules file including a sequence of commands to determine whether said varied data objects satisfy design rules, with the commands associated with said sequence being dependent upon the production layer, among said multiple production layers with which said varied objects are associated and the characteristics that are varied; and distinguishing said varied data objects that violate said design rules from data objects satisfying said design rules.