Patent ID: 6583047
Filing Date: 2003-06-24
Classification: H01L

Abstract:
A process for producing a microelectronic device which comprises:(a) forming a first dielectric layer on a substrate; (b) forming an optional etch stop layer oil the first dielectric layer; (c) forming a second dielectric layer on the first dielectric layer or the optional etch stop layer; (d) depositing a layer of a photoresist on a top surface of the second dielcctric layer and imagewise removing a portion of the photoresist to define at least one via for the first dielectric layer; (e) removing the portions of each of the layers which are under the removed portions of die photoresist thus forming at least one via down through the first dielectric layer, and removing the balance of the photoresist layer; (f) depositing a protective material on the top surface of the second dielectric layer and on inside walls and a floor of the least one via: (g) depositing an additional layer of a additional photoresist on the protective material and imagewise removing a portion of the additional to define at least one trench for the second dielectric layer; (h) removing the portions of each of the layers which are under the removed portion of the additional photoresist layer thus forming at least one trench down through the second dielectric layer; (i) removing the balance of the additional photoresist layer and the balance of the protective material; (j) lining a barrier metal on inside wails and a floor of the trench, and on inside walls and a floor of the at least one via; and (k) filling the trench and via with a fill metal in contact with the barrier metal lining.