Patent ID: 9219136
Filing Date: 2015-12-22
Classification: H01L

Abstract:
1. A switching element comprising: a first semiconductor layer; a second semiconductor layer formed on an upper surface of the first semiconductor layer, having a wider bandgap than the first semiconductor layer, and forming a heterojunction with the first semiconductor layer; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the first semiconductor layer, and formed to be away from the first electrode in a direction parallel to a surface of the first semiconductor layer; and a control electrode formed on an upper layer of the second semiconductor layer to be located between the first electrode and the second electrode when viewed from a direction perpendicular to the surface, wherein the switching element switches its state, according to a potential of the control electrode, between an on state to electrically connect the first electrode to the second electrode through a two-dimensional carrier gas layer generated in a junction interface between the first semiconductor layer and the second semiconductor layer, and an off state to cut off an electrical connection between the first electrode and the second electrode because the two-dimensional carrier gas layer is not generated at least in the junction interface between the first semiconductor layer and the second semiconductor layer under the control electrode, a third semiconductor layer is formed in a predetermined first region on or above the upper surface of the first semiconductor layer by doping an impurity having the same conductivity type as a carrier constituting the two-dimensional carrier gas layer, the second electrode is electrically connected to the first semiconductor layer through the third semiconductor layer, the third semiconductor layer is formed on a recessed portion of the first semiconductor layer, a side surface of the third semiconductor layer is in contact with the two-dimensional carrier gas layer, and a fourth semiconductor layer having a wider bandgap than the first semiconductor layer is provided between a lower surface of the third semiconductor layer and the upper surface of the first semiconductor layer.