Patent ID: 8786358
Filing Date: 2014-07-22
Classification: G05F

Abstract:
1. A reference voltage circuit, comprising: a first amplifier, including first and second input terminals and provided between a first power source line and a second power source line, configured to output a reference voltage; a second amplifier coupled to the first amplifier, including third and fourth input terminals and provided between the first power source line and the second power source line; an offset adjustment voltage generation circuit configured to generate first and second voltages which are input to the third and fourth input terminals of the second amplifier, and reduce an offset voltage between the first and second input terminals of the first amplifier through the second amplifier; a first load device and a first pn junction device, coupled in series between a reference voltage line to which the reference voltage is applied and the second power source line; and second and third load devices and a second pn junction device, coupled in series between the reference voltage line and the second power source line, wherein the first input terminal is coupled to a coupling node of the first load device and the first pn junction device, and the second input terminal is coupled to a coupling node of the second load device and the third load device, and the offset adjustment voltage generation circuit comprises: