Patent ID: 6546065
Filing Date: 2003-04-08
Classification: H04J

Abstract:
A frame synchronous circuit that continuously receives transmission data including at least synchronizing information and information indicating frame lengths and detects the synchronizing information of the transmission data to set up a synchronization to the transmission data, the frame synchronous circuit comprising:an input control unit that sequentially receives the transmission data, and on the basis of the frame length information of a preceding transmission data controls to send out a subsequent transmission data; a synchronizing information comparison unit that detects an information equivalent to the synchronizing information from the transmission data sent from the input control unit, compares the information detected as the synchronizing information with a predetermined information, and outputs an indication information that indicates a coincidence or non-coincidence of the comparison; a frame length determination unit that determines a frame length on the basis of the information indicating the frame lengths contained in the transmission data, and outputs the frame length as a frame length information; and a counter that counts a detected number of times of the coincidence and a detected number of times of the non-coincidence in accordance with the indication information, and outputs a control signal when the detected number of times of the non-coincidence reaches a predetermined number of times, wherein the input control unit varies the frame length information inputted from the frame length determination unit in accordance with the control signal, and controls to send out the transmission data on the basis of the frame length information varied.