Patent ID: 7187611
Filing Date: 2007-03-06
Classification: G11C

Abstract:
1. A method of using an e-fuse device, the e-fuse device comprising a poly-fuse strip having one end connected to a source/drain region of a MOS transistor, and the other end biased to a voltage (V FS ), wherein, in use, a gate of the MOS transistor receives a step waveform pulse signal that encompasses a pre-heat voltage (V p ) at a first level during a time period (T 1 -T p ) and a maximum input voltage (V IH ) at a second level during a time period (T p -T 2 ), and wherein the pre-heat voltage (V p ) is smaller than the maximum input voltage (V IH ), and the step waveform pulse signal is confined to a minimum input voltage (V IL ) before time T 1 and after time T 2 .