Patent ID: 6100147
Filing Date: 2000-08-08
Classification: H01L

Abstract:
A method for manufacturing a semiconductor structure, comprising the steps of:forming a silicon substrate;forming a pattern on the substrate with mask material, the pattern defining source/drain regions on the substrate;doping with a first implant unmasked portions of the substrate to form source/drain regions of the substrate;removing the mask material from the substrate;growing an oxidation layer on the substrate, wherein mask portions of the oxidation layer formed from doped regions of the substrate have heights that are greater than heights of portions of the oxidation layer formed from un-doped regions of the substrate;doping with a second implant regions of the substrate that are not masked by the mask portions of the oxidation layer;depositing gate electrode material to form a gate electrode layer on the oxidation layer;polishing the gate electrode layer to provide a generally planar surface and expose the mask portions of the oxidation layer; andremoving the mask portions of the oxidation layer to expose source/drain regions of the substrate.