Patent ID: 7743202
Filing Date: 2010-06-22
Classification: G06F

Abstract:
1. An embedded system comprising a processor, a plurality of access devices and a serial flash, wherein the processor and the plurality of access devices send various kinds of commands to read data from or write data to the serial flash, and the embedded system further comprises: a command interpreter, coupled to the processor via a first bus, and operative to interpret a first command to generate a first instruction according to a trapping input, wherein the first command is from the processor; a direct, reader, coupled to the processor and the plurality of access devices via a second bus, operative to process a second command to generate a second instruction according to the trapping input, wherein the second command can be from at least one of the processor and the plurality of access devices; a multiplexer coupled to the direct reader and the command interpreter for selecting a selected instruction from the first instruction and the second instruction to shift to the serial flash for accessing the serial flash; and a prefetch buffer, operative to temporarily store data before data read from the serial flash is received by the processor or the access devices and/or before data is written to the serial flash.