Patent ID: 6225227
Filing Date: 2001-05-01
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device in a wafer having a device formation area and an inspection pattern formation area, the method comprising the steps of:forming an interconnection layer in said device formation area and forming no interconnection layer in said inspection pattern formation area;forming an interlayer insulating film to cover the device formation area and the inspection pattern area;selectively removing said interlayer insulating film to form (1) a first hole exposing a portion of said interconnection layer in said device formation area and (2) a second hole exposing a portion of a silicon layer in said inspection pattern formation area;filling said first and second holes with an aluminum-based alloy;reacting the aluminum-based alloy at the bottom of said second hole with the silicon layer, comprising:diffusing the aluminum-based alloy with the silicon layer, wherein aluminum of the aluminum-based alloy and silicon of the silicon layer mutually diffuse,forming a spike-like indentation in the silicon layer at the bottom of said second hole, as the aluminum and the silicon mutually diffuse, and forming a recess in a surface above said second hole; andverifying that said recess exists in the surface above said second hole, after said reacting step,wherein verified formation of said recess in the surface above said second hole indicates that said first hole in the device formation area does not contain a filling defect, andwherein an absence of said recess above said second hole indicates a filling defect within said first hole in said device formation area.