Patent ID: 8921917
Filing Date: 2014-12-30
Classification: H01L

Abstract:
1. A floating gate transistor comprising: a floating gate transistor substructure including an oxide disposed over a silicon gate disposed over a gate oxide disposed on a substrate, said oxide having a width less than a width of said silicon gate and said silicon gate including a concave upper surface; nitride spacers along sidewalls of said floating gate transistor substructure, including on and directly contacting sidewalls of said silicon gate, said nitride spacers directly covering end portions of said gate oxide that terminate at said sidewalls; an inter-gate dielectric disposed over said floating gate transistor substructure; and a silicon layer with a lower surface over said inter-gate dielectric and said silicon gate, said lower surface facing said silicon gate and including both concave and convex portions overlying an uppermost surface of said floating gate transistor substructure.