Patent ID: 7545355
Filing Date: 2009-06-09
Classification: G09G

Abstract:
1. An image display apparatus comprising: a plurality of signal lines; a plurality of display pixels arranged in a matrix to provide image display, each of said display pixels comprising a pixel electrode connected to said each of the plurality of signal lines via a pixel switch; a plurality of data lines; a plurality of memory cells for storing digital display data; an image signal generating circuit for outputting an image signal to the signal lines based on said digital display data inputted from the plurality of memory cells via the data lines; and wherein each of the plurality of memory cells comprises a memory switch connected to one of said data lines; a memory capacitor connected to said memory switch; and a field-effect transistor of which a source-drain path thereof is provided between a first node and a second node coupled to a corresponding one of said data lines, wherein one electrode of said memory capacitor is connected to a gate of said field-effect transistor and another electrode of said memory capacitor is connected to said second node, and wherein when a memory cell is read or written, a predetermined voltage is supplied to said first node.