Patent ID: 6667870
Filing Date: 2003-12-23
Classification: H05K

Abstract:
An electrostatic discharge (ESD) protection circuit formed on a semiconductor die, the die having a periphery, the ESD protection circuit comprising:an ESD plus ring formed on the die around the periphery of the die; an ESD minus ring formed on the die around the periphery of the die; a trigger ring formed on the die around the periphery of the die; and a plurality of first clamps formed on the die, each first clamp having: a first diode formed on the die, the first diode being connected to a pad and the ESD plus ring; a second diode formed on the die, the second diode being connected to the pad and the ESD minus ring; a first transistor connected to the ESD plus ring, the trigger ring, and a first node; a second transistor connected to the ESD minus ring, the trigger ring, and the first node; and a third transistor connected to the ESD plus ring, the ESD minus ring, and the first node.