Patent ID: 8072021
Filing Date: 2011-12-06
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device comprising: a semiconductor substrate; a memory cell which is provided on the semiconductor substrate, including: first and second diffusion layers, a first gate insulating film which is provided on a first channel region between the first and second diffusion layers, a charge storage layer which is provided on the first gate insulating film, a first inter-electrode insulating film which is in contact with the charge storage layer, and a control gate electrode which is provided on the first inter-electrode insulating film; and a peripheral transistor which is provided on the semiconductor substrate, including: third and fourth diffusion layers, a second gate insulating film which is provided on a second channel region between the third and fourth diffusion layers, a lower electrode which is provided on the second gate insulating film, a blocking insulating film is contact with the lower electrode, a second inter-electrode insulating film which is provided on the blocking insulating film and comprises the same material as the first inter-electrode insulating film, and an upper electrode which is provided on the second inter-electrode insulating film, wherein the lower electrode and the upper electrode are electrically connected via an opening provided on the second inter-electrode insulating film, and the first and second inter-electrode insulating films include a high-permittivity material.