Patent ID: 7391187
Filing Date: 2008-06-24
Classification: G05F,Y10S

Abstract:
1. A voltage regulator circuit comprising: at least one input node for receiving an input voltage; an output node across which an output voltage is measured, wherein said output node supplies a load current (Iload); an amplifier circuit with a first input coupled to a reference voltage source and which receives a bias current that is a pre-established, constant, proportionate size of the load current; wherein the amplifier circuit comprises a series of paired, parallel transistors that have similar geometries and maintain substantially the same drain-to-source voltage potential, and wherein each pair of parallel transistors tracks each other's voltage as changes in said voltage is registered by changes in Iload; and wherein a change in the load current provides a resulting proportionate change in the bias current such that a substantially accurate and linear output voltage is measured across the output node.