Patent ID: 8612509
Filing Date: 2013-12-17
Classification: G06F

Abstract:
1. A method of resetting a point-to-point inter-processor data communications link in a server, the server comprising a processor, a reset sync module, and a baseboard management controller, the point-to-point inter-processor data communications link comprising a bidirectional, serial/parallel, high-bandwidth, low-latency data communications link, the method comprising: reassigning, by a management module, a gate signal from enabling a transceiver to signaling a point-to-point inter-processor data communications link reset, the management module coupled to the baseboard management controller through a data communications bus; sending, by the blade management module to the reset sync module on an out-of-band bus, the gate signal; and in response to the gate signal, sending, by the reset sync module to the server's processor, point-to-point inter-processor data communications reset signals.