Patent ID: 9165945
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure, comprising: providing a multi-layer substrate, including: implanting ions into a second region of the strained semiconductor layer without implanting ions into a first region of the strained semiconductor layer and converting a portion of the crystalline semiconductor material in the second region of the strained semiconductor layer to amorphous material such that the second region of the strained semiconductor layer has an amorphous region and an underlying crystalline region; recrystallizing the amorphous region; diffusing elements from one portion of the second region of the strained semiconductor layer into another portion of the strained semiconductor layer so as to enrich a concentration of the diffused elements in the another portion of the second region of the strained semiconductor layer and alter a strain state of the second region of the strained semiconductor layer such that the second region of the strained semiconductor layer is in a strain state differing from a strain state of the first region of the strained semiconductor layer; and forming a first plurality of transistor channel structures each comprising a portion of the first region of the semiconductor layer and a second plurality of transistor channel structures each comprising a portion of the second region of the semiconductor layer.