Patent ID: 6355952
Filing Date: 2002-03-12
Classification: H01L

Abstract:
A capacitor in a nonvolatile memory cell comprising:an intermediate insulator layer formed on a substrate; a first protective layer formed on said intermediate insulator layer, said first protective layer including first and second lower sub-layers wherein said first lower sub-layer is composed of a material selected from the group consisting of Group IVa transition metal, Group Va transition metal, nickel and palladium, and wherein said second lower sub-layer is composed of a material selected from the group consisting of Group IVa transition metal nitride, Group Va transition metal nitride and silicon nitride; a lower electrode formed on said first protective layer; a ferroelectric thin film formed on said lower electrode; an insulator layer formed over said ferroelectric thin film, said lower electrode and said first protective layer and connected to said intermediate insulator layer, wherein an upper opening is maintained in said insulator layer exposing a top surface of said ferroelectric thin film; an upper electrode formed over both said top surface of said ferroelectric thin film and a top surface of said insulator layer; a second protective layer formed over an entire upper surface of said upper electrode and external to said insulator layer, said second protective layer including a first upper sub-layer composed of a material selected from the group consisting of Group IVa transition metal nitride, Group Va transition metal nitride and silicon nitride, and further including a second upper sub-layer composed of a material selected from the group consisting of Group IVa transition metal, group Va transition metal, nickel and palladium; and an upper insulator layer formed over a substantial upper surface of said second protective layer wherein an upper insulator layer opening is maintained in said upper insulator layer, at least a portion of said upper insulator layer opening being aligned with at least a portion of said upper opening of said insulator layer, and wherein sections of both said upper electrode and said second protective layer which are outward of said upper opening of said insulator layer are positioned between said insulator layer and said upper insulator layer.