Patent ID: 6490608
Filing Date: 2002-12-03
Classification: G06F

Abstract:
A method of constructing a parallel multiplier comprising the steps of:a) constructing an input matrix for said parallel multiplier; b) determining a depth K of said input matrix; c) calculating maximum stage capacity numbers for said input matrix, said maximum stage capacity numbers comprising &dgr;L-1 and &dgr;L, wherein &dgr;L-1 denotes a maximum stage capacity at a stage (L-1) and &dgr;L denotes a maximum stage capacity at a stage L wherein &dgr;L-1L; d) determining whether said input matrix is reducible within (L-1) reduction stages; and e) provided that said input matrix is reducible within (L-1) reduction stages, constructing a first reduction tree having (L-1) reduction stages for said parallel multiplier.