Patent ID: 7154720
Filing Date: 2006-12-26
Classification: H01L

Abstract:
1. A semiconductor integrated circuit device comprising: at least two internal circuits arranged internally in a circuit forming region, each of said two internal circuits having a different pair of power lines; a first and a second inter-circuit signal wires, different from said power lines, arranged to interconnect said two internal circuits; a first transistor on a reception side of said first inter-circuit signal wire and connected to said first inter-circuit signal wire, in a first one of said two internal circuits; a plurality of second transistors, for protecting said first transistor, being arranged adjacent to said first transistor in said first one of said two internal circuits and including a transistor of an identical structure to said first transistor; a third transistor on a reception side of said second inter-circuit signal wire and connected to said second inter-circuit signal wire, in a second one of said two internal circuits; a plurality of fourth transistors, for protecting said third transistor, being arranged adjacent to said third transistor in the said second one of said two internal circuits and including a transistor of an identical structure to said third transistor; a first inter-circuit auxiliary wire, different from said power lines, connected to a first static area near a location on a transmission side, at which said first inter-circuit signal wire is connected, and to said plurality of second transistors; and a second inter-circuit auxiliary wire, different from said power lines, connected to a second static area near a location on a transmission side, at which said second inter-circuit signal wire is connected, and to said plurality of fourth transistors.