Patent ID: 7453141
Filing Date: 2008-11-18
Classification: H01L,H05K

Abstract:
1. A semiconductor device package, comprising: a board including at least one of a ground plane and a power plane; a wiring pattern which is formed on a side of a front surface of the board; a first external connection portion connecting the wiring pattern externally which is formed on the front surface side of the board; an opening portion formed in the board; at least one connecting conductor portion which is formed on an inner wall of the opening portion, and electrically connected to the corresponding one of said at least one of the ground plane and the power plane; at least one bonding pattern which is formed on the front surface side of the board, and connected to the corresponding connecting conductor portion; a second external connection portion which is formed on the front surface side of the board, and electrically connected to the corresponding one of said at least one of the ground plane and the power plane through a through-hole conductor portion formed in the board; a semiconductor chip mounted on a side of a back surface of the board, the semiconductor chip having a first terminal portion and a second terminal portion both facing the opening portion; a first wire for electrically connecting the wiring pattern and the first terminal portion through the opening portion; and a second wire for electrically connecting the bonding pattern and the second terminal portion through the opening portion.