Patent ID: 8184475
Filing Date: 2012-05-22
Classification: G11C

Abstract:
1. An integrated circuit including a static random access memory, comprising: a static random access memory (“SRAM”) array including an array of memory cells arranged in columns, each column of memory cells being connected to true and complementary read local bitlines RLBLT and RLBLC; a local bit-select circuit connected to memory cells of the SRAM array, the local bit-select circuit including: first and second pull-down devices, each having a current conduction path connected to one of RLBLT and RLBLC to pull down a voltage of a respective one of RLBLT and RLBLC at a timing controlled by a write control signal WRT; a pair of cross-coupled p-type field effect transistors (“PFETs”) including a first PFET having a gate connected to RLBLT and having a drain connected to RLBLC, and a second PFET of the pair having a gate connected to RLBLC and having a drain connected to RLBLT; a first device having a current conduction path connected between sources of the cross-coupled PFETs and a first voltage supply; a pair of cross-coupled n-type field effect transistors (“NFETs”) including a first NFET having a source coupled to RLBLT and having a gate connected to the pull-down device whose current conduction path is connected to RLBLC, and a second NFET having a source coupled to RLBLC and having a gate connected to the pull-down device whose current conduction path is connected to RLBLT; and a second device having a current conduction path connected between sources of the cross-coupled NFETs and a second voltage supply, the first and second devices being controlled by applying a first signal to the first device, applying a second signal to the second device, the first and second signals having programmed levels, the programmed levels being less than a voltage of at least one of said first or second voltage supplies, wherein the first and second signals selectively activate either the first device or the second device, so as to selectively activate either the cross-coupled PFETs or the cross-coupled NFETs.