Patent ID: 8908457
Filing Date: 2014-12-09
Classification: G11C

Abstract:
1. A device comprising: a bit line; a power line supplied with a power voltage; a sense amplifier circuit amplifying a voltage of the bit line by using the power voltage of the power line; a first line and a second line; a first voltage generating circuit configured to supply a first voltage to the first line; a second voltage generating circuit configured to supply a second voltage to the second line, the second voltage being lower than the first voltage; a control circuit configured to respond to an active command and supply, as the power voltage, the power line with the first voltage during a first period and the second voltage during a second period, the control circuit being further configured to respond to a refresh command and supply, as the power voltage, the power line with the second voltage during both the first and second periods; a first standby power supply circuit configured to supply the first line with the first voltage during a third period excluding the first and second periods; and a second standby power supply circuit configured to supply the second line with the second voltage during the third period.