Patent ID: 8117590
Filing Date: 2012-02-14
Classification: G06F

Abstract:
1. A program developing apparatus comprising: a processor coupled to a memory, the memory stores instructions that are executed by the processor; a dividing unit configured to divide codes included in a first source code into a plurality of groups virtually corresponding to independent output variables; a partitioning unit configured to partition each group into one or more sections corresponding to detected internal states based on def-use analysis on the independent output variables included in the group made up of one or more codes which should be sequentially executed; a storage configured to store the sections, each having one or more codes; a setting unit configured to set constraints of an execution order among the sections on a basis of the first source code; a first exhibiting unit configured to exhibit contents of the storage to a user; a second exhibiting unit configured to exhibit constraint information representing the constraints of the execution order to the user; a first editing unit configured to edit the contents of the storage based on a first editing command from the user; a second editing unit configured to edit the constraint information based on a second editing command from the user; and a synthesizing unit configured to synthesize the first source code and edited contents of the storage into a second source code according to edited constraint information.