Patent ID: 6734713
Filing Date: 2004-05-11
Classification: H03K

Abstract:
A transistor circuit for implementing a differential switch, comprising:a first switch node configured to connect to an external circuit; a second switch node configured to connect to the external circuit; a first transistor device having a first terminal connected to the first switch node, a second terminal, and a third terminal configured to receive a control signal that controls the electrical connectivity between the first terminal and the second terminal; a second transistor device having a first terminal connected to the second terminal of the first transistor device, a second terminal connected to the second switch node, and a third terminal configured to receive the control signal; and a third transistor device having a first terminal connected to the first terminal of the first transistor device, a second terminal connected to the second terminal of the second transistor device, and a third terminal configured to receive the control signal, the third transistor device configured with predetermined parasitic characteristics that improve the effect of the parasitic characteristics of the transistor circuit when the control signal enables the first transistor device, the second transistor device, and the third transistor device.