Patent ID: 8159813
Filing Date: 2012-04-17
Classification: H01G,H01L

Abstract:
1. A multilayer chip capacitor comprising: a capacitor body having a plurality of dielectric layers laminated therein, the capacitor body comprising first and second capacitor units arranged in a laminated direction, wherein: first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively, wherein the first and third outer electrodes have polarity identical to each other, and the second and fourth outer electrodes have polarity identical to each other but different from the polarity of the first outer electrode, the first capacitor unit comprises first and second inner electrodes alternately arranged in the capacitor body to oppose each other while interposing a corresponding one of the dielectric layers, the first and second inner electrodes connected to the first and second outer electrodes, respectively to have polarity different from each other, the second capacitor unit comprises third and fourth inner electrodes alternately arranged in the capacitor body to oppose each other while interposing another corresponding one of the dielectric layers, the third and fourth inner electrodes connected to the third and fourth outer electrodes, respectively to have polarity different from each other, the first capacitor unit and the second capacitor unit are electrically insulated from each other in the multilayer chip capacitor, the first capacitor unit operates in a first frequency range and the second capacitor unit operates in a second frequency range lower than the first frequency range, the multilayer chip capacitor is a four-terminal capacitor comprising a respective one of the first to fourth outer electrodes, and the first to fourth inner electrodes are connected to the first to fourth outer electrodes, respectively by one lead.