Patent ID: 6424199
Filing Date: 2002-07-23
Classification: G11C,H03K,H03L

Abstract:
A semiconductor device supplied with first and second external clocks 180 degree out of phase with each other, from an external source, comprising:a first clock input circuit including a first variable delay circuit, supplied with said first external clock for outputting a first internal clock; a second clock input circuit including a second variable delay circuit, supplied with said second external clock for outputting a second internal clock; a phase difference detection circuit for detecting the phase difference between the first external clock and the first internal clock or the phase difference between the second external clock and the second internal clock, for outputting a common control signal of said first and second variable delay circuits; a synthesizer for synthesizing said first and second internal clocks and generating an internal clock having a frequency twice as high as that of said first and second external clocks; and an internal circuit supplied with said internal clock.