Patent ID: 8710887
Filing Date: 2014-04-29
Classification: G09G,G11C,H03K

Abstract:
1. A semiconductor device comprising: a pixel portion; a first flip flop; a second flip flop; and a first circuit comprising: wherein an input terminal of the inverter is electrically connected to a first electrode of the capacitor, wherein one of a source and a drain of the first transistor is electrically connected to the input terminal of the inverter, wherein the other of the source and the drain of the first transistor is electrically connected to an output terminal of the inverter, wherein one of a source and a drain of the second transistor is electrically connected to a second electrode of the capacitor, wherein one of a source and a drain of the third transistor is electrically connected to the second electrode of the capacitor, wherein the other of the source and the drain of the second transistor is electrically connected to the first wiring, wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring, wherein a gate of the third transistor is electrically connected to the first flip flop, wherein a gate of the first transistor and a gate of the second transistor are electrically connected to the second flip flop, and wherein the pixel portion and the first circuit are formed on a same substrate.