Patent ID: 9083507
Filing Date: 2015-07-14
Classification: G09C,H04L

Abstract:
1. A data processing device comprising: a data conversion processing circuitry configured to divide and input configuration bits of data to be processed into a plurality of lines, and to repeatedly execute a data conversion processing as to the data in each line; wherein the data conversion processing circuitry includes an F function executing unit configured to input one line of data configuring the plurality of lines, and to generate conversion data; wherein the F function executing unit includes a non-linear conversion processing circuitry configured to execute a non-linear conversion processing; wherein the non-linear conversion processing circuitry includes a repeating structure of n number of non-linear calculation units and n−1 number of bit replacement units, each of the n−1 number of bit replacement units being between a pair of the n number of non-linear calculation units, and outputs n bits of data where n is an integer greater than one.