Patent ID: 7662647
Filing Date: 2010-02-16
Classification: G01R

Abstract:
1. A method for manufacturing a semiconductor device, comprising: arranging a semiconductor device, a burn-in test device, and a burn-in board to test said semiconductor device by use of said burn-in test device and said burn-in board, wherein said burn-in board has a first socket having fewer contact pins than there are terminals on said semiconductor device; electrically connecting at least one of said terminals to at least one of said contact pins; supplying a burn-in input signal from said burn-in test device to said semiconductor device to perform a burn-in test; monitoring a portion of an output signal from said semiconductor device to determine a degree of degradation associated with said semiconductor device; arranging an electrical characteristic test device and a test substrate, after the completion of said burn-in test, to test said semiconductor device using said electrical characteristic test device and said test substrate, wherein said test substrate has a second socket having fewer contact pins than there are terminals on said semiconductor device; electrically connecting a plurality of said terminals to a plurality of said contact pins of said second socket; and supplying an input signal from said electrical characteristic test device to said semiconductor device to perform an electrical characteristic test.