Patent ID: 9140976
Filing Date: 2015-09-22
Classification: G03F,G11C

Abstract:
1. A lithographic mask comprising: a plurality of via patterns on a mask defining a plurality of vias on a wafer, the plurality of via patterns having via locations on the mask at particular intersections of a set of neighboring via row positions having a row pitch on the mask and a set of neighboring via column positions having a column pitch on the mask, via patterns in the plurality of via patterns including combinations of via features and optical proximity correction features for the via features, the combinations having a length on the mask greater than the column pitch and a width on the mask greater than the row pitch, and the via patterns in the plurality of via patterns are non-overlapping with other via patterns in the plurality of via patterns, wherein a first integer difference between rows of the via locations in adjacent columns of the set of neighboring via column positions is equal to a via row pitch integer of R rows, and a second integer difference between columns of the via locations in adjacent rows of the set of neighboring via row positions is equal to a via column pitch integer of C columns, wherein an integer D is equal to one of: (i) a square root of an integer N of the number of the plurality of via patterns, rounded up to a nearest higher integer; and (ii) the square root of the integer N of the number of the plurality of via patterns, rounded down to a nearest lower integer, and the integer D is equal to at least one of the via row pitch integer of R rows and the via column pitch integer of C columns.