Patent ID: 7398424
Filing Date: 2008-07-08
Classification: G06F

Abstract:
1. A computer-readable medium having a false path detection program for detecting false paths of a designed circuit, wherein said false path detection program causes a computer to perform the steps comprising: receiving circuit information about the circuit and storing the circuit information in a storage device; generating an impossible signal value with respect to a signal line in the circuit; assigning the generated impossible signal value to an input of a gate connected to the signal line and examining whether a signal on the signal line is propagated through another signal line of the gate only when accompanied by the impossible signal value; acquiring a passing point of the other signal line connected to the other input of the gate if signal is propagated; and specifying a false path by the passing point; wherein said impossible signal value generating step includes: generating a signal value on the basis of a constant signal applied to the signal line; generating signal values on the basis of equivalent signals applied to equivalent signal lines in the circuit or exclusive signals applied to exclusive signal lines in the circuit; generating signal values on the basis of implication signals applied to signal lines having an implication relation; and controlling generation of the signal values such that the signal values are generated by said signal value generating steps on the basis of the constant signal, the equivalent signals and the implication signals, in order mentioned.