Patent ID: 7945825
Filing Date: 2011-05-17
Classification: G06F,G11C

Abstract:
1. A method of programming a set of erased non-volatile memory (NVM) cells comprising: loading data to be programmed to the NVM cells onto a first set of Static Random Memory (SRAM) bits, wherein each of one or more SRAM bits corresponds to an NVM cell; flipping each of the one or more SRAM bits corresponding to a given NVM cell once the given NVM cell has been program verified; copying data back from each of the program verified NVM cells to respective corresponding one or more SRAM bits of the first set in the event an NVM cell cannot be program verified, wherein copying data back includes reading the NVM cells using a first read reference level; and performing error detection on the bits of the SRAM once copying has been completed.