Patent ID: 8575007
Filing Date: 2013-11-05
Classification: G06F,H01L

Abstract:
1. A method for designing a flip chip, the method comprising the steps of: providing the flip chip, wherein the flip chip comprises: receiving a plurality of maximum electrical currents that may flow through the plurality of C4 bumps, wherein each maximum electrical current of the plurality of maximum electrical currents corresponds to one or more C4 bumps of the plurality of C4 bumps; determining a level of susceptibility to electromigration damage that meets or exceeds a threshold level of susceptibility for one or more C4 bumps of the plurality of C4 bumps corresponding to a certain maximum electrical current of the plurality of maximum electrical currents, wherein the level of susceptibility is based on a ratio determined by dividing a failure rate for a C4 bump of the plurality of C4 bumps corresponding to the certain maximum electrical current by a sum of failure rates for a C4 bump of the plurality of C4 bumps corresponding to each maximum electrical current of the plurality of maximum electrical currents; in response to determining the level of susceptibility, plating a conductive structure with a high electrical current carrying capacity onto one or more I/O contact pads of the plurality of I/O contact pads, wherein the one or more I/O contact pads correspond to the one or more C4 bumps of the plurality of C4 bumps corresponding to the certain maximum electrical current; and adding a solder ball to a top portion of each plated conductive structure.