Patent ID: 6639420
Filing Date: 2003-10-28
Classification: G01R

Abstract:
A method to test multiple integrated circuit device designs using a single probe card design, said method comprising:providing a plurality of integrated circuit device designs each having a two dimensional probe pad array comprising a fixed pitch wherein said probe pad array is greater than two rows and greater than two columns; loading a first said integrated circuit device having a first design on a probing stage; probing said first integrated circuit device using a vertical probe card comprising a two dimensional probe tip array wherein said probe tip array comprises the same said fixed pitch, wherein said probe tip array is greater than two rows and greater than said two columns, and wherein an automated tester is thereby coupled to said first integrated circuit device; testing said first integrated circuit device with said automated tester; and repeating said steps of loading, probing, and testing, on at least one other said integrated circuit device having a differing design than said first integrated circuit device.