Patent ID: 6088751
Filing Date: 2000-07-11
Classification: G06F

Abstract:
A flexible bus arbitration system for a PCI (peripheral component interconnect) bus system, comprising:a PCI bus;a PCI initiator agent coupled to said PCI bus, said PCI initiator agent adapted to communicate via said PCI bus;a PCI target agent coupled to said PCI bus, said PCI target agent adapted to communicate via said PCI bus;a PCI arbiter coupled to said PCI bus, said PCI arbiter adapted to communicate via said PCI bus;a reconfigurable priority arbitration system coupled to said PCI bus, wherein said reconfigurable priority arbitration system adapted to receive reprogrammable priorities, said reconfigurable priority arbitration system further adapted to control access to said PCI bus;a first logic component coupled to said PCI bus, said first logic component for implementing said arbitration priority scheme; anda second logic component coupled to said first logic component, said second logic component adapted to deassert a bus grant if said first logic component is attempting to switch a bus grant while said PCI bus is idle.