Patent ID: 6759706
Filing Date: 2004-07-06
Classification: H01L

Abstract:
A memory device comprising:a memory cell region comprised of a memory cell array comprising a plurality of memory cells arranged as a matrix, each of said memory cells comprising first MOS field effect transistors each having a first well region formed in a semiconductor substrate, a first diffusion layer formed in said first well region and designed to function as source and drain, a floating gate formed on said well with the interposition of a tunnel dielectric film, and a control gate formed above said floating gate with the interposition of an interpoly dielectric film, and a peripheral circuit region having disposed therein a plurality of second MOS field effect transistors, each unitary transistor having a second well region formed in a semiconductor substrate, a second diffusion layer formed in said second well and designed to function as source and drain, and gate electrodes formed on said second well with the interposition of a gate insulating film, wherein isolation between said plurality of second MOS field effect transistors is effected by a shallow groove isolation method, and at least one of said gate insulating films of said plurality of second MOS field effect transistors comprises a first deposited insulating film deposited on the semiconductor substrate, wherein each of the interpoly dielectric film comprises a second deposited insulating film deposited on said floating gates which is substantially equal to said first insulating film in thickness, wherein said second deposited insulating film is also deposited on said peripheral circuit region to comprise at least a portion of the gate insulating films of the second MOS field effect transistors, wherein said first and second deposited insulating films are silicon oxide films, wherein nitrogen is introduced into said silicon oxide films, and wherein the nitrogen concentration in said second deposited insulating film is higher than that in the first decorated insulating film.