Patent ID: 7306466
Filing Date: 2007-12-11
Classification: H01L,H05K

Abstract:
1. An electrical printed circuit board arrangement configured for connection to an integrated circuit, comprising: a printed circuit board comprising a dielectric material; at least one ground inner layer extending within the printed circuit board, and configured to connect to a ground potential; a supply voltage inner layer extending within the printed circuit board, and configured to connect to a supply voltage potential; at least one locally formed inner layer extending within the printed circuit board and physically isolated from the supply voltage inner layer, but electrically connected thereto; a first external terminal contact on the printed circuit board surface, the first external terminal contact being configured to provide electrical connection to a ground terminal of the integrated circuit when the integrated circuit is mounted on the printed circuit board surface; a second external terminal contact on the printed circuit board surface, the second external terminal contact being configured to provide electrical connection to a supply voltage terminal of the integrated circuit when the integrated circuit is mounted on the printed circuit board surface; a first contact-connection arranged below the integrated circuit when the integrated circuit is mounted on the printed circuit board surface, and the first contact-connection extending generally vertically through a portion of the printed circuit board between the first external terminal contact and the at least one ground inner layer; and a second contact-connection arranged below the integrated circuit when the integrated circuit is mounted on the printed circuit board surface, and the second contact-connection extending generally vertically through a portion of the printed circuit board between the second external terminal contact and the at least one locally formed inner layer, wherein the at least one locally formed inner layer and the at least one ground inner layer are spatially positioned with respect to one another to form a printed circuit board decoupling capacitor for the integrated circuit, the decoupling capacitor being located within the printed circuit board and being electrically connected across the first and second contact-connections.