Patent ID: 6670802
Filing Date: 2003-12-30
Classification: G11C

Abstract:
An integrated circuit, comprising:a functional unit, the integrated circuit having a first operating mode functioning as a test operating mode for functionally testing said functional unit, and a second operating mode for operating said functional unit in a normal operating mode; a data output driver coupled to said functional unit; a data input signal path coupled to said functional unit; data terminals for data signals for feeding in and picking off data values, said data terminals coupled to said data output driver and to said data input signal path; an input terminal for feeding in a control signal; and a control circuit coupled to said input terminal, to said data output driver, and to said data input signal path and, in a manner dependent on a set operating mode, said control circuit during the normal operating mode switches said data input signal path on or off as a result of different states of the control signal, and in the test operating mode, said control circuit switches said data output driver on or off as a result of the different states of the control signal, said control circuit containing a multiplexer and a demultiplexer, said demultiplexer having inputs connected to said input terminal and receiving and being controlled by a second control signal, said demultiplexer having outputs and one of said outputs of said demultiplexer being connected to and controlling said multiplexer, said multiplexer having inputs receiving a constant signal level and a third control signal for setting a read operating mode, said multiplexer having an output connected to said data output driver and outputs an output signal for switching on or off said data output driver.