Patent ID: 7125782
Filing Date: 2006-10-24
Classification: H01L

Abstract:
1. A method of forming insulating regions between conductive lines of a semiconductor device, the method comprising: providing a workpiece, the workpiece comprising a first region and a second region; depositing a first insulating material over the workpiece; depositing a second insulating material over the first insulating material; patterning the second insulating material and the first insulating material with a pattern for a plurality of conductive lines in the first region and the second region; and filling the patterns in the second insulating material and the first insulating material to form a plurality of conductive lines, such that the plurality of conductive lines overlie the workpiece in the first region and the second region and the first insulating material is disposed between the plurality of conductive lines in at least the first region of the workpiece, and wherein the second insulating material overlies at least the first insulating material; exposing the workpiece to energy; and removing at least a portion of the first insulating material in the first region between the plurality of conductive lines through the second insulating material.