Patent ID: 6104209
Filing Date: 2000-08-15
Classification: G11C,H03K

Abstract:
An input buffer comprising:a differential amplifier including:first and second inverter circuits having control nodes for receiving respective true and complementary input signals and having output nodes for outputting respective true and complementary amplified signals;third and fourth inverter circuits having control nodes for receiving the respective true and complementary input signals and having mutually coupled output nodes;a first current source having a supply node for receiving a supply voltage, a control node coupled to the output nodes of the third and fourth inverter circuits, and an output node coupled to supply nodes of the first, second, third, and fourth inverter circuits; anda second current source having a reference node for receiving a reference voltage, a control node coupled to the output nodes of the third and fourth inverter circuits, and an input node coupled to reference nodes of the first, second, third, and fourth inverter circuits; andswitching circuitry coupled to the differential amplifier for outputting true and complementary output signals in response to the true and complementary amplified signals.