Patent ID: 8969965
Filing Date: 2015-03-03
Classification: H01L

Abstract:
1. A field effect transistor device, comprising: a source region; a drain region; a plurality of fins connecting the source region and the drain region, wherein the fins serve as a channel region of the device, and wherein the fins have a pitch of from about 20 nm to about 200 nm and each of the fins has a width of from about 2 nm to about 40 nm; a metal gate which at least partially surrounds each of the fins, wherein the source and the drain regions are self-aligned with the metal gate; a dielectric filler layer around the metal gate; a first set of spacers between the dielectric filler layer and the metal gate, wherein the fins are present only between the first set of spacers; and a second set of spacers between the first set of spacers and the metal gate, wherein the second set of spacers is present over the fins.