Patent ID: 6225171
Filing Date: 2001-05-01
Classification: H01L

Abstract:
A method to form a shallow trench isolation feature of an integrated circuit on the surface of a semiconductor substrate, comprising the steps of:providing a semiconductor substrate having a surface coated with at least one layer of an insulating material and a plurality of shallow trenches formed in the surface of said semiconductor substrate;growing a nitrogen doped insulating layer on internal surfaces of the shallow trenches, by exposing said internal surfaces to a nitrogen rich and oxygen rich atmosphere to thermally grow a silicon nitride layer on said internal surfaces of the shallow trenches;depositing a gap fill insulating layer upon the surface of the semiconductor substrate to fill the shallow trenches; andplanarizing the gap fill insulating layer to remove excess material of the gap fill insulating layer from the surface of the semiconductor substrate while leaving the gap fill insulating layer within the shallow trenches.