Patent ID: 8665248
Filing Date: 2014-03-04
Classification: G09G

Abstract:
1. A drive circuit comprising: a first p-typed thin film transistor having a source, a drain directly connected to a first electrical line and a gate directly connected to a first clock line different from said first electrical line; a second p-typed thin film transistor having a gate, a drain coupled to a second clock line and a source coupled to an output; a first n-typed thin film transistor having a drain, a source directly connected to a second electrical line applied with a first voltage level and a gate directly connected to an output of a preceding drive circuit; a second n-typed thin film transistor having a source directly connected to a third electrical line applied with a negative voltage level different from said first voltage level, a gate directly connected to a third clock line different from said output of said preceding drive circuit and a drain coupled to said output; and a capacitor having one end directly connected to said second electrical line and another end directly connected to said source of said first p-typed thin film transistor, said drain of said first n-typed thin film transistor and said gate of said second p-typed thin film transistor.