Patent ID: 8468483
Filing Date: 2013-06-18
Classification: G06F

Abstract:
1. A method for performing a parameterized statistical static timing analysis, said method comprising: determining an interdependence between a setup time margin and a hold time margin of a circuit block in statistical parameterized form, performing, by a computer system, a parameterized statistical static timing analysis of a circuit comprising said circuit block; based on said parameterized statistical static timing analysis, determining, by said computer system and in statistical parameterized form, a setup time and a hold time for said circuit block in said circuit; based on said interdependence between said setup time margin and said hold time margin, formulating, by said computer system and in statistical parameterized form, a setup time constraint and a hold time constraint for said circuit block in said circuit; and, checking, by said computer system, said setup time and said hold time against said setup time constraint and said hold time constraint.