Patent ID: 8497548
Filing Date: 2013-07-30
Classification: H01L

Abstract:
1. A semiconductor device including a MOS transistor, comprising: a semiconductor substrate; at least two semiconductor pillars of a first conductivity type in the semiconductor substrate and having a top surface; a bottom doped region in the semiconductor substrate and surrounding a periphery of a lower part of the at least two semiconductor pillars; a first gate around a sidewall of the at least two semiconductor pillars and separated therefrom by a first dielectric film; and a top doped region of a second conductivity type at least partially overlapping a top surface of the at least two semiconductor pillars and sufficiently extensive so as to provide a common top doped region for the at least two semiconductor pillars, wherein the common top doped region has a top surface having an area greater than that of the top surface of the at least two semiconductor pillars.