Patent ID: 6100145
Filing Date: 2000-08-08
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, which method comprises:forming conductive gates and dielectric field oxide regions on a main surface of a semiconductor substrate;implanting impurities into the substrate to form source/drain regions having a junction with the substrate;forming a silicon layer on the source/drain regions, field oxide regions, and side and top surfaces of the gates;forming a protective non-conductive layer on the silicon layer;anisotropically etching the protective non-conductive layer to expose the silicon layer on the source/drain regions and the top surfaces of the gates and to form protective spacers on the silicon layer on the side surfaces of the gates and on field oxide edges where the field oxide regions abut the main surface;forming a metal layer on the exposed silicon layer; andheating to form a metal silicide layer from the metal layer and the exposed silicon layer;wherein the metal silicide layer is formed above the junction and is spaced apart from the junction.