Patent ID: 7689954
Filing Date: 2010-03-30
Classification: G06F

Abstract:
1. A method for predicting the signal delay in a circuit having circuit paths formed by elements connected by interconnects wherein: (1) at least some of the circuit paths intersect; (2) all elements and interconnects each: (i) an adjacent upstream element or interconnect from which a signal delay is propagated, and (ii) an adjacent downstream element or interconnect to which the signal delay D is propagated; (3) at least one set of correlated signal delays is present, wherein at least one of the signal delays D (4) one or more sets of correlated signal delays arise from global variations, the method comprising the following steps at any path intersection wherein at least two circuit paths intersect, with a first circuit path having a signal delay D a. modeling each signal delay D by a function dependent on wherein: M is the number of global variations in the circuit; G Γ b. evaluating using a computer the gaussianity of the function MAX(D c. if the gaussianity does not meet a threshold standard, storing signal delays D d. propagating the signal delay tuple Mt to any downstream element or interconnect using the computer.