Patent ID: 7049653
Filing Date: 2006-05-23
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor layer; a first insulating film formed on said semiconductor layer; a first electrode layer formed on said first insulating film; an element isolating region comprising an element isolating insulating film formed to extend through said first electrode layer and said first insulating film to reach an inner region of said semiconductor layer, said element isolating region isolating an element region and being self-aligned with said first electrode layer; a second insulating film formed on said first electrode layer and said element isolating region, an open portion exposing a surface of said first electrode layer being formed in said second insulating film; and a second electrode layer formed on said second insulating film and said exposed surface of said first electrode layer, said second electrode layer being electrically connected to said first electrode layer via said open portion, and a gate electrode being formed of said first and second electrode layers, wherein a plurality of gate electrodes, includes said gate electrode, are arranged on a chip, the open portions of the gate electrodes are equal to each other in width, and the gate electrodes are different from each other in gate length.