Patent ID: 6420231
Filing Date: 2002-07-16
Classification: H01L

Abstract:
A self-aligned method of processing a first layer of material on a semiconductor substrate, comprising:forming reference elements on the first layer that have a uniform dimension and a uniform spacing in at least one direction across the first layer, thereafter forming spacers along edges of the reference elements that face said at least one direction in a manner defining spaces between them, thereafter performing a first processing of the first layer of material through the spaces by using the reference elements and spacers as a first mask against the first processing of portions of the first layer not exposed through the spaces, thereafter removing the spacers, thereby leaving open regions between the reference elements in said at least one direction, thereafter filling the open regions between the reference elements with a second layer of material in a manner that leaves top surfaces of the reference elements exposed, thereafter removing the reference elements, thereby leaving openings between areas of the second layer of material in said at least one direction where the reference elements had been positioned, and thereafter performing a second processing of the first layer of material through the openings by using the second layer of material as a mask against the second processing of portions of the first layer not exposed through the openings, whereby the first and second processing is performed at self-aligned positions across the first layer in at least said one direction.