Patent ID: 6680988
Filing Date: 2004-01-20
Classification: H03K,H03L,H04L

Abstract:
A clock extraction circuit comprising:a differential circuit operable to differentiate an input data signal at a rising or falling edge thereof and to generate a differential pulse; a first monostable multivibrator connected with said differential circuit and operable to output a first pulse signal in synchronization with the differential pulse; a second monostable multivibrator connected with said first monostable multivibrator and operable to output a second pulse signal in synchronization with the first pulse signal; an OR circuit operable to carry out a logical OR between the first pulse signal and the second pulse signal; and circuitry connected with said OR circuit and operable to variably chance the pulse width of the output pulse signal outputted from said OR circuit, wherein said circuitry comprises a delay circuit operable to delay the output pulse signal from said OR circuit and an RS flip-flop circuit operable to be set by the output signal from said OR circuit and to be reset by the output signal from said delay circuit.