Patent ID: 6486016
Filing Date: 2002-11-26
Classification: H01L

Abstract:
A method for forming a self aligned contact of a semiconductor device, comprising the steps of:forming a conductive line and a hard mask having sidewalls on a structure of a semiconductor substrate; forming spacers comprising an insulation material on the sidewalls of the conductive line and the hard mask; forming an interlayer insulating layer on the resultant material and then etching the interlayer insulating layer; forming an etching barrier layer on the surface of the substrate between the spacers; forming an uneven buffer layer on the resultant material, the uneven buffer layer being deposited on the hard mask thickly and on the etching barrier layer thinly by using a material having a bad step coverage; and forming a self aligned contact by sequentially etching the uneven buffer layer and the etching barrier layer to open the surface of the substrate between the spacers.