Patent ID: 6407956
Filing Date: 2002-06-18
Classification: G11C

Abstract:
A semiconductor device comprising:a field effect transistor (FET) formed on a main surface of a semiconductor substrate, said FET including a source region formed on the main surface of the semiconductor substrate, a drain region formed on the main surface of the semiconductor substrate spaced apart from the source regions and a gate electrode formed on the main surface of the semiconductor substrate between the source region and the drain region, an operation period of said FET being of period in which the gate electrode receives a voltage which is equal to or greater than an absolute value of a threshold voltage of said FET; and a potential control means for i) setting a potential of said semiconductor substrate and said source region to initial potentials in the operation period of said FET, the initial potential of the semiconductor substrate being less than or equal to the initial potential of said source region, and ii) setting the potential of said semiconductor substrate to a second potential in a period after the operation period of said FET, the second potential being less than the initial potentials of the semiconductor substrate and the source region.