Patent ID: 7265582
Filing Date: 2007-09-04
Classification: H03F

Abstract:
1. A level shifter operatively coupled to a first clock signal, a second clock signal and an input voltage, comprising: a switch circuit receiving the input voltage and having a first output terminal and a second output terminal; a first input transistor module operatively coupled to the first output terminal of the switch circuit, wherein the first input transistor module comprises a first input transistor, wherein the first input transistor comprises a first substrate, and wherein the first input transistor is switched by the first clock signal, and is biased to lower the threshold voltage of the first input transistor and to raise potential of the first substrate, wherein the first input transistor module further comprises a first bias transistor that comprises an P-type transistor having a gate and a drain, wherein one of the gate or the drain of the first bias transistor is operatively coupled to one of the first output terminal or the second output terminal of the switch circuit and the other one of the gate or the drain of the first bias transistor is operatively coupled to one of the second clock signal or the first clock signal; and a grounding module operatively coupled to the second output terminal of the switch circuit, wherein the grounding module is structured to ground the second output terminal of the switch circuit in accordance with the second clock signal.