Patent ID: 7087487
Filing Date: 2006-08-08
Classification: H01L,Y10S

Abstract:
1. A method for fabricating a nonvolatile memory device, the method comprising: forming a first insulating layer above a semiconductor layer; forming a first conductive layer above the first insulating layer; forming a stopper layer above the first conductive layer; patterning the stopper layer and the first conductive layer; forming an ONO film above the semiconductor layer and on both side surfaces of the first conductive layer; forming a second conductive layer above the ONO film; etching back the second conductive layer using an anisotropic etching, and thereby forming sidewall control gates on both side surfaces of the first conductive layer, with the ONO film being interposed therebetween; forming a second insulating layer above the control gate; etching back the second insulating layer using an anisotropic etching, and thereby at least partially exposing the control gates; forming source/drain regions in the semiconductor layer; forming a silicide layer on the source/drain regions and an exposed surface of the control gates resulting in an intermediate structure; forming a third insulating layer over the intermediate structure; polishing the third insulating layer so as to expose the stopper layer; removing the stopper layer; and patterning the first conductive layer and thereby forming a word gate.