Patent ID: 6173347
Filing Date: 2001-01-09
Classification: G06F

Abstract:
A method for transmitting system-specific data in a synchronous microprocessor system, comprising the steps of:a) transmitting addressing data and useful data between a microprocessor and at least one system-compatible system-specific apparatus, as well as at least one system-incompatible system-specific apparatus, on a first line, and transmitting clock signals to both said system-compatible system-specific apparatus and said system-incompatible system-specific apparatus on a second line, the first and second lines forming a system bus;b) transmitting first addressing data and first useful data destined for the system-compatible apparatus on the first line;c) transmitting second addressing data and second useful data destined for the system-incompatible apparatus on the first line, and transmitting third addressing data, likewise destined for the system-incompatible apparatus, on a control line between the microprocessor and the system-incompatible apparatus; andd) respectively assigning free addresses to the system-compatible and to the system-incompatible apparatus.