Patent ID: 6127210
Filing Date: 2000-10-03
Classification: H01L

Abstract:
A method of manufacturing a CMOS thin film semiconductor device comprising the steps of:forming source and drain regions on a substrate;doping the source and drain regions into a first conductivity type by an ion doping method, the acceleration voltage for the ions being selected in a range from 0.5 KeV to 3 KeV; andcompensating a part of the doped source and drain-regions of first conductivity type with a dopant of second conductivity type, thereby inverting the conductivity type of the compensated part, andfurther comprising a step of reducing the doping density of the doped source and drain regions of first conductivity type prior to said step of compensating with the dopant of second conductivity type and thereby inverting the conductivity type of the compensated part.