Patent ID: 6635536
Filing Date: 2003-10-21
Classification: H01L

Abstract:
A method for manufacturing a semiconductor a semiconductor memory device comprising:preparing a semiconductor substrate comprising an active region and an inactive region; forming a transistor in the substrate, the transistor having a gate electrode structure including a gate electrode formed of a polysilicon pattern, a spacer formed on a sidewall of the gate electrode, and source and drain regions in the active region; forming a refractory metal silicide layer pattern on an upper surface of the polysilicon layer pattern and a refractory metal silicide layer on an upper surface of the semiconductor substrate on the source and drain regions; forming an interdielectric layer formed of a material having a high etching selection ratio with respect to a material forming the spacer, on the entire surface of the semiconductor substrate on which the refractory metal silicide layer pattern and the refractory metal silicide layer are formed; forming a mask for exposing the active region on the interdielectric layer; performing an etching process using the mask to form a contact hole for exposing the upper surface of the refractory metal silicide layer pattern and the refractory metal silicide layer; and filling the contact hole with metal to form a contact plug.