Patent ID: 8156361
Filing Date: 2012-04-10
Classification: G06F

Abstract:
1. A power saving method for use in a system chip of a computer system, wherein the system chip comprises a plurality of controllers, and each controller has a GPIO (General-Purpose Input/Output) port that is respectively connected to a detecting connection element, comprising: detecting a state of each of the GPIO ports to determine whether the detecting connection element is connected to a peripheral device when the computer system is powered on; when detecting that the detecting connection element is not connected to the peripheral device, powering off the controller that is not connected to the peripheral device by the system chip; directing a basic input output system (BIOS) to initialize the controllers which are not powered off; activating an operating system after controllers which are not powered off have been initialized by the basic input output system (BIOS); and powering on the controller corresponding to the detecting connection element if one of the detecting connection elements connected to one of the peripheral devices has been detected after activating the operating system; wherein the basic input output system (BIOS) further informs the operating system to allocate system resources to the controller after the controller has been powered on.