Patent ID: 6437719
Filing Date: 2002-08-20
Classification: H03M

Abstract:
A delta-sigma modulator comprising:an integration circuit for performing integration with respect to an input analog signal; a 1-bit quantizer for quantizing an integration result of the integration circuit to produce 1-bit digital signals; an output inversion inhibitor circuit for inhibiting an output signal of the 1-bit quantizer from being re-inverted during a re-inversion inhibiting period corresponding to a preset number â€˜Nâ€™ (where N&gE;2) of clock pulses that are counted after a timing when the output signal of the 1-bit quantizer is inverted; a delay circuit for delaying the 1-bit digital signals, which are provided from the output inversion inhibitor circuit, by one sample, so that delayed signals are fed back; and an adder for adding the delayed signals fed back thereto with the input analog signal, so that an addition result is forwarded to the integration circuit.