Patent ID: 7340366
Filing Date: 2008-03-04
Classification: G01R

Abstract:
1. A method for calibration of an integrated system on-chip including an internal reference source, said method comprising the steps of: (A) performing an initial calibration step of said internal reference source residing on said integrated system on-chip at a first operating condition; (B) utilizing initial calibration data obtained at said step (A) to perform at least one subsequent calibration step of said internal reference source residing on said integrated system on-chip at a second operating condition; applying an external reference source to said integrated system on-chip; converting an analog value of said external reference source to a digital value by using an internal analog-to-digital conversion circuitry built in said integrated system on-chip to enable a digital comparison of said external reference source to said internal reference source at a second calibration operating condition; using an internal calibration circuit built in said integrated system on-chip and using said initial calibration data to solve a calibration algorithm at said second calibration operating condition; wherein said calibration algorithm determines subsequent calibration data that corresponds to a lowest operating condition drift of said internal reference source in an operating range; and storing said subsequent calibration data in a non-volatile memory.