Patent ID: 8839032
Filing Date: 2014-09-16
Classification: G06F

Abstract:
1. A method comprising: generating by a first firmware error handler first error data regarding a first error detected in first hardware of a first computer system, said first hardware including a first processor for executing a first operating-system instance for said first computer system, said first firmware error handler being encoded in first non-volatile memory of said first computer system; generating by a second firmware error handler second error data regarding a second error detected in second hardware of a second computer system separate from said first computer system, said second hardware including a second processor for executing a second operating-system instance for said second computer system, said second firmware error handler being encoded in second non-volatile memory of said second computer system; communicating said first error data from said first firmware error handler and said second error data from said second error hander to an error manager separate from said first computing system and from said second computing system; correlating the first error data and the second error data by said error manager to yield multi-computer analysis results; and writing, by the error manager, at least some of the multi-computer error-analysis results into the first and second computer systems.