Patent ID: 6922363
Filing Date: 2005-07-26
Classification: G11C

Abstract:
1. A method for writing a memory module comprising: providing a plurality of memory cells, wherein each memory cell stores 2-bit data and comprises a substrate, a P-type drain, a P-type source, a stack dielectric layer, and a gate, and the plurality of memory cells are arranged in a matrix with the gates of the memory cells on the same row being connected to the same word line, the drains of the memory cells on the same column being connected to the same bit line, and the sources of the plurality of memory cells on the same row being connected to the same source line; applying a source line voltage to the source lines of the plurality of memory cells; applying a first word line voltage to the word line of the memory cell to be written in order to turn on a P-type channel of the memory cell to be written; applying a second word line voltage to the word line of the memory cell not to be written in order to turn off the P-type channel of the memory cell; applying a bit line voltage to the bit line of the memory cell to be written so that a hot hole in the P-type channel of the memory cell to be written induces hot electrons to be injected into the stack dielectric layer of the memory cell to be written; and applying a substrate voltage to the substrate of the plurality of memory cells.