Patent ID: 6233598
Filing Date: 2001-05-15
Classification: G11B

Abstract:
An interleaved finite impulse response (FIR) filter comprising:a plurality of sample and hold circuits, each for sampling an input signal sequentially at a clock rate;at least one set of multiple multipliers coupled to said plurality of sample and hold circuits, each multiplier for multiplying a sample by predefined value and providing a multiplier product at said clock rate; said multiplier of said at least one set of multiple multipliers including a current multiplier; said current multiplier receiving an analog differential current input from one said sample and hold circuit and being arranged for substantially linear operation; andat least a pair of summing functions, each said summing function coupled to one said set of multipliers for adding a predetermined combination of respective multiplier products and for providing at least a pair of interleave outputs; each said interleave output changing state every two periods of said clock rate.