Patent ID: 6314431
Filing Date: 2001-11-06
Classification: G06F

Abstract:
A computer implemented method, said computer having memory, a pre-fetch instruction for a target instruction and an augmented for pre-fetching branch instruction, said memory being accessed by at least one instruction generated from a computer readable medium encoded in a program that executes on said computer and said instruction having at least one value, said method comprising:determining a minimum threshold said value that defines a cost effective pre-fetching size;accessing a current branch instruction in said program that is associated with said target instruction; andwhile said current branch instruction is accessed in said program:inserting said pre-fetch instruction for said target instruction in said program if pre-fetching said pre-fetch instruction for said target instruction is cost effective;accessing a target basic block associated with said target instruction so that a predictedtargettracesize said value is determined;generating said augmented branch instruction to execute said pre-fetch instruction for said target instruction if said predictedtargettracesize is greater than said minimum threshold thereby improving pre-fetching on said computer; andaccessing a next branch instruction if said next branch instruction has not been accessed, associating said next branch instruction with said target instruction, and if said next branch instruction is accessed labeling said next branch instruction as said current branch instruction otherwise labeling said current branch instruction as not accessed.