Patent ID: 9123809
Filing Date: 2015-09-01
Classification: H01L

Abstract:
1. A transistor, comprising: a silicon-on-insulator (SOI) substrate including a substrate layer, an insulator layer and a semiconductor layer; a trench isolation structure formed in said SOI substrate to extend completely through the semiconductor layer and the insulator layer and at least partially into the substrate layer; a source, body and drain of said transistor formed in the semiconductor layer; and a doped region formed in the substrate layer and extending under the insulator layer from one edge of the trench isolation structure to an opposite edge of the trench isolation structure and extending contiguously under the source, body and drain, said doped region including a stress-inducing dopant that induces stress within the doped region of the substrate layer under the insulator layer that is transferred through the insulator layer to a channel region of the body.