Patent ID: 9165866
Filing Date: 2015-10-20
Classification: H01L

Abstract:
1. A semiconductor package comprising: a first semiconductor die; a clip structure attached to the first semiconductor die; and a plurality of leveling projections located between the clip structure and the first semiconductor die, such that the clip structure is parallel with the semiconductor die, wherein an adhesive material is located between at least some of the leveling projections, attaching the clip structure to the first semiconductor die, at least some of said adhesive material being electrically conductive and located between at least some of the leveling projections, electrically connecting at least a portion of the clip structure to the first semiconductor die, with the clip structure further comprising a first conductive segment and a second conductive segment, the first conductive segment being conductively attached to the first semiconductor die, and the second conductive segment being in superimposition with and electrically isolated from the first semiconductor die.