Patent ID: 6580159
Filing Date: 2003-06-17
Classification: H01L

Abstract:
An integrated circuit device package comprising:a planar nonconductive sheet having a first surface, an opposite second surface, and first apertures between the first surface and the second surface; a planar metal die pad having a first surface and an opposite second surface, wherein the first surface of the die pad is attached to the second surface of the nonconductive sheet; a plurality of planar metal leads separated from the die pad and each having a first surface and an opposite second surface, wherein the first surface of each of the leads is attached to the second surface of the nonconductive sheet and each of the first apertures is juxtaposed with the first surface of a respective one of the leads; an integrated circuit device disposed in spaced relation to the first surface of the die pad; a plurality of conductive bond wires, wherein each of the bond wires is electrically connected to and extends between the integrated circuit device and the first surface of a respective one of the leads through a respective one of the first apertures; and an encapsulating material on the first surface of the nonconductive sheet, wherein the encapsulating material covers the integrated circuit device and the bond wires and fills the first apertures; wherein the second surface of the die pad and the second surface of each of the leads are exposed at a common exterior surface of the package.