Patent ID: 7268081
Filing Date: 2007-09-11
Classification: B81B,B81C,H01L,Y10S

Abstract:
1. A method, comprising: preparing a carrier wafer to have a support wafer made of a semiconductor material, a carrier passivation layer formed on a surface of the support wafer, and a membrane formed on the carrier passivation layer, wherein the carrier passivation layer is inert to a gaseous etchant that etches the semiconductor material; patterning a surface of a device wafer made from the semiconductor material to form a plurality of posts, each post having a top flat surface; forming a passivation layer on exterior surfaces of the device wafer without covering each top flat surface of each post; placing the carrier wafer on the device wafer to have the membrane directly contact top flat surfaces of the posts; forming a direct semiconductor-to-semiconductor bonding between the membrane and the top flat surfaces to bond the carrier wafer to the device wafer; exposing the bonded carrier wafer and the device wafer to the gaseous etchant to etch away the support wafer in the carrier wafer and to expose the carrier passivation layer; and removing the carrier passivation layer to transfer the membrane to the device wafer.