Patent ID: 8237256
Filing Date: 2012-08-07
Classification: H01L

Abstract:
1. An integrated semiconductor device including: a device substrate with a device major surface, a semiconductor element on the device major surface, and electrically conductive device connectors extending across the device major surface; and an interconnection substrate having an interconnection major surface, the interconnection substrate defining at least one sealing recess recessed from the interconnection major surface, the sealing recess being surrounded by a sealing ring; wherein the device substrate is mounted on the interconnection substrate with the interconnection major surface facing the device major surface, the sealing ring around the semiconductor element and with the device major surface sealed against the sealing ring so that the recess forms a sealed cavity containing the semiconductor element; the integrated semiconductor device further comprising: electrical interconnects across the interconnection major surface; and interconnection bumps outside the sealing ring, the interconnection bumps electrically connecting the device electrical connectors to the interconnects.