Patent ID: 6376887
Filing Date: 2002-04-23
Classification: H01L

Abstract:
A semiconductor memory comprising:a semiconductor substrate having a principal surface; a gate electrode which is formed on a gate insulator film formed in an active region on said principal surface of said semiconductor substrate and which is formed of a semiconductor layer and a conducting layer; grooves formed in self alignment with said gate electrode and to penetrate the inside of said semiconductor substrate; a buried digit line formed of a continuous diffused layer which is formed at an entire inner surface of each of said grooves and which is of a conductivity type opposite to that of said semiconductor substrate; a first insulating film covering an inner surface of each of said grooves and at least a portion of a side surface of said semiconductor layer of said gate electrode; a second insulating film substantially filling said grooves and having a high reflow property; and a word line formed on said principal surface of said semiconductor substrate to extend orthogonally to said grooves, and comprising said gate electrode on said active region and functioning as an interconnection layer on said grooves.