Patent ID: 9164843
Filing Date: 2015-10-20
Classification: G06F,H05K

Abstract:
1. A system, comprising: computer system memory comprising one or more memory locations configured to store one or more multi-process applications; one or more Central Processing Units (CPUs) operatively connected to said computer system memory and configured to execute said one or more multi-process applications on a host with a host operating system; a checkpointer comprising a user-space checkpointer and a kernel-space checkpointer, and configured to generate checkpoints of said one or more multi-process applications; and computer system memory and computer system storage configured to store said checkpoints; wherein said user-space checkpointer is comprised of one or more user-space interceptors preloaded into an address space of each application process, wherein said user-space interceptors comprise at least one of a barrier, creation of a per-process checkpointing thread, and an application virtualization space providing a private resource name space; wherein said kernel-space checkpointer is called while the execution of application processes are halted at said user-space barrier wherein said kernel-space checkpointer is implemented as a character device; wherein a read function of said character device skips memory pages not used by said application process; wherein the read function of said character device includes memory pages used by said application process; wherein said character device moves a device pointer forward to a next page after a read operation; and wherein the character device read function calls are optimized by a skip of one or more of reserved low memory, reserved high memory, or memory reserved for the operating system.