Patent ID: 7943442
Filing Date: 2011-05-17
Classification: H01L

Abstract:
1. A method, comprising: forming a first opening and a second opening in a first device region of an SOI substrate while covering a second device region, said first and second openings extending through a buried insulating layer to a crystalline substrate material, said second device region having formed therein a first transistor and a second transistor each comprising an extension region; forming drain and source regions in said first transistor and a first doped region in said crystalline substrate material exposed by said first opening in a common first drain/source implantation process; forming drain and source regions in said second transistor and a second doped region in said crystalline substrate material exposed by said second opening in a common second drain/source implantation process; forming a first spacer element on sidewalls of said first and second openings after said common first and second drain/source implantation processes and performing a further common drain/source implantation process for said first opening and said first transistor and a further common drain/source implantation process for said second opening and said second transistor; and forming a metal silicide in said first and second transistors and said first and second doped regions.