Patent ID: 8248098
Filing Date: 2012-08-21
Classification: G01R

Abstract:
1. An apparatus comprising: first to M-th (wherein M is a positive integer not less than 1) starved devices each being biased in response to a bias voltage varying in accordance with a variable first supply voltage, thereby varying an amount of current flowing through a semiconductor device included in the starved device; interconnect lines for interconnecting the first to M-th starved devices; and a measuring unit for measuring at least one of a delay time caused by the semiconductor devices of the starved devices themselves, and a compound delay time caused by the semiconductor devices of the starved devices themselves plus a delay time caused by the interconnect lines, wherein: the measuring unit measures a first delay time caused by the starved devices under a condition that the starved devices are interconnected by the interconnect lines; the measuring unit measures a second delay time caused by the starved device under a condition that the starved devices are directly interconnected without using the interconnect lines; and the measuring unit subtracts the second delay time from the first delay time, thereby calculating a delay time caused by only the interconnect lines.