Patent ID: 7366038
Filing Date: 2008-04-29
Classification: G11C

Abstract:
1. A circuit for driving a word line of a memory device comprising: a first word line driver configured to drive the word line by applying a first word line driving voltage signal in a first operation mode, in response to a word line selection signal; a second word line driver configured to drive the word line by applying a second word line driving voltage signal in a second operation mode, in response to the word line selection signal; and a pass transistor, coupled between the first word line driver and the word line, configured to transmit the first word line driving voltage signal to the word line in response to a control voltage signal, wherein the control voltage signal is precharged (“self-boosted”) to a power voltage level at an initial stage of the first operation mode and the control voltage signal maintains a self-boosted voltage level in the first operation mode, the self-boosted voltage level being attained from the power voltage level in response to the second word line driving voltage.