Patent ID: 6522156
Filing Date: 2003-02-18
Classification: G01R

Abstract:
A subassembly of an electromechanical apparatus for testing integrated circuit chips; said subassembly being comprised of:first and second planar printed circuit boards, with each printed circuit board having first and second faces that are opposite to each other and are surrounded by an edge that is free of any electrical edge connectors; a plurality of sockets, which are physically located on said first face of said printed circuit board, for holding said integrated circuit chips; a first plurality of electrical contacts, which are physically located on said second face of said first printed circuit board and are connected through said first printed circuit board to said sockets, for carrying all electrical power and all electrical signals for said integrated circuit chips; a plurality of electrical power converters and a signal connector, which are physically located on said first face of said second printed circuit board; a second plurality of electrical contacts, which are physically located on said second face of said second printed circuit board and are connected through said second printed circuit board to said electrical power converters and said signal connector, for making pressed connections with said first plurality of electrical contacts; and, a means for pressing said first and second printed circuit boards together such that said first and second plurality of electrical contacts make said pressed connections and power for said chips only travels from said electrical power converters on said second printed circuit board through said pressed connections to said sockets on said first printed circuit board.