Patent ID: 7592690
Filing Date: 2009-09-22
Classification: H01L

Abstract:
1. A semiconductor device comprising: a base plate having main and back surfaces; a first semiconductor element located above the main surface of the base plate; a plurality of bumps formed on the back surface of the base plate; a first sealing resin formed on the main surface of the base plate and on the first semiconductor element, to seal the first semiconductor element; and a second semiconductor element located on and to oppose a portion of the back surface of the base plate which does not have the plurality of bumps formed thereon, wherein the second semiconductor element has main and back surfaces, side surfaces between the main and back surfaces of the second semiconductor element, and a plurality of terminals which are formed on the main surface of the second semiconductor element and in contact with the base plate, wherein the back surface and an entirety of the side surfaces of the second semiconductor element are exposed, wherein all of the bumps are located on portions of the back surface of the base plate that are not below the first semiconductor element, wherein the main surface of the second semiconductor element is sealed with a second sealing resin so as to expose a part of each of the terminals, wherein a distance from a top surface of the first semiconductor element to a top surface of the first sealing resin is greater than a distance from the main surface of the base plate to the top surface of the first semiconductor element, and wherein the second semiconductor element is a chip size package disposed so that a gap without resin exists between the base plate and the chip size package.