Patent ID: 7282407
Filing Date: 2007-10-16
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor memory device comprising the steps of: forming a pad on a semiconductor substrate; forming a first insulating layer on the semiconductor substrate; forming a plurality of bit lines on the first insulating layer, each of the plurality of bit lines including a plurality of bit line layers; forming an oxidation preventing layer over substantially the entire surface of the bit lines, the oxidation preventing layer arranged to contact all of the bit line layers of each of the bit lines; forming a second insulating layer on the oxidation preventing layer; forming a contact hole exposing the pad on the semiconductor substrate by patterning the second insulating layer, the oxidation preventing layer, and the first insulating layer, the oxidation preventing layer remaining interposed between the contact hole and the bit lines; forming a storage electrode over the second insulating layer and connected to the portion of the semiconductor substrate through the contact hole; and sequentially forming a dielectric layer and a plate electrode on the storage electrode, wherein the oxidation preventing layer is a nitride layer.