Patent ID: 7616513
Filing Date: 2009-11-10
Classification: G11C

Abstract:
1. A current sense amplifier circuit, comprising: a pair of cross-coupled transistors coupled for receiving a pair of differential currents on corresponding source terminals of the transistors, and for generating a pair of differential voltages on corresponding drain terminals of the transistors; a pair of output nodes coupled to the drain terminals of the pair of cross-coupled transistors for receiving the pair of differential voltages; an equalization transistor, whose source-drain path is coupled between the pair of output nodes for equalizing the pair of differential voltages for a predetermined amount of time at the beginning of a sense cycle; a first pair of load transistors having mutually-connected gate terminals, mutually-connected drain terminals, and a source terminal coupled to a different one of the output nodes; and a second pair of load transistors, each coupled in parallel to a different one of the first pair of load transistors between an enable transistor and a different one of the output nodes, wherein gate terminals of the second pair of load transistors are coupled for receiving a digital control signal, and wherein a logic value of the digital control signal is selected based on a level of a power supply voltage supplied to the current sense amplifier circuit, such that during a sense operation: