Patent ID: 8907431
Filing Date: 2014-12-09
Classification: H01L

Abstract:
1. A device comprising: a substrate; a semiconductor fin over the substrate; a gate dielectric layer on a top surface and sidewalls of the semiconductor fin; and a gate electrode spaced apart from the semiconductor fin by the gate dielectric layer, wherein the gate electrode comprises a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer, and wherein the top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function; wherein the gate electrode comprises a first metal layer over and aligned to the semiconductor fin, wherein the first metal layer does not extend to sides of the semiconductor fin; and a second metal layer comprising a first portion over and aligned to the semiconductor fin, and second portions extending on the sides of the semiconductor fin, wherein the first metal layer and the second metal layer comprise different materials.