Patent ID: 8021969
Filing Date: 2011-09-20
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising, sequentially: forming a stacked layer including a tungsten layer; forming a hard mask pattern over the stacked layer; oxidizing a surface of the hard mask pattern, thereby forming a stress buffer layer; removing a portion of the stacked layer in order to remove a portion of the tungsten layer by using the hard mask pattern and the stress buffer layer as an etch mask, thereby forming a first resultant structure; forming a capping layer over the first resultant structure, wherein the stress buffer layer is formed between the hard mask pattern and the capping layer to inhibit transfer of stress from the hard mask pattern to the capping layer during a subsequent thermal process so as to inhibit leaning of the capping layer; etching the capping layer to retain the capping layer on sidewalls of the first resultant structure; and removing the remaining portion of the stacked layer uncovered by the hard mask pattern.