Patent ID: 8234463
Filing Date: 2012-07-31
Classification: G06F

Abstract:
1. A data processing apparatus, comprising: a memory which receives, and outputs data with a predetermined data width; an operation circuit which outputs a read command or a write command to access the memory; and an access control circuit which replaces a part of first read data read from the memory with a partial data, different from the first read data, and outputs partially replaced data as write data to the memory when receiving the write command and the partial data with a data width smaller than the predetermined data width associated with the write command, from the operation circuit, wherein the access control circuit replaces a part of second read data which has been acquired in response to the read command outputted previously, instead of the first read data, with the partial data, and outputs partially replaced data as the write data if the write command has been outputted in connection with a read command outputted before the write command.