Patent ID: 9035458
Filing Date: 2015-05-19
Classification: H01L

Abstract:
1. An integrated circuit, comprising: a semiconductor substrate; a plurality of lower components disposed in and on said substrate, said lower components including transistors; a pre-metal dielectric (PMD) layer disposed over said lower components and said substrate; lower contacts disposed in said PMD layer, making electrical connections to said lower components and extending to a top surface of said PMD layer, said lower contacts having a metal lower liner on lateral and lower surfaces of said lower contacts and a lower contact metal disposed on said lower liner, said lower contacts including: upper components disposed over said PMD layer, wherein at least a portion of said upper components are disposed over, and make electrical connection to top surfaces of, instances of a portion of said lower contacts; an inter-level dielectric (ILD) layer disposed over said upper components and said PMD layer; upper contacts disposed in said ILD layer, aligned with, and making electrical connections to, said upper contacts and extending to a top surface of said ILD layer, said upper contacts having a metal upper liner on lateral and lower surfaces of said upper contacts and an upper contact metal disposed on said upper liner, said upper contacts including: a level of metal interconnects disposed over said ILD layer, said metal interconnects having metal interconnect lines which make electrical connections to top surfaces of said conventional stacked contacts and said stacked annular contacts; such that said integrated circuit includes a plurality of annular stacked contacts, an instance of said annular stacked contacts being a combination of an instance of said annular lower contacts electrically connected to a corresponding instance of said annular upper contacts, in which said instance of said annular lower contacts makes electrical connection to an instance of said lower components and said instance of said annular upper contacts makes electrical connection to an instance of said metal interconnect.