Patent ID: 8698240
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A metal-oxide-semiconductor (MOS) device comprising: a diffused region including a first portion of a second impurity type and a second portion of a first impurity type in the substrate; a patterned first dielectric layer including a first dielectric portion over the first portion of the diffused region and a second dielectric portion over the second portion of the diffused region; a patterned first conductive layer on the patterned first dielectric layer, the patterned first conductive layer including a first conductive portion on the first dielectric portion and a second conductive portion on the second dielectric portion; a patterned second dielectric layer and a patterned second conductive layer directly formed on the upper surface of a portion of the patterned first conductive layer, the patterned second conductive layer is formed on the patterned second dielectric layer, isolation structures on the substrate, wherein the patterned second dielectric layer includes fifth dielectric portions on the isolation structures and the patterned second conductive layer includes fifth conductive portions on the fifth dielectric portions; the patterned second dielectric layer includes a third dielectric portion directly formed on the upper surface of the first conductive portion and along a sidewall of the first conductive portion to the substrate, and the patterned second dielectric layer further includes a fourth dielectric portion directly formed on the upper surface of the second conductive portion and along a sidewall of the second conductive portion to the substrate; the patterned second conductive layer includes a third conductive portion on the third dielectric portion and a fourth conductive portion on the fourth dielectric portion; at least a spacer is formed along at least a sidewall of the patterned first conductive layer and the patterned second dielectric layer; and the patterned second dielectric layer and the at least a spacer are used to sustain high operating voltage of the MOS.