Patent ID: 6657304
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A method of manufacturing an integrated circuit comprising;providing a substrate having a semiconductor device thereon; forming a first stop layer over the substrate; forming a first dielectric layer over the first stop layer; forming an opening having sidewalls in the first dielectric layer; forming a first conformal barrier liner in the opening, forming the first conformal barrier liner to a constant thickness; processing the first conformal barrier liner to remove horizontal portions and leave vertical portions of the constant thickness of the first conformal barrier liner on the sidewalls of the opening in the first dielectric layer, the processing the first conformal barrier liner including removing a portion of the first stop layer to the semiconductor device; treating the first conformal barrier liner and the first stop layer to increase adhesion properties thereof; and forming a first conductor core in the opening over the vertical portions of the first conformal barrier liner and the first stop layer, forming the first conductor core includes connecting the first conductor core to the semiconductor device.