Patent ID: 6653184
Filing Date: 2003-11-25
Classification: H01L

Abstract:
A method of forming a pair of transistors associated with a semiconductor substrate, comprising:defining a first region and a second region of the substrate, the first region being an n-type doped region and the second region being a p-type doped region; forming a first oxide region which covers at least some of the first region of the substrate and which does not cover any of the second region of the substrate; forming a nitrogen-comprising layer across at least some of the first oxide region and across at least some of the second region of the substrate; after forming the nitrogen-comprising layer, growing a second oxide region from the second region of the substrate, the second oxide region having a thickness of at least about 70 Ã¥; forming a first transistor gate over the first oxide region and a second transistor gate over the second oxide region; forming first source/drain regions proximate the first transistor gate to form a PMOS transistor comprising the first transistor gate; and forming second source/drain regions proximate the second transistor gate to form an NMOS transistor comprising the second transistor gate.