Patent ID: 7632755
Filing Date: 2009-12-15
Classification: H01L

Abstract:
1. A method for forming an intermetal dielectric layer between metal wirings, comprising the steps of: (a) forming a metal layer on a semiconductor substrate; (b) forming a plurality of metal wiring patterns by etching the metal layer selectively; (c) forming a first dielectric layer on the substrate and the plurality of metal wiring patterns; (d) forming a SiOC layer on portions of the first dielectric layer above the metal wiring patterns and in a gap between sidewalls of adjacent metal wiring patterns using a spin-on method and removing a portion of the SiOC layer by dry etching until the first dielectric layer on the plurality of metal wiring patterns is exposed, the SiOC layer having a lower dielectric constant than the first dielectric layer; and (e) forming a second dielectric layer on the SiOC layer and the exposed first dielectric layer.