Patent ID: 8941440
Filing Date: 2015-01-27
Classification: H03F

Abstract:
1. A differential circuit for receiving input signals complementary to each other and outputting output signals complementary to each other, the differential circuit comprising: a first differential unit including a pair of transistors, one of the transistors in the first differential unit receiving one of the input signals, wherein at least an other of the transistors in the first differential unit shows a gain enhancement in frequencies lower than a transition frequency; a second differential unit including a pair of transistors, one of the transistors in the second differential unit receiving another of the input signals, wherein at least an other of the transistors in the second transistor unit shows the gain enhancement in frequencies lower than the transition frequency; a first filter for providing an average of said input signals to the other of the transistors in the first differential unit by providing a first compensating signal to said other of the transistors in the first differential unit, the first compensating signal being in phase with the one of the input signals; and a second lifter for providing the average to the other of the transistors in the second differential unit by providing a second compensating signal to said other of the transistors in the second differential unit, the second compensating signal being in phase with the another of the input signals.