Patent ID: 8990276
Filing Date: 2015-03-24
Classification: G06F,H04L

Abstract:
1. A circuit for generating a true, circuit-specific, time-invariant, binary random number, comprising: a matrix of K·L delay elements, which are interconnectable to form chains of delay elements of length L via L−1 commutation circuits, each chain including L delay elements and the L−1 commutation circuits each provided between two adjacent delay elements among the L delay elements, each commutation circuit having K input signals and K output signals thereby each commutation circuit receives a predetermined number of the K inputs from a previous stage of the chains and provides the predetermined number of the K outputs to a subsequent stage of the chains, a demultiplexer connected upstream of the matrix, and the demultiplexer outputting K output signals directly chains of the delay elements; a multiplexer connected downstream of the matrix, and inputting K input signals directly from the last stage of the chains of the delay elements; a comparator connected downstream of the multiplexer; a transcoder that transmits a control signal to each of the demultiplexer, the multiplexer and the L−1 commutation circuits, the setting of the L−1 commutation circuits, the demultiplexer and the multiplexer being preselectable by the control signal, and a channel code encoder that generates code words of the channel code and that provides the code words of the channel code to the transcoder, wherein the transcoder transcodes the code words of the channel code to the control signal of the L−1 commutation circuits, the demultiplexer and the multiplexer, such that the demultiplexer, the L−1 commutation circuits and the multiplexer form the predetermined number of chains of delay elements in accordance with the channel code.