Patent ID: 6836824
Filing Date: 2004-12-28
Classification: G06F,Y02D

Abstract:
A computer system, comprising:a power management unit configured to change a power mode of operation of the computer system; a cache memory subsystem including a register which is updated to indicate the power mode of operation of the computer system, wherein the cache memory subsystem is configured to operate in a lower power mode in response to the register indicating that the computer system is in the lower power mode of operation; and a controller configured to monitor cache requests and configured to selectively assert a sleep mode control signal depending upon a receipt of one or more cache requests, wherein the cache memory subsystem is further configured to operate with reduced power in response to the assertion of the sleep mode control signal and independent of the power mode of operation of the computer system indicated by the register; wherein the sleep mode control signal is deasserted in response to receiving a cache request, and wherein the cache memory subsystem is further configured to operate in a normal mode in response to the deassertion of the sleep mode control signal and independent of the power mode of operation of the computer system indicated by the register.