Patent ID: 6670272
Filing Date: 2003-12-30
Classification: H01L

Abstract:
A method for reducing dishing in a chemical mechanical polishing process performed on a semiconductor wafer having a dielectric layer with trenches and a copper layer deposited over the dielectric layer and filling the trenches in the dielectric layer, the method comprising steps of:removing excess copper above the plane of the dielectric surface using a main polishing operation, whereby copper residues are formed above the plane of the dielectric surface; applying chemical treatment to the surface of the semiconductor wafer in the initial stage of an overpolishing operation, wherein a protective layer over the copper residues and surfaces of copper-filled trenches is formed; removing polishing pressure during the overpolishing operation when applying chemical treatment to the surface of the semiconductor wafer; removing the copper residues and protective layer thereon above the plane of the dielectric layer in the overpolishing operation; and removing the protective layer over the surfaces of the copper-filled trenches in the overpolishing operation.