Patent ID: 9059730
Filing Date: 2015-06-16
Classification: H03M

Abstract:
1. A system to provide a multistage analog-to-digital data conversion, the system comprising: a first stage unit configured to process an analog input signal into a first number of most significant bits using a first reference signal, and to output a first stage residue signal; a signal divider unit configured to divide the first reference signal to generate a second reference signal, wherein the second reference signal is adjusted to be smaller than the first reference signal by a factor that is a function of the first number of most significant bits; a second stage unit configured to receive and process the first stage residue signal into a second number of remaining least significant bits using the second reference signal; a sampling unit configured to sample the first stage residue signal received from the first stage unit onto the second stage unit with a passive element; and an output unit configured to output a digital value that is a combination of the first number of most significant bits and the second number of remaining least significant bits.