Patent ID: 6683343
Filing Date: 2004-01-27
Classification: H01L

Abstract:
A semiconductor device comprising:a first buffer layer of a first conductivity type; a high resistance layer of the first conductivity type formed on the first buffer layer; a base layer of a second conductivity type formed on the high resistance layer; a source region of the first conductivity type in a surface region of the base layer; a gate electrode insulated from the source region, the base layer and the high resistance layer; a drain layer of the second conductivity type formed on an opposite side of the first buffer layer from a surface on which the high resistance layer is formed; and a second buffer layer of the first conductivity type formed between the first buffer layer and the drain layer, an impurity concentration of the second buffer layer being higher than that of the first buffer layer, whereby a thickness of the drain layer is thinner than that of the second buffer layer, and the drain layer is a low impurity injection layer.