Patent ID: 6473825
Filing Date: 2002-10-29
Classification: G06F

Abstract:
A method of controlling communication between a first peripheral component located on a first computer bus and a second peripheral component located on a second computer bus, the first and second computer buses being connected by a bridge circuit, said method comprising the steps of:(a) in response to placing onto the first computer bus of a message from the first peripheral component addressed to the second peripheral component, determining the addresses of the first and second peripheral components; (b) determining the bus on which the second peripheral component is located; (c) if the second peripheral component is located on the second computer bus, applying the message to the bridge circuit; (d) determining whether the address of the second peripheral component is an address to which the first peripheral component is permitted to communicate; (e) if the address of the second peripheral component is not an address to which the first peripheral component is permitted to communicate, preventing communication of further messages from the first peripheral component; and (f) if the address of the second peripheral component is an address to which the first peripheral component is permitted to communicate, permitting the bridge circuit to pass messages from the first peripheral component.