Patent ID: 8822298
Filing Date: 2014-09-02
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, the method comprising: forming a protective liner above an active region and a gate electrode structure formed on said active region, said gate electrode comprising a dielectric cap layer, wherein the protective liner is formed on and in contact with the gate electrode structure and on and in contact with an upper surface of the dielectric cap layer; performing a first ion implantation process to form drain and source extension regions in said active region in the presence of said protective liner; forming a spacer structure on and in contact with said protective liner; removing an exposed portion of said protective liner by using said spacer structure as an etch mask so as to thereby expose the upper surface of the dielectric cap layer and portions of the active region; and performing a second ion implantation process to form drain and source regions by forming deep drain and source areas in said exposed portions of the active region in the presence of said spacer structure.