Patent ID: 6600347
Filing Date: 2003-07-29
Classification: H03K

Abstract:
An integrated circuit, comprising:a pad; and a driver coupled to said pad, wherein said driver comprises: an input configured to receive a data signal; a pull-up driver, wherein said pull-up driver is configured to drive said pad to a logic high voltage level, wherein said pull-up driver comprises a plurality of transistors; a pull-down driver, wherein said pull-down driver is configured to drive said pad to a logic low voltage level, wherein said pull-down driver comprises a plurality of transistors; and a first and a second controller to control a slew rate of an outpost signal at said pad, wherein each of said first and second controller comprises a first transistor, wherein a drain of said first transistor is coupled to a stack of resistors, wherein said stack of resistors is coupled to a drain of a second transistor; wherein each of said plurality of transistors in said pull-up driver is coupled to a particular node in said first controller, wherein a first transistor in said pull-up driver is coupled to a first node between a first and a second resistor in said first controller, wherein said first resistor is coupled to said second transistor in said first controller, wherein said second resistor is coupled to said first resistor in said first controller, wherein a second transistor in said pull-up driver is coupled to a second node between said second resistor and a third resistor in said first controller, wherein said third resistor is coupled to said second resistor in said first controller wherein said first transistor in said pull-up driver is switched from a first state to a second state prior to a point in time when said second transistor in said pull-up driver is switched from said first state to said second state; wherein each of said plurality of transistors in said pull-up driver are switched from said first state to said second state in a staggered manner, wherein each of said plurality of transistors in said pull-down driver are switched from said second state to said first state in said staggered manner, wherein in response to switching each of said plurality of transistors in said pull-up driver from said first state to said second state in said staggered manner and in response to switching each of said plurality of transistors in said pull-down driver from said second state to said first state in said staggered manner a portion of current flows from said pull-up driver to said pull-down driver thereby producing an effective impedance of said driver to sufficiently reduce a reflection coefficient of said effective impedance of said driver below a predetermined value during switching of the outpost signal at said pad.