Patent ID: 9195406
Filing Date: 2015-11-24
Classification: G06F

Abstract:
1. A method of operating a memory device, the method comprising: performing a first memory operation within a first time frame associated with the first memory operation; if a length of time to perform a first portion of a second memory operation is deemed to be less than or equal to a length of time between completion of the first memory operation and expiration of the first time frame, performing the first portion of the second memory operation subsequent to completing the first memory device operation and within the first time frame; updating a status corresponding to the second memory operation responsive to performing the first portion of the second memory operation; performing a third memory operation within a second time frame associated with the third memory operation and subsequent to the first time frame; and if a length of time to perform a second portion of the second memory operation is deemed to be less than or equal to a length of time between completion of the third memory operation and expiration of the second time frame, performing the second portion of the second memory operation subsequent to completing the third memory device operation and within the second time frame.