Patent ID: 8329594
Filing Date: 2012-12-11
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor structure, comprising the steps of: providing a substrate; depositing a material layer on the substrate; forming at least one dielectric layer on the material layer, wherein the at least one dielectric layer comprises a bottom anti-reflective coating (BARC) and a hard mask; forming a patterned resist on the dielectric layer; performing a first trimming process on the patterned resist; using the patterned resist for etching the BARC; performing a second trimming process on the patterned resist and the BARC; using the patterned resist and the BARC to etch the hard mask for exposing the material layer; performing a third trimming process on the BARC and the hard mask; and using the BARC and the hard mask for etching the material layer.