Patent ID: 9105737
Filing Date: 2015-08-11
Classification: H01L,H05K

Abstract:
1. A semiconductor construction, comprising: an etchstop material over a semiconductor base; a stack of alternating electrically conductive levels and electrically insulative levels over the etchstop material; electrically insulative pillars extending through the stack and contacting an upper surface of the etchstop material; channel material posts between the pillars; the channel material posts extending through the etchstop material and having a first pair of opposing sides and a second pair of opposing sides; the first pair of opposing sides being spaced from adjacent pillars by intervening regions of the stack; none of the stack being present between each of the sides of the second pair of opposing sides and pillars adjacent such sides of the second pair; cavities extending vertically through the stack and having lateral cavity extensions that extend laterally into the electrically conductive levels along the first pair of opposing sides of the channel material posts, each of the lateral extensions extending between two adjacent electrically insulative materials; charge blocking material along edges of the electrically conductive levels within the cavity extensions; charge-storage material within the cavity extensions and spaced from the electrically conductive levels by the charge blocking material; and gate dielectric material between the charge-storage material and the channel material posts.