Patent ID: 8027190
Filing Date: 2011-09-27
Classification: G11C

Abstract:
1. A command processing circuit, which receives command sequences applied during a plurality of command cycles, the command sequences including a plurality of unit command codes corresponding to each command cycle, and generates internal command signals corresponding to the command sequences, the command processing circuit comprising: a unit internal command signal generating unit configured to generate unit internal command signals corresponding to the unit command codes; a common command latching unit configured to latch the unit internal command signals corresponding to those of the unit command codes that are commonly contained in first and second command sequences; a first command latching unit configured to latch the unit internal command signal corresponding to the unit command code contained only in the first command sequence, and output a first internal command signal corresponding to the unit internal command signal latched in the common command latching unit and the unit internal command signal latched in the first command latching unit; and a second command latching unit configured to latch the unit internal command signal corresponding to the unit command code contained only in the second command sequence, and output a second internal command signal corresponding to the unit internal command signal latched in the common command latching unit and the unit internal command signal latched in the second command latching unit.