Patent ID: 7132339
Filing Date: 2006-11-07
Classification: H01L

Abstract:
1. A method for forming a transistor, the method comprising the steps of: providing a semiconductor wafer having a semiconductor layer overlying a buried insulator having at least two layers; forming a first recess and a second recess though the semiconductor layer and a first layer of the buried insulator; forming a body situated between the first recess and the second recess so that a top body surface and a bottom body surface define a body thickness, said body comprising a portion of the semiconductor layer, said portion of the semiconductor layer comprising a semiconductor material; and forming a source structure having a source region into the first recess and forming a drain structure having a drain region into the second recess so that a top portion of the source structure and a top portion of the drain structure are within and abut the body thickness, wherein the source structure and the drain structure each abut the semiconductor material.