Patent ID: 6954836
Filing Date: 2005-10-11
Classification: G06F

Abstract:
1. A system for retrieving information identified by an address reference invoked by a programming instruction loaded in an instruction queue, the system comprising: a reference table storage buffer coupled with a processing bus, the reference table storage buffer operable to receive a reference table from the processing bus, the reference table embedded in a program including the programming instruction and having an entry for a memory address corresponding to the address reference; a parser coupled with the reference table storage buffer and the instruction queue, the parser parsing the instruction queue before queued instructions are processed by the instruction processor, the parser issuing a memory retrieval signal for the corresponding memory address upon finding the address reference in the instruction queue; and a memory retrieval initiator coupled with the parser and a system memory, the memory retrieval initiator initiating retrieval of contents of the corresponding memory address upon receiving the memory retrieval signal.