Patent ID: 6909811
Filing Date: 2005-06-21
Classification: H04N

Abstract:
1. An image processing apparatus comprising: means for generating a plurality of coefficients representative of an image; variable length encoding means for encoding each of the generated plurality of coefficients to obtain variable length encoded data corresponding to each coefficient; and hierarchical output means for distributing each bit of the variable length encoded data to a plurality of bit planes each corresponding to a level of each bit, and hierarchically and sequentially outputting the plurality of bit planes from most significant bit (MSB) to least significant bit (LSB), wherein said variable length encoding means executes variable length encoding for each of the plurality of coefficients, and in the hierarchical output by said hierarchical output means, the output of the bit plane of a certain level is skipped so as not to output a blank bit corresponding to the position of the variable length encoded data of a short length.