Patent ID: 9061898
Filing Date: 2015-06-23
Classification: B82Y,H01L

Abstract:
1. A memory device comprising: a memory cell including, a first double tunnel junction structure which comprises a first nanocrystal layer that includes first conductive minute particles being nanocrystals, and first and second tunnel insulating films that are arranged to sandwich the first nanocrystal layer; a second double tunnel junction structure which comprises a second nanocrystal layer that includes second conductive minute particles being nanocrystals, and third and fourth tunnel insulating films that are arranged to sandwich the second nanocrystal layer; a charge storage layer which is arranged between the first double tunnel junction structure and the second double tunnel junction structure, and stores information charges; and first and second terminals which are arranged to sandwich the first double tunnel junction structure, the charge storage layer, and the second double tunnel junction structure, wherein the first conductive minute particles have an average grain size which is different from an average grain size of the second conductive minute particles, and a reading operation to the memory cell is performed by a current which flows through the first and second terminals, the first and second double tunnel junction structures and the charge storage layer.