Patent ID: 8405443
Filing Date: 2013-03-26
Classification: H01L,H03K

Abstract:
1. A pass transistor circuit comprising: a first input/output terminal connected to a first signal line; a second input/output terminal connected to a second signal line; a first device having first and second terminals, the first terminal being connected to a first power supply voltage; a second device having third and fourth terminals, the third terminal being connected to the second terminal, the fourth terminal being connected to a second power supply voltage; a first transistor, one of a source/drain of the first transistor being connected to the second terminal, a gate of the first transistor receiving a first control signal, the first transistor being in one of a turn-off state and a turn-on state depending on the first control signal; and a second transistor, a gate of the second transistor being connected to the other one of the source/drain of the first transistor, one of a source/drain of the second transistor being connected to the first input/output terminal, the other one of the source/drain of the second transistor being connected to the second input/output terminal, one of the first and second devices being a nonvolatile memory device, the other one of the first and second devices being a MOSFET, and a charge amount at the gate of the second transistor depending on a resistance state of the nonvolatile memory device when the first transistor is in the turn-off state.