Patent ID: 6314639
Filing Date: 2001-11-13
Classification: H01L,Y10T

Abstract:
A method for manufacturing a semiconductor device assembly, comprising:providing a substrate having at least one circuit on a first side thereof;providing a semiconductor die having an active surface having at least one bond pad thereon and having a second surface;providing a metallic paddle frame having left and right rails, opposing cross members connected to said left and right rails, and a paddle sized to cover said second surface of said semiconductor die connected to said left and right rails and said opposing cross-members, said paddle suspended between said left and right rails and said opposing cross-members for receiving said second surface of said semiconductor die thereon;providing at least one conductive bump on said at least one bond pad on said active surface of said semiconductor die for connection to said at least one circuit on a first side of said substrate, said at least one conductive bump on said at least one bond pad of said semiconductor die forming a portion of a conductive ball-grid-array connection to said at least one circuit on a first side of said substrate;attaching the second surface of said semiconductor die to said paddle;disconnecting said paddle having said semiconductor die attached thereto from said paddle frame; andconnecting said at least one conductive bump on said at least one bond pad of the active surface of said semiconductor die to said at least one circuit on a first side of said substrate forming a portion of a conductive ball-grid-array connection to said substrate, said paddle attached to said second surface of said semiconductor die providing a heat sink for said semiconductor die during the operation thereof.