Patent ID: 9012920
Filing Date: 2015-04-21
Classification: H01L

Abstract:
1. A power semiconductor device, comprising: a gallium nitride compound element; a contact pad including sources, a drain, and a gate connecting with the gallium nitride compound element; a module substrate to which the gallium nitride compound element is flip-chip bonded; a bonding pad formed on the module substrate; a bump formed on the bonding pad of the module substrate so that the contact pad and the bonding pad are flip-chip bonded; and thermal vias disposed in the module substrate, the thermal vias being formed so as to at least partially extend across each of the sources and the drain to emit heat from the gallium nitride compound element, the thermal vias being disposed relative to each other so as to form a zig-zag, and a size of each of the thermal vias is equal to or smaller than a length calculated by a formula a+b+c, wherein a in the formula is a source horizontal length of one of the sources, b in the formula is a drain horizontal length of the drain, and c in the formula is a source horizontal length of another of the sources.