Patent ID: 6794891
Filing Date: 2004-09-21
Classification: G01R,G11C

Abstract:
A semiconductor integrated circuit comprising:a plurality of function blocks; an instruction storage unit receiving the command and expected value data which corresponds to the command as serial data in synchronization with an external clock signal to then convert the serial data into parallel data and store the parallel data. a control unit controlling the function blocks in accordance with a predefined program in an ordinary operation mode and testing a test-subject function block in accordance with a given command in a test operation mode; a decision unit comparing, to each other, data which is output from the test-subject function block in response to the command and expected value data which is given corresponding to the command, to decide acceptability of a function of the function block in the test operation mode; and an output unit holding a decision result given by the decision unit and outputting the decision result to an output terminal.