Patent ID: 7064942
Filing Date: 2006-06-20
Classification: H01L,H02H

Abstract:
1. An ESD protection circuit with tunable gate-bias coupled between a first and second pad respectively for receiving a first and second power supply voltage, the ESD protection circuit comprising: a diode having an anode and cathode; a resistor coupled between the cathode of the diode and the first pad; a capacitor coupled between the cathode of the diode and the second pad; a first transistor of a first conductivity type having a gate coupled to the cathode of the diode, a drain coupled to the anode of the diode and a source coupled to the second pad; a second transistor of a second conductivity type having a gate coupled to the cathode of the diode, a drain coupled to the anode of the diode and a source coupled to the first pad; and a third transistor of the first conductivity type having a gate coupled to the anode of the diode, a drain coupled to the first pad and a source coupled to the second pad.