Patent ID: 8293636
Filing Date: 2012-10-23
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: forming a semiconductor device structure comprising a contact pad; forming a layer of passivation material overlying the semiconductor device structure and overlying the contact pad; forming a layer of first stress buffering material overlying the layer of passivation material; exposing a portion of the layer of first stress buffering material, resulting in exposed and undeveloped first stress buffering material; forming a layer of second stress buffering material overlying the exposed and undeveloped first stress buffering material; exposing a portion of the layer of second stress buffering material, resulting in exposed and undeveloped second stress buffering material; concurrently developing the exposed and undeveloped second stress buffering material and the exposed and undeveloped first stress buffering material to remove some of the second stress buffering material and some of the first stress buffering material to expose a portion of the layer of passivation material, resulting in a recess having a stepped cross-sectional profile; selectively etching the layer of passivation material using the first stress buffering material, the second stress buffering material, and the recess as an etch mask, to expose at least a portion of the contact pad; and thereafter forming a conductive connection element overlying the recess.