Patent ID: 9224699
Filing Date: 2015-12-29
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor package, comprising: forming cracks in a lattice structure on an active surface of a wafer in which electrode terminals are formed; grinding a back surface of the wafer facing the active surface; bonding a tape on the active surface of the wafer; expanding the tape such that the wafer on the tape is divided into a plurality of sections, each section corresponding to a semiconductor chip; forming a shield layer on surfaces of the semiconductor chips and the tape; cutting the shield layer between the semiconductor chips, and sectioning off each of the semiconductor chips, each semiconductor chip having an active surface and a first shield pattern on a back surface and sides thereof; bonding the semiconductor chips to a substrate; and forming a second shield pattern on each active surface of the semiconductor chips, wherein the semiconductor chips and the substrate are connected by a bonding wire.