Patent ID: 9000814
Filing Date: 2015-04-07
Classification: H03L

Abstract:
1. A coarse lock detector comprising first through p-th detection cells which receive p multiphase clocks generated by incrementally delaying a reference clock, wherein the first through p-th detection cells are divided into a first detection cell group having detection cells defined by 3k+1 of the p-th detection cells, a second detection cell group having detection cells defined by 3s+2 of the p-th detection cells, and a third detection cell group having detection cells defined by 3r of the p-th detection cells, where p is an integer equal to or greater than four, k is an integer equal to or greater than zero when 3k+1 is equal to or smaller than p, s is an integer equal to or greater than zero when 3s+2 is equal to or smaller than p, and r is an integer equal to or greater than one when 3r is equal to or smaller than p, wherein each of the detection cells groups has the same number of cells, wherein at least one detection cell of the first detection cell group is only connected to at least one other detection cell of the first detection cell group, at least one detection cell of the second detection cell group is only connected to at least one other detection cell of the second detection cell group, and at least one detection cell of the third detection cell group is only connected to at least one other detection cell of the third detection cell group.