Patent ID: 7926046
Filing Date: 2011-04-12
Classification: G06F

Abstract:
1. A compilation method for extracting and implementing an accelerator control program from an application source code in a processor based system consisting of an accelerator, one or more processors and one or more main memories, wherein the accelerator comprise direct memory accesses, compute cores, local memories and a programmable accelerator controller unit and the application source code comprises arrays and loops, said compilation method comprising the steps of: performing loop nest analysis, wherein said loop nest analysis consists of dependence analysis and pointer analysis and wherein dependence analysis determines the conflicts between the various references to arrays in the loop and pointer analysis determines if two pointer references in a loop are in conflict; performing transformations to convert the loops from their original sequential execution semantics to parallel execution semantics, wherein said step of performing transformations further comprises the steps of: performing back-end processes for creating an accelerator control program that parallelizes the activities of the components of the accelerator, using the output of the loop-nest analysis and transformation, further comprising the steps of: