Patent ID: 6156660
Filing Date: 2000-12-05
Classification: H01L

Abstract:
A method of forming an integrated circuit having an improved bonding pad which resists bonding pad peeling, the method comprising:providing a substrate having active or passive devices formed thereon or therein and having a substrate surface for forming bonding pads;forming a first insulating layer over said substrate surface;masking and etching said first insulating layer to form an array of insulator lines wherein said insulator lines are closely spaced in first areas and widely spaced in second areas;forming dummy leads in said second areas, wherein the dummy leads are coplanar with the insulator lines;depositing a filler material over said insulator lines and dummy leads; andperforming Chemical Mechanical Planarization to etch away said filler material down to the top surface of said insulator lines and said of dummy leads.