Patent ID: 6300812
Filing Date: 2001-10-09
Classification: H03K

Abstract:
A two phase clock generation apparatus, comprising:a current source to generate a charging current at a first output node and a discharging current at a second output node; anda switch having first and second input terminals and first and second output terminals, said first and second input terminals being coupled to said first and second output nodes of said current source, respectively, said switch having a first switch configuration where said first input terminal is coupled to said first output terminal and said second input terminal is coupled to said second output terminal and a second switch configuration where said first input terminal is coupled to said second output terminal and said second input terminal is coupled to said first output terminal, said switch to alternate between said first and second switch configurations so that said first and second output terminals each alternately charge and discharge in a manner that generates true and complement clock signals on said first and second output terminals.