Patent ID: 7790614
Filing Date: 2010-09-07
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming on a lower insulating layer first to third electrically conducting layers sequentially and a protective insulating layer when necessary; forming a mask pattern on the third conducting layer or the protective insulating layer; dry-etching the first to third conducting layers with the mask pattern serving as a mask, thereby dividing the conducting layers; and forming an insulating layer between the adjacent second conducting layers by an HDP-CVD process so that a void is defined so as to be located lower than an interface between the first and second conducting layers and higher than an interface between the second and third conducting layers so as to have a sectional area larger than the second conducting layer, wherein the forming of the insulating layer by the HDP-CVD process includes burying the insulating layer and sputtering thereby to spread a frontage of a buried region which has been buried by the burying process, both burying and sputtering being repeated alternately.