Patent ID: 6825105
Filing Date: 2004-11-30
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having a Schottky barrier between a Schottky electrode and a semiconductor body portion of a first conductivity type that is bounded laterally by a trenched insulated electrode, the Schottky barrier terminating laterally in a guard region of the opposite, second conductivity type adjacent to the trenched insulated electrode, wherein the following process steps are used to self-align the guard region, the trenched insulated electrode and the Schottky barrier with respect to each other:(a) a mask pattern is provided at a surface of a semiconductor body to mask an area where the Schottky barrier is to be formed, (b) a narrow window is defined by providing sidewall extensions at the sidewalls of a wider window of the mask pattern, and the trenched insulated electrode is formed by etching a trench into the body at the narrow window and by providing insulating material and then electrode material in the trench, (c) the guard region is provided by introducing dopant of the second conductivity type into the body via the wider window of the mask pattern, the mask pattern being sufficiently thick to mask the underlying body portion against the dopant introduction and sufficiently wide to prevent the dopant from extending laterally into the area where the Schottky barrier is to be formed, and (d) at least the mask pattern is removed before depositing the Schottky electrode at least at the area where the Schottky barrier is to be formed.