Patent ID: 6613630
Filing Date: 2003-09-02
Classification: H01L

Abstract:
A method for fabricating a nonvolatile memory device, comprising:providing a semiconductor substrate having an active area defined by an isolation layer; forming a gate oxide layer on the active area of the semiconductor substrate; forming a polysilicon layer acting as a floating gate on a part of the gate oxide layer; forming source and drain regions in the active area of the semiconductor substrate from both sides of the polysilicon layer; forming a first oxide layer on the gate oxide layer around the polysilicon layer and on a peripheral part of the polysilicon layer; forming a first metal layer on a part of the first oxide layer and on a central part of the polysilicon layer exposed through the first oxide layer, whereby the first metal layer has a downwardly extended portion electrically connected to the polysilicon layer and thus acts as the floating gate; forming conformally a second oxide layer on the first metal layer and the first oxide layer; forming a second metal layer acting as a control gate on a part of the second oxide layer to correspond to the first metal layer, so that the second metal layer has a downwardly extended portion; and forming metal lines respectively connected to the second metal layer and the source/drain regions.