Patent ID: 6051965
Filing Date: 2000-04-18
Classification: H03F,H03H

Abstract:
A two-terminal paired circuit, comprising:two sets of differential transistor pairs, wherein a first set of the differential transistor pair includes two transistors, collectors of which are respectively connected to a pair of input terminals and to a bias circuit serving also as a DC shift, bases of which are connected to said bias circuit to apply a voltage feedback from the collectors to the bases, and emitters of which are connected to a constant current course and have an impedance element connected the emitters;a second set of the differential transistor pair includes two transistors, collectors of which are respectively connected to a pair of output terminals and to a bias circuit serving also as a DC shift, bases of which are connected to said bias circuit to apply a voltage feedback from the collectors to the bases and emitters of which are connected to a constant current source and have an impedance element connected therebetween; andwherein said voltage feedbacks together with said two sets of differential pairs are applied symmetrically with respect to left and right, whereby said impedances connected between said input and output terminals.