Patent ID: 7106478
Filing Date: 2006-09-12
Classification: G06T,H04N

Abstract:
1. An image processing device comprising: a raster scanning type image input module which reads images from a document and outputs image signals indicating the images, at different sampling rates; and a filter processing module which performs filter processing on the image signals output from the raster scanning type image input module, wherein: the raster scanning type image input module outputs, in synchronism with an image clock, a first or second image signal read at a preset sampling rate or a sampling rate higher than the preset sampling rate in a main scanning direction and a sub-scanning direction of the document, when a sampling rate of reading of the document is switched by an external sampling rate selection signal and the sampling rate selection signal is in a low sampling rate mode or a high sampling rate mode, the raster scanning type image input module also outputting a main-scanning-directional image effective signal when the first or second image signal is output; the filter processing module includes a line memory controller supplied with the first or second image signal output from the raster scanning type image input module, the main-scanning-directional image effective signal, and the image clock, a plurality of line memories connected to the line memory controller, an image window section connected to the line memory controller, a filter computing section connected to the image window section, a selector connected to the filter computing section, and serving as a filter factor selecting module, a filter factor the line memory controller sequentially stores the first or second image signal, output from the raster scanning type image input module, into the line memories in units of lines in accordance with the main-scanning-directional image effective signal, reads image data of (W×H) pixels around a to-be-processed pixel, including the to-be-processed pixel, from the first or second image signal, stored in the line memories, in accordance with the image clock, and outputs the image data to the image window section, whereby the image window section latches the image data of (W×H) pixels output from the line memory controller, the latched image data being output to the filter computing section; the filter computing section multiplies each piece of the image data by a filter factor output from the selector as the filter factor selecting module, using a corresponding one of multipliers, and sums up resultant data pieces using a total adding machine; a total value output from the total adding machine is expressed as a numerical value of (±m, n), m being an integer of m bits, n being a decimal fraction of n bits, (±m, n) being accordingly (m+n+1) bits; and the total value is converted into an integer by an integrator and output as a filter processing result of an integer of m bits.