Patent ID: 6177725
Filing Date: 2001-01-23
Classification: H01L

Abstract:
A semiconductor device, comprising:a semiconductor element having a plurality of electrodes on an upper surface thereof;a first substrate having a plurality of conductors on an upper surface thereof, said first substrate being mounted on the upper surface of said semiconductor element and being smaller in area than said semiconductor element;a second substrate having a plurality of solderballs on an upper surface thereof, said second substrate being mounted on the upper surface of said first substrate and being smaller in area than said first substrate;an adhesive layer disposed between said first substrate and said semiconductor element, and causing said first substrate to be affixed to said semiconductor element;a plurality of metal wires electrically coupling the electrodes on said semiconductor element to the conductors on said first substrate;a sealing frame attached to said semiconductor element;a cap bonded to both said second substrate and said sealing frame; andan interior region defined by said semiconductor element, said first and second substrates, said cap and said sealing frame, wherein said wires are disposed in said interior region.