Patent ID: 7262995
Filing Date: 2007-08-28
Classification: G11C

Abstract:
1. A method for reading an NAND-type flash memory apparatus having a plurality of cell strings, each of which a plurality of cells is serially connected to, a plurality of bit lines, each of which is connected to a common drain terminal of the corresponding cell string to select the cell strings, a common source line connected to a common source terminal of the cell strings, a plurality of word lines intersecting the bit lines to select the respective cells, comprising the steps of: selecting a cell to read a state thereof by selecting the corresponding bit line and the corresponding word line; applying a ground voltage to the selected word line, applying a pass voltage to the other non-selected word lines, applying a power supply voltage to the other non-selected bit lines, applying a read voltage to the selected bit line, and applying the power supply voltage to the common source line, wherein the read voltage is lower than the power supply voltage and higher than the ground voltage; and reading information stored in the selected cell by comparing a voltage of the selected bit line with a reference voltage.