Patent ID: 7026203
Filing Date: 2006-04-11
Classification: H01L

Abstract:
1. A method for fabricating dual gate electrodes comprising: growing a first gate oxide layer on a semiconductor substrate; performing a thermal treatment for the first gate oxide layer; removing a part of the first gate oxide layer to expose a surface of the semiconductor substrate; growing a second gate oxide layer as a thin oxide layer over the exposed surface of the semiconductor substrate and the first gate oxide layer; depositing a polysilicon layer over the entire surface of the semiconductor substrate; etching the polysilicon layer to form at least a first dummy gate on the first gate oxide layer and at least a second dummy gate on the second gate oxide layer; forming sidewall spacers on the lateral faces of the first and second dummy gates; forming source and drain regions in the semiconductor substrate on both sides of the first and second dummy gates; removing the first and second dummy gates and the second gate oxide layer between the sidewall spacers; forming an insulating layer where the second gate oxide layer is removed; performing a thermal treatment for the insulating layer; filling polysilicon for gate electrodes where the dummy gates are removed; and planarizing the polysilicon for gate electrodes to form gate electrodes.