Patent ID: 6525389
Filing Date: 2003-02-25
Classification: H01L

Abstract:
A high voltage device; said high voltage device comprisingan N type monocrystalline silicon die having top and bottom surfaces; said top surface having an active surface containing a plurality of PN junctions and a termination region comprising at least first and second concentric P type guard ring diffusions and a first and second ring of silicon dioxide; said first silicon dioxide ring spanning between said at least first and second guard ring diffusions; said second silicon dioxide ring spanning between said second guard ring diffusion and the outer periphery of said active surface; a single contact layer overlying the top surface of said device and separated into an active contact portion overlying said active surface and overlapping atop said second silicon dioxide ring and defining a first field plate; a second field plate in contact with said second guard ring diffusion and overlapping atop said first silicon dioxide ring; a separate contact layer atop said first guard ring diffusion; and a thin layer of high resistivity amorphous silicon interposed between said single contact layer and said top surface of said silicon, wherein said thin layer of amorphous silicon is a continuous layer over the full top surface of said wafer.