Patent ID: 7368780
Filing Date: 2008-05-06
Classification: G11C,H01L

Abstract:
1. A semiconductor memory device comprising: a semiconductor substrate; an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions; a floating gate of polysilicon provided on each of the element formation regions through a first insulation film; a second insulation film, provided on the floating gate, containing a metal element; a control gate of polysilicon, provided on the second insulation film; and source/drain regions provided in the semiconductor substrate, wherein first and second a polysilicon conductive layers containing a metal element are in contact with the floating gate and the control gate, respectively, and first and second mutual diffusion layers composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on the first and second polysilicon layers, respectively.