Patent ID: 6048777
Filing Date: 2000-04-11
Classification: H01L

Abstract:
A method of fabricating heat sinks on the backsides of an array of individual power semiconductor devices and of separating said array of individual devices and their respective heat sinks without cutting or dicing, comprising:providing a semiconductor wafer;forming an etch stop layer on the semiconductor wafer;frontside processing the wafer to form an array of power semiconductor devices on the etch stop layer;using a bonding agent to mount the wafer face down onto a carrier so that the wafer's back surface is exposed;patterning the wafer's back surface to form a web of wafer material that defines an array of tubs that expose portions of the etch stop layer on the backsides of the respective power semiconductor devices that are wider than said devices;forming heat sinks on said exposed portions of said etch stop layer in the respective tubs that are spaced inward from their walls;etching through the exposed portions of the etch stop layer that lie between said heat sinks and the walls of the tubs; andchemically removing the bonding agent to release the power semiconductor devices with their respective integrated heat sinks from said web and said carrier, said method enabling said power semiconductor devices and their respective integrated heat sinks to be separated without sawing or dicing.