Patent ID: 9081895
Filing Date: 2015-07-14
Classification: G06F

Abstract:
1. A method for identifying and tagging a breakpoint instruction, comprising the steps of: a processor storing an address of a first instruction of a first instruction set into a first register, wherein the first instruction address includes a first instruction set location, and a first instruction offset within the first instruction set; the processor determining that the first instruction set location matches a breakpoint instruction set location of a breakpoint instruction address stored in a breakpoint register, the breakpoint register including a state bit, and the breakpoint instruction address including the breakpoint instruction set location and a breakpoint instruction offset; the processor retrieving the first instruction; the processor determining that the breakpoint instruction offset identifies the first instruction as the breakpoint instruction; the processor setting the state bit of the breakpoint register; the processor removing the first instruction based on the state bit of the breakpoint register being set; the processor re-retrieving the first instruction; the processor tagging the first instruction; and the processor generating an interrupt based on either the tagged first instruction being next to completion or the tagged first instruction being completed.