Patent ID: 6835620
Filing Date: 2004-12-28
Classification: H01L

Abstract:
A method of manufacturing flash memory devices, comprising the steps of:sequentially forming a gate oxide film, a first polysilicon film for a floating gate electrode and a pad nitride film on a semiconductor substrate; patterning the gate oxide film, the first polysilicon film, the pad nitride film and the semiconductor substrate in a given thickness to form an isolation film pattern and a floating gate electrode pattern at the same time; filling the isolation film pattern with an insulating film to form an isolation film and then stripping the pad nitride film; sequentially forming a dielectric film, a second polysilicon film for a control gate electrode and a metal silicide film on the resulting structure; patterning the metal silicide film and the second polysilicon film to form a control gate electrode pattern; performing an electrochemical process for the resulting structure, whereby the first polysilicon film formed in regions other than the region where the second polysilicon film is formed on the isolation film and the floating gate electrode pattern is formed becomes a porous silicon film; performing a thermal oxidation process for the resulting structure so that the porous silicon film becomes a first oxide film; and forming a second oxide film on the whole resulting structure.