Patent ID: 7515392
Filing Date: 2009-04-07
Classification: H03K

Abstract:
1. A protection circuit associated with a first PMOS transistor of a voltage specification of a first voltage level, said first PMOS transistor and said protection circuit being comprised in an integrated circuit designed to process information in an input signal having a swing equaling a second voltage level, wherein said first voltage level is lower than said second voltage level, said protection circuit comprising: a second PMOS transistor which switches to an off state if said input signal having said swing would cause a cross terminal voltage of said first PMOS transistor to exceed a permissible range, wherein said second PMOS transistor in said off state ensures that said cross terminal voltage of said first PMOS transistor does not exceed said permissible range; a first NMOS transistor also of said voltage specification of said first voltage level; a second NMOS transistor which switches to an off state if said input signal would cause a cross terminal voltage of said first NMOS transistor to exceed a permissible range, wherein said second NMOS transistor in said off state ensures that said cross terminal voltage of said first NMOS transistor does not exceed said permissible range.