Patent ID: 6590452
Filing Date: 2003-07-08
Classification: H03F

Abstract:
An apparatus, comprising:a first resistor circuit that is coupled between a first node and a power supply, wherein the first resistor circuit has a first sense voltage associated therewith; a second resistor circuit that is coupled between a second node and the power supply, wherein the second resistor circuit has a second sense voltage associated therewith; a first cascode transistor that is coupled between a third node and the first node, and responsive to a first control signal; a second cascode transistor that is coupled between a fourth node and the second node, and responsive to a second control signal; a first amplifier circuit that is arranged to provide the first control signal in response to the first sense voltage and a reference voltage; a second amplifier circuit that is arranged to provide the second control signal in response to the second sense voltage and the reference voltage; and a current mirror circuit that includes a first terminal that is coupled to the third node and a second terminal that is coupled to the fourth node such that the third node operates as a high impedance output node for the cascode stage, whereby high DC gain and low noise performance is achieved.