Patent ID: 8829602
Filing Date: 2014-09-09
Classification: H01L,Y10S

Abstract:
1. An integrated circuit structure, comprising: a source region formed at a top portion of a first pillar; a drain region formed at a top portion of a second pillar, each of the first and second pillars having inner surfaces that face each other and outer surfaces that do not face each other, and side walls that extend between respective inner and outer surfaces; a connecting portion of semiconductor material that connects bottom portions of the first and second pillars, the connecting portion extending along a first axis between the first and second pillars; a gate material extending parallel to the first axis, the gate material facing side walls of the first and second pillars; a channel connecting the source region and the drain region, the channel formed adjacent the gate material in the connecting portion of semiconductor material and in the bottom portions of the first and second pillars; a first trench adjacent to the outer surface of the first pillar, the first trench extending deeper into the semiconductor material than the connecting portion; and a second trench adjacent to the outer surface of the second pillar, the second trench extending deeper into the semiconductor material than the connecting portion, wherein the first and second trenches are each filled with insulating material to isolate the integrated circuit structure from adjacent devices.