Patent ID: 8318523
Filing Date: 2012-11-27
Classification: H01L

Abstract:
1. A thin film transistor, comprising: a substrate; a semiconductor layer disposed on the substrate, comprising a channel region, source and drain regions, and a first body contact region formed at a first edge of the semiconductor layer; a gate insulating layer disposed on the semiconductor layer and exposing the first body contact region; a silicon layer disposed such that the gate insulating layer is between the silicon layer and the channel region of the semiconductor layer, the silicon layer contacting the first body contact region; a gate electrode disposed on the silicon layer; an interlayer insulating layer disposed on the gate electrode; and source and drain electrodes disposed on the interlayer insulating layer and electrically connected with the source and drain regions, respectively, wherein the first body contact region is connected with the channel region, and wherein the silicon layer includes a first type of impurity, and the source and drain regions include a second type of impurity, the first and second types of impurities having opposite conductivities.