Patent ID: 8463860
Filing Date: 2013-06-11
Classification: H04L

Abstract:
1. A computer-implemented method for scale testing a device under test, the method comprising: receiving, by a computer system, a scenario describing a model message exchange between at least a first host and a second host, wherein the computer system comprises at least one processor and operatively associated memory, wherein the scenario comprises a plurality of scenario objects, the plurality of scenario objects comprising: receiving, by the computer system, a pattern associated with the scenario, wherein the pattern defines a plurality of intervals and, for each interval, a number of concurrencies at a start of the interval, and a number of concurrencies at an end of the interval; processing, by the computer system, the scenario to generate an processed scenario; executing, by the computer system, a first track, wherein executing the first track comprises executing a plurality of concurrencies of the processed scenario according to the pattern, wherein executing each of the plurality of concurrencies comprises: