Patent ID: 6791137
Filing Date: 2004-09-14
Classification: H01L,Y10S

Abstract:
A semiconductor integrated circuit device comprising:a MISFET formed on a semiconductor substrate; a gate electrode of said MISFET formed on said semiconductor substrate; contact holes formed on source and drain regions of said MISFET; conductors formed in said contact holes and electrically connected to said source and drain regions; and a first insulating film formed around at least one of said conductors, wherein said first insulating film is formed so as to surround said conductor on a bottom part of said contact hole, and at least a part of said first insulating film is removed and said first insulating film is not formed so as to surround said conductor in an upper part of said contact hole, a second insulating film formed on said gate electrode, wherein an upper surface of said second insulating film has substantially a same plane as an upper surfaces of said conductors, and a third insulating film formed between said second insulating film and said first insulating film along a side surface of said gate electrode.