Patent ID: 7008826
Filing Date: 2006-03-07
Classification: H01L

Abstract:
1. A fabrication method of a lead-frame-based semiconductor package, comprising the steps of: preparing a lead frame having a plurality of first leads and second leads, each lead having an upper surface and a lower surface opposed to the upper surface, wherein each of the first leads is formed with an extending portion, and the extending portion has an upper surface and a lower surface respectively flush with the upper surface and the lower surface of the corresponding one of the first leads; mounting at least a chip over the upper surfaces of the extending portions; forming a plurality of bonding wires for electrically connecting the chip to the first and second leads; forming an encapsulant for encapsulating the first and second leads, the extending portions, the chip and the bonding wires, wherein the lower surfaces of the first and second leads and the lower surfaces of the extending portions are exposed to outside of the encapsulant; partly removing the extending portions from the exposed lower surfaces thereof, so as to allow the extending portions to be smaller in thickness than the first leads in a manner that, the lower surfaces of the extending portions form a predetermined thickness with respect to the lower surfaces of the first leads; and applying a non-conductive material over the lower surfaces of the extending portions.