Patent ID: 6399431
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method of forming an electrostatic discharge device in the fabrication of integrated circuits comprising:providing a silicon-on-insulator substrate; patterning said silicon-on-insulator substrate to form gate electrodes within said silicon-on-insulator substrate wherein a lower portion of said silicon-on-insulator substrate is exposed between each two of said gate electrodes; implanting ions into said exposed portion of said silicon-on-insulator substrate to form source and drain regions adjacent to one of said gate electrodes; forming spacers on sidewalls of said gate electrodes; depositing an interlevel dielectric layer overlying said gate electrodes; forming openings through said interlevel dielectric layer to said source and drain regions; and filling said openings with a conducting layer and patterning said conducting layer to form conducting lines to complete formation of said electrostatic discharge device in said fabrication of integrated circuits.