Patent ID: 7579894
Filing Date: 2009-08-25
Classification: H03K

Abstract:
1. A debounce circuit arranged to receive a clock signal of a first frequency and a pulse signal providing periodic pulses at a second lower frequency, said debounce circuit comprising a first switching unit and a second switching unit; each switching unit including an input stage having an output, a feedback input and one or more inputs; each switching unit further including an output stage having an output and an input; the output of the output stage of the first switching unit being coupled to one of said one or more inputs of the input stage of the second switching unit; each output stage being clocked by the clock signal; the output of each output stage being fed back to said feedback input of the respective input stage; the output of each input stage being provided to the input of the respective output stage; the output of each input stage being selectively coupleable by said input stage to the respective feedback input, dependent on the state of the pulse signal and a control signal provided as one of said one or more inputs of the respective input stage, to maintain the state of the output of the output stage; the output of the input stage also being selectively coupleable by said input stage to one of said one or more inputs of the respective input stage, dependant on the state of the pulse signal and said control signal of the respective input stage, to allow changing of the state of the output of the output stage; a debounce circuit input signal being provided as one of the inputs of the input stage of the first switching unit; a debounce circuit output signal is provided based on the output of said second switching unit.