Patent ID: 6479400
Filing Date: 2002-11-12
Classification: H01L

Abstract:
A method of manufacturing a system-on-chip (SOC) comprising an adjacent circuit in which a MOS (Metal Oxide Semiconductor) having a thick film gate insulating film made of layers of a first gate insulating film and a second gate insulating film is placed and an internal circuit in which a MOS having a thin film gate insulating film made of a second gate insulating film is placed; which comprises the steps of:(a) forming the first gate insulating film on a silicon substrate; (b) removing the first gate insulating film lying in a region where said internal circuit is to be formed; (c) cleaning said silicon substrate under the conditions that an etching amount of the first gate insulating film lying in a region where said adjacent circuit is to be formed is, by the film thickness, not less than 0.01 nm but not greater than 0.2 nm; and (d) forming the second gate insulating film on said silicon substrate.