Patent ID: 9087798
Filing Date: 2015-07-21
Classification: H01J,H01L

Abstract:
1. An etching method of forming a dummy gate of a fin-type field effect transistor with a target object including multiple fins, masks formed on the multiple fins, and a gate material deposited between the multiple fins and deposited on upper surfaces of the masks, the etching method comprising: a first etching process of etching the gate material until the upper surfaces of the masks are exposed; and a second etching process of etching the gate material deposited between the multiple fins by using surface wave plasma, wherein a pressure in the second etching process is about 50 mTorr (about 6.67 Pa) or more, and in the second etching process, a frequency of a power to be applied to a mounting table configured to mount thereon the target object is in a range of about 10 Hz or more to about 200 Hz or less, and the power is pulse-modulated such that a duty ratio as a ratio of an ON-time to a pulse cycle is about 50% or less.