Patent ID: 8389347
Filing Date: 2013-03-05
Classification: H01L

Abstract:
1. A method for manufacturing a field effect transistor, comprising: forming a mask comprising an insulating film on a SOI substrate, the SOI substrate having a SI layer formed on an insulating layer; forming the Si layer into a mesa structure by performing etching with the use of the mask, the mesa structure having a pair of sidewalls extending in a first direction parallel to an upper face of the SOI substrate, the sidewalls facing each other; reducing a distance between the sidewalls to be less than a width of the mask in a second direction perpendicular to the first direction and flattening the sidewalls by performing a heat treatment in a hydrogen atmosphere, the flattened sidewalls being formed with one of a {110} plane or a {111} plane; forming a gate insulating film covering the flattened sidewalls; forming a gate electrode covering the gate insulating film; and forming source and drain regions at portions of the mesa structure, the portions being located on two sides of the gate electrode.