Patent ID: 6100765
Filing Date: 2000-08-08
Classification: H03L,H04B,H04L

Abstract:
A clock recovery method for extracting a clock signal from an input digital signal in a phase lock loop, the method comprising:producing, with a voltage controlled oscillator having a control node, an output wave having a frequency that varies in response to a voltage applied to the control node;controlling, with charge pump and loop filter circuitry, the rate of change of the voltage on the control node of the voltage controlled oscillator;performing, with start-up circuitry, frequency discrimination and, in conjunction with the charge pump and loop filter circuitry, adjusting the voltage on the control node of the voltage controlled oscillator;performing phase control and adjusting the voltage on the control node of the voltage controlled oscillator using a state machine;applying, with bias circuitry, an offset voltage to the voltage controlled oscillator such that, in the absence of any voltage applied to the control node, the frequency of the output wave produced by the voltage controlled oscillator is at least half and not greater than the final frequency of the voltage controlled oscillator when frequency lock is established.