Patent ID: 8219378
Filing Date: 2012-07-10
Classification: G06F

Abstract:
1. A non-transitory computer-readable medium that stores computer-executable instructions, the instructions comprising: one or more instructions, executable by at least one processor, to generate intermediate simulation results based on a model and based on internals associated with a target processor, the model including a reference design and the internals include at least one of architecture information, compiler information, compiler settings, or operating system information; one or more instructions, executable by the at least one processor, to generate intermediate execution results based on code information associated with the target processor, the target processor internals, and the model; one or more instructions, executable by the at least one processor, to compare the intermediate simulation results and the intermediate execution results; one or more instructions, executable by the at least one processor, to update the target processor internals based on the comparison; and one or more instructions, executable by the at least one processor, to reperform the generate intermediate simulation results, the generate intermediate execution results, the compare, and the update until a bit-true model simulation is achieved for the target processor.