Patent ID: 9106228
Filing Date: 2015-08-11
Classification: H03K

Abstract:
1. An adaptive MOS gate driver circuit comprising: a gate control circuit configured to form a drive signal to drive a gate of an MOS transistor; a variable frequency oscillator configured to form a clock signal and to adjust a frequency of the clock signal responsively to a difference between a Vgs of the MOS transistor and a first threshold value; a charge pump circuit configured to provide an output voltage and an output current to the gate control circuit wherein a value of the output current varies proportionally to variations of the frequency of the clock signal; and the gate control circuit configured to couple the output current from the charge pump circuit to the gate of the MOS transistor responsively to the Vgs of the MOS transistor having a value greater than a second threshold value and to provide a current from a selectively enabled current source of the gate control circuit responsively to the Vgs of the MOS transistor having a value no greater than the second threshold value.