Patent ID: 7023943
Filing Date: 2006-04-04
Classification: H03L,H04L

Abstract:
1. A detector for detecting timing in a data flow with a bit-time, and with a coding that provides at a beginning of the bit-time no transition, or a transition of a first type, or a transition of a second type, and provides in a middle of the bit-time no transition, or the transition of the first type, the transition of the first type being one transition between an upward transition and a downward transition and the transition of the second type being opposite the transition of the first type, the detector comprising: a first circuit for generating four local timing signals each having a period substantially equal to the bit-time, the four local timing signals being out of phase with one another by ¼ period; and a second circuit for sampling the four local timing signals upon each transition of the first type in the data flow, and for determining based upon sampling whether two of the four local timing signals forming a pair of reference signals that are out of phase by ½ period are advanced or delayed relative to the timing of the data flow, and for controlling said first circuit to delay or advance the four local timing signals based upon the pair of reference signals.