Patent ID: 6061816
Filing Date: 2000-05-09
Classification: G01R

Abstract:
A timing generator that generates a plurality of pulses, which depart from each other by a predetermined interval of time, at predetermined timings, comprising:address generating means for generating a first address by performing a counting operation on a first reference signal;first delay means for imparting a first delay time to the first reference signal to produce a second reference signal;flip-flop circuit means for producing an output that is inverted by the first reference signal and the second reference signal alternatively;storing means for storing a first timing data to a second address within said storing means and for outputting the first timing data wherein the second address represents a combination of the first address and the output of the flip-flop circuit means; andpulse generating means having a trigger terminal and outputting a pulse constituting a part of said plurality of pulses, wherein the timing of said pulse is representative of the time when the trigger terminal receives the second reference signal and when said pulse generating means receives the stored first timing data,wherein the storing means has a plurality of storage areas each of which stores the first timing data and each of which is designated by the first address, so a difference between the timing data respectively written at adjacent storage areas corresponds to a difference between said predetermined interval of time and the first delay time, and wherein said plurality of pulses depart from each other by the predetermined interval of time.