Patent ID: 6746929
Filing Date: 2004-06-08
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising the steps of:forming a first wiring in a first insulating film; forming a second insulating film on the first insulating film; selectively forming a first electrode film on the second insulating film in a manner to overlap partially with the first wiring; selectively forming a third insulating film on the first insulating film; forming a second electrode film on the third insulating film; forming a fourth insulating film on the first and second electrode films and the second insulating film; forming a fifth insulating film on the fourth insulating film; forming a first connecting member electrically connected to the first wiring within the fourth and second insulating films, forming a second connecting member electrically connected to the second electrode film within the fourth insulating film and forming a third connecting member electrically connected to the first electrode film within the fourth insulating film; and forming second, third and fourth wirings connected to the first, second and third connecting members within the fifth insulating film.