Patent ID: 6830977
Filing Date: 2004-12-14
Classification: H01L

Abstract:
A method of forming an isolation trench in a semiconductor substrate comprising:forming a masking layer over a semiconductor substrate, the masking layer comprising silicon nitride received over an oxide layer; etching through the masking layer within a microwave powered plasma etcher effective to expose semiconductive material of the semiconductor substrate using a first gas chemistry comprising CF4 and CHF3, a first magnetron power, and a first RF power; etching into semiconductive material of the semiconductor substrate within the microwave powered plasma etcher using a second gas chemistry comprising CF4 and CHF3, a second magnetron power, and a second RF power; quantity of CF4 being greater than quantity of CHF3 in the first gas chemistry, quantity of CHF3 being greater than quantity of CF4 in the second gas chemistry, the second RF power being greater than the first RF power, the etching of the masking layer and into semiconductive material forming a first isolation trench portion within semiconductive material of the semiconductor substrate, the first isolation trench portion having a first depth within the semiconductor substrate and having a first sidewall intersecting an upper surface of semiconductive material of the semiconductor substrate at a first angle; forming a second isolation trench portion within semiconductive material of the semiconductor substrate, the second isolation trench portion being formed within and extending below the first isolation trench portion, the second isolation trench portion having a second depth within semiconductive material of the semiconductor substrate and including a second sidewall intersecting the first sidewall at an angle with respect to the upper surface that is greater than the first angle; and filling the first and second isolation trench portions with dielectric material.