Patent ID: 7801052
Filing Date: 2010-09-21
Classification: H04L

Abstract:
1. A transmission delay measuring circuit comprising: at least one first transmission path; a transmission unit receiving an output of the at least one first transmission path; an inversion circuit inverting an output of the transmission unit; a first multiplexer outputting one of an external input signal and an output of the inversion circuit to the at least one first transmission path in response to at least one test mode enable signal; and an output terminal outputting, as a measuring signal, a signal in an arbitrary node of a closed loop formed of the at least one first transmission path, the transmission unit, the inversion circuit, and the first multiplexer, wherein the closed loop further includes a second multiplexer transmitting the output of the at least one first transmission path in response to a test mode start signal, the transmission unit includes at least one second transmission path having the same structure as the structure of the at least one first transmission path and a pulse generation unit generating a pulse in response to a change in the logic state of an output of the second multiplexer and outputting the pulse to the at least one second transmission path, and the first multiplexer outputs either one of the external input signal and an inverted output of the at least one second transmission path or one of the external input signal and the output of the at least one second transmission path according to a change or non-change between logic states of an input and the output of the at least one first transmission path.