Patent ID: 8552564
Filing Date: 2013-10-08
Classification: G06F,H01L,H05K,Y10T

Abstract:
1. A semiconductor device substrate, comprising: a first core with a front surface and a back surface; a laminated-core substrate built on the first core front- and back surfaces, wherein the laminated-core substrate includes a front section and a back section, wherein the front section includes couplings for a plurality of processors, and wherein at least one coupling communicates inductor-altered current from the integral inductor coil, and wherein the back section includes an integral inductor coil; wherein the first core includes a plated through hole (PTH) and front- and back PTH conductive pads in contact with the PTH, and wherein the PTH is an air core PTH; wherein the laminated-core substrate includes a tapered via in each of the front- and back sections that expose the PTH conductive pads and that include front- and back tapered contacts that contact the PTH conductive pad and that each include conductive pads coupled to the front- and back tapered vias.