Patent ID: 6333519
Filing Date: 2001-12-25
Classification: G02F,H01L

Abstract:
A semiconductor apparatus, comprising a semiconductor substrate, and a laminate structure formed on the semiconductor substrate including a principal electrode of semiconductor device, a laminate insulating layer and a conductor film disposed in this order on the semiconductor substrate, said principal electrode and said conductor film being electrically connected with each other through a contact hole formed within the laminate insulating layer,wherein said laminate insulating layer comprise a first insulating layer, a second insulating layer, and a third insulating layer disposed in this order, each of said first, second and third insulating layers being respectively provided with first, second and third apertures defining said contact hole, said first and said second apertures being of the same shape and alignment and said third aperture being formed in a desired planar pattern surrounding said first and second apertures, andsaid first and third apertures have been patterned through etching of the first and third insulating layers with the second insulating layer as an etching stopper, said second insulating layer already having its second aperture.