Patent ID: 8735957
Filing Date: 2014-05-27
Classification: H01L

Abstract:
1. An integrated circuit die comprising a substrate separating one of either a source or drain region from a semiconductor region, said integrated circuit comprising: a vertical transistor region including: said source or drain region; a gate electrode formed in a trench extending into said semiconductor region, the gate electrode being electrically insulated from the semiconductor region by a dielectric lining in said trench; and the other one of said source or drain region in said semiconducting region; an insulating trench terminating said vertical transistor region; and a vertical capacitor region adjacent to said vertical transistor region, a first capacitor plate of said vertical capacitor region comprising the source or drain region separated from the semiconductor region by the substrate, said vertical capacitor region further comprising at least one trench extending into the semiconductor region, said at least one trench comprising an electrically insulating liner material electrically insulating a conductive material defining a second capacitor plate separated from the first capacitor plate.