Patent ID: 9190514
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A semiconductor device, comprising: at least one first conductive layer stacked in a stacking direction on a substrate where a cell region and a contact region are defined; at least one first slit passing through the first conductive layer in the stacking direction; a plurality of second conductive layers stacked in the stacking direction on the first conductive layer; first and second channel layers each passing through the first and second conductive layers in the stacking direction; a second slit passing through the first and second conductive layers in the stacking direction, connected with one side of the first slit and located between the first and second channel layers; and a third slit passing through the first and second conductive layers in the stacking direction and connected with an other side of the first slit, wherein each of the second conductive layers is connected between the second and third slits and over the first slit.