Patent ID: 6399509
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method of patterning and insitu cleaning a metal line for a semiconductor device; comprising the steps ofa) providing a semiconductor structure and an overlying dielectric layer; providing over said dielectric layer, a first barrier layer, a metal layer, and a second barrier layer; b) providing a resist pattern over said second barrier layer; c) performing a four step etch process, in sequence in the same etch chamber, comprising: (1) in a first etch step (A); etching through said second barrier layer using a B and Cl containing gas and a Cl containing gas in a reactive ion etch to form a first polymer layer over the sidewall of said second barrier layer; (2) in a second etch step (B); etching said metal layer exposing said first barrier layer to form a second polymer over said first polymer and the sidewall of said metal layer; the second etch step performed using a B and Cl containing gas and a Cl containing gas; (3) in a third etch step (C); etching said first barrier layer to form a third polymer layer over said first and second polymer layers; the third etch step performed using a B and Cl containing gas and a Cl containing gas; (4) in a fourth etch step (D); removing said first, second and third polymers; the fourth etch step performed using only chlorine containing gas and a fluorocarbon containing gas.