Patent ID: 7217624
Filing Date: 2007-05-15
Classification: G11C,H01L

Abstract:
1. A method for fabricating a non-volatile memory device, comprising the steps of: forming a gate insulation layer over a substrate; forming a gate structure over the gate insulation layer; forming a pair of lightly doped drain regions in the substrate disposed beneath sidewalls of the gate structure; forming a pair of re-oxidation sidewall spacers on sidewalls of the gate structure; forming a pair of insulation sidewall spacers on the pair of re-oxidation sidewall spacers to insulate a pair of conductive sidewall spacers and the gate structure; forming the pair of conductive sidewall spacers on the pair of insulation sidewall spacers; and forming a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers and connected with the respective lightly doped drain regions.