Patent ID: 6545517
Filing Date: 2003-04-08
Classification: H03K

Abstract:
A frequency divider circuit, comprising:a clock input for receiving a clock input signal having a frequency; a main output providing a clock output signal having a frequency divided relative to the frequency of the clock input signal; an auxiliary output providing a clock output signal having a frequency divided relative to the frequency of the clock input signal; a first differential amplifier having an input coupled to said auxiliary output and having an output coupled to said main output; and a second differential amplifier having an input coupled to said main output and having an output coupled to said auxiliary output; said first differential amplifier and said second differential amplifier coupled with said clock input; a first emitter follower to be switched by the clock input signal and connected to said first differential amplifier; and a second emitter follower to be switched by the clock input signal and connected to said second differential amplifier.