Patent ID: 8407425
Filing Date: 2013-03-26
Classification: G06F,H04L

Abstract:
1. A computer-implemented method, comprising: executing, via a first thread, one or more instructions to register a handler module to be invoked in response to an access, via a second thread, to one or more specified memory locations; transferring control from the first thread to the handler module in response to data being evicted, via the access by the second thread, from one or more of the specified memory locations; recording, in a register, an address of a second instruction of the first thread that was executing at the time of control transfer to the handler module; incrementing an address-specific counter in response to each control transfer to the handler module such that the address-specific counter represents a number of times the handler module was invoked from the recorded address while the second instruction was executing; and executing a deadlock policy responsive to the address-specific counter exceeding a maximum acceptable value, the deadlock policy affecting the first thread in response to execution.