Patent ID: 7417266
Filing Date: 2008-08-26
Classification: H01L

Abstract:
1. A field effect transistor comprising: a semiconductor substrate having a top surface and a bottom surface, wherein the semiconductor substrate includes a drain region therein; a trench gate region extending into the semiconductor substrate for a first predetermined depth, wherein the trench gate region is insulated from the semiconductor substrate by a gate insulator region; a pair of source regions in the semiconductor substrate and disposed on opposite sides of the trench gate region; a pair of body regions extending into the semiconductor substrate for a second predetermined depth and disposed on opposite sides of the trench gate region, wherein each of the body regions separates a respective source region from the drain region and the second predetermined depth is less than the first predetermined depth; a source metal contact disposed on the top surface of the semiconductor substrate, wherein the source metal contact is in physical contact with the pair of source regions, the pair of body regions, and a portion of the drain region, wherein the source metal contact is insulated from the trench gate region by the gate insulator region; and a drain metal contact disposed on the bottom surface of the semiconductor substrate, wherein the drain metal contact is in physical contact with the drain region; wherein each of the body regions further includes a lightly-doped body region below a respective source region and a heavily-doped body region above the lightly-doped body region such that the heavily-doped body region is in physical contact with the source metal contact and the lightly-doped body region is not in physical contact with the source metal contact.