Patent ID: 6828585
Filing Date: 2004-12-07
Classification: H01L

Abstract:
A thin-film transistor comprisinga semiconductor layer and multiple gate electrodes that have been formed over the semiconductor layer, wherein the semiconductor layer includes: first and second heavily doped regions, which have a first conductivity type, are spaced apart from each other and serve as source/drain regions; a plurality of channel regions, which have a second conductivity type, are located between the first and second heavily doped regions so as to face the gate electrodes, and include first and second channel regions, wherein the first channel region is closer to the first heavily doped region than any other one of the channel regions is, while the second channel region is closer to the second heavily doped region than any other one of the channel regions is; an intermediate region, which has the first conductivity type and is located between two mutually adjacent ones of the channel regions; a first lightly doped region, which has the first conductivity type and is located between the first channel region and the first heavily doped region; a second lightly doped region, which has the first conductivity type and is located between the second channel region and the second heavily doped region; a third lightly doped region, which has the first conductivity type, has a carrier concentration different from that of the first lightly doped region and is located between the first lightly doped region and the first channel region; and a fourth lightly doped region, which has the first conductivity type, has a carrier concentration different from that of the second lightly doped region and is located between the second lightly doped region and the second channel region.