Patent ID: 8427867
Filing Date: 2013-04-23
Classification: G06F,G11C

Abstract:
1. A device operative in conjunction with a data source supplying a stream of logical pages including data and a flash memory system including a multiplicity of flash memory cells, wherein said multiplicity of flash memory cells comprise several subsets of flash memory cells each subset of flash memory cells having a characteristic range of bit error rates which differs from a characteristic range of bit error rates of at least one other subset of flash memory cells, different subsets of flash memory cells comprise different flash memory cells, the device comprising: an encoder for encoding logical pages of the stream of logical pages to provide encoded pages; a bit error rate (BER) distributing apparatus operative to break down each encoded page into multiple pagelets, to group together pagelets of different encoded pages and to distribute data from at least one encoded page of said encoded pages between at least two of said subsets of flash memory cells.