Patent ID: 6486494
Filing Date: 2002-11-26
Classification: G02F,H01L

Abstract:
A thin film transistor substrate for a display, comprising:a transparent insulating substrate; a gate pattern including a gate line, a gate electrode, and a gate pad formed over the transparent substrate and made of a conductive layer having a dual-layered structure and a taper angle at its edges of 20-70Â°; a gate insulating layer covering the gate pattern; an amorphous silicon layer on the gate insulating layer; a data pattern including a data line, a data pad, and a source and a drain electrode formed over the amorphous silicon layer; a passivation layer covering the data pattern and having first to third contact holes exposing the drain electrode, a data pad and a gate pad, respectively; a pixel electrode connected to the drain electrode through the first contact hole; a data redundant layer connected to the data pad through the second contact hole; and a gate redundant layer connected to the gate pad through the third contact hole.