Patent ID: 9158545
Filing Date: 2015-10-13
Classification: G06F

Abstract:
1. A bytecode branch processor, the bytecode branch processor comprising: an interpreter configured to process a program in a bytecode format in a virtual machine; a branch information generator configured to obtain, while a predefined number of bytecodes are read prior to a current bytecode being processed by the interpreter, a branch address and a target address of a predicted path of a branch corresponding to a preceding bytecode preceding the current bytecode by using a table that comprises a preceding opcode, a length of the preceding bytecode, and the branch address, which are mapped according to the order of bytecode processing, the branch address being of a branch code included in a preceding handler that processes the preceding bytecode, and the target address being of a current handler that processes the current bytecode to which the preceding handler branches; and a branch target buffer (BTB) updater configured to update a branch target buffer (BTB) in the bytecode branch processor with the obtained branch address and target address, wherein the interpreter is further configured to process a branch prediction and to remove a branch misprediction by checking whether the obtained branch address and target address in the BTB is validated in the branch prediction of the current bytecode.