Patent ID: 6693919
Filing Date: 2004-02-17
Classification: H04L,H04Q

Abstract:
A method of achieving frame synchronization for received frame data with a predetermined frame synchronization pattern inserted in the beginning of each of transmission frames containing ATM cells in a frame synchronization circuit, comprising the steps of:detecting the frame synchronization pattern from the received frame data; generating a first pulse signal of one clock pulse in timed relationship to the detection of the frame synchronization pattern from the received frame data; detecting a transition from a hunting state to one of pre-synchronization state, a synchronization state, and a pre-hunting state for frame synchronization of the frame synchronization circuit; generating a second pulse signal in a period corresponding to a frame period of the received frame data in timed relationship to the detection of said transition; managing the number of times that the frame synchronization pattern is detected and the number of times that the frame synchronization pattern is not detected, based on the first pulse signal and the second pulse signal; making a transition from the hunting state to the synchronization state if the frame synchronization pattern is detected consecutively for a backward protection stage count which is voluntarily set up as a protection condition to be met in order to change from the hunting state to the synchronization state; and making a transition from the synchronization state to the hunting state if the frame synchronization pattern is not detected consecutively for a forward protection stage count which is voluntarily set up as a protection condition to be met in order to change from the synchronization state to the hunting state.