Patent ID: 7989312
Filing Date: 2011-08-02
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor structure, comprising: fabricating one or more first devices in a silicon-on-insulator first wafer, said first wafer comprising a first buried oxide layer between a first upper silicon layer and a first lower silicon layer and a first lowermost dielectric layer on said first upper silicon layer; fabricating one or more second devices in a silicon-on-insulator second wafer, said second wafer comprising a second buried oxide layer between a second upper silicon layer and a second lower silicon layer and a second lowermost dielectric layer on said second upper silicon layer; removing said first lower silicon layer from said first wafer to expose a surface of said first buried oxide layer and removing said second lower silicon layer from said second wafer to expose a surface of said second buried oxide layer; forming an inter-wafer dielectric layer on top of said first buried oxide layer, forming an electrically conductive landing pad in said inter-wafer dielectric layer, said landing pad extending from a top surface of said inter-wafer dielectric layer, through said first buried oxide layer to those portions of said first devices formed in said first upper silicon layer; forming a silicon oxide bonding layer on top of said inter-wafer dielectric layer; bonding a top surface of said silicon oxide bonding layer to said surface of said second buried oxide layer; forming electrically conductive first contacts to said second devices, said first contacts extending from said top surface of said second lowermost dielectric layer through said second lowermost dielectric layer to said first devices; forming electrically conductive second contacts to said landing pads, said second contacts extending from said top surface of said second lowermost dielectric layer through said second lowermost dielectric layer, through said second buried oxide layer to said landing pads; and forming one or more second wiring levels over said second lowermost dielectric layer, each wiring level of said second wiring levels comprising electrically conductive wires in a corresponding dielectric layer, one or more wires of a lowermost wiring level of said second wiring levels in physical and electrical contact with said first and second contacts.