Patent ID: 7228116
Filing Date: 2007-06-05
Classification: H04L

Abstract:
1. A combined transmitter for transmitting video signals, comprising: a first transmission unit, comprising a set of first input terminals to receive first data and a plurality of first drivers each capable of sending a first differential signal to a first external input unit through a pair of signal lines, wherein the pair of signal lines of each first drivers coupled to a set of common output line, wherein the first external input unit comprises a first resistor coupled between the first signal lines; a second transmission unit comprising a set of second input terminals to receive second data and a plurality of second drivers each capable of sending a second differential signal to a second external input unit through a pair of signal lines, wherein the pair of signal lines of each second drivers coupled to the set of common output line, wherein the second external input unit comprises two resistors, each coupled between a power rail in the second external input unit and one of the first signal lines; a phase locked loop (PLL) generating a first set of output clock signals to the first transmission unit in a first mode and generating a second set of output clock signals to the second transmission unit in a second mode according to a mode selection signal, wherein the first transmission unit is capable of transmitting the first data to the first external input units in the first mode and the second transmission unit is capable of transmitting the second data to the second external input units in the second mode, according to the mode selection signal and the first and second sets of output clock signals, and a clock buffer generating first, second and third clock signals to the first and second transmission units and the PLL selectively according to an input clock and the mode selection signal, wherein the PLL outputs the first set of output clock signals to the first transmission unit in the first mode and outputs the second set of output clock signals to the second transmission unit in the second mode, according to the mode selection signal and the third clock signal; and a switching controller coupled to the first and second transmission units, the PLL, and the clock buffer, for disabling the first transmission unit in the second mode, disabling the second transmission unit in the first mode, and disabling the first, second transmission units, the PLL and the clock buffer in the power down mode, according to a power selection signal and the mode selection signal.