Patent ID: 6172527
Filing Date: 2001-01-09
Classification: H03K

Abstract:
An output circuit for outputting an output signal that is set to either first voltage level, or second voltage level or high impedance state in response to voltage levels of first and second data signals, said output circuit comprising:a first gate circuit that is connected with a first node to which a first signal having a voltage level which is set at least by one voltage level of either first or second data signal is transmitted, and that shapes a waveform of the first signal;a second gate circuit that is connected with a second node to which a second signal having a voltage level which is set at least by one voltage level of either first or second data signal is transmitted, and that shapes a waveform of the second signal;a first transistor for electrically connecting a first power voltage supply terminal and an output terminal thereof in response to a voltage level of an output signal of the first gate circuit;a second transistor for electrically connecting a second power voltage supply terminal and an output terminal thereof in response to a voltage level of the output signal of the second gate circuit;a first control circuit for applying a voltage, that renders the first transistor nonconductive in response to a voltage level of the second node, to a gate electrode of the first transistor; anda second control circuit for applying a voltage, that renders the second transistor nonconductive in response to a voltage level of the first node, to a gate electrode of the second transistor;wherein the first gate circuit is selectively set to a state capable of outputting the first signal that has been shaped in waveform, or to a high impedance state in response to the voltage level of the second node, and wherein the second gate circuit is selectively set to a state capable of outputting the second signal that has been shaped in waveform, or to a high impedance state in response to the voltage level of the first node.