Patent ID: 8831167
Filing Date: 2014-09-09
Classification: G11C,H03K

Abstract:
1. A shift register comprising: a pull up unit for providing a first pull up signal according to a first clock signal, a second clock signal, and a starting pulse; a third transistor having a control end for receiving the first clock signal, a first end coupled to the pull up unit, and a second end for receiving a low voltage; a fifth transistor having a first end for receiving the first clock signal, and a second end for providing a gate signal; a sixth transistor having a control end for receiving the second clock signal, a first end coupled to the second end of the fifth transistor, and a second end coupled to the second end of the third transistor; and a seventh transistor having a control end for receiving a second pull up signal, a first end coupled to a control end of the fifth transistor, and a second end coupled to the second end of the third transistor, and a fourth transistor having a control end coupled to the pull up unit, a first end coupled to the control end of the fourth transistor, and a second end coupled to the control end of the fifth transistor for providing a driving signal.