Patent ID: 6696884
Filing Date: 2004-02-24
Classification: G05F

Abstract:
A switched-capacitor reference voltage circuit, comprising:an offset generator circuit that is configured to receive an input reference voltage from an input node, wherein the offset generator circuit is configured to provide a first reference voltage at a first reference node and a second reference voltage at a second reference node; a first switching circuit that is coupled between a first node and a second node, and includes a first control terminal that is configured to receive a first control signal; a second switching circuit that is coupled between the second node and a third node, and includes a second control terminal that is configured to receive a second control signal; a third switching circuit that is coupled between the input node and the second node, and includes a third control terminal that is configured to receive a third control signal; a fourth switching circuit that is coupled between the first reference node and the first node, and includes a fourth control terminal that is configured to receive a fourth control signal; a fifth switching circuit that is coupled between the second reference node and the first node, and includes a fifth control terminal that is configured to receive a fifth control signal; a first capacitor circuit that is coupled to the second node; a second capacitor circuit that is coupled to the third node; and a buffer circuit that is configured to receive a sampled signal from the third node, and arranged to provide a buffered reference signal in response to the sampled signal, whereby the sampled signal corresponds to a filtered version of the input reference voltage.