Patent ID: 7807503
Filing Date: 2010-10-05
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device package comprising: fabricating a wafer having at least one semiconductor die site, the at least one semiconductor die site having a plurality of bond pads including at least a first set of bond pads and a second set of bond pads; fabricating at least one singulated semiconductor die having a first plurality of bond pads disposed on a first surface thereof, each of the first plurality of bond pads including an under-bump metallization layer, and a second plurality of bond pads disposed on a second, opposing surface thereof, each of the second plurality of bond pads including an under-bump metallization layer; and placing a first plurality of conductive bumps between the first set of bond pads of the at least one semiconductor die site and at least some of the first plurality of bond pads of the at least one singulated semiconductor die.