Patent ID: 8396435
Filing Date: 2013-03-12
Classification: G06G,H03F,H03G

Abstract:
1. An adder, comprising: a plurality of input terminals; an output terminal; a plurality of first impedance circuits connected in parallel, each including one end connected to corresponding one of the plurality of input terminals and the other end connected to a common output; a second impedance circuit including one end configured to connect to a power supply; a transistor circuit including a drain terminal connected to the other end of the second impedance circuit; and a third impedance circuit including one end connected to a source terminal of the transistor circuit and the other end connected to a first circuit through which a substantially constant current flows, wherein the plurality of first impedance circuits have a common output point which is directly or indirectly connected to a first connection point on a line between the source terminal of the transistor circuit and the one end of the third impedance circuit, wherein the output terminal is directly or indirectly connected to a second connection point on a line between the other end of the second impedance circuit and the drain terminal of the transistor circuit, wherein impedances seen from the common output point of the plurality of first impedance circuits toward the respective plurality of input terminals are set so that high frequency currents flowing from the common output point of the plurality of first impedance circuits toward the respective plurality of input terminals are approximately zero, wherein an impedance seen from the first connection point toward the plurality of input terminals is set so that a high frequency current flowing from the first connection point toward the plurality of input terminals is approximately zero, wherein an impedance seen from the first connection point toward the first circuit flows is set so that a high frequency current flowing from the first connection point toward the first circuit is approximately zero, and wherein an impedance seen from the second connection point toward the power supply is set so that a high frequency current flowing from the second connection point toward the power supply is approximately zero.