Patent ID: 7237213
Filing Date: 2007-06-26
Classification: G06F

Abstract:
1. A method for timing analysis of a circuit, the circuit comprising a first circuit element and a second circuit element interconnected with the first circuit element, each of the first circuit element and the second circuit element operated with a particular respective clock mode as a function of a state of a change-over signal, the timing analysis carried out using a description of the circuit, the description of the circuit containing information as to whether the change-over signal is a quasi-static signal which does not change during operation of the circuit, a description for the first and second circuit elements each comprises information as to the state of a change-over signal with which the respective circuit element is operated in which clock mode, the method comprising: performing, in the course of timing analysis of a timing path which comprising the first circuit and second circuit elements, a check as to whether the change-over signal is a quasi-static signal; and, if the change-over signal is a quasi-static signal, disregarding combinations of respective particular clock modes of the first and second circuit elements that require different predetermined states of the change-over signal in the timing analysis.