Patent ID: 8514874
Filing Date: 2013-08-20
Classification: G06F,H04L

Abstract:
1. A packet classifier for a network processor having a plurality of processing modules, wherein the network processor generates one or more tasks corresponding to each of a plurality of received packets, the packet processor comprising: a scheduler configured to (i) generate a thread of one or more contexts for each task received by the packet classifier, wherein the thread corresponds to an order of instructions applied to the corresponding packet, and (ii) send the contexts to a multi-thread instruction engine configured to process the one or more threads received from the scheduler, wherein the contexts are temporarily stored in one or more output queues of the scheduler; wherein each thread includes an identifier of a corresponding one of the one or more output queues; an arbiter configured to select one of the one or more output queues in order to provide output packets to the multi-thread instruction engine, one or more of the output packets associated with a corresponding thread of contexts; wherein each output queue transmits output packets corresponding to a given thread contiguously in the order in which the threads started, wherein the scheduler comprises: