Patent ID: 7549009
Filing Date: 2009-06-16
Classification: G06F

Abstract:
1. A high-speed PCI interface system with reset function, comprising: a host controller chipset, comprising at least one root port, used to generate a PCI resetting signal; at least one high-speed PCI device, each of said at least one high-speed PCI device respectively coupled to a corresponding one of said at least one root port within said host controller chipset through a high-speed PCI bus; and at least one reset signal generator, corresponding with one of said at least one root port, each of said at least one reset signal generator being respectively electrically coupled to said host controller chipset through a PCI reset signal line and a trigger signal line, and being electrically coupled to a corresponding one of said at least one high-speed PCI device through a basic reset signal line; wherein, each of said at least one reset signal generator respectively receiving said PCI resetting signal and a triggering signal through said PCI reset signal line and said trigger signal line, generating a basic resetting signal, sending said basic resetting signal to said corresponding one of said at least one high-speed PCI device through said basic reset signal line, and then commanding said corresponding one of said at least one high-speed PCI device to execute a basic resetting action.