Patent ID: 7898344
Filing Date: 2011-03-01
Classification: G01S,H03L

Abstract:
1. A phase-locked oscillator, comprising a PLL loop having a phase detector which compares the phases of a reference signal and a comparison signal, a low-pass filter which integrates a phase error signal of the phase detector, a controller which is interposed in a stage after the low-pass filter and which executes main control of the oscillator, a VCO circuit which generates a signal at a frequency according to a control voltage output from the controller, and a variable frequency divider which frequency-divides the output signal of the VCO circuit and forms the comparison signal, wherein the controller comprises: control voltage measurement means for locking the PLL loop at a plurality of frequencies and for measuring the control voltage for each locking; and linearity calibration means for determining a VCO gain factor representing a frequency change between intervals connecting each of the frequencies, based on each of the measured control voltages; VCO driving means for generating and outputting a voltage signal, after locking the PLL loop on a prescribed frequency, and with the PLL loop in the open state, to cause a linearity-corrected periodic frequency change centered on the prescribed frequency in the VCO circuit, based on the determined VCO gain factor; wherein the VCO driving means samples the output of the low-pass filter in synchronization with the timing of output of the center frequency by the VCO circuit, and when a detected phase error signal exceeds a prescribed range, offsets the control voltage in the direction to reduce the phase error signal.