Patent ID: 7920295
Filing Date: 2011-04-05
Classification: G06T,H04N

Abstract:
1. An image processing circuit comprising: a plurality of counters that extract image blocks each of which includes a predetermined number of pixels from input image data, count a number of pixels having a predetermined value for each of the image blocks, calculate a pixel value for each of the extracted image blocks, and output a plurality of bit streams each of which represents the counted number for a respective image block, the number of the plurality of counters being larger than a bit length defined for a single writing process with memory divided by the bit length of a value calculated for an image block; a converter that converts the bit streams output from the plurality of counters, by adjusting a bit length of the bit streams for writing in the memory, and outputs the converted bit streams; a synthesizer that synthesizes the plurality of bit streams output from the converter to generate a bit stream having the bit length defined for a single writing process with the memory, and outputs the generated bit stream; a selector that selects a first or second operation mode, in which a number of pixels included in an image block extracted in the first operation mode is larger than a number of pixels included in an image block extracted in the second mode, wherein: