Patent ID: 6625205
Filing Date: 2003-09-23
Classification: H04B

Abstract:
A matched filter circuit comprising:an analog to digital (A/D) converter that receives an input voltage and outputs a digital voltage; a first set of a plurality of registers that successively hold said digital voltage in response to a first sampling clock; a second set of a plurality of registers that successively hold said digital voltage in response to a second sampling clock; a set of selectors that selectively outputs one of a first data output from said first set of registers and a second data output from said second set of registers; a circulative shift register having stages corresponding to said set of selectors, each of said stages holding one bit data of PN code sequence corresponding to one of said set of selectors; a plurality of exclusive-or circuits each of which calculates exclusive-or of each bit of output from said set of selectors and said one bit held in said stage; and an analog adder which calculates sum of outputs of said exclusive-or circuits up.