Patent ID: 6446174
Filing Date: 2002-09-03
Classification: G06F

Abstract:
A memory system comprising:a memory controller hub (MCH) to control access to dynamic random-access memory (DRAM) devices, the MCH having a first channel for communicating with the DRAM devices according to a first protocol; a memory repeater hub (MRH) of a first type having an input connected to the first channel of the MCH and providing second and third channels as outputs, the second and third channels operating in accordance with the first protocol; a first pair of MRHs of a second type, each having an input connected to the second channel and each providing a pair of DRAM channels that operate in accordance with a second protocol; a second pair of MRHs of the second type, each having an input connected to the third channel and each providing a pair of DRAM channels that operate in accordance with the second protocol.