Patent ID: 8441282
Filing Date: 2013-05-14
Classification: H03K

Abstract:
1. An impedance calibration circuit comprising: a pull-up code calibrating unit configured to compare a pad voltage of a pad, to which an external resistor is connected, with a reference voltage during a first period to generate a pull-up code for calibrating the resistance of a first pull-up unit that pulls up the pad voltage, and compare a first voltage with the reference voltage during a second period from the end time point of the first period to generate the pull-up code; and a pull-down code calibrating unit comprising a second pull-up unit configured to calibrate the resistance in response to the pull-up code to pull up the first voltage and a pull-down unit configured to pull down the first voltage, wherein the pull-down code calibrating unit compares the first voltage with the reference voltage during the first period to generate a pull-down code for calibrating the resistance of the pull-down unit, wherein the first voltage is driven by the second pull-up unit and the pull-down unit.