Patent ID: 7944514
Filing Date: 2011-05-17
Classification: G02F,H01L

Abstract:
1. A display device comprising a display panel having a plurality of scan signal lines, a plurality of video signal lines which sterically intersect the plurality of scan signal lines, a plurality of TFTs placed in a matrix structure, and a plurality of pixel electrodes, wherein the TFT has a scan signal line, a semiconductor layer disposed on a region overlapping with the scan signal line when viewing in plan view from the top through an insulation layer, a drain electrode branched from a video signal line to be connected to a drain region of the semiconductor layer, and a source electrode to be connected to a source region of the semiconductor layer and to a pixel electrode; wherein when the width of the scan signal line in the region to place one TFT of the plurality of TFTs is different from the width of the scan signal line in the region to place another TFT of the plurality of TFTs which is different from the one TFT, the channel width and the channel length in the one TFT is almost equal to the channel width and the channel length in the another TFT; and the surface area of the region of the source electrode of the one TFT overlapping with the scan signal line when viewing in plan view from the top is almost equal to the surface area of the overlap region of the source electrode of the another TFT overlapping with the scan signal line when viewing in plan view from the top.