Patent ID: 7973541
Filing Date: 2011-07-05
Classification: G01R

Abstract:
1. An apparatus comprising: a first interconnect; a first set of pads coupled to the first interconnect and used for simultaneously applying a first current through the first interconnect and measuring a first voltage across the first interconnect, the first current and the first voltage being used to estimate resistance of the first interconnect; a first set of isolation circuits located between the first set of pads and the first interconnect; a test circuit configured to charge and discharge the first interconnect to estimate capacitance of the first interconnect, wherein the first set of isolation circuits electrically isolate the first set of pads from the first interconnect when the test circuit charges and discharges the first interconnect to estimate the capacitance of the first interconnect; a second interconnect, wherein the test circuit is configured to charge and discharge the first and second interconnects to estimate capacitance mismatch between the first and second interconnects; and a mismatch compensation control circuit to compensate for clock skew based on the capacitance mismatch.