Patent ID: 6180492
Filing Date: 2001-01-30
Classification: H01L

Abstract:
A method for forming a shallow trench isolation structure on a semiconductor substrate, comprising the steps of:providing a pad oxide layer and a mask layer on the semiconductor substrate;forming a trench in the pad oxide layer, the mask layer, and the semiconductor substrate;forming a liner oxide layer by a wet oxidation on a surface of the trench in the semiconductor substrate and extensively on a sidewall of the mask layer exposed therein and a top surface of the mask layer, wherein the wet oxidation is performed with presence of hydrogen;depositing a dielectric material layer on the liner oxide layer and filling the trench therewith;planarizing the dielectric material layer to expose the mask layer and removing the mask layer and the pad oxide layer to form the isolation structure, wherein the liner oxide layer extends to a top surface of the dielectric material layer; andremoving the pad oxide layer and the mask layer to expose the substrate, wherein the liner oxide layer remains to protect the dielectric material layer filled in the trench.