Patent ID: 7797654
Filing Date: 2010-09-14
Classification: G06F

Abstract:
1. A computer comprising a processor and a memory coupled to the processor, the memory being encoded with instructions to analyze a design of an integrated circuit device comprising a plurality of power wires, wherein the instructions: automatically identify a plurality of intersection points at which the power wires in the design intersect with at least another power wire in the design; automatically estimate a current in a rectangle around each intersection point in the plurality of intersection points; automatically segment a group of power wires of a given layer in the design, at least at intersections thereof with the plurality of intersection points; based on the current estimated for each rectangle around each intersection point, automatically prepare a plurality of estimates of voltage drop, of a corresponding plurality of wire segments modeled as resistors, each wire segment being identified by the instructions to automatically segment; and automatically output said plurality of estimates of voltage drop.