Patent ID: 7187070
Filing Date: 2007-03-06
Classification: H01L

Abstract:
1. A stacked package module, comprising: a first chip, the first chip having a first active surface, a first back surface opposing to the first active surface and a side surface connecting the first active surface and the first back surface; a circuits layer formed directly on the first back surface and extended along the side surface and the first active surface so as to electrically connect to the first back surface and the first active surface; a plurality of stud bumps made of a first material, the stud bumps formed on the first back surface and electrically connected to the circuits layer, wherein the stud bumps have a bump body and a trail protruded from the bump body; and a second chip, the second chip having a second active surface connected to the stud bumps, wherein the second chip has a plurality of second bumps made of a second material different than the first material formed on the second active surface and electrically connected to the circuits layer through the stud bumps by completely encapsulating the stud bumps with the second bumps.