Patent ID: 8470658
Filing Date: 2013-06-25
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor integrated circuit device, the method comprising: preparing a first conductivity type substrate including a first conductivity type impurity such that the first conductivity type substrate includes a high-voltage device region and a low-voltage device region, and such that the first conductivity type substrate has a first impurity concentration; forming a buried impurity layer using blank implant such that the buried impurity layer includes a first conductivity type impurity and has a second impurity concentration higher than the first impurity concentration forming an epitaxial layer on the substrate having the buried impurity layer thereon; forming a device isolation region in or on the epitaxial layer; and forming high-voltage semiconductor devices and a low-voltage semiconductor device in the high-voltage device region and the low-voltage device region, respectively, such that each of the high-voltage semiconductor devices includes a gate electrode, wherein the buried impurity layer is formed on the substrate by implanting the first conductivity type impurity at a dose of about 10 14 atoms/cm 2 to about 10 16 atoms/cm 2 .