Patent ID: 8778749
Filing Date: 2014-07-15
Classification: H01L

Abstract:
1. A method performed as part of fabricating non-volatile storage, comprising: forming a plurality of layer stack columns overlying a plurality of active areas of a substrate, each active area having two vertical sidewalls and being separated from an adjacent active area by a plurality of isolation regions in the substrate; partially filling the isolation regions with a first insulating material; forming a sacrificial material over the first insulating material in each isolation region, the sacrificial material extending above a level of a surface of the substrate; forming a dielectric liner vertically along the vertical sidewalls of each layer stack column; removing the sacrificial material after forming the dielectric liner to define a plurality of bit line air gaps extending vertically from an upper surface of the first insulating material to at least the level of the surface of the substrate; forming an intermediate dielectric layer after removing the sacrificial material; and forming a control gate layer after forming the intermediate dielectric layer.