Patent ID: 7315598
Filing Date: 2008-01-01
Classification: H03L,H04L

Abstract:
1. A data recovery apparatus for a digital data stream of input data, comprising: phase shifting means, said phase shifting means receiving at least two control signals and outputting at least three sampling clocks in a bit time, where the phase of said at least three sampling clocks are adjustable; data sampling means, said data sampling means receiving said at least three sampling clocks and sampling the input data using said at least three sampling clocks as triggers, and for providing at least three sampled data signals, where one of said at least three sampled data signals is used to output recovered data; compare logic means, said compare logic means receiving said at least three sampled data signals and comparing said at least three sampled data signals to said recovered data and providing at least a first pseudo-bit error value and a second pseudo-bit error value; and phase controlling means, said phase controlling means receiving said at least said first pseudo-bit error value and said second pseudo-bit error value and estimating the phase relationship between the input data and said at least three sampling clocks using at least said first pseudo-bit error value and said second pseudo-bit error value, and for providing said at least two control signals to said phase shifting means according to said estimation results.