Patent ID: 8406362
Filing Date: 2013-03-26
Classification: H04L

Abstract:
1. A communication device that receives a reception signal including a synchronous word and a payload in each frame and samples the reception signal by using one sampling clock selected from N-phase clocks (N is an integer equal to or greater than two), comprising: a bit boundary detection unit that detects a bit boundary signal from the received reception signal, the bit boundary signal indicating between which clocks a variation point of the reception signal is located among the N-phase clocks; a clock update timing control unit that controls timings at which the sampling clock is updated; a first bit boundary signal storage unit that stores the bit boundary signal at each of the timings; a second bit boundary signal storage unit that takes in and stores a signal stored in the first bit boundary signal storage unit when a variation point of the reception signal is detected in the bit boundary detection unit, and does not update a signal stored therein when no variation point of the reception signal is detected; and a first clock selection unit that selects the sampling clock based on a signal stored in the first bit boundary signal storage unit when a variation point of the reception signal is detected in the bit boundary detection unit, and selects the sampling clock based on a signal stored in the second bit boundary signal storage unit when no variation point of the reception signal is detected.