Patent ID: 6212671
Filing Date: 2001-04-03
Classification: H01L

Abstract:
A mask pattern data producing apparatus comprising:means for specifying a first IC forming region and a second IC forming region on a surface of a semiconductor substrate of a first conduction type;MOS transistors of a second conduction type formed in first well regions of the first IC forming region for charging at a first substrate potential, said first well regions being of a first conduction type;MOS transistors of the second conduction type formed in second well regions of the second IC forming region for charging at a second substrate potential that is different from the first substrate potential, said second well regions being of the first conduction type;means for producing a first mask pattern for forming a bottom well of the second type of conduction under the first well regions in the entire first IC forming region of the semiconductor substrate; andmeans for producing a second mask pattern for forming a well wall of the second type of conduction surrounding a first IC formed in the first IC forming region and extending from the surface of the semiconductor substrate to the bottom well on the basis of information about the first IC forming region specified by the means for specifying and information about the bottom well corresponding to the mask pattern producing by the means for producing a first mask pattern.