Patent ID: 9106248
Filing Date: 2015-08-11
Classification: H03M

Abstract:
1. An analog to digital converter, comprising: comparing modules at multi levels, wherein a comparing module at each level comprises a comparator and a metastable state determining unit, wherein the comparator is configured to, when a previous-level comparing module is not in a metastable state, receive a first clock, a first input signal, and a second input signal, and compare the first input signal with the second input signal, wherein the metastable state determining unit is configured to, when the previous-level comparing module is not in the metastable state, receive the first clock, generate a reference clock according to the first clock, and when a second clock output by the comparator is later than the reference clock, determine that the comparator is in the metastable state, thereby determining that a current-level comparing module is in the metastable state, wherein the metastable state determining unit is further configured to, when the previous-level comparing module is in the metastable state, determine that the current-level comparing module is in the metastable state, wherein the second clock is a clock obtained by delaying the first clock, and delay time from the first clock to the second clock is proportional to time of comparing, by the comparator, the first input signal with the second input signal, wherein the comparator is further configured to output a first electrical level when the previous-level comparing module is not in the metastable state and the current-level comparing module is in the metastable state, output a second electrical level when the previous-level comparing module is in the metastable state and the current-level comparing module is in the metastable state, and output a comparison result of the first input signal and the second input signal when the previous-level comparing module is not in the metastable state and the current-level comparing module is not in the metastable state, and wherein the first electrical level and the second electrical level are mutually reverse electrical levels.