Patent ID: 7588883
Filing Date: 2009-09-15
Classification: H01L

Abstract:
1. A method of forming a gate, comprising: providing a substrate, the substrate comprising a dielectric layer and a conductive layer, the dielectric layer being disposed on top of the substrate, the conductive layer being disposed on top of the dielectric layer; forming a patterned hard mask on the conductive layer, the patterned hard mask comprising a silicon nitride layer, which comprises 30 to 80 atomic percent silicon, 20 to 70 atomic percent nitrogen, 0 to 10 atomic percent oxygen, and a hydrogen concentration of more than 10 etching the conductive layer and the dielectric layer by utilizing the patterned hard mask as a mask; and removing the patterned hard mask by utilizing an etching solution, wherein the etching solution comprises at least phosphoric acid.