Patent ID: 8652960
Filing Date: 2014-02-18
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure, the method comprising: forming one or more intermediate metal layers above a substrate; forming a top metal layer above the one or more intermediate metal layers, wherein the one or more intermediate metal layers and the top metal layer are separated from each other with insulating layers, wherein each of the insulating layers is formed above a respective one of the one or more intermediate metal layers; forming a bond pad in a portion of the top metal layer; forming a passivation layer over the top metal layer; patterning the passivation layer to expose a surface of the bond pad; forming one or more conductor lines underlying the bond pad from portions of at least one of the one or more intermediate metal layers; wherein one of the insulating layers between the bond pad and a closest underlying conductor line is formed to have a thickness that resists formation of cracks in the one of the insulating layers due to vertical and horizontal stresses on the semiconductor structure.