Patent ID: 6080664
Filing Date: 2000-06-27
Classification: H01L

Abstract:
A method for forming a stacked contact hole, in a group of insulator layers, to expose a region of a semiconductor substrate, comprising the steps of:providing a composite insulator layer on said semiconductor substrate;depositing a BPSG layer on said composite insulator layer;reflowing said BPSG layer;applying a first photoresist shape, comprised with a first diameter opening; on said BPSG layercreating a lower contact hole opening, in said BPSG layer, and in said composite insulator layer, exposing said region, of said semiconductor substrate, with said lower contact hole opening having said first diameter opening;wet etching of said lower contact hole opening, forming an enlarged lower contact hole opening, and enlarging said first diameter opening to form a second diameter opening;forming a first metal plug in said enlarged lower contact hole opening;depositing a silicon oxide insulator layer, on said metal plug, in said enlarged lower contact hole opening, and on top surface of said BPSG layer;applying a second photoresist shape, comprised with said first diameter opening, with said first diameter opening, of said second photoresist shape, directly overlying said metal plug, in said enlarged lower contact hole;forming an upper contact hole opening, in said silicon oxide insulator layer, exposing said metal plug, in said enlarged lower contact hole opening, resulting in said stacked contact hole, comprised of said upper contact hole opening, featuring said first diameter opening, overlying said enlarged lower contact hole, featuring said second diameter opening;forming a second metal plug in said upper contact hole opening, overlying, and contacting, said first metal plug, in said enlarged lower contact hole opening; andforming a metal interconnect structure, overlying and contacting, said second metal plug.