Patent ID: 6202198
Filing Date: 2001-03-13
Classification: G06F

Abstract:
An integrated circuit for receiving and treating an analog signal exhibiting given signal attributes and for communicating with an external control component, comprising:a conditioning stage connectable to receive said analog signal to provide a conditioned analog signal;an oversampling coder stage responsive to an oversampling control and to said conditioned analog signal to provide a corresponding coded serial bit stream output;a decimating filter stage responsive to a decimating filter control and to said coded serial bit stream output to provide an output with a bit-defined information vector having a data aspect corresponding with said given signal attributes;an interface port having a coupling portion connectable for communication with said external control component and an internal portion;programming and data memory including a distributed memory matching array responsive to a conveyed instruction set having bit-defined codewords corresponding with a selected one of said signal attributes, responsive to a match control input to identify a correspondence between said information vector and at least one of said codewords to provide a digital result;an output network responsive to said digital result to derive an output signal; anda central control unit coupled in data exchange relationship with said interface port internal portion and said programming and data memory and responsive to derive said oversampling control, said decimating filter control, said match control input, and to effect conveyance of said instruction set to said distributed memory matching array.