Patent ID: 9142426
Filing Date: 2015-09-22
Classification: H01L,Y10T

Abstract:
1. A package structure, comprising: a lead frame having a plurality of pins; a recess in the lead frame; a first conductive element having at least one first I/O terminal on a top surface of the first conductive element, wherein the first conductive element is disposed in the recess, wherein the top surface of the conductive element and the top surface of the lead frame are substantially at the same horizontal level; an insulating layer disposed on the lead frame and the top surface of the first conductive element, wherein at least one via is disposed in the insulating layer; and at least one conductive pattern layer disposed over the insulating layer, wherein the at least one conductive pattern layer comprises a plurality of electrical connections to connect with the plurality of pins and with said at least one first I/O terminal of the first conductive element through the at least one via.