Patent ID: 6352901
Filing Date: 2002-03-05
Classification: H01L

Abstract:
A method of fabricating a bipolar junction transistor, (BJT), on a semiconductor substrate, comprising the steps of:forming a first conductive region, in said semiconductor substrate, comprised of a first conductivity type, with said first conductive region used as a buried subcollector for said BJT; growing a second conductive region, on said first conductive region, comprised with said first conductivity type, and used as a collector region for said BJT, and with said second conductive region having a lower dopant concentration than said first conductive region; growing a thin insulator layer on the top surface of said second conductive region; forming a third conductive region, in said second conductive region, comprised with a second conductivity type, used as a base region, for said BJT, and leaving a bottom portion of said second conductive region still remaining between overlying said third conductive region, and underlying, said first conductive region; depositing an undoped, thin polysilicon layer; forming a photoresist shape, with an opening in said photoresist shape, exposing a portion of the top surface of said undoped, thin polysilicon layer; performing multiple ion implantation procedures through said opening, in said photoresist shape, into said bottom portion of said second conductive region, located between overlying, said third conductive region, and underlying said first conductive region, forming a fourth conductive region, used as self-aligned collector, (SIC), regions, with said fourth conductive region completely filling said bottom portion of said second conductive region, and comprised of said first conductivity type, and with said fourth conductive region having a dopant concentration greater than the dopant concentration of said second conductive region, but less than the dopant concentration of said first conductive region; removing the portion of said undoped, thin polysilicon layer, exposed in said opening, in said photoresist shape; removing the portion of said thin insulator layer, exposed in opening in said undoped, thin polysilicon layer, creating an insulator opening, which exposes a portion of the top surface of said third conductive region; depositing a polysilicon layer, comprised with a dopant of said first conductivity type; patterning of said polysilicon layer, and of said undoped, thin polysilicon layer, to form a polysilicon structure, completely filling said insulator opening, and with said polysilicon structure comprised with said first conductivity type; and performing an anneal cycle, to create a fifth conductive region, to be used as the emitter region of said BJT, with said fifth conductive region comprised of said first conductivity type, and located in a top portion of said third conductive region, and having a dopant concentration greater than the dopant concentration of said third conductive region, and greater than the dopant concentration of said fourth conductive region, and resulting in a bottom portion of said third conductive type, used as the base width of said BJT, remaining between overlying, said fifth conductive region, and underlying, said fourth conductive region.