Patent ID: 6275890
Filing Date: 2001-08-14
Classification: G06F

Abstract:
A cross-bar switch comprising:a plurality of master bus ports, the master bus ports adapted to receive primary and secondary data transfer requests from a plurality of parallel master buses;a plurality of slave bus ports, the slave bus ports adapted to receive data from a plurality of parallel slave buses;a switching means for selectively coupling the plurality of master bus ports to the plurality of slave bus ports; andconfiguration registers for prioritizing the primary and secondary data transfer requests by the plurality of parallel master buses to the plurality of parallel slave buses via the switching means, the configuration registers comprising:at least one Priority Control Bit which indicates the priorities of the primary and secondary data transfer requests from the plurality of parallel master buses,a Transfer Abort Control Bit which enables the abort of a lower-priority burst-type data transfer which may be in progress on a slave bus when a master bus initiates a higher-priority data transfer request to the same slave bus, anda Secondary Transfer Request Enable which enables or disables the serving of an address-pipelined secondary transfer request by a slave bus not currently servicing a primary transfer request.