Patent ID: 6975980
Filing Date: 2005-12-13
Classification: G01R

Abstract:
1. An integrated circuit comprising: A. emulation interface pads; B. a first linking module connected to the emulation interface pads, including an enable input lead connected between the first linking module and the emulation input pads; C. first core circuits including first functional circuits, first boundary scan registers connected to the functional circuits, and a first access port connected to the first boundary scan registers, the first access port being connected to the emulation pads, having a first select output lead connected to the emulation interface pads, and being connected to the first linking module; D. a second linking module connected to the emulation interface pads and to the first linking module; and E. second core circuits including second functional circuits, second boundary scan registers connected to the second functional circuits, and a second access port connected to the second boundary scan registers, the second access port being connected to the emulation interface pads and the second linking module.