Patent ID: 8300192
Filing Date: 2012-10-30
Classification: G02F

Abstract:
1. A thin film transistor array panel comprising: a substrate; a gate line disposed on the substrate; a first data line disposed on the substrate and intersecting the gate line; a gate insulating layer disposed between the gate line and the first data line; a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the first data line, and a drain electrode; a plurality of color filters disposed on the thin film transistor and the gate insulating layer; a passivation layer disposed on the color filters; and a first pixel electrode disposed on the passivation layer, connected to the drain electrode, and having a first edge and a second edge facing the first edge, wherein the first and second edges each have portions oriented at one or more acute angles with respect to the gate line, wherein the first data line comprises a first crossing portion crossing from the first edge to the second edge at a first location along the first pixel electrode, the first data line also comprising a second crossing portion crossing from the first edge to the second edge at a second location along the first pixel electrode; wherein the second location is different from the first location; and wherein the first crossing portion and the second crossing portion are oriented at different angles with respect to the gate line.