Patent ID: 6894382
Filing Date: 2005-05-17
Classification: H01L

Abstract:
1. An electronic package for use with a printed circuit board comprising: a ground layer having an upper and lower section; a semiconductor chip having a first surface and a second surface, said first surface said lower section of said of said semiconductor chip on and electrically coupled to ground layer, said second surface having a first conductive pad adapted for being electrically connected to said upper section of said ground layer and a second conductive pad; a conductive signal layer having a portion substantially planar with said lower section of said ground layer, said portion of said signal layer adapted for being electrically connected to said second conductive pad; and a ground plane having a first section electrically connected to said upper section of said ground layer and a second section substantially planar with said lower section of said ground layer, said second section of said ground plane having an additional area to prevent cracking of a solder connection between said ground layer, said ground plane and said printed circuit board.