Patent ID: 6664129
Filing Date: 2003-12-16
Classification: H01L

Abstract:
An integrated circuit fabrication method comprising:(a) forming one or more openings in a first generally horizontal surface of a semiconductor substrate; (b) forming a first dielectric and a conductor in each of the one or more openings with the conductor in each of the openings being separated from the substrate by the first dielectric; (c) removing material from a second generally horizontal surface of the substrate to expose the first dielectric and turn the one or more openings into through holes, and removing the exposed first dielectric to expose the conductor at the second surface of the substrate, such that the first dielectric forms a protrusion at each opening at the second surface, and the conductor protrudes from the first dielectric at each protrusion of the first dielectric; wherein the protruding portion of each conductor has an outer surface not covered by the dielectric, and at least a portion of the outer surface is either vertical or is sloped outwards, laterally away from the through hole in which the conductor is formed, when the surface is traced in a direction away from the substrate.