Patent ID: 8451261
Filing Date: 2013-05-28
Classification: G09G

Abstract:
1. An LCD driver IC, comprising: a POR (Power On Reset) circuit; and a counter circuit, which receives a signal from the POR circuit to delay time and releases a RESETB output signal of the POR circuit after power of a gate driver IC is stabilized: wherein the counter circuit comprises: a first counter receiving the signal, from the POR circuit to delay for a first time; a first flip flop, wherein an output of the first counter is connected to a clock input of the first flip flop; a first AND gate, wherein an output of the first flip flop is connected to a first input of the first AND gate and the signal from the POR circuit is connected to a second input of the first AND Gate; a second counter receiving an output from the first AND gate to delay for a second time; and a second flip flop, wherein an output of the second counter is connected to a clock input of the second flip flop, wherein after the second delay, an output of the second flip flop releases the RESETB output signal.