Patent ID: 7960287
Filing Date: 2011-06-14
Classification: H01L

Abstract:
1. A method for fabricating semiconductor devices having first channel lengths and second narrower channel lengths, the method comprising the steps of: providing a hard mask layer overlying a gate-forming material layer; depositing a first mandrel-forming material overlying the hard mask layer; depositing a second mandrel-forming material overlying the first mandrel-forming material; etching the second mandrel-forming material and the first mandrel-forming material such that a first plurality of mandrels comprising the first mandrel-forming material and the second mandrel-forming material and a second plurality of mandrels comprising the first mandrel-forming material are formed; depositing a sidewall spacer-forming material overlying the first plurality of mandrels and the second plurality of mandrels; anisotropically etching the sidewall spacer-forming material to form sidewall spacers about sidewalls of each of the first plurality of mandrels and the second plurality of mandrels; removing the first plurality of mandrels and the second plurality of mandrels; etching the hard mask layer using the sidewall spacers as an etch mask; and etching the gate-forming material layer using the etched hard mask layer as an etch mask.