Patent ID: 7550323
Filing Date: 2009-06-23
Classification: H01L

Abstract:
1. A method of manufacturing an electrical fuse comprising: forming a layer of semiconductor material on a semiconductor substrate; patterning said layer of said semiconductor material into a cathode semiconductor portion, a fuselink semiconductor portion, and an anode semiconductor portion, wherein said fuselink semiconductor portion laterally abuts said cathode semiconductor portion and said anode semiconductor portion; forming a metal layer directly on at least an entirety of a top surface of said fuselink semiconductor portion; partially etching a segment of said metal layer over a middle portion of said fuselink semiconductor portion, while not etching segments of said metal layer over two end portions of said fuselink semiconductor portion; and forming a first metal semiconductor alloy portion having a first thickness and a third metal semiconductor alloy portion having said first thickness at least on said two end portions of said fuselink semiconductor portion, while forming a second metal semiconductor alloy portion having a second thickness on said middle portion of said fuselink, wherein said second thickness is less than said first thickness.