Patent ID: 8417810
Filing Date: 2013-04-09
Classification: H03K

Abstract:
1. A method for managing a counter system including a counter having a first stage update unit coupled to a second stage update unit, the first stage update unit and the second stage update unit being characterized by a first stage counter value having a plurality of bits and a second stage counter value, respectively, wherein the first stage update unit and the second stage update unit include a first plurality of subcounters and a second plurality of subcounters, respectively, and wherein a first subcounter and a second subcounter from among the first plurality of subcounters are characterized by a first subvalue having a first set of bits from among the plurality of bits and a second subvalue having a second set of bits from among the plurality of bits, respectively, the method comprising: receiving a count event associated with the counter; updating the first stage counter value based on the count event; determining whether to eject the first stage counter value from the first stage update unit to the second stage update unit based on a random function of an expiration of the first stage update unit; responsive to the determination to eject the first stage counter value, ejecting the plurality of bits from the first stage update unit to the second stage update unit; and updating the first subvalue and the second subvalue of the first stage update unit based on the count event.