Patent ID: 8334526
Filing Date: 2012-12-18
Classification: H01L

Abstract:
1. A phase change memory device, comprising: a plurality of word lines formed on a semiconductor substrate, the word lines substantially extending in parallel to each other and spaced apart evenly; a plurality of heating electrodes electrically connected to the plurality of word lines; a plurality of phase change lines on the interlayer insulating layer and on the heating electrodes, wherein the phase change lines include a substantially uniform thickness along a surface of the interlayer insulating layer; and a plurality of bit lines formed to be overlapped on the plurality of the phase change lines and to be substantially orthogonal to the word lines, wherein one of the plurality of the phase change lines includes a plurality of phase change areas, wherein the interlayer insulating layer includes at least one of curving portions, and the one of the curving portions is continuously positioned between adjacent the phase change areas in one of the phase change lines.