Patent ID: 8963221
Filing Date: 2015-02-24
Classification: G11C,H01L

Abstract:
1. A strongly correlated nonvolatile memory element, comprising, on a substrate: a channel layer including a strongly correlated oxide thin film; a gate electrode; a gate insulator formed in contact with at least a portion of a surface or interface of the channel layer and sandwiched between the channel layer and the gate electrode; and a source electrode and a drain electrode formed in contact with at least a portion of the channel layer, wherein the channel layer includes a perovskite type manganite which can undergo transitions between a metallic phase and an insulator phase, which is either a charge-ordered phase or an orbital-ordered phase, the channel layer is formed of a trigger layer of a first type strongly correlated oxide and a tuning layer of a second type strongly correlated oxide, and the trigger layer and the tuning layer are disposed by stacking one on the other.