Patent ID: 7071072
Filing Date: 2006-07-04
Classification: H01L

Abstract:
1. A method of forming a set of insulator plugs in an isolation trench in a semiconductor substrate having a device layer, without the use of CMP, comprising the steps of: depositing a pad insulator layer having a pad thickness over said device layer surface; etching a set of isolation apertures through said pad insulator and said device layer to an isolation depth; depositing in a single deposition step an isolation insulator layer in said isolation apertures to a depth sufficient to fill said isolation apertures above said device layer by a first margin that is less than the thickness of said pad insulator and having a sidewall thickness on isolation aperture walls; etching said isolation insulator layer such that said sidewall thickness of said isolation insulator on said aperture walls is removed; whereby at least some of said isolation insulator remains disposed on a top surface of said pad insulator as a remaining portion of said isolation insulator layer; and remaining isolation plugs of said isolation insulator layer fill said isolation apertures with an isolation plug surface above said device layer surface by a second margin; and etching said pad insulator layer with an etchant that does not attack said isolation insulator layer, whereby said pad insulator and said remaining portion of said isolation insulator layer are removed in the same step and said isolation plugs fill said apertures without CMP.