Patent ID: 7358796
Filing Date: 2008-04-15
Classification: H03F

Abstract:
1. An input voltage circuit comprising: a first input transistor having a control electrode for receiving a variable common mode input voltage; a first voltage detection transistor having a first current electrode coupled to a first current electrode of the first input transistor forming a first node; a first current source coupled to a second current electrode of the first voltage detection transistor forming a second node; a first variable voltage drop transistor having a first current electrode coupled to the first node, a control electrode coupled to the second node and a second current electrode coupled to a first output node, wherein the first voltage detection transistor detects a variation in the variable common mode input voltage and provides a signal to the first variable voltage drop transistor such that the first variable voltage drop transistor generates a voltage drop substantially proportional to the variation in the variable common mode input voltage to ensure a substantially constant output at the first output node; a second input transistor having a control electrode for receiving the variable common mode input voltage; a second voltage detection transistor having a first current electrode coupled to a first current electrode of the second input transistor forming a third node; a second current source coupled to a second current electrode of the second voltage detection transistor forming a fourth node; and a second variable voltage drop transistor having a first current electrode coupled to the third node, a control electrode coupled to the fourth node and a second current electrode coupled to a second output node, wherein the second voltage detection transistor detects a variation in the variable common mode input voltage and provides a signal to the second variable voltage drop transistor such that the second variable voltage drop transistor generates a voltage drop substantially proportional to the variation in the variable common mode input voltage to ensure a substantially constant output at the second output node.