Patent ID: 7263148
Filing Date: 2007-08-28
Classification: H04B

Abstract:
1. A source synchronous CDMA bus interface, comprising: a single data channel; at least one data transmitter circuit coupled to said data channel at a first point; at least one data receiver circuit coupled to said data channel at a second point; a system clock line which runs adjacent and parallel to said data channel; and a system clock signal applied to said system clock line such that said system clock signal propagates in parallel with data sent from said at least one data transmitter circuit to said at least one data receiver circuit via said data channel; the at least one of said data transmitter circuits comprising: the at least one of said data receiver circuits comprising: a demodulating circuit connected to receive said aligned received data at a first input and said unique orthogonal code at a second input and to produce data demodulated with said orthogonal code at an output and thereby recover said base-band data; wherein said at least one data transmitter circuit and at least one data receiver circuit comprise two data transmitter circuits and two data receiver circuits, each of said modulating circuits receiving respective unique orthogonal codes and each of said demodulating circuits corresponding to one of said modulating circuits and receiving said modulating circuit's orthogonal code, said unique orthogonal codes enabling the aligned modulated data from said two data transmitter circuits to be conveyed via said single data channel to said two data receiving circuits simultaneously using 3-PAM signaling, said receiver comprising first and second 2-bit interleaving analog-to-digital converters (ADCs) for handling even and odd data, respectively, each of said 2-bit ADCs receiving two DC reference voltages such that said ADC converts said 3-PAM signal to thermometer coded data.