Patent ID: 6150700
Filing Date: 2000-11-21
Classification: H01L

Abstract:
A NOR-type mask ROM comprising:a semiconductor substrate of a first conductivity type;a plurality of buried diffusion regions of a second conductivity type opposite to the first conductivity type, arranged in parallel on the substrate to serve as sources and drains wherein each diffusion region extends continuously along the semiconductor substrate;a plurality of channel regions defined between the buried diffusion regions;a plurality of gate insulating layers formed on the channel regions;a plurality of gate regions formed in parallel on the gate insulating layers, intersecting the buried diffusion regions, and overlapping with the channel regions, to serve as word lines;an insulating layer formed on the overall surface of the substrate, covering the gate regions; anda plurality of sub-gate regions formed into spacers on the sidewalls of the insulating layer, in parallel with the gate regions, intersecting the buried diffusion regions.