Patent ID: 6207481
Filing Date: 2001-03-27
Classification: H01L

Abstract:
A method of manufacturing a thin film transistor comprising the steps of:depositing amorphous silicon on a substrate and patterning the deposited amorphous silicon to form an active layer;forming a block layer substantially centrally located on the active layer to function as a mask during an impurity doping process so that a channel region is defined in a approximately central portion in the active layer;silicidizing an exposed surface of the active layer to form a crystallization seed layer, and, thereafter, removing the block layer;forming a gate insulating layer on the substrate so that the gate insulating layer covers the active layer and the crystallization seed layer;defining a gate electrode on the gate insulating layer so that the gate electrode is located substantially on a portion which corresponds to the channel region of the active layer, and wherein the gate electrode overlaps with a portion of the crystallization seed layer; andheavily doping impurities in the active layer using the gate electrode as a mask to form source and drain regions in the active layer, and converting the active layer from amorphous silicon to polysilicon through a metal induced lateral crystallization process caused by the crystallization seed layer.