Patent ID: 9170462
Filing Date: 2015-10-27
Classification: G02F

Abstract:
1. An array substrate, comprising; a first metal layer; a second metal layer; an insulation layer provided between and for insulating the first metal layer and the second metal layer, wherein a plurality of first signal lines are disposed along a first direction in the first metal layer and a plurality of second signal lines are disposed along a second direction in the second metal layer, and a repairing line provided in edge regions of the second metal layer and insulated from the plurality of the second signal lines, wherein the repairing line comprises a first longitudinal portion, a second longitudinal portion and a transverse portion, the first longitudinal portion is electrically connected to the second longitudinal portion by the transverse portion, wherein a projection of the first longitudinal portion in a plane of the first metal layer intersects with one end of each of the plurality of the first signal lines, and a projection of the second longitudinal portion in the plane of the first metal layer intersects with the other end of each of the plurality of the first signal lines, wherein a through hole is arranged in the insulation layer, wherein there is a disconnected first signal line among the plurality of the first signal lines, a conductive material is filled into the through hole above the first metal layer at two ends of the disconnected first signal line, a conductive material is filled into the through hole above the first metal layer at two ends of another first signal line adjacent to the disconnected first signal line and the through hole at the two ends of one same side of two sides of the disconnected first signal line and the another first signal line adjacent to the disconnected first signal line are electrically connected to each other, and the through holes at the two ends of the other same side of the two sides of the disconnected first signal line and the another first signal line adjacent to the disconnected first signal line are electrically connected to each other, the through hole at the two same ends of the same side of the two sides of the disconnected first signal line and the another first signal line adjacent to the disconnected first signal line are electrically connected to each other by using a bridge connection, wherein the first signal lines are gate lines, and one row pixel driven by the disconnected first signal line and one row pixels driven by the another first signal line adjacent to the disconnected first signal line are applied with the same driven signal at the same time and are driven at the same time, wherein the another first signal line which is configured to repair the disconnected first signal line is electrically connected to a gate of a thin film transistor of each of pixels driven by the another first signal line.