Patent ID: 8319270
Filing Date: 2012-11-27
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate which includes an active area surrounded by an element isolation insulation film; and a non-volatile memory cell provided on the active area and including: a tunnel insulation film provided on the active area; a floating gate electrode provided on the tunnel insulation film; a control gate electrode provided on the floating gate electrode; and an inter-electrode insulation film provided between the floating gate electrode and the control gate electrode, wherein, in a section of the non-volatile memory cell in a channel width direction, a dimension of a top face of the active area in the channel width direction is less than a dimension of a top face of the tunnel insulation film in the channel width direction, and the dimension of the top face of the tunnel insulation film in the channel width direction is less than a dimension of a bottom face of the floating gate electrode in the channel width direction.