Patent ID: 6323722
Filing Date: 2001-11-27
Classification: G05F,G11C,H02M,H03B,Y02B

Abstract:
An apparatus for translating a substrate voltage comprising:a capacitance having a first input terminal and a second input terminal;a first switch coupled between a first voltage and one of the first and second input terminals;a second switch coupled between a substrate voltage and the other of the first and second input terminals, wherein the second switch comprises an NMOS transistor;switch control means, coupled to the first and second switches, for closing the first and second switches so that the capacitance charges to a difference voltage between the first and second input terminals approximately equal to the difference between the first voltage and the substrate voltage;wherein the switch control means opens the first and second switches after the capacitance charges to the difference voltage, andwherein the switch control means couples a gate terminal of the NMOS transistor to the substrate voltage while the capacitance charges to the difference voltage, and wherein the switch control means couples the gate terminal of the NMOS transistor to a second voltage after the capacitance charges to the difference voltage, wherein the second voltage is a voltage that differs from the substrate voltage by an amount of voltage substantially equal to the first voltage;a third switch coupled between a third voltage and one of the first and second input terminals; andwherein the switch control means is coupled to the third switch and closes the third switch after the capacitance charges to the difference voltage so that the one of the first and second input terminals coupled to the third voltage has a voltage equal to the third voltage and the voltage at the other of the first and second input terminals changes by an amount approximately equal to the difference between the first voltage and the third voltage.