Patent ID: 6146969
Filing Date: 2000-11-14
Classification: H01L

Abstract:
A method of forming scribeline alignment marks, comprising:providing a semiconductor wafer having scribeline regions, wherein said scribeline regions have a number of alignment rectangles;forming a layer of dielectric having a top surface on said semiconductor wafer;forming a number of contact holes in said layer of dielectric;forming a number of alignment holes in said layer of dielectric, wherein said alignment holes are square, said alignment holes are located in said alignment rectangles, said alignment holes in each said alignment rectangle form a rectangular array filling said alignment rectangle, said alignment holes have the same shape and size as said contact holes, in said rectangular array of alignment holes all of said alignment holes are located on a predetermined pitch in a first direction and on said predetermined pitch in a second direction orthogonal to said first direction;forming a layer of metal on said wafer thereby filling said alignment holes and said contact holes with said metal; andremoving that part of said layer of metal above a first plane wherein said first plane is a step height below said top surface of said dielectric.