Patent ID: 8907356
Filing Date: 2014-12-09
Classification: F21Y,H01L

Abstract:
1. A light-emitting diode package structure comprising: a 3-dimensional substrate including a first chip accommodation region and at least one second chip accommodation region surrounding said first chip accommodation region, and having a stepped contour, wherein a first electric contact and a second electric contact are arranged in said first chip accommodation region; a plurality of light-emitting diode chips arranged m a border of said 3-dimensional substrate; a plurality of wires electrically connecting said light-emitting diode chips in series or electrically connecting said light-emitting diode chips in series firstly and in parallel next, wherein one of said wires electrically connects said first electric contact and one of said light-emitting diode chips, and wherein a second wire from the plurality of wires electrically connects said second electric contact and a second light-emitting diode chip from the plurality of light-emitting diode chips arranged in a border of said 3-dimensional substrate; wherein the 3D substrate has a stepped contour with at least two steps; wherein the first chip accommodation region is a region on a first step of the 3D substrate and the second chip accommodation region is on a second different step of the 3D substrate; wherein at least one via-hole is located in said first chip accommodation region and penetrates said 3-dimensional substrate, and that one end of a positive-electrode insertion member passes through said via-hole and electrically connects with said first electric contact, and that one end of a negative-electrode insertion member passes through said via-hole and electrically connects with second electric contact.