Patent ID: 6245621
Filing Date: 2001-06-12
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, comprising steps of:(a) forming a gate insulating film on a semiconductor substrate and forming a plurality of gate electrodes having a first insulating film made of a first insulating material thereon and a sidewall spacer made of the first insulating material on its sidewall on said gate insulating film;(b) forming a second insulating film which is made of the first insulating material and which is thinner than said first insulating film on said semiconductor substrate at least in a region where a contact hole is to be formed in the later step;(c) embedding a third insulating film which may become an etching stopper to etching of said first insulating material between said gate electrodes;(d) forming a first resist pattern having a predetermined shape on said semiconductor substrate and etching said second insulating film, first insulating film and sidewall spacer until when said gate electrode is exposed by using said first resist pattern and said third insulating film as mask;(e) forming an interlayer insulating film on said semiconductor substrate;(f) forming a second resist pattern having a predetermined shape on said interlayer insulating film and exposing said second insulating film by etching using said second resist pattern as a mask; and(g) forming the contact hole by removing said second insulating film.