Patent ID: 7888794
Filing Date: 2011-02-15
Classification: H01L,H03K

Abstract:
1. A semiconductor device, comprising: an active region in a semiconductor substrate comprising a first terminal region and a second terminal region, wherein the active region is interrupted by an inactive region, wherein an electrical power dissipation in the inactive region is zero or smaller than an electrical power dissipation in the active region; and a metallization layer arranged with respect to an active region on a surface of the semiconductor device and at least partly overlapping the active area, wherein the metallization layer is divided into a first part, in electrical contact to the first terminal region, and a second part, in electrical contact to the second terminal region, wherein the first and the second part are separated by a gap; and wherein the gap and the inactive region are mutually arranged so that an electrical power dissipation below the gap is reduced compared to an electrical power dissipation below the first part and the second part of the metallization layer.