Patent ID: 6090676
Filing Date: 2000-07-18
Classification: H01L

Abstract:
A process for making a semiconductor structure, comprising:providing a substrate;forming a gate dielectric layer on the substrate;forming a gate electrode including polysilicon on the gate dielectric layer, the gate electrode having a middle portion with a first height and side portions having heights that are less than the first height and having an exposed first surface opposite the gate dielectric layer and exposed side surfaces adjacent the first surface, the step of forming including oxidizing a portion of the gate electrode at the exposed surfaces to a selected depth, and removing the oxidized portion of the gate electrode, leaving the gate electrode with a middle portion that is thicker than its side portions; and;implanting at a first energy level a first concentration of a first dopant species into the substrate, wherein lightly doped drain regions are formed in the substrate below the side portions of the gate electrode and wherein the first energy level and first concentration of the first dopant species are sufficient for formation of source and drain regions in the substrate adjacent the gate electrode.