Patent ID: 7228513
Filing Date: 2007-06-05
Classification: G06F

Abstract:
1. A circuit operation verification device for verifying by simulation a functional operation of a circuit to be verified, comprising: a plurality of simulation sections, each simulating functional operations of a corresponding circuit portion of a plurality of circuit portions into which the circuit is divided; a bus for connecting the plurality of simulation sections to enable mutual communications; a bus controller for controlling the bus; and to a higher-level controller for controlling the bus controller for communications among the plurality of simulation sections to verify the functional operation of the circuit to be verified, wherein the circuit comprises a plurality of circuit units, each of which comprises at least one circuit element, wherein the plurality of circuit units is divided based on a temporal communication occurrence pattern among the plurality of circuit units to generate the plurality of simulation sections, wherein input signals and output signals of each of the plurality of simulation sections are transmitted and received via the bus.