Patent ID: 6449655
Filing Date: 2002-09-10
Classification: H04L

Abstract:
A method for communicating information comprising:providing a frequency conversion system between a controller associated with a low speed device and a high speed controller, the frequency conversion system comprising a buffer system operable to store data and a state machine system operable to control movement of data into and out of the buffer system; receiving at the state machine system in the frequency conversion system a high speed clock signal from the high speed controller; transmitting, by the state machine system in the frequency conversion system, a first cell available signal to the high speed controller, the first cell available signal indicating the buffer system in the frequency conversion system is available to receive data; in response to transmission of the first cell available signal to the high speed controller, transmitting data from the high speed controller to the buffer system at a first frequency corresponding to the high speed clock signal, the data transmission aligned by the high speed clock signal; polling according to UTOPIA protocol, by the state machine system, the buffer system in the frequency converter to determine if it has data to be transferred and determining that it has data to be transferred; receiving at the state machine system in the frequency conversion system a low speed clock signal, the low speed clock signal having a frequency lower than the high speed clock signal; in response to determining that the buffer system in the frequency conversion system has data to be transferred, transmitting, by the state machine system, the address of the low speed device to the controller associated with the low speed device; receiving, at the state machine system, a second cell available signal from the controller associated with the low speed device indicating the low speed device is ready to receive data; and transmitting the data in the buffer system, by the second state machine, at a second frequency corresponding to the frequency of the low speed clock signal to the low speed device, the data transmission to the low speed device aligned with the low speed clock signal.