Patent ID: 6033961
Filing Date: 2000-03-07
Classification: H01L

Abstract:
A method for forming a trench in a semiconductor substrate which serves to isolate adjacent semiconductor device regions, the method comprising the steps of:etching an isolation trench through a first layer of a wafer-in-process into the semiconductor substrate;depositing a second layer of a first material onto the first layer and into the isolation trench, wherein an outer surface of the second layer is contoured to have a recess in alignment with the isolation trench;depositing a third layer of a second material over the second layer, wherein an outer surface of the third layer is contoured to have a recess in alignment with the second layer recess and the isolation trench;after the step of depositing the third layer, globally planarizing along the outer surface of the wafer-in-process down to at least the second layer while leaving second material in the second layer recess;after the step of planarizing, stripping the second material from the second layer recess; andafter the step of stripping, globally planarizing the wafer-in-process at least to the first layer, while leaving first material in the isolation trench.