Patent ID: 7123034
Filing Date: 2006-10-17
Classification: G01R

Abstract:
1. An electrical interconnect for providing electrical signal pathways from a device under test to an electrical test system, the device under test having a plurality of device electrical contacts arranged in a planar device pattern, the electrical test system having a plurality of pin electronics contacts arranged in a planar test system contact pattern, the electrical interconnect comprising: a signal distribution board, the signal distribution board having a plurality of signal distribution traces, a tester side and an upper side, the tester side and the upper side being substantially planar and parallel; the plurality of signal distribution traces each having a tester, side contact, a signal distribution pathway and an upper side contact, each of the plurality of signal distribution traces providing a substantially electrically isolated signal pathway between an individual tester side contact and an individual upper side contact; the plurality of tester side contacts arranged on the tester side of the signal distribution board in a pattern substantially matching the test system contact pattern, and each tester side contact in electrical connection with an individual pin electronics contact of the electrical test system; the plurality of upper side contacts arranged in a upper side pattern, the upper side pattern including a personality pattern, the personality pattern substantially matching the device pattern; the plurality of signal distribution traces providing a plurality of individual and substantially electrically isolated electrical pathways from the plurality of pin electronics contacts of the electrical test system to the plurality of upper side contacts; a vertical signal frame, the vertical signal frame attached to the upper side of the electrical signal distribution board, the vertical signal frame have a body housing a plurality of electrically conductive elongate vertical pins, the body maintaining each of the elongate vertical pins in a substantially fixed position and maintaining the plurality of elongate vertical pins in a pattern substantially matching the upper side pattern; each elongate vertical pin having a board contact, an elongate body and a device contact, each elongate vertical pin positioned substantially normal to the upper side of the signal distribution board, each board contact of each elongate vertical pin in electrical connection with an individual upper side contact of the signal distribution board, and each elongate vertical pin providing a substantially isolated electrical signal pathway between an individual upper side contact of the signal distribution board and the device contact of the elongate vertical pin via the elongate body of the elongate vertical pin; and a device nest having a nest frame and at least two apertures, the nest frame detachably secured to the vertical signal frame and designed to selectively guide the device under test to seat within one of the apertures and above the personality pattern, and to position each of the plurality of device electrical contacts of the device under test in electrical connection with an individual device contact of an elongate vertical pin and the electrical test system, whereby the device nest is substantially constrained from movement in relation to the vertical signal frame when secured to the signal frame.