Patent ID: 6191725
Filing Date: 2001-02-20
Classification: G01S,H03G

Abstract:
An automatic gain control (AGC) circuit for an electromagnetic wave receiving system, the AGC circuit comprising an analog IF input connected to inputs of N parallel paths wherein an output of each path is connected to one of N inputs of an output switch; each of the N parallel paths containing a free-running sampling analog-to-digital converter (ADC), an output of each ADC being applied to a digital delay unit having an output forming the output for that path which is connected to one of the N inputs of said output switch, a number of the paths containing a signal amplitude modifier connected to an input of an associated ADC, the signal amplitude modifiers having fixed modification values that are staggered to provide an analog IF input signal to the sampling ADCs where the input to each sampling ADC has a different signal amplitude value; the AGC circuit having a video detector connected to receive the IF input and to provide a video input signal to a track-and-hold circuit, a means to determine the leading edge of each input signal pulse with a leading edge trigger (LET), a means to determine the trailing edge of each input signal pulse by a trailing edge trigger (TET), wherein the LET is connected to the track-and-hold circuit and to control circuitry with the TET being connected to the control circuitry which has a read/write control line connected to each digital delay unit and a gain control line connected to the output switch, the track-and-hold circuit being connected to the control circuitry and samples and holds the amplitude of an input pulse starting at the leading edge as demarked by the LET while IF signals in each input path with staggered amplitude values are digitized by the free-running ADCs and written into an associated digital delay unit, the writing into the delay units being started and stopped by signals from the control circuitry based on a pulse's LET and TET, the control circuitry comparing the sampled-and-held amplitude from the track-and-hold circuit to reference levels once the TET is activated and then selects a path amongst the N paths that produced the largest digitized version of the analog IF pulse without ADC over-range, the control circuitry then setting the switch to a setting that allows the data from the selected path to be read out to provide a leveled digital IF output at an output of the AGC circuit.