Patent ID: 7593485
Filing Date: 2009-09-22
Classification: H03D,H04L

Abstract:
1. A wireless receiver that processes a digital signal having an in-phase (I) signal component including a first, actual DC Offset Component (DCOC) and a quadrature-phase (Q) signal component including a second, actual DCOC, the wireless receiver comprising: a hardware (HW) block for receiving and processing the digital signal to produce a residual DCOC centered at DC, and generating parameters that estimate the residual DCOC, wherein the HW block includes, a converter block coupled to the HW block that receives the residual DCOC centered at DC and converts the residual DCOC centered at DC to a residual DCOC centered at intermediate frequency (IF), wherein the converter block includes, a digital signal processor (DSP) coupled to the HW block and the converter block that receives the residual DCOC centered at IF from the converter block and the parameters from the HW block, and uses the parameters to eliminate the residual DCOC, and generate a baseband signal that is substantially free of the DCOC.