Patent ID: 6121678
Filing Date: 2000-09-19
Classification: H01L,H05K

Abstract:
An integrated circuit package, comprising:a substrate having first and second surfaces and an edge;a plurality of wire bond pads on a central portion of the first surface;a first plurality of signal traces on the first surface extending outward from the wire bond pads to the edge;a plurality of solder pads on a central portion of the second surface;a second plurality of signal traces on the second surface extending outward from the solder pads to the edge; andone or more vias at the substrate edge extending between the first and the second surface of the substrate, wherein each via has a depth from the substrate edge of less than one half a width of a corresponding hole through the substrate and a second substrate prior to separation of the substrate from the second substrate each via containing conductive material connecting one of the first plurality of signal traces to one of the second plurality of signal traces.