Patent ID: 7039947
Filing Date: 2006-05-02
Classification: G06F

Abstract:
1. A method for transmitting data between a fail safe computer and a plurality of input/output modules via a bus control unit, said bus control unit being connected to said plurality of input/output modules via a serial bus and being connected to the fail safe computer, comprising cyclically carrying out following steps: transmitting, via the bus control unit, a first address over the serial bus for addressing one of the input/output modules; transmitting, via the bus control unit, a first multi-bit message over the serial bus to the input/output module addressed by the first address, the first multi-bit message including at least one first check bit and at least one first load bit; receiving, at the input/output module addressed by the first address, the first multi-bit message; and accepting, at the input/output module addressed by said first address, the first multi-bit message as correct only if the at least one first check bit is different from a corresponding first check bit included in a previous first multi-bit message received by the input/output module when addressed by the first address.