Patent ID: 8846481
Filing Date: 2014-09-30
Classification: H01L

Abstract:
1. A method of forming a transistor, said method comprising: performing at least one etch process so as to create, from a polysilicon layer, an emitter comprising: a lower portion and an upper portion above said lower portion, selectively removing said sacrificial layer so as to expose an extrinsic base positioned laterally adjacent to said dielectric spacer opposite said lower portion of said emitter, said upper portion of said emitter extending laterally over said extrinsic base; and, forming a silicide layer on said extrinsic base such that said silicide layer is positioned laterally immediately adjacent to said dielectric spacer opposite said lower portion of said emitter and such that said upper portion of said emitter extends laterally over said silicide layer; forming a dielectric layer on said silicide layer such that said dielectric layer is positioned laterally immediately adjacent to said dielectric spacer opposite said lower portion of said emitter and further positioned vertically between and immediately adjacent to said silicide layer and said tapered sidewall of said upper portion of said emitter.