Patent ID: 6242320
Filing Date: 2001-06-05
Classification: H01L

Abstract:
A method for fabricating a silicon on insulator wafer, comprising the steps of:preparing a base substrate and a semiconductor substrate;forming a first insulating layer on the base substrate;forming first isolation layers of trench types having a first depth in one surface of the semiconductor substrate;forming second isolation layers of trench types having a second depth in the one surface of the semiconductor substrate between the first isolation layers, the second depth being deeper than the first depth;forming a second insulating layer over the one surface of the semiconductor substrate including the first and second isolation layers;bonding the base substrate and the semiconductor substrate to contact the first insulating layer with the second insulating layer;firstly polishing another surface of the semiconductor substrate to expose the second isolation layers using the second isolation layers as polishing stoppers;etching the second isolation layers to have the same depth as the first isolation layer; andsecondly polishing the first polished another surface of the semiconductor substrate using the first and the etched second isolation layers as polishing stoppers to form a semiconductor layer.