Patent ID: 6787420
Filing Date: 2004-09-07
Classification: H01L

Abstract:
A method of manufacturing a super-junction semiconductor device having first and second principal faces, two principal electrodes provided on the first and second principal faces, and a pn layer with first-conductivity-type drift regions and second-conductivity-type partition regions are alternately arranged in stripes, said pn layer being provided between said two principal electrodes, wherein the pn layer is incrementally formed by the steps of:forming a cavity for impurities into first regions corresponding to said first-conductivity-type drift regions with a greater impurity concentration than second regions corresponding to said second-conductivity-type partition regions; epitaxially growing a first layer of a first conductivity type; forming a cavity for impurities into said first regions corresponding to said first-conductivity-type drift regions with a greater impurity concentration than second regions corresponding to said second-conductivity-type partition regions; epitaxially growing a second layer of first-conductivity type on the first layer; repeating the cavity forming and epitaxial growing steps until a desired thickness of the pn layer is formed; and thermally diffusing the epitaxially grown layers to form the first-conductivity type drift regions at said first regions and the second-conductivity type partition regions at said second regions.