Patent ID: 6701390
Filing Date: 2004-03-02
Classification: G06F

Abstract:
A data transfer apparatus, comprising:a first data source circuit; a first multi-port memory coupled to the first data source circuit; a first control and status circuit coupled to the first multi-port memory, and further coupled to the first data source circuit; a channel encoder coupled to the first multi-port memory, and further coupled to the first control and status circuit; a channel transmitter coupled to the channel encoder; a communication path coupled to the channel transmitter; a channel receiver coupled to the communication path; a channel decoder coupled to the channel receiver; a second multi-port memory coupled to the channel decoder; and a second control and status circuit coupled to the second multi-port memory, and further coupled to the channel encoder; wherein the first multi-port memory has a first plurality of read ports and a first plurality of write ports, and the second multi-port memory has a second plurality of read ports and a second plurality of write ports.