Patent ID: 9159444
Filing Date: 2015-10-13
Classification: G11C

Abstract:
1. A semiconductor device, comprising: at least one first row selection line; at least one column selection line that intersects with the first row selection line; a first fuse circuit including a first fuse array, and suitable for outputting a first fuse signal programmed in the first fuse array by using an external voltage as a source voltage in a power-up mode, wherein the first fuse array includes at least one first fuse cell coupled with the first row selection line and the column selection line; and a second fuse circuit including a second fuse array, and suitable for outputting a second fuse signal programmed in the second fuse array by using the internal voltage as a source voltage in the boot-up mode, wherein the second fuse array includes at least one second fuse cell coupled with at least one second row selection line and the column selection line.