Patent ID: 6740976
Filing Date: 2004-05-25
Classification: H01L

Abstract:
A semiconductor device comprising:a lower metal interconnection having a copper layer; an interlayer dielectric (ILD) formed on the copper layer of the lower metal interconnection, the ILD having a lower barrier layer and an upper barrier layer that have an etch selectivity with respect to each other; an upper metal interconnection formed on the ILD; a via contact plug formed of copper penetrating the ILD to connect the lower and upper metal interconnections; and a barrier metal layer having a first portion on side walls of the via contact plug and a second portion at the bottom of the via contact plug, the first and second portions of the barrier metal layer being discontinuous; wherein a portion of the via contact plug crossing the lower barrier layer has a greater width as compared to a portion crossing the upper barrier layer, and wherein the second portion of the barrier metal layer is spaced apart from the first portion of the barrier metal layer such that the lower metal interconnection is in direct contact with the via contact plug at the spaced apart region.