Patent ID: 8063689
Filing Date: 2011-11-22
Classification: H03K

Abstract:
1. An output stage comprising: a system input and a system output; a first transistor having a first control input and a first controlled path; a second transistor having a second control input and a second controlled path, the second controlled path being in series with the first controlled path and the system output; a first current-controlled voltage source having an input, the first current-controlled voltage source having an output that is electrically connected to the first control input of the first transistor; a second current-controlled voltage source having an input, the second current-controlled voltage source having an output that is electrically connected to the second control input of the second transistor; wherein the first transistor and the first current-controlled voltage source are in a first n-type well, and wherein the second transistor and the second current-controlled voltage source are in a second n-type well that is separate from the first n-type well; and current sources that are electrically couplable to the first current-controlled voltage source and to the second current-controlled voltage source and to the system input.