Patent ID: 6147846
Filing Date: 2000-11-14
Classification: H04N

Abstract:
An integrated circuit apparatus, comprising:an over-voltage circuit, that is capable of operating at a given power supply voltage level, and that produces an over-voltage signal that is greater in magnitude than said power supply voltage level;a gate circuit that controllably passes said over-voltage signal, wherein a bias voltage of said gate circuit floats relative to said over-voltage signal so as to provide over-voltage protection at said gate circuit;wherein said gate circuit includes a transistor that is configured to controllably pass said over-voltage signal, said transistor effectively having an input and an output and a control electrode, and wherein said floating relative bias voltage is delivered to said control electrode;wherein said output is coupled to a node in a path through which a capacitive voltage from a device coupled at said output can be drained; andwherein a buffer transistor device is coupled between said output and said node to protect components in said voltage drain path from said over-voltage signal at said output.