Patent ID: 6455416
Filing Date: 2002-09-24
Classification: G03F,H01L

Abstract:
A method of processing a semiconductor structure, comprising:providing a substrate having an insulation layer thereover; forming a first antireflection coating over the insulation layer; patterning a first resist over the antireflection coating; forming a plurality of vias in the insulation layer and the first antireflection coating, the vias having a first width; filling the via with a second antireflection coating, the second antireflection coating comprising a dye and a developer soluble film forming material; patterning a second resist over the structure and simultaneously removing the second antireflection coating from the via; forming a trench over the plurality of vias in the insulation layer, the trench having a second width that is larger than the first width; and filling the trench and vias with a conductive material.