Patent ID: 6674120
Filing Date: 2004-01-06
Classification: H01L

Abstract:
A nonvolatile semiconductor memory device comprising:a substrate; a channel forming region comprised of a first conductivity type semiconductor and formed in the substrate; a first and a second impurity regions comprised of a second conductivity type semiconductor and formed in the substrate and sandwiching the channel forming region between them, acting as a source and a drain in operation; a gate insulating film provided on the channel forming region; a gate electrode provided on the gate insulating film; and a charge storing means which is formed in the gate insulating film and dispersed in the plane facing the channel forming region and in a direction generally perpendicular to the gate electrode and is injected with hot holes at the time of operation from the first or the second impurity regions; wherein said first conductivity type is a p-type, and said second conductivity type is an n-type; and said gate insulating film comprises a first region into which hot holes are injected from said first impurity region, a second region into which hot holes are injected from said second impurity region, and a third region between the first and second regions and not injected by hot holes.