Patent ID: 6333227
Filing Date: 2001-12-25
Classification: H01L,Y10S

Abstract:
A method of forming an integrated circuit electrode structure comprising the steps of:forming a plurality of monocrystalline silicon hemispherical grains on an electrode on an integrated circuit substrate, and a plurality of non-monocrystalline silicon necks that connect the hemispherical grains to the electrode; thenconverting the plurality of non-monocrystalline silicon necks to a plurality of monocrystalline silicon necks; and thencleaning the plurality of monocrystalline silicon hemispherical grains in a solution that etches non-monocrystalline silicon, such that the monocrystalline silicon necks are not etched sufficiently to break and dislodge the hemispherical grains.