Patent ID: 6735485
Filing Date: 2004-05-11
Classification: G03F,G05B

Abstract:
A method for determining an overlay registration correction for a microelectronic product fabricated within a foundry facility comprising:providing a foundry facility having fabricated therein a plurality of microelectronic product types; determining for a single microelectronic product type within the plurality of microelectronic product types, and with respect to a specific alignment tool within the foundry facility, a first average historic overlay registration correction for a first pre-determined number of product lots of the single microelectronic product type previously aligned within the specific alignment tool; determining with respect to the specific alignment tool a second average historic overlay registration correction for a second pre-determined number of product lots of any product type previously aligned within the specific alignment tool; introducing a new product lot of the single product type into the foundry facility and aligning the new product lot within the specific alignment tool, wherein an overlay registration correction for the new product lot is determined as a sum of: an overlay registration correction for an immediately preceding layer within the new product lot, if present; a first factor derived from the first average historic overlay registration correction; and a second factor derived from the second average historic overlay registration correction.