Patent ID: 6314031
Filing Date: 2001-11-06
Classification: G11C

Abstract:
A memory device, comprising:a multiplicity of memory cells for storing data;at least one comparison unit having an address input and being configured to check whether an address received at said address input has a memory cell associated therewith which cannot be written to or read from properly or is in a memory cell area containing memory cells which cannot be written to or read from properly; anda selection device connected to said comparison unit, said selection device being configured to ensure that backup memory cells or backup memory cell areas are used instead of memory cells or memory cell areas which cannot be written to or read from properly;wherein information about a location of the memory cells or memory cell areas which are not to be used is supplied to said selection device at an instant at which a determination has not yet been made that the address received at said address input has a memory cell associated therewith which cannot be written to or read from properly or is in a memory cell area containing memory cells which cannot be written to or read from properly.