Patent ID: 8971148
Filing Date: 2015-03-03
Classification: G11C

Abstract:
1. A decode circuit comprising: a pre-decode circuit configured to operate by using a first power supply voltage supplied through a first power supply voltage line and a second power supply voltage supplied through a second power supply voltage line, and to provide a first pre-decode signal and a second pre-decode signal to a first pre-decode signal line and a second pre-decode signal line, respectively; a variable resistance element responding to the first pre-decode signal and being coupled between a power supply node and an output node, the power supply node supplied with a third power supply voltage supplied through a third power supply voltage line, the third power supply voltage being higher than the first power supply voltage, and a first transistor having a gate electrode coupled to the first pre-decode signal line, a source-drain path coupled between the output node and a first node, the first node whose voltage level being responsive to the second pre-decode signal.