Patent ID: 7032223
Filing Date: 2006-04-18
Classification: G06F,H04L,H04M,Y02D

Abstract:
1. A transport convergence (TC) subsystem for use in connection with the movement of data objects in machine readable form through a portion of a logical pipeline processor the TC transport subsystem comprising: a TC data object memory storing the machine readable data object, a local bus, for transferring a machine readable data object, said data object consisting of a structure incorporating a parameter portion and a data portion; a TC scheduling circuit for controlling said transfer of said machine readable object to and from a TC data object memory and/or an external data object memory via said local bus; a first TC signal processing circuit, coupled to said local bus and said TC scheduling circuit, and which is adapted for performing a first type of computation on said data object in connection with a stream of communications data; a second TC signal processing circuit, coupled to said local bus, said TC scheduling circuit and said first TC signal processing circuit, and which is adapted for performing a second type of computation on said data object in connection with a stream of communications data, wherein said first type of computation and said second type of computation are different operations; wherein said first type of computation and said second type of computation are controlled in part by parameter information in machine readable form associated with said parameter portion.