Patent ID: 7812640
Filing Date: 2010-10-12
Classification: G06F

Abstract:
1. A circuit with bi-directional signal transmission, comprising: a first signal source, for generating a first signal comprising one bit per clock cycle during a first plurality of clock cycles; a second signal source, for generating a second signal comprising one bit per clock cycle during a second plurality of clock cycles; a first buffer, coupled with said first signal source, that outputs the first signal when the first buffer is enabled; a second buffer, coupled with said second signal source, that outputs the second signal when the second buffer is enabled; a plurality of logical gates, coupled with said first signal source, said second signal source, said first buffer and said second buffer, that control enablement of said first buffer and said second buffer, such that (i) at any given clock cycle at least one of said first buffer and said second buffer is disabled, and (ii) when said first buffer and said second buffer are both disabled, subsequent generation of a ‘0’ bit in the first signal or the second signal causes enablement of said first buffer or said second buffer, respectively.