Patent ID: 6339752
Filing Date: 2002-01-15
Classification: G06F

Abstract:
A method of emulating a Target computer system on a Host computer system, wherein:the Target computer system supports a virtual memory mapped in a plurality of real memory pages containing a first real memory page and a second real memory page, and said method comprises: A) fetching a Target instruction from the first real memory page utilizing a real memory address instruction counter to address the first real memory page; B) incrementing the real memory address instruction counter to account for the Target instruction fetched in step (A); and C) emulating the Target instruction fetched in step (A); D) testing whether the real memory address instruction counter is within the first real memory page before step (A); and E) performing a virtual-to-real address translation to initialize the real memory address instruction counter to an address in the second memory page when the test in step (D) fails.