Patent ID: 6600221
Filing Date: 2003-07-29
Classification: H01L

Abstract:
A semiconductor device having a substrate on which a plurality of semiconductor chips are stacked on each other, wherein said semiconductor device comprises:a first semiconductor chip mounted on an upper surface of said substrate, a plurality of second semiconductor chips size of which are larger than that of said first semiconductor chip and stacked on said first semiconductor chip with a size-increasing order, a bonding pad formed on a lower surface of one of said plurality of second semiconductor chips, a circuit pattern formed on a lower surface of said substrate, a bonding wire for connecting said bonding pad formed on said semiconductor chip and said circuit pattern formed on said substrate, a through hole, formed on said substrate, through which said bonding wire is to be inserted, and further wherein said bonding wire is wired so as to be substantially perpendicular to the lower surface of said one of said plurality of second semiconductor chips.