Patent ID: 6448818
Filing Date: 2002-09-10
Classification: G06F,H03K

Abstract:
A ratioed NOR gate arrangement for a low-voltage-swing (LVS) logic circuit arrangement, the ratioed NOR gate arrangement comprising:at least three input terminals; an output terminal; and two inverter arrangements; wherein: each of the two inverter arrangements is coupled to the output terminal and to a corresponding one of the at least two input terminals; each of the two inverter arrangements includes a first switching device coupled in series with a second switching device, at least a third switching device couples the output terminal to a potential across a source-to-drain path and having a gate coupled to a corresponding one of the at least three input terminals that is not coupled to one of the two inverter arrangements; and the first switching device and the second switching device are about the same size, the second switching device has a higher mobility flow than the first switching device, and the at least third switching device is larger in size than the first switching device.