Patent ID: 7817071
Filing Date: 2010-10-19
Classification: H03M

Abstract:
1. An analog-to-digital converter (ADC), comprising: a first pipelined stage, for receiving and converting a sampled and held direct-current voltage so as to output a first digital code and a first residue voltage; and a second pipelined stage, for receiving and converting the first residue voltage so as to output a second digital code and a second residue voltage, wherein both of the first and the second pipelined stages comprise: a flash ADC, coupled to the second pipelined stage, for receiving and converting the second residue voltage so as to output a third digital code; a combination unit, coupled to the first and the second pipelined stages and the flash ADC, for receiving and combining the first, the second and the third digital codes so as to output an original digital signal; and a digital background calibration unit, coupled to the combination unit, the first and the second pipelined stages and the flash ADC, for receiving the original digital signal and the first, the second and the third digital codes, and calibrating the original digital signal according to a reference digital signal and the first, the second and the third digital codes, so as to output an accuracy digital signal.