Patent ID: 6172394
Filing Date: 2001-01-09
Classification: H01L

Abstract:
A non-volatile semiconductor memory device including memory cells each having a duplicate gate structure in which a floating gate and a control gate are stacked, each of said memory cells comprising:a semiconductor substrate of a first conductivity type;a first gate insulation film formed on said semiconductor substrate;a first conductive film formed on said first gate insulation film and constituting a portion of said floating gate;first and second semiconductor regions of a second conductivity type opposite to said first conductivity type formed on said semiconductor substrate so as to be self-aligned with side walls of said first conductive film;conductive side-wall portions additionally formed on said side walls so as to protrude from a top surface of said first conductive film and to overlap said first and second semiconductor regions, and constituting the remaining portion of said floating gate;a second gate insulation film formed to cover said first conductive film and said conductive side-wall portions; anda second conductive film formed on said second gate insulation film and constituting said control gate.