Patent ID: 6353246
Filing Date: 2002-03-05
Classification: H01L

Abstract:
A semiconductor device structure, comprising:a substrate including at least one buried silicon-on-insulator substrate region and at least one non-silicon-on-insulator region in the substrate, wherein the at least one buried silicon-on-insulator region and at least one non-silicon-on-insulator region are formed in a pattern in the substrate; and at least one trench arranged in the substrate in the vicinity of at least a portion of a boundary between at least one of the at least one silicon-on-insulator substrate regions and at least one of the at least one non-silicon-on-insulator substrate regions, wherein the at least one trench is arranged in at least one of the silicon-on-insulator region and the non-silicon-on-insulator region, wherein said at least one trench includes a plurality of deep trenches and a plurality of shallow trenches parallel to and alternating with said deep trenches.