Patent ID: 8698204
Filing Date: 2014-04-15
Classification: H01L

Abstract:
1. A semiconductor memory device comprising: a substrate; device regions formed in the substrate to extend in a first direction which is parallel to a principal plane of the substrate; select gates disposed on the substrate to extend in a second direction which is perpendicular to the first direction; and a contact region provided between the select gates on the substrate and including contact plugs disposed on the respective device regions, the contact region consisting of: first partial regions, in each of which N second partial regions, in each of which N wherein the first and second partial regions are alternately and continuously disposed in the contact region along the second direction, and each of the contact plugs has a planar shape of an ellipse or rectangle, and is arranged so that a major axis of the ellipse or a long side of the rectangle is tilted with respect to the first direction, and the major axis or the long side of each contact plug and the straight line of each first or second partial region are tilted in opposite directions with respect to the first direction.