Patent ID: 8581256
Filing Date: 2013-11-12
Classification: G02F,H01L

Abstract:
1. A pixel structure disposed on a substrate and comprising: a channel layer formed on the substrate; a first patterned metal layer comprising a data line, a source, and a drain, the source being connected to the data line, the source and the drain being separated from each other and being both in contact with the channel layer; a first insulation layer covering the channel layer and the first patterned metal layer; a second patterned metal layer disposed on the first insulation layer and comprising a scan line and a capacitor electrode, an extension direction of the scan line intersecting an extension direction of the data line, the capacitor electrode having at least one first portion overlapping the data line; a second insulation layer covering the second patterned metal layer and the first insulation layer; and a pixel electrode disposed on the second insulation layer and connected to the drain, and the pixel electrode at least overlapping the at least one first portion of the capacitor electrode.