Patent ID: 6218706
Filing Date: 2001-04-17
Classification: H01L

Abstract:
An integrated circuit device formed on a semiconductor chip and having improved overvoltage protection capability, comprising:high and low voltage rails for bringing externally-supplied power to circuitry within the chip;input bonding pads for communicating input signals to the chip from an external source;a receiver circuit coupled to each input bonding pad;a special rail being charged in normal operation to a voltage near the voltage on the high voltage rail, the special rail being isolated from the input bonding pads that are receiving low logic level inputs during normal operation; anda clamping transistor connected between the special rail and the low voltage rail, the clamping transistor turning on at the onset of an electrostatic discharge event of positive voltage appearing on the input bonding pads to couple the input bonding pads through the special rail to the low voltage rail, whereby the receiver circuits are protected from the overvoltage of the electrostatic discharge event.