Patent ID: 8798123
Filing Date: 2014-08-05
Classification: H03K

Abstract:
1. A differential signal output device comprising: a first transmitting terminal and a second transmitting terminal that superimpose a differential signal and a common mode signal and output the signals; a first control terminal that receives a first control signal; a second control terminal that receives a second control signal; a data terminal that receives a data signal; a clock terminal that receives a clock signal; a differential signal generating circuit that generates the differential signal and outputs the differential signal to the first and second transmitting terminals; a first control circuit that controls an operation of the differential signal generating circuit in response to the first control signal; a common mode signal generating circuit that generates the common mode signal and outputs the common mode signal to the first and second transmitting terminals; and a second control circuit that control an operation of the common mode signal generating circuit in response to the second control signal, wherein in a differential signal test mode for evaluating the differential signal, the first control circuit causes, in response to the first control signal, the differential signal generating circuit to generate the differential signal depending upon the data signal and output the differential signal to the first and second transmitting terminals, and the second control circuit stops the operation of the common mode signal generating circuit in response to the second control signal, and in a common mode signal test mode for evaluating the common mode signal, the first control circuit causes, in response to the first control signal, the differential signal generating circuit to generate a fixed differential signal and output the differential signal to the first and second transmitting terminals, and the second control circuit causes, in response to the second control signal, the common mode signal generating circuit to generate the common mode signal depending upon the clock signal and output the common mode signal to the first and second transmitting terminals.