Patent ID: 6166777
Filing Date: 2000-12-26
Classification: H04N

Abstract:
A picture-in-picture (PIP) video signal processing circuit for a multi-picture display circuit, the circuit comprising:a mode discriminator/timing generator for discriminating a mode in accordance with a synchronizing signal of a sub-picture video signal selected from input TV video signal or input PC video signal to produce a corresponding mode selection signal, producing a control signal for synchronizing horizontal and vertical frequencies of sub-picture video signal with a main-picture video signal, and separating horizontal and vertical synchronizing signals from the synchronizing signal of the sub-picture video signal;a video compressor for compressing the input TV video signal or the input PC video signal in accordance with the mode selection signal provides from the mode discriminator/timing generator;a memory for storing and outputting the sub-picture video signal provided from the video compressor;an outline generator for generating an outline signal for the sub-picture whose size corresponds to the sub-picture; anda video signal output section for mixing the sub-picture video signal provided from the memory with the outline signal provided from the outline signal generator to output the mixed video signal.