Patent ID: 6798071
Filing Date: 2004-09-28
Classification: H01L

Abstract:
A semiconductor integrated circuit device comprising:a first semiconductor integrated circuit chip having a plurality of first electrodes; a second semiconductor integrated circuit chip mounted on the first semiconductor integrated circuit chip and having a plurality of second electrodes; a package sealing the first and second semiconductor integrated circuit chips; a lead frame electrically connected to the first electrodes via respective first conductive wires; a plurality of relay electrodes provided on the first semiconductor integrated circuit chip; a plurality of second conductive wires electrically connecting the relay electrodes and respective second electrodes to each other; a plurality of third conductive wires electrically connecting the relay electrodes and the lead frame to each other; wherein a single conductive lead of said lead frame is electrically connected to both: (a) one of the first electrodes on the first chip via one of the first wires, and (b) one of the relay electrodes on the first chip via one of the third wires, so that said one of the first electrodes on the first chip is electrically connected to one of the second electrodes on the second chip via both the conductive lead of the lead frame and said one relay electrode; and wherein no one of the second conductive wires crosses another one of the other second conductive wires and no one of the third conductive wires crosses another one of the third conductive wires.