Patent ID: 8564073
Filing Date: 2013-10-22
Classification: H01L

Abstract:
1. A semiconductor chip having improved resistance to reverse engineering, said chip comprising: a. a substrate; b. a plurality of transistors defined in or on said substrate, the transistors having sidewall spacers with LDD regions formed in said under the sidewall spacers and also having active regions, at least some of the active regions of certain transistors being disposed near adjacent active regions of certain other transistors; c. a dopant density of the LDD regions being less than a dopant density of the active regions; and d. ambiguous interconnection features for interconnecting the at least some active regions with adjacent active regions with, the ambiguous interconnection features each comprising a channel formed in the substrate with a dopant density the same as the dopant density of the LDD regions, with selected ones of the channels having a conductivity type supporting electrical communication between interconnected active regions and with other selected ones of the channels being formed of a conductivity type inhibiting electrical communication between nearby active regions.