Patent ID: 7816245
Filing Date: 2010-10-19
Classification: H01L

Abstract:
1. A method of forming a semiconductor device comprising: providing a semiconductor substrate comprising a cell region, a peripheral circuit region, and a resistor region; forming a first insulating layer and a polysilicon pattern on an active region of the peripheral circuit region; forming a second insulating layer, a charge storage layer, and a third insulating layer on the active region of the cell region; forming a conductive layer on the semiconductor substrate; and patterning the conductive layer to form conductive patterns on the third insulating layer of the cell region, the polysilicon pattern of the peripheral circuit region, and the semiconductor substrate of the resistor region, respectively; wherein the cell region includes the active region defined by a device isolation layer, the peripheral circuit region includes an active region defined by the device isolation layer, and the resistor region includes the device isolation layer; and wherein the peripheral circuit region and the resistor region are spaced apart from the entire cell region, the cell region and the resistor region are spaced apart from the entire peripheral circuit region, and the cell region and the peripheral circuit region are spaced apart from the entire resistor region.