Patent ID: 7602211
Filing Date: 2009-10-13
Classification: H03K

Abstract:
1. A semiconductor integrated circuit device comprising: a first flip-flop circuit which outputs a clock control data signal inputted from its outside as a clock control signal in synchronization with a first clock signal; a first logic circuit to which the clock control signal and the first clock signal are inputted and which outputs a second clock signal; a second logic circuit to which the clock control signal is inputted and which inverts the clock control signal and outputs the inverted clock control signal as a circuit control signal; a first standard cell which comprises at least one input including a first input and a first output and which outputs a first output signal from the first output; a first conductivity-type transistor, the circuit control signal being inputted to a gate of the first conductivity-type transistor, one of a source and a drain of the first conductivity-type transistor being connected to a first power supply, and the other of the source and the drain of the first conductivity-type transistor being connected to the first output; a second conductivity-type transistor, the circuit control signal being inputted to a gate of the second conductivity-type transistor, one of a source and a drain of the second conductivity-type transistor being connected to a second power supply, and the second conductivity-type transistor being provided in a power current conducting path of the first standard cell between the first power supply and the second power supply; a second standard cell which comprises at least one input including a second input and a second output, the first output signal or a result of a predetermined logical operation based on the first output signal being inputted to the second input, and a second output signal being outputted from the second output; and a second flip-flop circuit to which the second output signal is inputted and which outputs the second output signal in synchronization with the second clock signal.