Patent ID: 8963157
Filing Date: 2015-02-24
Classification: H01L

Abstract:
1. A manufacturing method of a thin film transistor, comprising steps of: forming a buffer layer and an active layer sequentially on a substrate, and forming an active region through a patterning process on the active layer; forming a gate insulating layer and a gate electrode sequentially; forming Ni deposition openings; forming a dielectric layer having source/drain contact holes in a one-to-one correspondence with the Ni deposition openings; and forming source/drain electrodes which are connected with the active region via the source/drain contact holes and the Ni deposition openings; wherein materials of the active layer and the gate electrode are amorphous silicon thin film, respectively; between the step of forming the Ni deposition openings and the step of forming the dielectric layer the method further comprises a step of: crystallizing the amorphous silicon thin film material of both the active layer and the gate electrode into polysilicon thin film material by utilizing a metal induced lateral crystallization method.