Patent ID: 6859863
Filing Date: 2005-02-22
Classification: G06F

Abstract:
1. A multiprocessor system, comprising: a processing sub-system including a plurality of processors and a processor memory system; a network operable to couple the processing sub-system to an input/output (I/O) sub-system; the sub-system including a plurality of I/O interfaces each operable to couple a peripheral device to the multiprocessor system; the interfaces each including a local memory operable to store a copy of data from the processor memory for use by a corresponding peripheral device and to invalidate the copy at a first time event; a directory for processor memory system, the directory operable to identify the data as owned upon providing the copy to the I/O sub-system and to identify the data as unowned at a second time event; and wherein the invalidation of data in an I/O interface and the directory identifying the data as unowned are performed without notification messaging between the I/O interface and directory.