Patent ID: 7529983
Filing Date: 2009-05-05
Classification: G06F

Abstract:
1. A circuit arrangement for supporting and monitoring a microcontroller, which is constructed externally of the microcontroller, having a watchdog circuit for monitoring the microcontroller, which circuit outputs an error signal if not reset by the microcontroller within a watchdog period, and an interrupt circuit with various interrupt sources, which feeds important system messages to the microcontroller-as interrupt events for processing, characterized in that the interrupt sources are assigned to priority classes, and a predetermined maximum number of interrupt events per watchdog period is set for at least one priority class, and the watchdog circuit is connected to the interrupt circuit and cooperates therewith in such a way that the interrupt circuit for priority classes with a set maximum number, feeds at most this maximum number of interrupt events of the associated interrupt sources to the microcontroller within a watchdog period and, for priority classes without a set maximum number, feeds all the interrupt events of the associated interrupt sources to the microcontroller.