Patent ID: 8032888
Filing Date: 2011-10-04
Classification: G06F

Abstract:
1. A method for scheduling a thread on a plurality of processors comprising: obtaining a first state of a first processor in the plurality of processors and a second state of a second processor in the plurality of processors, wherein the thread is last executed on the first processor, and wherein the first state of the first processor comprises a state of a cache of the first processor; obtaining a first estimated instruction rate to execute the thread on the first processor using an estimated instruction rate function and the first state; obtaining a second estimated instruction rate for the second processor using the estimated instruction rate function and the second state; summing the second estimated instruction rate and the first estimated instruction rate to obtain a first estimated global throughput for executing the thread on the first processor; obtaining a second estimated global throughput for executing the thread on the second processor using the second state; comparing the first estimated global throughput with the second estimated global throughput to obtain a comparison result; and executing the thread, based on the comparison result, on one selected from a group consisting of the first processor and the second processor, wherein the thread performs an operation on one of the plurality of processors.