Patent ID: 6701447
Filing Date: 2004-03-02
Classification: G06F

Abstract:
A method of delaying the counting of a number of occurrences of each of a plurality of events occurring in a processor complex having at least one processor until the disposition of the event has been determined, comprising the steps of:providing at least one array of memory storage for storing count information for each event; providing a plurality of separately addressable groups of memory addresses in each of the at least one array of memory; providing at least one counter associated with each array of memory; said at least one processor generating a plurality of parameters for each of said events, said counter parameters uniquely identifying each said event, specifying a counter operation, and specifying one of the counters for the operation; providing a means for altering the disposition of said event, said means enabled to modify said parameters; passing the parameters of each said event generated by said at least one processor to at least one temporary buffer; disposing said event with the means for altering the disposition of said event; the means for altering the disposition of said event retrieving the parameters from the at least one temporary buffer; the means for altering the disposition of said event modifying or not modifying the parameters responsive to the disposition of the event, where the disposition indicates whether modification is required; and performing a write operation relative to the event to one of the counters, said write operation and said counter selected responsive to the parameters.