Patent ID: 8494105
Filing Date: 2013-07-23
Classification: H03D

Abstract:
1. An apparatus for providing a digital representation of a time difference between a reference signal having a reference signal period and an input signal having an input signal period, the apparatus comprising: a free-running finite state machine (FSM) configured to traverse a plurality of states in a predetermined order, the plurality of states having corresponding state vectors, each state vector being held for a state dwell time; a timing circuit configured to receive the reference signal, the input signal and the state vectors, and to determine state transition counts corresponding to a number of state transitions that occur during a counting interval at each reference signal period, wherein the counting interval corresponds to the time difference between the reference signal and the input signal; and a digital low-pass filter configured to receive the state transition counts corresponding to the reference signal periods, and to provide an output value comprising weighted sums of the state transition counts, the output value being proportional to the time difference between the reference signal and the input signal, wherein a period of the FSM is independent of the reference signal period.