Patent ID: 7373370
Filing Date: 2008-05-13
Classification: G06F

Abstract:
1. An extendable squarer for processing digital signals, suitable for performing a square operation of an n-bit data, n being a positive integer not equal to 0, the extendable squarer comprising: a bit expanding circuit having n−1 bit expanding output terminals for outputting corresponding bit expanding data, wherein an ith bit expanding data is wherein b a plurality of operating units receiving the bit codes of the n-bit data according to a binary weight, except for an operating unit receiving a bit code of a most-significant bit, input terminals of the operating units coupled to the bit expanding output terminals corresponding thereto for receiving the bit expanding data, each of the operating units multiplying the bit expanding data with the bit code and square of 2 and adding a square value of the bit code so as to generate an operator.