Patent ID: 8076201
Filing Date: 2011-12-13
Classification: H01L

Abstract:
1. A method of manufacturing a flash memory device, the method comprising: forming a first oxide layer on a semiconductor substrate, forming a first nitride layer pattern on the first oxide layer, and forming a second oxide layer pattern having a mask pattern buried therein on the first nitride layer pattern; forming a first polysilicon pattern on a sidewall of the mask pattern that is surrounded by the second oxide layer pattern; performing a first etching process with respect to the semiconductor substrate having the first polysilicon pattern, the first oxide layer, the first nitride layer pattern, and the second oxide layer pattern such that a third oxide layer pattern, a second nitride layer pattern and a fourth oxide layer pattern are formed at lower portions of the first polysilicon pattern and the mask pattern; forming a fifth oxide layer pattern surrounding the first polysilicon pattern and forming a second polysilicon pattern on a sidewall of the fifth oxide layer pattern in a form of a spacer; and removing the mask pattern and parts of the third oxide layer pattern and the second nitride layer pattern at the lower portion of the mask pattern.