Patent ID: 6593189
Filing Date: 2003-07-15
Classification: H01L

Abstract:
A method of manufacturing a semiconductor memory having a cell region in which a cell transistor is formed and a peripheral region in which peripheral transistor of peripheral circuit is formed, the method comprising:forming a gate oxide film, a first gate material and a first insulation film on a semiconductor substrate in the cell region and the peripheral region; forming a plurality of gate structures comprising the first insulation film, the first gate material and the gate oxide film in the cell region and the peripheral region, by etching a part of the first insulation film, the first gate material, and the gate oxide film; forming a second insulation film on side surfaces of the gate structures formed in the peripheral region; forming a plurality of trenches at a surface of the semiconductor substrate in the cell region and the peripheral region, by etching the semiconductor substrate with the first insulation film and the second insulation film used as masks; exposing the surface of the semiconductor substrate in the vicinity of the gate structures on both sides of the trenches, by removing the second insulation film on the side surfaces of the gate structures formed in the peripheral region; forming element-isolating insulation films in the trenches in the cell region, and in the trenches in the peripheral region such that the films extend onto the surface of the semiconductor substrate in the vicinity of the gate structures; removing the gate structures formed in the peripheral region; and forming gate structures of the peripheral transistors between the element-isolating insulation films of the peripheral region.