Patent ID: 6731696
Filing Date: 2004-05-04
Classification: H04L

Abstract:
A data encoder circuit for use in a data modem for communicating over a network having channels comprising:a random interleaver for receiving information bits from a data source and outputting interleaved information bits; a switch for receiving information bits from said data source and said output interleaved information bits and for switching between said information bits and said output interleaved information bits and outputting a resultant information bit stream; a recursive systematic convolutional encoder receiving the resultant information bit stream and outputting a parity bit stream comprising first and second time sequenced portions; and a controller comprising a parity bit selector and a memory, the controller storing said first time sequenced portion of said output parity bit stream from said recursive convolutional encoder in memory and, upon reception of said second time sequenced portion of said output parity bit selecting party bits for transmission.