Patent ID: 6093595
Filing Date: 2000-07-25
Classification: H01L

Abstract:
A method of fabricating an integrated circuit structure at a semiconducting surface of a body, comprising the steps of:forming first and second gate structures over selected locations of first and second doped regions, respectively, of the semiconducting surface, the first doped region being of a first conductivity type and second doped region being of a second conductivity type;forming a doped insulating layer over the first and second doped regions, the doped insulating layer including dopant of the first conductivity type;removing the doped insulating layer from over the first doped region, so that the doped insulating layer remains over the second doped region;implanting the first doped region with dopant ions of the second conductivity type, wherein the first gate structure and the remaining doped insulating layer masks portions of the first and second doped regions, respectively, from the implanting;heating the semiconducting body to diffuse dopant from the remaining doped insulating layer into portions of the second doped region; andthen removing the remaining doped insulating layer.