Patent ID: 6441501
Filing Date: 2002-08-27
Classification: H01L

Abstract:
A wire-bonded semiconductor device, which comprises:(a) a substrate having a plurality of bond pads including at least one double-wire bond pad; (b) a semiconductor chip mounted on the substrate; the semiconductor chip having a plurality of bond pads; and (c) a set of bonding wires interconnected between the chip-side bond pads and the substrate-side bond pads for electrically coupling the semiconductor chip to the substrate; the bonding wire set including: (c1) a first wire subset arranged along one side of the wire-bonded semiconductor device and erected to a first loop height; (c2) a second wire subset arranged in adjacency to the first wire subset in a corner of the wire-bonded semiconductor device and erected to a second loop height smaller than the first loop height; the second wire subset including at least a pair of bonding wires located in immediate adjacency to the first wire subset and bonded together to the double-wire bond pad on the substrate in an intercrossed manner.