Patent ID: 6846710
Filing Date: 2005-01-25
Classification: H01L

Abstract:
1. A method for manufacturing a BiCMOS including a bipolar transistor formed of a collector, a base, and an emitter, and a CMOS transistor formed of a gate and a source/drain, the method comprising: epitaxially growing a SiGe base layer on a substrate; forming an insulating layer on the SiGe base layer; forming an emitter window by etching the insulating layer to a partial depth; forming a dummy polysilicon pattern in the emitter window to have the same height as the surface of the insulating layer; exposing the sidewalls of the dummy polysilicon pattern and forming dummy spacers on the sidewalls of the dummy polysilicon pattern; forming an extrinsic base by implanting impurity ions into the SiGe base layer using the dummy polysilicon pattern and the dummy spacers as an ion implantation mask; removing the dummy spacers and the dummy polysilicon pattern and forming a selective ion-implanted collector in the substrate by implanting impurity ions into the emitter window using the remaining insulating layer as an ion implantation mask; exposing the SiGe base layer by etching the remaining insulating layer and forming an emitter by depositing and patterning an emitter polysilicon; and forming a gate and a source/drain.