Patent ID: 8148784
Filing Date: 2012-04-03
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate comprising a first region and a second region; a plurality of first trenches formed in the first region to a first depth; a first insulating layer disposed on sidewall and bottom surfaces of each one of the plurality of first trenches leaving a respective first inside portion within each one of the plurality of first trenches, wherein the first insulating layer comprises a first oxide layer disposed on the sidewall and bottom surfaces of each one of the plurality of first trenches, and a first liner layer disposed on the first oxide layer; first device isolation layers respectively disposed in the plurality of first trenches, wherein the first device isolation layers are made of only a first insulation material completely filling the first inside portion of each one of the plurality of first trenches; a plurality of second trenches formed in the second region to a second depth less than the first depth; a second insulating layer disposed on sidewall and bottom surfaces of each one of the plurality of second trenches leaving a respective second inside portion within each one of the plurality of second trenches, wherein the second insulating layer comprises a second oxide layer disposed on the sidewall and bottom surfaces of each one of the plurality of second trenches, and a second liner layer disposed on the second oxide layer, wherein the second liner layer is thinner than the first liner layer; and second device isolation layers respectively disposed in the plurality of second trenches, wherein the second device isolation layers are made of only a second insulation material completely filling the second inside portion of each one of the plurality of second trenches, the second insulation material being different from the first insulation material.