Patent ID: 6093594
Filing Date: 2000-07-25
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device after forming polysilicon gates and gate oxides over a semiconductor substrate, comprising the steps of:implanting first shallow extension junctions with a first dopant;forming first sidewall spacers on a first set of the polysilicon gates;implanting first deep junctions with said first dopant;rapid thermal annealing said first deep junctions whereby said first deep junctions are optimized;removing said first sidewall spacers from the first set of the polysilicon gates;forming thin sidewall spacers around a second set of the polysilicon gates;implanting second shallow extension junctions with a second dopant using said thin sidewall spacers;forming second sidewall spacers around the second set of the polysilicon gates;implanting second deep junctions with said second dopant; andrapid thermal annealing said second deep junctions whereby said second deep junctions are optimized independent of the optimization of said first deep junctions.