Patent ID: 6882047
Filing Date: 2005-04-19
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first semiconductor chip including a first field effect transistor; an external terminal for first gate electrode and an external terminal for first source electrode formed on a first surface of said first semiconductor chip; a first drain electrode formed on a second surface on the opposite side from said first surface of said first semiconductor chip; a first pattern to which said first semiconductor chip is mounted in connection with said first drain electrode; a pattern for first gate disposed adjacent to said first pattern but separately from said first pattern and electrically connected to said external terminal for first gate electrode via a bonding wire; a pattern for first source disposed adjacent to said first pattern but separately from said first pattern and electrically connected to said external terminal for first source electrode via a bonding wire; a second semiconductor chip which is different from said first semiconductor chip and includes a second field effect transistor; an external terminal for second gate electrode and an external terminal for second source electrode formed on a first surface of said second semiconductor chip; a second drain electrode formed on a second surface on the opposite side from the first surface of said second semiconductor chip; a second pattern to which said second semiconductor chip is mounted in connection with said second drain electrode; a pattern for second gate disposed adjacent to said second pattern but separately from said second pattern and electrically connected to said external terminal for second gate electrode via a bonding wire; a pattern for second source disposed adjacent to said second pattern but separately from said second pattern and electrically connected to said external terminal for second gate electrode via a bonding wire; a sealing body for sealing said first and second semiconductor chips, said first and second patterns, said patterns for first and second gates, said patterns for first and second sources and said bonding wires, said sealing body having a first surface of sealing body, and a second surface of sealing body opposite to said first surface of sealing body; a lead for first drain integrally formed to said first pattern and projected from said first surface of sealing body; a lead for first gate integrally formed to said pattern for first gate and projected from said first surface of sealing body; a lead for first source integrally formed to said pattern for first source and projected from the second surface of sealing body in the opposite side of said first surface of sealing body; a lead for second drain integrally formed to said second pattern and projected from said second surface of sealing body; a lead for second gate integrally formed to said pattern for second gate and projected from said first surface of sealing body; a lead for second source integrally formed to said pattern for second source and projected from said first surface of sealing body, wherein said leads for first and second drains are formed wider than the leads for first and second gates and the leads for first and second sources are projected from said first and second surfaces of sealing body in an asymmetrical positional relationship with each other.