Patent ID: 6154800
Filing Date: 2000-11-28
Classification: G06F

Abstract:
An apparatus for arbitrating a stream of access requests over a plurality of outputs, the apparatus comprising:a memory having a first plurality of storage locations for temporarily storing said stream of access requests, wherein said first plurality includes D storage locations and wherein each of said first plurality of storage location is configured for storing access requests having a width of W bits;a memory address store having a second plurality of storage locations for tracking content of each of said first plurality of storage locations, wherein each of said second plurality of storage locations is configured for storing addresses of said first plurality of storage locations and wherein each of said addresses has a width of log.sub.2 D bits;a logic circuit for causing said memory to read out content of said first plurality of storage locations to a respective one of said plurality of outputs according to an ordering of said addresses in said second plurality of storage locations, andwherein a maximum number of storage elements required for implementing said apparatus is D*[W+(N+1) log.sub.2 D] where N represents a total number of said plurality of outputs.