Patent ID: 7292670
Filing Date: 2007-11-06
Classification: H03L,H04L

Abstract:
1. A system for automatically correcting duty cycle distortion in a data input signal, comprising: a slicer operable to receive the data input signal and compare the data input signal with a slicer offset voltage to generate a sliced data signal, the slicer being further operable to receive an offset control signal to automatically adjust the slicer offset voltage; a phase detector circuit operable to receive the sliced data signal and a recovered clock signal and to compare the sliced data signal with the recovered clock signal to generate a rising edge output signal and a falling edge output signal, the rising edge output signal corresponding to a phase difference between a rising edge of the sliced data signal and an edge of the recovered clock signal, the falling edge output signal corresponding to a phase difference between a falling edge of the sliced data signal and an edge of the recovered clock signal; a first feedback circuit operable to phase-lock the recovered clock signal to the sliced data signal utilizing at least one of the rising edge output signal and the falling edge output signal; and at least one of the rising edge output signal and the falling edge output signal being configured in a second feedback circuit to generate the offset control signal; wherein the first feedback circuit is operable to phase-lock the recovered clock signal to the sliced data signal utilizing both the rising edge output signal and the falling edge output signal.