Patent ID: 9129904
Filing Date: 2015-09-08
Classification: B23K,H01L

Abstract:
1. A method of dicing a semiconductor wafer comprising a front surface having a plurality of integrated circuits thereon and having a back surface opposite the front surface, the method comprising: forming an outermost mask on the front surface of the semiconductor wafer, the outermost mask comprising a layer covering and protecting the integrated circuits; patterning the outermost mask and a portion of the semiconductor wafer with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned outermost mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits, each of the trenches having a width; and plasma etching, with the patterned outermost mask exposed, the semiconductor wafer through the trenches to form corresponding trench extensions and to singulate the integrated circuits, each of the corresponding trench extensions having the width.