Patent ID: 6012107
Filing Date: 2000-01-04
Classification: G06F

Abstract:
A method for management of hardware control blocks in a system having a host processor coupled to a plurality of devices by an I/O bus, said method comprising:placing hardware control blocks in a host endless hardware control block queue in a host memory,wherein each hardware control block includes a field specifying a storage site in an array of hardware control blocks in another memory;said host endless hardware control block queue is maintained to never be empty and so has at least one storage site allocated to said host endless hardware control block queue following an initialization; anda tail pointer delimiter for said host endless hardware control block queue is accessible only by a process executing on said host processor; andtransferring each hardware control block in order from said host endless hardware control block queue to said storage site in said array of hardware control blocks by only one device in said plurality of devices.