Patent ID: 8081725
Filing Date: 2011-12-20
Classification: H04L

Abstract:
1. A signal processing circuit, comprising: a receiver comprising an input for receiving an amplitude-modulated signal and an output for outputting an envelope of the amplitude-modulated signal; a demodulator having an input coupled to the output of the receiver for receiving the envelope of the amplitude-modulated signal as a receive signal which includes signal edges, and an output for outputting a demodulated receive signal which includes, at signal edges of the receive signal, transitions from a first level to a second level or vice versa, wherein points of time of the transitions depend on steepness of the signal edges; an edge evaluator having an input coupled to the output of the receiver to receive the envelope of the amplitude-modulated signal as the receive signal, and an output for outputting an evaluation signal which includes information about the steepnesses of the signal edges; and a signal generator having a first input which is coupled to the output of the demodulator, a second input which is coupled to the output of the edge evaluator, and an output for outputting a corrected demodulated receive signal which includes transitions whose points of time are set relative to the points of time of the transitions of the demodulated receive signal based on the evaluation signal in order to reduce influences of different steepnesses of the signal edges.