Patent ID: 6707702
Filing Date: 2004-03-16
Classification: G11C

Abstract:
A memory apparatus for storing data in a semiconductor device, the memory apparatus comprising:a volatile portion comprising first and second internal nodes, the volatile portion being adapted to store a binary volatile data state; and a non-volatile portion coupled with the first and second internal nodes of the volatile portion and adapted to store a binary non-volatile data state, the non-volatile portion comprising: first and second ferroelectric capacitors coupled with the first internal node of the volatile portion, and third and fourth ferroelectric capacitors coupled with the second internal node of the volatile portion; wherein the volatile portion comprises an SRAM cell comprising: a first inverter comprising a first input coupled with the second internal node and a first output coupled with the first internal node; and a second inverter comprising a second input coupled with the first internal node and a second output coupled with the second internal node; wherein the first inverter comprises a first PMOS transistor selectively coupling the first internal node with a first supply node according to a voltage at the second internal node and a first NMOS transistor selectively coupling the first internal node with a second supply node according to the voltage at the second internal node; wherein the second inverter comprises a second PMOS transistor selectively coupling the second internal node with the first supply node according to a voltage at the first internal node and a second NMOS transistor selectively coupling the second internal node with the second supply node according to the voltage at the first internal node; and wherein the volatile portion further comprises a first switching circuit adapted to selectively couple the first supply node with one of a supply voltage and a ground voltage, and a second switching circuit adapted to selectively couple the second supply node with one of the supply voltage and the ground voltage.