Patent ID: 6424058
Filing Date: 2002-07-23
Classification: G01R

Abstract:
A testable on-chip capacitor cell including a decoupling capacitor (Ci) which is connected to a power supply network including a first power line (12) having a first voltage level and a second power line (14) having a second voltage level, said decoupling capacitor serves a high frequency current demand during highly synchronous on-chip switching activity,the capacitor cell comprising: an externally controllable switch (Si) connected to a first terminal of the said decoupling capacitor (Ci) and having a first switching position to connect said decoupling capacitor to the first power supply line (12) and a second switching position to disconnect the decoupling capacitor from said first power supply line and to connect it through a discharge path to said second power supply line (14) to which also a second terminal of the capacitor (Ci) is connected; a discharge resistor (Ri) being arranged in said discharge path between the externally controllable switch (Si) and the second power supply line (14) when said switch (Si) is in its second switching position; off-chip control means (16) for toggling the switch (Si) with a frequency fT between its first and second switching position to perform a decoupling capacitor test operation; measuring means (20) for determining the actual power supply current IPS of repeatedly charging the decoupling capacitor (Ci) when said switch (Si) is toggled; and means for determining the actual capacity of the decoupling capacitor (Ci) as a function of the voltage applied to the power supply lines, the switch toggling frequency fT and the power supply current measured.