Patent ID: 7352210
Filing Date: 2008-04-01
Classification: G05F

Abstract:
1. An apparatus for regulating voltage levels, the apparatus comprising: a first transistor and a second transistor, the first transistor and the second transistor each coupled to a first current source and a second current source; a third transistor coupled to the second transistor and configured to receive a first voltage from the second transistor; a fourth transistor configured to receive the first voltage from the second transistor and generate an output voltage; a delay system coupled to the third transistor and configured to receive a sensing current from the third transistor and generate a delayed current associated with a predetermined time delay; a current generation system coupled to the delay system, the first transistor, the second transistor and the fourth transistor; wherein the current generation system is configured to receive the delayed current from the delay system, output a first current to the first transistor and the second transistor, and output a second current to the fourth transistor; wherein the first current and the second current are each substantially proportional to the delayed current.