Patent ID: 7882376
Filing Date: 2011-02-01
Classification: G06F,Y02D

Abstract:
1. A semiconductor integrated circuit device operable in a normal operating state and a standby operating state, comprising: an input/output (I/O) circuit area in which power is maintained in a power ON state during the normal operating state and the standby operating state; a battery voltage (VBAT) circuit area which is maintained in the power ON state during the normal operating state and the standby operating state; a core circuit area located in the VBAT circuit area; a power control circuit, located in the VBAT circuit area, which outputs a control signal for maintaining the core circuit area in the power ON state during the normal operating state and for maintaining the core circuit in a power OFF state during the standby operating state; a detection circuit, which is located in the VBAT circuit area, which detects at least one of an internal signal and an external signal, and which controls the power control circuit in response to detection of the at least one of the internal signal and the external signal; and a power source device located within the input/output circuit area, wherein the power control circuit outputs the control signal to the power source device which executes internal control of the power ON and OFF states of the core circuit area.