Patent ID: 8569834
Filing Date: 2013-10-29
Classification: B82Y,H01L

Abstract:
1. A gated microelectronic device comprising: an insulator substrate; a source a drain a channel portion intermediate between said source and said drain, an insulative dielectric in contact with said channel portion; a gate in overlying contact with said insulative dielectric, said gate defining a gate-insulative dielectric interface; said channel portion having a dimension normal to the gate-insulative dielectric interface suitable to fully deplete in an off-state; a gate contact applying a gate voltage bias to control charge carrier accumulation and depletion in said channel portion; and the source dopant, the drain dopant, and the channel portion dopant being all of a same type and wherein the source dopant concentration is between 10 wherein the source linear extent, the drain linear extent, and the positioning of the source ohmic contact and drain ohmic contact prevent ambipolar behavior in the device.