Patent ID: 9219468
Filing Date: 2015-12-22
Classification: G01R,H03H,H03K

Abstract:
1. A failure detector circuit for detecting status of a protected circuit, the failure detector circuit comprising: an enabling signal generator, generating a periodic enabling signal which has an operating cycle, configured to indicate an enable time in every operating cycle; a comparator circuit, having an enabling terminal, two input terminals and an output terminal, wherein the enabling terminal is configured to receive the enabling signal, and wherein the two input terminals are configured to respectively receive an output signal from the protected circuit and a reference signal, and wherein the output terminal is configured to provide a comparative result signal according to the enabling signal, the output signal and the reference signal; and a delay circuit, receiving the comparative result signal and detecting the comparative result signal for a given delay period, generating a delay signal according to the comparative result signal, wherein the given delay period is larger than the operating cycle.