Patent ID: 8618655
Filing Date: 2013-12-31
Classification: H01L

Abstract:
1. A semiconductor package, comprising: a circuit structure having an insulating layer with opposite first and second surfaces, a circuit layer embedded in the insulating layer and exposed from the first surface of the insulating layer and having a plurality of conductive traces embedded in the insulating layer and radio frequency (RF) traces embedded in the insulating layer, and a plurality of openings formed on the second surface of the insulating layer for exposing the conductive traces, respectively; a chip disposed on the first surface of the insulating layer and electrically connected to the conductive traces of the circuit layer, wherein the chip is free from being electrically connected to the radio frequency (RF) traces of the circuit layer; an encapsulant formed on the first surface of the insulating layer to cover the circuit layer and the chip; and a ground layer formed on the second surface of the insulating layer and having a plurality of openings for exposing the openings of the insulating layer and portions of the second surface of the insulating layer.