Patent ID: 9104414
Filing Date: 2015-08-11
Classification: G06F,G10L,H04L,H04N

Abstract:
1. A multimedia processing system comprising: a plurality of first units including a central processing unit (CPU) and a top domain; a storage domain configured to store a plurality of multimedia data; a multimedia codec domain configured to decode segments of target multimedia data received from the storage domain and to output decoded segments according to control of the CPU; a system bus configured to connect the plurality of first units, the storage domain, and the multimedia codec domain with one another; and an alive domain configured to control power supply to the plurality of first units, the storage domain, the multimedia codec domain, and the system bus, the alive domain including a user interface configured to receive an input signal from a user, wherein the multimedia processing system is configured such that while the multimedia codec domain is performing a decoding operation, the plurality of first units and the system bus are switched to a low-power mode.