Patent ID: 7188287
Filing Date: 2007-03-06
Classification: G01R,G06F

Abstract:
1. A semiconductor apparatus comprising: a processor having an instruction register and an input switchover device; a pseudorandom number generating device for generating pseudorandom numbers; and an instruction converting device between the pseudorandom number generating device and input switchover device, outputting the pseudorandom numbers without change when the pseudorandom numbers inputted from the pseudorandom number generating device are defined instructions, and converting the pseudorandom numbers into the defined instructions when the pseudorandom numbers are undefined instructions to thereby output the defined instructions, wherein: the input switchover device switches over between data input in normal operation and input of the pseudorandom numbers from the pseudorandom number generating device in the test operation to thereby output the pseudorandom numbers in the test operation to the instruction register, and the processor operates on the pseudorandom numbers inputted to the instruction register in the test operation.