Patent ID: 6154084
Filing Date: 2000-11-28
Classification: H03K

Abstract:
A method for switching voltages on a semiconductor chip, with a circuit configuration provided thereon, which comprises:connecting a first series circuit including a first p-channel transistor and a first n-channel transistor between a first switching terminal and a second switching terminal;connecting a second series circuit including a second p-channel transistor and a second n-channel transistor between the first switching terminal and a first input terminal;connecting a junction point of the two transistors of the first series circuit to a gate terminal of the second p-channel transistor;connecting an output terminal for an output signal to the junction point of the two transistors of the first series circuit;connecting a junction point of the transistors of the second series circuit to a gate terminal of the first p-channel transistor;connecting a second input terminal to a gate terminal of the second n-channel transistor;connecting a third series circuit including a third p-channel transistor and a third n-channel transistor between a third input terminal and the second switching terminal;connecting the junction point of the two transistors of the first series circuit to a gate terminal of the third n-channel transistor;connecting a junction point of the transistors of the third series circuit to a gate terminal of the first n-channel transistor;connecting a fourth input terminal to a gate terminal of the third p-channel transistor;providing a low supply voltage and a high supply voltage for the semiconductor chip, the high supply voltage being greater than the low supply voltage;first applying potentials at the input terminals having an absolute value at most equal to one of the low supply voltage and the high supply voltage for the semiconductor chip; andsubsequently, applying a first high potential at the first switching terminal greater than the high supply voltage of the semiconductor chip or selecting a first low potential at the second switching terminal to be negative and suitable for programming or erasing non-volatile memory cells.