Patent ID: 9214526
Filing Date: 2015-12-15
Classification: H01L

Abstract:
1. A trench gate semiconductor device comprising: a drift layer that has a first conductivity type; a body layer that has a second conductivity type and is in contact with an upper surface of the drift layer; a first semiconductor region that has the first conductivity type, is disposed in a part of an upper surface of the body layer, and is separated from the drift layer by the body layer; a gate insulation film that is formed at a wall surface of a gate trench, the gate trench penetrating through the body layer and reaching an inside of the drift layer; a trench gate electrode that is disposed in the gate insulation film and faces a part of the body layer via the gate insulation film, the part of the body layer being configured to separate the drift layer and the first semiconductor region; a first main electrode that is electrically connected with the body layer and the first semiconductor region; a second semiconductor region that has the second conductivity type, is disposed on a bottom part of the gate trench, and is surrounded by the drift layer; and a conductor region that is configured to electrically connect at least one of the body layer and the first main electrode with the second semiconductor region and is configured to equalize, when the semiconductor device is in an off-state, a potential of the second semiconductor region and a potential of the at least one of the body layer and the first main electrode, wherein the conductor region is formed along a part of a side wall surface of the gate trench, a first end of the conductor region is connected with the second semiconductor region, a second end if the conductor region is connected with the body layer, the conductor region is a semiconductor region that has the second conductivity type and that is in contact with the gate insulation film and in contact with the drift layer, and a second conductivity type impurity concentration of the conductor region is higher than a second conductivity type impurity concentration of the second semiconductor region.