Patent ID: 6657244
Filing Date: 2003-12-02
Classification: H01L

Abstract:
A semiconductor structure comprising:a semiconductor substrate having at least one patterned gate region located on a surface thereof, said semiconductor substrate containing source/drain diffusion regions abutting said at least one patterned gate region and said at least one patterned gate region comprising an upper exposed portion that comprises a Si-containing material; silicide regions located on said source/drain diffusion regions and said upper exposed portion of said at least one patterned gate region; a non-reactive film located atop the silicide regions as well as exposed vertical portions of said at least one patterned gate region; and a planarizing film located atop said non-reactive film, wherein said planarizing film has an upper horizontal surface that is coplanar with an upper surface of said non-reactive film which overlays said at least one patterned gate region.