Patent ID: 9131421
Filing Date: 2015-09-08
Classification: H04W,Y02D

Abstract:
1. An apparatus comprising: at least one processor; memory storing computer program code; wherein the memory storing the computer program code is configured to, with the at least one processor, cause the apparatus to at least: upon a request from a macro base station serving a user device: wherein J/bi represents Joules per bit, wherein K f is the set of users of the femtocell, wherein R i FU is the rate of the ith femto user, and wherein p i FU and t i FU are the power and time fractions, respectively, allocated by the femto base station to the ith femto user; compare results of the first performance evaluation and the second performance evaluation; and if the second performance evaluation indicates an improvement, cause direction of handover of the user device by the macro base station to the femto base station.