Patent ID: 6723600
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A method for making a structure including a metal-insulator-metal capacitor, comprising the steps of:providing an inter-level dielectric layer; forming a damascene pattern on a surface of said inter-level dielectric layer, said damascene pattern including a trench and at least one via adjacent said trench; depositing a copper barrier and seed layer over said inter-level dielectric layer and in contact with said inter-level dielectric layer at a bottom of said trench and at a bottom of said via, so that said copper barrier and seed layer is formed on both the bottom and sidewalls of said trench and within said via; forming a resist pattern over said trench; filling said via with copper in contact with said copper barrier and seed layer to form a conductive interconnect; removing the resist pattern over said trench; forming a dielectric over said copper barrier and seed layer within the trench and in contact with said copper barrier and seed layer within the trench; and forming a metal layer over said dielectric and in contact therewith, wherein said copper barrier and seed layer forms a bottom plate of said capacitor, said dielectric forms a dielectric of said capacitor, and said metal layer forms an upper plate of said capacitor.