Patent ID: 8338289
Filing Date: 2012-12-25
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor chip that includes a semiconductor substrate, a multi-layered wiring structure having a plurality of insulating layers laminated on the semiconductor substrate and a first wiring pattern provided in the plurality of insulating layers, an external connection terminal provided on an uppermost layer of the multi-layered wiring structure, a through via provided in a through hole that passes through the semiconductor substrate, and a second wiring pattern provided in the plurality of insulating layers to connect electrically the through via and the external connection terminal, comprising: a first insulating film forming step of forming a first insulating film on a surface of the semiconductor substrate, said first insulating film having an opening portion formed therein during the first insulating film forming step; after the first insulating film forming step, a first and second wiring patterns forming step of forming simultaneously the first wiring pattern and the second wiring pattern on the first insulating film, said first wiring pattern being separated from said semiconductor substrate by said first insulating film, said second wiring pattern being formed over said opening portion and including a second wiring pattern via extending through said opening portion to said semiconductor substrate; after the first and second wiring patterns forming step, a through hole forming step of forming the through hole in the semiconductor substrate so as to expose said second wiring pattern via, said through hole formed by removing a portion of the semiconductor substrate without removing any of the first insulating film, and said through hole formed with a diameter equal to that of the second wiring pattern via; after the through hole forming step, a second insulating film forming step of forming a second insulating film on a side surface of the through hole; and after the second insulating film forming step, a through via forming step of forming the through via in the through hole on which the second insulating film is formed, said through via connecting with said second wiring pattern via so as to electrically connect said through via, said second wiring pattern, and said external connection terminal.