Patent ID: 6627507
Filing Date: 2003-09-30
Classification: H01L

Abstract:
A method of providing a thick porous silicon region in a silicon substrate to increase the RF isolation properties of an integrated circuit substrate material and reduce the loss due to passive component integration induced in the substrate material, said method comprising the steps of:providing a silicon substrate having an first surface and an opposing second surface; defining an area within said substrate material to be anodized, forming an anodized porous silicon region in and from said area of said substrate material, said silicon region including said porous silicon region being substantially planar at said first surface of said silicon substrate and having a resistivity greater than 1000 ohm-cm; depositing an epitaxial layer of semiconductor material on said porous silicon region; and forming at least one inductive electrical component integrated at least one of onto or into said epitaxially deposited layer of semiconductor material on said porous silicon region and electrically isolated from said silicon region.