Patent ID: 6016002
Filing Date: 2000-01-18
Classification: H01L

Abstract:
A protective circuit for preventing excessive voltages from being applied through a signal line to a protected circuit, the protective circuit comprising:an anode connected to the signal line;a cathode connected to a ground reference;a P-channel transistor having the source thereof connected to said anode and the gate thereof connected to a trigger voltage separate from the voltage on the signal line;a PNP transistor having a base, an emitter connected to both said anode line and the source of said P-channel transistor, and further having a collector connected to the drain of said P-channel transistor;an NPN transistor having the emitter thereof connected to said cathode, the base thereof connected to the collector of said PNP transistor and the drain of said P-channel transistor, and the collector thereof connected to the base of said PNP transistor;a first resistor connected between said anode and the base of said PNP transistor and the collector of said NPN transistor;a second resistor connected between said cathode and the collector of said PNP transistor, the drain of said P-channel transistor and the base of said NPN transistor, with said PNP and NPN transistor and said first and second resistors configured as a first SCR;wherein said P-channel transistor will conduct current through said second resistor to cause the voltage on the base of said NPN transistor to increase thus turning on said NPN transistor and pulling the base of said PNP transistor low to turn on said PNP transistor and latch said first SCR; anda second SCR connected in series with said first SCR, said first and second SCRs having a holding voltage associated therewith, such that a combined holding voltage of said protective circuit is approximately equal to the sum of the holding voltages of each of said first and second SCRs.