Patent ID: 7443709
Filing Date: 2008-10-28
Classification: G11C

Abstract:
1. A semiconductor storage device comprising: a memory cell which stores information; a first bit line connected to the memory cell; a dummy cell having a dummy capacitor; a second bit line connected to the dummy cell, and supplied with an electric potential complementary to an electric potential of the first bit line; a sense amplifier which compares and amplifies the electric potential of the first bit line and the electric potential of the second bit line; a sense amplifier supply voltage generation circuit which supplies the sense amplifier with a sense amplifier supply voltage to be used in the comparison and amplification by the sense amplifier; and a reference voltage generation circuit which is supplied with the sense amplifier supply voltage and, when data is read out from the memory cell to the first bit line, supplies, to the second bit line via the dummy cell, a reference potential which fluctuates with a positive correlation to a fluctuation in the sense amplifier supply voltage.