Patent ID: 9152422
Filing Date: 2015-10-06
Classification: G06F

Abstract:
1. A method of compressing trace data, comprising: detecting trace data corresponding to one or more function units performing an instruction in a reconfigurable processor as valid trace data, to exclude at least one of a no-operation (NOP) instruction and a predicate instruction for pipelining; and compressing the valid trace data for each configuration information without compressing the configuration information, wherein the detecting and the compressing each is performed by a processor, wherein the trace data comprises memory access information corresponding to each of the function units, and corresponding to configuration information related to the processor, excluding the data accessed using the memory access information, and wherein the configuration information defines instructions allocated to the function units and connections between the function units, and wherein the compressing the valid trace data comprises generating additional information corresponding to a detection of the valid trace data and generating compressed trace data by compressing both the valid trace data and the additional information.