Patent ID: 7485515
Filing Date: 2009-02-03
Classification: H01L

Abstract:
1. A method of manufacturing a metal oxide semiconductor (MOS), comprising: providing a substrate with a PMOS region and an NMOS region; forming a gate structure respectively on the PMOS region and the NMOS region of the substrate; forming a source and a drain in the substrate at both sides of each of the gate structures; forming a first buffer layer on the substrate to cover each of the gate structures, the source, and the drain; depositing a compressive dielectric film on the PMOS region of the substrate to cover the first buffer layer on the gate structures, the source, and the drain in the PMOS region, wherein the method of depositing the compressive dielectric firm comprises adding a certain gas during a CVD process, wherein the certain gas is selected from among Ar, N forming a second buffer layer on the substrate after the compressive dielectric film has been deposited, so as to cover the compressive dielectric film in the PMOS region and the first buffer layer in the NMOS region and depositing a tensile dielectric film on the second buffer layer in the NOMS region.