Patent ID: 6573152
Filing Date: 2003-06-03
Classification: H01L

Abstract:
A method to form isolation structures on a semiconductor substrate, comprising:forming a trench in the semiconductor substrate; depositing a first portion of a dielectric layer at a first rate by a High Density Plasmaâ€”Chemical Vapor Deposition into the trench and onto the semiconductor substrate to at least partially fill the trench; partially planarizing the dielectric layer by depositing a second portion of the dielectric layer at a second rate by the High Density Plasmaâ€”Chemical Vapor Deposition over the semiconductor substrate, without repeating the depositing of the first and second portions at the first and second rates, respectively; and directly removing a portion of the partially planarized dielectric layer deposited at the second rate, without performing intermediary processes after depositing the second portion of the dielectric layer.