Patent ID: 8525355
Filing Date: 2013-09-03
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor chip assembly having a primary semiconductor chip and a secondary semiconductor chip stacked on the primary semiconductor chip, said secondary semiconductor chip being stacked on an upper surface side of the primary semiconductor chip such that a first portion of the secondary semiconductor chip overlays a portion of the upper surface side of the primary semiconductor chip and a second portion of the secondary semiconductor chip extends beyond the upper surface side of the primary semiconductor chip; and a sealing resin having a low modulus of elasticity which seals and fully encapsulates the semiconductor chip assembly, wherein the sealing resin comprises: a primary sealing resin having a low modulus of elasticity that seals a lower surface side of the primary semiconductor chip that is opposed to the upper surface side of the primary semiconductor chip on which the secondary semiconductor chip is stacked; and a secondary sealing resin having a low modulus of elasticity that seals all other surface sides of the semiconductor chip assembly, wherein the semiconductor chip assembly further includes a pad on the upper surface side of the primary semiconductor chip that is electrically connected to an upper surface of a primary external connecting terminal by a wire, and a pad on an upper surface side of the secondary semiconductor chip that is electrically connected to an upper surface of a secondary external connecting terminal by a wire, wherein lower surfaces of the primary and secondary external connecting terminals, which are respectively opposite to the upper surfaces of the primary and secondary external connecting terminals, are exposed from the sealing resin and are flush with a surface of the secondary sealing resin and level with a lower surface of the primary sealing resin, wherein a height of the primary external connecting terminal equals a height of the secondary external connecting terminal, said height of the primary external connecting terminal measured between the lower surface and upper surface of the primary external connecting terminal, and said height of the secondary external connecting terminal measured between the lower surface and upper surface of the secondary external connecting terminal.