Patent ID: 6621750
Filing Date: 2003-09-16
Classification: G11C

Abstract:
A semiconductor memory comprising:a plurality of memory blocks operating at different timings from one another, each including a plurality of memory cell rows containing memory cells and a redundancy memory cell row containing redundancy memory cells for relieving a defective memory cell row out of said memory cell rows; a redundancy memory circuit including a first memory unit for storing as address information a defect address indicating said defective memory cell row existing in any one of said memory blocks; and a redundancy control circuit for receiving said address information, disabling said defective memory cell row corresponding to said defect address stored in said redundancy memory circuit and enabling said redundancy memory cell row in said memory block including said defective memory cell row, and disabling said memory cell rows corresponding to said defective memory cell row and enabling said redundancy memory cell rows in the rest of said memory blocks, wherein: said memory cell rows each include a selecting line for selecting said memory cells; and said redundancy control circuit includes a first receiver circuit for, firstly and directly receiving said address information stored in said first memory unit and a first switching circuit for disabling one of said memory cell rows according to said address information received, said first receiver circuit and said first switching circuit being formed in one of said memory blocks, and a second receiver circuit for receiving said address information transmitted through said selecting line of the memory block which has firstly and directly received said address information and a second switching circuit for disabling one of said memory cell rows according to said address information received, said second receiver circuit and said second switching circuit being respectively formed in said memory blocks other than one having said first receiver circuit and said first switching circuit.