Patent ID: 6021502
Filing Date: 2000-02-01
Classification: G06F,G11C,Y02D

Abstract:
A semiconductor device comprising:a plurality of first circuits;a plurality of individual power evaluation portions, each of which corresponds to one of said plurality of first circuits, for individually estimating the amounts of power consumed by each corresponding one of said plurality of first circuits;a total power evaluation portion for determining the sum of the amounts of estimated power consumed by all of said plurality of first circuits on the basis of a result from said plurality of individual power evaluation portions; anda first control portion for controlling the operation of a second circuit on the basis of a result from said total power evaluation portion, said second circuit differing from said plurality of first circuits,wherein each of said plurality of individual power evaluation portions comprises first counters provided in corresponding relation to said plurality of first circuits for counting on the basis of whether or not a corresponding one of said plurality of first circuits operates, andwherein said first control portion comprises:a second counter, said second counter being reset at fixed time intervals;a detecting circuit for detecting a coincidence between an output from said second counter and the result from said total power evaluation portion; anda second control portion for controlling the operation of said second circuit in accordance with a result from said detecting circuit.