Patent ID: 8037465
Filing Date: 2011-10-11
Classification: G06F

Abstract:
1. A method in a compiler, the method comprising: performing a first compiling operation to produce an intermediate representation of a source code; generating a first pass multi-threaded executable binary from the intermediate representation; executing the first pass multi-threaded executable binary to collect sampling data from its first pass via execution on a Non-Uniform Memory Access (NUMA) platform; building a remote load table of the first pass multi-threaded executable binary based on the sampling data, wherein the remote load table lists load expressions from the first pass of the first pass multi-threaded executable binary and memory load latency data for each of the load expressions listed in the remote load table; determining, via the compiler, a triggering condition for each load expression in the remote load table based on the memory load latency data associated with each load expression and a threshold latency for each load expression; performing a second compiling operation in which the compiler inserts code into the intermediate representation to monitor for the triggering conditions; and generating a second pass multi-threaded executable binary that is thread-data affinity optimized based on the triggering condition determined for each load expression from the compiled instrumented intermediate representation, wherein the intermediate representation performs data migration when the triggering conditions are met.