Patent ID: 6277727
Filing Date: 2001-08-21
Classification: H01L

Abstract:
Method of forming a landing pad on a semiconductor wafer, the semiconductor wafer comprising a silicon substrate, a dielectric layer on the silicon substrate, a passivation layer on the dielectric layer and a photo-resist layer on the passivation layer, the photo-resist layer comprising a hole penetrating to the surface of the passivation layer which defines the position of the land pad, the method comprising:performing a first anisotropic etching process through the hole to vertically remove the passivation layer and a predetermined thickness of the dielectric layer under the hole to form a recess;performing a photo-resist stripping process to remove the photo-resist layer on the semiconductor wafer;performing a deposition process to form a filling layer on the surface of the passivation layer and the recess;performing an etch-back process to remove the filling layer on the bottom portion of the recess and partially remove the filling layer on the surrounding portion of the recess which forms a circular spacer on the surrounding portion of the recess;performing a second anisotropic etching process to vertically remove the dielectric layer under the recess and down to the surface of the silicon substrate which forms a plug hole, over which the spacer surrounding the recess is used as a hard mask during the second anisotropic etching process; anddepositing a conductive layer in the recess and the plug hole to completely fill the recess and the plug hole which forms the landing pad.