Patent ID: 6519843
Filing Date: 2003-02-18
Classification: H01L,H05K,Y10T

Abstract:
In a method of forming a chip carrier in which a substantially planar, circuitized laminate layer and a corresponding stiffener are joined to each other, and in which the laminate layer has an aperture defined therein which exposes a corresponding mounting area on the stiffener, the aperture and the mounting area defining a cavity in the chip carrier, the improvement comprising the steps of:applying a joining layer of adhesive material to at least one of the laminate layer and the stiffener; exposing the adhesive material to radiation, excluding an area of the material having a size substantially similar to that of said aperture, the unexposed adhesive material being susceptible to removal from the joining layer; laminating the laminate layer to the stiffener with the joining layer interposed therebetween; and developing the cavity to remove the adhesive material therefrom to reveal the surface of the mounting area and render the mounting area substantially free of the adhesive material.