Patent ID: 6545338
Filing Date: 2003-04-08
Classification: H01L

Abstract:
A semiconductor device with CMOS circuitry and RF circuitry fabricated over a substrate comprising:a lower metallization layer, a lower dielectric layer disposed over the lower metallization layer; a metallization line disposed over the lower dielectric layer; an upper dielectric layer disposed over the metallization line; an upper metallization layer disposed over the upper dielectric layer; oxide spacers disposed along sides of the lower and upper dielectric layers and the metallization line; an encapsulating metallization layer surrounding the oxide spacers such that the lower metallization layer, the upper metallization layer and the encapsulating metallization layer define an outer shield of an RF line and the metallization line defines an inner conductor of the RF line; and a conductive via defined through the outer shield and electrically isolated from the outer shield.