Patent ID: 6867718
Filing Date: 2005-03-15
Classification: H03M

Abstract:
1. A method of correction of an error in an output digital signal of an analog/digital converter (ADC), in which the error is introduced by a multibit digital/analog converter (DAC) incorporated in the ADC, comprising: providing a scrambling scheme of input signals to the DAC, the scrambling scheme defining a scrambling of the input signals as a function of values of a group of variables, to produce scrambled input signals; extrapolating from the scrambling scheme parameters defining a transformation operated by the scrambling scheme on the input signals to obtain the scrambled input signals; assigning to the variables values substantially uncorrelated to each other; on the basis of the parameters, of the substantially uncorrelated values and of the scrambled signals, calculating coefficients of a linear combination of vectors of a vector space, the linear combination of vectors corresponding to a vector of the vector space representative of the error introduced by the multibit DAC; calculating a correlation of a signal containing the error introduced by the multibit DAC with each coefficient of the linear combination of vectors, to extract an estimation of each of the vectors; on the basis of the coefficients and of the estimations of the vectors, calculating a linear combination representative of an estimation of the error introduced by the multibit DAC; and using the estimation of the error introduced by the multibit DAC to correct the output signal of the ADC.