Patent ID: 6573758
Filing Date: 2003-06-03
Classification: H03K

Abstract:
Circuitry for a digital logic function comprising:a first pair of input nodes for receiving respective first and second input signals; a second pair of input nodes for receiving respective complements of the first and second input signals; an output node; and a plurality of PFET-NFET pass gates, such a pass gate having a first conducting electrode of the pass gate PFET connected to a first conducting electrode of the pass gate NFET, providing a first conducting node of the pass gate, and a second conducting electrode of the pass gate PFET connected to a second conducting electrode of the pass gate NFET, providing a second conducting node of the pass gate, wherein the input nodes are connected to first conducting nodes of respective ones of the plurality of pass gates, and the second conducting nodes of the plurality of pass gates are connected to the circuitry output node, wherein the input nodes are connected to gates of PFET's of respective ones of the plurality of pass gates and gates of NFET's of other respective ones of the plurality of pass gates.