Patent ID: 8211757
Filing Date: 2012-07-03
Classification: H01L,Y10S

Abstract:
1. A method of fabricating a thin film transistor substrate, comprising: forming a gate line and a gate electrode connected to the gate line on a substrate; forming a bank insulating layer to cover a portion of the gate electrode, the bank insulating layer having a dot hole to expose a remaining portion of the gate electrode and a line hole connected to the dot hole; forming an gate insulating layer in the dot hole to cover the remaining portion of the gate electrode within the bank insulating layer; forming on the bank insulating layer a data line intersecting with the gate line, a source electrode connected to the data line, a drain electrode facing the source electrode, and a pixel electrode connected to the drain electrode; forming an semiconductor layer forming a channel between the source and drain electrodes within the bank insulating layer; and forming a passivation layer to cover the semiconductor layer within the bank insulating layer.