Patent ID: 9104589
Filing Date: 2015-08-11
Classification: H03M

Abstract:
1. A process of decoding a received vector r encoded in accordance with a forward error correction code, wherein said received vector r comprises a first section of k probabilities and a second section of n−k probabilities, wherein said forward error correction code corresponds to an n−k row by n column parity check matrix H, wherein said matrix H comprises a first region of k columns and a second region of n−k columns, wherein all ones of said matrix H in said first region are in a first pattern having a first pattern characteristic and all ones of said matrix H in said second region are in a second pattern having a second pattern characteristic that is different than said first pattern characteristic, said process comprising: permuting by an electronic processor circuit in accordance with a permutation function one of said first section or said second section of said received vector r to produce a permuted received vector πr, wherein application of said permutation function to a corresponding one of said first region or said second region of said matrix H produces a permuted parity check matrix H comprising one of said first region or said second region of said parity check matrix H and a permuted version of the other of said second region or said first region of said parity check matrix H such that all ones in both regions of said permuted parity check matrix πH are in a pattern having either said first pattern characteristic or said second pattern characteristic; and decoding by said electronic processor circuit said permuted received vector πr in accordance with said permuted parity check matrix πH.