Patent ID: 6828197
Filing Date: 2004-12-07
Classification: H01L

Abstract:
A method of fabricating a nitride read only memory, comprising the steps of:providing a semiconductor substrate, comprising a memory region and a peripheral circuit region therein; growing a pad oxide on the semiconductor substrate; forming a plurality of parallel buried diffusion regions as bit lines in the memory region; forming a first shallow trench and a second shallow trench in the peripheral circuit region; conformally forming an ONO film on the semiconductor substrate; depositing a polysilicon layer on the ONO film to fill the first shallow trenches and the second shallow trench; selectively etching the polysilicon layer in the memory region to define a plurality of polysilicon structures as word lines having gaps therein, and removing the polysilicon from the first shallow trenches and leaving the polysilicon layer in the second shallow trench in the peripheral circuit region; and forming an insulator in the first shallow trenches and the gaps between the word lines.