Patent ID: 6694208
Filing Date: 2004-02-17
Classification: G01R

Abstract:
A method of finding the yield loss contribution of a failure mode for improving yield rate in a semiconductor manufacturing process, comprising:providing a predetermined number of wafers, each wafer including a plurality of chips, each chip including a plurality of regions, and each region including a plurality of cells; performing a plurality of tests on said plurality of cells, each test corresponding to a failure mode; assigning a region as having a particular failure mode if any cell within said region has said particular failure mode; for each wafer, calculating the number of defective regions for each of said plurality of failure modes; for each wafer, determining a main failure mode that corresponds to the greatest number of defective regions; calculating a yield loss for each wafer; for each failure mode, selecting a set of wafers having said failure mode as the main failure mode, calculating the sum of the yield loss of said set of wafers, and determining the yield loss contribution of said each failure mode by dividing the sum of the yield loss by said predetermined number.