Patent ID: 8686386
Filing Date: 2014-04-01
Classification: H01L

Abstract:
1. A nonvolatile memory element, comprising: a first layer operable as an electrode; a second layer operable as an electrode; a third layer operable as a variable resistance layer disposed between the first layer and the second layer, the third layer comprising a metal oxide; a fourth layer operable as a current limiting layer disposed between the third layer and the first layer, wherein the fourth layer is a varistor layer; and a fifth layer operable as a separation layer comprising an oxygen deficient material disposed between the fourth layer and the third layer; a sixth layer; and a seventh layer; wherein the fourth layer is disposed between the sixth layer and the seventh layer; wherein the sixth layer and the seventh layer each comprise a material selected from the group of indium tin oxide and iridium oxide; and wherein the material selected for the sixth layer and the material selected for the seventh layer are not the same.