Patent ID: 6487259
Filing Date: 2002-11-26
Classification: H04L

Abstract:
A partially-parallel trellis decoder for decoding a received digital signal comprising:an s-state trellis decoder, where s is an integer greater than or equal to 3, for receiving the received digital signal and computing state information sets and state metrics for state transitions from a time t=(nâˆ’1)T to a time t=nT; a primary adaptive channel estimator, coupled to the s-state trellis decoder, for updating a primary channel estimate using a first state information set and the received digital signal and for processing the first state information set according to the primary channel estimate; and a secondary adaptive channel estimator, coupled to the s-state trellis decoder, for updating a secondary channel estimate using a second state information set and the received digital signal and for processing the second state information set according to the secondary channel estimate, wherein a remaining state information set is processed by the primary adaptive channel estimator according to the primary channel estimate.