Patent ID: 8956964
Filing Date: 2015-02-17
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, comprising: providing a semiconductor substrate; forming a fin on the semiconductor substrate, a dummy gate across the fin, and sidewall spacers across the fin on both sides of the dummy gate; forming a source and a drain by an ion implantation in the semiconductor substrate and in the fin that are on both sides of the sidewall spacers; forming a dummy contact across the fin and on each of the both sides of the sidewall spacers, after forming the source and the drain; forming an interlayer dielectric layer on the semiconductor substrate, after forming the dummy contact; exposing the dummy gate and the dummy contact in a same polishing process of the interlayer dielectric layer; removing the dummy gate to form a metal gate across the fin; removing the dummy contact to form a contact trench, wherein the dummy contact is made of a material having an etch selectivity sufficiently higher than the fin such that the removing of the dummy contact generates substantially no damage to the fin; and filling a conductive material in the contact trench to form a trench metal contact, wherein the trench metal contact is formed across the fin, connecting to the source or the drain, and on each of the both sides of the sidewall spacers.