Patent ID: 6373738
Filing Date: 2002-04-16
Classification: G11C

Abstract:
A content addressable memory (CAM) device comprising:an entry including: a plurality of CAM cells each coupled to a Match Line Pass-Gate having a plurality of legs; a Match Line having a Match Line Voltage, and being coupled to the Match Line Pass-Gate, such that when any leg of the Match Line Pass-Gate is conducting the Match Line is coupled to a Low voltage level; a Match-Detection Circuit including a Field Effect Transistor coupled to the Match Line and adapted to detect a MATCH-ing entry; wherein the MATCH-ing entry is characterized by the rise of the Match Line Voltage from a Low voltage level to a Match-Detection voltage within a Match-Detection Period; and wherein a MISS-ing entry is characterized by one or more legs of the Match Line Pass-Gate being conducting during the Match-Detection Period.