Patent ID: 7411532
Filing Date: 2008-08-12
Classification: H03M

Abstract:
1. A method for determining a minimization factor for use in improving linearity of an analog-to-digital converter apparatus; said apparatus including a plurality of components; the method comprising the steps of: (a) effecting an evaluation of integral non-linearity response of said apparatus; said evaluation identifying respective significant departures of said response; each said respective significant departure having an amplitude greater than a predetermined amplitude; said evaluation relating each respective said significant departure with a respective identified component of said plurality of components; (b) determining magnitude of each of said respective significant departures; (c) identifying a trimming factor related with each said respective component; (d) determining a residual gap magnitude for each said respective significant departure; said residual gap magnitude for each said respective significant departure comprising said magnitude of said respective significant departure less said trimming factor related with each respective said identified component; and (e) determining said minimization factor for said apparatus; said minimization factor comprising a sum of said residual gap magnitudes for a selected plurality of said respective identified components.