Patent ID: 7823045
Filing Date: 2010-10-26
Classification: G11B,G11C

Abstract:
1. An error correction device comprising: a decoding unit, coupled to a main memory, for reading a data from the main memory and performing an error detection on the data to generate a plurality of error values and a plurality of error addresses corresponding to the error values; an error buffer, coupled to the decoding unit, for temporarily storing the error values and the error addresses; an error classifying unit, coupled to the error buffer, for classifying the error addresses stored in the error buffer into a plurality of subclasses, wherein error values and error addresses which correspond to a same row of the main memory are classified into a same subclass; and an error correction unit, coupled to the error classifying unit and the main memory, for performing an error correction on the data stored in the main memory according to the plurality of subclasses.