Patent ID: 6724039
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A semiconductor device, comprising:a semiconductor substrate having a first conductivity; a first doped region in the substrate and having the first conductivity; a recess disposed in the first region and having a sidewall and a bottom; a gate insulator disposed on the substrate and extending to the sidewall of the recess; a gate electrode disposed on the gate insulator; a body region disposed in a second region beneath the gate electrode, the body region having a second conductivity and being contiguous with the sidewall, the body region being deeper than the recess, and being self-aligned to the bottom of the recess, self-aligned to the gate electrode at its outer perimeter, self-aligned to the sidewall of the recess at its inner perimeter, such that the body region is assured of being generally symmetrical on all sidewalls and to the bottom of the recess and present at the bottom corners of the recess; a source region disposed in the body region, having the first conductivity, and being contiguous with the sidewall; a Schottky contact disposed on the bottom of the recess; and a source metallization disposed on the Schottky contact and the sidewall of the recess.