Patent ID: 6678862
Filing Date: 2004-01-13
Classification: G11B,H03M

Abstract:
A partial response maximum likelihood bit detection apparatus for deriving a bit sequence ({circumflex over (x)}k) from an input information signal, comprisingan input for receiving the input information signal, sampling means for sampling, at a predetermined sampling frequency, the input information signal at sampling instants ti so as to obtain sample values (zk) of the input information signal at said sampling instants ti, said sampling frequency having a relationship with a bit frequency, calculating means for (a) calculating at a sampling instant ti for one or more of a plurality of states sj (Sa, Sb, Sc) at said sampling instant, an optimum path metric value PM(sj,ti) and for determining for said one or more states a best predecessor state at the directly preceding sampling instant tiâˆ’1, a state at said sampling instant identifying a sequence of n subsequent bits, (b) establishing the best path from the state at the said sampling instant ti having the lowest optimum path metric value, back in time towards the sampling instant tiâˆ’N via best predecessor states, established earlier for earlier sampling instants, to establish an optimum state at said sampling instant tiâˆ’N, (c) outputting at least one bit (xkâˆ’MBâˆ’1) of said n bits of the sequence of bits corresponding to said established optimum state at said sampling instant tiâˆ’N, (d) repeating said steps (a) to (c) for a subsequent sampling instant ti+1, characterized in that mutually complementary sequences of n subsequent bits are allocated to the same state.