Patent ID: 8460991
Filing Date: 2013-06-11
Classification: H01L

Abstract:
1. A method of forming a complementary metal-oxide-semiconductor static random access memory (SRAM) cell, the method comprising: forming a plurality of N-channel multi-gate transistors, including a pair of pull-down devices and a pair of access transistors, and a plurality of P-channel multi-gate transistors including a pair of pull-up devices, each comprising a gate electrode and source and drain regions separated by the at least one gate electrode; forming a plurality of contacts formed within the source and drain regions of at least one transistor; and selectively recessing the plurality of contacts, for only the pair of access transistors, a predetermined recess amount, wherein a resistance of the access transistors increases based upon the predetermined recess amount so as to increase a drive current of the access transistors and thereby decrease a beta ratio of the SRAM cell in comparison to that of an SRAM cell without recessed contacts.