Patent ID: 9035683
Filing Date: 2015-05-19
Classification: H03L

Abstract:
1. A circuit for controlling a variation in a frequency of a clock signal, comprising: a phase detector for providing a phase difference signal between a reference clock signal and a feedback clock signal in response to a frequency control signal; an oscillation controller for providing a control voltage corresponding to the phase difference signal; a Voltage-Controlled Oscillator (VCO) for providing an oscillation signal having a frequency corresponding to the control voltage; a clock output circuit for providing the feedback clock signal using the oscillation signal and generating a mask signal comprising information about a phase of the feedback clock signal; and a frequency controller for providing the frequency control signal that is activated if a variation in a frequency of the reference clock signal is determined to be out of a set range in a state in which phases of the reference clock signal and the feedback clock signal have been locked, maintaining the activation of the frequency control signal during a predetermined fixed time and a comparison time after the fixed time, and maintaining the comparison time up to a time at which the phase of the reference clock signal is determined to have approached the phase of the feedback clock signal based on the mask signal, wherein the phase difference detector regularly maintains the frequency of the feedback clock signal generated from the clock output circuit by controlling the phase difference signal while the frequency control signal is activated.