Patent ID: 7694253
Filing Date: 2010-04-06
Classification: G06F,G11C

Abstract:
1. A computer-implemented method for automatically generating a deterministic input sequence for a circuit design using mutant-based verification, comprising: electronically receiving a description of the circuit design; electronically determining, using a computer, a target value for a control signal in the description; electronically determining a mutant value for the control signal; electronically determining if an input sequence for the circuit design exists that stimulates the control signal to the target value and causes the effects of the target value and the effects of the mutant value to reach an observation point in the circuit design such that the effects of the target value and the effects of the mutant value differ at the observation point, by: if so, electronically simulating operation of the circuit design using the input sequence; and during simulation, electronically generating a first set of signal values affected by the target value for the control signal and a second set of signal values affected by the mutant value for the control signal.