Patent ID: 8514129
Filing Date: 2013-08-20
Classification: G01S

Abstract:
1. An apparatus comprising: a sampler configured to sample a signal, wherein the signal is modulated with a periodic waveform having a plurality of periods, wherein the sampler samples the signal K times during each of the plurality of periods to provide K samples for each of the plurality of periods, wherein each of the K samples of the plurality of periods includes N bits, and where K is an integer greater than 0 and N is an integer greater than 1; a first memory bank having M columns and K rows, wherein each of the M columns includes N bits, and where M is an integer greater than 0; a write controller configured to write the K samples of the plurality of periods to the first memory bank in column order, wherein each of the M columns stores the K samples for a respective one of the plurality of periods; a read controller configured to read the K samples of the plurality of periods from the first memory bank in row order; and an integrator configured to integrate samples read from each of the K rows on a row-by-row basis to provide an integration result for each of the K rows, wherein each of the integration results is a result of integrating samples read from a corresponding row of the first memory bank.