Patent ID: 6282199
Filing Date: 2001-08-28
Classification: H04L,H04Q

Abstract:
An asynchronous transfer mode (ATM) switch system for generating a divided clock pulse to be used in converting ATM cells of unit of a first predetermined data length into data of unit of a second predetermined data length, the system comprising:means for generating a clock pulse and a plurality of cell synchronization signals with different phases;means for issuing a selection control signal and a reset signal based on the clock pulse and the cell synchronization signals;means, in response to the selection control signal, for selecting one of the cell synchronization signals;means for generating an initialization control signal based on the selected one cell synchronization signal and the reset signal; andmeans, in response to the initialization control signal, for dividing the clock pulse by M based on a previous divided clock pulse, M being a positive integer larger than 1, to thereby generate the divided clock pulse.