Patent ID: 6772321
Filing Date: 2004-08-03
Classification: G06F

Abstract:
A method for prefetching from memory by using an assist processor that performs data speculation and executes in advance of a primary processor, comprising:executing executable code on the primary processor; simultaneously executing a reduced version of the executable code on the assist processor, so that the assist processor generates the same pattern of memory references that the primary processor generates in advance of when the primary processor generates the memory references; wherein executing the reduced version of the executable code involves, selecting loads to predict based upon: how far the assist processor is ahead of the primary processor, predictability of the data value returned by the long latency operation, and a likelihood of a cache miss while performing the long latency operation; predicting a data value returned by a long latency operation within the executable code; using the predicted data value to continue executing the reduced version of the executable code without having to wait for the long latency operation to complete; and storing results of memory references generated by the assist processor into a store that is shared with the primary processor so that the primary processor is able to access the results of the memory references.