Patent ID: 7713764
Filing Date: 2010-05-11
Classification: G01R,H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: preparing two package substrates having a first surface and a second surface and having a plurality of first land pads, second land pads and a second testing-dedicated pad, said first land pads being disposed in said first surface, said second land pads being disposed in said second surface and arranged with an inter-pad distance that is larger than an inter-pad distance for said first land pad, and said second testing-dedicated pad being disposed in said second surface; electrically coupling a semiconductor wafer with a measuring apparatus, and inspecting said semiconductor wafer with a probe card, said semiconductor wafer having a large scale integrated circuit (LSI), which is an object of an inspection, said measuring apparatus being capable of applying electrical signal to the LSI formed in said semiconductor wafer, and capable of measuring electrical characteristics of said LSI formed in said semiconductor wafer, and said probe card having one of said prepared two package substrates; dicing said semiconductor wafer into semiconductor elements containing said LSI; and packaging said semiconductor element over the other of said prepared two package substrates, wherein said probe card includes said one of the package substrates, external coupling terminals provided in said second land pads and said second testing-dedicated pads of said one package substrate and electrically coupled to said measuring apparatus, and probes, being electrically coupled to said plurality of first land pads included in said one package substrate and being in contact with the lands formed in said semiconductor wafer, wherein said inspecting the semiconductor wafer includes: electrically coupling said plurality of first land pads to said lands provided in said semiconductor wafer by causing said probes of said probe card into contact with the lands provided in said semiconductor wafer; and applying electrical signal from said measuring apparatus to said semiconductor wafer to measure electrical characteristics of said semiconductor wafer, and wherein said packaging the semiconductor element includes installing said semiconductor element over said first surface of said other package substrate and providing electrical coupling of said semiconductor element with the first land pad of said other package substrate; and forming an external coupling terminal over said second land pad of the other one of said package substrates, without forming an external coupling terminal over said second testing-dedicated pad of the other one of said package substrates.