Patent ID: 7052955
Filing Date: 2006-05-30
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: providing a semiconductor base; forming source and drain regions in a surface of the semiconductor base; forming an insulating layer having a contact hole over the surface of the semiconductor base, wherein the contact hole is aligned over the source region or the drain region; forming a first silicon layer over the insulating layer such that the first silicon layer entirely fills the contact hole; forming a second silicon layer on the first silicon layer, wherein a concentration of conductive impurities in the second silicon layer is higher than a concentration of conductive impurities in the first silicon layer; and patterning the first and second silicon layers in a same patterning process, wherein edges of the patterned first silicon layer that extend in a first direction are substantially aligned with edges of the patterned second silicon layer that extend in the first direction, wherein the first direction is substantially perpendicular to a channel direction that extends from the source region to the drain region.