Patent ID: 6098162
Filing Date: 2000-08-01
Classification: G06F

Abstract:
A pipelined vector register computer, comprising:a first vector register for holding a plurality of words, a portion of which are to be moved;a second vector register for receiving the portion of words to be moved;a location register for specifying a location within the first vector register where the portion of words to be moved begins;a counter for specifying the number of words in the portion of words to be moved;a vector shift functional unit; andcontrol means, connected to the first vector register, the second vector register, the location register, the counter and the vector shift functional unit, for sequentially transferring the portion of words to the vector shift functional unit;wherein the vector shift functional unit operates to sequentially receive words from the first vector register, to discard those words received from the first vector register which are not within the portion of words to be moved and to move words which are not discarded to sequential locations in the second vector register beginning at a fixed first location.