Patent ID: 6391691
Filing Date: 2002-05-21
Classification: H01L

Abstract:
A method of fabricating a thin film transistor comprising the steps of:forming a semiconductor oxide layer on a substrate; forming substantially oxygen-free metal source and drain electrodes on said semiconductor oxide layer; forming a first semiconductor layer containing impurities on said semiconductor oxide layer and said source and drain electrodes, and diffusing a first portion of said impurities contained in said first semiconductor layer into said semiconductor oxide layer and said source and drain electrodes; selectively etching said first semiconductor layer and a region of said semiconductor oxide layer containing some of said impurities; forming a second semiconductor layer on said source and drain electrodes and said semiconductor oxide layer, and diffusing a second portion of said impurities contained in said source and drain electrodes into said second semiconductor layer; forming an insulating film for a gate dielectric on said second semiconductor layer; forming a conductive layer for a gate electrode on said gate dielectric; and etching said conductive layer to form said gate electrode, said gate dielectric and said second semiconductor layer into a desired pattern, thereby the gate electrode, the gate dielectric and a semiconductor layer being formed.