Patent ID: 6387732
Filing Date: 2002-05-14
Classification: H01L

Abstract:
A method for packaging an integrated circuit including a semiconductor chip and a leadframe, the semiconductor chip having an active surface with lateral boundaries, and having bond pads on the active surface, the leadframe comprising leads having inner ends and outer ends, the method comprising: depositing an adhesive on the active surface of the semiconductor chip to define a patternedadhesive layer on a portion of the active surface and at least one adhesive-free area proximate the bond pads; aligning the inner ends of the leads proximate to the at least one adhesive-free area and adhering the leads to the adhesive layer; attaching bond wires between the bond pads and the inner ends of the leads; forming a cap having outer boundaries that are substantially coextensive with outer, lateral boundaries of the semiconductor chip; shaping portions of the outer ends of at least some of the leads to receive and hold the cap between the outer ends of the leads and over the active surface of the semiconductor chip; and orienting at least a portion of the outer ends of the leads in a direction substantially transverse to the active surface of the semiconductor chip.