Patent ID: 7391233
Filing Date: 2008-06-24
Classification: G06F,H03K,Y02D

Abstract:
1. An apparatus for selectively extending lifetime reliability of digital logic devices, comprising: complementary metal oxide semiconductor (CMOS) circuitry configured between a logic high supply rail and a logic low supply rail; a first switching device coupled between one of the logic high supply rail and the logic low supply rail and a virtual supply rail coupled to the CMOS circuitry, wherein, in a first mode of operation the first switching device is rendered conductive so as to supply the full voltage value between the logic high supply rail and the logic low supply rail to the CMOS circuitry, and wherein, in a second mode of operation, the first switching device is rendered nonconductive so as to isolate the virtual supply rail from the one of the logic high supply rail the logic low supply rail, thereby reducing the value of the voltage supplied to the CMOS circuitry to a value between the logic high supply rail and the logic low supply rail; and a second switching device coupled between the virtual supply rail and the other of the logic high supply rail and the logic low supply rail, wherein, in a third mode of operation, the second switching device is rendered conductive so as to equalize the voltage on the virtual supply rail and the other of the logic high supply rail and the logic low supply rail.