Patent ID: 7839463
Filing Date: 2010-11-23
Classification: G02F

Abstract:
1. A thin film diode array panel comprising: an insulating substrate; first and second redundant gate lines made of an opaque conductor and formed on the insulating substrate; first and second floating electrodes made of an opaque conductor, formed on the insulating substrate, and disposed between the first and second redundant gate lines; an insulating layer formed on the first and second floating electrodes; a first gate line formed at least partially directly on the first redundant gate line and including a first input electrode overlapping the first floating electrode wherein the insulating layer is interposed between the first input electrode and the first floating electrode, and further wherein the insulating layer entirely covers lateral surfaces of the first floating electrode; a second gate line formed at least partially directly on the second redundant gate line and including a second input electrode overlapping the second floating electrode wherein the insulating layer is interposed between the second input electrode and the second floating electrode and further wherein the insulating layer entirely covers lateral surfaces of the second floating electrode; and a pixel electrode including a first contact electrode overlapping the first floating electrode where the insulating layer is interposed between the first contact electrode and the first floating electrode, a second contact electrode overlapping the second floating electrode where the insulating layer is interposed between the second contact electrode and the second floating electrode, and a main body.