Patent ID: 6906551
Filing Date: 2005-06-14
Classification: H01L,H03K

Abstract:
1. A semiconductor integrated circuit device comprising: a first circuit including an MIS transistor formed on a semiconductor substrate; a second circuit including an MIS transistor formed on said semiconductor substrate which outputs an oscillation signal; a substrate bias control circuit which controls a substrate bias supplied to a well of said MIS transistor of said first circuit and a well of said MIS transistor of said second circuit; and a buffer circuit, wherein, said substrate bias control circuit receives a reference clock and controls a value of said substrate bias so that a frequency of said reference clock coincides with a frequency of said oscillation signal output from said second circuit, and a substrate bias controlled by said substrate bias control circuit is supplied to said well of said MIS transistor of said first circuit via said buffer circuit, wherein a substrate bias is supplied to said well of said MIS transistor of said second circuit without being via said buffer circuit.