Patent ID: 6317816
Filing Date: 2001-11-13
Classification: G06F,Y10S

Abstract:
A method of allocating memory storage space in a computer system having a plurality of processors and a plurality of caches, each cache being associated with a respective processor, said plurality of caches each comprising a plurality of cache lines of a fixed size, the method comprising the steps of:defining a common memory storage space for allocation of objects created by a plurality of concurrently executing tasks;allocating memory space to a first object created by a first task of said plurality of concurrently executing tasks, wherein said memory space allocated to said first object includes a first portion of a first memory address range, said first memory address range being the size of a single cache line and having boundaries defined by a single cache line;rendering a second portion of said first memory address range unavailable for allocation to any object created by a task other than said first task, said second portion being that part of said first memory address range not allocated to said first object; andallocating at least a portion of said second portion of said first memory address range to a second object created by said first task.