Patent ID: 7830707
Filing Date: 2010-11-09
Classification: G11C

Abstract:
1. A method of reading a dual-bit memory cell, the dual-bit memory cell comprising a controlling terminal, a first terminal and a second terminal, the dual-bit memory cell comprising a first bit storage node and a second bit storage node adjacent to the first terminal and the second terminal respectively, the method comprising: (a) applying a controlling voltage and a read voltage to the controlling terminal and the first terminal respectively, grounding the second terminal so as to measure a first output current value of the first terminal; (b) applying the controlling voltage and the read voltage to the controlling terminal and the second terminal respectively, grounding the first terminal so as to measure a second output current value of the second terminal; and (c) directly comparing the first output current value to the second output current value and determining the bit states of the first bit storage node and the second bit storage node according to whether the first output current value is greater than, less than, or substantially equal to the second output current value.