Patent ID: 6720817
Filing Date: 2004-04-13
Classification: G06G,H03G,H03H

Abstract:
A log-domain integrator comprising:a positive compressed input voltage and a negative compressed input voltage; a positive compressed output voltage and a negative compressed output voltage; a ground and a reference voltage; a first capacitor and a second capacitor; a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor; a first current source, a second current source, a third current source, a fourth current source, a fifth current source, a sixth current source, a seventh current source, an eighth current source, a ninth current source, a tenth current source, an eleventh current source, a twelfth current source; wherein said first capacitor is connected between the negative compressed output voltage and the ground and said second capacitor is connected between the positive compressed output voltage and the ground; wherein an output of said first current source is connected to a collector of said first transistor, a base of said second transistor, a base of said fifth transistor and a base of said first transistor; wherein an output of said third current source is connected to a collector of said third transistor, a base of said fourth transistor and a base of said third transistor; wherein an output of said fifth current source is connected to a collector of said fourth transistor, a base of said eleventh transistor and a base of said twelfth transistor; wherein an output of said seventh current source is connected to a collector of said seventh transistor, a base of said fourteenth transistor and a base of said thirteenth transistor; wherein an output of said eleventh current source is connected to a collector of said tenth transistor, a base of said tenth transistor, a base of said sixth transistor and a base of said ninth transistor; wherein an output of said ninth current source is connected to a collector of said eighth transistor, a base of said seventh collector and a base of said eight collector; wherein an input of said second current source is connected to said positive compressed input voltage and an emitter of said first transistor; wherein an input of said twelfth current source is connected to said negative compressed input voltage and an emitter of said tenth transistor; wherein an input of said fourth current source is connected to an emitter of said third transistor, a collector of said eleventh transistor, an input of said second capacitor, said positive compressed output voltage is connected to an emitter of said second transistor; wherein an input of said tenth current source is connected to an emitter of said eighth transistor, a collector of said fourteenth transistor, an input of said first capacitor, said negative compressed output voltage is connected to an emitter of said ninth transistor; wherein an input of said sixth current source is connected to an emitter of said fourth transistor, a collector of said twelfth transistor and an emitter of said sixth transistor; wherein an input of said eighth current source is connected to an emitter of said seventh transistor, a collector of said thirteenth transistor and an emitter of said fifth transistor; wherein said ground is connected to an output of said second current source, an emitter of said eleventh transistor, an emitter of said twelfth transistor, an emitter of said thirteenth transistor, an emitter of said fourteenth transistor, an output of said fourth current source, an output of said sixth current source, an output of said eighth current source, an output of said tenth current source, an output of said twelfth current source; and wherein said reference voltage is connected to an input of said first current source, an input of said third current source, an input of said fifth current source, an input of said seventh current source, an input of said ninth current source, an input of said eleventh current source, a collector of said second transistor, a collector of said fifth transistor, a collector of said sixth transistor and a collector of said ninth transistor.