Patent ID: 6291297
Filing Date: 2001-09-18
Classification: G11C,H01L

Abstract:
In a process of fabricating a semiconductor device having a floating gate, a control gate and a select gate, the steps of: forming an oxide layer in an active area on a silicon substrate; forming a first silicon layer on the oxide layer; forming a dielectric film on the first silicon layer; forming a second silicon layer on the dielectric film; etching away a portion of the second silicon layer to form a control gate; using the control gate as a mask, anisotropically etching away portions of the dielectric film and the first silicon layer to form a floating gate beneath the control gate; forming a third silicon layer over the substrate and the control gate with a step in the third silicon layer beside and above the control gate; and anisotropically etching the third silicon layer to form a select gate beside the control gate.