Patent ID: 7723816
Filing Date: 2010-05-25
Classification: H01L

Abstract:
1. A structure for implementing decoupling capacitors with hot spot thermal reduction on integrated circuit chips including silicon-on-insulator (SOI) circuits comprising: a silicon-on-insulator (SOI) structure, said SOI structure including a silicon substrate layer, a thin buried oxide (BOX) layer carried by the silicon substrate layer, and an active layer carried by the thin BOX layer; a thermal conductive path proximate to a hotspot area in the active layer to reduce thermal effects including a backside thermal connection from a backside of the SOI structure; said backside thermal connection including a backside etched opening extending from the backside of the SOI structure into the silicon substrate layer, a capacitor dielectric formed on said backside etched opening; and a thermal connection material deposited on said capacitor dielectric filling said backside etched opening.