Patent ID: 7023027
Filing Date: 2006-04-04
Classification: H01L

Abstract:
1. A diode package having an anode and a cathode, comprising: a semiconductor chip which is tapered on the side surfaces thereof and has two electrodes in the form of an anode and a cathode, which are arranged in spaced relationship on one surface of the chip, so that an electric current flows across the two electrodes along said one surface of the chip; bump electrodes formed on the two electrodes so as to connect the electrodes to an external substrate; and an insulating resin applied onto said one surface of the chip where the anode and the cathode are formed and onto surrounding side surfaces of the chip, wherein in the insulating resin is formed from grooves, which have a V-shaped opening portion which opens on said one surface of the chip and which overlies a portion having sides parallel to side surfaces of the chip, said grooves being formed between a plurality of the semiconductor chips on a semiconductor wafer before dicing the wafer into individual chips, wherein: