Patent ID: 7395347
Filing Date: 2008-07-01
Classification: H04L

Abstract:
1. An interconnection controller, comprising: an intra-cluster interface configured for coupling with intra-cluster links to a plurality of local processors arranged in a point-to-point architecture in a local cluster; an inter-cluster interface configured for coupling with an inter-cluster link to a non-local interconnection controller in a non-local cluster; a transceiver configured to receive an intra-cluster packet from the local processors via the intra-cluster links of the coherent interface and encapsulate the intra-cluster packet as a high-speed link packet by adding a sequence identifier and a packet type identifier to the intra-cluster packet; and a serializer/deserializer configured to serialize the high-speed link packet and forward the serialized high-speed link packet to the inter-cluster interface for transmission to the non-local interconnection controller via an inter-cluster link; wherein the interconnection controller is configured to compute a cyclic redundancy code value based only on the high-speed link packet; and wherein the serializer/deserializer is further configured to encode the cyclic redundancy code value in the high-speed link packet.