Patent ID: 6265784
Filing Date: 2001-07-24
Classification: H01L

Abstract:
A resin sealed semiconductor device comprising:a wiring substrate made of an organic resin;an LSI chip constituted by a semiconductor integrated circuit and mounted in a bare chip package form on said wiring substrate by a plurality of electrical bonding members; anda resin charged into a gap portion between said organic resin wiring substrate and said LSI chip;wherein a modulus of longitudinal elasticity E (MPa) of said resin charged is within the range of 3,430 .ltoreq.E.ltoreq.16,000, and its coefficient of linear thermal expansion .alpha. (ppm/.degree. C.) satisfies the following expression (1):Expression (1):.alpha..sub.1 (E).ltoreq..alpha.(E).ltoreq..alpha..sub.2 (E) (1)where:Expression (2):.alpha..sub.1 (E)=6.24.times.10.sup.-8 E.sup.2 -1.38.times.10.sup.-3 E+26.8 (2)Expression (3):.alpha..sub.2 (E)=2.28.times.10.sup.-7 E.sup.2 -5.69.times.10.sup.-3 E+93.6 (3)Expression (4):3,430.ltoreq.E.ltoreq.16,000 (4).alpha.: coefficient of linear thermal expansion of said resin (ppm/.degree. C.), andE: modulus of longitudinal elasticity of said resin (MPa).