Patent ID: 6605951
Filing Date: 2003-08-12
Classification: G01R

Abstract:
A method of performing at least one of testing or failure analysis on a die having a front side and a back side and an integrated circuit and at least one bond pad connected to the front side of the die, by using an interconnector; the interconnector comprising a piece of electrically insulating material, an electrically conductive bump contact extending from one side of the insulating material, a probe pad connected to the insulating material and extending from the one side of the insulating material at a spaced apart location from the bump contact, and an electrical connector extending between the bump contact and the probe pad; said method comprising:positioning the front side of the die for optical observation with a microscope; observing the front side of the die through the microscope; electrically contacting the bump contact to the bond pad while observing the front side of the die through the microscope; adhesively connecting the interconnector to the die to maintain the electrical contact between the bump contact; positioning the interconnector relative to the die to locate the probe pad beyond an exterior peripheral edge of the die while observing the front side of the die through the microscope; inverting the die and the adhesively connected interconnector; observing the back side of the die and the probe pad through the microscope after inverting the die and the adhesively connected interconnector; connecting a probe to the probe pad while the die and the adhesively connected interconnector are inverted and while observing the probe pad through the microscope; supplying at least one of an electrical signal or electrical power through the probe to induce functional responsiveness in the integrated circuit; and performing the testing or failure analysis while integrated circuit functionally responds to the one of the signal or power.