Patent ID: 6377528
Filing Date: 2002-04-23
Classification: G11B

Abstract:
A reference mark detection circuit for detecting a reference mark from a recording medium in which the plane configuration of at least one sidewall of a groove for tracking is formed so that said reference mark having, on a relatively gentle first waveform modulated by a predetermined information signal, a relatively abrupt second waveform is overlapped at a constant interval, said second waveform having an amplitude greater than the amplitude of said first waveform, said reference mark detection circuit comprising:a generating circuit (42) disposed to generate an electrical signal having a waveform corresponding to said plane configuration of the sidewall, a first comparing circuit (43) disposed to compare a level of said generated electrical signal with a first reference level between a peak value of said first waveform and a peak value of said second waveform to generate a first logic signal of a first pulse indicating the comparison result between said second waveform and said first reference level, a second comparing circuit (45) disposed to compare a level of said generated electrical signal with a second reference level lower than the peak value of said first waveform to generate a second logic signal of a second pulse indicating the comparison result between said first waveform and said second reference level and a third pulse indicating the comparison result between said second waveform and said second reference level, and a providing circuit (46-51) disposed to provide as a detection result of said reference mark a third logic signal of a fourth pulse having a leading edge in synchronization with the leading edge of said first pulse of said first logic signal and a trailing edge according to a first transition of said second logic signal subsequent to a leading edge of said first pulse.