Patent ID: 6599766
Filing Date: 2003-07-29
Classification: G02B,G03F

Abstract:
A method of selecting an anti reflective layer thickness for placement between a photoresist layer to be patterned and a polysilicon layer for a device with a high K dielectric layer below the polysilicon layer, the method comprising:selecting a trial anti reflective layer thickness; determining a first coherent illumination intensity reflected from an interface between the photoresist layer and the anti reflective layer; determining a second coherent illumination intensity reflected from an interface between the anti reflective layer and the polysilicon layer; determining a third coherent illumination intensity reflected from an interface between the polysilicon layer and the high K dielectric layer; determining if a total coherent illumination intensity comprising the sum of the first coherent illumination intensity, the second coherent illumination intensity, and the third coherent illumination intensity is below a predetermined threshold; selecting the trail anti reflective layer thickness as the anti reflective layer thickness if the total coherent illumination intensity is below the predetermined threshold.