Patent ID: 8615690
Filing Date: 2013-12-24
Classification: G06F,G11C

Abstract:
1. A controller of a memory device, wherein the controller is capable of accessing a memory of the memory device and the memory has a data storage area and a data correction area, comprising: a mode selection unit capable of selecting mode of the controller according to operation voltage of the memory; wherein when the memory works with a first operation voltage, the mode selection unit is capable of selecting a first mode of the controller, and the controller is capable of writing input data into the data storage area to serve as storage data and reading the storage data from the data storage area to serve as output data in the first mode; and wherein when the memory works with a second operation voltage, the mode selection unit is capable of selecting a second mode of the controller, and the controller is capable of performing a correction function to encode the input data to generate encoded input data, writing the encoded input data into the data storage area and the data correction area to respectively serve as the storage data and correction data, reading the storage data and the correction data, and decoding the storage data and the correction data to generate the output data in the second mode.