Patent ID: 7727897
Filing Date: 2010-06-01
Classification: H01L

Abstract:
1. A method of etching a top electrode/ferroelectric stack using an etch stop layer, comprising: preparing a substrate; forming a first layer of a first dielectric material on the substrate; forming a bottom electrode in the first layer of the first dielectric material; depositing an etch stop layer on the first layer of the first dielectric material and the bottom electrode, including forming a hole in the first layer of the etch stop layer exposing a portion of the bottom electrode; depositing a layer of PCMO material on the etch stop layer and extending through the hole to the bottom electrode; depositing top electrode material on the PCMO material to form a top electrode/PCMO stack; stack etching the top electrode and PCMO material, stopping at the level of the etch stop layer; depositing a layer of a second dielectric material on the etch stop layer and encapsulating the top electrode and PCMO material; etching the layer of the second dielectric material to form a sidewall about the top electrode and PCMO material; depositing a second layer of the first dielectric material; smoothing the a second layer of the first dielectric material by CMP; depositing a third layer of the first dielectric material; etching contact holes through the layers of the first and second dielectric material to the bottom and top electrodes; and metallizing the ferroelectric stack.