Patent ID: 9000537
Filing Date: 2015-04-07
Classification: H01L

Abstract:
1. A FinFET device, comprising; a plurality of trenches formed in a semiconducting substrate that define at least a first fin and a second fin; a first local isolation region positioned in a bottom of each of a plurality of trenches that define said first fin, said first local isolation defining a first height of the first fin, said first isolation region comprising a first generally U-shaped liner material having a plurality of spaced apart generally upstanding legs that define, in part, a first cavity, said legs of said first generally U-shaped liner material having a first thickness; a second local isolation region positioned in a bottom of each of a plurality of trenches that define said second fin, said second local isolation region defining a second fin height, wherein said first and second heights are different, said second local isolation region comprising a second generally U-shaped liner material having a plurality of spaced apart generally upstanding vertically oriented legs that define, in part, a second cavity, said legs of said second generally U-shaped liner material having a second thickness that is different than said first thickness; a layer of insulating material positioned at least partially in said first and second cavities; and a gate structure positioned around a portion of said first and second fins.