Patent ID: 7855519
Filing Date: 2010-12-21
Classification: H05B

Abstract:
1. A ballast stabilizer circuit, comprising: a rectification unit configured to include diodes and full-wave rectify input commercial AC power; a voltage switching control unit configured to receive the AC power full-wave rectified by the rectification unit, divide magnitudes of the AC power depending on phases of voltage, and perform switching control such that low-voltage portions of the divided voltages, having low phases, are used as heating power for heating filaments of a fluorescent tube, and high-voltage portions of the divided voltages, having high phases, are used as discharge voltage of the fluorescent tube; a low-voltage switching unit connected to an output of the voltage switching control unit, and configured to switch on and off the heating power for heating the filaments of the fluorescent tube in response to an output signal of the voltage switching control unit; and a high-voltage switching unit connected to the output of the voltage switching control unit and configured to form a Pulse-Width-Modulation (PWM) circuit for pulse-width-modulating the high-voltage portions and then applying the lighting power of the fluorescent tube, thereby switching on power for discharge of the fluorescent tube in response to the output signal of the voltage switching control unit, wherein the voltage switching control unit comprises, inside the rectification unit: resistors connected in series and configured to divide voltage magnitude according to phases of the full-wave rectified power based on resistance ratio; a first transistor connected between the resistors at base terminal thereof and connected at a collector terminal to the rectification unit via a resistor, and at an emitter terminal thereof to the rectification unit; a second transistor connected at a base terminal thereof to the collector terminal of the first transistor via resistors, and at an emitter terminal thereof to the rectification unit; and a third transistor connected at a base terminal thereof to the collector terminal of the second transistor, and at a collector terminal thereof to the low-voltage switching unit and the high-voltage switching unit.