Patent ID: 6781469
Filing Date: 2004-08-24
Classification: H03L

Abstract:
A phase-locked loop comprising:a phase detector for receiving an input signal and a feedback signal, and for outputting a phase error signal based on a phase difference between the input signal the feedback signal; a signal reshaper connected to the phase detector for reshaping the phase error signal; a charge pump connected to the signal reshaper for receiving the reshaped or unreshaped phase error signal from the signal reshaper and for outputting a charge pump signal; a low pass filter connected to the charge pump for receiving the charge pump signal and outputting an output signal; a voltage-controlled oscillator connected between the low pass filter and the phase detector for receiving the output signal and for outputting a corresponding oscillation signal, wherein the feedback signal inputted into the phase detector is generated from the oscillation signal; and a controller connected to the signal reshaper and the charge pump for controlling the signal resphaper and the charge pump; wherein the unreshaped phase error signal causes the charge pump to output a charge pump signal that changes the frequency of the feedback signal to match the frequency of the input signal, and the reshaped phase error signal causes the charge pump to output a charge pump signal that synchronizes the output signal with a target frequency.