Patent ID: 6027991
Filing Date: 2000-02-22
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device, comprising the steps of:forming an insulating layer on a semiconductor substrate;forming an opening in said insulating layer;forming an impurity-doped polycrystalline silicon layer on a top surface of said insulating layer, side surfaces of said insulating layer defined within said opening, and on said semiconductor substrate;performing a heating operation upon said impurity-doped polycrystalline silicon layer to form an impurity doped region in said semiconductor substrate under said polycrystalline silicon layer;etching back a part of said polycrystalline silicon layer by an anisotropic etching process to obtain a reduced thickness polycrystalline silicon layer said reduced thickness polysilicon layer in contact with regions of said top and side surfaces of said insulating layer and said impurity doped region and reduced in thickness throughout contact regions of said top surface of said insulating layer and said impurity doped region; andforming a metal silicide layer on said reduced thickness polycrystalline silicon layer.