Patent ID: 7443731
Filing Date: 2008-10-28
Classification: G11C

Abstract:
1. An integrated semiconductor nonvolatile memory, comprising: a first field effect transistor with a first gate having a gate electrode formed on a semiconductor substrate via an insulating film; and a second field effect transistor with a second gate electrode formed on the semiconductor substrate via a charge storage film, adjacent to the first field effect transistor; wherein programming or erasure is executed by applying a voltage to the second gate electrode and injecting holes from a side of the semiconductor substrate to the charge storage film; wherein the programming or erasure is executed by repeating pulse application to the second gate electrode; wherein there are a first period and a second period after the first period while the programming or erasure is executed; and wherein verification voltage is applied to the second gate electrode in the second period and verification voltage is not applied to the second gate electrode in the first period.