Patent ID: 6737881
Filing Date: 2004-05-18
Classification: G01R

Abstract:
An apparatus for testing an integrated circuit of a device under test by monitoring an analog signal and a digital signal outputted from the integrated circuit, comprising:a comparator, a memory for receiving an output signal from said comparator, a driver for receiving an output signal from said memory, an adder or subtractor that accepts the analog signal outputted from the integrated circuit and, selectively, the signal outputted from said memory, an integrator which accepts an analog signal outputted from said adder or subtractor, a first switch for selectively transmitting an analog signal outputted from said integrator and the digital signal outputted from said integrated circuit to said comparator, and a second switch for selectively transmitting the signal outputted from said memory and the outputted signal from said comparator to said driver, wherein at least one of said switches is operated depending on whether a signal to be tested is analog or digital.