Patent ID: 9006080
Filing Date: 2015-04-14
Classification: H01L

Abstract:
1. A method of forming an integrated circuit, the method comprising: receiving a substrate, the substrate having a first region and a second region; forming a first isolation trench in the first region; forming a second isolation trench in the second region; forming a first liner layer in the first isolation trench; forming a second liner layer in the second isolation trench, wherein the second liner layer has a thickness that is different from a thickness of the first liner layer; patterning a resist layer to protect the first liner layer within the first isolation trench and to expose the second liner layer within the second isolation trench; and using the patterned resist layer, performing an implantation procedure on the second isolation trench and the second liner layer formed therein, wherein the implantation procedure dopes a portion of the substrate adjacent to the second isolation trench by implanting a dopant through the second liner layer.