Patent ID: 7796447
Filing Date: 2010-09-14
Classification: G11C

Abstract:
1. A semiconductor device having an output impedance adjustment circuit for automatically adjusting an output impedance of an output circuit including a plurality of transistors connected in parallel, wherein said output impedance adjustment circuit comprises: a replica circuit including a circuit portion of a substantially same configuration as said output circuit; a comparator for comparing a magnitude of the output impedance of said replica circuit with that of a reference resistor and for outputting a comparison result as an internal counter control signal; a switching controller capable of selectively switching between an external counter control signal supplied from outside and the internal counter control signal output from said comparator; a counter circuit for performing a count-up or count-down operation selectively according to the internal counter control signal or the external counter control signal and for outputting a count value of a predetermined number of bits as an adjustment code; and a selector unit for selectively outputting a test code supplied from outside and the adjustment code output from said counter circuit and for supplying the code to said output circuit and said replica circuit, wherein the adjustment code is supplied to said output circuit and said replica circuit, and each of said plurality of transistors is controlled to be on/off based on the adjustment code.