Patent ID: 6591233
Filing Date: 2003-07-08
Classification: G06F

Abstract:
A simulation device comprising:to-be-analyzed block dividing means receiving a netlist defining a circuit to be simulated and for dividing a predetermined to-be-analyzed block specifying a device included in said circuit to be simulated into a plurality of to-be-analyzed sub-blocks arranged in a predetermined direction, with equivalence with said predetermined to-be-analyzed block maintained, to output a modified netlist defining a new circuit to be simulated in which said predetermined to-be-analyzed block is replaced with said plurality of to-be-analyzed sub-blocks; and circuit simulation means for performing a circuit simulation on said new circuit to be simulated which is defined by said modified netlist, wherein said to-be-analyzed block dividing means is capable of individually setting circuit simulation characteristic values, respectively, of said plurality of to-be-analyzed sub-blocks.