Patent ID: 6614678
Filing Date: 2003-09-02
Classification: G11C

Abstract:
A semiconductor memory comprising:a memory cell block including a plurality of ferroelectric capacitors successively connected to one another along a bit line direction each for storing a data in accordance with displacement of polarization of a ferroelectric film thereof, and a reading transistor whose gate is connected to one end of said plurality of successively connected ferroelectric capacitors for reading a data by detecting the displacement of the polarization of said ferroelectric film of a selected ferroelectric capacitor selected from said plurality of ferroelectric capacitors; a set line connected to the other end of said plurality of successively connected ferroelectric capacitors; a bit line connected to a drain of said reading transistor at one end thereof and to a control line at another end thereof; a reset line connected to a source of said reading transistor at one end thereof; and a plurality of word lines respectively corresponding to said plurality of ferroelectric capacitors for selecting said selected ferroelectric capacitor from said plurality of ferroelectric capacitors for data write or data read.