Patent ID: 6717998
Filing Date: 2004-04-06
Classification: H03L

Abstract:
A frequency synthesizer apparatus comprising:a voltage control oscillator operable to generate an output signal having a frequency corresponding to an input control voltage; a variable frequency divider operable to divide the frequency of the output signal from said voltage control oscillator in accordance with an input data corresponding to a number of frequency division, and to output a frequency-divided signal; a phase comparator operable to perform a phase comparison between the output signal from said variable frequency divider and an input reference signal, and to generate and output a signal indicating a result of the phase comparison; a low-pass filter operable to low-pass-filter the output signal from said phase comparator, and to output the low-pass-filtered signal to said voltage control oscillator; a fraction part control circuit operable to receive an input data of a fraction part, to control the input data of the fraction part so as to periodically change the input data of the fraction part according to a predetermined period corresponding to a value of the input data of the fraction part, and to output data of a controlled fraction part; and a first adder operable to add an input data of an integral part to the data of the controlled fraction part outputted from said fraction part control circuit, and to output resultant addition data to said variable frequency divider as the input data corresponding to the number of frequency division, wherein said fraction part control circuit is a plural-n-th-order delta-sigma modulator circuit, said fraction part control circuit comprising: a feedback circuit; a first multiplier operable to multiply data outputted from said feedback circuit by a predetermined quantization step, and to output resultant multiplication data; a second adder operable to add the data outputted from said first multiplier to the input data of the fraction part, and to output resultant addition data; a plural-n-th-order integrator having one data input terminal and one data output terminal, said plural-n-th-order integrator being operable to apply plural-n-th-order integration to the data which is inputted from said second adder through said one data input terminal, and to output plural-n-th-order integrated data through said one data output terminal; a quantizer operable to quantize the data outputted from said one data output terminal of said plural-n-th-order integrator with the predetermined quantization step, and to output the quantized data as the data of the controlled fraction part, wherein said quantizer generates data of an integral part of a quotient calculated by dividing the data outputted from said plural-n-th-order integrator by the predetermined quantization step, and said quantizer outputs the generated data as the data of the controlled fraction part; and said feedback circuit being operable to feed back the quantized data from said quantizer to said first multiplier and in turn to said second adder, and wherein said frequency synthesizer apparatus sets a frequency of the output signal from said voltage control oscillator in accordance with an average value of the controlled input data of the fraction part according to the predetermined period corresponding to the value of the input data of the fraction part.