Patent ID: 6020561
Filing Date: 2000-02-01
Classification: H01L,H05K

Abstract:
A printed circuit substrate, comprising:a multilayer substrate;at least one pad-on-via contact on the multilayer substrate;at least one pad-off-via contact on the multilayer substrate, wherein said pad-on-via contact is at a lower height from the bottom of the substrate than said pad-off-via contact;a first solder bump formed on said pad-on-via contact, said first solder bump having a first exposed surface on a side thereof opposing said pad-on-via contact; anda second solder bump formed on said pad-off-via contact, said second solder bump having a second exposed surface on a side thereof opposing said pad-off-via contact, the first and second exposed surfaces being at substantially the same height from the bottom of the substrate so as to be capable of establishing a solder connection with an electronic device having contacts at the same height.