Patent ID: 9060030
Filing Date: 2015-06-16
Classification: G06F,H04L

Abstract:
1. A frame concatenation apparatus, comprising: a storage configured to store a plurality of frames to be transmitted; a generation circuit configured to generate a concatenated frame formed by serially concatenating the plurality of frames read out from the storage, the concatenated frame including frame length information indicating a length of each of the plurality of frames and concatenation type information; and an attachment circuit configured to attach information for establishing synchronization with a receiver of the concatenated frame, to the concatenated frame, wherein the generation circuit executes one selected from at least two among processes (1) to (4) below: (1) a first process for generating a concatenated frame in which any one of a plurality of frames including the same destination information includes the destination information, and the destination information is omitted from each of one or more remaining frames; (2) a second process for generating a concatenated frame in which any one of a plurality of frames including the same virtual network identification information includes the virtual network identification information, and the virtual network identification information is omitted from each of one or more remaining frames; (3) a third process for generating a concatenated frame in which any one of a plurality of frames including the same destination information and the same virtual network identification information includes the destination information and the virtual network identification information, and the destination information and the virtual network identification information are omitted from each of one or more remaining frames; and (4) a fourth process for generating a concatenated frame in which a plurality of frames each including different destination information are concatenated, and the frame concatenation apparatus further comprises an insertion circuit configured to insert the concatenation type information indicating one of the first to fourth processes executed by the generation circuit, into the concatenated frame or each of the plurality of frames.