Patent ID: 6941390
Filing Date: 2005-09-06
Classification: G06F

Abstract:
1. A system, comprising: a context memory configured to store context parameters for each of a plurality of virtual DMA channels; a set of DMA resources, wherein the set of DMA resources includes a buffer; a DMA controller coupled to the context memory, wherein the DMA controller is configured to configure the set of DMA resources as different virtual DMA channels using context parameters associated with different respective ones of the plurality of virtual DMA channels; and a plurality of I/O resources coupled to the DMA resources, wherein each of the plurality of virtual DMA channels is associated with one of the plurality of I/O resources; wherein the DMA controller is further configured to initiate a first DMA transfer in a first virtual DMA channel of the plurality of virtual DMA channels according to the first virtual DMA channel's context parameters stored in the context memory, wherein the first DMA transfer transfers data from a first one of the plurality of I/O resources to the buffer; and wherein the DMA controller is further configured to initiate a second DMA transfer in a second virtual DMA channel of the plurality of virtual DMA channels according to the second virtual DMA channel's context parameters stored in the context memory, wherein the second DMA transfer transfers data from a second one of the plurality of I/O resources to the buffer.