Patent ID: 6667209
Filing Date: 2003-12-23
Classification: H01L

Abstract:
A method of forming a capacitor comprising:forming a contact plug penetrating an interlayer dielectric on a semiconductor substrate; sequentially forming a supporting layer, an etch stop layer, and a molding layer on the interlayer dielectric including the contact plug; patterning the molding layer to form a molding pattern having an opening that exposes the etch stop layer over the contact plug; forming an adhesive spacer on sidewalls of the opening; successively patterning the etch stop layer and the supporting layer under the opening where the adhesive spacer is formed to form an etch stop pattern and a supporting pattern that expose the contact plug; forming a lower electrode covering sidewalls of the adhesive spacer, the etch stop pattern, the supporting pattern, and a top surface of the contact plug; removing the molding pattern and the adhesive spacer to expose an outer wall of the lower electrode; and sequentially forming a dielectric pattern and an upper electrode covering the exposed outer wall of the lower electrode.