Patent ID: 6189088
Filing Date: 2001-02-13
Classification: G06F

Abstract:
A method for scheduling instructions for execution in a computer processing system implementing out-of-order execution, the method comprising the steps of:selecting and moving a next instruction from its current position in a sequence of instructions to an earlier position;determining whether the selected instruction may reference a memory location for read-access;determining whether non-selected instructions, which may ambiguously reference the memory location for read-access, were previously moved over the selected instruction, when the selected instruction may reference the memory location for read-access;establishing a bypass sequence to be performed during an execution of the selected instruction and which passes data previously read-accessed by the non-selected instructions to the selected instruction, when the non-selected instructions were previously moved over the selected instruction and addresses of memory locations from which the non-selected instructions have read-accessed the data are the same as an address of the memory location from which the selected instruction is to read-access data;determining whether the selected instruction was previously moved over the non-selected instructions, when the selected instruction may reference the memory location for read-access; andadding a mechanism for storing a record of the selected instruction for future reference by the non-selected instructions.