Patent ID: 6359517
Filing Date: 2002-03-19
Classification: H03F

Abstract:
A front end circuit for receiving and amplifying a signal, the front end circuit comprising:a first output circuit node; a first input circuit node; first and second supply terminals and a regulated supply terminal; a first resistor coupled between the first output circuit node and one of the first supply terminal and the regulated supply terminal; a first transistor having a control terminal and first and second current terminals, where the control terminal is coupled to the first output circuit node, the first current terminal is coupled to one of the first supply terminal and the regulated supply terminal, and the second current terminal is coupled to the first input circuit node; and a second transistor having a control terminal and first and second current terminals, where the control terminal of the second transistor is coupled co the first input circuit node, the first current terminal of the second transistor is coupled to the first output circuit node, and the second current terminal of the second transistor is configured to receive a predetermined reference voltage.