Patent ID: 6249238
Filing Date: 2001-06-19
Classification: H03M

Abstract:
A sigma-delta modulator for conversion of an analog or digital low frequency input signal (X) of high resolution into a quantized analog or digital signal (Y), with an error feedback circuit for suppression of quantization errors, said sigma-delta modulator comprisingmeans (Z.sup.-1) for delaying the input signal (X) for a plurality of time interval to obtain a plurality of delayed input signals (X.sub.i), wherein i=1, 2, . . . , n and the ith one of the delayed input signals (X.sub.i) is delayed for i scanning periods;means (2) for addition of the delayed input signals (X.sub.i) each delayed by said i scanning periods to obtain a first sum signal (S.sub.1);means (Q, Q.sub.0, Q.sub.1 to Q.sub.n) for producing quantized input signals (VZ.sub.i) each delayed by said i scanning periods;means (3) for addition of the delayed quantized input signals (VZ.sub.i) to obtain a second sum signal (S.sub.2); andmeans (1) for subtraction of the sum signals (S.sub.1, S.sub.2) from an actual value of the input signal (X).