Patent ID: 6215334
Filing Date: 2001-04-10
Classification: H03K

Abstract:
A pulse detection circuit for filtering a pulse signal with noise superimposed thereon into a digital bi-level signal representing the pulse signal, the circuit comprising:a comparator comparing the pulse signal at a first input terminal to a bias signal at a second input terminal to produce a digital bi-level representing the pulse signal;a delay circuit coupled to said comparator to receive said digital bi-level signal to produce a delayed version of said digital bi-level signal representing the pulse signal; anda biasing circuit coupled to receive the pulsed signal to produce said bias signal at a bias output terminal that is coupled to the second input terminal, said biasing circuit includes a switch having a switch input terminal that is coupled to the delay circuit to receive said delayed version of said digital bi-level signal representing the pulse signal, wherein said bias signal is switched between a first and a second state responsive to said delayed version of said digital bi-level signal representing the pulse signal.