Patent ID: 8947145
Filing Date: 2015-02-03
Classification: H02M,H03K,H05B,Y02B

Abstract:
1. A PWM signal generation circuit for generating a PWM signal, comprising: a duty setting unit configured to generate a duty control signal designating a duty ratio corresponding to each period of the PWM signal on the basis of an initial duty setting signal designating a value of an initial duty ratio of the PWM signal at the start of generation of the PWM signal, a target duty setting signal designating a value of a target duty ratio of the PWM signal, a slope setting signal designating a slope setting value designating the rate at which a duty ratio is changed from the initial duty ratio to the target duty ratio, and a clock signal; a period setting unit configured to output a period setting value indicating a length of one period of the PWM signal on the basis of a period setting signal; and an output control unit configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal on the basis of the clock signal, wherein the duty setting unit increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value.