Patent ID: 8163627
Filing Date: 2012-04-24
Classification: H01L

Abstract:
1. A method of forming an isolation layer in a semiconductor device, comprising the steps of: providing a semiconductor substrate having an active area and an isolation area wherein a tunnel insulating layer and a charge storage layer are formed in the active area and a trench is formed in the isolation area; forming a first insulating layer by a spin coating method to fill the trench; removing a portion of the first insulating layer in the trench so that a to surface of the first insulating layer is lower than a top surface of the tunnel insulating layer; forming a second insulating layer along a surface of a resulting structure after removing the portion of the first insulating layer, thereby partially filling the trench with the second insulation layer, wherein a top surface of the second insulating layer is higher than a top surface of the tunnel insulating layer, and wherein the second insulating layer is a high density plasma (HDP) oxide layer; forming a third insulating layer along a surface of a resulting structure after forming the second insulating layer; forming a porous fourth insulating layer along a surface of a resulting structure after forming the third insulating layer, thereby fully filling the trench with the porous fourth insulating layer; and performing a polishing process to remove portions of the second, third, and porous fourth insulating layers in the active area; wherein the third insulating layer has a density higher than a density of the second insulating layer.