Patent ID: 6541709
Filing Date: 2003-04-01
Classification: H01L,H05K,Y10T

Abstract:
A multilayer thin film structure which comprises a series of layers comprising a dielectric having metal thereon in the form of wiring and via interconnections and a top surface layer of the structure consisting essentially of vias, chip connection pads, via-pad connection straps and a plurality of orthogonal X conductor lines and Y conductor lines and defined metal strap repair lines thereon which repair lines are defined only for defective or unwanted via interconnections by testing for interconnection defects at the lower layer adjacent the surface layer, said defined metal strap repair lines connecting the chip connection pads of defective or unwanted via interconnections to the X conductor lines and/or Y conductor lines with the other end of the X conductor lines and/or Y conductor lines being connected by the defined metal strap repair lines to other pads and/or vias to form a circuit and repairing defective interconnections and/or make engineering changes.