Patent ID: 6268628
Filing Date: 2001-07-31
Classification: H01L,H03K

Abstract:
An apparatus comprising:a depletion type MOS semiconductor device including:an n.sup.- drift layer;a p.sup.- well region formed in a surface layer of the n.sup.- drift layer;an n.sup.+ emitter region formed in a surface layer of the p.sup.- well region;an n.sup.- depletion region formed in the surface layer of the p.sup.- well region, to extend from the n.sup.+ emitter region to a surface layer of the n.sup.- drift layer;a gate electrode layer formed on a gate insulating film, over the n.sup.- depletion region;an emitter electrode formed in contact with surfaces of both of the n.sup.+ emitter region and the p.sup.- well region; anda collector electrode formed on a rear surface of the n.sup.- drift layer,wherein said p.sup.- well region is formed at a substantially middle portion thereof with an aperture, so as to surround said n.sup.- depletion region; andwherein said n.sup.- drift layer assumes a substantially rectangular shape, and a length x of a short side of the rectangular shape is not greater than two-thirds of a thickness of the n.sup.- drift layer.