Patent ID: 6223098
Filing Date: 2001-04-24
Classification: B07C,G01R,G05B,Y02P

Abstract:
A control system for controlling a test process of a lot of integrated circuit devices (IC), said control system comprising:at least one tester each comprisinga test device which tests plural electrical characteristics of each of the IC devices of the lot of IC devices according to a plurality of test sequences, the test sequences defining a pass or fail standard for each of the plural electrical characteristics,a handler for sequentially supplying the lot of IC devices to the test device,a sorter which sorts the tested lot of IC devices into a plurality of bin categories according to test results of the test sequences, anda microprocessor for controlling the test device and transmitting test result data indicative of the test results;a host computer comprisinga memory for receiving and storing the test result data transmitted from the at least one tester,a bin category limit determining means for setting bin category limits defining bin capacities for bin categories, anda lot decision means for determining a subsequent flow path of the tested lot based on the bin category limits and the test result data stored in the memory;at least one distributed computer comprising an instruction means for instructing the subsequent flow path of the tested lot as determined by the lot decision means, and an analysis means for analyzing the test result data; anda network for interconnecting the tester, the host computer, and the distributed computer.