Patent ID: 7709902
Filing Date: 2010-05-04
Classification: H01L

Abstract:
1. A semiconductor structure comprising: a semiconductor substrate including at least one nFET device region and at least one pFET device region, said device regions are separated by an isolation region; a first gate dielectric stack having a net dielectric constant greater than silicon dioxide located on a surface of said substrate and within said at least one nFET device region, wherein said first gate dielectric stack includes, from bottom to top, a first high-k dielectric and an alkaline earth metal-containing or rare earth metal-containing layer having a different composition than said first high-k dielectric; a second gate dielectric stack having a net dielectric constant greater than silicon dioxide located on a surface of said substrate and within said at least one pFET device region, wherein said first high-k dielectric and said second gate dielectric stack have different compositions; a first metal portion contacting a top surface of said first gate dielectric stack; and a pair of second metal portions, wherein a bottom surface of said one of said second metal portions contacts a top surface of said first metal portion, and each of said pair of second metal portions has a same thickness and a same composition.