Patent ID: 7209340
Filing Date: 2007-04-24
Classification: H01L

Abstract:
1. A semiconductor device having an MIM capacitor in a multilayer interconnection structure, said multilayer interconnection structure comprising: a first interconnection layer embedded in a first interlayer insulation film; a second interlayer insulation film formed on said first interlayer insulation film; a third interlayer insulation film formed over said first interlayer insulation film via said second interlayer insulation film; a second interconnection layer embedded in said third interlayer insulation film; and a via-plug formed in said second interlayer insulation film so as to connect said first interconnection layer to said second interconnection layer electrically, said first interconnection layer comprising first and second conductor patterns embedded in said first interlayer insulation film and extending continuously in said first interlayer insulation film in a mutually opposing relationship, said second interconnection layer comprising third and fourth interconnection patterns embedded in said third interlayer insulation film respectively in correspondence to said first and second conductor patterns, said third and fourth conductor patterns extending continuously in said third interlayer insulation film in a mutually opposing relationship, wherein said second interlayer insulation film includes a fifth conductor pattern embedded therein so as to extend continuously in said second interlayer insulation film in correspondence to said first and third conductor patterns, said fifth conductor pattern connecting said first and third conductor patterns continuously, said second interlayer insulation film further including a sixth conductor pattern embedded therein so as to extend continuously in said second interlayer insulation film in correspondence to said second and fourth conductor patterns, said sixth conductor pattern connecting said second and fourth conductor patterns continuously, said first and second conductor patterns, said third and fourth conductor patterns and said fifth and sixth conductor patterns forming together an MIM capacitor.