Patent ID: 6654500
Filing Date: 2003-11-25
Classification: H04N

Abstract:
An MPEG video decoding system, comprising:a video buffer coupled to store a received video bit stream and configured to output a control signal, the control signal indicating overflow if an overflow condition occurs in the video buffer and otherwise indicating non-overflow; and a DEMUX coupled to output the video bit stream to the video buffer and receive the control signal from the video buffer, said DEMUX configured to discard the video bit stream if the control signal indicates overflow and to output the video bit stream to the video buffer if the control signal indicates non-overflow, wherein if the control signal indicating non-overflow is received subsequent to the control signal indicating overflow, upon resuming outputting of the video bitstream, the DEMUX inserts an error code into the video bit streams upon resuming outputting the video bit streams to the video buffer.