Patent ID: 8447134
Filing Date: 2013-05-21
Classification: G06F,G06T

Abstract:
1. An apparatus comprising: a local shared memory; and a processor, wherein (i) said local shared memory and said processor are connected as a circuit, (ii) said circuit is configured to communicate with an external memory device, (iii) said local shared memory comprises a plurality of cache blocks, where each of the cache blocks corresponds to one pane of a current horizontal strip of a warped image region to be generated from unwarped image data stored in the external memory device, (iv) a size of the cache blocks is set to provide a sufficient amount of data to correct distortion in a corresponding section of the current horizontal strip, (v) said circuit is further configured such that each pixel of the unwarped image data stored in the external memory is fetched only once, and (vi) each pane has associated tag information.