Patent ID: 6984567
Filing Date: 2006-01-10
Classification: G11C,H01L

Abstract:
1. A method of manufacturing a nonvolatile semiconductor memory device having a plurality of memory cells disposed in a memory cell region, wherein each memory cell has a floating gate, a control gate and a third gate, comprising steps of: (a) forming a first insulator film on a semiconductor substrate in said memory cell region; (b) forming said third gate on said first insulator film; (c) forming a second insulator film, having a thickness larger than that of said first insulator film, on said semiconductor substrate in said memory cell region; (d) forming said floating gate on said second insulator film; and (e) forming said control gate on a third insulator film formed on said floating gate, wherein said second insulator film is a tunnel insulator film between said floating gate and said semiconductor substrate.