Patent ID: 7545047
Filing Date: 2009-06-09
Classification: H01L

Abstract:
1. A semiconductor device comprising: a wiring substrate operable as a stacking element for a semiconductor device stack, the wiring substrate forming an underside and an upper side of the semiconductor device, the wiring substrate comprising: a plastic frame of a first plastic compound, the plastic frame being disposed in an edge region that surrounds a central region of the semiconductor device; and a second plastic compound disposed in the central region; a plurality of external contact pads disposed on the underside and the upper side of the wiring substrate and arranged in at least the edge region of the wiring substrate; a plurality of contact vias extending through the wiring substrate and electrically connecting upper side external contact pads to underside external contact pads; and a semiconductor chip including an active upper side with chip contact areas, the semiconductor chip embedded with its back side and its edge sides in the volume of the wiring substrate, the semiconductor chip being at least partially surrounded by the contact vias; wherein the underside of the wiring substrate with underside external contact pads and the active upper side of the semiconductor chip with chip contact areas form a coplanar area.