Patent ID: 8212546
Filing Date: 2012-07-03
Classification: G01R,H03G,H05K

Abstract:
1. A system comprising: a) a first circuit including a first MOS transistor having a gate and a drain, the first circuit configured to receive a radio frequency (RF) signal at the gate of the first MOS transistor, the drain of the first MOS transistor configured to output a first current proportional to the square of the input voltage of the RF signal while receiving the RF signal, the first circuit further configured to subtract a DC bias current from the first current; and b) a second circuit connected to the first circuit, the second circuit including a second MOS transistor having a source configured to receive the first current from the first circuit, the second MOS transistor biased in a triode region and having a channel resistance between the source and a drain; c) wherein the second circuit is configured to output a voltage proportional to the value of the power of the RF signal received by the first circuit, the output voltage being a function of the first current and the channel resistance between the source and the drain of the second MOS transistor; d) a correction loop connected to a gate of the second MOS transistor and to an output of the second circuit, the correction loop configured to maintain the second MOS transistor biased in the triode region.