Patent ID: 8692380
Filing Date: 2014-04-08
Classification: G03F

Abstract:
1. An integrated circuit comprising: a first circuit layer, in a reticle pattern, having at least a first shape and a second shape connected by a unit cell, a patch cell, or a combination thereof from the reticle pattern for removing a sub-geometry, a singularity, or a combination thereof from the reticle pattern, the first shape and the second shape having vertices located to detect the sub-geometry, the singularity, or a combination thereof, the first circuit layer having a new shape formed by a Boolean operation on the first shape, the second shape, the unit cell, the patch cell, or a combination thereof includes new shapes formed on the integrated circuit, the patch cell includes lines, between rectangular shapes, spaced a measurement from the singularity on the reticle pattern includes a bridge region between the rectangular shapes; and at least a second circuit layer for forming a device.