Patent ID: 9048313
Filing Date: 2015-06-02
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate; a plurality of gate electrodes that are disposed on the semiconductor substrate, the plurality of gate electrodes including a plurality of extended parts extending in a first direction in a plane parallel with the semiconductor substrate; a gate insulating film disposed between the semiconductor substrate and the plurality of gate electrodes; a first electrode connected to an upper surface of the semiconductor substrate; and a second electrode connected to a lower surface of the semiconductor substrate, wherein the semiconductor substrate includes: a first conductive type first semiconductor layer connected to the second electrode; a second semiconductor layer including a plurality of first conductive type pillars and second conductive type pillars that are disposed on the first semiconductor layer, extending in a second direction in the plane parallel with the semiconductor substrate and in a third direction orthogonal to the plane of the semiconductor substrate, the first and second conductive type pillars arranged adjacent to each other in an alternate manner, wherein the first direction forms an oblique angle with the second direction; a second conductive type third semiconductor layer that is disposed in a region including a gap between areas right under one of the gate electrodes and the second semiconductor layer, where an edge of the second conductive type third semiconductor layer is positioned in an area right under the gate electrode from a top view; and a first conductive type fourth semiconductor layer that is disposed in an area right on the third semiconductor layer and connected to the first electrode, wherein an edge of the first conductive type fourth semiconductor layer is positioned in an area right under one of the gate electrodes from a top view.