Patent ID: 7659632
Filing Date: 2010-02-09
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate having a bond pad and a first passivation layer formed thereabove, the first passivation layer having an opening therein exposing a portion of the bond pad; a metal pad layer formed on a portion of the bond pad, wherein the metal pad layer contacts the bond pad; a second passivation layer formed above the metal pad layer, the second passivation layer having an opening therein exposing a portion of the metal pad layer; a patterned and etched polyimide layer partially covering the metal pad layer and the second passivation layer to expose a portion of the second passivation layer above a portion of the metal pad layer; a conductive layer formed above a portion of the etched polyimide layer and a portion of the metal pad layer, wherein the conductive layer contacts the metal pad layer; and a conductive bump structure connected to the conductive layer.