Patent ID: 7386684
Filing Date: 2008-06-10
Classification: G06F

Abstract:
1. A method for detecting when entire contents of a cache memory device associated with a processor device in a computing environment have been replaced relative to an identified starting state, said cache memory device comprising an N-way set associative cache, said cache wrap detection apparatus comprising: monitoring signals asserted by said processor device when performing processor cache updates, said signals including update indicator signals to indicate that a cache update is occurring, an update indicator signal for each cache update being associated with a particular cache line in a set i, where i ∈{1, . . .,N} within said N-way set-associative cache; for each set i, responding to said update indicator signals for detecting a cache wrap condition in said set i, and, asserting a set_wrap(i) signal when all lines within that set have been replaced; and, receiving each said asserted set_wrap(i) signal and generating a cache wrap detection signal when a cache wrap has occurred for all sets of said N-way set associative cache and all lines of the cache memory device have been replaced relative to said identified starting state; and wherein said monitored signals further comprise a way signal indicating a current cache line being replaced in a particular set i, said method further comprising: loading a register device with data indicating a way that must be updated to complete a set wrap in said set i; and, comparing said received way signals against said data and asserting a signal when a received way signal matches the loaded data content of the register device.