Patent ID: 7622360
Filing Date: 2009-11-24
Classification: H01L

Abstract:
1. A method for forming a device isolation region of a semiconductor device, the method comprising: forming a sacrificial oxide layer and a sacrificial nitride layer over a semiconductor substrate, the substrate having a first region and a second region; selectively etching portions of the sacrificial nitride layer, the sacrificial oxide layer and the substrate to form first and second trenches having predetermined depths in the first and second regions, respectively; filling the first and second trenches with an oxide layer; polishing the oxide layer until the sacrificial nitride layer formed in the first region is exposed, to form a first device isolation region filling the first trench and a second device isolation region pattern filling the second trench and covering the second region; forming a photoresist pattern over the first device isolation region and the second device isolation region pattern; and partially etching the second device isolation region pattern using the photoresist pattern as a mask to form a second device isolation region.