Patent ID: 6541285
Filing Date: 2003-04-01
Classification: G01R,H01L

Abstract:
A method of estimating a lifetime of a semiconductor device, comprising estimating a hot carrier lifetime of a NMOS transistor depending on a hot carrier lifetime model expressed by&tgr;âˆ Isubâˆ’mÂ·Idmâˆ’2 where &tgr; is a lifetime, Isub is a substrate current, Id is a drain current, and m is a fitting parameter, the fitting parameter m being defined as the following formula m=(&PHgr;h/&lgr;h+&PHgr;e/&lgr;e)/(&PHgr;ei/&lgr;e)+1 where &PHgr;h is a critical energy of a positive hole required for generating damage, &PHgr;e is a critical energy of an electron required for generating damage, &PHgr;ei is a critical energy of an electron required for impact ionization, &lgr;h is a mean free path of a positive hole, and &lgr;e is an electron mean free path.