Patent ID: 8450182
Filing Date: 2013-05-28
Classification: H01L

Abstract:
1. A method of manufacturing a non-volatile semiconductor memory element including a variable resistance element and a non-ohmic element connected in series with the variable resistance element, the variable resistance element including (i) a first electrode, (ii) a variable resistance layer formed on the first electrode, and (iii) a shared electrode formed in an upper part of the variable resistance layer, the non-ohmic element including (i) the shared electrode, (ii) one of a semiconductor layer and an insulator layer formed on the shared electrode, and (iii) a second electrode formed on the one of the semiconductor layer and the insulator layer, and the method comprising: forming the first electrode on a substrate; forming the variable resistance layer on the first electrode, the variable resistance layer comprising an oxide of a transition metal; forming the shared electrode having a front surface comprising a nitride of the transition metal, by replacing oxygen atoms in a front surface part of the variable resistance layer with nitrogen atoms by nitriding a front surface of the variable resistance layer; forming the one of the semiconductor layer and the insulator layer on the shared electrode; and forming the second electrode on the one of the semiconductor layer and the insulator layer, wherein the front surface of the shared electrode comprises the nitride of the transition metal including the transition metal and nitrogen, so that a Schottky barrier is formed in an interfacial surface between the shared electrode and the semiconductor or insulator layer.