Patent ID: 7089376
Filing Date: 2006-08-08
Classification: G06F,Y02D

Abstract:
1. A system comprising: a bus macro; a plurality of snooping masters operable coupled to the bus macro; a memory operable positioned in each of said plurality of snooping masters; logic located in each snooping masters, said logic being operable to generate in at least one of said snooping masters a snoop request which is sent through the bus to non-originating snooping masters; a snoop filtering device, operable positioned in at least one of the non-originating snooping masters, to determine if data associated with the received snoop request could ever be in the at least one of the non-originating snooping masters without initiating a search of the memory associated with the at least one of the non-originating snooping masters; and said at least one of the snooping masters returning an Immediate Response to the originating snooping masters without searching any of the resources of the at least one of the non-originating snooping masters if the snoop filtering device indicates data associated with the snoop request is not in said at least one of the non-originating snooping masters.