Patent ID: 6114901
Filing Date: 2000-09-05
Classification: G05F

Abstract:
A bias stabilization circuit for stabilizing an operating point of a first transistor, said bias stabilization circuit comprising:a second transistor having a gate, a source and a drain, wherein said source is configured to be connected through a first resistor to a first supply potential, said gate is configured to be connected directly to said first supply potential, and said drain is configured to be connected through a resistive load network to a second supply potential;wherein said drain of said second transistor outputs a bias voltage to the gate of said first transistor, to which it is coupled, such that if there is a change in said operating point of said first transistor, said bias stabilization circuit will automatically adjust said bias voltage to cause said first transistor to return to its original operating point, andwherein said change in said operating point may be caused by variations in said first transistor, said first resistor, said resistive load network, or said first and second spply potentials.