Patent ID: 8843797
Filing Date: 2014-09-23
Classification: G01R,G06F

Abstract:
1. A method for detecting unstable signatures when testing a VLSI chip comprising: a) adding to a linear feedback shift register (LFSR) one or more save and restore registers for storing an initial seed consisting of 0s and 1s; b) loading said initial seed into said LFSR and said one or more save and restore registers; b′) initializing a MISR and running test loops, and upon reaching a predetermined number of test loops moving a signature of said MISR to a shadow register; and c) performing a signature stability test by loading said initial seed to said LFSR, executing said predetermined number of BIST test loops, and comparing a resulting MISR signature for differences versus a previous signature stored in a MISR save and restore a register, wherein unloading is performed by way of serial MISR unloads and single bit XORs.