Patent ID: 6015733
Filing Date: 2000-01-18
Classification: H01L,Y10S

Abstract:
A method of creating a capacitor structure, for dynamic random access memory (DRAM) devices, on a semiconductor substrate, comprising the steps of:providing a transfer gate transistor, on said semiconductor substrate, comprised of a polysilicon gate structure, on a gate insulator layer, with a source/drain region, in a region of said semiconductor substrate, not covered by said polysilicon gate structure;forming a storage node contact hole, in a composite insulator layer, exposing a source region, of said source/drain region;forming a doped polysilicon plug, in said storage node contact hole, contacting said source region;depositing a thick insulator layer;forming an opening in said thick insulator layer, exposing the top surface of said doped polysilicon plug;depositing a polysilicon layer, on the top surface of said thick insulator layer, on the surfaces of said thick insulator, exposed in said opening, and on the top surface of said doped polysilicon plug, exposed in the bottom of said opening, in said thick insulator layer;forming a photoresist plug, in said opening, in said thick insulator layer, covering the portion of said polysilicon layer residing on the sides of, and on the bottom of, said opening, in said thick insulator layer;removing the portion of said polysilicon layer, residing on the top surface of said thick insulator layer, creating a crown shaped, polysilicon layer, covered by said photoresist plug, in said opening, in said thick insulator layer;removing said photoresist plug;removing said thick insulator layer;forming a capacitor dielectric layer on said crown shaped, polysilicon storage node structure; andforming a polysilicon upper electrode structure, on said capacitor dielectric layer.