Patent ID: 6747311
Filing Date: 2004-06-08
Classification: H01L,Y10S

Abstract:
A nonvolatile semiconductor memory device, comprising:a semiconductor substrate having a peripheral circuit region and a memory cell region; a plurality of erasable and programmable memory cell transistors each having a gate electrode and provided in the memory cell region; a plurality of peripheral transistors each having a gate electrode and provided in the peripheral circuit region; first post-oxidation films each provided on the gate electrode of all of the plurality of erasable and programmable memory cell transistors; second post-oxidation films each provided on the gate electrode of all of the plurality of peripheral transistors; first insulating films each provided on the first post-oxidation films and covering a side surface of the gate electrode of all of the plurality of erasable and programmable memory cell transistors, the first insulating films being harder for an oxidizing agent to pass there through than a silicon oxide film, and the first insulating films being oxidized; and second insulating films each provided on the second post-oxidation films and covering a side surface of the gate electrode of all of the peripheral transistors, the second insulating films being harder for an oxidizing agent to pass there through than a silicon oxide film, and the second insulating films being oxidized, wherein the first insulating films and the second insulating films each comprise a silicon nitride film, and a surface of the silicon nitride film is oxidized.