Patent ID: 8495479
Filing Date: 2013-07-23
Classification: G06F,H03M

Abstract:
1. A defect detection and correction system, comprising: a decoder module configured to decode data received from a data storage device and output the data and a plurality of confidence indicators associated with respective bits of the data; and a digital defect detection module configured to compare each of the confidence indicators in a window of W bits of the data to a confidence threshold, identify a number of bits in the window of W bits as defective based on the comparison, mark all of the bits in the window of W bits as defective if the number of bits is greater than a bit threshold, and generate a defect indicator identifying the window of W bits as defective, wherein the digital defect detection module is configured to identify the number of bits as defective if i) a number of times each bit was flipped during decoding is less than the confidence threshold, or ii) a log-likelihood ratio (LLR) for each bit is greater than or equal to the confidence threshold.