Patent ID: 6602769
Filing Date: 2003-08-05
Classification: H01L

Abstract:
A method of making a bi-directional transient voltage suppression device comprising:providing a semiconductor substrate of a first conductivity type; depositing a lower epitaxial layer of said first conductivity type on said substrate; depositing a middle epitaxial layer having a second conductivity type opposite said first conductivity type on the lower epitaxial layer, said lower layer and said middle layer forming a lower pâˆ’n junction; depositing an upper epitaxial layer of said first conductivity type on said middle epitaxial layer, said middle layer and said upper layer forming an upper pâˆ’n junction; and heating said substrate, said lower epitaxial layer, said middle epitaxial layer and said upper epitaxial layer, such that: (a) said middle layer is provided with a net carrier concentration that is highest at a midpoint between said junctions, (b) a doping profile along a line normal to the lower, middle and upper epitaxial layers is formed, in which the doping profile on one side of a centerplane of said middle layer mirrors the doping profile one an opposite side of said centerplane within said middle layer and within at least a portion of said lower and upper layers, and (c) an integral of the net doping concentration of the middle layer taken over the distance between the junctions is such that breakdown, when it occurs, is punch through breakdown, rather than avalanche breakdown.