Patent ID: 8525770
Filing Date: 2013-09-03
Classification: G09G

Abstract:
1. A liquid crystal display device, comprising: a liquid crystal display panel providing a plurality of data lines; a data distributor distributing data; a first memory and a second memory equally storing first data to be supplied to a plurality of odd-numbered data lines among the data distributed by the data distributor; a third memory and a fourth memory equally storing second data to be supplied to a plurality of even-numbered data lines among the data distributed by the data distributor; a clock generator generating a divided clock for reading and outputting the first data stored at the first memory and the second memory or the second data stored at the third memory and the fourth memory; and a parallel-to-serial converter converting a parallel data simultaneously read from the first memory and second memory or simultaneously read from the third and fourth memory into a serial data, wherein the first data read from the first memory is supplied to the odd-numbered data lines of a first line block and, at the same time, the first data read from the second memory is supplied to the odd-numbered data lines of a second line block by the clock generator, wherein the second data read from the third memory is supplied to the even-numbered data lines of the first line block and, at the same time, the second data read from the fourth memory is supplied to the even-numbered data lines of the second line block by the clock generator, wherein the first line block is located at a left region of the liquid crystal display panel, wherein the second line block is located at a right region of the liquid crystal display panel, wherein the first data from the first and second memories simultaneously are supplied to the odd-numbered data lines of the first and second line blocks, wherein the second data from the third and fourth memories simultaneously are supplied to the even-numbered data lines of the first and second line blocks, and wherein a start period of the first data of the odd-numbered data lines of the first and second line blocks is different from a start period of the second data of the even-numbered data lines of the first and second line blocks.