Patent ID: 6437449
Filing Date: 2002-08-20
Classification: H01L

Abstract:
A semiconductor device, comprising:a substrate having a plurality of electrically conductive leads arrayed around an electrically conductive die-mounting pad; a first semiconductor die mounted on the substrate, the first die having a front surface with a plurality of wire bonding pads arrayed around a periphery thereof, and an opposite back surface mounted opposed to and in electrical connection with the die-mounting pad of the substrate; a uniformly thick spacer mounted on the first die, the spacer having an outer periphery smaller than an inner periphery of the wire bonding pads on the first die, a front surface, and an opposite back surface mounted opposed to and electrically isolated from the front surface of the first die, and such that the spacer is located inside the inner periphery of the wire bonding pads thereon; at least one electrically conductive wire having opposite first and second ends, the first end being bonded to a first lead of the substrate, the die-mounting pad, or a first wire bonding pad on the first die, and the second end being bonded to the front surface of the spacer; and, a second semiconductor die mounted on the spacer with a layer of an electrically conductive material, the second die having a front surface with a plurality of wire bonding pads arrayed around a periphery thereof, and an opposite back surface being mounted opposed to and in electrical connection with the front surface of the spacer, and such that the second end of the at least one first conductive wire is embedded in the conductive layer.