Patent ID: 8558398
Filing Date: 2013-10-15
Classification: H01L

Abstract:
1. A lead frame assembly for an integrated circuit package, comprising: a lead frame having a die-attach region, a plurality of pins defining a pin array, and a ground paddle region between the die-attach region and the pin array; a die mounted on the die-attach region of the lead frame, the die having a plurality of die pads defining a die pad array parallel to the pin array; a first information signal-carrying bond wire having a first end connected to a first signal die pad of the die and a second end connected to a first signal pin of the lead frame, the first information signal-carrying bond wire extending across the ground paddle region; a second information signal-carrying bond wire having a first end connected to a second signal die pad of the die and a second end connected to a second signal pin of the lead frame, the second information signal-carrying bond wire extending across the ground paddle region; a first ground bond wire having a first end connected to a first ground die pad of the die interposed in the die pad array between the first signal die pad and second signal die pad and having a second end connected to a first ground pin of the lead frame interposed in the pin array between the first signal pin and the second signal pin, the first ground bond wire extending across the ground paddle region; a first ground down bond wire having a first end connected to the first ground die pad and a second end connected to the ground paddle region; a second ground bond wire having a first end connected to a second ground die pad of the die interposed in the die pad array between the first signal die pad and second die pad and having a second end connected to the first ground pin, the second ground bond wire extending across the ground paddle region; and a second ground down bond wire having a first end connected to the second ground die pad and a second end connected to the ground paddle region.