Patent ID: 7212050
Filing Date: 2007-05-01
Classification: H03L

Abstract:
1. A system for synthesizing an output frequency, comprising; a phase locked loop, PLL, including at least one of a phase or frequency difference detector and a variable frequency oscillator having a resonant frequency component; wherein said at least one of a phase or frequency difference detector has a feedback signal input and a reference signal input, and is effective for providing a control signal dependent on said feedback signal input and reference signal input; wherein said variable oscillator is effective for producing a variable frequency output dependent upon said control signal, said variable oscillator has a predetermined center frequency set by said resonant frequency component and has a limited frequency adjustment range about said center frequency; and a first integer frequency divider in series with a first integer frequency multiplier for accepting an input frequency signal at a predetermined input frequency and generating a reference signal for said reference signal input wherein a ratio of an integer multiplier value of said first integer frequency multiplier and an integer divisor value of said first integer frequency divider substantially matches a target ratio defined as a ratio of said predetermined center frequency and said predetermined input frequency.