Patent ID: 7411451
Filing Date: 2008-08-12
Classification: H03F

Abstract:
1. An operational amplifier circuit comprising: (a) an input stage including first and second input transistors coupled to a first tail current source and to first and second load devices, respectively; (b) a folded cascode circuit including (c) a second stage having first and second inputs coupled to the second electrodes of the first and second cascode transistors, respectively, an output conductor for conducting an output signal, and a tail current conductor coupled to a second tail current source, the tail current conductor having a node at which a voltage representative of a common mode input voltage of the second stage is established, and first and second compensation capacitors coupled to the first and second inputs, respectively, of the output stage; and (d) a bias circuit, coupled to the second stage node, for biasing control terminals of the first, second, third, and fourth controlled current sources in response to the common mode input voltage established at the tail current conductor.