Patent ID: 8085023
Filing Date: 2011-12-27
Classification: H02M

Abstract:
1. A pulse width control signal generation circuit that generates control signals corresponding to on-time of a switch element, comprising, a phase shift signal generation circuit that inputs a reference clock signal, and generates a group of signals that consists of n phase shift signals that phase delay one by one by [one cycle of the reference clock signal]/n, (n: positive integer), a first reference timing generation circuit that generates a first reference signal, a control signal generation circuit that inputs said n phase shift signals synchronized with a second reference timing signal, and generates the control signal of accuracy n time the reference clock signal corresponding to said on-time, wherein, said control signal generation circuit has, a distribution circuit that distributes on-time value N n counters that output a number of pulses corresponding to a value that is preset for a phase to delay [one cycle of the reference clock signal]/n one by one, a pulse synthesis circuit that synthesizes output pulses of said counters, and outputs a synthesized signal as the control signal.