Patent ID: 7723831
Filing Date: 2010-05-25
Classification: H01L

Abstract:
1. A semiconductor package comprising: a substrate comprising a plurality of terminal contacts, a plurality of conductors on the substrate having a plurality of bonding contacts, and a plurality of conductive vias electrically connecting the terminal contacts and the conductors; a semiconductor die mounted to the substrate in a chip on board configuration, the die comprising a circuit side, a semiconductor substrate, a back side, a recess in the semiconductor substrate on the back side, and a plurality of die contacts on the circuit side; at least one discrete component embedded in the semiconductor substrate of the die within the recess; a die attach polymer having a portion in the recess encapsulating the discrete component in the recess and a layer between the die and the substrate attaching the die to the substrate; and a plurality of interconnects bonded to the die contacts and to the bonding contacts.