Patent ID: 6124813
Filing Date: 2000-09-26
Classification: H03M

Abstract:
A digital to analog converter system, comprisinga data scrambler having an input and an output, the data scrambler comprisinga first swapper cell stage having a plurality of primary inputs, each of the primary inputs corresponding to a numbered bit position from a lower number bit position to a higher number bit position, the first swapper cell stage comprising a first plurality of swapper cells, each having a first input, a second input, a first output and a second output,a second swapper cell stage comprising a second plurality of swapper cells, each having a first input and a second input, the inputs of the second plurality of swapper cells being coupled to the outputs of the first plurality of swapper cells,one or more subsequent swapper cell stages, comprising a third plurality of swapper cells, each having a first input and a second input, anda set of connections among the second plurality of swapper cells and the third plurality of swapper cells, the connections being arranged so that each of a plurality of the third plurality of swapper cells can only receive on its first input a signal passed from a primary input corresponding to a lower number bit position than any number bit position corresponding to a signal that can be passed to its second input; anda circuit to convert the output of the data scrambler to an analog signal.