Patent ID: 8034676
Filing Date: 2011-10-11
Classification: B82Y,H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor device comprising: forming a plurality of origin patterns containing a metal catalyst over a semiconductor substrate; next, forming an insulating film covering said origin patterns; next, forming, in said insulating film, a trench allowing at both ends thereof side faces of said origin patterns to expose; forming a wiring by allowing carbon nanotubes having a conductive chirality to grow in said trench; and forming an interlayer insulating film covering said carbon nanotubes, and further comprising, prior to said forming an interlayer insulating film, forming a protective film covering said carbon nanotubes in said trench; and removing, by chemical mechanical polishing, said carbon nanotubes grown at a level above top surfaces of said origin patterns and said protective film at the same time.