Patent ID: 7378899
Filing Date: 2008-05-27
Classification: H03K

Abstract:
1. A semiconductor integrated circuit comprising: a circuit as a controlled object including a logic circuit and a plurality of MOS transistors, wherein an output of the logic circuit is input to a gate terminal of at least one MOS transistor of the plurality of MOS transistors and a substrate potential of the at least one MOS transistor is to be controlled; a control signal generation circuit for substrate potential generating a control signal to control the substrate potential based on an input signal of the logic circuit; and a substrate potential control circuit controlling the substrate potential of the at least one MOS transistor in the circuit as the controlled object based on the control signal; wherein the at least one MOS transistor includes a latch circuit for holding data, and wherein the latch circuit includes a clock input and holds data in synchronism with a clock signal input to the clock input.