Patent ID: 6544815
Filing Date: 2003-04-08
Classification: H01L,H05K

Abstract:
A method of assembling a chip stack, comprising the steps of:(a) providing a transposer panel which has opposed surfaces and a plurality of conductive pads disposed on the opposed surfaces thereof; (b) providing at least two base panels which each have opposed surfaces and a plurality of conductive pads disposed on the opposed surfaces thereof; (c) providing at least one unitary frame panel which has opposed surfaces and a plurality of conductive pads disposed on the opposed surfaces thereof; (d) providing a plurality of integrated circuit chips which each have opposed sides and a plurality of conductive contacts disposed on one of the sides thereof; (e) placing integrated circuit chips upon each of the base panels such that the conductive contacts of each of the integrated circuit chips are disposed on at least some of the conductive pads of respective ones of the base panels; (f) stacking one of the base panels upon the transposer panel such that at least some of the conductive pads of the base panel are disposed on at least some of the conductive pads of the transposer panel; (g) stacking the frame panel upon the base panel such that at least some of the conductive pads of the frame panel are disposed on at least some of the conductive pads of the base panel and such that the frame panel at least partially circumvents the integrated circuit chips; and (h) stacking another base panel upon the frame panel such that at least some of the conductive pads of the base panel are disposed on at least some of the conductive pads of the frame panel.