Patent ID: 7319063
Filing Date: 2008-01-15
Classification: H01L

Abstract:
1. A method for manufacturing a fin field effect transistor comprising a fully silicidated gate electrode suitable for a substrate comprising a fin structure, a straddle gate and a source/drain region formed thereon, wherein the straddle gate straddles over the fin structure and the source/drain region is located in a portion of the fin structure exposed by the straddle gate, and the method comprising steps of: performing a first salicide process to form a first salicide layer on the top of the straddle gate and a second salicide layer on the source/drain region; forming a dielectric layer over the wafer; performing a planarization process to remove a portion of the dielectric layer and of the first salicide layer until the surface of the straddle gate is exposed; and performing a second salicide process to convert the straddle gate into a fully silicidated gate electrode.