Patent ID: 6272592
Filing Date: 2001-08-07
Classification: G06F

Abstract:
An improved cache memory device for use in a data processing system which includes an addressable main memory (MP); at least one request input/output (ESRQ) for receiving a request (Rfor access to a data item stored in the addressable main memory (MP) or in the cache memory device, the request (RQ) including a main address (AP) of the desired data item; at least one main memory input/output (ESMP) connected to the main addressable memory (MP) for accessing the desired data item of the main memory; a plurality of X memory banks (BCi) with i being less than or equal to X and greater than 0, each having a number Li of lines capable of containing data, these lines being capable of being individually designated by a local address (ALi) in each bank (BCi); computing means (CAL) connected to the request input/output (ESRQ) and capable of answering the request (Rby transforming the main address (AP) contained in this request to a local address (AL) inside each of the banks (BCi), the line thus designated in the bank (BCi) being the only line of the said bank that is capable of containing the data labelled by the main address; and loading means (CHA) connected to the main memory input/output (ESMP) for loading the data line of the main memory containing the desired data item into the cache memory device if it is not present in the cache memory device, wherein the improvement comprises:the computing means (CAL) comprises means for transforming the main address (AP) into a first local address in a first one of the memory banks in accordance with a first predetermined law associated with the first one of the memory banks, and for transforming the main address (AP) into a second local address in a second one of the memory banks in accordance with a second predetermined law which is associated with the second one of the memory banks,the first and second predetermined laws are distinct, andthe first and second memory banks are addressed separately, according to their respective law.