Patent ID: 6366627
Filing Date: 2002-04-02
Classification: H04B

Abstract:
A compressive-receiver circuit comprising:A. a dispersive delay line having an input port and an output port and having a substantially linear relationship between the frequency of a signal and the delay time required for that signal to travel from the input port to the output port; and B. an input circuit including a time compressor and a frequency translator in series, said time compressor being connected to provide a time compressed signal to said frequency translator, for generating and applying to the input port of said delay line an output generated by time compressing an input signal and frequency translating it by a frequency that sweeps repeatedly at such a rate that all components of the output signal derived from a given frequency component of the input signal and translated during a given sweep of the frequency translator arrive at the output port of the delay line at substantially the same time while those derived from different frequency components arrive at different times, the difference between the times of arrival at the delay-line output port of signals caused by different-frequency signals at the signal-compressor input port thereby being greater than it would be without the time compression.