Patent ID: 6111925
Filing Date: 2000-08-29
Classification: H03K

Abstract:
A timing signal synchronization circuit to synchronize an internal timing signal of an integrated circuit with an external timing signal within one cycle of said external timing signal, comprising:a) an input buffer subcircuit to receive, buffer, and amplify said external timing signal, whereby said input buffer subcircuit has a first delay factor that is a delay time of a received external timing signal from said external timing signal;b) a fixed delay line circuit connected to the input buffer subcircuit to delay the received external timing signal by a second delay factor to create a first timing signal;c) a first measurement delay line connected to the fixed delay line to receive the first timing signal, to measure a first part of a period of said first timing signal and to retain said measurement of said first part of said period;d) a second measurement delay line connected to the fixed delay line to receive the first timing signal, to measure a second part of the period of said first timing signal and to retain said measurement of said second part of said period;e) a first latch array connected to the first measurement delay line to receive said measurement of the first period and to create a first latch signal;f) a second latch array connected to the second measurement delay line to receive said measurement of the second period and to create a second latch signal;g) a variable delay line connected to the first and second latch array to receive the first and second latch signal to adjust a delay time of said variable delay line to values of the measurements of the first and second parts of the period of the first timing signal less the second delay factor, and connected to the fixed delay line to receive the first timing signal and to delay said first timing signal by the delay time said variable delay line to create a second timing signal; andh) an internal buffer subcircuit to receive, buffer, amplify, and delay by a third delay factor the second timing signal to create the internal timing signal that is synchronized with said external timing signal to circuitry within said integrated circuit.