Patent ID: 7200093
Filing Date: 2007-04-03
Classification: G11B,H03L

Abstract:
1. A clock generator for generating a non-phase-modulated target clock signal based on a phase-modulated input signal, the clock generator comprising: an operation circuit for calculating a cycle value by calculating the number of cycles of an oscillating signal during a cycle of the input signal and for comparing the cycle value with a critical value for outputting a first protection signal; and a phase-locked loop connected to the operation circuit for generating the target clock signal according to the first protection signal and the input signal, feeding the target clock signal back to the input of the phase-locked loop, and determining whether the target clock signal is to be synchronized with the input signal based on the logic level of the first protection signal; wherein the target clock signal is generated based on the oscillating signal, when the first protection signal corresponds to a first logic level, the phase-locked loop compares the target clock signal with the input signal to drive the target clock signal to be synchronized with the input signal, and when the first protection signal corresponds to a second logic level, the phase-locked loop holds the target clock signal without driving the target clock signal to be synchronized with the input signal.