Patent ID: 6204722
Filing Date: 2001-03-20
Classification: G11C

Abstract:
Electronic circuit for generating a stable voltage signal for polarization during a reading step of a UPROM redundancy cell incorporating at least one memory element of EPROM or Flash type, having at least one terminal to be polarized, and MOS transistors which connect the memory element to a low voltage power supply reference, the electronic circuit comprising:a current mirror structure with a control branch and an output branch, the current mirror structure including:a first series of MOS transistors in said control branch between the supply reference and a ground; anda second series of transistors in said output branch;an input terminal connected to the gate terminal of a transistor of the first series of transistors;an output terminal corresponding to an interconnection node of the second series of transistors; anda switch-off transistor having a gate terminal connected downstream of said input terminal and a conduction terminal connected to an interconnection node between the control and output branches of the circuit;wherein said stable voltage signal being obtained through a current which passes through a pair of transistors of said second series of transistors.