Patent ID: 7344916
Filing Date: 2008-03-18
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, comprising the steps of: providing an interposer having first and second surfaces, said first surface including patterned metal conductors and bond pads, and said second surface including a plurality of solder balls; disposing on said first surface of said interposer a layer of polymeric material having an area sufficient to cover said plurality of solder balls; the layer of polymeric material including a first layer of a thermally conductive, electrically insulating layer contacting the interposer; and a second metal filled, electrically and thermally conductive polymeric adhesive layer superimposed on the first layer; providing a semiconductor chip having a top surface and a back surface, said top surface including a plurality of terminals; mounting said chip on said polymeric material; and connecting said bond pads on said interposer to said terminals on said chip.