Patent ID: 6790712
Filing Date: 2004-09-14
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, comprising the steps of:providing a substrate having a first side and an opposing second side, and forming an opening penetrating the substrate, wherein a plurality of conductive traces are disposed on the first side of the substrate; attaching a tape to the second side of the substrate for covering one end of the opening of the substrate, wherein the tape is dimensionally larger than the opening; providing a chip having an active side and an opposing inactive side, and accommodating the chip in the opening of the substrate in a manner that the inactive side of the chip is attached to the tape, wherein the chip is dimensionally smaller in surface area than the opening; forming a plurality of first conductive elements for connecting the active side of the chip to the conductive traces on the substrate, so as to establish electrical connection between the chip and the substrate; disposing a plurality of array-arranged second conductive elements on the first side of the substrate, wherein the second conductive elements are electrically connected to the conductive traces on the substrate; and forming a first encapsulant on the first side of the substrate for encapsulating the chip, the first conductive elements, the second conductive elements and the conductive traces, in a manner as not to encapsulate the tape and the second side of the substrate, wherein bottom sides of the second conductive elements are exposed to outside of the first encapsulant, and coplanarly positioned with a bottom side of the first encapsulant beneath the first side of the substrate.