Patent ID: 8183620
Filing Date: 2012-05-22
Classification: H01L

Abstract:
1. A semiconductor memory comprising: a semiconductor substrate; memory cell transistors disposed on the semiconductor substrate, each memory cell transistor comprising: a tunnel insulating film on the semiconductor substrate and in contact with a device isolating film, a floating gate electrode on the tunnel insulating film, a first insulating film on the floating gate electrode, and a control gate electrode on the first insulating film; and a transistor disposed on the semiconductor substrate, the transistor comprising: a first source region and a first drain region surrounded by the device isolating film, and including the first conductive type impurity, a first gate insulating film between the first source region and the first drain region, a first conductive film on the first gate insulating film, a second insulating film on the first conductive film and having a first trench penetrating the second insulating film, and a second conductive film provided on the second insulating film, connecting to the first conductive film via the first trench, and including the first conductive type impurity and a second conductive type impurity, a concentration of the second conductive type impurity being higher than that of the first conductive type impurity in the second conductive film.