Patent ID: 8886893
Filing Date: 2014-11-11
Classification: G06F,G11C

Abstract:
1. A semiconductor device comprising a request interface circuit and a response interface circuit, wherein the request interface circuit has a plurality of request queues, the response interface circuit has a plurality of response queues, and the request interface circuit receives a request including (i) a queue reservation instruction for reserving one or more request queues from among the plurality of request queues and one or more response queues from among the plurality of response queues and (ii) a number of queues to be reserved, wherein the semiconductor device includes a plurality of serially connected memory devices, and each of the plurality of memory devices (i) includes the request interface circuit and the response interface circuit, (ii) has a respective plurality of request queues for transmitting and receiving requests and a respective plurality of response queues for transmitting and receiving responses, (iii) receives the request, (iv) has an ID register for storing an ID number of the memory devices, and (v) has a comparison circuit for comparing a value of the request to the ID number of the memory devices.