Patent ID: 8890161
Filing Date: 2014-11-18
Classification: G02F,H01L

Abstract:
1. A method for fabricating a thin film transistor substrate comprising the steps of: a first mask step forming a first conductive pattern on a substrate to include a gate electrode and a gate line; a second mask step depositing a gate insulating film on the substrate having the first conductive pattern formed thereon and forming a second conductive pattern on the gate insulating film to include a semiconductor pattern, source and drain electrodes and a data line; a third mask step depositing a first protective film on the substrate having the second conductive pattern formed thereon and forming a pixel contact hole for exposing the drain electrode passed through the first protective film; a fourth mask step forming a third conductive pattern on the protective films to have a common electrode and a common line and a second protective film to form an undercut with the common electrode and to include a pixel contact hole which exposes the drain electrode on the common electrode; and a fifth mask step forming a fourth conductive pattern to include a pixel electrode spaced from the common electrode by a space provided by the undercut.