Patent ID: 7788608
Filing Date: 2010-08-31
Classification: H01L,H02M,H05K

Abstract:
1. An integrated circuit comprising: four microbumps disposed on a major surface of the integrated circuit, wherein the four microbumps are arranged in a square pattern such that one of the four microbumps is disposed at a respective corner of the square, and wherein there are no microbumps other than the four microbumps disposed on the major surface within the square; a buck converter having a P-channel transistor, an N-channel transistor, and a control circuit, wherein a first of the four microbumps is connected to a source of the P-channel transistor, wherein a drain of the P-channel transistor is connected to a drain of the N-channel transistor and to a second of the four microbumps, wherein a source of the N-channel transistor is connected to a third of the four microbumps, and wherein a fourth of the four microbumps is connected to a feedback input of the control circuit; additional microbumps disposed on the major surface of the integrated circuit, wherein the additional microbumps and the four microbumps are arranged on a regular grid, and wherein the buck converter receives control signals through the additional microbumps; a first interconnection bus portion; and a second interconnection bus portion, wherein the four microbumps, the buck converter and the first interconnection bus portion are part of a first tile of the integrated circuit, wherein the additional microbumps and the second interconnection bus portion are part of a second tile of the integrated circuit, and wherein the first interconnection bus portion links up with the second interconnection bus portion.