Patent ID: 7348793
Filing Date: 2008-03-25
Classification: G01R

Abstract:
1. Apparatus for detection and prevention of bulk CMOS latchup comprising: at least one sensor for monitoring current flow in a bias voltage applied to at least one of an N well and a P well of the CMOS circuitry; a latchup event being detected responsive to a predefined increase in the monitored current flow; at least one switch being coupled between a respective voltage supply rail and at least one of the N well and the P well of the CMOS circuitry and the CMOS circuitry voltage supply rail; a switch control coupled between said at least one sensor and said at least one switch for temporarily interrupting a connection of at least one of the N well and the P well and the CMOS circuitry voltage supply rail to voltage supply rail responsive to the latchup event being detected.