Patent ID: 6630848
Filing Date: 2003-10-07
Classification: G11C

Abstract:
A track and hold circuit comprising:an amplifier having an inverted input terminal to which input signals are applied in a track mode; a hold capacitor having a first end electrically connected to an output of the amplifier and a second end electrically connected to the inverted input terminal of the amplifier in a hold mode; a first MOS transistor switch connected between the second end of the hold capacitor and the inverted input terminal; a second MOS transistor switch located between the second end of the hold capacitor and a common potential point; a third MOS transistor switch connected between an input signal terminal and the inverted input terminal; a fourth MOS transistor switch connected between the input signal terminal and the common potential point; and a constant voltage circuit connected to a bulk terminal of the first, second, third, and fourth MOS transistor switches.