Patent ID: 6747509
Filing Date: 2004-06-08
Classification: G11C,H01L

Abstract:
A semiconductor integrated circuit comprising:a plurality of sets of logic circuits formed over a semiconductor substrate; a plurality of first sub-power supply lines extending in a first direction; a plurality of second sub-power supply lines, each connected at two or more intersection portions to said first sub-power supply lines, extending in a second direction crossing to said first direction; a main power supply line extending in said second direction; and a plurality of first switching transistors for connecting said first sub-power supply lines to said main power supply line extending in said second direction, wherein said plurality of sets of logic circuits are connected to said plurality of first sub-power supply lines, respectively, so that a plurality of said logic circuits are arranged along each of said first sub-power supply lines in said first direction so that said logic circuits are arranged along said first sub-power supply lines to extend perpendicular to said main power supply line; wherein said first switching transistors are kept off in an operation stop state of said logic circuits, wherein said first switching transistors are kept on in an operable state of said logic circuits.