Patent ID: 6800525
Filing Date: 2004-10-05
Classification: H01L

Abstract:
A method of manufacturing a split gate flash memory device, comprising the steps of:(a) providing a semiconductor substrate of a conductivity type opposite to that of a first junction region, the semiconductor substrate being provided with a floating gate, a first spacer surrounding the floating gate, the first junction region of a constant conductivity type, which is overlapped with the first spacer and is formed on the substrate, and a first conductive line contacted with the first spacer and formed on the first junction region; (b) sequentially forming a first dielectric film, a first conductive film, a second dielectric film and a third dielectric film on an overall upper face of the substrate; (c) planarizing the third dielectric film by a given thickness so as to expose the second dielectric film; (d) removing the exposed second dielectric film, and eliminating the remaining third dielectric film; (e) planarizing the first conductive film and the second dielectric film by a given thickness so as to partially expose the first conductive line and the first conductive film; (f) forming a fourth dielectric film on a portion of the exposed first conductive line and first conductive film; (g) eliminating the remaining second dielectric film, and exposing the first conductive film provided in a lower part thereof; (h) etching the first dielectric film and the first conductive film exposed by the removal of the second dielectric film using the fourth dielectric film as an etch mask, and forming a second gate dielectric film and a word line; (i) forming a second spacer on a sidewall of the word line; (j) forming a second junction region of a conductivity type the same as that of the first junction region on the substrate, said second junction region being overlapped with the word line and the second spacer; (k) forming an interlayer dielectric film having a contact hole for exposing the second junction region, on an entire upper face of the substrate; and (l) forming a second conductive line contacted with the second junction region through the contact hole.