Patent ID: 8279672
Filing Date: 2012-10-02
Classification: G11C

Abstract:
1. A nonvolatile memory, comprising: a plurality of data memory sectors each including a plurality of memory blocks, the plurality of memory blocks each including a pair of memory cells as a complementary type; and a control circuit which controls writing of user data in the memory blocks; and detects one bit data by an electric potential difference of the pair of the memory cells, wherein the plurality of memory blocks each includes: wherein the control circuit decides a data storage area that will be a storage destination of the user data based on a relative difference relation of the discriminative data of respective memory blocks, and changes the discriminative data of the discrimination area corresponding to the data storage area in which the user data was written to a value different from that before the writing, wherein the discriminative data includes a first state where one memory cell of the pair of memory cells is set to an erased state and another memory cell of the pair of memory cells is set to a writing state, and a second state where one memory cell of the pair of memory cells is set to a writing state and another memory the pair of memory cells is set to an erased state, wherein the transition from the first state to the second state occurs by performing, in the first state, writing on another memory cell that is in the erased state without writing on one memory cell that is in the writing state, and wherein a written threshold voltage value of one memory cell is more than a written threshold voltage value of another memory cell.