Patent ID: 9117510
Filing Date: 2015-08-25
Classification: G11C

Abstract:
1. An electrical circuit for improving a write data operation to a memory device electrically coupled to a supply voltage, said supply voltage having a specified nominal supply voltage level, comprising: a voltage adjustment circuitry, said voltage adjustment circuitry having at least one voltage level control signal output to selectably control said supply voltage to output one of a plurality of different voltages, at least one of the plurality of different voltages having a voltage level lower than said specified nominal supply voltage level; a timing adjustment circuitry, said timing adjustment circuitry having at least one voltage transition timing control signal output to selectably control said supply voltage to output one of a plurality of different selectable logical state transition timings; and a supply voltage circuitry, said supply voltage circuitry electrically coupled to said voltage adjustment circuitry having at least one voltage level control signal output, the at least one voltage level control signal output causing said supply voltage circuitry output one of a plurality of different voltages, at least one of said plurality of different voltages being selected and electrically coupled to said memory device to selectably decrease a voltage level provided to said memory device during said write data operation, and said supply voltage circuitry electrically coupled to said timing adjustment circuitry having at least one voltage transition timing control signal output, the at least one voltage transition timing control signal output causing said supply voltage circuitry to output one of said plurality of different selectable logical state transition timings to alter a length of time before said at least one of said plurality of different voltages transitions back to said specified nominal supply voltage level.