Patent ID: 7734971
Filing Date: 2010-06-08
Classification: G01R,G06F

Abstract:
1. An integrated circuit comprising: A. a substrate carrying a serial data input lead, a serial data output lead, a select lead, and a clock lead; B. functional circuitry on the substrate having data input leads and data output leads; C. test access port circuitry on the substrate having: D. scan test port circuitry on the substrate having: E. connection circuitry on the substrate coupling the scan test port circuitry to the test access port circuitry, the connection circuitry having control inputs connected to the scan circuitry control output leads, the select lead, and the clock lead, and the connection circuitry having control outputs connected to the capture select input lead, and the scan clock input lead; and F. a lead connected between the scan output lead and the first input of the multiplexer.