Patent ID: 6150891
Filing Date: 2000-11-21
Classification: H03D,H03J,H03L,H04B

Abstract:
A method of operating a frequency synthesizer having a phase locked loop, comprising:providing a controllable oscillator;generating a plurality of signals having phase shifted edges;utilizing the plurality of signals having phase shifted edges to provide a plurality of oscillator control signals;utilizing the plurality of control signals as inputs to the controllable oscillator, at least two of the control signals individually controlling the controllable oscillator without being combined with others of the plurality of control signals;utilizing an output of the phase locked loop to generate the plurality of signals having phase shifted edges;generating a first clock signal having a first frequency; andgenerating a second clock signal having a second frequency, the second frequency greater than the first frequency, wherein the plurality of signals having phase shifted edges are generated using the first and second signals.