Patent ID: 6030866
Filing Date: 2000-02-29
Classification: H01L

Abstract:
A method of manufacturing a capacitor comprising the steps of:providing a semiconductor substrate,sequentially forming at least one insulating layer and an etch stop layer over the semiconductor substrate;selectively etching said etch stop layer and said insulating layer to form at least one contact hole therein;forming a plug within said contact hole;forming an insulating pillar on said plug and on the etch stop layer disposed adjacent to said plug;forming a dielectric layer on the sides of said pillar;removing said pillar and forming a conductive layer over said dielectric layer and the surface of said etch stop layer and said plug; andforming an insulating layer over said conductive layer and etching said insulating layer and said conductive layer to expose an upper portion of said dielectric layer to form a planar surface of the insulating layer with the conductive layer and the dielectric layer.