Patent ID: 7478303
Filing Date: 2009-01-13
Classification: H04L

Abstract:
1. A system for testing nodes in a network, the network including a plurality of nodes, the system comprising: at least one bus to couple the plurality of nodes and to send any commands to at least one of the plurality of nodes; a control processor to generate the test commands to be sent to the at least one node of the plurality of nodes and to receive response data that is responsive to the test commands, wherein the test commands include instructions to generate packets, and wherein the test commands exercise all valid combinations of the bits in the packets that are associated with testing registers; and a back channel to couple the control processor to the at least one node, wherein the control processor uses the back channel to send the test commands to the at least one node and to bypass the at least one bus during testing, wherein bypassing the bus during testing eliminates testing problems associated with sending the test commands to the at least one node using the at least one bus when the at least one bus is not functioning properly.