Patent ID: 6703691
Filing Date: 2004-03-09
Classification: H01L

Abstract:
A semiconductor package, which comprises:(a) a leadframe including a plurality of leads, a chip-support-and-grounding structure, and at least one ground wing, wherein the chip-support-and-grounding structure serves both as a die pad and a ground bus, and the ground wing is electrically linked to the chip-support-and-grounding structure, and wherein the chip-support-and-grounding structure includes a pair of ground bars having a gap therebetween; (b) at least one semiconductor chip of central-pad type having an active surface and an inactive surface and having at least one row of bond pads arranged along a center line on the active surface thereof, the semiconductor chip being attached to the leadframe in such a manner that its active surface is adhered to the chip-support-and-grounding structure and its bond pads are aligned to and exposed via the gap between the pair of ground bars of the chip-support-and-grounding structure; (c) a set of bonding wires for electrically coupling the semiconductor chip to the leads, wherein a subset of the bonding wires are connected from selected ones of the bond pads to the chip-support-and-grounding structure; and (d) an encapsulation body for encapsulating the semiconductor chip and the leadframe, while exposing the ground wing as well as the outer portions of the leads to the outside of the encapsulation body.