Patent ID: 7282406
Filing Date: 2007-10-16
Classification: H01L

Abstract:
1. A method of forming an MOS transistor comprising: providing a substrate having a first conductivity type and having a first surface; forming a first doped region of a second conductivity type within at least a portion of the substrate and having a first peak doping concentration; forming a second doped region of the first conductivity type overlying at least a portion of the first doped region and having a second peak doping that is no greater than the first peak doping concentration; forming a third doped region of the first conductivity type overlying at least a portion of the second doped region and having a third peak doping concentration that is greater than the second peak doping concentration; and forming an opening into the substrate with the opening having a sidewall juxtaposed to the first doped region and the second doped region.