Patent ID: 7465609
Filing Date: 2008-12-16
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, comprising the steps of: mounting a plurality of semiconductor chips on a printed wiring board on which conductor patterns and a protective insulation film are formed, and electrically connecting external electrodes of the plurality of semiconductor chips and the conductor patterns of the printed wiring board with bonding wires; molding the bonding wires and the plurality of semiconductor chips on the printed wiring board by a transfer mold technology using a metal mold; and individually separating and cutting out a region in which the plurality of semiconductor chips are mounted into each region in which each semiconductor chip is mounted by cutting the printed wiring board; the conductor patterns being formed on a surface on which the plurality of semiconductor chips are mounted and on a back surface of the printed wiring board, and the protective insulation film being formed on a back surface side of the printed wiring board, wherein in the molding step, when mold clamping is performed to the printed wiring board with the metal mold having an upper die comprising a mold cavity arranged on a face side on which the plurality of semiconductor chips are mounted of the printed wiring board and a lower die to make adsorb the back surface of the surface on which the plurality of semiconductor chips are mounted of the printed wiring board, inside an adsorption region in the adsorption region of the back surface of the printed wiring board and the lower die and in a vicinity of an end portion opposing an end portion of a gate side which pours mold resin into the mold cavity, exhaust holes reaching an exterior space of the lower die from the adsorption region of the back surface of the printed wiring board and the lower die, are formed with an interval which is narrower than a pitch that the plurality of semiconductor chips are arranged, wherein irregularity of a surface of the protective insulation film of the printed wiring board is less than one-tenth of film thickness of the conductor pattern of the printed wiring board, and wherein in the molding step, a metal mold in which lower die, inside an adsorption region in the adsorption region of the back surface of the printed wiring board and the lower die and in a vicinity of an end portion opposing an end portion of the gate side which pours mold resin into the mold cavity, exhaust holes adsorbing the back surface of the printed wiring board and the lower die are formed with an interval which is narrower than a pitch that the plurality of semiconductor chips are arranged, is used.