Patent ID: 9104425
Filing Date: 2015-08-11
Classification: G06F

Abstract:
1. A data processing apparatus comprising: processing circuitry configured to process data in one of a plurality of exception states including a base level exception state and at least one further level exception state; a base level stack pointer register for storing a base level stack pointer indicating the location within a memory of a base level stack data store; at least one further level stack pointer register for storing at least one further level stack pointer indicating the location within said memory of at least one further level stack data store, the at least one further level exception state each having a corresponding further level stack pointer; wherein: when processing data in a current further level exception state, said processing circuitry is configured to use a current stack data store indicated by a current stack pointer; said data processing apparatus comprises a stack pointer selection register configured to store a stack pointer selection value controlling whether the current stack pointer is the base level stack pointer or a current further level stack pointer corresponding to said current further level exception state; and said processing circuitry is responsive to a stack pointer selection instruction to modify the stack pointer selection value to indicate, as the current stack pointer, one of said base level stack pointer and said current further level stack pointer specified by said stack pointer selection instruction.