Patent ID: 8124477
Filing Date: 2012-02-28
Classification: H01L

Abstract:
1. A method for manufacturing a non-volatile semiconductor memory device comprising: (a) forming a first gate electrode of a memory cell transistor and a second gate electrode of a periphery circuitry transistor on a substrate; (b) injecting low concentration impurity ions to the substrate using the first gate electrode and the second gate electrode as a mask; (c) forming an electric charge accumulation layer made of an insulating layer in a region containing the first and second gate electrodes and forming a protection pattern covering the first gate electrode and the electric charge accumulation layer; (d) etching to remove the electric charge accumulation layer at the second gate electrode using the protection pattern as a mask; (e) forming a sidewall made of an insulating film on the first gate electrode and the second gate electrode after removing the protection pattern; and (f) injecting high concentration impurity ions to the substrate using the first gate electrode, the second gate electrode, and the sidewall as a mask.