Patent ID: 8188545
Filing Date: 2012-05-29
Classification: G02F,G09G,H01L

Abstract:
1. A semiconductor integrated circuit having a first side, a second side, a third side and a fourth side, the first side being shorter than the second side, the third side being shorter than the fourth side, the first side being opposite to the third side, the second side being opposite to the fourth side, a first direction being a direction from the first side toward the third side, and a second direction being a direction from the second side toward the fourth side, the semiconductor integrated circuit comprising: a first interface region provided along the fourth side of the semiconductor integrated circuit, the first interface region including a plurality of first pads arranged in the first direction in a plan view, the first interface region including a plurality of second pads arranged in the first direction in a plan view, a row of the plurality of first pads being positioned between the fourth side of the semiconductor integrated circuit and a row of the plurality of second pads in a plan view; a second interface region provided along the second side, the second interface region including a plurality of third pads arranged in the first direction in a plan view; and a plurality of circuit blocks positioned between the first interface region and the second interface region, the plurality of circuit blocks being arranged in the first direction in a plan view, the plurality of circuit blocks including a data driver block that drives at least a data line of a display panel, the data driver block including at least a data latch circuit, a D/A conversion circuit, and an operational amplifier, no other circuit blocks of the plurality of circuit blocks being positioned between the data driver block and the first interface region in the second direction in a plan view, no other circuit blocks of the plurality of circuit blocks being positioned between the data driver block and the second interface region in the second direction in a plan view, one of the plurality of first pads having an approximately rectangular shape having a long side along the second direction and a short side along the first direction in a plan view, the one of the plurality of first pads being electrically connected with a first one of a plurality of electronic discharge protection elements and a second one of the plurality of electronic discharge protection elements, the first one of the plurality of electronic discharge protection elements being electrically connected with a first power supply line and the one of the plurality of first pads, the second one of the plurality of electronic discharge protection elements being electrically connected with a second power supply line and the one of the plurality of first pads, at least a part of the first one of the plurality of electronic discharge protection elements and at least a part of the second one of the plurality of electronic discharge protection elements being positioned underneath the one of the plurality of first pads, an impurity layer of at least one of the first one of the plurality of electronic discharge protection elements and the second one of the plurality of electronic discharge protection elements having a shape in which a dimension in the first direction is greater than a dimension in the second direction.