Patent ID: 8853763
Filing Date: 2014-10-07
Classification: H01L

Abstract:
1. A non-volatile memory array, comprising: a plurality of columns of charge storage regions overlying a substrate with a layer of dielectric material therebetween, the charge storage regions of columns adjacent in a row direction having sidewalls extending in a column direction, the row direction being perpendicular to the column direction; an encapsulating oxynitride film overlying the sidewalls of the charge storage regions; a plurality of isolation trenches formed in the substrate between columns of charge storage regions adjacent in the row direction, the isolation trenches extending in the column direction and being filled with an insulating material, the insulating material being recessed between adjacent columns of charge storage regions; an intermediate dielectric layer overlying the charge storage regions and the insulating material; and a plurality of word lines extending over a row of charge storage regions with the intermediate dielectric layer therebetween.