Patent ID: 8119471
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device including a vertical double-diffused metal-oxide-semiconductor (VDMOS) transistor comprising: providing a semiconductor substrate of a first conductivity type; forming a buried layer of a second conductivity type comprising a drain region on the semiconductor substrate; forming an epitaxial layer of the second conductivity type on the buried layer and the semiconductor substrate, wherein the epitaxial layer and the semiconductor substrate constituted a semiconductor layer; forming a drift region of the second conductivity type in the semiconductor layer, wherein the drift region having a lower impurity concentration than that of the buried layer; forming plural body regions of the first conductivity type in the drift region, each of the plural body regions including a source region; forming a drain extracting region of the second conductivity type to enclose an outer circumference of the drift region, wherein the drain extracting region having a higher impurity concentration than that of the drift region; forming a separation insulating film on the semiconductor layer to enclose the outer circumference of the drift region; and forming at least two gate electrodes on the semiconductor layer over at least one of the body regions, wherein each adjacent gate electrodes of the at least two gate electrode providing an opening over the source region; wherein the buried layer includes a first buried region formed below an entire region of the drift region and the drain extracting region, and a second buried region being protruded from the center of the first buried region and spaced apart from the drain extracting region, wherein the entire upper surface of the first buried region is planar.