Patent ID: 7913118
Filing Date: 2011-03-22
Classification: G06F

Abstract:
1. An in-circuit debugging (ICD) system, comprising: at least a first target processor having an embedded debug module (EDM), where the first target processor performs a program code in a normal mode and the first EDM controls the first target processor in a debug mode; a debug information memory (DIM), for storing debug information for debugging in the debug mode, wherein the DIM is invisible to the first target processor when the first target processor operates in the normal mode; a debug host having a debug software, for debugging the program code by using the debug information in the debug mode; and an in-circuit debugging bridge (ICD bridge) having a host debug module (HDM) coupled to the first EDM, the ICD bridge being coupled between the first target processor and the debug host and utilized for bridging information communicated between the first target processor and the debug host.