Patent ID: 7906432
Filing Date: 2011-03-15
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device, including a semiconductor substrate, which includes a real cell region and a scribe line region, the method comprising: etching parts of the semiconductor substrate to form a step in the semiconductor substrate of the scribe line region and to form a source contact hole in the real cell region; forming a conductive layer on the entire surface including the semiconductor substrate so that the shape of the step in the scribe line region is maintained and the source contact hole in the real cell region is filled; performing a chemical mechanical polishing process to form a source contact plug in the real cell region; forming an insulating layer on the entire surface including the conductive layer so that the shape of the step in the scribe line region is maintained; and forming a hard mask on the insulating layer to form a drain contact plug in the real cell region so that the shape of the step in the scribe line region is maintained, wherein the step in the scribe line region is used as an overlay vernier when the drain contact plug is formed.