Patent ID: 6303415
Filing Date: 2001-10-16
Classification: G02B,H01L,Y10S

Abstract:
A method of fabricating a semiconductor device comprising the steps of:forming a semiconductor film comprising crystalline silicon over a substrate, said semiconductor film containing a catalytic element for promoting crystallization of said semiconductor film;forming an active layer of a thin film transistor by patterning said semiconductor film;forming a gate electrode adjacent to said active layer with a gate insulating film interposed therebetween, said gate electrodes comprising tantalum;introducing phosphorus into source and drain regions in said active layer; and thenperforming a heat treatment at a temperature of 550 to 700.degree. C. to getter said catalytic element in said active layers into the source and drain regions introduced with phosphorus, whereby a concentration of said element in said source and drain regions is higher than that in other regions in said active layer,wherein said gate electrode has heat-resistance to the heat treatment.