Patent ID: 8184757
Filing Date: 2012-05-22
Classification: G01R,H04L

Abstract:
1. A circuit, comprising: clock and data recovery (CDR) circuitry, which receives a first input signal, and which outputs a recovered clock signal and a recovered bit-stream; a scope slicer, which receives a voltage threshold, a scope clock signal, and a second input signal associated with the first input signal, and which outputs a scope bit-stream; phase sweeping circuitry, which receives the recovered clock signal, and which outputs the scope clock signal, wherein the phase sweeping circuitry is capable of varying a phase difference between the recovered clock signal and the scope clock signal; voltage sweeping circuitry which is capable of varying the voltage threshold; and eye-diagram data collection circuitry, which is capable of detecting one or more bit-patterns in the recovered bit-stream, and which is capable of modifying values of one or more scope counters based solely or partly on the scope bit-stream and the recovered bit-stream.