Patent ID: 8034660
Filing Date: 2011-10-11
Classification: H01L

Abstract:
1. A method of forming an electronic assembly adapted for bonding a top packaged IC thereon to form a package on package (PoP) device, comprising: providing (i) a bottom package substrate comprising a substrate top surface having at least one molded IC die bonded thereto, said molded IC die defining a mold cap height, said substrate top surface having substrate contact pads lateral to said molded IC die, and (ii) an interposer comprising an interposer substrate having bottom metal land pads on a bottom side of said interposer substrate and top metal land pads on a top side of said interposer substrate, interposer vias for connecting said top metal land pads to said bottom metal land pads, and an open receptacle region formed through said interposer substrate; placing a curable dielectric film (CDP) between said substrate top surface and said bottom side of said interposer substrate; positioning said interposer on said substrate top surface to fit said molded IC die inside said open receptacle region and to align said bottom metal land pads to said substrate contact pads to form an interposer/bottom package substrate stack, and heat pressing together said interposer/bottom package substrate stack to penetrate said interposer into said CDP to form metallic joints between said bottom metal land pads and said substrate contact pads and to cure said CDF.