Patent ID: 6314332
Filing Date: 2001-11-06
Classification: G01R

Abstract:
A semiconductor device test apparatus comprising:a network;a host computer connected to said network and having a data base; for writing test resultant data in said data base, and for outputting said test resultant data in response to a data request;a plurality of testers connected to said network, each said tester having a memory and a computer readable medium attached thereto, wherein each of said plurality of tests performs an electric characteristic test based on a particular test program loaded from the respective computer readable medium into the respective tester memory to generate a test resultant data for each of semiconductor devices, and transmits said test resultant data to said host computer;a plurality of handler sections, which are grouped into a plurality of sets corresponding to said plurality of handler sections sets said semiconductor devices of a pallet transported thereto to a test head for said electric characteristic test, each of said plurality of testers having said test heads for corresponding handler sections;a loader section operatively connected to said network, for loading said semiconductor devices from a first tray to said pallet;an unloader section connected to said network, for unloading said semiconductor devices from said pallet transported thereto to second trays based on said test resultant data from said host computer; anda pallet transporting section for transporting said pallet to a specific one of said plurality of handler sections before said electric characteristics test, and for transporting said pallet to said unloader section from said specific one of said plurality of handler sections after said electric characteristic test.