Patent ID: 6472293
Filing Date: 2002-10-29
Classification: H01L

Abstract:
A method for manufacturing a semiconductor device in which a plurality of semiconductor substrates are bonded together, the method comprisingpresenting a first semiconductor substrate having a first wiring layer and a second semiconductor substrate having a second wiring layer; depositing a first insulating layer on the first semiconductor substrate and depositing a second layer on the second semiconductor substrate, forming through the first insulating layer a first connection wiring connected to the first wiring layer and forming through the second layer a second connection wiring connected to the second wiring layer, bonding an electrically conductive layer of an electrically conductive material on at least one of the first insulating layer and the second layer, the electrically conductive layer having an opening formed by patterning in register with at least one of the first and second connection wirings, smoothing a junction surface of each semiconductor substrate, and aligning the junction surfaces of the first and second semiconductor substrates to form an assembly and disposing the assembly between a compressive load to interconnect the first and second semiconductor substrates and to interconnect the first and second connection wirings, wherein the first and second semiconductor substrates are bonded together by a solid state bonding technique.