Patent ID: 7928586
Filing Date: 2011-04-19
Classification: H01L

Abstract:
1. A semiconductor device comprising: a bonding pad; and an area designation marking, wherein said bonding pad includes: wherein said area designation marking includes: wherein said first region and said second region are configured to be contacted with a test probe, wherein said first area designation mark includes a first notch or a first protrusion, and said second area designation mark includes a second notch or a second protrusion, wherein said first area designation mark comprises a first pair of notches that is linearly spaced apart from each other to designate the first boundary line, wherein said second area designation mark comprises a second pair of notches that is linearly spaced apart from each other to designate the second boundary line, and wherein the first pair of notches and the second pair of notches are arranged to be spaced apart and parallel to each other.