Patent ID: 7480775
Filing Date: 2009-01-20
Classification: G06F,G06Q,G07F

Abstract:
1. A method for memory management in smart card controllers or similar restricted hardware environment by writing of data into a data space in a persistent memory, said method comprising: a) splitting the persistent memory into blocks with fixed data length having logical block numbers (LBN); b) selecting the size of blocks as such that it is equal to, or equivalent to an integer ratio of, the length of a page in EEPROM to the physical size of the pages of the EEPROM memory existing on the card; c) providing a Block Allocation Table (BAT) in order to calculate the physical place of the block in memory from the logical block number; d) defining a bit existing in each block header, whereby this bit corresponds to a bit existing in a commit block; e) where toggling of the bit existing in the commit block toggles the validity of the corresponding memory block; f) replacing individual memory blocks to accomplish a secure write mechanism by: g) typically all commit bits of the commit field form the commit block and are located in on EEPROM page to prevent the system from losing a valid commit field if a power failure occurs during updating the commit block, the commit block is doubled and only one of the two commit blocks is valid at a time whereby an update of the commit block is always done by writing to the commit block not written to at the last update, because this is the commit block not containing valid commit data, where by the validity of the invalid commit block is determined by a two-bit counter (C