Patent ID: 8044950
Filing Date: 2011-10-25
Classification: G09G

Abstract:
1. A driver circuit usable as a driver driving a display panel and having an input signal terminal, an output signal terminal, and a pulse generating part which generates an output signal and supplies the output signal to said output signal terminal in response to an input pulse signal supplied thereto through said input signal terminal, said pulse generating part comprising: an output stage of a push-pull constitution made of a pair of output transistors, for supplying its push-pull output to said output signal terminal; first and second differential amplifier stages for respectively driving said output transistors on the basis of an electric potential at said output signal terminal in response to said input pulse signal; two current paths, each of which includes a resistor; a current mirror circuit for providing electric currents of substantially the same magnitude as each other to said two current paths, respectively; and a control circuit connected between said input and output terminals for detecting an electric potential difference between said input and output terminals and for controlling said pair of output transistors and a superimposing stage in response to the detected electric potential difference, said superimposing stage superimposing an amplifier signal on output voltages generated by said first and second input differential amplifier stages, said amplifier signal being obtained by amplifying said input pulse signal with reference to said electric potential at an amplifying rate reflecting the detected electric potential difference, wherein said control circuit further includes a push-pull amplifier for respectively superimposing bias voltages obtained by amplifying said potential difference to control terminals of said pair of output transistors, said first and second differential amplifier stages are respectively driven by power-supply voltages which are different from each other, a middle point of said output stage is connected to said output signal terminal, one of input terminals of said first differential amplifier stage and one of input terminals of said second differential amplifier stage are connected to said input signal terminal, the other input terminal of said first differential amplifier stage and the other input terminal of said second differential amplifier stage are connected to an electric potential at said middle point of said output stage, one of output terminals of said first differential amplifier stage and one of output terminals of said second differential amplifier stage are connected to gate terminals of said output transistors, respectively, the other output terminal of said first differential amplifier stage and the other output terminal of said second differential amplifier stage are connected to a first referential potential and a second referential potential, and said first and second referential potentials are produced at both ends of one of said resistors.