Patent ID: 7269672
Filing Date: 2007-09-11
Classification: G06F,H04L,H05K

Abstract:
1. A design method for a bus system equipped with a plurality of device units, a data bus on which said plurality of device units are connectible, a timing-signal supply source supplying a timing signal to said plurality of device units through a timing-signal bus, a bus switch connecting and disconnecting a signal between said plurality of device units and said data bus, and a bus-switch control part controlling the connecting and disconnecting operations of said bus switch, said design method comprising: computing, for each of said plurality of device units, based on a cycle of said timing signal, a signal propagation delay in each one of said plurality of device units, signal propagation delays in said timing-signal bus and said data bus, and a setup time in one or more other of said plurality of device units or one or more other devices connected on said data bus, timing at which, when each one of said plurality of device units is connected on said data bus being active, noise propagates to the one or more other of said plurality of device units or to the one or more other devices connected on said data bus; and computing, based on said computed timing, connection timing at which each one of said plurality of device units is connected on said data bus, wherein in said computing, based on said computed timing, said connection timing is computed by computing a delay time “b” needed for said bus switch to connect each one of said plurality of device units on said data bus after each one of said plurality of device units is connected on said timing-signal bus.