Patent ID: 6441478
Filing Date: 2002-08-27
Classification: H01L

Abstract:
A semiconductor package comprising,a semiconductor chip having bonding pads respectively arranged in a line adjacent to four sides of the upper surface; gold bumps formed on each bonding pad; a glass substrate which is made by forming metal patterns corresponding to the bonding pads on one side, the metal patterns including an inner pattern electrically connected to the bonding pad of the semiconductor chip through the gold bump, an outer pattern separated from the inner pattern and connecting pattern between the inner pattern and the outer pattern and then forming a Dam in a frame-shape on the connecting pattern and on the one side to surround the inner patterns; sealing material sealing the space between the glass substrate and the semiconductor chip on an outer side of the Dam except for the outer pattern of the metal pattern; and solder balls attached on the outer patterns of each metal pattern.