Patent ID: 8530337
Filing Date: 2013-09-10
Classification: H01L

Abstract:
1. A method for enhancing the recognition of an integrated circuit, said method comprising: providing a semiconductor-on-insulator substrate including a stack, from bottom to top, of a base substrate, a buried insulator layer, and a top semiconductor active layer, wherein an interface is present between a topmost surface of said buried insulator layer and a bottommost surface of said top semiconductor active layer; forming at least one semiconductor device-containing region comprising at least one semiconductor device formed on and/or within a portion of said top semiconductor active layer; providing at least a stressor layer on an exposed surface of said at least one semiconductor device-containing region, wherein said stressor layer has a fracture toughness that is greater than that of said base substrate; applying a flexible handle layer on an exposed surface of said stressor layer; removing a material base layer from said base substrate by spalling, wherein said material base layer is located on a bottommost surface of said buried insulator layer; removing said material base layer from said bottommost surface of said buried insulator layer; removing an entirety of said buried insulator layer; removing a bottom portion of the top semiconductor active layer utilizing a p-well formed in said top semiconductor active layer as an end point detection means; and imaging the at least one semiconductor device-containing region including said at least one semiconductor device.