Patent ID: 9209819
Filing Date: 2015-12-08
Classification: H03L

Abstract:
1. A phase locked loop having a normal mode and a burn-in mode, comprising: a logic portion coupled to a logic power supply terminal, the logic portion including a clock receiver coupled to a phase frequency detector; an analog portion having a charge pump coupled to the phase frequency detector and to an analog power supply terminal and having a voltage controlled oscillator coupled to the charge pump at an analog node and to the analog power supply terminal; and a node control circuit that is coupled to the analog node during the burn-in mode that controls a voltage at the analog node sufficiently below a voltage at the analog power supply terminal to avoid over-stressing the charge pump and the voltage controlled oscillator during the burn-in mode, wherein the node control circuit holds the voltage at the analog node at a fixed voltage during the burn-in mode, wherein the node control circuit comprises a voltage divider that provides the fixed voltage to a control node in response to a burn-in signal, wherein the fixed voltage is between the voltage at the analog power supply terminal and ground, and wherein the node control circuit further comprises a transmission gate coupled between the analog node and the control node that is enabled in response to the burn-in signal, wherein the phase locked loop has a scan test mode and further comprises burn-in control logic coupled to the logic portion for ensuring that the burn-in mode takes priority over the scan test mode.