Patent ID: 7519763
Filing Date: 2009-04-14
Classification: G06F,G07F

Abstract:
1. An apparatus for deliberately preventing unauthorized access to data stored in a non-volatile memory device, the apparatus comprising: a printed circuit board (PCB); a non-volatile memory circuit electrically connected to the PCB, the non-volatile memory circuit comprising a first scoring configured such that a non-volatile memory chip of the non-volatile memory circuit readily breaks along the first scoring in response to an external force, wherein breaking the non-volatile memory chip along the first scoring renders the non-volatile memory circuit inoperable without reliance on a power source to electrically render the memory circuit inoperable; a housing configured to house the PCB external to a computer; a power source disposed on the PCB, the power source being independent from the computer; a switch with a button that is activated in response to a physical touch to the button of the switch; and an electrical erase circuit disposed on the PCB and electrically connected to the non- volatile memory circuit, the non-volatile memory circuit maintaining integrity of data stored on the non-volatile memory circuit without a power source, the electrical erase circuit configured to supply a signal to the non-volatile memory circuit, the signal conditioned to non-destructively erase the non-volatile memory circuit in response to activation of the switch connecting the power source solely to the electrical erase circuit, the power source providing sufficient energy to power the electrical erase circuit but not enough power to destructively overload the non-volatile memory circuit.