Patent ID: 8730215
Filing Date: 2014-05-20
Classification: G09G,H03K

Abstract:
1. A semiconductor device comprising: a first n-channel transistor; a second n-channel transistor electrically connected to the first n-channel transistor; a first p-channel transistor; a second p-channel transistor; a first transistor; a second transistor; a third transistor; and an inverter, wherein a gate terminal of the second n-channel transistor, a gate terminal of the first p-channel transistor, and a gate terminal of the first transistor are electrically connected to one another, wherein a first terminal of the first p-channel transistor and a first terminal of the second p-channel transistor are electrically connected to a first line, wherein a first terminal of the second n-channel transistor is electrically connected to a second line, wherein a second terminal of the second n-channel transistor is electrically connected to a first terminal of the first n-channel transistor, wherein a second terminal of the first n-channel transistor, a second terminal of the first p-channel transistor, an input terminal of the inverter, and a second terminal of the second p-channel transistor are electrically connected to one another, wherein the second transistor and the third transistor are electrically connected to an output terminal of the inverter, wherein the second transistor is electrically connected to a gate terminal of the second p-channel transistor, wherein the first transistor and the third transistor is electrically connected to a gate terminal of the first n-channel transistor, and wherein the gate terminal of the first n-channel transistor is electrically connected to the gate terminal of the second p-channel transistor through the second transistor.