Patent ID: 6366116
Filing Date: 2002-04-02
Classification: G09G

Abstract:
A programmable driving circuit having a plurality of driver cells, each comprising:a switch transistor having a source connected to a supplied voltage; a current output transistor having a source connected to a drain of the switch transistor, and a drain provided as a column/row output terminal of the driver cell; a discharge transistor having a drain connected to the drain of the current output transistor, and a source connected to ground; a first multiplexer having an output terminal connected to the gate of the switch transistor, a first input terminal and a second input terminal provided as a row input terminal and a column input terminal of the driver cell, respectively; a second multiplexer having an output terminal connected to the gate of the discharge transistor, a first input terminal connected to the row input terminal, and a second input terminal provided as a discharge control terminal; and a third multiplexer having an output terminal connected to the gate of the current output transistor, a first input terminal connected to ground, and a second input terminal connected to a bias output terminal, wherein each of the first, the second, and the third multiplexers has a control terminal connected together for being provided as a programmable control terminal.