Patent ID: 8510704
Filing Date: 2013-08-13
Classification: G06F

Abstract:
1. An electronic system design platform comprising: a computing system that hosts a virtual channel manager, the virtual channel manager providing a graphical editor for receiving user input specifying design specifications of the integrated circuit, the design specifications specifying a number of functional blocks and current physical communication conditions between pairs of the functional blocks, the virtual channel manager further adapted for designing a channel interface for the current physical communication conditions between the pairs of the functional blocks, and selecting a communication protocol that is best suited for each channel interface, the graphical editor comprising a plurality of code modules to: generate graphical boxes to represent discrete functional processing services; graphically supply a unique name for each of the processing services represented by a graphical box; graphically represent communication channels between source and destination processing services; graphically identify one or more of the communication channels to provide a communication channel group; graphically specify the packet format for the communication channel group; and graphically establish an identifier for a configuration of the processing services that defines the integrated circuit design.