Patent ID: 8946034
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device, the method comprising: forming a first gate electrode and a second gate electrode over a semiconductor body, the first and second gate electrodes being electrically insulated from the semiconductor body; forming a first sidewall spacer along a first sidewall of the first gate electrode and a second sidewall spacer along a second sidewall of the second gate electrode; forming first and second sacrificial sidewall spacers, the first sacrificial sidewall spacer adjacent the first sidewall spacer, and the second sacrificial sidewall spacer adjacent the second sidewall spacer; forming a planarization layer between the first and second sacrificial sidewall spacers; removing the first and second sacrificial sidewall spacers thereby exposing a first region and a second region of the semiconductor body; etching the first region and the second region thereby forming first and second recesses in the semiconductor body; forming a first semiconductor material in the first recess; and forming a second semiconductor material in the second recess, wherein there is no isolation region between the first recess and the second recess.