Patent ID: 6097109
Filing Date: 2000-08-01
Classification: H02J

Abstract:
Process for the monetary retention of a desired output voltage (Ua) for a load element (L1) when an input voltage (Ue) is lost, using an independent capacitor (C), connected in parallel to the load element (L1), said process comprising the steps of:transforming the input voltage (Ue) by a DC/DC up converter (1) to a voltage (Uz), higher than the desired output voltage; storing the voltage Uz in the independent capacitor (C) connected to the output of the DC/DC up converter 2 as a capacitor voltage Uc; transforming the capacitor voltage (Uc) by a DC/DC down converter (2) to the desired output voltage (Ua) for the load element (L1), which output voltage is less than the capacitor voltage (Uc); andcomparing the input voltage (Ue) with a given reference value (Usoll); and when the input voltage (Ue) drops below the reference value (Usoll), switching the independent capacitor (C) from the output of the DC/DC up converter (1) to the input of the DC/DC up converter.