Patent ID: 9224850
Filing Date: 2015-12-29
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; an element isolation insulator film formed inside the semiconductor substrate; a gate electrode formed on the semiconductor substrate with a gate insulator film therebetween; a first main terminal region of a first conductivity type and a second main terminal region of a second conductivity type, which is an opposite conductivity type of the first conductivity type, formed in the semiconductor substrate so as to sandwich the gate electrode; a diffusion layer of the second conductivity type formed in the semiconductor substrate so as to come in contact with the element isolation insulator film and having an upper surface at a position deeper than lower surfaces of the first and second main terminal regions; a first well region of the first conductivity type formed between the first main terminal region and the diffusion layer, and between the gate insulator film and the diffusion layer such that the diffusion layer is separated from the gate insulator film by the first well region interposed between the gate insulator film and the diffusion layer; and a second well region of the first conductivity type formed between the second main terminal region and the diffusion layer and having an impurity concentration higher than that of the first well region; wherein the semiconductor device is a tunnel transistor.