Patent ID: 6204108
Filing Date: 2001-03-20
Classification: H01L

Abstract:
A method for forming a capacitor coupled to a conductive region on a substrate, comprising:forming an insulation layer on the substrate;forming a barrier layer on the insulation layer;forming an opening penetrating through the barrier layer and the insulation to expose the conductive region;forming a conductive plug to fill the opening and a first polysilicon layer with a hemi-spherical grained surface on the barrier layer;forming a composite layer comprising a plurality of material layers formed by different materials on the hemi-spherical grained surface;anisotropically etching the composite layer and the polysilicon layer until exposing the barrier layer to form a substantially smooth side surface of the composite layer;wet etching the composite layer;forming a second polysilicon layer with a hemi-spherical grained surface to cover the composite layer;removing the composite layer;forming a dielectric layer to cover the first and the second polysilicon layer; andforming a top electrode layer on the dielectric layer.