Patent ID: 8138876
Filing Date: 2012-03-20
Classification: H01F,Y10T

Abstract:
1. A structure comprising: a chip including an integrated circuit and an interconnect structure for said integrated circuit, said interconnect structure including a first metallization level, a second metallization level different from said first metallization level, a first conductive path coupled with a ground potential, and a second conductive path coupled with the ground potential; a signal line of an inductor disposed in said first metallization level of said interconnect structure, said signal line electrically coupled with said integrated circuit for communication of an electrical signal; a first ground line of said inductor disposed in said first metallization level of said interconnect structure or in said second metallization level of said interconnect structure, said first ground line positioned proximate to said signal line, said first ground line having a first end and a second end opposite to said first end, said first end of said first ground line coupled with said first conductive path, and said second end of said first ground line coupled with said second conductive path; and at least one control unit included in said integrated circuit, said at least one control unit disposed in said first conductive path, said at least one control unit configured to selectively open and close said first conductive path, wherein said signal line has a first inductance value when said first conductive path is open, and said signal line has a second inductance value when said first conductive path is closed such that said first end of said first ground line is coupled by the first conductive path with the ground potential and said second end of said first ground line is coupled by the second conductive path with the ground potential.