Patent ID: 7369426
Filing Date: 2008-05-06
Classification: G11C

Abstract:
1. An arrangement for increasing a difference in resistance of a magnetoresistive memory cell in a semiconductor device, comprising: a memory layer; a reference layer having a magnetically soft layer and a high spin polarization; and a tunnel barrier separating the memory layer from the reference layer, wherein, when the memory cell is in a first magnetization state, the magnetization of the memory layer is unidirectional with respect to a reference magnetization of the reference layer, and when in a second state, the magnetization is oppositely directed with respect to the reference magnetization, and in the event of a changeover of the magnetization of the memory layer, a deflection or changeover of the magnetization of the reference layer is permissible, and the orientation of the magnetization of the reference layer can be set in the direction of the reference magnetization before a next read operation on the magnetoresistive memory cell given unaltered orientation of the magnetization of the memory layer.