Patent ID: 8049201
Filing Date: 2011-11-01
Classification: H01L

Abstract:
1. A semiconductor memory device, comprising: first conductive lines on a substrate; an interlayer insulating layer with a plurality of via holes on the substrate at the same height with respect to the substrate; second conductive lines on the interlayer insulating layer; and a resistive memory material substantially completely filling each of the via holes and electrically connected to the first and second conductive lines, the resistive memory material having at least one specific resistance region that has a higher resistance than other regions of the resistive memory material in each of the via holes, wherein: the resistive memory material includes first and second resistive memory material layers in respective via holes adjacent to one another, a position of a higher specific resistance region in the first resistive memory material layer being different from a position of the higher specific resistance region in the second resistive memory material layer, and the higher specific resistance region in the second resistive memory material layer has a higher position and has a greater amount of resistive memory material between the higher specific resistance region and the first conductive lines than the position and the amount of resistive memory material between the first conductive lines and the higher specific resistance region in the first resistive memory material layer.