Patent ID: 9100027
Filing Date: 2015-08-04
Classification: G06F,G11C,H03K,H03L

Abstract:
1. A data interface circuit for capturing received data bits including a continuous timing calibration function, the data interface circuit comprising: a calibration controller circuit; two parallel data capture paths that capture a common data bit value, wherein a first data capture path comprises a mission path that performs data capture for a functional circuit, and a second data capture path comprises a reference path that performs data capture solely for calibration purposes; wherein the mission path includes a programmable delay line (DLL) controlled by the calibration controller circuit; wherein the reference path includes a plurality of parallel DLLs controlled by the calibration controller, and wherein each of the plurality of parallel DLLs in the reference path is connected to a capture flip-flop, thus producing a plurality of captured reference data bit values; wherein the calibration controller controls a delay of each of the parallel DLLs in the reference path such that each of the parallel DLLs captures data bit values for a different portion of a sweep of possible delay values; wherein one or more of the plurality of parallel DLLs in the reference path provides a delay value that enables detection of an optimal calibration condition for the data bit value captured by the reference path, resulting in determination of an optimal delay setting for the reference path; and wherein the data interface circuit is operated by a method comprising: performing a first calibration operation for both reference and mission paths to establish optimal initial delay settings, wherein a delta value between the optimal initial delay settings of the reference and mission paths is determined; operating the functional circuit including operation of the mission path; from time to time, and without interfering with operation of the functional circuit or the mission path, performing an additional calibration of the reference path to determine a new optimal delay setting; and if the new optimal delay setting for the reference data path differs from a previous setting by an amount greater than a change threshold value, setting the delay setting for the mission path to be equal to be the new optimal delay setting for the reference path adjusted by the delta value.