Patent ID: 6475868
Filing Date: 2002-11-05
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having reduced junction-to-semiconductor substrate capacitance, which method comprises the sequential steps of:(a) providing a device precursor structure comprising a semiconductor substrate of a first conductivity type having a surface; (b) selectively introducing dopant impurities of a second conductivity type, opposite the first conductivity type, into at least one portion of said substrate, for forming at least one semiconductor junction at a preselected ultimate depth below said substrate surface; (c) selectively introducing oxygen atoms and/or molecules into said at least one portion of said substrate, such that a peak concentration of said oxygen atoms and/or molecules occurs just below the ultimate depth of said at least one semiconductor junction; and (d) thermally treating the oxygen-introduced substrate at a temperature and for an interval sufficient to effect reaction between said semiconductor substrate and said introduced oxygen atoms and/or molecules, thereby forming an oxide barrier within said substrate, completely surrounding and separating the implanted impurities from the substrate just below the ultimate depth of said least one semiconductor junction, thereby reducing junction-to-substrate capacitance.