Patent ID: 7915131
Filing Date: 2011-03-29
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising the steps of: (a) defining an isolation region, a first active region and a second active region in a semiconductor substrate, and then depositing a gate insulating film and a gate electrode film made of silicon over the entire surface of the semiconductor substrate; (b) implanting an n-type impurity in part of the gate electrode film located above the first active region and implanting a p-type impurity in part of the gate electrode film located above the second active region and the isolation region; (c) patterning the gate insulating film and the gate electrode film, thereby forming an n-type gate electrode and a first p-type gate electrode above the first active region and the second active region, respectively, with the gate insulating film interposed therebetween, and forming a p-type resistor above the isolation region, after step (b); (d) forming a stressor film which covers the n-type gate electrode and the p-type resistor and applies tensile stress, along a gate length, to a channel region of the first active region; (e) heating the semiconductor substrate, thereby causing the tensile stress applied from the stressor film to be memorized in the p-type resistor and a surface part of the first active region as internal stress; and (f) removing the stressor film, after step (e).