Patent ID: 8971676
Filing Date: 2015-03-03
Classification: G02B,H01L,H05K

Abstract:
1. A chip package, comprising: an integrated circuit having a front surface with integrated-circuit connector pads; integrated-circuit electrical connectors electrically coupled to the integrated-circuit connector pads; a substrate having a top surface, facing the front surface, with first substrate connector pads electrically coupled to the integrated-circuit electrical connectors, and second substrate connector pads; optical-integrated-circuit electrical connectors electrically coupled to the second substrate connector pads; an optical integrated circuit having a front surface, facing the top surface, with optical-integrated-circuit connector pads electrically coupled to the optical-integrated-circuit electrical connectors, wherein the optical integrated circuit is proximate to the integrated circuit on a same side of the substrate, and wherein the optical integrated circuit is configured to communicate optical signals; and an input/output (I/O) integrated circuit between the front surface of the optical integrated circuit and the top surface of the substrate, wherein the I/O integrated circuit is coupled to the optical integrated circuit; and wherein the I/O integrated circuit includes electrical I/O circuits and optical driver and receiver circuits; ramp-stack connector pads disposed on a back surface on an opposite side of the optical integrated circuit from the front surface; through-substrate vias (TSVs) electrically coupling the optical-integrated-circuit connector pads to the ramp-stack connector pads; ramp-stack electrical connectors electrically coupled to the ramp-stack connector pads; and a ramp-stack chip package electrically coupled to the ramp-stack electrical connectors, wherein the ramp-stack chip package includes multiple parallel substrates arranged at an oblique angle relative to the back surface.