Patent ID: 7957177
Filing Date: 2011-06-07
Classification: G11C

Abstract:
1. Static random-access memory, comprising: a plurality of memory elements, each memory element having a positive power supply terminal, at least one address transistor having a gate, and a pair of cross-coupled inverters; and circuitry operable to supply an address signal to the gates of the address transistors of at least some of the memory elements while supplying a positive power supply signal to the positive power supply terminals of those memory elements, wherein the circuitry comprises two transistors in each of the memory elements in the plurality of memory elements operable to be controlled by the address signal and operable to selectively power the pair of cross-coupled inverters based on the address signal, wherein the address signal and the positive power supply signal have different voltages, and wherein the circuitry is operable to supply the positive power supply signal to the plurality of memory elements at a voltage level that is controlled by the address signal.