Patent ID: 6750697
Filing Date: 2004-06-15
Classification: H03K

Abstract:
A circuit configuration for a simultaneous switching of transistors, comprising:first and second transistors connected in series, each of said transistors having: a gate terminal with a gate potential, an on state, and an off state; said transistors respectively switching one of: from said on state to said off state in an off transition, and from said off state to said on state in an on transition; said gate potential of one of said transistors performing said on transition being changed more slowly than said gate potential of another of said transistors performing said off transition; and a driving configuration connected to said transistors, said driving configuration, during switching of said transistors, driving said transistors to cause at least one of said transistors to act as a current source limiting current flow through said transistors in phases during which neither of said transistors is in said off state.