Patent ID: 7592217
Filing Date: 2009-09-22
Classification: C23C,H01L,Y02T

Abstract:
1. A method for fabricating a capacitor, comprising: forming a storage node; forming a multi-layered dielectric structure on the storage node, the multi-layered dielectric structure including a zirconium oxide (ZrO performing a low temperature annealing process on a substrate structure including the storage node and the multi-layered dielectric structure to remove impurity, oxygen defect and surface roughness in the multi-layered dielectric structure; after performing the low temperature annealing process, performing a rapid thermal process (RTP) of a high temperature annealing on the substrate including the storage node and the multi-layered dielectric structure to increase dielectric constants of the ZrO forming a plate electrode on the multi-layered dielectric structure, wherein the ambient gas flows in an amount of approximately 5 sccm to approximately 5 slm.