Patent ID: 6105141
Filing Date: 2000-08-15
Classification: G06F,Y02D

Abstract:
A method for reducing power consumption of a computer system, the computer system including a processor, system memory, and an external cache memory, said method comprising:(a) entering an idle mode in which the processor and the external cache memory are in a sleep state;(b) determining whether an interrupt has occurred;(c) awakening the processor from the sleep state to a normal state and not awakening the external cache memory when said determining (b) determines that an interrupt has occurred;(d) servicing the interrupt;(e) performing idle processing without use of the external cache memory which remains in the sleep state;(f) determining whether the idle mode should be exited and a normal mode entered; and(g) awakening the external cache memory from the sleep state to a normal state when said determining (f) determines that the idle mode is to be exited and the normal mode entered.