Patent ID: 8238139
Filing Date: 2012-08-07
Classification: G11C

Abstract:
1. A dynamic RAM, comprising: a first inverter, receiving a first driving signal, a positive power end of the first inverter is coupled to a first voltage source; a second inverter, receiving a second driving signal output from the first inverter, a positive power end of the second inverter is coupled to a second voltage source; a sense amplifier, sensing and amplifying a voltage difference between a first sensing signal and a second sensing signal, a positive power end of the sense amplifier is coupled to a third voltage source for receiving the third voltage source directly, wherein a voltage value of the second voltage source is between a voltage value of the first voltage source and a voltage value of the third voltage source; a first pair of switches, controlled by a third driving signal output from the second inverter, two ends on one side of the first pair of switches are respectively coupled to a pair of data lines, two ends on the other side of the first pair of switches are coupled to the sense amplifier to transceive the first sensing signal and the second sensing signal; a pair of bit lines; and a dynamic RAM cell, storing a data value, the data value stored in the dynamic RAM cell is read or overwritten by the pair of the bit lines and a word line.