Patent ID: 8310058
Filing Date: 2012-11-13
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a substrate; a via formed through the substrate; a first insulating layer formed over a first surface of the substrate; a first conductive layer formed over the first insulating layer; a resistive layer formed over the first conductive layer; a second insulating layer formed over the resistive layer; a third insulating layer formed over the first insulating layer and first conductive layer; a second conductive layer formed over the second and third insulating layers and first conductive layer, the first and second conductive layers extending into the via to form a conductive via; a fourth insulating layer formed over a second surface of the substrate opposite the first surface of the substrate; and an under bump metallization (UBM) formed over the second surface of the substrate and electrically connected to the conductive via.