Patent ID: 8865541
Filing Date: 2014-10-21
Classification: H01L

Abstract:
1. A process of forming an integrated circuit containing a voltage protection structure, comprising the steps of: providing a substrate comprising a p-type semiconductor; forming an n-type cathode well of a diode of the voltage protection structure and an n-type drain drift region of a drain extended n-channel metal oxide semiconductor (DENMOS) transistor of the voltage protection structure, the cathode well and the drain drift region being disposed in the substrate, proximate to each other; forming a gate dielectric layer of the DENMOS transistor over the substrate overlapping a part of the drain drift region; forming a gate of the DENMOS transistor over the gate dielectric layer; forming a p-type anode active area of the diode and a p-type guard element active area of the voltage protection structure, the anode active area being disposed in the cathode well and the guard element active area being disposed in the substrate proximate to the diode and to the DENMOS transistor; forming an electrical connection between the diode anode and an I/O pad of the integrated circuit; forming an electrical connection between the cathode and the drain drift region; and forming an electrical coupling between the guard element active area and a ground node of the integrated circuit.