Patent ID: 7781807
Filing Date: 2010-08-24
Classification: H01L

Abstract:
1. A non-volatile semiconductor storage device comprising: a first non-volatile memory cell provided on a first insulator above a substrate; and a second non-volatile memory cell provided on a second insulator above the first non-volatile memory cell, wherein the first non-volatile memory cell includes: a first semiconductor layer having a first main surface and a second main surface, the first main surface being below the second main surface, and including an n-type region and a p-type region, the first main surface being in contact with the first insulator; and a first gate stack which is provided in the first insulator under the first semiconductor layer and includes a first charge storage layer disposed below the first main surface of the first semiconductor layer and a first control gate electrode disposed below the first charge storage layer, wherein the second non-volatile memory cell includes: a second semiconductor layer having a third main surface and a fourth main surface, the third main surface being below the fourth main surface, and including an n-type region and a p-type region, the third main surface being in contact with the second insulator; and a second gate stack which is provided above the second semiconductor layer and includes a second charge storage layer disposed above the fourth main surface of the second semiconductor layer and a second control gate electrode disposed above the second charge storage layer, the second gate stack is positioned to be aligned with the first gate stack, and the second main surface of the first semiconductor layer contacts the second insulator, and the third main surface of the second semiconductor layer contacts the second insulator.