Patent ID: 6511897
Filing Date: 2003-01-28
Classification: G03F,H01L

Abstract:
A method of manufacturing a semiconductor device having:a step of forming a conductive layer on a wafer as semiconductor substrate; a resist application step of applying a resist on said conductive layer; an exposure step of sequentially irradiating an exposure light onto said resist located in a plurality of chip formation regions for forming, respectively, semiconductor chips in said wafer via a predetermined reticle; a development step of forming a resist pattern for patterning said conductive layer by developing said resist after said exposure step; and a step of forming a conductive region by etching said conductive layer using said resist pattern as a mask, wherein said exposure step comprises a step of providing a resist-free region which is cut by dicing and is provided in a region outside of the chip formation regions and located in a wafer outermost periphery adjacent said chip formation regions.