Patent ID: 8916404
Filing Date: 2014-12-23
Classification: H01L

Abstract:
1. A method for manufacturing E-paper array substrate, comprising: Step 1: depositing an insulating leveling layer on a glass substrate, and forming patterns of a gate electrode and a storage capacitor bottom electrode through photolithography using a first mask; Step 2: depositing a metal layer on the glass substrate obtained after the Step 1, and forming the gate electrode and the storage capacitor bottom electrode by photolithography using the first mask; Step 3: depositing an insulator layer, an amorphous silicon active layer, an n+ amorphous silicon layer and a source/drain metal layer respectively on the glass substrate obtained after the Step 2, and forming a source/drain electrode and a channel region by photolithography using a second mask, wherein the source/drain metal electrode is directly over the storage capacitor bottom electrode and wherein the entirety of the source/drain metal electrode extends over the storage capacitor bottom electrode at a uniform height; and Step 4: coating the glass substrate obtained after the Step 3 with a passivation film.