Patent ID: 6451708
Filing Date: 2002-09-17
Classification: H01L

Abstract:
A method of forming contact holes on a gate electrode and conductive regions of a semiconductor substrate using a single-step photolithographic process, first and second insulating layers being formed over the gate electrode, the first insulating layer having an etching selectivity with respect to the second insulating layer, the second insulating layer being formed over one of the conductive regions, the method comprising:forming a photoresist pattern over the second insulating layer; first selectively etching the second insulating layer with an etch chemistry having an etching selectivity with respect to the first insulating layer, using the photoresist pattern as an etching mask, thereby forming a first contact hole that exposes the one of the conductive regions and to form an opening that exposes the first insulating layer overlying the gate electrode; and second selectively etching the exposed first insulating layer using the same photoresist pattern and the opening until the gate electrode is exposed, to form a second contact hole.