Patent ID: 9041422
Filing Date: 2015-05-26
Classification: G01D,G01R

Abstract:
1. A circuit arrangement, comprising: a plurality of on-chip monitor circuits, each of the plurality of on-chip monitor circuits configured to measure a parameter of a semiconductor chip; and a controller coupled to the plurality of on-chip monitor circuits, the controller configured to receive a measurement result from at least a supervising one of the plurality of on-chip monitor circuits and to control a calibration of another one of the plurality of on-chip monitor circuits in accordance with the measurement result; wherein the controller is configured to denote the calibration of said other one of the plurality of on-chip monitor circuits as invalid if the measurement result from the supervising one of the plurality of on-chip monitor circuits deviates from a predetermined range, the measurement result from the supervising one of the plurality of on-chip monitor circuits relating to a different parameter than the parameter said other one of the plurality of on-chip monitor circuits is configured to measure.