Patent ID: 6049498
Filing Date: 2000-04-11
Classification: G11C

Abstract:
An integrated circuit for conducting a supply voltage from a voltage source to an output line connected to a memory device, said voltage source being connected to an input line, said integrated circuit comprising:a first switch having an input connected to said input line and an output;a second switch having an input connected to said output of said first switch, and an output connected to said output line; andcontrol circuitry to control said first switch and said second witch,whereby when said first switch and said second switch are turned on, said supply voltage is conducted from said input line through said first switch and said second switch to said output line, and when said first switch and said second switch are turned off; said input line is isolated from said output line no matter what voltage is present on said output line, said first switch being turned off by biasing said first switch with said supply voltage from said voltage source, and said second switch being turned off by biasing said second switch with a voltage present on said output line.