Patent ID: 7196427
Filing Date: 2007-03-27
Classification: H01L

Abstract:
1. A stacked semiconductor package assembly comprising: a first semiconductor package comprising a first surface having a first plurality of conductive bumps attached thereto for making electrical connection to the first semiconductor package, and comprising an opposite and nonplanar second surface comprising a mold cap and a plurality of adjoining electrical contacts; a second semiconductor package overlying the first semiconductor package comprising a first surface and an opposite second surface, the second surface comprising a second plurality of conductive bumps positioned outside of a central portion of the second surface and in contact with the plurality of adjoining electrical contacts of the first semiconductor package, the second semiconductor package making direct electrical contact to the first semiconductor package via the second plurality of conductive bumps; an intervening element positioned in direct contact with and between the first semiconductor package and the second semiconductor package, the intervening element being sufficiently tacky to adhere to each of the first semiconductor package and the second semiconductor package and provide rigidity to adjoining surfaces of the first semiconductor package and the second semiconductor package in contact with the intervening element, the intervening element being surface conformal to the first semiconductor package and the second semiconductor package, the intervening element extending laterally outside a perimeter of at least one of the first semiconductor package and the second semiconductor package and bending a predetermined amount; and an underlying substrate having a plurality of contacts, each of the plurality of contacts of the underlying substrate being in contact with at least one of the first plurality of conductive bumps of the first semiconductor package.