Patent ID: 6857090
Filing Date: 2005-02-15
Classification: G01R,G11C

Abstract:
1. A system for automatically analyzing and managing loss factors occurring in a test process in which a plurality of semiconductor IC devices are tested as a lot with a number of testers, said lot containing a predetermined number of identical IC devices, and the lot test process being performed sequentially according to a plurality of test cycles, said system comprising: a means for verifying test results for each of said test cycles and for determining whether a re-test is to be performed; an IC device loading/unloading means for loading IC devices to be tested and contained in the lot to a test head and for unloading the tested IC devices from the test head by sorting the tested IC devices according to the test results; a raw data generating means for generating raw data on the basis of time data occurring when the test process is performed; a data calculating means for calculating testing time data, index time data based on the raw data, and loss time data; a data storage means for storing the raw data and the calculated data; and a data analyzing and outputting means for analyzing the raw data and the calculated data according to the lots, the plurality of testers and the IC device loading/unloading means and for outputting the analyzed output through a user interface.