Patent ID: 7009202
Filing Date: 2006-03-07
Classification: G02F,H01L

Abstract:
1. A thin film transistor panel comprising: an insulating substrate having a display area and a surrounding area; a plurality of gate lines formed on the insulating substrate; a data driving signal line formed on the surrounding area of the insulating substrate; a data inspection signal line formed on the surrounding area of the insulating substrate; a gate insulating layer formed on the gate lines, the data driving signal line and the data inspection signal line; a first semiconductor pattern formed on the gate insulating layer, at least a portion thereof overlapping the data driving signal lines; first and second ohmic contact layers formed on the first semiconductor pattern, exposing therebetween a portion of the first semiconductor pattern corresponding to the data driving signal line; a plurality of data lines formed on the gate insulating layer and intersecting the gate lines to define the display area, at least a portion thereof being formed on the second ohmic contact layer; a first electrode for inspection formed on the gate insulating layer, at least a portion thereof being formed on the first ohmic contact layer; a passivation layer formed on the data lines and the first electrode for inspection; and a first connection portion formed on the passivation layer and connecting the data inspection signal line and the first electrode for inspection.