Patent ID: 6933188
Filing Date: 2005-08-23
Classification: H01L

Abstract:
1. A method of forming a metal oxide semiconductor field effect transistor (MOSFET) device on a semiconductor substrate, comprising the steps of: providing a gate insulator layer on said semiconductor substrate; forming a composite structure comprised of an underlying polysilicon gate structure at a thickness between about 1500 to 3000 Angstroms, and comprised of an overlying insulator hard mask shape at a thickness between about 1000 to 5000 Angstroms, wherein said composite structure is defined via an anisotropic reactive ion etch procedure using CHF performing an ion implantation procedure using an implant angle between about 7 to 45 degrees to place ions in top portions of said semiconductor substrate not covered by said composite structure, forming a source/drain region; and performing an anneal procedure at a temperature between about 700 to 1000° C., for a time between about 10 to 60 min, in a nitrogen or argon ambient to activate said ions in said source/drain region and to increase depth of said source/drain region in said semiconductor substrate.