Patent ID: 7838790
Filing Date: 2010-11-23
Classification: G01R,H01L,Y10S

Abstract:
1. A multifunctional handler system for electrically testing semiconductor devices, comprising: a semiconductor device processing section including: a loading unit having a separate buffer configured to receive trays of semiconductor devices; a sorting unit adjacent to the loading unit and configured to sort a set of semiconductor devices in a tray after testing, and an unloading unit configured to unload the sorted semiconductor devices from the tray and external to the semiconductor device processing section; a semiconductor device testing section configured to test the set of semiconductor devices in the test tray, separate from the semiconductor device processing section, that includes a test chamber configured to perform parallel testing of the semiconductor devices, the test chamber is separated into two or more test spaces, wherein each of the test spaces includes a first chamber positioned adjacent to a second chamber and pipelines connecting the first and second chambers to each other; and a host computer coupled to the semiconductor device processing section and the semiconductor device testing section and configured to control tray information, test results, marking information, and test program information.