Patent ID: 8918611
Filing Date: 2014-12-23
Classification: B60R,G06F

Abstract:
1. A semiconductor device comprising: an electrically erasable programmable nonvolatile memory device; a central processing unit for executing an instruction; an external interface circuit; and an external bus circuit, the nonvolatile memory device, the central processing unit, the external interface circuit, and the external bus circuit being coupled to an internal bus, the semiconductor device having, as security states to which the nonvolatile memory device can transition: a first security state in which, when secret information is not set in the nonvolatile memory device, reading from the nonvolatile memory device is permitted, rewriting the nonvolatile memory device is permitted, and external output from the external interface circuit is permitted; a second security state in which, when the secret information is set in the nonvolatile memory device, reading from the nonvolatile memory device is permitted, rewriting the nonvolatile memory device is permitted on condition that a result of authentication using the secret information is correct, and external output from the external interface circuit is permitted; and a third security state in which, when the secret information is set in the nonvolatile memory device, rewriting the nonvolatile memory device is inhibited until correctness as a result of authentication using the secret information is confirmed, reading from the nonvolatile memory device is inhibited under a predetermined condition, and external output from the external interface circuit is permitted, the predetermined condition including detection of a fraudulent instruction being executed by the central processing unit.