Patent ID: 6166943
Filing Date: 2000-12-26
Classification: G11C

Abstract:
A method of writing a set of binary codes into a read-only memory (ROM), the ROM being formed on a die and comprising a plurality of memory cells arranged in a matrix format on the die, each memory cell comprising a MOS transistor, the method comprising:forming a first photo mask and a second photo mask which respectively comprises a plurality of cell regions arranged in a matrix format and corresponding to the plurality of memory cells respectively, each of the cell regions being set as a transparent region or an opaque region, the first photo mask and the second photo mask being formed by using an original first code pattern, an original second code pattern and the set of binary codes to be written into the ROM, the original first code pattern and the original second code pattern respectively comprising a set of binary codes arranged in a matrix format and corresponding to the cell regions of the two photo masks, each of the binary codes of the two code patterns corresponding to the same cell region being different from each other, each of the binary codes to be written into the ROM being coupled to each corresponding binary code of the two code patterns by using a Boolean logical OR operation so as to form a final first code pattern and a final second code pattern respectively, the first photo mask and the second photo mask being formed by using the final first code pattern and the final second code pattern respectively, wherein whether each of the cell regions on the first photo mask or on the second photo mask is a transparent region or an opaque region is decided by each corresponding binary code of the final first code pattern or the final second code pattern;performing a first photolithography process by using the first photo mask to form a first photoresist layer on the memory cells of the ROM, the first photoresist layer comprising at least one hole and each hole in the first photoresist layer corresponding to a cell region of the first photo mask and being positioned on the surface of the memory cell corresponding to the cell region;performing a first ion implantation process to implant dopants into the transistor in the memory cell under each hole of the first photoresist layer;removing the first photoresist layer completely;performing a second photolithography process by using the second photo mask to form a second photoresist layer on the memory cells of the ROM, the second photoresist layer comprising at least one hole and each hole in the second photoresist layer corresponding to a cell region of the second photo mask and being positioned on the surface of the memory cell corresponding to the cell region;performing a second ion implantation process to implant dopants into the transistor in the memory cell under each hole of the second photoresist layer; andremoving the second photoresist layer completely.