Patent ID: 8803310
Filing Date: 2014-08-12
Classification: H01L

Abstract:
1. An embedded electronic device package structure, comprising: a core layer, having a cavity, a first surface and a second surface opposite to the first surface; an electronic device, disposed in the cavity of the core layer; a first dielectric layer, disposed on the first surface of the core layer, and filled in the cavity of the core layer, the first dielectric layer covering one side of the electronic device, wherein the first dielectric layer is filled in part of the cavity; a second dielectric layer, disposed on the second surface of the core layer, and filled in the cavity of the core layer, the second dielectric layer covering another side of the electronic device, wherein the first dielectric layer and the second dielectric layer fully cover the electronic device; and a plurality of conductive vias, disposed around the surrounding of the electronic device and penetrating through the first dielectric layer, the second dielectric layer and the core layer, the conductive vias respectively connecting the first dielectric layer and the second dielectric layer.