Patent ID: 6429488
Filing Date: 2002-08-06
Classification: H01L

Abstract:
A semiconductor device including a silicon-on-insulator region and a bulk region made by a process comprising the steps of:(a) providing a silicon-on-insulator structure, the silicon-on-insulator structure having a thin silicon layer, a buried insulating oxide layer underlying the thin silicon layer, and a silicon substrate underlying the buried insulating oxide layer; (b) forming a nitride layer on top of the silicon-on-insulator structure; (c) selectively etching portions of the nitride layer to expose the silicon-on-insulator structure, a portion of the nitride layer not etched forming the silicon-on-insulator region; and forming a shallow trench isolation to bound the silicon-on-insulator region; (d) selectively etching a portion of the exposed silicon-on-insulator structure to expose the silicon substrate; (e) growing an epitaxial layer on top of the exposed silicon substrate to form the bulk region, the epitaxial layer contacting the shallow trench isolation formed in step (c); and (f) removing the nitride portion above the silicon-on-insulator structure.