Patent ID: 6445043
Filing Date: 2002-09-03
Classification: H01L

Abstract:
A semiconductor integrated circuit produced by the steps of:a) forming at least one trench in a silicon substrate to define first and second active device regions on the substrate to be isolated from each other; b) depositing an electrically insulative material on the substrate to fill the trench with the electrically insulative material, said electrically insulative material having a top surface; c) planarizing a top surface of the substrate such that the top surface of the substrate in the first and second active device regions is coplanar with the top surface of the electrically insulative material of the filled trench; d) selectively growing a first epitaxial layer of silicon on top of and in contact with the top surface of the first active device region; e) selectively growing a second epitaxial layer of silicon on the top surface of the second active device region, the first epitaxial layer and second epitaxial layer being doped with dopant atoms to the same or different dopant concentration, to provide at least two isolated active device regions on the silicon substrate; f) forming a bipolar transistor on the first epitaxial layer; and g) forming a complementary metal oxide semiconductor (CMOS) device on the second epitaxial layer.