Patent ID: 6207480
Filing Date: 2001-03-27
Classification: H01L

Abstract:
A method for manufacturing a thin film transistor array panel for a liquid crystal display, comprising the steps of:forming a gate wire on an insulating substrate;sequentially depositing a gate insulating layer, an amorphous silicon layer, a doped amorphous silicon layer and a metal layer;patterning the metal layer to form a data line, a source electrode and a drain electrode;etching the doped amorphous silicon layer by using the data line, the source electrode and the drain electrode as etch stopper;patterning the amorphous silicon layer to form an amorphous silicon layer pattern overetched to a depth of at least under the data line;forming a passivation layer having a contact hole that exposes a portion of the drain electrode; andforming a pixel electrode connected to the drain electrode through the contact hole.