Patent ID: 6255158
Filing Date: 2001-07-03
Classification: H01L

Abstract:
A process of manufacturing a vertical dynamic random access memory device comprising the steps of:(a) providing a substrate having a top surface;(b) etching a device trench into the substrate, the device trench having a sidewall, a lower portion, and an upper portion;(c) forming a signal storage node in the lower portion of the device trench, the signal storage node having a storage node conductor;(d) forming a signal transfer device in the upper portion of the device trench, the signal transfer device having a first diffusion region coupled to the storage node conductor and extending from the sidewall of the device trench into the substrate, a bit line diffusion region formed in the substrate adjacent to the top surface of the substrate and adjacent to the sidewall of the device trench, a channel region extending in the substrate from the first diffusion region to the bit line diffusion region, a gate insulator coating the sidewall of the device trench above the storage node conductor and adjacent the substrate, and a gate conductor filling the device trench;(e) coupling a bit line conductor to the bit line diffusion region;(f) self-aligning a wordline conductor formed upon the gate conductor with the sidewall of the device trench.