Patent ID: 6202105
Filing Date: 2001-03-13
Classification: G06F

Abstract:
A host adapter circuit for transferring data between a peripheral bus coupled to a peripheral device and a computer bus inside a personal computer, the host adapter circuit comprising:a memory coupled to each of the peripheral bus and the computer bus, the memory holding data retrieved from a plurality of messages received on the peripheral bus, the memory having storage elements grouped into a plurality of pages, each page having a fixed number of storage elements equal in number to storage elements in another page in the plurality of pages; wherein:each message in the plurality of messages has a sequence of bits organized into at least a header and a payload;the host adapter stores in at least a first group of one or more pages a first payload of a first message and thereafter stores in at least a second group of one or more pages a second payload of a second message, the second message being of a second context different from a first context of the first message; andthe host adapter uses a page in the first group and a page in the second group simultaneously by receiving at least a portion of the second payload during transmission of the first payload.