Patent ID: 6784068
Filing Date: 2004-08-31
Classification: H01L

Abstract:
A method of fabricating a capacitor over a first layer having a first conductive plug formed on a substrate in a semiconductor memory, the capacitor fabrication method comprising the steps of:forming a silicon nitride film on the first layer; forming a first capacitor oxide film on the silicon nitride film; forming a second capacitor oxide film over the first capacitor oxide film, wherein the wet etch rate of the first capacitor oxide film is different from the etch rate of the second capacitor oxide film; performing etching to a selected portion of the first and capacitor oxide films using the silicon nitride film as an etch stopper to form at least one contact hole for a storage node electrode, wherein the second contact hole is etched until the first conductive plug of the first layer is exposed; sequentially forming a silicon film for storage node electrode and a filler film on the resultant surface of the first and second capacitor oxides including the surface of the contact hole; forming a cylindrical storage node electrode by etching a predetermined portion of the filler film and the silicon film until the surfaces of the first and second capacitor oxide films are exposed to form a cylindrical storage node electrode; sequentially removing the remaining filler film and first and second oxide films; and sequentially forming a Ta2O5 dielectric film covering the storage node electrode and a TiN film for an upper electrode.