Patent ID: 7268056
Filing Date: 2007-09-11
Classification: H01L

Abstract:
1. A method of fabricating a non-volatile semiconductor memory device comprising a semiconductor substrate having a main surface provided with an element region and an element isolation region arranged alternately in one direction, comprising the steps of: forming an oxide film on said main surface of said semiconductor substrate to provide a tunnel oxide film; forming a first recess at said main surface of said semiconductor substrate; forming a second recess at a portion of a surface of said semiconductor substrate defining a bottom surface of said first recess; filling said first and second recesses with an insulation film to form a trench isolation film to serve as said element isolation region adjacent said element region; forming a polysilicon layer on said tunnel oxide film to provide a floating gate completely covering said element region in said direction; and forming a diffusion layer in said semiconductor substrate at said element region adjacent to said trench isolation film to extend from said main surface depthwise to reach a location deeper than said first recess and also be in contact with a side surface of said second recess.