Patent ID: 6114213
Filing Date: 2000-09-05
Classification: H01L

Abstract:
A method for fabricating a capacitor on a semiconductor substrate having an impurity region formed thereon, comprising:forming a first insulating film over the semiconductor substrate having the impurity region formed thereon;forming a contact hole in the insulating layer so as to expose the impurity region;forming a first polysilicon layer pattern having a silicide film pattern stacked thereon in a location corresponding to the contact hole;forming a second insulating film over the stacked first polysilicon layer and silicide film patterns; forming a third insulating film over the second insulating film;forming a second contact hole in the second and third insulating films to expose the silicide film pattern;removing a portion of the second insulating film adjacent to the second contact hole to form a space between the silicide film pattern and the third insulating film and expose a portion of the first insulating film adjacent to the stacked first polysilicon layer and silicide film patterns;forming a first capacitor electrode covering the silicide film pattern, the exposed portion of the first insulating film adjacent to the stacked first polysilicon layer and silicide film patterns, an interior surface of the space formed between the silicide film pattern and the third insulating film, and an interior surface of the second contact hole;forming a dielectric layer over the first capacitor electrode; andforming a second capacitor electrode over the dielectric layer.