Patent ID: 6177310
Filing Date: 2001-01-23
Classification: H01L

Abstract:
A method for forming a capacitor, comprising:providing a semiconductor substrate having a first dielectric layer formed thereon, wherein said first dielectric layer has a contact opening filled with conductive material to form a conductive stud;forming a second dielectric layer on said first dielectric layer and the surface of the conductive stud;forming a block layer on said second dielectric layer;forming a photoresist layer on said block layer to define an area for the capacitor by a ring pattern located over the conductive stud;etching portions of said block layer and said second dielectric layer using the ring pattern of the photoresist layer as an etch mask, thereby resulting in a pillar comprised of the second dielectric layer and the block layer;blanket and conformably forming a silicon layer on the surface of said block layer, the first dielectric layer, and the conductive stud, and on the sidewall of said pillar;forming a third dielectric layer on said silicon layer;etching back said third dielectric layer and a portion of said silicon layer atop of said block layer until said block layer is exposed, wherein said block layer is used as an anti-etching layer;treating said silicon layer to form a hemispherical-grained (HSG) layer on the surface of said silicon layer; andremoving said block layer, thereby resulting in the capacitor with the hemispherical-grained layer covering only the internal surface of said capacitor while leaving the external surface of said pillar uncovered by the hemispherical-grained layer.