Patent ID: 7352638
Filing Date: 2008-04-01
Classification: G11C

Abstract:
1. A method for testing a memory device that includes an ordinary memory block and a redundant memory block and conducts a test by using a built-in self-testing function, the method comprising the steps of: generating an address signal for identifying the ordinary memory block and contents thereof; identifying the ordinary memory block and contents thereof in response to the address signal during the test of the ordinary memory block; outputting a test target control signal for selecting the redundant memory block as the test target in response to the address signal transiting from an address which identifies a last test target in the ordinary memory block; selecting the redundant memory block as a test target in the test by the built-in self-testing function in response to the test target control signal; and identifying the redundant memory block and contents thereof in accordance with the address signal after the step of selecting the redundant memory block as the test target.