Patent ID: 9201834
Filing Date: 2015-12-01
Classification: G06F,G11C,H01L,Y02D

Abstract:
1. A reconfigurable high speed memory chip module, comprising a type of memory cell array group, wherein the type of memory cell array group comprises multiple memory cell array integrated circuits (ICs); a first transmission bus coupled to the type of memory cell array group having a first programmable transmitting or receiving data rate, a first programmable transmitting or receiving signal swing; a second transmission bus coupled to the logic unit having a second programmable transmitting or receiving data rate, a second programmable transmitting or receiving signal swing; and a logic unit coupled to the first transmission bus for accessing the type of memory cell array group through the first transmission bus, and further used for converting a first set of parallel data of the first transmission bus into a second set of parallel data through the second transmission bus.