Patent ID: 6277705
Filing Date: 2001-08-21
Classification: H01L

Abstract:
A fabrication method for forming an air-gap, which method uses a hard mask and is applicable on a semiconductor substrate, wherein the semiconductor substrate comprises a first conductive layer and a dielectric layer is formed on the first conductive layer, the method comprising the steps of:forming a patterned hard mask layer on the dielectric layer;removing a portion of the dielectric layer to form an opening in the dielectric layer and to expose the first conductive layer, while using the patterned hard mask layer as a mask;filling the opening with a conductive material to form a conductive plug in the dielectric layer and to electrically connect to the first conductive layer;forming a patterned second conductive layer on the hard mask layer to cover the conductive plug and to electrically connect to the conductive plug, wherein a portion of the hard mask layer is exposed;removing the hard mask layer; andcovering the substrate with a silicon oxide layer having a poor step coverage to form an air-gap between the second conductive layer and the dielectric layer.