Patent ID: 9043626
Filing Date: 2015-05-26
Classification: G06F,Y02D

Abstract:
1. A system for managing power consumption in a microprocessor platform, the system comprising: a simultaneous multi-threaded platform comprising a plurality of physical cores, each physical core configurable into a plurality of logical cores, each logical core executing a thread of a multi-threaded application running on the simultaneous multi-threaded platform; a system power monitor in communication with the simultaneous multi-threaded platform and configured to monitoring a current power consumption level of the simultaneous multi-threaded platform continuously and to compare the current power consumption level to a pre-defined peak power level; a system power controller in communication with the system power monitor and the simultaneous multi-threaded platform to adjust simultaneous multithreading levels in the physical cores by changing a number of logical cores on each physical core available to execute the multi-threaded application threads in response to a notification by the system power monitor that the current power consumption level exceeds the peak power level; and a power daemon in communication with the system power controller to determine physical cores on which to change the number logical cores and an in communication with a database comprising an identification of a plurality of bins, each bin comprising a subset of the plurality of physical cores, each physical core in a given bin having a common power consumption curve of multi-threaded application execution time versus power consumption and a common performance curve of level of multi-threading versus amount of speedup in multi-threaded application execution for a given adjustment of multi-threading level; wherein the power daemon determined physical cores comprise bins within the plurality of bins.