Patent ID: 6500715
Filing Date: 2002-12-31
Classification: B82Y,H01L,Y10S

Abstract:
A method of manufacturing a semiconductor device comprising on the same silicon substrate a plurality of field-effect transistors each having a lamination of a gate insulation film and a gate electrode, said plurality of field-effect transistors including a first field-effect transistor and a second field-effect transistor wherein a thickness of the gate insulation film of the first field-effect transistor is larger than a thickness of the gate insulation film of the second field-effect transistor, said method comprising the steps of:forming a first layer and a second layer for the formation of the gate insulation film and the gate electrode of said first field-effect transistor; patterning the first layer and the second layer to form the gate insulation film and the gate electrode of the first field-effect transistor and removing the first layer and the second layer without removing the formed gate insulation film and the gate electrode of said first field-effect transistor; forming a third layer and a fourth layer for the formation of the gate insulation film and the gate electrode of said second field-effect transistor; and patterning the third layer and the fourth layer to form the gate insulation film and the gate electrode of said second field-effect transistor.