Patent ID: 9030346
Filing Date: 2015-05-12
Classification: H03M

Abstract:
1. An analog-to-digital converter (ADC) for converting an analog signal to a digital signal, comprising: a capacitor array including a plurality of binary weighted capacitors each capacitor corresponding to one bit of the digital signal, and an additional capacitor, wherein the capacitors of the capacitor array and the additional capacitor are all connected in parallel with each other; a switching circuit for selectively connecting the binary weighted capacitors and the additional capacitor to first, second, third and fourth voltage terminals, wherein the first voltage terminal is at a first voltage, the second voltage terminal is at a second voltage, the third voltage terminal is at a third voltage, and the fourth voltage terminal is at a fourth voltage, and wherein each capacitor of the capacitor array and the additional capacitor has a bottom plate connected to the switching circuit for connection to one of the first through fourth voltages, wherein: (i) the digital signal has at least nine bits (b (ii) each binary weighted capacitor has a value of two times a value of an adjacent capacitor, wherein the capacitor for bit b (iii) the additional capacitor is located between the capacitors for bits b (iv) the capacitor array further comprises a dummy capacitor connected in parallel with the other capacitors and located adjacent to the capacitor for bit b a test controller, connected to the capacitor array, for storing one or more test instructions for performing a test on the ADC; a first comparator, connected to the capacitor array and the third voltage terminal for comparing an output voltage received from the capacitor array with the third voltage; and a successive approximation register (SAR), connected to the first comparator and the test controller, for measuring a binary code corresponding to the one or more binary weighted capacitors.