Patent ID: 6728526
Filing Date: 2004-04-27
Classification: H03L

Abstract:
A frequency synthesizer device comprising:a PLL circuit including a reference signal inputting means, a phase comparator, a low-pass filter, a voltage-controlled oscillator, and a variable frequency divider; and a frequency-division ratio control circuit for controlling the variable frequency divider so that a frequency division ratio of the variable frequency divider is changed in time and a time average value of the frequency division ratio contains a value below a decimal point, including: a plurality of accumulators each having a register and an adder; a fractional part calculator circuit for receiving a carry signal generated by the adder to add binomial coefficients in sequence; and a frequency-division ratio adder for adding an output of the fractional part calculator circuit and integer part data to set the frequency division ratio in the variable frequency divider, wherein the frequency-division ratio control circuit is operated at a plurality of clocks having different timings, whereby a signal having a frequency that is equal to a product of the time average value of the frequency division ratio and a frequency of a reference signal is generated.