Patent ID: 6512269
Filing Date: 2003-01-28
Classification: H01L

Abstract:
An silicon-on-insulator semiconductor device comprising:an silicon-on-insulator substrate including at least an active region disposed on an electrically insulating region; a plurality of diffusion regions in said active region, separated by, and abutting a plurality of body regions in said substrate, a first one of the body regions and its abutting diffusion regions having a first width and successive ones of the body regions and their abutting diffusion regions having successively smaller widths; and a plurality of gate conductors each over one of the plurality of body regions and separated from the body regions by a dielectric material, wherein said plurality of gate conductors and said dielectric have an aspect ratio in terms of gate conductor length to dielectric material thickness of from about 10:1 to about 30:1, and wherein said silicon-on-insulator semiconductor device has a drain-to-source breakdown voltage of at least approximately 2.5V.