Patent ID: 8723714
Filing Date: 2014-05-13
Classification: H03M

Abstract:
1. A multiplying digital-to-analog converter applied for a pipeline circuit in a pipeline analog-to-digital converter, the multiplying digital-to-analog converter comprising: a sub digital-to-analog converter decoding circuit; a capacitor-switch circuit; and an operation amplifier circuit, wherein an output terminal of the capacitor-switch circuit is coupled to an input terminal of the operation amplifier circuit, and input terminals of the capacitor-switch circuit are co pled to output terminals of the sub digital-to-analog converter decoding circuit and an analog-signal input quantity of the pipeline circuit, wherein the capacitor-switch circuit comprises: at least two sampling capacitor sets, wherein the at least two sampling capacitor sets are coupled in parallel, and the number of sa piing capacitors in one of the at least two sampling capacitor sets is larger than or equal to two, and the sampling capacitors in each of the at least two sampling capacitor sets are coupled in parallel, wherein each of the at least two sampling capacitor sets is coupled to the analog-signal input quantity through one corresponding sampling switch, and the sampling capacitors in the same sampling capacitor set connect to/disconnect from the analog-signal input quantity simultaneously, wherein each of the at least two sampling capacitor sets is coupled to the corresponding output terminal of the sub digital-to-analog converter decoding circuit through one corresponding decoding switch, and the sampling capacitors in the same sampling capacitor set connect to/disconnect from the corresponding output terminal of the sub digital-to-analog converter decoding circuit simultaneously, wherein the sub digital-to-analog converter decoding circuit decodes a digital quantity and outputs a corresponding analog signal at each of the output terminals of the sub digital-to-analog converter decoding circuit, such that the corresponding analog signals at the output terminals of the sub digital-to-analog converter decoding circuit are applied to the respective sampling capacitor sets through the decoding switches and summed by the respective sampling capacitor sets to obtain an analog-signal quantity corresponding to the digital quantity, and wherein the digital quantity is a quantity which is obtained by processing the analog-signal input quantity by a sub analog-digital converter of the pipeline circuit.