Patent ID: 6225679
Filing Date: 2001-05-01
Classification: H01L

Abstract:
A protection device to protect an integrated circuit in CMOS technology on a P-type substrate, the protection device comprising:a series protection resistor disposed between internal circuitry to be protected and a connection pad;a lateral bipolar transistor including a first N-type diffusion to form an emitter of the lateral bipolar transistor, a second N-type diffusion to form a collector of the lateral bipolar transistor and an intermediate P-type region forming a base of said transistor;wherein one of the N-type diffusions is connected to said connection pad;wherein the N-type diffusion that is connected to the connection pad is made in an N-type tub with a zone that extends laterally outside the tub in the base; andwherein a P-type implantation is made on the entire substrate outside the N-type tub and not in the intermediate region of the base of said lateral transistor in which said zone does not extend.