Patent ID: 7812390
Filing Date: 2010-10-12
Classification: G11C,H01L

Abstract:
1. A semiconductor memory device comprising: a first substrate having at least one string comprising a first select transistor, a second select transistor, and first memory cells connected in series between the first and second select transistors of the first substrate; and a second substrate having at least one string comprising a first select transistor, a second select transistor, and second memory cells connected in series between the first and second select transistors of the second substrate, wherein a number of the first memory cells of the at least one string of the first substrate is different from a number of the second memory cells of the at least one string of the second substrate, and wherein the number of the second memory cells is less than the number of the first memory cells, and wherein a channel length of each of the second memory cells is longer than a channel length of each of the first memory cells.