Patent ID: 6372592
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A method for fabricating a self-aligned semiconductor structure, comprising the steps of:forming a semiconductor layer on an insulating substrate; forming an electrically nonconductive oxide layer on the semiconductor layer; forming an electrically conductive metal layer on the oxide layer; removing the metal layer and the oxide layer from a portion of the semiconductor layer to form an electrically-active metal gate aligned to define a source region and a drain region in the semiconductor layer; incorporating dopants into the source region and the drain region; and annealing the source region and the drain region of the semiconductor layer to activate the respective implanted dopants by exposing the unmasked surface of the semiconductor structure to a beam of radiation having a peak surface energy density greater than about 500 mJ/cm2 and a wavelength from about 150 nm to about 350 nm that is reflected by the unmasked surface of the metal gate, wherein the metal gate temperature does not exceed about 25Â° C. during the annealing step.