Patent ID: 7351621
Filing Date: 2008-04-01
Classification: G02F,H01L

Abstract:
1. A method of fabricating an array substrate for a liquid crystal display device, comprising the steps of: forming a first metal layer on a substrate; patterning the first metal layer to form a gate line and a gate electrode; forming a first gate insulation layer and a second gate insulation layer to cover the patterned first metal layer; forming a pure amorphous silicon layer and a doped amorphous silicon layer on the second gate insulation layer; patterning the doped amorphous silicon layer and the pure amorphous silicon layer to expose a portion of the second gate insulation layer and to form an ohmic contact layer and an active layer over the gate electrodes; removing the exposed portion of the second gate insulation layer including a portion overlapping a first portion of the gate line, to form a patterned portion of the second gate insulating layer under the patterned doped and pure amorphous silicon layers such that the first gate insulating layer is exposed; forming a second metal layer to cover the first gate insulation layer, the second gate insulation layer, the active layer and the ohmic contact layer; patterning the second metal layer to form a data line, a source electrode, a drain electrode and a capacitor electrode, the capacitor electrode directly on the exposed first gate insulation layer and overlapping the first portion of the gate line; forming a passivation layer to cover the patterned second metal layer; patterning the passivation layer to form a drain contact hole to the drain electrode and a capacitor contact hole to the capacitor electrode; forming a transparent conductive material on the patterned passivation layer; and patterning the transparent conductive material to form a pixel electrode.