Patent ID: 7027340
Filing Date: 2006-04-11
Classification: G11C

Abstract:
1. An output device for static random access memory (SRAM), the SRAM having a plurality of memory cells to store a plurality of data, the output device comprising: a precharger having a common output node connected to a plurality of output nodes of the plurality of memory cells, which precharges the common output node to a high potential by a precharge signal when one of the memory cells is to be read; a charge and discharge path circuit connected to the common output node, which generates a potential of an output terminal of the charge and discharge path circuit in accordance with an internal first grounding path on or not that is controlled by an inverted precharge signal; a voltage hold circuit connected to the common output node and the output terminal of the charge and discharge path circuit, which controls a voltage of the common output node in accordance with the potential of the output terminal of the charge and discharge path circuit and an internal second grounding path on or not that is controlled by the precharge signal, and closes the second grounding path when the precharger is precharging; an output inverter, which generates an inverted voltage on its output terminal to output in accordance with the potential of the output terminal of the charge and discharge path circuit; and a feedback path circuit connected to the output terminals of the charge and discharge path circuit and the output inverter.