Patent ID: 6458680
Filing Date: 2002-10-01
Classification: H01L

Abstract:
A method for fabricating a semiconductor device, comprising:providing a semiconductor substrate including a surface, at least first and second elongate conductive patterns extending parallel to each other in a first direction along the surface of the semiconductor substrate, and a first insulating layer, wherein the first insulating layer includes a first portion covering the first conductive pattern such that an upper surface of the first portion extends over an upper surface of the first conductive pattern and a side surface of the first portion extends along a side of the first conductive pattern, and a second portion covering the second conductive pattern such that an upper surface of the second portion extends over an upper surface of the second conductive pattern and a side surface of the second portion extends along a side of the second conductive pattern, wherein the first and second portions of the first insulating layer are spaced apart from each other in a second direction to define a gap between the side surfaces thereof, the second direction being perpendicular to the first direction; forming a second insulating layer over an entirety of the surface of the semiconductor substrate including over the first insulating layer and within the gap between the side surfaces of the first and second portions of the first insulating layer; etching the second insulating layer to form an opening therein that extends vertically towards the surface of the semiconductor substrate and horizontally in the first and second directions, wherein opposite first sidewalls of the opening extend in the first direction and are located over the upper surfaces of the first and second portions of the first and second insulating layer, respectively, and wherein opposite second sidewalls of the opening extend in the second direction between the first and second portions of the second insulating layer; isotropically etching the sidewalls of the opening in the second insulating layer to expand a width of the opening in the first and second directions; forming a conductive layer over an entirety of the surface of the semiconductor substrate including over the second insulating layer and within the expanded opening of the second insulating layer; and planarizing the conductive layer and the second insulating layer until the upper surfaces of the first and second portions of the first insulating layer are exposed, wherein the conductive layer remaining after said planarizing forms a contact pad located between the first and second conductive patterns.