Patent ID: 7586322
Filing Date: 2009-09-08
Classification: H01L

Abstract:
1. A test structure to determine variations in electrical characteristics of field effect transistors formed in a substrate having an initial doped well, defining an initial well edge, said test structure comprising: an array of said field effect transistors (FETs) each of which has first and second source/drain regions and a gate region, with the first source/drain region being connected in common and said FETs being arranged in a plurality of groups of multiple FETs and a plurality of sets of multiple FETs, with the FETs associated with a common group having a gate region connected in common and spaced-apart from said initial well edge a common distance, with the common distance associated with the FETs of each of said plurality of groups differing from the common distance associated with the FETs of the remaining groups of said plurality of groups, said second source/drain region of FETs associated with a common set being connected in common and spaced-apart from said initial well edge a length, with the length associated with each of the FETs of said common set differing from the length associated with the remaining FETs of said common set, with one of the FETs of said common set being included in said common group, wherein a plurality of contacts are in electrical communication with the first source/drain region, the second source/drain region and the gate region, and wherein one portion of the plurality of contacts is in juxtaposition with the array and another portion of the plurality of contacts is in superimposition with the array.