Patent ID: 6329252
Filing Date: 2001-12-11
Classification: H01L

Abstract:
A method of forming self-aligned contacts on a semiconductor substrate, which comprises the steps of:providing a semiconductor substrate;forming a gate electrode structure having a vertical sidewall and a first protecting layer thereon over said semiconductor substrate;forming a first doped region in a portion of said semiconductor substrate adjacent to said gate electrode structure;forming a insulating sidewall spacer on said sidewall of said gate electrode structure;forming a second doped region in a portion of said semiconductor adjacent to said sidewall spacer;forming a second protecting layer to non-conformally blanket said first protecting layer, said insulating sidewall spacer, and said semiconductor substrate;forming a interlayer insulating layer on said second protecting layer to form a planar surface;etching said interlayer insulating layer and said second protecting layer at a determined position to expose said second doped regions, and;forming a double spacer composed of a second protecting layer residue adjacent to said insulating sidewall spacer and said insulating sidewall spacer, thereby forming said self-aligned contacts.