Patent ID: 6704361
Filing Date: 2004-03-09
Classification: H04N

Abstract:
A variable length decoder for decoding a stream of compressed video data, wherein the stream includes a plurality of variable length encoded data representing image areas of transmitted frames, comprising:a memory for storing variable length encoded data; a command decode and execution circuit coupled to the memory for receiving selected variable length encoded data from the memory; a sequencer coupled to the command decode and execution circuit for providing commands to the command decode and execution circuit in accordance with a set of instructions stored within the sequencer to convert the variable length encoded data into corresponding decoded values; a master controller coupled to the command decode and execution circuit for providing commands to the command decode and execution circuit independently of the sequencer to control decoding operation of the command decode and execution circuit; and a plurality of command instruction registers coupled to the sequencer and the master controller, wherein the sequencer and the master controller are operable to read and write contents of the command instruction registers which include data that form at least a part of the set of instructions stored within the sequencer.