Patent ID: 7521970
Filing Date: 2009-04-21
Classification: H03K

Abstract:
1. A high voltage tolerant input buffer capable of operating across wide range of power supply comprising: an NMOS pass transistor having a source terminal coupled to an input pin; an inverting input stage having its input terminal coupled to a drain terminal of said NMOS pass transistor; a driving inverter having its input terminal coupled to an output terminal of said inverting input stage and an output terminal coupled to a core; a keeper PMOS with a gate connected to an output of said inverting input stage and a drain connected to a drain of said NMOS pass transistor and a source connected to VDD; and a dynamic gate bias control circuit coupled to gate terminal of said NMOS pass transistor, wherein said dynamic gate bias control circuit senses the signal at input and output of said inverting input stage and dynamically controls gate bias voltage of said NMOS pass transistor such that the dynamic gate bias control circuit provides a voltage that is higher than VDD to the gate terminal of said NMOS pass transistor.