Patent ID: 6800550
Filing Date: 2004-10-05
Classification: H01L

Abstract:
A method for forming conductive wires of a semiconductor device, comprising the steps of:forming a first interlayer insulating film on a semiconductor substrate having a lower metal wire to form a structure; forming a diffusion barrier layer over the structure; forming a sacrificial conductive layer on the diffusion barrier layer; forming a T-shaped sacrificial conductive layer pattern based on a photolithography process using an upper metal wire mask to etch a lower portion of a side wall of the sacrificial conductive layer by utilizing a notching phenomenon; forming a planarized second interlayer insulating film over the structure to expose the T-shaped sacrificial conductive layer pattern, the second interlayer insulating film filling an under-cut of the T-shaped sacrificial conductive layer pattern; removing the T-shaped sacrificial conductive layer pattern by etching an exposed portion of the diffusion barrier layer to simultaneously form a via contact hole and a trench exposing the lower metal wire, and forming an upper metal wire connected to the lower metal wire by filling the via contact hole and the trench.