Patent ID: 8443274
Filing Date: 2013-05-14
Classification: G06F,H04L

Abstract:
1. A checker circuit for checking whether a handshake protocol is correctly used, the checker circuit being configured to receive a digital first input word, wherein a respective bit of the input word is formed by a respective protocol signal currently being logically assigned; to detect a transition of the first input word into a second input word by a change in logical assignment of one of the protocol signals; to compare the second input word with a digital comparison word on the transition of the first input word into the second input word and to output externally an indicator for the presence of a protocol error, wherein a respective bit of the comparison word represents a logical assignment of the respective protocol signal after the transition, as expected according to the handshake protocol; and to change the comparison word after a defined delay time has elapsed after the transition of the first input word into the second input word, wherein a respective bit of the changed comparison word represents a next logical assignment of the respective logical protocol signal, as expected in accordance with the handshake protocol, after a renewed transition, which has not yet occurred, of the second input word into a third input word and wherein the defined delay time matches a time span whose duration must lie between two changes to the protocol signal in accordance with the handshake protocol.