Patent ID: 9123274
Filing Date: 2015-09-01
Classification: G09G

Abstract:
1. A gate signal line driving circuit comprising: a plurality of shift register basic circuits each of which outputs to a corresponding gate signal line a gate signal which has a high voltage during a high signal period of one screen display period and has a low voltage during a low signal period that is a period other than the high signal period, wherein each of the shift register basic circuits comprises: a gate line high voltage application circuit which is in an ON state in accordance with the high signal period to apply the high voltage to the corresponding gate signal line; a first gate line low voltage application circuit which is in an ON state in accordance with the low signal period to apply the low voltage to the corresponding gate signal line; a second gate line low voltage application circuit which is turned on to apply the low voltage to the corresponding gate signal line in at least a part of a period until the first gate line low voltage application circuit is turned on after the gate line high voltage application circuit is turned off; and a low voltage application OFF control circuit which applies an OFF voltage to a switch of the first gate line low voltage application circuit when the low voltage application OFF control circuit is in an ON state, wherein a common ON control signal is inputted to both a switch of the low voltage application OFF control circuit and a switch of the gate line high voltage application circuit, and both the low voltage application OFF control circuit and the gate line high voltage application circuit are turned on by the common ON control signal.