Patent ID: 8659003
Filing Date: 2014-02-25
Classification: H01L

Abstract:
1. A non-volatile memory device structure, comprising: a substrate having a surface region; a first dielectric material overlying the surface region of the semiconductor substrate; a first cell, the first cell comprising a first wiring structure extending in a first direction overlying the first dielectric material, a first contact region comprising a p+ polysilicon material, a first switching region comprising an amorphous silicon material, and a second wiring structure extending in a second direction orthogonal to the first direction; a second cell, the second cell comprising the first wiring structure, a second contact region comprising the p+ polysilicon material, a second switching region comprising the amorphous silicon material, and a third wiring structure separated from the second wiring structure and parallel to the second wiring structure; and a second dielectric material disposed at least in a region between the first switching region and the second switching region to electrically and physically isolate the first switching region and the second switching region.