Patent ID: 8466516
Filing Date: 2013-06-18
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; an element isolation insulator selectively formed on the semiconductor substrate and having a side surface; a well of a first conductivity type formed between the element isolation insulator, the well being in contact with the side surface; a source layer of a second conductivity type selectively formed on the well and being in contact with the side surface; a drain layer of the second conductivity type selectively formed on the semiconductor substrate, being in contact with the side surface, and being spaced from the source layer; a contact layer of the first conductivity type formed between the source layer and the drain layer, the contact layer being spaced from the side surface; a source electrode connected to the source layer and the contact layer; a drain electrode connected to the drain layer; and a gate electrode provided on the element isolation insulator along the side surface, wherein: the side surface extends in a direction from the source layer to the drain layer, and the source layer includes a portion extending into a region between the contact layer and the side surface.