Patent ID: 8604578
Filing Date: 2013-12-10
Classification: H01L

Abstract:
1. A chip package, comprising: a substrate having a first surface and a second surface; an optoelectronic device disposed at the first surface; a protection layer located on the second surface of the substrate, wherein the protection layer has an opening; a light shielding layer located on the second surface of the substrate, wherein a portion of the light shielding layer extends into the opening of the protection layer, wherein the light shielding layer is an insulating material; a conducting bump disposed on the second surface of the substrate and filled in the opening of the protection layer, wherein the conducting bump is in direct contact with the light shielding layer that extends into the opening; and a conducting layer located between the substrate and the protection layer, wherein the conducting layer electrically connects the optoelectronic device to the conducting bump.