Patent ID: 6591154
Filing Date: 2003-07-08
Classification: H01L

Abstract:
A method for repairing defects in semiconductor wafers utilizing a repair tool having means for applying energy to obliterate defects at locations on said wafer, said method being a graphical approach implementing a graphical user interfee (GUI) comprising a pixel screen display and comprising the steps of:a) via said interface, identifying a wafer defect to repair and enclosing said defect within a polygonal repair outline drawn using a default line thickness; b) graphically adjusting the line thickness to modified the enclosed polygonal repair outline area and generate one or more enclosed areas bounded by said modified polygonal repair outline area; c) graphically demarcating pixels in said one or more enclosed areas bounded by the modified polygonal repair outline area; and d) scanning said modified polygonal repair outline, and automatically mapping each graphically demarcated pixel location inside said one or more enclosed areas with a location of said means for applying energy to said wafer, and initiating said means for applying energy to said wafer coordinated to said demarcated pixel location for repairing said defect, whereby the identification of said pixel location is accomplished using standard graphical tools with minimal operator intervention.