Patent ID: 7078782
Filing Date: 2006-07-18
Classification: H01L

Abstract:
1. A semiconductor device having a first MISFET forming region, a second MISFET forming region and a Schottky barrier diode forming region on a main surface of a semiconductor substrate, comprising: first MISFETs formed in the first MISFET forming region; second MISFETs formed in the second MISFET forming region; and a Schottky barrier diode formed in the Schottky barrier diode forming region, wherein the Schottky barrier diode forming region is located between the first and second MISFET forming regions; first source regions of the first MISFETs and second source regions of the second MISFETs are electrically connected; first gate electrodes of the first MISFETs and second gate electrodes of the second MISFETs are electrically connected; first drain regions of the first MISFETs and second drain regions of the second MISFETs are electrically connected; an anode region of the Schottky barrier diode is electrically connected with the first and second source regions; a cathode region of the Schottky barrier diode is electrically connected with the first and second drain regions; and the semiconductor substrate has no other Schottky barrier diode forming region.