Patent ID: 8242812
Filing Date: 2012-08-14
Classification: H03K

Abstract:
1. A buffer circuit, comprising: a plurality of output transistors connected to form respective current paths in parallel to one another between a first fixed voltage terminal supplying a certain fixed voltage and an output terminal, and configured to turn on to change a voltage of the output terminal; and a plurality of gate control transistors connected to form respective current paths between a second fixed voltage terminal supplying a certain fixed voltage and a gate of one of the output transistors or between two of gates of the output transistors, and configured to apply a gate voltage to the gates of the output transistors to control on/off of the output transistors, a gate of each of the gate control transistors being applied with a certain voltage, such that when a source of each of the gate control transistors changes from a first potential to a second potential, a potential difference between the gate and the source of each of the gate control transistors attains a threshold voltage or greater, whereby each of the gate control transistors is turned on.