Patent ID: 6255160
Filing Date: 2001-07-03
Classification: H01L

Abstract:
A method for making an array of high-density memory cells having auto-self-aligned contacts for DRAM devices on a semiconductor substrate comprising the steps of:forming device areas for memory cells surrounded and electrically isolated by field oxide areas on said substrate;forming a gate oxide on said device areas;depositing a first polycide layer and a first cap oxide layer and patterning to form word lines extending over said device areas to form FET gate electrodes, and forming doped source/drain areas adjacent to said gate electrodes, and forming first sidewall spacers on said word lines;forming a patterned diffusion protection oxide with openings for contacts to said substrate;depositing a first conducting layer;polishing back said first conducting layer to said first cap oxide layer and patterning said first conducting layer to form first contact plugs that are auto-self-aligned to said gate electrodes;depositing and planarizing a first insulating layer;etching bit-line contact openings in said first insulating layer to said first contact plugs;depositing a second polycide layer and a second cap layer and patterning to form bit lines and forming insulating second sidewall spacers on said bit lines;etching capacitor node contact openings in said first insulating layer to said first contact plugs;depositing a second conducting layer;polishing back said second conducting layer to said second cap layer and patterning said second conducting layer to form second contact plugs for capacitor node contacts to said first contact plugs, said second contact plugs auto-self-aligned to said bit lines;depositing and planarizing a second insulating layer and etching openings for capacitor bottom electrodes to said second contact plugs;forming a third conducting layer in said openings for said capacitor bottom electrodes, and forming an interelectrode dielectric layer and a fourth conducting layer to form said capacitors and completing said array of high-density memory cells.