Patent ID: 9094000
Filing Date: 2015-07-28
Classification: H03K,H04L

Abstract:
1. An integrated circuit communicating with a device over a multi-pin parallel bus, the integrated circuit comprising: at least a first pin and a second pin configured to communicate with the device over the multi-pin parallel bus, wherein the device is external to the integrated circuit, wherein the first pin is configured to communicate with a first component of the device over a first signal line, and wherein the second pin is configured to communicate with a second component of the device over a second signal line; and an impedance tuning module disposed in the integrated circuit and configured to tune an impedance value of a first impedance associated with the first pin separately from tuning an impedance value of a second impedance associated with the second pin, wherein based on an impedance associated with one or both of the first component and the first signal line, the impedance value of the first impedance is tuned to a first value, and wherein based on an impedance associated with one or both of the second component and the second signal line, the impedance value of the second impedance is tuned to a second value, the second value being different from the first value.