Patent ID: 6759319
Filing Date: 2004-07-06
Classification: H01L

Abstract:
A method to form solder bumps on an integrated circuit device comprising:providing contact pads overlying a semiconductor substrate and a passivation layer overlying said contact pads wherein said passivation layer has openings that expose a top surface of said contact pads; depositing a sacrificial layer overlying said passivation layer and said exposed top surface of contact pads wherein said sacrificial layer is not wettable to solder; depositing an underbump metallurgy layer (UMB) overlying said sacrificial layer; thereafter patterning said underbump metallurgy layer to form UBM caps overlying said contact pads; forming an aperture mask overlying said sacrificial layer wherein said aperture mask has openings that expose said sacrificial layer overlying said contact pads and wherein said aperture mask comprises a laser drilled polymer; thereafter etching away said sacrificial layer where said sacrificial layer is exposed by said aperture mask openings to thereby expose said contact pads; thereafter depositing a solder layer into said openings in said aperture mask; thereafter reflowing said solder layer to form solder bumps overlying said contact pads; thereafter stripping away said aperture mask; and thereafter etching away remaining said sacrificial layer to complete formation of said solder bumps in the manufacture of said integrated circuit device wherein said etching away insures complete removal of all residue of said aperture mask.