Patent ID: 6268254
Filing Date: 2001-07-31
Classification: H01L,Y10S

Abstract:
A method for forming a gate electrode comprising the steps of:providing a substrate with an insulative layer deposited thereon;forming a gate layer on the insulative layer;depositing a thin first spacer layer on the gate layer and the substrate;depositing a thin second spacer layer on the thin first spacer layer;removing a portion of the thin second spacer layer to form thin second spacers;removing a portion of the thin first spacer layer to form thin first spacers;depositing a thin third spacer layer on the gate layer, the thin first spacers and the thin second spacers;depositing a thick fourth spacer layer on the thin third spacer layer;removing a portion of the thick fourth spacer layer to form recessed thick fourth spacers;removing a portion of the thin third spacer layer to form recessed thin third spacers;depositing a layer of reactant on the gate layer;annealing the layer of reactant and the gate layer to form a conductive layer; and,removing the unreacted reactant layer.