Patent ID: 9112150
Filing Date: 2015-08-18
Classification: H01L

Abstract:
1. A method of forming memory cells, comprising: forming a plurality of heater structures over an array of electrical nodes; the array of electrical nodes having rows extending along a first direction and having columns extending along a second direction substantially orthogonal to the first direction; wordlines being under the array of electrical nodes and extending along the first direction; forming a phase change material across the plurality of heater structures; patterning the phase change material into a plurality of confined structures; the plurality of confined structures being spaced from one another by one or more insulative materials that entirely laterally surround each of the confined structures in the plurality of confined structures; forming bitlines across the plurality of confined structures, with the bitlines extending along the second direction; and wherein the plurality of heater structures are patterned from lines of heater material that extend along the first direction, and wherein the patterning of the phase change material into the plurality of confined structures comprises: after forming and lining the first trenches, forming second trenches through the phase change material and the lines of heater material, with the second trenches extending along the second direction and patterning the lines of heater material into the plurality of heater structures; and