Patent ID: 6144240
Filing Date: 2000-11-07
Classification: H03K

Abstract:
An apparatus including a low noise buffer circuit for increasing the slew rates of transitions between signal states of a digital signal while drawing minimal transient power supply current during said signal state transitions, comprising:a plurality of digital signal inversion circuits configured to conduct a plurality of power supply source and sink currents and in accordance therewith receive and successively invert an input digital signal with input rising and falling edge slew rates and in accordance therewith provide an output digital signal with output rising and falling edge slew rates which are higher than said input rising and falling edge slew rates;a current supply circuit, coupled to said plurality of digital signal inversion circuits, configured to receive a plurality of current control signals and in accordance therewith convey said plurality of power supply source and sink currents; anda control circuit, coupled to said plurality of digital signal inversion circuits and said current supply circuit, configured to receive said output digital signal and in accordance therewith provide said plurality of current control signals;wherein, in accordance with said plurality of current control signals, successive alternating ones of said plurality of digital signal inversion circuits conduct respective ones of said plurality of power supply source and sink currents whichinclude unregulated source currents and regulated sink currents during respective low-to-high output signal transitions,transition from said unregulated source currents and said regulated sink currents to regulated source currents and unregulated sink currents, respectively, during respective high output signal states,include said regulated source currents and said unregulated sink currents during respective high-to-low output signal transitions, andtransition from said regulated source currents and said unregulated sink currents to said unregulated source currents and said regulated sink currents, respectively, during respective low output signal states.