Patent ID: 6055585
Filing Date: 2000-04-25
Classification: G06F

Abstract:
In a Universal Asynchronous Receiver/Transmitter (""UART"") that includes registers for controlling the flow of data in the UART, a method for operating a UART at speeds greater than 115,200 bits per second comprises the steps of:providing a register in the UART, the register having a predetermined number of bits which has a constant value during the operation of the UART at speeds less than or equal to 115,200 bits per second;assigning the predetermined number of bits in the register in the UART as an Increased Baudrate Register;putting a value in the Increased Baudrate Register wherein, during the operation of the UART at speeds less than or equal to 115,200 bits per second, the value in the Increased Baudrate Register equals the constant value of the register during operation of the UART at speeds less than or equal to 115,200 bits per second, and wherein, during operation of the UART at speeds greater than 115,200 bits per second, the value in the Increased Baudrate Register does not equal the constant value of the register; anddetermining the bits per second of the UART, in part, based on the Increased Baudrate Register.