Patent ID: 6723637
Filing Date: 2004-04-20
Classification: H01L

Abstract:
A method for fabricating a semiconductor device comprising the steps of:forming an impurity diffusion layer serving as a source or a drain of a transistor in a semiconductor substrate; forming a first protection insulating film covering said transistor; burying, in said first protection insulating film, a plug having a lower end electrically connected to said impurity diffusion layer of said transistor; forming, on said first protection insulating film, an oxygen barrier layer having a lower face connected to an upper end of said plug; forming a capacitor lower electrode on said oxygen barrier layer; forming, on said first protection insulating film, a second protection insulating film covering said oxygen barrier layer and said capacitor lower electrode, and planarizing said second protection insulating film, whereby placing an upper face of said second protection insulating film at substantially the same level as an upper face of said capacitor lower electrode; forming a capacitor dielectric film having a plane shape larger than a plane shape of said capacitor lower electrode by depositing an oxide dielectric film on said capacitor lower electrode and said second protection insulating film and patterning said oxide dielectric film; and forming a capacitor upper electrode on said capacitor dielectric film.