Patent ID: 7330963
Filing Date: 2008-02-12
Classification: G06F

Abstract:
1. An apparatus, comprising: an out of order issue engine that has a set of micro-operations that the out of order issue engine issues using: speculative operations that can be issued whenever their operand data is available; and architectural operations that issue after all earlier architectural operations in program order have been issued and all previous speculative operations associated with this architectural operation have issued, the architectural operations having a potential to fault or cause an exception, wherein a potentially excepting architectural operation is to issue with at least one speculative micro-operation, which generates data results speculatively, and at least one architectural micro-operation, which signals the faulting condition for the excepting operation, wherein a potentially excepting architectural operation is decomposed into a speculative micro-operation and an architectural micro-operation so that a STORE operation becomes an architectural operation and all previous faulting conditions may be guaranteed to have evaluated before the STORE is issued.