Patent ID: 6861315
Filing Date: 2005-03-01
Classification: H01L

Abstract:
1. A method of forming an array of bi-directional non-volatile memory cells in a substrate of a substantially single crystalline semiconductive material having a first conductivity type, said substrate having a substantially planar surface, said method comprising: forming a plurality of spaced apart substantially parallel trenches in a first direction in said planar surface; each trench having a sidewall and a bottom; forming a region of a second conductivity type in said bottom of each trench; forming a floating gate in each trench insulated and spaced apart from said sidewall of said trench; said floating gate having a first end near said bottom and a second end furthest away from said bottom; forming a layer of tunneling oxide about said second end of each floating gate; forming a layer of word region on said layer of tunneling oxide; said layer of word region extending in a second direction substantially perpendicular to said first direction; cutting said layer of word region in a plurality of strips in said second direction to form a plurality of spaced apart word lines; each strip spaced apart from one another and substantially parallel to one another, and cutting through the floating gate in each trench; and forming an electrical connection to each of said region of second conductivity type and each of said plurality of spaced apart word lines.