Patent ID: 9159770
Filing Date: 2015-10-13
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor device, the method comprising: sequentially stacking a first semiconductor layer and a second semiconductor layer having different etch selectivity from that of the first semiconductor layer on a semiconductor substrate; defining a source formation region and a drain formation region by etching the second semiconductor layer corresponding to a gate formation region by a predetermined thickness; forming a gate insulating layer on a surface of the gate formation region and an oxide semiconductor layer in the first semiconductor layer; defining a transistor region by etching the second semiconductor layer and the oxide semiconductor layer in an outer side of the drain formation region; forming a common source node by selectively removing the exposed first semiconductor layer; forming a gate in the gate formation region; forming a source region and a drain region in the source formation region and the drain formation region, respectively; forming heating electrodes on the source region and the drain region; and forming resistance variable material layers on the heating electrodes.