Patent ID: 6492224
Filing Date: 2002-12-10
Classification: H01L

Abstract:
A method for mixed-mode creation of a Polysilicon-Insulator-Polysilicon (PIP) capacitor and CMOS devices on the surface of a semiconductor substrate, comprising the steps of:providing a semiconductor substrate, said substrate having been provided in the surface thereof with at least one first Shallow Trench Isolation (STI) region over the surface of which a Polysilicon-Insulation-Polysilicon (PIP) capacitor is to be created, said substrate further having been provided in the surface thereof with at least one active region over the surface of which at least one CMOS device is to be created, said at least one active region being bounded by STI regions; creating a first layer of polysilicon within said first STI region, the surface of said first layer of polysilicon being in a plane about equal to the plane of the surface of said substrate; creating n-type and p-type impurity implants into the surface of said substrate; creating a layer of insulation overlying said first layer of polysilicon, said layer of insulation extending over the surface of said first STI region by a measurable amount; and finishing mixed-mode creation of said PIP capacitor and said at least one CMOS device.