Patent ID: 7122082
Filing Date: 2006-10-17
Classification: C30B,H01L

Abstract:
1. A method for manufacturing a silicon wafer, comprising: removing an oxide film on a surface of a silicon wafer; after removing, vacancy heat treating for forming new vacancies in an interior of said silicon wafer by means of a heat treatment of said silicon wafer at a temperature of 1135 to 1170° C. in an atmosphere containing NH quenching said silicon wafer after said vacancy heat treating; and SF nuclei heat treating for agglomerates interstitial silicon released during precipitation of oxygen from vacancies injected by said vacancy treating, to form stacking fault nuclei, thereby forming an SF nuclei layer of high stacking fault nuclei density in the interior near the surface, wherein during said vacancy heat treating, purging is conducted to remove oxygen from said atmosphere surrounding said silicon wafer, and in said SF nuclei heat treating, a rate of temperature increase is set to 10° C./minute or less, a heat treatment temperature is set to 1100° C. or higher, and said heat treatment temperature is maintained for one hour or more.