Patent ID: 7465607
Filing Date: 2008-12-16
Classification: H01L

Abstract:
1. A method of fabricating a semiconductor device package, the method comprising: providing an interposer substrate comprising a dielectric member, a plurality of terminals proximate and extending along at least one peripheral edge thereof on one side thereof and an array of lands proximate and extending along a same at least one peripheral edge on an opposing side of the interposer substrate, terminals of the plurality of terminals being respectively electrically connected to lands of the array of lands through conductive via structures extending through the dielectric member; mounting at least one semiconductor die by a back side thereof to the one side of the interposer substrate with a plurality of bond pads on an active surface thereof proximate and extending along at least one peripheral edge thereof adjacent the at least one peripheral edge of the interposer substrate; respectively electrically connecting the plurality of bond pads to the plurality of terminals; disposing an encapsulant structure over the at least one semiconductor die and the one side of the interposer substrate; and disposing a lead frame comprising a plurality of lead fingers having inner ends respectively over lands of the array of lands on the opposing side of the interposer substrate and mechanically and electrically connecting the inner ends to lands of the array of lands.