Patent ID: 7709269
Filing Date: 2010-05-04
Classification: H01L

Abstract:
1. A method of fabricating a transistor, the method comprising: forming a protective layer; forming a dielectric layer on the protective layer, the dielectric layer having a recess extending therethrough and exposing a portion of the protective layer, wherein the protective layer and the dielectric layer comprise different materials; patterning the protective layer using the dielectric layer as a mask to form a first opening extending through the protective layer; then widening the recess in the dielectric layer to define a second opening extending therethrough that is wider than the first opening, the second opening exposing the first opening and exposing surface portions of the protective layer on opposite sides of the first opening; forming a gate material in the first and second openings and on the dielectric layer outside the second opening; and patterning the gate material on the dielectric layer outside the second opening to define a gate electrode including first and second laterally extending portions, wherein the first portion of the gate electrode laterally extends on surface portions of the protective layer outside the first opening and wherein the second portion of the gate electrode laterally extends beyond the first portion on portions of the dielectric layer outside the second opening.