Patent ID: 7508901
Filing Date: 2009-03-24
Classification: H03K

Abstract:
1. An apparatus for generating current reset mode pulse width modulation (PWM), comprising: a pulse width modulation (PWM) counter having a clock input, wherein the PWM counter increments a count value for each clock pulse received at the clock input; a duty cycle register having a duty cycle value; a duty cycle comparator coupled to the duty cycle register and the PWM counter, wherein the duty cycle comparator outputs a PWM signal according to a comparison between the count value and the duty cycle value; a period register having a period value; a period comparator coupled to the period register and the PWM counter, wherein the period comparator compares the count value to the period value and when the count value is equal to the period value the period comparator causes the PWM counter to reset the count value to zero; and a rising edge detection circuit for monitoring an external PWM reset signal, wherein if a current reset mode is enabled and a rising edge of the external PWM reset signal is detected then the rising edge detector circuit will cause the PWM counter to reset the count value to zero.