Patent ID: 8687441
Filing Date: 2014-04-01
Classification: G11C

Abstract:
1. A method for searching an optimum value of a memory, applied to a memory controller, comprising: sequentially setting a first phase delay value of the memory to a plurality of first values; sequentially setting a second phase delay value of the memory to a plurality of second values, wherein the first values and the second values are respectively a plurality of inconsecutive integers greater than or equal to 0; performing a reading and writing test to the memory; recording a number of combinations of each of the first values and the second values passing the reading and writing test; selecting a portion of the first values that the number of the corresponding combinations passing the reading and writing test is greater than a first threshold; selecting one of the first values that is a median of the portion of the first values or near the median of the portion of the first values as a first optimum value; setting the first phase delay value to the first optimum value; recording a portion of the second values passing the reading and writing test; selecting one of the second values that is a median of the portion of the second values or near the median of the portion of the second values passing the reading and writing test as a second optimum value; and setting the second phase delay value to the second optimum value.