Patent ID: 7605038
Filing Date: 2009-10-20
Classification: H01L

Abstract:
1. A manufacturing method of a high voltage semiconductor device comprising: forming a first and second drift region of a second conductive type spaced apart from each other on a first conductive type well region of a semiconductor substrate; forming a gate electrode on a channel region corresponding to a portion of the first conductive well region between the first and second drift regions with a gate insulating film disposed therebetween after the forming of the first and second drift regions; forming an insulating film on the semiconductor substrate including the first drift region, the second drift region, and the gate electrode; forming a photoresist pattern on the insulating film covering a first side portion of the gate electrode and extending a first distance on a portion of the first drift region and a second side portion of the gate electrode and extending a second distance on a portion of the second drift region, wherein the insulating film on remaining portions of the semiconductor substrate is exposed; patterning the insulating film using the photoresist pattern as an etch mask to form a gate spacer having a spacer part at the sides of the gate electrode and a spacer extending part extended from the spacer part the first distance on the first drift region and the second distance on the second drift region; forming a second conductive type high-concentration source and a second conductive type high-concentration drain by implanting a second conductive type ion in the first and second drift regions, respectively, using the gate spacer as a mask; and forming a silicide on the second conductive type high-concentration source, and the second conductive high-concentration drain.