Patent ID: 9141793
Filing Date: 2015-09-22
Classification: G06F

Abstract:
1. A method for securing a microprocessor containing at least one main program, which operates with at least one memory, wherein said method comprises: identifying at least one address or one memory zone of said at least one memory, called critical addresses, and which contain, or which are configured to contain, critical data for said main program; monitoring, by said microprocessor, the addressing ports of said at least one memory, so as to detect access to said critical addresses; issuing an alert when an access to said critical addresses is detected by said microprocessor; when said alert is issued, activating a step of implementing counter-measures, by said microprocessor, during which additional operations, that are not required for said main program, are implemented so as to modify consumption of current and/or processing time of said microprocessor, without interrupting the access to said critical addresses, wherein said implementing counter-measures comprises duplicating operations carried out by said main program; and deactivating said counter-measures as soon as said critical addresses are no longer used.