Patent ID: 7335927
Filing Date: 2008-02-26
Classification: H01L

Abstract:
1. A method of fabricating a diode, comprising: forming doped region in a silicon substrate, said doped region having opposite first and second sides, said doped region extending from a top surface of said substrate a first distance into said substrate; forming a trench in said substrate, said trench having opposite first and second sidewalls and extending from said top surface of said substrate a second distance into said substrate, said first sidewall of said trench separated from said first side of said doped region by a dielectric region extending from said top surface of said substrate a third distance into said substrate and by a region of said substrate under said dielectric region and between said first side of said doped region and said first sidewall of said trench, said third distance less than said first or second distances; and forming a first region of a metal silicide layer on said first sidewall of said trench and forming a second region of said metal silicide layer on a top surface of said doped region, said first and second regions of said metal silicide layer electrically isolated from each other by said dielectric region.