Patent ID: 7933319
Filing Date: 2011-04-26
Classification: H04B,H04W

Abstract:
1. A signal processing circuit utilized in a wireless local area network (WLAN) device for communicating with a network device utilizing a first band or a second band, comprising: a first synthesizer, for generating a first frequency; a first RF circuit, coupled to the first synthesizer, for receiving a first RF signal corresponding to the first band according to the first frequency and generating a first inner signal according to the first RF signal; a first analog front end (AFE) circuit, coupled to the first RF circuit, for receiving the first inner signal and generating the first digital signal according to the first inner signal; a second synthesizer, for generating a second frequency; a second RF circuit, coupled to the second synthesizer, for receiving a second RF signal corresponding to the second band according to the second band and generating a second inner signal according to the second RF signal; a second AFE circuit, coupled to the second RF circuit, for receiving the second inner signal and generating a second digital signal according to the second inner signal; and a baseband circuit, coupled to the first AFE circuit and the second AFE circuit, for processing the first digital signal and the second digital signal; wherein a central frequency of the first band is substantially equal to the first frequency, and a central frequency of the second band is substantially equal to the second frequency; and wherein when the first RF circuit communicates with the network device utilizing the first band, one of the baseband circuit and the second RF circuit further detects whether the second band is busy.