Patent ID: 7679420
Filing Date: 2010-03-16
Classification: H03K

Abstract:
1. A slew rate controlled level shifter circuit for selectively passing a first voltage level from a first voltage source to an output node when an input data signal has a first value, for selectively passing a second voltage level from a second voltage source to the output node when the input data signal has a second value, wherein the level shifter circuit comprises: a first current path including a first current mirror transistor coupled between the first voltage source and a first node, a first switch transistor coupled between the first node and a second node, and a first slew rate control transistor coupled between the second node and the second voltage source; a second current path including a second current mirror transistor coupled between the first voltage source and a third node, a third current mirror transistor coupled between the third node and the output node, a second switch transistor coupled between the output node and a fourth node, and a second slew rate control transistor coupled between the fourth node and the second voltage source, wherein gate terminals of the first and second slew rate control transistors are coupled to a fifth node, wherein gate terminals of the first and second current mirror transistors are connected to the third node, and a gate terminal of the third current mirror transistor is connected to the first node, and wherein gate terminals of the first and second switch transistors respectively receive differential control signals.