Patent ID: 6232952
Filing Date: 2001-05-15
Classification: G09G,H03L,H04N

Abstract:
A method of generating a target clock signal synchronized with a reference clock signal, said method comprising the steps of:(a) generating a first waveform representing the incremental phase advancement of said reference clock signal between two zero crossings of said first wave form;(b) generating a second waveform representing the incremental phase advancement of said target clock signal between two zero crossings of said second wave form;(c) selecting a first sample on said first waveform;(d) selecting a second sample on said second waveform;(e) comparing said first sample with said second sample; and(f) adjusting the phase of said target clock signal according to the result of step (e) to generate said target clock signal synchronized with said reference clock signal,wherein steps (a) and (b) together comprise the further step of generating said first waveform and said second waveform such that said two waveforms have the same amplitude for the same phase, whereby said first sample and said second sample respectively comprise the amplitudes of the two waveforms.