Patent ID: 7728393
Filing Date: 2010-06-01
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; a gate insulation layer and a gate electrode formed on the semiconductor substrate; a first spacer formed on sidewalls of the gate electrode; a second spacer formed on sidewalls of the first spacer; an epitaxial pattern formed between the second spacer and the substrate wherein an inside profile of the epitaxial pattern is aligned with an inside profile of the second spacer and an outside profile of the epitaxial pattern is aligned with an outside profile of the second spacer; and source/drain regions including primary source/drain regions and secondary source/drain regions, wherein the primary source/drain regions are formed in the epitaxial pattern and the semiconductor substrate, and the primary source/drain regions formed in the semiconductor substrate are aligned with the first spacer and the inside profile of the epitaxial pattern, and the secondary source/drain regions are aligned with the second spacer and formed in the semiconductor substrate, wherein the inside profile of the second spacer faces the sidewalls of the first spacer, and the outside profile of the second spacer is disposed at the opposite side of the inside profile of the second spacer, and an inside profile of the primary source/drain regions is aligned with an outside profile of the first spacer.