Patent ID: 7145253
Filing Date: 2006-12-05
Classification: B81C,H01L

Abstract:
1. A semiconductor device comprising: a substrate having a first surface and a second surface opposite to the first surface; a first semiconductor die having a first surface and a second surface opposite to the first surface of the first semiconductor die, edges of the second surface of the first semiconductor die being formed with pluralities of bond pads and the first surface of the first semiconductor die being bonded to the second surface of the substrate by means of a first adhesive layer; a second semiconductor die having a first surface and a second surface opposite to the first surface of the second semiconductor die, edges of the second surface of the second semiconductor die being formed with pluralities of bond pads, and the first surface of the second semiconductor die being bonded to the second surface of the first semiconductor die by means of a second adhesive layer; pluralities of first conductive wires for electrically connecting the bond pads of the first semiconductor die and the substrate to each other; pluralities of second conductive wires for electrically connecting the bond pads of the second semiconductor die and the bond pads of the first semiconductor die to each other; an insulating gel being coated on the second surface of the first semiconductor die and completely covering the second semiconductor die; and an encapsulant for protecting the substrate, the first and second semiconductor dies, the first and second conductive wires, and the insulating gel from the exterior, the encapsulant being formed in such a manner that a certain region of the insulating gel is exposed to the exterior.