Patent ID: 8219939
Filing Date: 2012-07-10
Classification: G03F,G06F

Abstract:
1. A method of creating photolithographic masks for semiconductor device features with reduced tip-to-tip and tip-to-line violations, the method comprising: providing preliminary data that represents a desired mask pattern; analyzing the preliminary data by using a processor device to identify tip-to-tip and tip-to-line violations in the desired mask pattern, resulting in identified violations, wherein a tip-to-tip violation refers to space between ends of two adjacent features of the desired mask pattern that are generally oriented in a coaxial manner, and wherein a tip-to-line violation refers to space between an end of one feature of the desired mask pattern and a side edge of another feature of the desired mask pattern that is generally oriented orthogonally to the side edge; and modifying the preliminary data in accordance with the identified violations to obtain updated data that represents a modified mask pattern, the modified mask pattern being void of tip-to-tip and tip-to-line violations, wherein modifying the preliminary data is performed such that the updated data represents a merged version of the desired mask pattern having defined and continuous features in lieu of spaces corresponding to the identified violations.