Patent ID: 7948313
Filing Date: 2011-05-24
Classification: H03F

Abstract:
1. A class D amplifier circuit comprising: a signal generation section that generates a first pulse width modulation signal and a second pulse width modulation signal based on an input signal, wherein when a level of the input signal is zero, the signal generation section generates: the first pulse width modulation signal having a repeated first wide-width pulse signal portion, which has a wide width and a repeated first narrow-width pulse signal portion, which has a narrow width which is narrower than the wide width of the first wide-width pulse signal; and the second pulse width modulation signal having a repeated second narrow-width pulse signal portion, which has a narrow width and a repeated second wide-width pulse signal portion, which has a wide width which is wider than the narrow width of the second narrow-width pulse signal portion; wherein a rising point in time of the second narrow-width pulse signal portion occurs after a rising point in time of the first wide-width pulse signal portion and a falling point in time of the second narrow-width pulse signal portion occurs before a falling point in time of the first wide-width pulse signal portion; and wherein a rising point in time of the first narrow-width pulse signal portion occurs after a rising point in time of the second wide-width pulse signal portion and a falling point in time of the first narrow-width pulse signal portion occurs before a falling point in time of the second wide-width pulse signal portion.