Patent ID: 8677461
Filing Date: 2014-03-18
Classification: G06F,H04L

Abstract:
1. An apparatus comprising: a controller circuit configured to read or write a plurality of data packets in response to one or more input/output requests; and an array configured to present or receive said plurality of data packets to or from said controller circuit in response to said input/output requests, wherein (A) each of said plurality of data packets are only transmitted to or from said array after a successful authentication between (i) a first code that dynamically changes between transmission of each of said data packets embedded within each of said plurality of packets and (ii) a second code stored on a non-volatile memory within said controller circuit, (B) said first code is verified after each of said plurality of packets is received, (C) said first code is generated during an initial access to said array by a particular user, and (D) said first code of said particular user allows said particular user to access only portions of said array with data previously written by said particular user.