Patent ID: 7482210
Filing Date: 2009-01-27
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising: (a) forming a field oxide layer in a semiconductor substrate to define an active region therein; (b) forming a mask insulating layer pattern having a junction isolation hole on the semiconductor substrate; (c) forming junction isolation trenches having a predetermined depth in the semiconductor substrate using the junction isolation pattern as a mask; (d) forming a filling insulating layer in the junction isolation trenches to form a junction isolation insulating layer; (e) removing the mask insulating layer pattern to expose the active region; (f) growing epitaxial silicon on the active region to form an epitaxial silicon layer on the active region including the junction isolation insulating layer where the epitaxial silicon layer has a mono-crystalline structure; (g) forming gate structures on the epitaxial silicon layer; and (h) forming sources and drains on either side of the gate structures in the active region.