Patent ID: 6430047
Filing Date: 2002-08-06
Classification: G01R,H05K

Abstract:
A circuit board for receiving a integrated circuit chip to provide connection between a standard layout of a test machine and the chip, the board comprising:an insulating substrate defining a chip receiving region and a layout connection region, the layout connection region surrounding and spaced from the chip receiving region; a plurality of chip connectors on one side of the substrate within the chip receiving region, the plurality of chip connectors being arranged in a selected pattern suited for connection to integrated circuit chips; a plurality of layout connectors with some thereof on the one side of the substrate within the layout connection region and some on the opposite side of the substrate that are interconnected to those on the one side, the plurality of layout connectors being arranged in the standard footprint layout of the test machine; a plurality of circuit traces on the one side of the substrate between the chip receiving region and the layout connection region, each circuit trace providing electrical connection between one of the chip connectors and a respective one of the layout connectors; a solder stop on the one side of the substrate over the circuit traces between the chip receiving region and the layout connection region; a plurality of apertures through the substrate in the chip receiving region; and a thermally conductive heat sink on a side of the substrate opposite the one side and across from but extending beyond the chip receiving region to be adjacent to those layout connectors on the same side of the substrate, the heat sink being thermally connected about the plurality of apertures.