Patent ID: 6320439
Filing Date: 2001-11-20
Classification: G01R,G05F

Abstract:
A method for monitoring multiple supply voltages in an integrated circuit, the multiple supply voltages being externally and internally generated, the method comprising:disabling a first discharge path of an external capacitor connected to a pin of the integrated circuit for allowing start of a charge ramp signal towards a voltage reference for the external capacitor, the disabling being based upon a first signal indicating that the externally generated supply voltages are correct in value;generating at least a first replica signal of the charge ramp signal for at least one internal supply voltage generator for implementing a soft start phase of a turn-on process for the integrated circuit;monitoring presence of a second signal indicating that the externally and internally generated supply voltages are correct in value, and regulating the charge ramp signal to an intermediate voltage value with respect to a value of the voltage reference;enabling a second discharge path of the external capacitor based upon the second signal so that regulation of the charge ramp signal coincides with an end of the soft start phase;generating a logic signal based upon a second voltage value being applied to the external capacitor via the charge ramp signal, the logic signal indicating that the externally and internally generated supply voltages are correct in value after the soft start phase of the turn-on process; andenabling the first discharge path ending the turn-on process.