Patent ID: 6573125
Filing Date: 2003-06-03
Classification: H01L

Abstract:
A method for opening a repair fuse of a semiconductor device comprising:forming a lower electrode on a semiconductor substrate in which a cell region, a peripheral circuit region and a fuse region are defined and on which predetermined under layers are formed; forming a dielectric layer on the semiconductor substrate having the lower electrode; forming an upper plate electrode and a blocking dielectric layer on the cell region of the semiconductor substrate having the dielectric layer and forming a blocking layer made of the upper plate electrode and the blocking dielectric layer on the fuse region of the semiconductor substrate; depositing an interlevel dielectric layer on the semiconductor substrate; etching the interlevel dielectric layer from the cell region and the fuse region until the blocking dielectric layer is exposed; performing chemical mechanical polishing (CMP) on the interlevel dielectric layer; forming a contact hole in the interlevel dielectric layer and the semiconductor substrate and enclosing a conductive material in the contact hole, thereby forming a metal contact; forming a first metal interconnection layer connected electrically to the metal contact; forming an intermetallic dielectric layer on the semiconductor substrate having the first metal interconnection layer; forming a via hole to be connected to the first metal interconnection layer by etching the intermetallic dielectric layer, and simultaneously etching and removing the intermetallic dielectric layer formed above the blocking dielectric layer of the fuse region; forming a via contact by filling a conductive material in the via hole; forming a second metal interconnection layer connected electrically to the via contact; forming a passivation oxide layer and a passivation nitride layer on the entire semiconductor substrate having the second metal interconnection layer; etching the passivation oxide layer and the passivation nitride layer which are formed above the blocking dielectric layer of the fuse region until the blocking dielectric layer is exposed; and etching an exposed blocking layer of the fuse region.