Patent ID: 6211847
Filing Date: 2001-04-03
Classification: G06F,H04N

Abstract:
An apparatus for controlling a plurality of sub monitors in a video communication system in which the same signal from a host computer or a video tape recording/reproducing device is displayed on screens of said sub monitors and a main monitor to which said sub monitors are connected in series, comprising:a plurality of communication means included respectively in said main and sub monitors, for serially transferring control data from a host computer to said main and sub monitors and response data from said main and sub monitors to said host computer; anda plurality of microcomputers, included respectively in said main and sub monitors and connected respectively to said communication means, for setting up a corresponding one of said main and sub monitors in response to the control data from said host computer when the control data from said host computer is for the control of the corresponding monitor and transferring the control data from said host computer to the subsequent sub monitor when the control data from said host computer is not for the control of the corresponding monitor, wherein each of said communication means comprises:first buffering means for transferring the response data from a corresponding one of said microcomputers to said host computer;second buffering means for transferring the control data from said host computer to the corresponding microcomputer;third buffering means for transferring the control data from the corresponding microcomputer to the subsequent sub monitor;fourth buffering means for transferring the response data from the subsequent sub monitor to the corresponding microcomputer; anda connector having a first output terminal for transferring the response data from said first buffering means to said host computer, a second output terminal for transferring the control data from said third buffering means to the subsequent sub monitor, a first input terminal for transferring the control data from said host computer to said second buffering means, and a second input terminal for transferring the response data from the subsequent sub monitor to said fourth buffering means, wherein said first buffering means comprises:a first resistor having one side connected to an output terminal of the corresponding microcomputer;a second resistor having one side connected to a ground voltage terminal;a third resistor having one side connected to said first output terminal of said connector;a current amplification transistor having a base connected to another side of said first resistor, an emitter connected to a supply voltage terminal and a collector connected in common to another side of said second and third resistors;a first bias/transistor protection diode having an anode connected to a connection point of said one side of said third resistor and said first output terminal of said connector and a cathode connected to a connection point of said supply voltage terminal and said emitter of said transistor; anda second bias/transistor protection diode having an anode connected to said ground voltage terminal and a cathode connected to said connection point of said one side of said third resistor and said first output terminal of said connector.