Patent ID: 6175929
Filing Date: 2001-01-16
Classification: G06F,H03L

Abstract:
A system clock switch circuit of a computer main board, the circuit comprising:a central processing unit (CPU), for operating the computer main board;a chipset, connected to the CPU, wherein the CPU communicates with a peripheral of the computer main board through the chipset; anda clock generator, connected to the chipset, providing a system clock frequency and a reset signal for operating the computer main board,wherein the clock generator is controlled by the CPU through the chipset and the clock generator is controlled through a control signal bus, such that when the clock generator needs to change the system clock frequency according to a command from the CPU, the clock generator activates the reset signal simultaneously to reset a clock frequency of the peripheral from a current frequency to an intended frequency with respect to the system clock frequency where the intended frequency can be repeatedly reset until the intended frequency matches in ratio to the system clock frequency, and the reset signal remains activation until the system clock frequency is completely changed to a new setting.