Patent ID: 6211064
Filing Date: 2001-04-03
Classification: H01L

Abstract:
A method for fabricating a complementary metal oxide semiconductor (CMOS) device comprising the steps of:providing a silicon on insulation (SOI) wafer having a stack structure of a base substrate, a buried oxide layer and a semiconductor layer;forming a field oxide film in the semiconductor layer to define an active region in which a p type metal oxide semiconductor (PMOS) device and an type metal oxide semiconductor (NMOS) device are to be formed in the semiconductor layer of the SOI wafer, wherein the field oxide film is formed by performing thermal oxidation process at the temperature of 1,000 to 1,200.degree. C. under dry oxygen atmosphere so as to apply a compressive stress to the semiconductor layer that the PMOS device is to be formed; andforming the PMOS device and NMOS device in the active region defined by the field oxide film.