Patent ID: 8593183
Filing Date: 2013-11-26
Classification: G06F,H03K

Abstract:
1. A clock driver of a clock distribution network for generating a resultant clock signal to be supplied to a circuit block, the clock driver comprising: a plurality of drive elements electrically coupled to a clock node of the clock driver, each of the plurality of drive elements configured to receive and propagate a reference clock of the clock distribution network; a pre-adjustment module operably coupled between inputs of the plurality of drive elements and a signal generator that generates the reference clock, the pre-adjustment module configured to adjust a duty cycle of the reference clock supplied to the plurality of drive elements so as to adjust a final value of an amplitude, a rise time, and/or a fall time of the resultant clock signal; and a resonance element operably coupled to the clock node, wherein the resonance element is configured to resonate at a specified frequency to boost an overall drive strength of the resultant clock signal.