Patent ID: 7473967
Filing Date: 2009-01-06
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first insulating layer; a first body section comprising an island: shaped semiconductor formed on the first insulating layer; a second body section comprising an island-shaped semiconductor formed on the first insulating layer; a ridge-shaped connecting section formed on the first insulating layer to interconnect the first body section and the second body section; a channel region comprising at least a part of the connecting section in lengthwise direction of the connecting section; a gate electrode formed to cover a periphery of the channel region, with a second insulating layer intervening therebetween; a source region formed to extend over the first body section and a portion of the connecting section between the first body section and the channel region; and a drain region formed to extend over the second body section and a portion of the connecting section between the second body section and the channel region, wherein the channel region comprises: a stacked structure comprising a relaxed semiconductor layer which is formed on the first insulating layer and whose lattice is relaxed, and a strained semiconductor layer which is formed on the relaxed semiconductor layer to lattice-match the relaxed semiconductor layer; and a partially strained semiconductor layer which is formed to lattice-match a side surface of the relaxed semiconductor layer and side and top surfaces of the strained semiconductor layer, so as to cover side and top surfaces of the stacked structure; and wherein the strained semiconductor layer comprises a first type of semiconductor, and each of the relaxed semiconductor layer and the partially relaxed semiconductor layer comprises a second type of semiconductor having a smaller lattice constant than the first type of semiconductor.