Patent ID: 6252303
Filing Date: 2001-06-26
Classification: H01L

Abstract:
A semiconductor device formed on a substrate, comprising:at least one metal layer formed on the substrate;a first fluorosilicate glass layer formed on the at least one metal layer, the first fluorosilicate glass layer being formed by a high etch/deposition process;a second fluorosilicate glass layer formed on the first fluorosilicate glass, the second fluorosilicate glass layer acting together with the first fluorosilicate glass as an interlayer dielectric for the semiconductor device and having a thickness greater than the thickness of the first fluorosilicate glass layer, the second fluorosilicate glass layer being formed by a low etch/deposition process;a second metal layer formed above the second fluorosilicate glass layer; andat least one via formed in the first and second fluorosilicate glass layers and providing for an electrical connection between the at least one metal layer and the second metal layer,wherein the at least one via has sidewalls that include a nitrided region that corresponds to a surface of the sidewalls, a fluorine-depleted region that is adjacent the nitrided region, and a bulk fluorosilicate glass region that is adjacent the fluorine-depleted region, wherein the fluorine-depleted region is bordered on one side by the nitrided region and on another side by the bulk fluorosilicate glass region,wherein the fluorine-depleted region contains less fluorine concentration than the bulk fluorosilicate glass region, andwherein the nitrided region acts as a passivation layer that blocks fluorine atoms from the fluorine-depleted region and from the bulk fluorosilicate glass region from passing into the at least one via.