Patent ID: 9064961
Filing Date: 2015-06-23
Classification: H01L

Abstract:
1. An integrated circuit comprising: a silicon-containing semiconductor region; a channel region formed in the silicon-containing semiconductor region; a gate electrode structure formed above the channel region; source and drain regions formed in the silicon-containing semiconductor region adjacent to the channel region, wherein the source and drain regions comprise an EPI strain-inducing fill that comprises a main SiGe layer and a Si cap that overlies the main SiGe layer, and wherein the EPI strain-inducing fill is doped with boron and has a first peak boron content in an upper portion of the EPI strain-inducing fill of about 2.5 times or greater than an average boron content in an intermediate portion of the main SiGe layer; and a metal silicide formed in the EPI strain-inducing fill and at least partially in the source and drain regions, wherein the EPI strain-inducing fill has hydrogen concentrated therein to define the EPI strain-inducing fill as a hydrogen agglomerated EPI strain-inducing fill, wherein the hydrogen agglomerated EPI strain-inducing fill has a peak hydrogen content in the upper portion of the hydrogen agglomerated EPI strain-inducing fill of about 10 times or greater than an average hydrogen content in the intermediate portion of the main SiGe layer.