Patent ID: 8810007
Filing Date: 2014-08-19
Classification: H01L,H05K

Abstract:
1. A wiring board comprising: a silicon substrate including first and second through holes each communicating with a first surface and a second surface of the silicon substrate; a capacitor formed on an insulating film, which is applied to the silicon substrate, on the first surface and wall surfaces of the first and second through holes, wherein a capacitor part of the capacitor includes a first electrode, a dielectric layer, and a second electrode that are sequentially deposited on the insulating film on the first surface and the wall surfaces of the first and second through holes; first and second penetration electrodes formed in the first and second through holes covered by the insulating film, the first electrode, the dielectric layer, and the second electrode of the capacitor part; a first insulating layer formed over the first surface of the silicon substrate to cover the capacitor; a second insulating layer laminated on a lower surface of the insulating film, which covers the second surface of the silicon substrate; a first wiring layer laminated on the first insulating layer and electrically connecting the first electrode to the first penetration electrode; a second wiring layer laminated on the first insulating layer and electrically connecting the second electrode to the second penetration electrode; a third wiring layer laminated on a lower surface of the second insulating layer and connected to a lower surface of the first penetration electrode; and a fourth wiring layer laminated on the lower surface of the second insulating layer and connected to a lower surface of the second penetration electrode; wherein the lower surfaces of the first and second penetration electrodes and lower end surfaces of the first electrode, the dielectric layer, and the second electrode of the capacitor part that are exposed from the first and second through holes in the second surface of the silicon substrate are flush with the lower surface of the insulating film that covers the second surface of the silicon substrate.