Patent ID: 7904740
Filing Date: 2011-03-08
Classification: G06F,Y02D

Abstract:
1. An apparatus comprising at least one processor; and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus to perform at least the following: to detect an imminent change in a processor operating mode of the at least one processor before the change in the processor operating mode is implemented; in response to detecting the change in the processor operating mode, to transmit an operating mode signal indicating the change in the processor operating mode to a power supply before the change in the processor operating mode is implemented; to delay implementing the change in the processor operating mode; to receive an acknowledgement signal from the power supply indicating that the power supply has changed power supply operating modes as a result of receiving the operating mode signal; and in response to receiving the acknowledgement signal, to stop delaying implementing the change in the processor operating mode, wherein the operating mode signal comprises instructions indicating that the power supply is to change power supply operating modes before the change in the processor operating mode is implemented.