Patent ID: 7670905
Filing Date: 2010-03-02
Classification: H01L

Abstract:
1. A method of forming a flash memory structure, comprising: forming a patterned photoresist mask over a semiconductor substrate, the photoresist mask comprising, in at least one cross-sectional view, a pair of opposing sidewalls extending upwardly relative to the substrate, the sidewalls comprising upper vertical regions and lower non-vertical regions; the substrate comprising a semiconductor base and a gate stack over the semiconductor base; the gate stack including in ascending order from the semiconductor base, tunnel dielectric, charge-retaining material, blocking dielectric, and control gate material; the substrate further comprising carbon material over the control gate material, and hard masking material over the carbon material; the photoresist mask being formed over the hard masking material; exposing the patterned photoresist mask to microtrenching conditions to remove portions of the photoresist mask from the non-vertical regions and thereby extend the vertical regions to the hard masking material, and to form cavities in the hard masking material; forming a sacrificial material over the patterned photoresist mask and along the opposing sidewalls, the sacrificial material extending into the cavities; anisotropically etching the sacrificial material to form masking structures along the opposing sidewalls of the photoresist mask; removing the photoresist mask; transferring a pattern of the masking structures into the hard masking material, carbon material, and gate stack with one or more suitable etches; and after transferring that pattern of the masking structures into the hard masking material, removing the masking structures.