Patent ID: 6188714
Filing Date: 2001-02-13
Classification: H04B,H04J

Abstract:
A method for generating a maximal length sequence of data, comprising the steps of:providing a plurality of blocks of shift registers, each of the blocks having a length N;connecting the blocks in a parallel configuration in an order from an input block to an output block, wherein each of the outputs of the shift registers in a proceeding one of the blocks is input to the input of corresponding ones of the shift registers in the adjacent one of the blocks with the last of the blocks providing an N-bit output word, wherein the plurality of blocks further comprises a remainder block having a length less than N and comprising the first of the blocks in the parallel configuration; andinterconnecting the outputs of select ones of the shift registers in the blocks through a feedback operator to inputs of select ones of the shift registers in the blocks in accordance with a maximal length sequence algorithm, wherein an initial sequence of data stored in the blocks of shift registers is shifted through the blocks of shift registers in N-bit increments to realize a maximal length sequence defined by the algorithm.