Patent ID: 8190942
Filing Date: 2012-05-29
Classification: G06F

Abstract:
1. A global timebase system for a system-on-chip, comprising: a global timebase generator of the system-on-chip configured to provide a multibit global timebase count value as Gray code; a multibit global timebase bus coupled to the global timebase generator to broadcast the global timebase count value; and a plurality of receiver modules of the system-on-chip operating in multiple clock domains, each of the receiver modules coupled to the global timebase bus and configured to convert the multibit global timebase count value from Gray code to binary form for use as a globally-synchronized local timebase by the receiver module; wherein each of the receiver modules comprises a set of synchronizers for receiving the global timebase count value from the global timebase bus and registering the global timebase count value on each local clock cycle of that receiver module, a Gray-code-to-binary converter configured to convert the registered global timebase count value from Gray code to binary form, and a register for storing the converted global timebase count value for use as the globally-synchronized local timebase by the receiver module; and wherein each of the receiver modules further comprises a receiver binary counter configured to be incremented by one on every 1-to-0 transition of a most significant bit of the registered global timebase count value, wherein the receiver binary counter stores most significant bits of the globally-synchronized local timebase and the register stores the converted global timebase count value as least significant bits of the globally-synchronized local timebase.