Patent ID: 6586807
Filing Date: 2003-07-01
Classification: G11C,H01L

Abstract:
A semiconductor integrated circuit device comprising:a first MISFET formed on a substrate in a first active region whose periphery is defined by an element isolation trench, wherein a first gate electrode of said first MISFET is formed on the substrate and extends over the first active region from one end of the first active region to another, opposite end thereof in a direction of gate width, which is the direction of channel width of said first MISFET, wherein a gate length of the first gate electrode in a first boundary region defined between the first active region and the element isolation trench is greater than a gate length thereof in a central portion of the first active region, said gate length being in a direction of channel length of said first MISFET, and wherein said first gate electrode in the first boundary region covers (i) the entirety of one side of the first boundary region extending in the gate-length direction and (ii) parts of two other sides thereof extending in the gate-width direction.