Patent ID: 6791551
Filing Date: 2004-09-14
Classification: G06F,G09G

Abstract:
A method for image display synchronization, the method comprising the steps of:(a) synchronizing a master clock source associated with a master processor and a plurality of slave clock sources, each slave clock source being associated with a corresponding one of a plurality of slave processors, wherein said synchronizing step (a) determines a correction factor; (b) determining a master time for vertical retrace based on the length of a frame and said master clock source; (c) determining a slave vertical retrace time for each of said plurality of slave processors, wherein said slave vertical retrace time is a function of said master time for vertical retrace and said correction factor; (d) transmitting said slave vertical retrace time to each of said plurality of slave processors; and (e) executing vertical retrace at each of said plurality of slave processors when the slave clock source associated with each slave processor reaches said determined slave vertical retrace time.