Patent ID: 6624706
Filing Date: 2003-09-23
Classification: H03L

Abstract:
An automatic bias adjustment circuit adjusting a bias current for a PLL circuit which includes: a loop filter; a voltage to current converter circuit converting an output voltage of said loop filter as a control voltage to a current; and a current-controlled oscillator, receiving a control current which is obtained by adding said bias current to said converted current, said bias current being a sum of first and second bias currents, generating an oscillation signal responsive to said control current; wherein said PLL circuit operates so that said oscillation signal or a signal obtained by dividing said oscillation signal is locked on a reference signal received, said automatic bias adjustment circuit comprising:a bias adjustment circuit, providing said first bias current, adjusting said first bias current in response to an adjustment start signal such that said control voltage converges to a reference voltage; and a bias current generating circuit, providing said second bias current which changes with temperature such that said control voltage is prevented from shifting from said reference voltage due to temperature variation.