Patent ID: 8200885
Filing Date: 2012-06-12
Classification: G06F

Abstract:
1. A memory subsystem comprising: a volatile memory; a nonvolatile memory; a controller comprising logic to interface the volatile memory to an external system, so that the volatile memory is addressable for reading and writing by the external system; the controller comprising logic to back up data from the volatile memory to the nonvolatile memory upon receiving a backup signal from the external system; a power controller comprising logic to detect when power from the external system fails, and when power from the external system fails, to provide backup power for long enough to enable the controller to back up data from the volatile memory to a first region of the nonvolatile memory; the controller upon receiving the backup signal from the external system backing up data from the volatile memory to a second region of the nonvolatile memory different that the first region used to back up data from the volatile memory to the nonvolatile memory when power from the external system fails; and logic to back up data from the volatile memory to a selectable area of nonvolatile memory upon receiving the backup signal from the external system, the area of nonvolatile memory that is selected for the backup being dependent on an archive setting, such that multiple backups may be made of data from volatile memory to nonvolatile memory by changing the archive setting.