Patent ID: 8189573
Filing Date: 2012-05-29
Classification: H04L

Abstract:
1. An integrated circuit comprising: a plurality of ports, wherein at least one of the plurality of ports is an upstream port; configuration logic, coupled to at least one of the plurality of ports, to select whether the at least one port is an upstream port or a downstream port; and switch logic, coupled to at least one of the plurality of ports via one or more multiplexers, to direct data between the plurality of ports, wherein at least one multiplexer of the one or more multiplexers is coupled to the switch logic via an upstream transaction layer logic and a downstream transaction layer logic, wherein an input of the at least one multiplexer is to be selected as an output, to be transmitted to a first link physical layer coupled to a first port of the plurality of ports, based on a signal from a control logic coupled to the configuration logic, wherein the upstream transaction layer logic is coupled to a second link physical layer, different from the first link physical layer, the second link physical layer coupled to a second port of the plurality of ports, and wherein the input is to comprise one of: an output of the upstream transaction layer logic or an output of the downstream transaction layer logic.