Patent ID: 6813673
Filing Date: 2004-11-02
Classification: G06F

Abstract:
A bus interface unit for transferring data between a plurality of bus devices, said bus interface unit comprising:1) a first bus device interface comprising: a) a first incoming request bus for receiving request packets from a first one of said plurality of bus devices; b) a first outgoing request bus for transmitting request packets to said first bus device; c) a first incoming data bus for receiving data packets from said first bus device; and d) a first outgoing data bus for transmitting data packets to said first bus device; 2) a second bus device interface comprising: a) a second incoming request bus for receiving request packets from a second one of said plurality of bus devices; b) a second outgoing request bus for transmitting request packets to said second bus device; c) a second incoming data bus for receiving data packets from said second bus device; and d) a second outgoing data bus for transmitting data packets to said second bus device; 3) a time slice timer capable of producing a current time slice value; and 4) an arbitration circuit capable of: a) determining a first priority level associated with a first request packet received from said first bus device and capable of determining a second priority level associated with a second request packet received from said second bus device; b) determining a fixed time slice range associated with said first bus device; and c) comparing said fixed time slice range with said current time slice value.