Patent ID: 6567026
Filing Date: 2003-05-20
Classification: H03M

Abstract:
A digital-to-analog converter (DAC) for converting an N-bit digital input signal comprising:a pair of voltage reference terminals for receiving a reference voltage, an analog output terminal on which an analog output voltage derived from the reference voltage is developed corresponding to the digital input signal, first and second separate outer impedance strings of respective series connected impedance elements defining a plurality of input taps, first and second outer switch networks corresponding to the first and second outer impedance strings for selectively coupling a selected one of the input taps of the corresponding one of the first and second outer impedance strings to a corresponding one of the reference voltage terminals, an inner impedance string of series connected impedance elements defining a plurality of output taps, the inner impedance string being connected in series with and between the respective first and second outer impedance strings, an inner switch network for selectively coupling the output terminal to a selected one of the output taps, and a control circuit responsive to the digital input signal for controlling the first and second outer switch networks for switching selectable portions of the corresponding first and second outer impedance strings with the inner impedance string between the reference voltage terminals and for controlling the inner switch network for switching the output terminal to one of the output taps of the inner impedance string so that a voltage is developed on the output terminal corresponding to the digital input signal, the aggregate resistance of the portions of the first and second outer impedance strings switched between the reference voltage terminals being substantially constant over the switching range, and the voltage level developed at the junction of the inner impedance string to one of the outer impedance strings corresponding to one of the most significant bits (MSBs) and the least significant bits (LSBs) of the digital input signal, and the voltage developed between the output terminal and the said junction of the inner impedance string with the said one of the outer impedance strings corresponding to the other of the MSBs and the LSBs of the digital input signal.