Patent ID: 7037626
Filing Date: 2006-05-02
Classification: G03F,H01L

Abstract:
1. A method of manufacturing a device in at least one layer of a substrate, the method comprising the steps of: providing a design pattern comprising pattern features corresponding to device features to be configured in said layer; transferring the design pattern in a resist layer provided on said substrate layer; removing material from or adding material to areas of said layer, which areas are delineated by the patterned resist layer; a number of sub-patterns each comprising different portions of the design pattern being successively transferred in a corresponding number of resist layers, which are consecutively coated on said substrate layer, characterized by the steps of: forming a stack of at least a first pair of a processing layer and an anti-reflection layer and a second pair of such layers on the substrate; coating a resist layer on the top processing layer and transferring a first sub-pattern in the resist layer; developing the resist layer, thereby forming a first intermediate pattern corresponding to the first sub-pattern; etching the top processing layer via the first intermediate pattern, thereby forming a first pattern of device features corresponding to the first sub-pattern; coating the first pattern of device features wit a second resist layer; transferring a second sub- pattern in the second resist layer; developing the second resist layer, thereby forming a second intermediate pattern corresponding to the second sub-pattern; etching an underlying processing layer via the etching mask constituted by the interleaved first pattern of device features and second intermediate pattern, thereby forming a second pattern of device features corresponding to the combination of the first and second sub-patterns, and removing the second resist layer and the top processing layer.