Patent ID: 6765267
Filing Date: 2004-07-20
Classification: A61P,G03F,H01L

Abstract:
A pixel structure on a transparent substrate, comprising:a first conductive layer over the transparent substrate, wherein the first conductive layer includes a scan line, a gate electrode and an alignment mark and the gate electrode connects electrically with the scan line; a first dielectric layer over the transparent substrate and covering the first conductive layer; a channel layer over the first dielectric layer above the gate electrode; a second conductive layer over the first dielectric layer, wherein the second conductive layer includes a data line and a pair of source/drain terminals, the data line is above the alignment mark, and the gate electrode, the channel layer and the source/drain terminals together form a thin film transistor; a second dielectric layer over the first dielectric layer and covering the second conductive layer; and a pixel electrode over the second dielectric layer, wherein the pixel electrode and the data line are electrically connected to respective source/drain terminals.