Patent ID: 8847353
Filing Date: 2014-09-30
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate including a memory cell region and a peripheral circuit region; a plurality of memory cells each including a cell transistor and a cell capacitor and formed over the memory cell region of the semiconductor substrate; first and second capacitor blocks formed over the peripheral circuit region of the semiconductor substrate apart from each other, a first support film disposed between one of the first outer surfaces of one of the first lower electrodes and one of the first outer surfaces of another adjacent first lower electrode in order to prevent the first lower electrodes from collapsing; and a second support film disposed between one of the second outer surfaces of one of the second lower electrodes and one of the second outer surfaces of another adjacent second lower electrode in order to prevent the second lower electrodes from collapsing, wherein the first upper electrode of the first capacitor block and the second upper electrode are continuously elongated in parallel to the substrate to merge in one body as a first common upper electrode.