Patent ID: 6423637
Filing Date: 2002-07-23
Classification: H01L

Abstract:
A method of manufacturing copper wiring in a semiconductor device, comprising the steps of:providing a semiconductor substrate in which a predetermined structure is formed, said substrate having an underlying conductive layer, forming an insulating film on said substrate, patterning said insulating film by a dual damascene process to form a trench through which the underlying conductive layer of said semiconductor substrate is exposed, said conductive layer having a metal oxide film remaining thereon; removing the metal oxide film remaining on the exposed underlying conductive layer; forming a diffusion prevention film; forming a first copper film on the entire structure; thereafter forming a second copper film and performing an annealing process until a desired thickness is formed, thus forming a copper oxide film on said second copper film; removing said copper oxide film; forming a third copper film on the entire structure; and polishing said third, second, and first copper films, and said diffusion prevention film by a CMP process to form copper wiring.