Patent ID: 8987789
Filing Date: 2015-03-24
Classification: H01L

Abstract:
1. A structure, comprising: a gate stack on a silicon layer of a substrate; sidewall spacers on sidewalls of said gate stack; an epitaxial silicon layer on a top surface of said silicon layer; two or more trenches in said silicon layer on at least one side of said gate stack, SiGe filling said two or more trenches, adjacent pairs of said two or more SiGe filled trenches separated by respective silicon regions of said silicon layer, said SiGe in direct physical and electrical contact with said silicon layer on sidewalls and bottoms of said two or more trenches; source/drains in said silicon layer on opposite sides of said gate stack, said source/drains abutting a channel region of said silicon layer under said gate stack; and said two or more SiGe filled trenches extending through said epitaxial silicon layer.