Patent ID: 8086933
Filing Date: 2011-12-27
Classification: G06F,G11C,H03M

Abstract:
1. A semiconductor storage device comprising: a temporary storage unit that can store therein a plurality of data blocks, arranged in a matrix, each formed of a plurality of data; an error-detection-code generating unit that generates an error detection code to detect an error for each data block; a first error-correction-code generating unit that generates a first error correction code to correct an error for each first unit data formed of the data block; a second error-correction-code generating unit that generates a second error correction code to correct an error for each second unit data formed of the data blocks arranged in a column direction; a third error-correction-code generating unit that generates a third error correction code to correct an error for each third unit data formed of the data blocks arranged in a row direction; and a nonvolatile semiconductor memory that can store therein the data blocks, generated error detection code, and generated first to third error correction codes.