Patent ID: 6191017
Filing Date: 2001-02-20
Classification: H01L

Abstract:
A method of forming a multi-layered semiconductor structure including a substrate having a first insulating layer disposed thereon, the first insulating layer having a top surface, said method comprising the steps of:(a) forming a first trench and a second trench of differing depths in the first insulating layer;(b) forming a second insulating layer in the first and second trenches;(c) forming a polysilicon material in the first and second trenches such that the first and second trenches are substantially filled with polysilicon material;(d) removing a portion of the polysilicon material from the first and second trenches so that the top surface of the first insulating layer is not co-planar with a top surface of the polysilicon material remaining in each of the first and second trenches;(e) forming an implantation barrier in the first and second trenches; and(f) processing the implantation barrier in the first and second trenches so that a top surface thereof is substantially co-planar with the top surface of the first insulating layer.