Patent ID: 7681081
Filing Date: 2010-03-16
Classification: G06F

Abstract:
1. A test device for testing stability of at least one computer when the computer is staffed up or shut down, a motherboard of the computer generating a high level signal when the computer is staffed, and generating a low level signal when the computer is shut down, comprising: a monolithic chip comprising an input port and an output port, the input port receiving the high level or low level signal from the computer, a test control module disposed in the monolithic chip; an in-system programming module connected to the monolithic chip, the in-system programming module is configured to edit the testing control module when the computer is being tested and to input the testing control module into the monolithic chip; and a switch module comprising an input pin coupled to the output port of the chip and a pair of output pins corresponding to the input pin, the pair of output pins connected to the computer, for controlling the computer to be started up or shut down; wherein the input port of the monolithic chip is configured for connecting to the computer for detecting a state of the computer, when the input port of the monolithic chip receives a low level signal, the test control module controls the output pin of the monolithic chip to output a starting signal to the switch module for starting the computer; when the input port of the monolithic chip receives a high level signal, the test control module controls the output pin of the monolithic chip to output a shutting down signal to the switch module for shutting down the computer.