Patent ID: 6649473
Filing Date: 2003-11-18
Classification: H01L

Abstract:
A method of fabricating a floating gate of a flash memory, comprising:providing a semiconductor substrate; defining an active region of the substrate; forming a first insulating layer on the active region; forming a first conductive layer on the first insulating layer; forming a masking layer on the first conductive layer; removing a part of the masking layer to form a first opening; forming a second conductive layer to cover the masking layer and a sidewall and a bottom surface of the first opening; forming a second insulating layer on the second conductive layer and fills the first opening; performing an oxidation process, such that the second conductive layer over the masking layer under the second insulating layer is oxidized into a third insulating layer, while the second conductive layer on the lower sidewall and the bottom surface of the first opening is not fully oxidized, and a poly tip is formed on the remaining second conductive layer at a joint between the sidewall and the bottom surface; removing the second and the third insulating layers to form a second opening that exposes the remaining second conductive layer and the poly tip; forming a fourth insulating layer on the masking layer and filling the second opening; planarizing the fourth insulating layer until the masking layer is exposed, while the fourth insulating layer remains in the second opening as a floating gate insulating layer; and removing the masking layer uncovered by the floating gate insulating layer and the first conductive layer underlying the uncovered masking layer, with a floating gate formed by the remaining first and second conductive layers.