Patent ID: 6479358
Filing Date: 2002-11-12
Classification: H01L

Abstract:
A method of fabricating a semiconductor device, comprising the steps of:providing a silicon substrate; forming a source extension and a drain extension in the substrate; forming a gate oxide on the substrate extending from the source extension to the drain extension; forming a gate on the gate oxide, a first part of the gate comprising poly-silicon, and a second part of the gate comprising a silicide; and forming a raised source and a raised drain on the substrate and respectively over the source extension and the drain extension, a first part of the raised source and a first part of the raised drain comprising silicon and germanium, a second part of the raised source and a second part of the raised drain comprising a silicide, the raised source and a raised drain each comprising a proximal portion to the substrate and a distal portion from the substrate, and each comprising a germanium concentration gradient of less than 1% at the distal portion and greater than 4% at the proximal portion.