Patent ID: 6760274
Filing Date: 2004-07-06
Classification: G11C

Abstract:
A method for reading a non-volatile synchronous memory device, the method comprising:receiving an initial column address on column address inputs A0, A1, A2, A3, A4, A5, A6 and A7, wherein A0 is a least significant address input; initiating a burst read operation having a burst length; using an internal counter circuit, counting up from the initial column address, wherein the internal counter changes a signal only on column address input A0 if the burst length is two, the internal counter changes signals only on column address inputs A0 and A1 if the burst length is four, and the internal counter changes signals only on column address inputs A0, A1 and A2 if the burst length is eight; when the internal counter circuit count reaches the burst length, returning to count from the initial column address in a cyclical manner; and when the internal counter circuit count reaches a maximum column address for a particular burst length, counting up cyclically from 0.