Patent ID: 8504728
Filing Date: 2013-08-06
Classification: H04L

Abstract:
1. A network interface system for interfacing a host system with a network to provide outgoing data from the host system to the network, the network interface system comprising: a bus interface system adapted to be coupled with a host bus in the host system and to transfer outgoing data from the host system to the network interface system, the bus interface system generating read requests on the host bus to read outgoing data from the host system; a media access control system adapted to be coupled with the network and to transfer outgoing data from the network interface system to the network; a memory system coupled with the bus interface system and the media access control system, the memory system being adapted to store outgoing data prior to transfer of the outgoing data to the network, the memory system comprising: wherein the memory control system checks whether all outgoing data has been received for a read request associated with request information stored in a read request memory at an address given by a read request pointer value, wherein the memory control system comprises: wherein the memory control system further comprises an assembly memory write pointer register that stores an address in the assembly memory to which a next word of outgoing data is to be transferred from the host system; wherein the memory control system provides the contents of the assembly memory write pointer register to the bus interface system in association with a read request generated by the bus interface system to read outgoing data from the host system; wherein the bus interface system transfers the contents of the assembly memory write pointer register to the write pointer memory at an address given by a request ID associated with the read request; wherein the bus interface system provides the request ID to the host system as a tag value in the read request; and wherein the bus interface system increments the value in the assembly memory write pointer register based on a number of bytes of outgoing data requested in the read request, wherein the bus interface system obtains a write pointer from the write pointer memory at an address given by a tag value in a read response from the host system; wherein the bus interface system transfers associated outgoing data received in the read response from the host system to the assembly memory beginning at an address given by the write pointer; and wherein the bus interface system updates the write pointer in the write pointer memory at an address given by the tag value based on a number of bytes of outgoing data requested received in the read response, wherein the memory control system further comprises an assembly memory read pointer register that stores an address in the assembly memory from which a next word of outgoing data is to be retrieved for transfer to the first memory, and wherein when all data for a read request has been assembled in the assembly memory, the memory control system transfers the corresponding control information from the control word memory to the first memory if the read request contains the beginning of a frame and transfers the corresponding outgoing data from the assembly memory to the first memory beginning at an address given by the contents of the assembly memory read pointer, and updates the assembly memory read pointer, and wherein the memory control system further comprises: