Patent ID: 6194917
Filing Date: 2001-02-27
Classification: H03K,H03L

Abstract:
An apparatus including a circuit for reducing transistor body effect when generating a transconductance signal proportional to a difference between two input clock signals including a first signal and a second signal, said circuit comprising:a phase detector circuit including a plurality of circuit elements, said phase detector circuit configured to receive said first signal, a first complementary signal being complementary to said first signal, said second signal, and a second complementary signal being complementary to said second signal, and in accordance therewith to generate a first phase signal based on a first XOR signal being an XOR of said first signal and said second signal, and to generate a second phase signal based on a second XOR signal being a complementary XOR of said first signal and said second signal, wherein said first signal, said first complementary signal, said second signal, and said second complementary signal are each received by a corresponding one of a plurality of equal portions of said plurality of circuit elements; anda transconductance circuit, coupled to said phase detector circuit, configured to receive said first phase signal and said second phase signal and in accordance therewith to generate said transconductance signal proportional to a difference between said first phase signal and said second phase signal, said transconductance circuit including two PMOS transistors each having a substrate and a source wherein said source is coupled to said substrate,wherein said plurality of circuit elements comprises a plurality of NMOS and PMOS transistors; andwherein each of said equal portions includes exactly three circuit elements.