Patent ID: 9202562
Filing Date: 2015-12-01
Classification: G06F,G11C

Abstract:
1. A method for auto-correcting errors in a memory device having plurality of memory cells, the method comprising: selecting a memory cell using a cell address; performing a first read operation of the memory cell to obtain a first read data value; performing a first write operation to the memory cell to write a second data value into the memory cell, the second data value being a complement of the first data value; performing a second read operation of the memory cell to obtain a third data value; and performing a second write operation to the memory cell to write a fourth data value to the memory cell, the fourth data value being a complement of the third data value wherein the second data value and the fourth data value are determined with respect to two or more reference values; and wherein the method is performed with respect to two or more reference values in parallel.