Patent ID: 8189773
Filing Date: 2012-05-29
Classification: H04L

Abstract:
1. An information processing apparatus, comprising: a reconfigurable unit including a plurality of logic blocks that configures a circuit by changing logic of one or more of the logic blocks and changing an inter-logic-block connection; a generation unit that generates, by analyzing the reconfigurable unit, first design data indicating a logic of one or more of the logic blocks and an inter-logic-block connection for a first circuit currently configured in the reconfigurable unit; and an output unit that outputs, to the reconfigurable unit, second design data indicating a logic of one or more of the logic blocks and an inter-logic-block connection for a second circuit, wherein the reconfigurable unit reconfigures the currently configured first circuit in accordance with the second design data to configure the second circuit, and the information processing apparatus further comprises: a design data storage unit that stores therein the second design data; a deletion unit that deletes the second design data from the design data storage unit after the output unit has output the second design data to the reconfigurable unit; and a write unit that writes the first design data generated by the generation unit to the design data storage unit; an encryption unit that encrypts the first design data generated by the generation unit, wherein the write unit writes the first design data that is encrypted to the design data storage unit.