Patent ID: 6556474
Filing Date: 2003-04-29
Classification: G11C

Abstract:
A writing method of a nonvolatile semiconductor memory device having a plurality of memory cells for storing data of 3 bits in each of the memory cells by setting 8 threshold voltages for each of the memory cells comprising the steps of:setting the 8 threshold voltages by changing them toward a predetermined direction starting from a first threshold voltage and classifying 7 of the threshold voltages, except for the first threshold value, to 2 or 3 groups so that the threshold voltages which belong to one of the groups do not belong to the other groups and each of the groups includes 2 or more threshold voltages; and setting said 7 threshold voltages starting with the group having threshold voltages which are remoter from the first threshold voltage, and sequentially setting the threshold voltages within each group starting with the threshold voltage which is nearer to the first threshold voltage.