Patent ID: 8106641
Filing Date: 2012-01-31
Classification: H02M,Y02B,Y10S

Abstract:
1. A controller for a power system, the controller comprising: an inverter configured to receive a first voltage signal at a first circuit node and to generate a power-on-reset signal based on at least information associated with the first voltage signal; a first resistor including a first resistor terminal and a second resistor terminal, the first resistor terminal configured to receive a second voltage signal, the second resistor terminal being connected to the first circuit node; a first transistor including a first transistor terminal, a second transistor terminal, and a third transistor terminal, the first transistor terminal being connected to the first circuit node, the second transistor terminal being connected to a second circuit node, the third transistor terminal being connected to a third circuit node, the second circuit node being configured to receive a third voltage signal related to the second voltage signal; a second resistor including a third resistor terminal and a fourth resistor terminal, the third resistor terminal being connected to the second circuit node; a third resistor including a fifth resistor terminal and a sixth resistor terminal, the fifth resistor terminal being connected to the fourth resistor terminal through a fourth circuit node, the sixth resistor terminal being connected to the third circuit node; a second transistor including a fourth transistor terminal, a fifth transistor terminal, and a sixth transistor terminal, the fourth transistor terminal being connected to the second circuit node, the sixth transistor terminal being connected to the third circuit node; a voltage regulator configured to receive the second voltage signal and the power-on-reset signal, and to convert the second voltage signal to a fourth voltage signal, the fourth voltage signal being smaller than the second voltage signal in magnitude; a voltage reference generator configured to receive the fourth voltage signal and to generate a reference voltage signal; a voltage comparator configured to receive the reference voltage signal and a fifth voltage signal from the fourth circuit node, compare the reference voltage signal and the fifth voltage signal, and to generate a comparison signal; a timer configured to receive the comparison signal, provide a delay time, and output a sixth voltage signal to the fifth transistor terminal; wherein the controller is further configured: