Patent ID: 6792580
Filing Date: 2004-09-14
Classification: G06F

Abstract:
A software/hardware language model conversion method for converting a first code described in a software description language to a second code described in a hardware description language, the method comprising:converting the first code to the second code; detecting from the second code a plurality of processes that correspond to a plurality of parallel procedures in the first code; identifying which ones of the plurality of processes assign values to an identical shared variable; and generating a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes as an input, and includes any one of data signals corresponding to a change of the assignment timing signal, as an output, wherein said second code includes a component hierarchical structure, wherein said value solving process includes a first value solving process which is generated at higher level in the component hierarchical structure and a second value solving process which is generated at lower level than that of the first value solving process, and the method further includes: connecting the generated first and second value solving processes to each other.