Patent ID: 6242767
Filing Date: 2001-06-05
Classification: H01L

Abstract:
A semiconductor chip, comprising:an array of function blocks, which function blocks are couplable to form an arbitrary circuit, wherein each function block includes a plurality of semiconductor devices formed with a substrate, said semiconductor devices in each function block coupled to form a respective function block circuit within each respective function block, at least some of said function blocks are to be used function blocks in said arbitrary circuit;a function block interconnect structure formed independent of any channels dividing said function blocks including:a fixed conducting layer formed substantially over a space occupied by said used function blocks, including a plurality of conductors, said fixed conducting laver independent of said arbitrary circuit;a customized conducting laver formed over said space occupied by said used function blocks wherein said fixed conducting laver and said customized conducting laver are separated by at least an insulating laver, wherein at least some of said conductors in said fixed conducting layer are in electrical communication with said customized conducting layer;wherein said plurality of conductors in said fixed conducting layer includes a first plurality of parallel segmented conductors extending in a first direction; andwherein said customized metal conducting layer is substantially formed within a plurality of parallel tracks and over said first plurality of parallel segmented conductors in a second direction substantially perpendicular to said first direction.