Patent ID: 9130010
Filing Date: 2015-09-08
Classification: H01L

Abstract:
1. A method comprising: providing a first n-well region in a substrate for a silicon control rectifier (SCR); providing a first N+ region and a first P+ region in the substrate on a first side of the first n-well region; providing a second n-well region on a second side of the first n-well region that is opposite the first side; providing a second N+ region in the first n-well region, and a second P+ region in the second n-well region; coupling the first N+ and P+ regions to a ground rail, the second N+ region to a power rail, and the second P+ region to an I/O pad; providing a holding voltage of the SCR that is greater than a maximum operating voltage of the SCR during a latch-up event by turning on the power rail; providing a third P+ region between the second N+ and P+ regions; providing a resistor having first and second resistor terminals; providing a capacitor having first and second capacitor terminals; and coupling the third P+ region to the first resistor and capacitor terminals, the second resistor terminal to the ground rail, and the second capacitor terminal to the I/O pad.