Patent ID: 9196491
Filing Date: 2015-11-24
Classification: H01L

Abstract:
1. A method of semiconductor device fabrication, the method comprising: providing a substrate having a material layer formed over the substrate and a hard mask layer formed over the material layer, wherein the material layer includes a gate conductor and a capping layer disposed on the gate conductor; performing an end-cut process to form an end-cut pattern in the hard mask layer, wherein the end-cut pattern defines a set of line-end surfaces of the hard mask layer extending in a first direction; thereafter, performing a line-cut process to form a line-cut pattern in the hard mask layer; performing a first etching process on the substrate to transfer the end-cut pattern and the line-cut pattern concurrently from the hard mask layer to the capping layer of the material layer; and performing a second etching process to transfer the end-cut pattern and the line-cut pattern from the capping layer to the gate conductor.