Patent ID: 9197148
Filing Date: 2015-11-24
Classification: H02M,H02P

Abstract:
1. A semiconductor device, comprising: a gain switching resistor group having a plurality of first resistors connected in series with each other; a first analog switch group having a plurality of first analog switches, which selects at least one of the plurality of first resistors, connected in parallel to each other; an offset adjustment resistor group having a plurality of second resistors connected in series with each other; a second analog switch group having a plurality of second analog switches, which selects at least one of the plurality of second resistors, connected in parallel to each other; a setting register that selects one of the plurality of first analog switches, and one of the plurality of second analog switches to turn on the selected first and second analog switches; and a first amplifier that is connected to the first analog switch group and the second analog switch group, wherein the gain switching resistor group has one end connected to a first analog input terminal, and the other end connected to an output of the first amplifier, wherein respective connection points of the plurality of first resistors are connected with respective one ends of the plurality of first analog switches, and the respective other ends of the plurality of first analog switches are connected to an inverting input terminal of the first amplifier, wherein the offset adjustment resistor group has one end connected to a second analog input terminal, and the other end connected to a reference voltage, and wherein respective connection points of the plurality of second resistors are connected with respective one ends of the plurality of second analog switches, and the respective other ends of the plurality of second analog switches are connected to a non-inverting input terminal of the first amplifier.