Patent ID: 6890233
Filing Date: 2005-05-10
Classification: B82Y,H01J

Abstract:
1. A method of making a field emitter cell, comprising: providing an insulating layer on an upper surface of an electrically conductive substrate layer; forming an electrically conductive gate layer on an upper surface of said insulating layer; forming at least one perforation through said gate layer that extends downwardly into said insulating layer, said at least one perforation having essentially vertical sidewalls; forming a standoff layer on said gate layer and said vertical sidewalls under conditions that produce a thinner layer thickness near the upper corners of said perforation and then directionally removing the horizontal portions of said standoff layer and a portion of said gate layer near the upper corners of said perforation to produce a tapered gate layer; overetching the standoff layer slightly to ensure complete removal of said standoff layer from the bottom of said perforation and the formation of a depression in said substrate layer; depositing a multilayer emitter over said standoff layer and said gate layer; removing at least the horizontal portions of said multilayer emitter and recessing the top vertical portion of said standoff layer so as to permit the edges of the retained multilayer emitter to protrude above the remaining standoff layer and the remaining overlayer; and removing a further portion of said gate layer so that there is no direct line of sight between said multilayer emitter and any part of said gate layer.