Patent ID: 9183098
Filing Date: 2015-11-10
Classification: G06F

Abstract:
1. A microcomputer runaway monitoring device comprising: a main microcomputer which is operated in a first operation cycle on the basis of a clock signal output from a first oscillating circuit; and a sub microcomputer which is operated in a second operation cycle on the basis of a clock signal output from a second oscillating circuit, wherein the microcomputer runaway monitoring device actuates the main microcomputer and the sub microcomputer in parallel, carries out a predetermined clocking processing by said main microcomputer and said sub microcomputer, transmits a reset signal to said main microcomputer via a first intermediate control circuit so as to reset the main microcomputer in the case that a frequency of a first pulse signal deviates from a frequency range which can be determined to be normal by a frequency calculating means, the first pulse signal being output from the clocking processing on the basis of said first operation cycle included in said main microcomputer and having a predetermined frequency, the frequency calculating means calculating the frequency of said first pulse signal by an input of the first pulse signal to the sub microcomputer, and transmits a reset signal to said sub microcomputer via a second intermediate control circuit so as to reset the sub microcomputer in the case that a frequency of a second pulse signal deviates from a frequency range which can be determined to be normal by a frequency calculating means, the second pulse signal being output from the clocking processing on the basis of said second operation cycle included in said sub microcomputer and having a predetermined frequency, the frequency calculating means calculating the frequency of said second pulse signal by an input of the second pulse signal to the main microcomputer.