Patent ID: 6216260
Filing Date: 2001-04-10
Classification: G06F

Abstract:
A method for automatic synthesis of a digital circuit employing an algorithm flowchart providing the full needed description of a created digital circuit for an exact algorithm flowchart entered by the method user, for the purpose of reduction of time needed for the algorithm realization in comparison with the employment of programmable processor using the same technology, comprising the steps of:(a) entering an algorithm flowchart from a file or manually;(b) automatic checking of the syntax of said algorithm flowchart;(c) determining a mathematical representation of said algorithm flowchart as a directed graph to determine the theoretically optimal insertion set of the memory elements needed for providing the full description;(d) automatic creation of a graph frame as a part of said algorithm flowchart;(e) automatic creation of a matrix of basic cycles whereby each cycle comprises frame edges and one directed graph edge that is not included in said graph frame;(f) automatic creation of a matrix of all directed cycles;(g) automatic insertion of binary memory elements into said created digital circuit only at those places that are needed for the realization of said entered algorithm flowchart;(h) providing a theoretically minimal quantity of said memory elements by tearing off a maximal quantity of said directed cycles by each memory element;(i) providing the full description of said digital circuit by realizing said entered algorithm flowchart in the logical basis AND-OR-NOT; and(j) providing the full description of the said created digital circuit by realizing said entered algorithm flowchart in the logical basis AND-NOT or any other logical basis that can be directly derived from said AND-OR-NOT logical basis.