Patent ID: 9136222
Filing Date: 2015-09-15
Classification: H01L

Abstract:
1. A method comprising: overlaying a first mask, at a first orientation, over a level of an integrated circuit (IC) chip, wherein the level of the IC chip includes a photosensitive material; exposing the level of the IC chip, through the first mask, to a light source to form a first pattern in the level of the IC chip; overlaying the first mask, at a second orientation distinct from the first orientation, over the level of the IC chip after the exposing to form the first pattern; subsequently exposing the level of the IC chip, through the first mask at the second orientation distinct from the first orientation, to a light source to form a second pattern in the level of the IC chip, wherein the photosensitive material of the level of the IC chip is exposed during the exposing, and wherein the photosensitive material of the level of the IC chip is exposed during the subsequent exposing; and filling the first pattern and the second pattern with a conductive material to form an electrically measurable identifier on the IC chip.