Patent ID: 6614074
Filing Date: 2003-09-02
Classification: H01L

Abstract:
A semiconductor device comprising:first and second regions of a first conductivity type formed in a substrate of a second conductivity type; and a grooved gate having at least a length formed in a groove located in said substrate between said first second regions; said grooved gate containing a single transistor cell and having sidewall portions and a bottom portion, wherein said bottom portion is connected to said sidewall portions by bottom corners, and a channel located in said substrate along said entire groove length including along said groove gate sidewall and said bottom portion; said channel at said bottom portion and said bottom of said grooved gate including a discrete doping region of said first conductivity type where Vt within said channel at said bottom portion and bottom corners is substantially less than Vt within said channel at said sidewall portions, such that said sidewall portions predominately control electric current through the device, wherein said first and second regions of the first conductivity type comprise a source and drain region that abut a portion of said channel, and said channel has a center region between the source and drain, and the doping region of said first conductivity type extends across a portion of the center region but does not extend to the source and drain.