Patent ID: 9012305
Filing Date: 2015-04-21
Classification: H01L

Abstract:
1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising: forming a mask above the semiconductor wafer, the mask comprising a layer covering and protecting the integrated circuits; patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits; subsequent to patterning the mask, cleaning the exposed regions of the semiconductor wafer with an anisotropic plasma process non-reactive to the exposed regions of the semiconductor wafer; subsequent to cleaning the exposed regions of the semiconductor wafer with the anisotropic plasma process non-reactive to the exposed regions of the semiconductor wafer, cleaning the exposed regions of the semiconductor wafer with a plasma process reactive to the exposed regions of the semiconductor wafer; and subsequent to cleaning the exposed regions of the semiconductor wafer with the plasma process reactive to the exposed regions of the semiconductor wafer, plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.