Patent ID: 6849532
Filing Date: 2005-02-01
Classification: H01L

Abstract:
1. A method of manufacturing a transistor in a semiconductor device, comprising the steps of: forming an insulating film on a semiconductor substrate; forming a trench at the insulating film of a region in which a gate electrode will be formed by means of an etch process; etching an upper portion of the trench so that the upper portion is wider than a lower portion thereof; forming an insulating film spacer on sidewalls of the lower portion of the trench; forming a gate oxide film on the semiconductor substrate in the bottom of the trench; forming the gate electrode on the gate oxide film and on the insulating film spacer to fill the upper and lower portions of the trench, wherein a width of an upper portion of the gate electrode is wider than a combined width of a lower portion of the gate electrode and the insulating film spacer; removing the insulating film; forming a source/drain in the semiconductor substrate; and forming a suicide layer on the gate electrode and the source/drain.