Patent ID: 8872299
Filing Date: 2014-10-28
Classification: G09G,G11C,H01L

Abstract:
1. A semiconductor device comprising: a first transistor comprising a source and a drain one of which is supplied with a first signal; a second transistor comprising a source and a drain one of which is supplied with a first potential, and a gate supplied with a second signal; a third transistor comprising a source and a drain one of which is supplied with the first potential and the other of which is electrically connected to the other of the source and the drain of the first transistor, and a gate electrically connected to the other of the source and the drain of the second transistor; a fourth transistor comprising a source and a drain one of which is supplied with the first potential and the other of which is electrically connected to a gate of the first transistor, and a gate electrically connected to the other of the source and the drain of the second transistor; a fifth transistor comprising a source and a drain one of which is supplied with a second potential and the other of which is electrically connected to the other of the source and the drain of the second transistor and a gate supplied with a third signal; and a capacitor comprising a first electrode electrically connected to the other of the source and the drain of the first transistor, and a second electrode electrically connected to the other of the source and the drain of the second transistor, wherein in a first period, the first signal is low and the second signal is high, and wherein in a second period, the first signal is high and the second signal is either low or high.