Patent ID: 8593525
Filing Date: 2013-11-26
Classification: G01S,G06F,H04B

Abstract:
1. A phasor-based signal detection system comprising: a multiplier section, configured to apply one or more delayed conjugate multiplication operations to an input signal; an absolute value unit coupled to the multiplier section and configured to perform an absolute value operation on an output of the multiplier section; a video filter stage coupled to the absolute value unit and configured to perform a video filtering operation on an output of the absolute value unit; and a hysteresis detector coupled to the video filter stage, the hysteresis detector configured for detecting presence of a signal in a filtered video signal received from the video filter stage, the detecting including determining a signal start when the filtered video signal exceeds a predetermined detection threshold for a first predetermined number of consecutive samples, and determining a signal end when the filtered video signal falls below a predetermined rejection threshold for a second predetermined number of consecutive samples.