Patent ID: 9093422
Filing Date: 2015-07-28
Classification: H01L

Abstract:
1. A semiconductor device comprising: a fin component protruding from a substrate, the fin component including a base part including two sidewalls, an intermediate part on the base part and including two sidewalls, and a channel part on the intermediate part and including two sidewalls, and a width of the intermediate part less than a width of the base part and greater than a width of the channel part; a device isolation pattern disposed on the substrate around the fin component, the device isolation pattern covering both sidewalls of the base part and both sidewalls of the intermediate part; a gate electrode crossing over the fin component, the gate electrode covering both sidewalls and a top surface of the channel part; and a gate insulating layer disposed between the channel part and the gate electrode, wherein at least a first sidewall of the fin component has a different slope at an interface between the base part and intermediate part than at a portion of the intermediate part between the base part and the channel part.