Patent ID: 6760809
Filing Date: 2004-07-06
Classification: G06F

Abstract:
A non-uniform memory access (NUMA) computer system, comprising:a node interconnect; and a first node and a second node coupled to said node interconnect for communication of data therebetween, wherein: said first node includes a first system memory at a lowest level of volatile memory within said first node; and said second node includes at least one processing unit coupled to a second memory hierarchy within said second node, said second memory hierarchy including one or more upper levels of volatile memory and a second system memory at a lowest level of volatile memory within said second node, wherein said second system memory includes: a first set of storage locations allocated as a remote memory cache for storing data corresponding to data resident in said first system memory for which the first node is the home node; a remote memory directory specifying contents of said remote memory cache; and a second set of storage locations allocated for storage of data for which the second node is the home node.