Patent ID: 8638543
Filing Date: 2014-01-28
Classification: B65B,H01G,H05K

Abstract:
1. A laminated chip electronic component comprising: a ceramic body including internal electrodes and dielectric layers; first and second external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer; and additional electrode layers disposed irrespective of a formation of capacitance within the lower cover layer, wherein when half of a thickness of the ceramic body is defined as A, a thickness of the lower cover layer is defined as B, half of a thickness of the active layer is defined as C, and a thickness of the upper cover layer is defined as D, the thickness (D) of the upper cover layer satisfies a range of D≧4 μm and a ratio (B+C)/A by which a central portion of the active layer deviates from a central portion of the ceramic body satisfies a range of 1.069≦(B+C)/A≦1.763.