Patent ID: 6222250
Filing Date: 2001-04-24
Classification: H01L

Abstract:
A semiconductor device in which a vertical NPN transistor and a vertical PNP transistor electrically isolated from each other are formed on a p-type semiconductor substrate, comprising:an n type epitaxial layer formed on said substrate;an n-type buried separating region of said vertical PNP transistor formed in said substrate;a p-type buried collector region of said vertical PNP transistor formed in said n-type buried separating region;an n-type buried collector region of said vertical NPN transistor formed in said epitaxial layer,base regions and emitter regions of said vertical NPN and PNP transistor formed in said epitaxial layer,a graft base region electrically connected to said base region of said vertical NPN transistor,a base contact electrode of said NPN transistor electrically connected to said base region of said vertical NPN transistor,a collector contact electrode of said PNP transistor electrically connected to said collector region of said vertical PNP transistor,wherein an n-type buried separating region of said vertical PNP transistor is formed by ion implantation subsequently to formation of said n-type buried collector region of said vertical NPN transistor, andwherein a p-type buried collector region of said vertical PNP transistor is formed subsequently to formation of an n-type epitaxial layer, andwherein said base contact electrode of said NPN transistor and said collector contact electrode of said PNP transistor is the same semiconductor layer including the same impurity.