Patent ID: 8076235
Filing Date: 2011-12-13
Classification: H01L

Abstract:
1. A fabrication method for a semiconductor device, comprising: providing a substrate comprising a first etch stop layer overlying the substrate, a dielectric layer overlying the first etch stop layer, and an opening through the dielectric layer and the first etch stop layer, exposing parts of the substrate, wherein the opening comprises a narrow portion and a wide portion exposing the narrow portion; and performing plasma treatment on the exposed first etch stop layer and dielectric layer, forming an insulating anti-diffusion layer overlying at least sidewalls of the narrow portion of the opening and overlying the dielectric layer beyond the wide portion of the opening, but not overlying sidewalls of the wide portion of the opening, preventing contamination molecule diffusion from at least the first etch stop layer, wherein the insulating anti-diffusion layer is respectively denser than the first etch stop layer and the dielectric layer.