Patent ID: 8352817
Filing Date: 2013-01-08
Classification: G11C

Abstract:
1. A method for testing a memory, comprising: selecting a destination address of the memory, the destination address corresponding to a location of a data word in the memory; determining dependent addresses of the memory from the destination address, each dependent address corresponding to a location of an additional data word in the memory; buffer-storing user data of the destination address and the dependent addresses in other memory areas; after performing the buffer-storing, writing test patterns into the destination address and the dependent addresses, the test patterns including data different from the user data; reading the test patterns of the destination address and the dependent addresses out of the memory; forming a signature based on a combination of the test patterns that have been read from the memory; comparing the signature with a setpoint value; and initiating protective mechanisms if there is a deviation between the signature and the setpoint value.