Patent ID: 8275971
Filing Date: 2012-09-25
Classification: G06F

Abstract:
1. A method for allowing a guest operating system (guest OS) to modify an entry in a main TLB (Translation Lookahead Buffer) directly without an involvement of a hypervisor comprising: providing a guest virtual address (GVA) from the guest OS to the main TLB; issuing at the main TLB a guest TLB miss exception, if there is no entry corresponding to the GVA in the main TLB; in response to the guest TLB miss exception, issuing a TLBWE (Translation Lookahead Buffer Write Entry) instruction from the guest OS to a hardware logic, the TLBWE instruction including a <the GVA, a guest physical address (GPA)> tuple, the <the GVA, the GPA> tuple indicating the GVA corresponds to the GPA; accessing from the hardware logic to a host TLB to find a matching entry in the host TLB, the matching entry including a <the GPA, a host physical address (HPA)> tuple, the <the GPA, the HPA> tuple indicating the GPA corresponds to the HPA; constructing a new entry for the main TLB based on the found matching entry and the TLBWE instruction, the new entry including a <the GVA, the HPA> tuple, the <the GVA, the HPA> tuple indicating the GVA corresponds to the HPA; and entering the new entry from the hardware logic to the main TLB.