Patent ID: 9015419
Filing Date: 2015-04-21
Classification: G06F

Abstract:
1. A system for tracking a transactional read footprint after a cache line eviction, the system comprising: a hardware processor comprising a transactional read footprint tracking circuit, the transactional read footprint tracking circuit configured to perform a method comprising: executing one or more read instructions in an active transaction, wherein a transaction effectively delays committing stores to memory until the active transaction successfully completes; receiving a cross invalidate (XI) request for a target cache line; determining that the target cache line is part of a congruence class in a local cache; determining whether an extension flag associated with the congruence class is set, the extension flag indicating that cache lines of the congruence class associated with the active transaction has been replaced based only on being least recently used, and the target cache line is not in the cache; based on the extension flag being not set, continuing execution of the active transaction; and based on the extension flag being set, aborting execution of the active transaction.