Patent ID: 6693344
Filing Date: 2004-02-17
Classification: H01L

Abstract:
A semiconductor device having low and high breakdown voltage transistors formed on a major surface of a semiconductor substrate, whereinsaid low breakdown voltage transistor includes: a field insulating layer formed on said major surface, first and second sides of said major surface holding at least a part of said field insulating layer between respective edges of said first and second sides adjacent to said part of said field insulating layer, a base first impurity region of a first conductivity type formed in the first side of said major surface, an emitter first impurity region of a second conductivity type formed in the second side of said major surface, and a base second impurity region of a first conductivity type located between said base first impurity region and said emitter first impurity region, wherein said field insulating layer covers a portion of said base second impurity region, said base second impurity region being formed in said major surface to at least partially surround said base first impurity region and said emitter first impurity region and having a lower impurity concentration than said base first impurity region, and said low breakdown voltage transistor further includes: a base third impurity region of a first conductivity type at least partially surrounding said emitter first impurity region in said major surface and surrounded by said base second impurity region, said base third impurity region having an opening completely filled with said base second impurity region, said base third impurity region having a higher impurity concentration than said base second impurity region, wherein said emitter first impurity region covers at least a portion of said opening.