Patent ID: 6597031
Filing Date: 2003-07-22
Classification: G11C,H01L

Abstract:
A semiconductor memory device comprising:a semiconductor substrate; a junction transistor formed on said semiconductor substrate; an insulating layer formed on said semiconductor substrate, said insulating layer having a hole accepting at least part of said junction transistor and reaching a surface of said semiconductor substrate; and a storage element electrically connected to part of said junction transistor provided in said hole, wherein said storage element has a first state in which an electric resistance is relatively high and a second state in which an electric resistance is relatively low, and said junction transistor includes a first conductive type crystal well region formed in said semiconductor substrate, a second conductive type impurity region formed in said first conductive type well region so as to face to said hole, and a first conductive type conductive region filled in said hole so as to be in contact with said second conductive type impurity region.