Patent ID: 6399438
Filing Date: 2002-06-04
Classification: H01L

Abstract:
A method of producing a semiconductor integrated circuit device having an MISFET and a capacitor element connected in series, comprising the steps of:(a) forming a semiconductor region in a semiconductor substrate; (b) forming a first insulating film having an opening exposing said semiconductor region, on said semiconductor substrate; (c) forming a first conductive film comprising a first refractory metal in said opening of said first insulating film and on said first insulating film; (d) forming a second conductive film comprising a second refractory metal over said first conductive film in said opening of said first insulating film and over said first insulating film; (e) removing said first and second conductive films over said first insulating film and leaving said first and second conductive films in said opening of said first insulating film; (f) forming a third conductive film comprising a third refractory metal over said first and second conductive films left in said opening of said first insulating film; (g) forming a second insulating film over said third conductive film; (h) forming a fourth conductive film over said second insulating film; (i) forming a dielectric film on said fourth conductive film; and (j) forming a fifth conductive film on said dielectric film, wherein said fourth and fifth conductive films and said dielectric film form said capacitor element, which is connected in series to said MISFET.