Patent ID: 6816098
Filing Date: 2004-11-09
Classification: H03M

Abstract:
An oversampling modulator device comprising:an addition unit outputting an signal indicating a sum of an input signal and a first delayed signal, the input signal having a plurality of bits, the output signal divided into a first signal having a number of upper bits of the output signal and a second signal having the remaining bits of the output signal; a subtraction unit outputting a signal indicating a difference between the first signal from the addition unit and a second delayed signal; a first delay unit outputting the first delayed signal to the addition unit by delaying a third signal having upper bits produced by the output signal of the subtraction unit and lower bits produced by the second signal from the addition unit; a quantization unit performing quantization processing of the third signal and outputting a quantization signal having a predetermined number of bits; and a second delay unit outputting the second delayed signal to the subtraction unit by delaying the quantization signal, wherein the quantization unit selects specific bits included in the third signal and generates the quantization signal with the selected bits of the third signal.