Patent ID: 6535015
Filing Date: 2003-03-18
Classification: G01R

Abstract:
A single wafer test circuit for testing response of a silicon on insulator circuit structure to an input signal, the circuit comprising:a) a silicon on insulator circuit structure formed on the wafer; b) an input circuit formed on the wafer and coupled to the silicon on insulator circuit structure through metal layer circuits and generating a drive signal for operating the silicon on insulator circuit structure; c) an output circuit formed on the wafer and coupled to the silicon on insulator circuit structure through metal layer circuits and generating an output signal representative of the response of the silicon on insulator circuit structure to the drive signal; and d) wherein the input circuit includes a clock circuit generating a plurality of clock signals, each at a different clock frequency, and a clock select circuit for selection of a combination of one or more of the plurality of clock signals to generate the drive signal with a desired frequency and duty cycle.