Patent ID: 7020140
Filing Date: 2006-03-28
Classification: H04L,H04Q

Abstract:
1. A receive block for asynchronous transfer mode (ATM) communications, comprising: one or more cell delineation blocks each operable to receive an associated serial bit stream and each operable to identify ATM cell boundaries in the serial bit stream and convert one or more ATM cell payloads to parallel data; a memory comprising one or more memory blocks, each of the memory blocks associated with one or more of the cell delineation blocks, wherein each memory block comprises one or more ATM cell storage locations; a memory controller coupled to one or more of the cell delineation blocks and the memory, the memory controller operable to receive the parallel data from one or more of the cell delineation blocks and to communicate a portion of the parallel data to one or more of the cell storage locations in one or more of the memory blocks; and a bus controller coupled to the memory controller and to the memory, the bus controller operable to interface with an ATM physical layer and to provide one or more signals to the memory for communicating one or more ATM cells via the ATM physical layer.