Patent ID: 8187967
Filing Date: 2012-05-29
Classification: H01L

Abstract:
1. A method of manufacturing a non-volatile memory device, the method comprising: providing a semiconductor layer, a cell region and a peripheral region being defined in the semiconductor layer; sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, and a second conductive layer in the cell region and in the peripheral region of the semiconductor layer; forming a trench exposing a portion of the first conductive layer in the peripheral region, the trench being formed by removing portions of the second conductive layer and the second insulating layer in the peripheral region; performing a trimming operation to remove portions of the second conductive layer and the second insulating layer in the cell region; forming a spacer on a side surface of the trench; and forming a silicide layer in the trench by performing a silicidation process on the spacer with a metal, the silicide layer being electrically connected to the first conductive layer.