Patent ID: 6482717
Filing Date: 2002-11-19
Classification: H01L

Abstract:
A method for fabricating a semiconductor device comprising:providing a first conductive silicon substrate having an active region and field regions thereon and having a formed pad oxide layer on the surface; forming a trench having a width including the active region and field regions at both sides of the active region by etching the pad oxide layer and the silicon substrate; forming a spacer having a width similar to that of the field region at both sidewalls of the trench and exposing the active region of the silicon substrate; forming a second conductive well on the exposed active region of the silicon substrate by growing an in-situ doped silicon epi layer to a height similar to a surface of the silicon substrate; depositing an oxide layer on the resultant structure to fill a gap between the spacer and the well; and performing planarization of the oxide layer to expose a surface of the silicon substrate and to form isolation layers at both sides of the well.