Patent ID: 6542947
Filing Date: 2003-04-01
Classification: H04L

Abstract:
A data bus for serial bus transmission between apparatus which are capable of transmitting and/or receiving data via the data bus, recessive and dominant states being present on the data bus and a respective bit value being associated with each of said states, characterized in that messages are transmitted in message blocks, each message block having at its beginning a start block with (n+k) dominant bits and j subsequent recessive bits and subsequent data blocks with n data bits and m subsequent recessive bits, wherein n, k, j and m are integers greater than zero, and wherein a message block of low priority currently being transmitted can be interrupted by another apparatus in order to transmit a message block of higher priority in that said other apparatus generates a new start block on the data bus and subsequently transmits the associated data blocks, and that an apparatus transmitting a message block on the data bus continuously checks whether a start block appears on the data bus and interrupts the transmission of its data block, if necessary.