Patent ID: 8946828
Filing Date: 2015-02-03
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a semiconductor substrate having at least an active area on a top surface thereof; a gate stack formed over the active area, said active area further comprising source and drain regions adjacent the gate stack; a spacer formed on sidewalls of the gate stack; an elevated contact structure extending upwardly from the source or drain region to have a top surface higher than a top surface of the gate stack; a protection layer overlying the top surface of the gate stack, the top surface of the elevated contact structure, and the spacer, the protection layer filling at least a portion of a space formed between the top surface of the elevated contact structure and the top surface of the gate stack; a dielectric layer overlying the protection layer, the dielectric layer comprising a material different from a material of the protection layer; and a contact hole extending from a top surface of the dielectric layer, through the dielectric layer, through a partial thickness of the protection layer, and to the top surface of the elevated contact structure without reaching the spacer.