Patent ID: 6700193
Filing Date: 2004-03-02
Classification: H01L

Abstract:
A semiconductor device that is comprised of:a chip-mounting section with major and back surfaces supporting leads with major and back surfaces, which are linked to the chip-mounting section; leads located around the chip-mounting section; a semiconductor chip with a major surface on which the semiconductor elements and bonding pads are formed and a back surface (opposite surface) that is made to adhere to the major surface of the chip-mounting section; bonding wires that electrically connect the bonding pads and the leads; and resin having an upper surface and a back (opposite) surface, which is molded around the chip-mounting section, the supporting leads, the leads, the semiconductor chip and the bonding wires; wherein parts of the leads are exposed on the back surface of the resin; the major surface of the chip-mounting section is smaller than the back surface of the semiconductor chip; the chip-mounting section is thinner than the leads; each of the leads has an upper surface which is opposite from exposed portions of the leads; and the major surface of the chip-mounting section is higher than the upper surfaces of the leads.