Patent ID: 7838892
Filing Date: 2010-11-23
Classification: H01L

Abstract:
1. An optoelectronic semiconductor chip, comprising: a semiconductor layer sequence patterned to form a plurality of semiconductor function regions, said semiconductor function regions each comprising at least one inorganic semiconductor material and being separated from one another by interspaces and being arranged on a common carrier layer, at least one of the semiconductor function regions being a defect region, wherein a metallic mirror layer is arranged between the semiconductor function regions and the common carrier layer; a contact structure for making electrical contact with the optoelectronic semiconductor chip; and a counter-contact layer arranged on a side of the common carrier layer opposite to the semiconductor function regions, such that the counter-contact layer is a common counter-contact layer of all of the semiconductor function regions, wherein the contact structure is electrically conductively connected to at least one of the semiconductor function regions; wherein the contact structure is adapted to be electrically separated, or is electrically separated, from the defect region; wherein all of the semiconductor function regions connected to the contact structure are connected in parallel via the contact structure and the counter-contact layer; wherein the interspaces are at least partially filled with a filling material; and wherein the contact structure is arranged on the filling material.