Patent ID: 6147903
Filing Date: 2000-11-14
Classification: G11C,H01L

Abstract:
A method for driving a non-volatile semiconductor memory device comprising, on a semiconductor substrate, a plurality of memory cells arranged in a matrix, a plurality of word lines extending in a row direction, a plurality of source lines extending in the row direction, and a plurality of bit lines extending in a column direction,wherein a plurality of memory cells belonging to a certain row are all connected to the only source line, among the plurality of source lines, which belongs to the certain row, and the only source line which belongs to the certain row is electrically independent from all the source lines belonging to the other rows,the method in which information is read from a memory cell selected from the plurality of memory cells comprising the steps of:applying a first voltage having a polarity which is reverse-biased with respect to the semiconductor substrate to a bit line to which the selected memory cell belongs;applying a second voltage having the same polarity as the polarity of the first voltage to a word line to which the selected memory cell belongs;applying a third voltage having the same polarity as the polarity of the first voltage to all the source lines to which memory cells other than the selected memory cell belong; andapplying an electric potential of the semiconductor substrate to a source line to which the selected memory cell belongs, thereby putting threshold voltages of the memory cells which are other than the selected memory cell and which are on the same bit line as the selected memory cell into an enhancement state.