Patent ID: 9225924
Filing Date: 2015-12-29
Classification: H01L,H04N

Abstract:
1. A solid-state imaging device comprising: a photodetecting section having M×N (each of M and N is an integer not less than 2) pixels, each including a photodiode, that are arrayed two-dimensionally in M rows and N columns; N readout wiring lines each arranged for each column, and connected via readout switches with the photodiodes included in the pixels of corresponding columns; a signal connecting section including a plurality of integration circuits each connected to each of the N readout wiring lines, and for outputting a voltage value according to an amount of charge input through each of the readout wiring lines, a plurality of holding circuits each connected in series via an input switch with the corresponding integration circuit, and for holding a voltage value output from the corresponding integration circuit, and an output switch connected to the holding circuit, and for outputting a voltage value held in the holding circuit; and a controlling section for controlling opening and closing operations of the readout switches of the respective pixels and the input switches and controlling opening and closing operations of the output switches to cause voltage values according to amounts of charges generated in the photodiodes of the respective pixels to be sequentially output from the holding circuits, wherein each readout switch is a semiconductor switch containing polycrystalline silicon, each integration circuit includes an amplifier connected in series between the readout wiring line and the holding circuit and an integrating capacitive element connected in parallel with the amplifier, and the controlling section includes a first operation for causing a charge of each of the photodiodes to be output to the corresponding integration circuit by bringing each corresponding readout switch into a connected state, and then bringing the corresponding readout switch into a non-connected state, and thereafter causing a voltage value to be output to each corresponding holding circuit from the integration circuit, a second operation for causing a charge held in the each corresponding integrating capacitive element to be discharged, and bringing the corresponding readout switch into a connected state to cause a charge held in the corresponding photodiode to be discharged, and a third operation for causing voltage values held in the holding circuits to be sequentially output, and carries out the second operation and the third operation in parallel after carrying out the first operation.