Patent ID: 7215564
Filing Date: 2007-05-08
Classification: G11C,H01L

Abstract:
1. A semiconductor memory device in cross-point architecture with programmable metalization memory cells, the semiconductor memory device comprising: bit lines arranged parallel to and at a distance from one another; word lines made from electrically conductive material, the word lines being arranged transversely with respect to the bit lines and parallel to and at a distance from one another; and a memory cell arranged at a crossing point of a respective bit line and a respective word line, the memory cell having: a storage region between the respective bit line and the respective word line, said storage region having a first surface toward said bit lines and a second surface, the storage region including a chalcogenide glass; an n+ conductively doped polysilicon region in contact with said first surface of said storage region forming a pn junction; and an electrode between the second surface of said storage region and the respective word line.