Patent ID: 7148732
Filing Date: 2006-12-12
Classification: G11C,H03K

Abstract:
1. A semiconductor integrated circuit comprising: a delay circuit having a constant current source, a delay stage, and a compensating circuit; and a load transistor connected in parallel with the compensating circuit at a constant current node of the constant current source, wherein said delay stage determines an operation delay time of an output relative to an input depending on a constant current produced by the constant current source and said delay stage comprises inverter type circuits including a plurality of first transistors each having a mutual conductance determined by the constant current produced by the constant current source, and a plurality of second transistors switched in response to the input and arranged in series with the plurality of first transistors, and wherein a current that flows through the load transistor is mirror-reflected on the plurality of first transistors, wherein said compensating circuit compensates for a variation in delay characteristic of the delay stage due to at least one of a variation in temperature, a variation in power supply voltage, and a process variation.