Patent ID: 6076141
Filing Date: 2000-06-13
Classification: G06F,Y10S

Abstract:
A lookup switch accelerator comprising:an instruction bus;an execution unit coupled to said instruction bus wherein said execution unit receives a stream of instructions comprising one or more lookup switch statements, each of said one or more lookup switch statements having a lookup switch identifier value and a current match value;another bus wherein said another bus carries a lookup switch identifier value for a lookup switch statement on said instruction bus;a jump offset value output bus coupled to said execution unit;a memory circuit comprising:a first memory panel wherein said first memory panel is for storing information corresponding to a first lookup switch statement, including a first lookup switch identifier value, a plurality of first match values, and a plurality of corresponding first jump offset values;a first input circuit coupled to an operand bus carrying a current match value for said lookup switch statement on said instruction bus, and coupled to said first memory panel to access said plurality of first match valueswherein the first input circuit detects whether a match exists between the current match value on said operand bus and any one of the plurality of first match values; anda first output circuit coupled to said first memory panel to have access to the first plurality of corresponding jump offset values stored in the first memory panel, and selectively coupled to said jump offset value output bus;a comparator coupled to said another bus to receive said lookup switch identifier value and coupled to said first memory panel to receive the stored first lookup switch identifier value, wherein the comparator detects whether a match exists between the lookup switch identifier value on said another bus and the stored first lookup switch identifier value;wherein the first output circuit is coupled to said jump offset value output bus to supply a first jump offset value from the first memory panel when the comparator detects a match and the first input circuit detects a match, wherein the first jump offset value corresponds to the current match value.