Patent ID: 8589886
Filing Date: 2013-11-19
Classification: G06F

Abstract:
1. A computer implemented method for defining and implementing a testing sequence for a UUT (unit under test) using directly controllable modular building blocks on a graphical user interface defining a test sequencing platform wherein said sequencing platform alleviates the need to manually connect said modular blocks, the method comprising: a. abstracting hardware test requirements for a UUT; b. defining a plurality of modular building blocks to correspond to said hardware test requirements, wherein each of said modular building blocks defines an elementary graphical unit utilized to configure a step within said hardware test requirement; c. building said test sequence by the user by placing said plurality of modular building blocks on said sequencing platform, said platform defining a graphical interface displayed to the user wherein said building blocks may be manipulated by the user, said platform comprising a plurality of cells defining a matrix platform provided for placing said building blocks and for forming a relative stacking order of said building blocks on said platform wherein said stacking order corresponds to said hardware test sequence requirements and wherein said platform automatically links said building blocks according to said stacking order determining the flow and execution of said test sequence according to said hardware test requirements; wherein said stacking order may be edited by a user within said platform such that said platform automatically re-links and reconfigures the flow and execution of said test sequence; and d. executing said test sequence according to the relative location of said plurality of modular building blocks on said matrix platform.