Patent ID: 6323693
Filing Date: 2001-11-27
Classification: G11C

Abstract:
A current sense amplifier circuit comprising:a cell current generator comprising a memory cell connected to a word line and a bit line, the cell current generator generating a memory cell current that is applied to the memory cell and a bit line charge current for charging the bit line;a reference current generator comprising a dummy bit line and a reference cell, the reference current generator generating a reference cell current that is applied to the reference cell and a dummy bit line charge current for charging the dummy bit line;a sense amplifier comprising a first input terminal connected to the cell current generator for receiving the memory cell current and the bit line charge current and a second input terminal connected to the reference current generator for receiving the reference cell current and the dummy bit line charge current, wherein the sense amplifier senses and amplifies the difference between current applied through the first input terminal and current applied through the second input terminal;a first current path coupling the reference current generator to the reference cell, wherein the reference cell current is applied to the reference cell over the first current path; anda second current path coupling the reference current generator to the dummy bit line, wherein the dummy bit line charge current is applied to the dummy bit line over the second current path;wherein the first current path and the second current path are independent of one another.