Patent ID: 6838700
Filing Date: 2005-01-04
Classification: G02F,H01L

Abstract:
1. An active matrix substrate comprising: a row and column array of active elements wherein each element is associated with a thin film transistor (TFT) having a gate electrode connected to a corresponding row conductor and source and drain electrodes connected to corresponding column conductors; and protective circuitry connected to at least one of the row conductors for protecting the TFTs against electrostatic discharge (ESD); wherein the protective circuitry comprise at least one of either a lateral diode or a lateral, gate shorted TFT connected between row and column conductors; and wherein the semiconductor region of at least one of a lateral diode or a lateral, gate shorted TFT of the protective circuitry comprises a first portion, located on one side of the active region of the diode or TET, connected to the row conductor, and a second portion, located on the other side of the active region, at least twice the size of the first portion.