Patent ID: 8013652
Filing Date: 2011-09-06
Classification: H03F

Abstract:
1. A power amplification device, comprising: a first intermediate signal generator circuit for adding a first constant envelope vector generation signal, which is orthogonal to an input signal, to the input signal to generate a first intermediate signal; a second intermediate signal generation circuit for adding a second constant envelope vector generation signal, which is obtained by inverting the first constant envelope vector generation signal in phase, to the input signal to generate a second intermediate signal; a first amplitude detector circuit for detecting an amplitude of the first intermediate signal; a second amplitude detector circuit for detecting an amplitude of the second intermediate signal; an amplitude control circuit for changing the amplitudes of the first constant envelope vector generation signal and the second constant envelope vector generation signal based on the amplitudes detected by the first amplitude detector circuit and the second amplitude detector circuit; a first amplifier circuit for amplifying the first intermediate signal; a second amplifier circuit for amplifying the second intermediate signal; an adder circuit for adding the first amplified intermediate signal and the second amplified intermediate signal together to generate an output signal obtained by amplifying the input signal; a voltage holding circuit for holding a voltage related to at least one of a first amplitude of a given reference signal, which is detected by the first amplitude detector circuit, and a second amplitude of the given reference signal, which is detected by the second amplitude detector circuit; and a correction circuit for correcting a detection sensitivity of the first amplitude detector circuit or the second amplitude detector circuit based on the voltage held by the voltage holding circuit.