Patent ID: 7317455
Filing Date: 2008-01-08
Classification: G09G

Abstract:
1. A bias offset voltage circuit, comprising: a first voltage source having a first positive terminal, a first negative terminal and a first voltage differential equal to the voltage difference between the first positive terminal and the first negative terminal; a second voltage source having a second positive terminal, a second negative terminal and a second voltage differential equal to the voltage difference between the second positive terminal and the second negative terminal; a third voltage source having a third positive terminal and a third negative terminal and a third voltage differential equal to the voltage difference between the third positive terminal and the third negative terminal; a switching element having a positive input terminal, a negative input terminal and an output terminal, wherein the first negative terminal is electrically connected to the negative input terminal, wherein the first positive terminal is electrically connected to the second negative terminal, wherein the second positive terminal is electrically connected to the third negative terminal, and wherein the third positive terminal is electrically connected to the positive input terminal.