Patent ID: 8384216
Filing Date: 2013-02-26
Classification: H01L,Y10T

Abstract:
1. A manufacturing method of a package structure, comprising: providing a metal substrate, the metal substrate having a first surface, a first seed layer being formed on the first surface; forming a patterned insulating layer on the first seed layer, the patterned insulating layer exposing a portion of the first seed layer; forming a patterned circuit layer, comprising: performing a chip-bonding process to electrically connect a chip to the patterned circuit layer; forming an encapsulant, the encapsulant encapsulating the chip and the patterned circuit layer and covering a portion of the patterned insulating layer; removing the metal substrate and the first seed layer to expose a bottom surface of the patterned insulating layer and a lower surface of the patterned circuit layer; and forming a plurality of solder balls on the lower surface of the patterned circuit layer.