Patent ID: 6015732
Filing Date: 2000-01-18
Classification: H01L

Abstract:
A method comprising the following steps:(a) forming gate oxide within regions on a substrate;(b) forming polysilicon over a first region, the polysilicon extending over field oxide surrounding the first region;(c) thinning gate oxide within a second region, the polysilicon over the first region preventing gate oxide within the first region from being thinned;(d) forming a first transistor gate within the second region, including the following substeps:(d.1) depositing a layer of polysilicon,(d.2) depositing a layer of metal-silicide,(d.3) depositing a dielectric layer, and(d.4) etching the dielectric layer, the layer of metal-silicide and the layer of polysilicon to form the first transistor gate; and,(e) after forming the first transistor gate within the second region, etching the polysilicon which is over the first region to form a second transistor gate.