Patent ID: 7439157
Filing Date: 2008-10-21
Classification: H01L

Abstract:
1. A method of forming a portion of an integrated circuit device contained on a semiconductor substrate, the method comprising: removing a portion of the substrate to define an isolation trench; forming a first dielectric layer in contact with exposed surfaces of the substrate in the trench; forming a second dielectric layer in contact with at least the first dielectric layer, wherein the second dielectric layer is a nitride layer; forming a third dielectric layer in contact with the second dielectric layer to fill the trench, wherein the third dielectric layer is a layer of spin on dielectric material; removing an upper portion of the third dielectric layer from the trench and leaving a lower portion covering a portion of the second dielectric layer; oxidizing the lower portion of the third dielectric layer after removing the upper portion; removing an exposed portion of the second dielectric layer from the trench, thereby exposing a portion of the first dielectric layer; and forming a fourth dielectric layer in the trench covering the exposed portion of the first dielectric layer.