Patent ID: 6049540
Filing Date: 2000-04-11
Classification: H04Q

Abstract:
A telecommunications circuit switch, comprising;a microprocessor comprising a cache;a plurality of input buffers each for receiving an input bit stream; anda plurality of output buffers each for transmitting an output bit stream;said microprocessor connected to said input buffets by a multi-byte bus for receiving a plurality of bytes, each byte representing a time slot, for storage in sequential locations of said cache;said microprocessor, operative under the control of a program for:controlling parallel byte reception and storage in said cache of said plurality of bytes from said input buffers; andusing a control map stored in said cache, controlling transmission of bytes from said cache to each of said plurality of output buffers, thereby flexibly switching bytes from any of a plurality of input streams to a plurality, of different output streams;wherein contents of said input streams are switched to said output streams under the control of said control map without using the contents of said time slots.