Patent ID: 6740984
Filing Date: 2004-05-25
Classification: G01R,H01L,H05K,Y02P

Abstract:
A ball grid array semiconductor package, comprising:a substrate having a first surface, a second surface, an aperture extending from the first surface through the substrate to the second surface, at least one substrate bond pad located on at least one of the first surface and the second surface proximate the aperture, at least one intermediately positioned connective element located on the at least one of the first surface and the second surface, and at least one test pad located on the at least one of the first surface and the second surface on a severable portion of the substrate; a semiconductor device having an active surface and a plurality of bond pads thereon, the semiconductor device attached to one of the first surface and the second surface of the substrate; at least one first circuit trace extending from the at least one substrate bond pad to the at least one intermediately positioned connective element; at least one second circuit trace extending from the at least one intermediately positioned connective element to the at least one test pad located on the at least one of the first surface and the second surface on the severable portion of the substrate; and at least one connection extending through the aperture and connecting at least one of the plurality of bond pads of the semiconductor device with the at least one substrate bond pad.