Patent ID: 8917337
Filing Date: 2014-12-23
Classification: H03M,H04N

Abstract:
1. An AD conversion circuit comprising: a reference signal generation section configured to generate a reference signal that increases or decreases with the passage of time; a comparison section configured to compare an analog signal to be subjected to AD conversion output from a pixel of an image apparatus to the reference signal, and configured to terminate a comparison process at a timing at which the reference signal has satisfied a predetermined condition for the analog signal; a first count section configured to perform a count operation and outputting a count value; a latch section configured to latch a second count value at a second timing related to an end of the comparison process corresponding to a second analog signal after latching a first count value at a first timing related to an end of the comparison process corresponding to a first analog signal; and a second count section configured to sequentially count values of bits constituting the second count value retained in the latch section after an initial value has been set in the second count section on the basis of values of bits constituting the first count value retained in the latch section, wherein digital data corresponding to a difference between the first analog signal and the second analog signal is output, and the latch section and the second count section are arranged for every column or every plurality of columns of a pixel array of the imaging apparatus.