Patent ID: 8090876
Filing Date: 2012-01-03
Classification: G06F

Abstract:
1. Apparatus comprising first and second network connections, a processor and memory, the processor and the memory together operating to implement a kernel, a core and a wrapper, wherein the wrapper is configured to communicatively separate the kernel and the core and wherein: the core comprises plural software modules arranged sequentially for handling or control of data as it is passed between the first and second network connections, and the kernel is arranged to interface to the first and second network connections, and wherein the wrapper is configured: to intercept a first message being processed by the kernel; to receive a kernel reference from the kernel; to generate an identifier; to associate the identifier with the first message; to store a data element comprising the kernel reference and the identifier; and to pass the identifier with the message to the core, the wrapper also being configured on receiving a second message from the core: to read the identifier from the second message; to identify a data element including the identifier; to extract from the data element the kernel reference; and to pass to the kernel said kernel reference and the second message.