Patent ID: 8305800
Filing Date: 2012-11-06
Classification: H01L

Abstract:
1. A method for fabricating a phase-change memory cell, comprising: providing a substrate having thereon a plurality of buried address lines and a first dielectric layer on the substrate; forming a conductive electrode in the first conductive layer; removing a portion of the first dielectric layer thereby exposing a top portion of the conductive electrode; depositing a second dielectric layer on surface of the top portion and on the first dielectric layer, wherein the second dielectric layer defines a recess around the top portion and on the first dielectric layer; depositing a third dielectric layer over the second dielectric layer, wherein the third dielectric layer fills into the recess; performing a planarization process to remove a portion of the third dielectric layer and a portion of the second dielectric layer, thereby exposing a top surface of the top portion of the conductive electrode; salicidizing the top portion of the conductive electrode to form a heating stem; wherein the first dielectric layer extends to a sidewall of the heating stem and encompasses the heating stem to form an upward protruding cylindrical feature; selectively removing the remaining third dielectric layer from the recess; forming a phase-change material layer covering the heating stem and the second dielectric layer; and performing a self-aligned etching process to etch the phase-change material layer, thereby forming a phase-change storage cap, wherein the phase-change storage cap at least covers an upper portion of a sidewall of the upward protruding cylindrical feature underneath the phase-change storage cap.