Patent ID: 7339388
Filing Date: 2008-03-04
Classification: G01R,H01L

Abstract:
1. A system of electrical components for evaluating a partially-fabricated wafer, wherein the system comprises: a circuit element provided within an active region of a die of the wafer, wherein the circuit element is configured to be operational at a time period in which only some of a plurality of fabrication process steps have been performed for completing fabrication of the wafer, so that the circuit element is operational before a remainder of the die becomes operational; one or more receivers provided in the active region of the die and connected to the circuit element, wherein the one or more receivers are configured to receive one or more inputs and to generate, during the time period and from the one or more inputs, one or more signals for use with the circuit element; wherein before fabrication process steps are performed to enable the die to be operational, the circuit element is configured to be responsive to the one or more inputs by exhibiting an electrical activity, the electrical activity having a characteristic that is invariant during the time period and detectable by a probe without effecting a usability of a chip that is formed from the die; and wherein at any given instance in the time period in which only some of a plurality of fabrication process steps have been performed for making the remainder of the die operational, the characteristic of the electrical activity exhibited by the circuit element is indicative of at least one of (i) a design of at least a portion of the active region of the die during the fabrication; or (ii) one or more fabrication process steps.