Patent ID: 8598006
Filing Date: 2013-12-03
Classification: H01L

Abstract:
1. A method of performing processing steps for forming a semiconductor structure, said processing steps comprising: providing a semiconductor substrate including a first single crystalline semiconductor material; forming a strained semiconductor material portion directly on said semiconductor substrate, wherein said strained semiconductor material portion comprises a second single crystalline semiconductor material and is epitaxially aligned to, and is lattice-mismatched relative to, said first single crystalline semiconductor material of said semiconductor substrate, wherein a lattice mismatch between said first semiconductor material and said second semiconductor material is a source of a strain exerted on said strained semiconductor material portion by said first semiconductor material in said semiconductor substrate; reducing a magnitude of said strain exerted on said strained semiconductor material portion by rendering said strained semiconductor material portion substantially amorphous through ion implantation of dopant ions into said strained semiconductor material portion without implanting said dopant ions into said first single crystalline semiconductor material at a cooled temperature within a range from −267 degrees Celsius to 10 degrees Celsius; and generating a residual strain in said strained semiconductor material portion by annealing said implanted strained semiconductor material portion at a temperature that removes structural damages induced by implantation of said dopant ions.