Patent ID: 6313508
Filing Date: 2001-11-06
Classification: H01L

Abstract:
A semiconductor device of CMOS structure comprising:an SOI substrate composed of first and second substrates of a first conductivity type which are integrally joined to each other by an embedded oxide film interposed therebetween; anda pair of offset transistors of MOS structure which are of first and second conductivity types, respectively, said transistors being disposed in said SOI substrate and isolated from each other;said transistor of the second conductivity type comprising a source base layer composed of said first substrate, an impurity diffused drain offset diffusion layer composed of said first substrate, and a first PN junction between said source base layer and said impurity diffused drain offset diffusion layer;said transistor of the first conductivity type comprising an impurity diffused source base layer composed of said first substrate, a drain base layer composed of said first substrate, and a second PN junction between said impurity diffused source base layer and said drain base layer;wherein said impurity diffused drain offset diffusion layer and said impurity diffused source base layer are formed at the same time by the same process so that said first PN junction and said second PN junction have an equal breakdown voltage.