Patent ID: 6518143
Filing Date: 2003-02-11
Classification: H01L

Abstract:
A method for fabricating a lower plate of a capacitor of a semiconductor device, comprising:forming a planarization layer on a semiconductor substrate; forming a conductive plug in the planarization layer; forming a first nitride film on the planarization layer and the top surface of the conductive plug; forming a first oxide film on the top surface of the first nitride film with a trench in the first oxide film around the conductive plug; forming a second nitride film in the trench; removing the first oxide film; forming a second oxide film over at least a portion of the second nitride film; exposing the top surface of the conductive plug; forming a silicon layer pattern on the top surface of the conductive plug and the side walls of the second oxide film; removing the second oxide film; forming silicon grains on the surface of the silicon layer pattern; and removing the second nitride film.