Patent ID: 6432783
Filing Date: 2002-08-13
Classification: H01L,Y10S

Abstract:
A method for manufacturing a semiconductor device comprising the steps of:patterning a gate material layer on an active region of a semiconductor substrate; forming a mask having an open region over at least a portion of the active region but not over a field region of the semiconductor substrate so as to only expose the gate material layer on the active region, and the open region of the mask has the same size as that of the active region, or the open region of the mask is greater or smaller than the active region by about 1 &mgr;m; and forming a gate electrode, source regions and drain regions by doping impurity ions of a conductivity opposite to that of the exposed gate material layer and the active region; the forming the gate electrode including: injecting impurity ions into the active region where the gate electrode will be formed; and diffusing the impurity ions into the gate material layer; or doping first impurity ions having a conductivity opposite to the substrate on the exposed gate material layer to form the gate electrode; and injecting second impurity ions for source and drain having a conductivity opposite to the substrate into both sides of the gate electrode, and not on the substrate itself, wherein a concentration of the first impurity ions is greater than a concentration of the second impurity ions.