Patent ID: 7071555
Filing Date: 2006-07-04
Classification: H01L

Abstract:
1. A ball grid array package stack comprising: a lower package comprising a first circuit substrate comprising a first substrate portion, a second substrate portion, and a third substrate portion; a first integrated circuit chip attached on and electrically connected to a top surface of said first substrate portion, a first molding resin covering said first integrated circuit chip, the bottom surface of the first molding resin contacting the top surface of said first substrate portion and covering the top surface of said first integrated circuit chip; said second substrate portion being folded so that the third substrate portion is positioned on the upper surface of said first molding resin; external connection terminals formed on a bottom surface of said first substrate portion, said external connection terminals being distributed over the bottom surface of the first substrate portion; and an upper ball grid array package comprising a second circuit substrate; a second integrated circuit chip attached on and electrically connected to a top surface of the second circuit substrate, interconnection terminals formed on a bottom surface of the second circuit substrate, and a second molding resin covering a top of the second integrated circuit chip and the top surface of the second circuit substrate, said interconnection terminals electrically connected to the third substrate portion of said first circuit substrate wherein the first circuit substrate has first ball pads formed in said first portion to receive said external connection terminals, second ball pads formed in the third portion to receive the interconnection terminals, and connection lines connecting the first and the second ball pads.