Patent ID: 8369520
Filing Date: 2013-02-05
Classification: G06F

Abstract:
1. Cryptography processor for carrying out operations for cryptographic applications, comprising: a central processing unit for obtaining commands for executing an operation and for outputting results of an operation; a co-processor coupled to the central processing unit, the co-processor comprising: a plurality of calculating subunits, each calculating subunit comprising at least one arithmetical unit, wherein each calculating subunit further comprises a plurality of registers exclusively assigned to the arithmetical unit of the respective calculating subunit, and wherein each calculating subunit comprises a word length specified by the number width of the arithmetical unit; and a single control unit coupled to each of the plurality of calculating subunits and arranged to sub-divide an operation into sub-operations, to distribute the sub-operations among the plurality of calculating subunits and to control the execution of the operation by the plurality of calculating subunits, wherein the single control unit is arranged to interconnect at least two calculating subunits in such a manner that the interconnected calculating subunits are adapted to perform a calculation with numbers whose word length is equal to the sum of the number widths of the interconnected calculating subunits, the calculating subunits being implemented for carrying out the suboperations independently without any intervention on the part of the control unit, after the control unit has supplied the necessary command to the calculating unit; wherein the plurality of calculating subunits, the central processing unit, and the single control unit are integrated on a single chip; and wherein the single chip comprises a common supply current access for supplying the plurality of calculating subunits, the central processing unit, and the single control unit with current.