Patent ID: 6335654
Filing Date: 2002-01-01
Classification: G05F,H02H

Abstract:
An inrush current control circuit for producing a voltage ramp at an output connected to a load capacitor when a DC voltage is applied to an input, comprising:an input having a positive and negative lead connected to a DC power supply; an output having a positive and negative lead connected to a load capacitor; a PFET connected between the positive lead of the input and output; a direct connection between the negative lead of the input and output; a first capacitor connected between a gate of the PFET and the positive output lead; a transistor connected between the gate of the PFET and the positive input lead for charging the first capacitor when the DC power supply applies a DC voltage to the input; a voltage divider connected between the positive and negative leads and having a center tap coupled to the gate of the PFET for setting the steady state gate potential thereof; and an RC circuit connected to a base of the transistor and the positive and negative input lead for tuning off the transistor at a certain time after the DC voltage is applied to the input.