Patent ID: 6127247
Filing Date: 2000-10-03
Classification: H01L

Abstract:
A method of forming vertically modulated wells in a semiconductor substrate, said method comprising the steps of:forming isolation regions over said substrate;forming a pad layer over said substrate;forming a photoresist layer over said pad layer;defining p-well regions by removing portions of said photoresist layer;forming first p-wells in said substrate under said p-well regions by a first ion implantation, said first ion implantation is performed with an energy between about 100 keV to about 1000 keV and a dose of about 1E12 atoms/cm.sup.2 to about 1E13 atoms/cm.sup.2 ;forming a masking layer over said p-well regions;removing said photoresist layer;performing a first thermal process;forming a second p-wells in said substrate at a level below said first p-wells by a second ion implantation, said second ion implantation is performed with an energy between about 500 keV to about 5 MeV and a dose of about 5E11 atoms/cm.sup.2 to about 1E15 atoms/cm.sup.2 ;forming n-wells in said substrate under regions uncovered by said masking layer and above said second p-wells by a third ion implantation, said third ion implantation is performed with an energy between about 200 keV to about 3 MeV and a dose of about 1E12 atoms/cm.sup.2 to about 5E13 atoms/cm.sup.2 ;removing said masking layer and said pad layer; andperforming a second thermal process.