Patent ID: 6808758
Filing Date: 2004-10-26
Classification: C23C

Abstract:
A process for forming layers in electronic devices comprising the steps of:providing a reaction chamber, the reaction chamber comprising a cold wall chamber; placing a semiconductor wafer in said reaction chamber; heating said semiconductor wafer with a thermal heating device placed adjacent to said wafer to a temperature of at least about 300Â° C.; pulsing a precursor fluid into said reaction chamber, said precursor fluid forming a solid layer on said semiconductor wafer; purging said reaction chamber by flowing an inert gas through said reaction chamber after each pulse in order to substantially remove any of said precursor fluid not converted into a solid; and repeating the above steps a plurality of times in order to increase the thickness of the solid layer and wherein the process further comprises the step of annealing the solid layer multiple times during formation of the layer, the multiple annealing steps occurring after the reaction chamber is purged by the inert gas and prior to the next pulse of the precursor fluid, the solid layer being annealed by exposing the solid layer to thermal light energy, the light energy heating the solid layer to a temperature sufficient to anneal the layer.