Patent ID: 6605510
Filing Date: 2003-08-12
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device, comprising steps of:(a) forming an element separation insulating film on a surface of a semiconductor substrate to define a first active region surrounded by the element separation insulating film; (b) forming a first gate lamination structure on a partial surface area of the first active region, the first gate lamination structure including a gate insulating film and a gate electrode; (c) implanting impurities of a first conductivity type into surface layers of the semiconductor substrate on both sides of the first gate lamination structure, by using the first gate lamination structure as a mask; (d) covering the first gate lamination structure with a first film made of insulating material; (e) forming a second film on the first film, the second film being made of insulating material having an etching resistance different from an etching resistance of the first film; (f) anisotropically etching the second and first films to leave a first side wall spacer on a side wall of the first gate lamination structure, the first side wall spacer including at least two layers of the first and second films; (g) implanting impurities of the first conductivity type in surface layers of the semiconductor substrate, by using the first gate lamination structure and the first side wall spacer as a mask; (h) selectively removing the second film of the two layers constituting the first side wall spacer; (i) forming metal silicide films on surfaces of regions where the impurities were implanted by said implanting step (g); and (j) forming an interlayer insulating film covering the first gate lamination structure and the metal silicide films.