Patent ID: 7112844
Filing Date: 2006-09-26
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor layer comprising a channel region, a first impurity region, a second impurity region and a pair of third impurity regions over a substrate; a gate insulating film formed over the semiconductor layer; and a gate electrode formed over the gate insulating film, wherein the channel region is disposed between the pair of third impurity regions, the first and second impurity regions are disposed between the channel region and the pair of third impurity regions, wherein the gate electrode comprises a laminate of an electrode (A) and an electrode (B), and one edge portion of the electrode (A) overlaps with the second impurity region through the gate insulating film, and another edge portion of the electrode (A) overlaps with the channel region through the gate insulating film, and wherein a concentration of the second impurity region is greater than a concentration of the first impurity region.