Patent ID: 8767359
Filing Date: 2014-07-01
Classification: H02H

Abstract:
1. An electrostatic discharge (ESD) protection circuit, comprising: an electrostatic discharge unit comprising a first transistor and a second transistor that are connected in series between a first potential and a second potential to form an electrostatic discharge path, wherein the first potential is lower than the second potential, the first transistor and the second transistor both are NMOS transistors, a source of the first transistor is connected to the first potential, and a drain of the second transistor is connected to the second potential; an ESD event detection unit for detecting an ESD event; a first drive unit connected between an output of the ESD event detection unit and a gate of the first transistor, the first drive unit causing the first transistor to be turned on during the ESD event and causing the first transistor to be turned off when there is no ESD event; and a second drive unit connected between the output of the ESD event detection unit and a gate of the second transistor, the second drive unit causing the second transistor to be turned on during the ESD event and causing the second transistor to be turned off when there is no ESD event, wherein the second drive unit comprises: