Patent ID: 8932929
Filing Date: 2015-01-13
Classification: H01L

Abstract:
1. A method of fabricating the thin film transistor memory, comprising the following steps, step 1, using the standard RCA method to clean a gate electrode substrate, step 2, growing a charge blocking layer film on the substrate by ALD method, the film is Al step 3, growing first layer metal nanocrystals, an insulating layer, and second layer metal nanocrystals on the charge blocking layer in sequence from bottom to top by ALD method, wherein the first layer metal nanocrystals and the second layer metal nanocrystals comprise either RuO step 4, growing a first single layer, a second single layer and a third single layer on the second layer metal nanocrystals in sequence from bottom to up by ALD method to form a symmetrical stack layer, wherein the second single layer is a HfO step 5, growing an IGZO film on the third single layer by using RF sputtering method, the working pressure is 50-200 w, the ratio of O step 6, spin-coating a first photoresist on the IGZO film, and then using the standard lithography method, a protective layer is formed on the first photoresist to protect active region, then etching the rest IGZO film without the protective layer on it by using diluted hydrochloric acid, nitric acid, phosphoric acid or hydrofluoric acid with a concentration of 0.01%˜2%, the etch time is 10-600 s, step 7, removing the first photoresist to form the active region, step 8, spin-coating a second photoresist on the IGZO film and the third single layer in the stack layer, and then defining the source/drain region on the second photoresist by standard lithography method, step 9, depositing a metal film by e-beam evaporation to form source and drain electrodes, step 10, removing the second photoresist.