Patent ID: 8866499
Filing Date: 2014-10-21
Classification: G01R

Abstract:
1. A method for testing capacitance of a load circuit connected to an output pin of a driving circuit, comprising: receiving a first voltage at a first input of a voltage output amplifier; driving a voltage at the output pin to the first voltage using the voltage output amplifier, the output pin being coupled to an output of the voltage output amplifier; receiving a sudden voltage change at the first input of the voltage output amplifier; triggering an onset of a timed voltage change period; controlling, by a current source, an output current of the voltage output amplifier that charges the output pin; comparing the voltage at the output pin to a reference voltage; and when the voltage at the output pin matches the reference voltage, generating an estimate of capacitance present at the output pin based on a number of clock cycles occurring between the onset of the timed voltage change period and a time at which the voltage at the output pin matches the reference voltage, wherein the timed voltage change period starts in response to the voltage at the output pin matching to a first value of the reference voltage after the sudden voltage change at the first input of the voltage output amplifier and ends in response to the voltage at the output pin matching to a second value of the reference voltage.