Patent ID: 6791196
Filing Date: 2004-09-14
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate having a bonding area; a first conducting layer on the bonding area; an intermediate layer on the first conducting layer, the intermediate layer including a non-conducting part and a conductive part arranged in a plate section and a plugs/mesh section of the intermediate layer such that: the plugs/mesh section contains a plurality of islands of one of the conductive part and the non-conducting part interspersed with at least one portion of the other one of the conductive part and the non-conducting part, and a square test footprint having an area at least four times an average of areas of the islands contains a higher fraction of the conductive part if considered in the plate section, than if considered in the plugs/mesh section; and a top conductive layer on the intermediate layer that does not physically contact the first conducting layer.