Patent ID: 6900675
Filing Date: 2005-05-31
Classification: H03L

Abstract:
1. A phase-locked loop (PLL) comprising: a phase detector; a loop filter coupled to the phase detector; a voltage controlled oscillator (VCO) coupled to the loop filter and to the phase detector; a control circuit coupled to the VCO; and a reference frequency coupled to the phase detector and to the control circuit; wherein the phase detector, the loop filter and the VCO comprise a main loop; wherein the VCO and the control circuit comprise a frequency trimming loop operable to bring an output frequency of the VCO to within a determined range of a desired locking frequency of the PLL; and wherein operation of the frequency trimming loop does not interfere with operation of the main loop, and operation of the main loop does not interfere with operation of the frequency trimming loop.