Patent ID: 9093988
Filing Date: 2015-07-28
Classification: H01L,H03K

Abstract:
1. A semiconductor device comprising: a first transistor; a second transistor; and a third transistor, wherein the first transistor and the second transistor have different conductivity types, wherein each of the first transistor and the second transistor comprises a channel formation region comprising a first semiconductor, wherein the third transistor comprises a channel formation region comprising a second semiconductor having a band gap wider than the first semiconductor, wherein a gate of the first transistor is electrically connected to a gate of the second transistor, wherein one of a source and a drain of the first transistor is electrically connected to a first power supply line, wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor, wherein the other of the source and the drain of the third transistor is electrically connected to a second power supply line, and wherein the third transistor is configured to be turned off when the first transistor is switched from an on state to an off state and the second transistor is switched from an off state to an on state or when the first transistor is switched from the off state to the on state and the second transistor is switched from the on state to the off state.