Patent ID: 6171872
Filing Date: 2001-01-09
Classification: H01L

Abstract:
A method of monitoring a process of manufacturing a semiconductor wafer including an area of hemispherical grain polysilicon, the method comprising:depositing a silicon layer on the front side and the back side of a silicon substrate;forming a hemispherical grain polysilicon area on the silicon layer on the front side;performing an implantation to dope the hemispherical grain polysilicon area on the front side to make a conductive contact;forming a dielectric on the hemispherical grain polysilicon area on the front side, the dielectric cooperating with the hemispherical grain polysilicon area;providing a probe including a liquid conductor; anddetermining surface area of the hemispherical grain polysilicon area, is the determining comprising performing a capacitance-voltage measurement with a mercury probe having a liquid conductor tip arranged to selectively contact the dielectric, and conductive chuck selectively supporting the wafer, using a quasi-static measurement method, to determine capacitance at the area with the hemispherical grain polysilicon area, and determining surface area based on capacitance.