Patent ID: 7936623
Filing Date: 2011-05-03
Classification: G11C,H01L,Y10T

Abstract:
1. An integrated circuit comprising a first structure, wherein said first structure comprises a first memory base cell, a first port set, a second port set, and a set of other ports, wherein said first memory base cell comprises a first storage node set, a second storage node set, and a set of other nodes, wherein said set of other nodes comprises a first data node for accessing said first storage node set, a first access control node for controlling the access of said first storage node set, a first supply node for supplying said first storage node set, and a second supply node for supplying said second storage node set, wherein said first and second supply nodes are of the same sinking or sourcing type and are not connected together, wherein each node in said first storage node set is connected to a port in said first port set, wherein each node in said second storage node set is connected to a port in said second port set, wherein each of said other nodes is connected to one of said other ports, and wherein each of said other ports is connected to one and only one of said other nodes.