Patent ID: 6617651
Filing Date: 2003-09-09
Classification: G11C,H01L

Abstract:
A semiconductor memory devicea semiconductor substrate; and memory cells formed on the semiconductor substrate via an insulating film, each of the memory cells being a unit for storing one bit data and each of the memory cells consisting of one full depletion type MISFET, wherein each of the memory cells comprises: a semiconductor layer formed on the insulating film; a source region formed in the semiconductor layer; a drain region formed apart from the source region in the semiconductor layer, the semiconductor layer between the source region and the drain region serving as a channel body in a floating state; a main gate formed on a first side of the channel body to form a channel in the channel body; and an auxiliary gate formed on a second side of the channel body, the second side being opposite to the first side, wherein the MISFET has a first data state in which the majority carriers are accumulated in a portion of the second side of the channel body and a second data state in which the majority carriers accumulated in the portion of the second side of the channel body are emitted.