Patent ID: 7164567
Filing Date: 2007-01-16
Classification: H01L

Abstract:
1. A device for electrostatic discharge (ESD) protection of a circuit, particularly a high frequency circuit, of a semiconductor device, wherein said device for ESD protection comprises a first and a second p-type junction field effect transistor (JFET) and a first and second n-type JFET transistor, wherein said first p-type JFET transistor is connected with its gate to a high voltage source, its source to an input/output pad of said semiconductor device, and its drain to the source of said first n-type JFET transistor, said second p-type JFET transistor is connected with its gate to said high voltage source, its source to the drain of said second n-type JFET transistor, and its drain to an input/output terminal of said circuit, said first n-type JFET transistor is connected with its gate to ground, and its drain to said input/output terminal of said circuit, and said second n-type JFET transistor is connected with its gate to ground, and its source to said input/output pad of said semiconductor device.