Patent ID: 6137267
Filing Date: 2000-10-24
Classification: H02J,H02M,Y02B

Abstract:
A computer system comprising:a central processing unit operable to execute a set of instructions when power is applied to the central processing unit;a battery circuit coupled to supply power to the central processing unit, the power being dissipated from battery cells in the battery circuit as the power is supplied to the central processing unit;a battery recharger unit coupled to the battery circuit, the battery recharger unit including a switching voltage regulator circuit, the switching voltage regulator circuit being operable to supply current and voltage to the rechargeable battery circuit, the rechargeable battery circuit being operable to determine a fault condition in the battery cells and when to utilize the current and voltage supplied by the switching voltage regulator to recharge the battery cells; anda limiting circuit coupled to the switching voltage regulator circuit and to the rechargeable battery circuit, the limiting circuit including a pulse width modulation comparator operable to generate a pulse width modulated signal, the limiting circuit being operable to gradually increase the amount of current supplied by the switching voltage regulator when the current is utilized to recharge the battery cells by supplying a ramp input to the pulse width modulation comparator.