Patent ID: 6828825
Filing Date: 2004-12-07
Classification: H03K

Abstract:
A system for facilitating logic level transitions of internal nodes of a level shifter, the system comprising:a level shifter having a first internal node and a second internal node; a monitor that monitors logic transitions of the first internal node and the second internal node associated with logic transitions of an input signal to the level shifter at a first voltage level range, the first internal node and the second internal node transitioning between opposing logic states at a second voltage level range based on a logic state of the input signal to provide a level shifted output signal at the second voltage level range having logic transitions corresponding to the logic transitions of the input signal; a first pull up device that pulls up the first internal node when the monitor detects a high to low edge transition on the second internal node; a second pull up device that pulls up the second internal node when the monitor detects a high to low edge transition on the first internal node; a control logic device that enables and disables the first pull up device and the second pull up device based on signals received from the monitor; and the control logic device and monitor comprising a first flip-flop coupled to the first pull up device, a second flip flop coupled to the second pull up device and a plurality of logic gates.