Patent ID: 8872329
Filing Date: 2014-10-28
Classification: H01L,H05K

Abstract:
1. An extended landing pad substrate package comprising: a dielectric layer having a first surface and an opposite second surface; a first circuit pattern embedded in the second surface of the dielectric layer, the first circuit pattern comprising traces and extended landing pads: the traces having a first thickness and the extended landing pads having a second thickness greater than the first thickness; a second circuit pattern completely in the dielectric layer and embedded in the first surface of the dielectric layer, wherein only the dielectric layer remains vertically between the traces of the first circuit pattern and the second circuit pattern; blind vias electrically connecting the first circuit pattern and the second circuit pattern, wherein the blind vias extend through the second circuit pattern, through the dielectric layer, and to the extended landing pads of the first circuit pattern; and interconnection balls in direct contact with the first circuit pattern.