Patent ID: 6828195
Filing Date: 2004-12-07
Classification: H01L

Abstract:
A method of manufacturing a trench transistor comprising:providing a semiconductor substrate having dopants of a first conductivity type; forming a plurality of trenches extending to a first depth into the semiconductor substrate; lining each of the plurality of trenches with a gate dielectric material; substantially filling each dielectric-lined trench with conductive material; forming a doped well in the substrate to a second depth that is less than said first depth of the plurality of trenches, the doped well having dopants of a second conductivity type opposite to said first conductivity type; forming a heavy body extending inside the doped well to a third depth that is less than said second depth of said doped well, the heavy body having dopants of the second conductivity type and forming an abrupt junction with the well; and forming a source region inside the well, the source region having dopants of the first conductivity types.