Patent ID: 8294517
Filing Date: 2012-10-23
Classification: H03F

Abstract:
1. An amplification circuit comprising: an input differential pair including a first transistor receiving a positive input voltage through a gate thereof and a second transistor receiving a negative input voltage through a gate thereof; a first resistor that generates a difference current corresponding to a difference voltage between the positive input voltage and the negative input voltage; an output differential pair including a third transistor supplying a negative output voltage from a drain thereof and a fourth transistor supplying a positive output voltage from a drain thereof; a second resistor connected to a reference voltage to receive the difference current generated by the first resistor; and a bias circuit that supplies a bias current to the first transistor, the second transistor, the third transistor, and the fourth transistor, wherein a source of the first transistor is connected to a source of the third transistor, a source of the second transistor is connected to a source of the fourth transistor, a drain of the first transistor is connected to a gate of the third transistor, and a drain of the second transistor is connected to a gate of the fourth transistor, and the first transistor, the second transistor, the third transistor, and the fourth transistor have the same polarity.