Patent ID: 8922472
Filing Date: 2014-12-30
Classification: G09G

Abstract:
1. A level shifter circuit, wherein a first transistor circuit configured of a first conductive type transistor and a second transistor circuit configured of a second conductive type transistor are connected serially between a first fixed power source and a second fixed power source, and a third transistor circuit configured of the first conductive type transistor and a fourth transistor circuit configured of the second conductive type transistor are connected serially between the first fixed power source and the second fixed power source; wherein a first input voltage is applied to an input terminal of the second transistor circuit and a second input voltage is applied to an input terminal of the fourth transistor circuit; wherein an input terminal of the first transistor circuit is connected to an output terminal of the third and the fourth transistor circuits, and an input terminal of the third transistor circuit is connected to an output terminal of the first and the second transistor circuits; wherein two transistor circuits of at least one side of two transistor circuits of a first fixed power source side and two transistor circuits of a second fixed power source side are configured of double gate transistors; and wherein the level shifter circuit has a switch element for applying a voltage of a third fixed power source to a common connection node of the double gate transistor of two transistor circuits of the power source side of the other side when two transistor circuits of the power source side of one side are in an operating state, and wherein the voltage of the third fixed sower source has a value between voltages of the first fixed power source and the second fixed power source.