Patent ID: 6800872
Filing Date: 2004-10-05
Classification: G02F,H01L

Abstract:
An active matrix substrate comprising:a plurality of crossing gate wirings and drain wirings formed on a transparent insulating substrate; a thin film transistor formed in each area surrounded by said gate wiring and said drain wiring, said thin film transistor including a gate electrode connected to said gate wiring, a gate insulating film formed on said gate electrode so as to have a width which is not more than that of said gate electrode, and a semiconductor film formed on said gate insulating film so as to have a width which is not more than that of said gate electrode; an insulation film for covering said gate insulating film and said semiconductor film; a drain electrode and a source electrode connected to said semiconductor film through a pair of openings formed to said insulation film; and a pixel electrode which is connected to said source electrode and formed on said insulation film, wherein a plurality of common wirings parallel to said gate wirings, are formed on said transparent insulating substrate simultaneously with said gate wirings, a common electrode connected to said common wiring is formed so as to have an electrode portion wired in parallel with said pixel electrode, and said common wirings include a pad electrode so as to be connected to said common electrode through a contact hole formed through said insulation film on said pad electrode.