Patent ID: 6519619
Filing Date: 2003-02-11
Classification: G06F

Abstract:
A circuit for digitally generating a series of encoded sampling values of a periodic function by virtue of ROM table conversion, comprising:(a) a function ROM in which an amplitude associated with one-fourth of a period of a periodic function is stored; and (b) an address counter which generates an address signal to be input into said function ROM, said address counter comprising: (b1) an accumulator; (b2) a first register which is externally controllable; (b3) an adder which adds an output transmitted from said accumulator to an output transmitted from said first register, and transmits the sum to said accumulator; (b4) an address-conversion circuit which receives a first output transmitted from said adder, and converts said first output into said address signal, said first output being a bit output other than a second uppermost bit output among bit outputs transmitted from said adder; (b5) a second register which stores therein an output transmitted from said address-conversion circuit; and (b6) a zero-cross flag control circuit which receives an uppermost bit output transmitted from said accumulator, and makes logic control, an output transmitted from said second register being input into said function ROM as said address signal, said function ROM having the (2P+1) number of address regions where P indicates the number of bits other than a second uppermost bit output among outputs transmitted from said adder, said series of encoded sampling values being defined as a sum of an output transmitted from said function ROM and an output transmitted from said zero-cross flag control circuit.