Patent ID: 6094060
Filing Date: 2000-07-25
Classification: G01R

Abstract:
A method of testing/stressing an IC device having a plurality of contacts on one face thereof arranged in a predetermined pattern, said testing being in a tester having a plurality of contact pads arranged in said predetermined pattern, comprising the steps of:providing an interposer,said interposer including a dielectric substrate and having a device contact face and a tester contact face,a first set of releasable connectors on said device contact face and extending therefrom arranged in said predetermined pattern, said connectors of said first set of releasable connectors being configured to penetrate the contacts on said IC device,a second set of releasable connectors on said tester contact face and extending therefrom arranged in said predetermined pattern, said connectors of said second set of releasable connectors being configured to penetrate the contact pads on the tester, andconducting vias connecting the corresponding connectors of said first and second set of releasable connectors;said tester havingelectrical leads extending to each of said contact pads for providing test and/or burn-in signals,interposing said interposer between said IC device and said tester with said first set of connectors penetrating the contacts on said IC device, and said connectors of said second set of connectors penetrating said contact pads on said tester,providing signals to said contact pads for performing testing and/or burn-in of the IC device; andmoving the IC device and tester out of contact with said interposer.