Patent ID: 8829571
Filing Date: 2014-09-09
Classification: H01L

Abstract:
1. A maximum-punch-through semiconductor device having at least a two-layer structure comprising: a collector metallization on a collector side; an emitter metallization on an emitter side, which lies opposite the collector side; a base layer of a first conductivity type arranged between the emitter metallization and the collector metallization, and having a predetermined doping concentration N a channel region of a second conductivity type arranged between the base layer and the emitter metallization; a buffer layer of the first conductivity type arranged between the base layer and the collector metallization, wherein the buffer layer has a thickness of between about 1 μm to about 3 μm and a peak doping concentration which is higher than a doping concentration of the base layer, a thickness W of the base layer being determined by: wherein a punch-through voltage V pt of the semiconductor device is between 70% and 99% of a break down voltage V bd of the semiconductor device, and wherein the thickness W is a minimum thickness of the base layer between a junction to the channel region and the buffer layer.