Patent ID: 8744379
Filing Date: 2014-06-03
Classification: G01R,H03F,H04B

Abstract:
1. A power detector circuit, comprising: a first section configured to receive a radio frequency (RF) input signal and to generate a first voltage, wherein the first voltage comprises a voltage proportional to the sum of a mean-square of the RF input signal and a voltage characteristic of the first section, and wherein the first voltage is an input to a third section; a second section configured to generate a second voltage, wherein the second voltage comprises a combination of an output voltage and a voltage proportional to the voltage characteristic of the first section, wherein the output voltage is proportional to a root-mean-square of the RF input signal; and the third section configured to generate the output voltage by combining the first voltage and the second voltage, wherein the second section creates a negative feedback loop for the third section and the output voltage generated by the third section is an output of the power detector circuit.