Patent ID: 6249559
Filing Date: 2001-06-19
Classification: H03C,H04L,H04N

Abstract:
A digital frequency phase locked loop (FPLL) for a vestigial sideband (VSB) transmission system having a voltage controlled oscillator (VCO) and a plurality of National Television System Committee (NTSC) carrier eliminating filters for eliminating interference of NTSC adjacent channels, comprising:first filtering means for eliminating high-frequency components by converting a digital signal output from one of the plurality of NTSC carrier eliminating filters;delaying means for delaying the high-frequency-component-eliminated signal by a predetermined width so that changes to its frequency-versus-phase characteristics are linear;symbol inverting means for inverting a symbol of a second digital signal output from another of the plurality of NTSC carrier eliminating filters;switching means for selectively outputting the symbol-inverted signal and the second digital signal output from another filter;second filtering means for limiting the selectively output signal to a predetermined frequency band;digital-to-analog (D/A) converting means for converting the frequency band-limited-digital signal into an analog signal; andwherein an FPLL process is processed digitally so that frequency-versus-phase characteristics are linear.