Patent ID: 6862634
Filing Date: 2005-03-01
Classification: H04L

Abstract:
1. In a multi-node computer system including a plurality of CPUs communicatively coupled to a plurality of switches, each switch communicatively coupled to at least one network interface controller (NIC), a method for routing a processor input/output (PIO) write reference from a CPU to a NIC connected to a switch that is local to the CPU, the method comprising: receiving the PIO write reference, the reference including data and address having a base field; comparing arm the base field of the address with a value of a NIC base register to determine whether the PIO write reference is made to the NIC; responsive to the address indicating a local NIC alias, generating a modified address, based on the address, the modified address including an address of a NIC local to a switch that is connected to the CPU that issued the PIO write reference; and routing the data to the modified address.