Patent ID: 6333871
Filing Date: 2001-12-25
Classification: G11C

Abstract:
A nonvolatile semiconductor memory device comprising:a plurality of memory cells, each of which stores data and each of which has a threshold voltage corresponding to said data;a plurality of word lines, each of which connects to part of said plurality of memory cells;a controller; anda data latch,wherein said controller controls a reprogram operation in which data stored in a portion of one sector are rewritten, in response to a command supplied thereto,wherein said reprogram operation includes steps of:1) selecting ones of said plurality of memory cells connected to one of said word lines,2) reading data to said data latch from memory cells selected in said step 1),3) fetching program data for storing to memory cells corresponding from a first address to a second address supplied from outside to said data latch,4) erasing data stored in said memory cells selected in said step 1), and5) programming said program data fetched in said data latch to said memory cells selected in said step 1).