Patent ID: 6683386
Filing Date: 2004-01-27
Classification: H01L

Abstract:
A low-profile photo-sensitive semiconductor device, comprising:a substrate having an opening formed through the substrate, a first surface, an opposing second surface, a plurality of conductive traces formed on the second surface, and a plurality of conductive vias formed through the substrate; each of the conductive traces being electrically connected to one of the conductive vias; a cover member mounted on the first surface of the substrate to cover an end of the opening of the substrate; a semiconductor chip attached to the cover member in a manner that the semiconductor chip is received within the opening of the substrate; a plurality of first conductive elements for electrically coupling the semiconductor chip to the substrate via the opening; a first encapsulant formed on the second surface of the substrate for encapsulating the conductive traces on the second surface of the substrate and leaving the opening of the substrate uncovered; a sealing member attached to the first encapsulant to seal the opening of the substrate, so as to hermetically separate the semiconductor chip and the first conductive elements from the atmosphere, wherein the first encapsulant and the sealing member form an exposed plane surface for the semiconductor device with respect to the second surface of the substrate; a plurality of second conductive elements coupled to the first surface of the substrate and electrically connected to the conductive vias of the substrate; and a second encapsulant formed on the first surface of the substrate for completely filling gaps such that no gaps exist between the cover member and the second conductive elements, and between second conductive elements adjacent to one another wherein an outer surface of the cover member and ends of the second conductive elements are exposed outside of the second encapsulant to be flush with a top surface of the second encapsulant to form an exposed plane surface for the semiconductor device with respect to the first surface of the substrate, such that the semiconductor device has with two opposing exposed plane surfaces respectively corresponding in position to the first and second surfaces of the substrate which form a flat appearance and with the substrate having side surfaces vertically interposed between the first and second surfaces thereof, with said side surfaces being exposed outside of the semiconductor device.