Patent ID: 6642108
Filing Date: 2003-11-04
Classification: B82Y,H01L

Abstract:
A method for fabricating a semiconductor non-volatile memory device comprising:forming a first layer on a silicon substrate that is selectively removable with respect to the silicon substrate; forming an isolation region surrounding the first layer; forming a second layer on the first layer comprising silicon and having a higher dopant concentration than the silicon substrate; forming a gate oxide layer on the second layer; forming a control gate on the gate oxide layer having two opposed ends in contact with the isolation region; etching the control gate, the gate oxide layer, the second layer, the first layer, and an upper part of the silicon substrate along two opposed sidewalls to form cavities; selectively etching the first layer to form a tunnel between the second layer and the silicon substrate; insulating the second layer by forming an insulating layer on the sidewalls of the second layer and in at least part of the tunnel; filling the cavities with silicon; and forming source and drain regions in the filled cavities on each side of the second etched layer to define a floating gate.