Patent ID: 7900168
Filing Date: 2011-03-01
Classification: G06F

Abstract:
1. An apparatus for automatically generating hardware description language (HDL) code, the apparatus comprising: a design environment configured to receive a hardware design for a hardware module, the hardware design including one or more numerical parameters; an interface configured to receive a designation of a first numerical parameter of one or more numerical parameters as a tunable numerical parameter, the tunable numerical parameter configured to allow value changes to the tunable numerical parameter during operation of the hardware module; and an HDL code generator configured to detect the designation of the first numerical parameter as a tunable numerical parameter and, in response, to instantiate a memory structure to store the first numerical parameter, to configure an interface of the module to receive a value of the first numerical parameter during operation of the hardware module, and to instantiate one or more structures internal to the module to utilize the first numerical parameter.