Patent ID: 7235879
Filing Date: 2007-06-26
Classification: H01L

Abstract:
1. An electronic device comprising: a semiconductor substrate in which an integrated circuit is formed; a first insulating layer formed on the semiconductor substrate and having a first surface; a second insulating layer formed on the first insulating layer and having a second surface which is higher than the first surface, the second insulating layer formed at a position closer to one end portion of the semiconductor substrate than all the other end portions of the semiconductor substrate; a first electrode formed on the first surface without electrical connection with any conductor on the second surface and electrically connected to the inside of the semiconductor substrate; a second electrode formed on the second surface and electrically connected to the inside of the semiconductor substrate; a support member which includes a first support surface and a second support surface lower than the first support surface; a first interconnecting pattern formed on the first support surface; and a second interconnecting pattern formed on the second support surface, wherein: the first electrode of the semiconductor device faces and is electrically connected to the first interconnecting pattern; and the second electrode of the semiconductor device faces and is electrically connected to the second interconnecting pattern, wherein: the support member includes first and second substrates which overlap each other to provide an overlapping region; the first support surface includes a surface of the first substrate opposite to the second substrate and within the overlapping region; and the second support surface includes a surface of the second substrate on the side of the first substrate and outside the overlapping region; and the first interconnection pattern and the first substrate stick out from a side of the second substrate.