Patent ID: 6091257
Filing Date: 2000-07-18
Classification: G01R

Abstract:
An apparatus for making and verifying electrical contact with the backside of a semiconductor wafer having a bulk portion covered with an insulating layer of oxide, said apparatus comprising:a contact probe;a wafer chuck having at least one probe vacuum groove and a probe aperture;a probe cylinder having a low pressure and a high pressure portion, said low pressure portion communicating with said probe vacuum groove and said probe aperture;a piston movably located between said low pressure and high pressure portions, said contact probe being attached to said piston and adapted to be protrudable from said probe aperture, wherein said groove, aperture and low pressure portion are adapted to form a low pressure chamber with said wafer whereby said probe is urgeable to pierce said oxide and make electrical contact with the bulk portion of said wafer;a time-varying voltage source connectable between said chuck and said probe; anda current measuring device for measuring a current between said chuck and said probe, said probe being in electrical contact with said wafer if said current corresponds at least to a capacitive coupling between said chuck and said wafer.