Patent ID: 9190009
Filing Date: 2015-11-17
Classification: G09G

Abstract:
1. A data driving circuit of a liquid crystal display (LCD) panel, comprising: a data driving chip; and at least two isolation driving units; wherein the data driving chip comprises a plurality of data driving units that drive data lines of the LCD panel, and the data driving unit comprises a port that limits a range of a working voltage of the data driving unit; each the isolation driving unit outputs a preset reference voltage to the port of the data driving unit; wherein a driving unit comprises two adjacent data driving units, each of the driving units comprises a first data driving unit having a positive polarity and a second data driving unit having a negative polarity; each of the driving units corresponds to one isolation driving unit, and an output end of each of the isolation driving units is coupled to the first port of the first data driving unit and the second port of the second data driving unit; the data driving circuit of the LCD panel further comprises a first reference voltage, a second reference voltage, and a third reference voltage; a value of the first reference voltage, a value of the second reference voltage, and a value of the third reference voltage successively increase; the value of the second reference voltage is equal to an average value of a sum of the first reference voltage and the third reference voltage; the preset reference voltage output by the isolation driving unit is the second reference voltage, and the first reference voltage is voltage of a around end of the data driving circuit of the LCD panel; the first data driving unit comprises a first simulation buffer amplifier, and the second data driving unit comprises a second simulation buffer amplifier; output ends of the first simulation buffer amplifier and the second simulation buffer amplifier are coupled to a switching unit, and the simulation buffer amplifier is coupled to two adjacent data lines through the switching unit; a driving signal of the data line is sent to first input ends of the first simulation buffer amplifier and the second simulation buffer amplifier, a second input end of the first simulation buffer amplifier is coupled to an output end of the first simulation buffer amplifier, and a second input end of the second simulation buffer amplifier is coupled to an output end of the second simulation buffer amplifier; the isolation driving unit comprises a third simulation buffer amplifier, an output end of the third simulation buffer amplifier is coupled to a second port of the first simulation buffer amplifier and a first port of the second simulation buffer amplifier; the second reference voltage is input to a first input end of the third simulation buffer amplifier, and a second input end of the third simulation buffer amplifier is coupled to the output end of the third simulation buffer amplifier.