Patent ID: 9160412
Filing Date: 2015-10-13
Classification: H04B,H04L

Abstract:
1. A multi-bit isolation system, comprising: a plurality of isolation channels, each to transmit a respective signal in parallel across a galvanic isolation barrier; a transmitter circuit, provided on a first side of the galvanic isolation barrier and having outputs coupled to the respective isolation channels, the transmitter circuit receives a multi-bit input signal and provides a multi-symbol output signal to the outputs in parallel representing the input signal, one symbol to each output, and each symbol having one of at least three possible states; and a receiver circuit provided on a second side of the galvanic isolation barrier and having inputs coupled to the isolation channels, the receiver circuit decoding the received multi-symbol output signal and providing a reconstructed multi-bit input signal, wherein the receiver interprets a non-active state over an isolation channel as a symbol of the received multi-symbol output signal only by examining, while the non-active state is present over the isolation channel, a state of at least one other parallel isolation channel to determine if the at least one other parallel isolation channel is switching actively during the parallel transmission, wherein the receiver circuit interprets the non-active state over an isolation channel as an idle channel bearing no symbol if every other parallel isolation channel is non-active while the non-active state is present over the isolation channel.