Patent ID: 6476586
Filing Date: 2002-11-05
Classification: E05B

Abstract:
A microcomputer having a capacitor control circuit for memorizing information, comprising:a main control unit; a capacitor charging control circuit connected to, and controlled by the main control unit; a capacitor connected to, and charged and discharged by the capacitor control circuit; and a capacitor voltage determining circuit having an input terminal connected the capacitor and an output terminal connected to the main control unit, wherein: the capacitor charging control circuit has: a charge control circuit connected to the capacitor, for charging the capacitor based on a charge signal applied by the main control unit; and a discharge control circuit connected to the capacitor for discharging the capacitor based on a discharge signal applied thereto, wherein: at least the discharge control circuit is composed of a totem pole structure having a high side n-channel type MOSFET and a low side n-channel type MOSFET, drain terminals of the high side n-channel type MOSFET and low side n-channel type MOSFET are electrically connected to the capacitor at a common connection.