Patent ID: 6379977
Filing Date: 2002-04-30
Classification: H01L

Abstract:
A method of manufacturing a ferroelectric memory device, comprising the steps of:forming on a semiconductor substrate in sequence, a first intermediate insulating layer, a titanium layer and a first platinum layer, the total thickness of the titanium and the first platinum layers being between 100-300 Ã¥; treating by a rapid thermal process the substrate and sequential layers tinder an oxygen atmosphere at a temperature between 600-800Â° C. for about one minute causing said titanium (Ti) layer and said first platinum (Pt) layer to interdiffuse while simultaneously oxidizing the titanium (Ti), thereby forming a titanium oxide layer containing platinum (Pt); forming a second platinum layer for a lower electrode, a ferroelectric thin flim and a third platinum layer for an upper electrode on the titanium oxide layer continuing platinum; etching the third platinum layer to form the upper electrode; and etching the ferroelectric thin film, the second platinum layer and the titanium oxide layer containing platinum to form a capacitor.