Patent ID: 7750668
Filing Date: 2010-07-06
Classification: G06F,G11C,H01L,H03K

Abstract:
1. A single-chip microprocessor comprising: a central processing unit; a first circuit block including a first co-processor whose executing operation is controlled by the central processing unit and a first switch circuit which has a plurality of first MOS transistors; and a second circuit block including a second co-processor whose executing operation is controlled by the central processing unit and a second switch circuit which has a plurality of second MOS transistors, wherein a power consumption of the first co-processor in a first state of the first co-processor is reduced than a power consumption of the first co-processor in a second state of the first co-processor by turning off the plurality of first MOS transistors, the first co-processor executing calculations in the second state of the first co-processor, wherein a power consumption of the second co-processor in a first state of the second co-processor is reduced than a power consumption of the second co-processor in a second state of the second co-processor by turning off the plurality of second MOS transistors, the second co-processor executing calculations in the second state of the second co-processor, and wherein the plurality of first MOS transistors are controlled independently from the plurality of second MOS transistors.