Patent ID: 6498753
Filing Date: 2002-12-24
Classification: G11C,Y10S

Abstract:
A semiconductor storage device production method for producing a semiconductor storage device comprising a group of memory cells arranged in a two-dimensional state on a semiconductor substrate, wherein a binary data write is performed by pouring electric charge into each of the memory cells of the group until a cell threshold value reaches a predetermined write reference while a binary data erase is performed by uniformly discharging the electric charge from the memory cells until all the cell threshold values become below a predetermined erase reference and those memory cells subjected to the data erase and having cell threshold values below a lower limit are supplied with an electric charge,the device being characterized in that when a production error occurs in such a way that an erase speed of memory cells in a predetermined position of the group differs from an ideal value, the device is formed with a configuration to correct the erase speed of the memory cells in the predetermined position.