Patent ID: 7642642
Filing Date: 2010-01-05
Classification: H01L

Abstract:
1. A hermetically sealed integrated circuit package, comprising: an integrated circuit comprising a substrate having an upper surface, a perimeter being disposed upon the upper surface and defining a hermetically sealed portion therewithin, at least one circuit element being disposed within the hermetically sealed portion; a hermetic cap comprising a top member and a gasket, the cap being configured to cover the hermetically sealed portion and form a hermetically sealed cavity thereover, the gasket comprising opposing first inner and first outer vertical sidewalls depending downwardly from the cap, the sidewalls terminating in and being separated by a bottom edge; a bonding agent disposed between and engaging the substrate and the bottom edge to form a hermetic seal between the cap and the substrate and thereby hermetically seal the cavity, the bonding agent further comprising opposing second inner and second outer sidewalls disposed between the substrate and the gasket, the second inner sidewall being located within the hermetically sealed porton, the second outer sidewall being located outside the hermetically sealed portion, and a caulking agent disposed along and engaging the first inner and outer vertical sidewalls and the second inner sidewall and the second outer sidewall such that the caulking agent extends between and covers substantially all of and is directly in contact with the first inner and outer vertical sidewalls and the second inner sidewall and the second outer sidewall, the caulking agent extending between the substrate and the top member and being configured to seal the cavity and improve the hermeticity of the hermetic seal formed by the bonding agent.