Patent ID: 7222325
Filing Date: 2007-05-22
Classification: G01R

Abstract:
1. A process for use in a manufacturing of application specific integrated circuits comprising the steps of: providing a semi-fabricated semiconductor wafer that lacks a metal one layer and on which has been formed a plurality of circuits that comprise a logic design and at least one programmable circuit capable of performing at least one of a plurality of logic transfer functions upon programming; determining modifications to the logic design that are desired by examining an original specimen of the application specific integrated circuit with a metal one layer; determining desired changes in the metal one layer needed to implement the modifications in the logic design, including connecting the at least one programmable circuit to the plurality of circuits; and forming a metal one layer on said semi-fabricated semiconductor wafer in the same location as the metal one layer of the original specimen but having a configuration different from the metal one layer of the original specimen to effect the desired changes.