Patent ID: 6913814
Filing Date: 2005-07-05
Classification: H01L,H05K,Y10S,Y10T

Abstract:
1. A lamination multilayer substrate, at least comprising: a plurality of laminating layers stacked and laminated together, wherein each said laminating layer has a dielectric layer with a first side and a second side, a patterned conductive layer positioned at the first side, and a plurality of conductive vias with a first ends and second ends positioned within the dielectric layer, wherein the first ends of the conductive vias electrically connect with the patterned conductive layer and the second ends of the first vias electrically connect with an adjacent said laminating layer and a barrier metal layer between said first vias and said patterned conductive layer, wherein said barrier metal layer is a stop layer between said first vias and said patterned conductive layer; and a bottom layer stacked and laminated with the plurality of laminating layers and disposed at a bottom side of the multilayer substrate, wherein said bottom layer has a second dielectric layer and a plurality of conductive vias penetrating the second dielectric layer and electrically connecting with the plurality of laminating layers, wherein said first dielectric layers and said second dielectric layer are bonded together.