Patent ID: 8203889
Filing Date: 2012-06-19
Classification: G11C

Abstract:
1. A semiconductor memory device comprising: a memory cell configured to store data by n (n: natural number more than 2) threshold voltage; a voltage supply circuit configured to supply a predetermined voltage to a gate of the memory cell in a verify operation of verifying whether or not the memory cell reaches a predetermined threshold voltage; a detection circuit, in a verify operation which verifies whether a threshold voltage of the memory cell has reached to a predetermined threshold voltage, configured to charge one terminal of the memory cell to a predetermined potential, to supply a predetermined voltage to a gate electrode of the memory cell, to detect a voltage of one terminal of the memory cell based on a first detection level, and to detect a voltage of one terminal of the memory cell based on a second detection level during supplying the predetermined voltage to the gate electrode of the memory cell after saving a detection result based of the first detection level; and a control circuit, in next write operation, configured to carry out a first operation which increases the threshold voltage of the memory cell whose threshold level has not reached to the first detection level, to carry out a second operation which increases the threshold voltage of the memory cell whose threshold voltage has not reached to the second detection level, and not to carry out the first and second operations to the memory cell whose threshold level has reached to the first and second detection levels, wherein the second operation has a change of the threshold voltage less than the first operation.