Patent ID: 6537896
Filing Date: 2003-03-25
Classification: H01L

Abstract:
A process for forming, as a part of an integrated circuit structure on a substrate, a non-porous dielectric diffusion barrier layer on etched via and trench sidewall surfaces in a layer of porous low k dielectric material formed by reacting methyl silane (CH3SH3) with hydrogen peroxide (H2O2), said process comprising the steps of:a) exposing such etched surfaces of porous low k dielectric material to a plasma: i) formed from one or more gases selected from the group consisting of O2; H2; Ar; He; SiH4; NH3; N2; CHxFy, where x=1-3 and y=4-y; H2O; and mixtures of same; and ii) using both a 13.56 MHz power supply and a 600-800 Hz low frequency power supply, wherein at least one of said power supplies is coupled to a substrate support on which said substrate is mounted using said process; and b) maintaining said exposure for a period of time sufficient to form from about 1-20 nanometers (nm) of said non-porous dielectric diffusion barrier layer on said etched surfaces of said porous low k dielectric material; wherein said non-porous dielectric diffusion barrier layer on said etched surfaces of said porous low k dielectric material prevents adsorption of moisture and other process gases into said layer of porous low k dielectric material, and prevents degassing from said porous low k dielectric material during subsequent processing.