Patent ID: 6813723
Filing Date: 2004-11-02
Classification: G06F,H03K,H04L

Abstract:
A method of compensating for a delay between clock signals, the method comprising the steps of:(1) searching for two flipflops having different clock signals applied thereto, respectively; (2) calculating the delay between a forward flipflop and a backward flipflop; (3) calculating a value obtained by subtracting a delay of the clock signal provided to the backward flipflop from a delay of the clock signal provided to the forward flipflop; (4) subtracting the value obtained by subtracting a delay of the clock signal provided to the backward flipflop from a delay of the clock signal provided to the forward flipflop from the delay between the forward flipflop and the backward flipflop, to calculate a resultant; (5) determining a number of delays to be added, if the resultant is greater than a desired value; and, (6) adding kinds of the delays to be added between the two flipflops to a netlist.