Patent ID: 6528735
Filing Date: 2003-03-04
Classification: H01L,H05K

Abstract:
A substrate adapted to connect to a menu of same-sized semiconductor chips having the same number and location of chip input/output connections but a differing number of used input/output connections, said substrate comprising:a top layer; a plurality of upper redistribution layers; at least one customized lower redistribution layer; a bottom layer; and wires running from said top layer through said plurality of upper redistribution layers which wire out all used and unused input/output connections for said menu of same-sized chips thereby forming a generic substrate design, wherein said wires are generic to all said menu of same-sized semiconductor chips, and customization of said substrate for a specific semiconductor chip is performed by altering said at least one customized lower redistribution layer to prevent selected ones of said wires from connecting said top layer to said bottom layer.