Patent ID: 6355547
Filing Date: 2002-03-12
Classification: H01L

Abstract:
A method of forming a semiconductor device on a substrate, comprising:forming a plurality of gate structures on the substrate, the gate structures having a laterally recessed region on sidewalls of the plurality of gate structures; conformally forming a first insulating layer over the gate structures, the first insulating layer having a laterally recessed region over the laterally recessed region of the gate structures; flattening the first insulating layer over the laterally recessed region of the gate structures; forming a second insulating layer over the flattened first insulating layer to fill spaces between the gate structures; removing a portion of second insulating layer between the gate structures, thereby forming a plurality of contact holes between the gate structures and exposing a portion of the first insulating layer; etching the exposed portion of the first insulating layer, thereby forming a gate spacer on sidewalls of the gate structures and exposing surfaces of active regions of the substrate; filling the plurality of contact holes with a first conductive layer; and planarizing the first conductive layer, thereby forming contact pads.