Patent ID: 6052374
Filing Date: 2000-04-18
Classification: H04L,H04Q

Abstract:
An ATM cell interface for dispatching ATM cells, each ATM cell having a header with a VPI field having a value and a VCI field having a value, comprising:L input ports to which ATM cells enter the interface, where L is greater than or equal to 1 and is an integer;q output ports through which ATM cells exit the interface, where q is greater than or equal to 1 and is an integer;a memory mechanism having serial access memory management and having a first table for accessing VPI associated information of the cell, a second table for accessing VCI associated information of the cell, and a third table for accessing connection information for the cell; anda mechanism for directing the ATM cells from an input port of the L input ports to any desired destination through at least one output port of the q output ports, said directing mechanism having entries which identify desired destinations for a corresponding ATM cell, said entries for the corresponding ATM cell distributed from each other with at least one of said entries for the corresponding ATM cell separate and apart from all other of said entries for the corresponding ATM cell, said entries stored in the memory mechanism, the number of possible entries in the directing mechanism being less then a total number of entries supported by the ATM cell header, the directing mechanism produces a first signal based on the value of the VPI field from the first table, a second signal based on the value of the VCI field from the second table and the first signal, and a third signal based on the value of the second signal and the connection information from the third table which is used to route each of the ATM cells from an input port to a desired output port.