Patent ID: 6289496
Filing Date: 2001-09-11
Classification: G06F,H03K

Abstract:
A method for placement of input, output, and bidirectional design objects into IOBs of a programmable gate array, the IOBs of the programmable gate array arranged in a plurality of banks programmable to send and receive signals at a plurality of input and output voltage standards and wherein the design objects specify at least one input voltage standard or at least one output voltage standard, comprising:selecting respective ones of the banks for the different input voltage standards;selecting respective ones of the banks for the different output voltage standards;placing input design objects into respective IOBs of banks to minimize penalty cost of the placement, wherein the input voltage standard of the input design object is compatible with the input voltage standard of the bank in which the respective IOB is located; andplacing output design objects into respective IOBs of banks to minimize penalty cost of the placement, wherein the output voltage standard of the output design object is compatible with the output voltage standard of the bank in which the respective IOB is located.