Patent ID: 6114720
Filing Date: 2000-09-05
Classification: H01L

Abstract:
A capacitor construction comprising:a pair of electrically conductive lines having respective electrically insulated outermost surfaces;a pair of sidewall spacers laterally outward of each of the pair of conductive lines;respective recesses over the pair of conductive lines relative to and spanning between the sidewall spacers;a node between the pair of conductive lines, one sidewall spacer of each pair of sidewall spacers being closer to the node than the other sidewall spacer of each pair;an electrically conductive first capacitor plate layer over the node, the one sidewall spacers but not the other sidewall spacers, and within less than the entirety of the respective recesses, the electrically conductive first capacitor plate layer having respective bottommost surfaces which define the entire bottommost surfaces of material of the electrically conductive first capacitor plate layer which is disposed within the respective recesses, an entirety of one of the bottommost surfaces being generally planar; anda capacitor dielectric layer and a second capacitor plate layer over the first capacitor plate layer.