Patent ID: 6211713
Filing Date: 2001-04-03
Classification: H03K

Abstract:
A latch circuit having pn adjustable internal feedback level at a feedback node, said latch circuit comprising:a feedforward inverter having an input connected to said feedback node;a steady state feedback tri-state inverter having an input connected to an output of said feedforward inverter and an output connected to said feedback node, wherein said feedback tri-state inverter receives a clock signal as its control input; anda supplementary tri-state inverter cross-coupled with said feedforward inverter such that an output of said tri-state inverter is connected to said feedback node, wherein said supplementary tri-state inverter receives a feedback control signal as its control input for enabling or disabling said supplementary tri-state inverter such that said internal feedback level at said feedback node is adjusted in accordance with both said clock signal and said feedback control signal.