Patent ID: 8569181
Filing Date: 2013-10-29
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor apparatus comprising: first forming including forming a first conducting layer on a side of a main surface on which an electrode terminal of a semiconductor device is provided in a semiconductor substrate, the first conducting layer being electrically connected to the electrode terminal of the semiconductor device; second forming including forming a mask layer that has an opening at a predetermined position on the first conducting layer; third forming including forming a second conducting layer inside the opening of the mask layer; removing, after the third forming, the mask layer that has the opening at a predetermined position; fourth forming including forming a relocation wiring that includes the first conducting layer and electrically draws out the electrode terminal by performing anisotropic etching for the first conducting layer using the second conducting layer as a mask; and fifth forming including forming a bump on the relocation wiring by causing the second conducting layer to reflow, wherein the third forming includes forming a third conducting layer inside the opening of the mask layer by plating and then forming the second conducting layer above the third conducting layer, wherein after the mask layer is removed in the removing, the fourth forming includes forming the relocation wiring that includes the first conducting layer and the third conducting layer by performing the anisotropic etching for the first conducting layer, and wherein the film thickness of the third conducting layer is thicker than the film thickness of the first conducting layer.