Patent ID: 6498072
Filing Date: 2002-12-24
Classification: H01L

Abstract:
A process for producing a semiconductor device comprising plural element forming regions having different element region widths W and element isolating regions between said element forming regions, said process comprising:forming trenches on a semiconductor substrate having thereon a first dielectric film for forming said element isolating regions; accumulating a second dielectric film having a thickness t on said semiconductor substrate to fill in said trenches; determining whether to remove part of said second dielectric film on said element forming regions based at least in part on whether the element forming regions have an element region width W satisfying the following equation: W&gE;2t/tan &thgr;wherein &thgr; represents an accumulation angle of said second dielectric film on said element forming region, and thereby (a) removing only part of said second dielectric film on each element forming region satisfying said equation so as to leave a significant part of the dielectric film on said element forming regions satisfying said equation, and (b) not removing said second dielectric film on element forming regions not satisfying said equation; wherein in said removing a total volume of said second dielectric film that is removed is equal to a total volume of said second dielectric film that is not removed; and polishing said second dielectric film by a CMP process.