Patent ID: 6093620
Filing Date: 2000-07-25
Classification: H01L,Y10S

Abstract:
The method of forming a plurality of electrically isolated pockets of semiconductor material in a semiconductor structure comprising a silicon substrate of one conductivity type with an epitaxial silicon layer of opposite conductivity type thereon, which comprises the steps of:forming a low resistivity region of said opposite conductivity type in said substrate;growing a doped epitaxial silicon layer on said silicon substrate, said doped epitaxial silicon layer having a conductivity type relative to the conductivity type of at least a portion of the top surface of said substrate such that a laterally-extending PN junction is formed in at least part of said semiconductor structure, said low resistivity region being situated directly beneath the surface of said substrate on which said epitaxial layer is formed;forming a layer of insulation on said epitaxial silicon layer, said insulation having the properties that it is substantially unaffected by at least one etchant used to remove epitaxial silicon and substantially masks the diffusion of oxygen;removing portions of said insulation overlying regions of said epitaxial silicon layer to be converted into oxidized silicon;forming depressions to a specified depth in said epitaxial silicon exposed by removal of said insulation by removing part of said epitaxial silicon exposed by removal of said insulation;subdividing said epitaxial silicon layer into a plurality of electrically isolated pockets of semiconductor material by oxidizing the silicon exposed by said depressions to form oxidized silicon extending through said epitaxial silicon layer to said PN junction, the depth and shape of said depressions being selected such that the oxidized silicon has an upper surface substantially coplanar with the top surface of said epitaxial silicon layer and a bottom surface which extends through said epitaxial silicon layer to said PN junction, thereby both to surround each pocket by an annular-shaped region of oxidized silicon and to electrically isolate each pocket by an annular-shaped region of oxidized silicon and a portion of said laterally-extending PN junction said low resistivity region forming at least part of one electrically isolated pocket of semiconductor material;removing said layer of insulation after the epitaxial silicon exposed by said depressions is oxidized through to said PN junction;introducing an impurity of said opposite conductivity type into a selected region of epitaxial silicon of said opposite conductivity type the lateral extent of which is defined by a particular annular-shaped region of oxidized silicon, a portion of said particular annular-shaped region of oxidized silicon extending through said epitaxial layer to contact said low resistivity region;masking the surface of said epitaxial silicon layer to leave exposed the surface of another region of epitaxial silicon above said low resistivity region in said silicon substrate, said another region of epitaxial silicon being surrounded by another particular annular-shaped region of oxidized silicon, a portion of said another particular annular-shaped region of oxidized silicon extending through said epitaxial layer to contact said low resistivity region; andintroducing an impurity of said one conductivity type into said another region of epitaxial silicon to a selected depth less than the thickness of said epitaxial layer.