Patent ID: 8138049
Filing Date: 2012-03-20
Classification: H01L

Abstract:
1. A method of fabricating a lateral double-diffused metal oxide semiconductor (LDMOS) transistor having a source region, a drain region, and a gate region on a substrate, the method comprising: a) implanting p-type dopants into a surface of said substrate to form a p-type buried layer (PBL) region, and implanting n-type dopants into said surface of said substrate to form an n-type buried layer (NBL) region; b) growing an n-type epitaxial (N-EPI) layer on said NBL and PBL regions; c) implanting p-type dopants into said surface of said substrate to form a p-doped deep p-well (DPW) region on said PBL region; d) forming a well region in said N-EPI layer; e) implanting dopants into said source region to form a doped body region; f) after said doped body region formation, forming an active area and a field oxide (FOX) region for isolation of said LDMOS transistor, said FOX region covering said DPW region, and forming a drain oxide between said source region and said drain region of said LDMOS transistor; g) after said doped body region formation, forming a gate oxide adjacent to said source and drain regions, and forming a gate by covering said gate oxide and a portion of said drain oxide with a conductive material; and h) implanting dopants into said drain and source regions to form a doped drain region, and first and second doped source regions.