Patent ID: 6836839
Filing Date: 2004-12-28
Classification: G06F,Y02D

Abstract:
An adaptive computing integrated circuit, comprising:a first plurality of heterogeneous computational elements, a first computational element of the first plurality of heterogeneous computational elements having a first fixed architecture and a second computational element of the first plurality of heterogeneous computational elements having a second fixed architecture; a first interconnection network coupled to the first plurality of heterogeneous computational elements, the first interconnection network capable of configuring the plurality of heterogeneous computational elements for a first functional mode of a plurality of functional modes in response to first configuration information, and the first interconnection network further capable of reconfiguring the first plurality of heterogeneous computational elements for a second functional mode of the plurality of functional modes in response to second configuration information; a second plurality of heterogeneous computational elements, the second plurality of heterogeneous computational elements having a different set of computational elements than the first plurality of heterogeneous computational elements, a third computational element of the second plurality of heterogeneous computational elements having a third fixed architecture and a fourth computational element of the second plurality of heterogeneous computational elements having a fourth fixed architecture, wherein the first, second, third and fourth fixed architectures are each different fixed architectures; a second interconnection network coupled to the second plurality of heterogeneous computational elements, the second interconnection network capable, independently from the configuration and reconfiguration of the first plurality of heterogeneous computational elements by the first interconnection network, of configuring the second plurality of heterogeneous computational elements for a third functional mode of the plurality of functional modes in response to third configuration information, and of reconfiguring the second plurality of heterogeneous computational elements for a fourth functional mode of the plurality of functional modes in response to fourth configuration information, wherein the first, second, third and fourth functional modes are each different functional modes; and a third interconnection network coupled to the first plurality of heterogeneous computational elements and to the second plurality of heterogeneous computational elements, the third interconnection network capable of selectively routing data and control information to and from the first and second pluralities of heterogeneous computational elements.