Patent ID: 8924912
Filing Date: 2014-12-30
Classification: G06F

Abstract:
1. A computer-implemented method for recording a trace of call frames during a simulation of a circuit design with a testbench, wherein the testbench comprises a plurality of subroutines, wherein each subroutine of the plurality of subroutines comprises a code section, the method comprising: for each subroutine of the plurality of subroutines, receiving, at one or more computer systems, a first call-back routine which is called before the code section of the subroutine is executed; starting, with one or more processors associated with the one or more computer systems, the simulation of the circuit design with the testbench; for each subroutine of the plurality of subroutines, recording, with the one or more processors associated with the one or more computer systems, a first simulation time at which a corresponding first call-back routine of the subroutine is executed, a first tag indicating a beginning of the subroutine, and a first subroutine identifier (ID) to identify the subroutine in a beginning call frame when the corresponding first call-back routine is called, and forming, with the one or more processors associated with the one or more computer systems, the trace of call frames according to an order of the call-back routines that are called one by one during an execution of the testbench at their respective simulation times.