Patent ID: 8445345
Filing Date: 2013-05-21
Classification: H01L

Abstract:
1. A method of forming a complementary metal oxide semiconductor (CMOS) structure having multiple voltage threshold transistor devices, the method comprising: forming a first transistor device and a second transistor device on a semiconductor substrate, the first transistor device and second transistor device initially having sacrificial dummy gate structures; and removing the sacrificial dummy gate structures and selectively forming a set of vertical oxide spacers for the first transistor device, the set of vertical oxide spacers being in direct contact with a high-k gate dielectric layer of the first transistor device such that the set of vertical oxide spacers provides a source of diffused oxygen atoms to the high-k gate dielectric layer so as to result in the first transistor device having a shifted voltage threshold with respect to the second transistor device; wherein the selectively forming a set of vertical oxide spacers for the first transistor device further comprises depositing a conformal oxide layer over the first transistor device and the second transistor device, removing all horizontal portions of the conformal oxide layer, and removing a set of vertical oxide spacers for the second transistor device.