Patent ID: 6040621
Filing Date: 2000-03-21
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor chip having a first surface, a second surface and plural bonding pads on said first surface;a wiring body including a plate-shaped insulating supporting substrate and plural lines supported by said insulating supporting substrate, said wiring body being mounted on said first surface of said semiconductor chip;a bonding member for electrically connecting said bonding pads of said semiconductor chip with a part of each of said plural lines of said wiring body; andplural leads connected with another part of each of said plural lines of said wiring body,wherein said plural lines include a signal line, a power line and a ground line,said plural leads include a signal lead, a power lead and a ground lead, andsaid signal line is electrically connected with said signal lead, said power line is electrically connected with said power lead, and said ground line is electrically connected with said ground lead.