Patent ID: 6781428
Filing Date: 2004-08-24
Classification: H03K

Abstract:
A circuit, comprising:a comparator circuit having a first input node coupleable to receive an input signal and having a second input node coupleable to receive a reference signal, the comparator circuit to generate an output signal having a level that is dependent on the input signal and the reference signal; a first reference generator to generate a first signal; a second reference generator to generate a second signal; and a multiplexer having a control lead, a first input lead, a second input lead, and an output lead, the control lead coupled to receive the output signal, the first and second input leads coupled to the first and second reference generators, and the output lead of the multiplexer coupled to the second input node of the comparator circuit, wherein the multiplexer to output the reference signal, wherein the multiplexer comprises a reduced-swing inverter.