Patent ID: 6762487
Filing Date: 2004-07-13
Classification: H01L

Abstract:
A chip stack of a preformed support structure vertically interconnecting a first chip to a second chip with a third chip interposed therebetween wherein the support structure comprises:a housing having a first and second face and defining an opening and a periphery wherein a plurality of conductor cavities are disposed about the periphery of the housing and extend between the first face and the second face of the housing; and a plurality of conductive elements positioned within the conductor cavities such that a portion of each conductive element extends slightly beyond the first and second faces of the housing so as to interconnect the first and second chips and is substantially uniform in cross-sectional area along a vertical extent between the first and second chips and such that each of the conductive element extends substantially flush with the edges of the conductor cavities on the first and second faces of the housing so as to substantially fill the corresponding conductor cavity.