Patent ID: 7387940
Filing Date: 2008-06-17
Classification: H01L

Abstract:
1. A method of forming trench isolation in the fabrication of integrated circuitry, comprising: forming first and second isolation trenches into semiconductive material of a semiconductor substrate, the first isolation trench having a narrowest cross sectional dimension which is less than that of the second isolation trench; depositing an insulative layer to within the first and second isolation trenches effective to fill remaining volume of the first isolation trench within the semiconductive material but not that of the second isolation trench within the semiconductive material, the insulative layer comprising silicon dioxide deposited from flowing TEOS to the first and second isolation trenches; and depositing a spin-on-glass over the silicon dioxide deposited from flowing the TEOS within the second isolation trench within the semiconductive material, but not within the first isolation trench within the semiconductive material; the spin-on-glass being deposited effective to fill remaining volume of the second isolation trench within the semiconductive material.