Patent ID: 7605789
Filing Date: 2009-10-20
Classification: G09G,H01L,H03K

Abstract:
1. A transistor circuit having a plurality of thin-film transistors formed on a substrate and wiring adapted to connect to a gate, a source, and/or a drain of each of the thin-film transistors, so as to perform a predetermined operation, the transistor circuit comprising: at least one thin-film transistor applied with a forward bias between a gate and a source repeatedly and/or continuously via wiring during the operation, reverse-bias-application means configured to suppress a variation in a threshold voltage of the thin-film transistor by applying a reverse bias between the gate and source of the thin-film transistor in such timing that the operation is not disturbed, and an additional thin-film transistor connected in parallel to the thin-film transistor and complement means which drives the additional thin-film transistor relative to the thin-film transistor, so as to generate timing where the operation is not disturbed, wherein the reverse-bias-application means applies the reverse bias to the thin-film transistor in the generated timing.