Patent ID: 9040399
Filing Date: 2015-05-26
Classification: H01L

Abstract:
1. A method to fabricate transistor devices, comprising: providing a Silicon layer having a layer of screen oxide formed on a top surface; applying a first masking layer so as to leave uncovered a first portion of the screen oxide layer; implanting Carbon into the Silicon layer through the uncovered first portion of the screen oxide layer to form a first Carbon-implanted volume of the Silicon layer that has a first Carbon concentration; removing the first masking layer; applying a second masking layer so as to leave uncovered a second portion of the screen oxide layer; implanting Carbon into the Silicon layer through the uncovered second portion of the screen oxide layer to form a second Carbon-implanted volume of the Silicon layer that has a second Carbon concentration that differs from the first Carbon concentration; removing the second masking layer; and processing the Silicon layer so as to form a first FinFET device having a channel that contains the first volume of the Silicon layer and a second FinFET device having a channel that contains the second volume of the Silicon layer, where the first FinFET device has a first voltage threshold and the second FinFET device has a second voltage threshold that differs from the first voltage threshold by an amount related to a difference between the first Carbon concentration and the second Carbon concentration, where each step of implanting comprises use of at least two Carbon implant operations each carried out using a different implant energy such that the concentration of Carbon is made substantially uniform throughout the thickness of the layer of Silicon within the implanted volume; and where each of the first and the second Carbon concentrations is in a range of about 2×10