Patent ID: 6049659
Filing Date: 2000-04-11
Classification: G06F

Abstract:
A method for automatically designing a layout for a semiconductor integrated circuit from circuit data stored in a storage unit, said method comprising the steps of:(a) reading circuit data about a core component necessary for said semiconductor integrated circuit, and circuit data about a peripheral component necessary for said semiconductor integrated circuit;(b) receiving circuit information about an entire geometric form of said semiconductor integrated circuit and a placement of circuit blocks of said semiconductor integrated circuit;(c) modifying said peripheral component circuit data according to said circuit information;(d) generating, from said modified peripheral component circuit data, layout data about said peripheral component of said semiconductor integrated circuit; and(e) generating, from said peripheral component layout data generated and said core component circuit data, layout data about the entirety of said semiconductor integrated circuit,said core component circuit data and said peripheral component circuit data representing different levels of circuit design data.