Patent ID: 6972491
Filing Date: 2005-12-06
Classification: H01L

Abstract:
1. A semiconductor device comprising: a semiconductor substrate; and a multi-layer wiring portion including insulating layers and wiring layers alternately stacked one on another on a main surface of the semiconductor substrate, a resistance value of a wiring layer located on an upper side of an adjacent pair of wiring layers included in the multi-layer wiring portion is lower than or equal to that of a wiring layer located on a lower side of the adjacent pair, and the resistance value of the lowermost layer is higher than that of the uppermost layer, and a specific inductive capacity of an insulating layer located on an upper side of an adjacent pair of insulating layers included in the multi-layer wiring portion is higher than or equal to that of an insulating layer located on a lower side of the adjacent pair, and the specific inductive capacity of the lowermost layer is lower than that of the uppermost layer.