Patent ID: 6906384
Filing Date: 2005-06-14
Classification: H01L

Abstract:
1. A semiconductor device comprising: a first semiconductor layer provided on and electrically connected to a semiconductor substrate; a second semiconductor layer formed above the semiconductor substrate via one of an insulating film and a cavity interposed therebetween; a first element region provided in one of the first and second semiconductor layers and located at a first distance from a boundary between the first and second semiconductor layers; a second element region provided in said one of the first and second semiconductor layers where the first element region is provided, and located at a second distance longer than the first distance from the boundary between the first and second semiconductor layers; a first MOS transistor provided in the first element region and having a gate electrode arranged parallel to the boundary between the first and second semiconductor layers; and a second MOS transistor provided in the second element region and having a gate electrode arranged perpendicular to the gate electrode of the first MOS transistor.