Patent ID: 6823505
Filing Date: 2004-11-23
Classification: G06F

Abstract:
A method for programming a programmable system comprising a fixed processor portion and a user programmable address arithmetic unit, the method comprising:writing a first program in a first programming language, said first program configured to implement one or more user-defined address calculation functions in said programmable address arithmetic unit; compiling said first program; generating a first executable image, said first executable image adapted for loading into a first memory coupled to said programmable address arithmetic unit; writing a second program in a second programming language, said second program configured to implement a desired algorithm, wherein the second programming language comprises a fixed set instructions that make use of a fixed set of addressing modes, wherein at least one of the addressing modes comprises a user defined addressing mode; compiling said second program into object code, said object code comprising a plurality of machine level instructions of a processor, said plurality of machine level instructions comprising at least one instruction that invokes the user defined addressing mode; and generating a second executable image, said second executable image adapted for loading into a second memory coupled to said processor.