Patent ID: 8120106
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. A LDMOS cell with double LDD and trenched drain comprising: an N+ substrate of a first type conductivity; an epitaxial layer of second type conductivity over said substrate having a lower doping concentration than said substrate; a body region of said second type conductivity within said epitaxial layer, having a higher doping concentration than said epitaxial layer; a source region of said first type conductivity formed near the top surface of said body region; an avalanche improved region of said second type conductivity underneath said source region inside said body region, having a higher doping concentration than said body region; a body contact doping region of said second type conductivity adjacent to said source region above said avalanche improved region, having a higher doping concentration than said avalanche improved region; a first LDD implantation region LDD-N a second LDD implantation region LDD-N a drain contact trench etched through said epitaxial layer and into said N+ substrate; a highly doped region of said first conductivity type formed along sidewalls of the drain contact trench and connected with said first LDD and second LDD implantation region; a conductive plug filled into said drain contact trench to serve as a drain contact plug; a first insulating layer acting as a gate dielectric; a conductive gate formed on said first insulating layer over said channel region and partially overlapping said source region and said LDD region with a layer of silicide thereon; a second insulating layer covering said source region, said conductive gate sidewalls and its upper surface, and said LDD region and said drain contact plug; a source-body contact trench etched through said second insulating layer, said source region and into said avalanche improved region or through said avalanche improved region and into said body region; said body contact doping region around a sidewall and bottom of said source-body contact trench below said source region; a barrier metal layer and tungsten plug is filled into said source-body contact trench; a source metal over a metal resistance reduction interlayer on said second insulating layer and connected to said tungsten plug.