Patent ID: 6275085
Filing Date: 2001-08-14
Classification: H03K

Abstract:
A method of accessing processing variations of a semiconductor fabrication process, the method comprising the acts of:(a) providing a first path of a first plurality of serially-coupled circuit elements, the first path having an input and an output;(b) providing a second path of a second plurality of serially-coupled delay elements, the second path having an input and a plurality of outputs;(c) coupling the input of the first path and the input of the second path to receive a comparison signal;(d) coupling the output of the first path to a plurality of comparators; and(e) coupling each of the plurality of outputs of the second path to a respective one of the plurality of comparators, each of the plurality of comparators delivering a respective output signal correlative to propagation speed of the comparison signal between the input of the first path and the output of the first path and between the input of the second path and each of the plurality of outputs of the second path.