Patent ID: 8106484
Filing Date: 2012-01-31
Classification: H01L

Abstract:
1. A silicon substrate for a package comprising: a through electrode which fills a through hole passing through from a bottom surface of a cavity for accommodating an electronic device chip to a back surface of the substrate, the bottom surface of the cavity being positioned lower than a top surface of the substrate outside the cavity; an end part of the through electrode in a bottom surface side of the cavity having a connection part to a wiring that forms an electric circuit including the electronic device chip; and a wire bonding part as the wiring, wherein the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity, wherein the end part of the through electrode in the bottom surface side of the cavity is located at a position lower than the bottom surface of the cavity, and wherein the connection part is formed by a first bonding part which fills a space in the upper part of the end part in the through hole and is connected to the end part.