Patent ID: 8504898
Filing Date: 2013-08-06
Classification: G06F,H03M

Abstract:
1. A storage apparatus, comprising: a flash memory module, for storing data; a controller, coupled to the flash memory module, for accessing the flash memory module, and the controller comprising: a micro processing unit; an error correction module, coupled to the micro processing unit for performing an error correction encoding for a data packet to be stored into the flash memory module to generate a sequence data code containing the data packet, a corresponding error correction code of the data packet, and performing an error correction for the data packet according to the error correction code, wherein the flash memory module comprises a plurality of pages, and each of the plurality of pages comprises a data area and a spare area, wherein the data packet comprises user data to be stored in the data area and system data to be stored in the spare area; and a data disordering module, coupled to the micro processing unit for dispersing the user data, the system data and the error correction code in the sequence data code so as to convert the sequence data code into a non-sequence data code, and inversely converting the non-sequence data code into the sequence data code, wherein the data disordering module transmits the non-sequence data code to the flash memory module; and a transmission interface, coupled to the controller for connecting a host.