Patent ID: 6782451
Filing Date: 2004-08-24
Classification: G06F

Abstract:
A control circuit for use with a computer system, the computer system having a registered-dual in-line memory module-only (registered-DIMM-only) chipset and a memory module socket for installing therein a socket-installed DIMM, the control circuit for receiving a first address signal and first control signal outputted from the registered-DIMM-only chipset, the control circuit having means for receiving a recognizing signal for recognizing a the socket-installed-DIMM, the control circuit being external to the socket-installed DIMM, the control circuit comprising:a buffering module for receiving the first address signal and first control signal, the buffering module comprising a first control input terminal for receiving the recognizing signal to output a second address signal and second control signal to the memory module socket if recognizing the DIMM in the memory module socket is not the an unbuffered DIMM; and a transmitting module for receiving the first address signal and first control signal, the transmitting module comprising a second control input terminal for receiving the recognizing signal to output the first address signal and first control signal to the memory module socket if recognizing the DIMM is the unbuffered DIMM.