Patent ID: 6320528
Filing Date: 2001-11-20
Classification: H03M

Abstract:
A test circuit arrangement for testing a digital-to-analog converter having a digital input and an analog output, the test circuit arrangement comprising:a digital code generator configured to generate a monotonic sequence of digital input codes that includes first and second digital input codes, the first digital input code preceding the second digital input code in the monotonic sequence, the digital code generator adapted to be operably coupled to the digital input of the digital-to-analog converter; anda monotonicity comparator adapted to be operably coupled to the analog output of the digital-to-analog converter, the monotonicity comparator configured to compare a second analog signal output by the digital-to-analog converter responsive to the second digital input code with a first analog signal output by the digital-to-analog converter responsive to the first digital input code, and in response thereto, to indicate a non-monotonic transition between the first analog signal and the second analog signal.