Patent ID: 7242092
Filing Date: 2007-07-10
Classification: H01L

Abstract:
1. A substrate assembly with direct electrical connection as a semiconductor package, comprising: a carrier structure having at least a cavity; at least a semiconductor chip received in the cavity of the carrier structure, wherein electrically connecting pads are formed on a surface of the semiconductor chip; at least a build-up circuit structure formed on the semiconductor chip and the carrier structure, wherein the build-up circuit structure is formed with a plurality of conductive structures electrically connected to the electrically connecting pads of the semiconductor chip, and the build-up circuit structure comprises a dielectric layer filled in a gap between the semiconductor chip and the carrier structure, a circuit layer formed on the dielectric layer, and the conductive structures formed in the dielectric layer; and a heat sink partially mounted to the carrier structure to seal an end of the cavity of the carrier structure, and being in contact with the semiconductor chip.