Patent ID: 9064553
Filing Date: 2015-06-23
Classification: G11C

Abstract:
1. A system comprising: a read-select circuit comprising: a read input; a select input; a first voltage level input and a second voltage level input; a read-select output; a first switch network coupled between the read-select output and the first voltage level input, the first switch network comprising a first switch coupled with the read input and a second switch coupled with the select input, the first switch network operable to pull the read-select output to the first voltage level input when the read input is in a first read state and the select input is in a select state; and a second switch network coupled between the read-select output and the second voltage level input, the second switch network comprising a third switch coupled with the read input and a fourth switch coupled with the select input, the second switch network operable to pull the read-select output to the second voltage level input when the read input is in a second read state and the select input is in the select state, such that a memory state of a memory cell coupled with the read input is concurrently read and selected according to respective states of the read input and the select input.