Patent ID: 9147462
Filing Date: 2015-09-29
Classification: G11C,H01L,H03K

Abstract:
1. A signal processing circuit comprising: an arithmetic circuit; and a memory device configured to store data from the arithmetic circuit, wherein the memory device comprises a plurality of memory elements and a switching element configured to control supply of power supply voltage to the plurality of memory elements, wherein each of the plurality of memory elements comprises a pair of logic elements configured to hold the data by connection of an output terminal of one of the pair of logic elements to an input terminal of the other of the pair of logic elements and an output terminal of the other of the pair of logic elements to an input terminal of the one of the pair of logic elements, a capacitor, and a transistor which includes a oxide semiconductor in a channel formation region and is configured to control writing of the data to the capacitor, and wherein the pair of logic elements comprise at least one of an inverter and a clocked inverter.