Patent ID: 7350171
Filing Date: 2008-03-25
Classification: G06F

Abstract:
1. A method for predicting a signal delay in a circuit having circuit paths formed by elements connected by interconnects wherein: (1) at least some of the circuit paths intersect, (2) each element and interconnect have an associated signal delay, (3) at least one set of correlated signal delays is present, wherein at least one of the signal delays X therein is correlated with at least one of the other signal delay Y therein such that covariance cov(X, Y) is nonzero, (4) one or more sets of correlated signal delays arises from global correlation, wherein the signal delays therein are all dependent on global variations; the method comprising the steps of: a. modeling each signal delay X by: wherein: μ N is a number of signal delays in the circuit; M is a number of global variations in the circuit; R α β b. subsequently propagating the modeled signal delays throughout at least one of the circuit paths.