Patent ID: 6418503
Filing Date: 2002-07-09
Classification: G06F

Abstract:
A method for processing at least first and second information transfer related transactions through a buffer circuit to determine which of said information transfer related transactions is first up for output from said buffer circuit, said buffer circuit including at least first and second buffer devices, said method comprising:making an initial determination that there is a processing request to process a new transaction through said buffer circuit; if both first and second buffer devices are free, then effecting a first process comprising: storing said new transaction into one of said buffer devices; marking said one of said buffer devices as first up; and marking said one of said buffer devices as not free; however, if said first buffer device is free and said second buffer device is full, and if said full buffer device does not contain a posted memory write transaction or a pre-fetch delayed read completion transaction, and if said new transaction is a posted memory write transaction, then said method effecting a second process comprising: storing said new transaction into said free buffer device; marking said new transaction as first up; and marking said free buffer device as not available.