Patent ID: 9069920
Filing Date: 2015-06-30
Classification: G06F

Abstract:
1. A method implemented on a data processing system for circuit synthesis, the method comprising, upon receiving a circuit design: determining, using a processor, a net of the circuit design, the net including a first driver driving one or more control loads via a first routing resource and one or more non-control loads via a second routing resource; and purifying the net into a first net and a second net, the first net including the first driver driving the one or more control loads via the first routing resource, the second net having a second driver driving the one or more non-control loads via the second routing resource; the first driver and the second driver having the same inputs; wherein the first net and the first routing resource are optimized during a placement and routing phase for routing the control loads; wherein the first net and the second net, and the first driver and the second driver are used in the implementation of a resulting circuit design in a vendor's technology/architecture dependent integrated circuit.