Patent ID: 8969200
Filing Date: 2015-03-03
Classification: H01L

Abstract:
1. A method of integrating through substrate vias, comprising: obtaining a wafer of semiconducting material, wherein the wafer has a front, a back, and at least one side, and the back is comprised of a substrate material; performing front end of line processing on the wafer; providing one or more through substrate vias in the wafer, comprising: performing middle of the line processing on the wafer after forming the one or more through substrate vias in the wafer; performing back end of line processing on the wafer; providing a carrier wafer having a front, a back, and at least one side; bonding the front of the wafer to the carrier wafer using an adhesive; removing, from the back of the wafer, the substrate material; wet etching, from the back of the wafer, to expose at least one feature made from a metallization scheme; processing the back of the wafer to create at least one backside redistribution layer; removing the wafer from the carrier wafer; dicing the wafer into individual die; providing a base technology wafer having a front, a back, and at least one side; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.