Patent ID: 7244673
Filing Date: 2007-07-17
Classification: H01L

Abstract:
1. A method of manufacturing an inter-level dielectric (ILD) layer of a semiconductor device, the method comprising: forming an etch-stop layer over a substrate; forming a first low-dielectric constant material sub-layer over the substrate, the first law-dielectric constant material having at least one first material property, and having a dielectric constant less than that of SiO forming a second low-dielectric constant material sub-layer over the first low-dielectric constant material sub-layer, the second low-dielectric constant material sub-layer having at least one second material property, wherein the at least one second material property is different from the at least one first material property; and forming a third low-dielectric constant material sub-layer over the second low-dielectric constant material sub-layer, the third low-dielectric constant material sub-layer having a dielectric constant less than that of SiO