Patent ID: 7951628
Filing Date: 2011-05-31
Classification: G02F,H01L

Abstract:
1. A method of manufacturing a pixel structure, comprising: providing a substrate; forming at least one first patterned conductive layer on the substrate, the first patterned conductive layer comprising at least one scan line, at least one gate connected to the scan line, and at least one common electrode line, wherein the scan line is electrically isolated from the common electrode line; forming a second patterned conductive layer on the first patterned conductive layer, the second patterned conductive layer comprising at least one data line intersected with the scan line, at least one source/drain connected to the data line, and at least one first patterned layer partly disposed on the common electrode line, wherein the first patterned layer is electrically isolated from the data line, and the gate, the source and the drain compose at least one TFT; and forming at least one pixel electrode on the second patterned conductive layer, the pixel electrode comprising at least one first part and at least one second part electrically isolated from the first part, the first part covering a part of the first patterned layer and a part of the common electrode line, the first part being connected to the first patterned layer through at least one first contact window, the first part being connected to the common electrode line through at least one second contact window, the second part covering the other part of the first patterned layer, the second part being connected to the source/drain, the first patterned layer and the second part composing at least one first capacitance.