Patent ID: 7047269
Filing Date: 2006-05-16
Classification: G06F

Abstract:
1. A CORDIC processor applied in vector rotation for performing micro-rotational phase operations and scaling phase operations, -the processor comprising: a first register for temporarily storing an X coordinate of input and output vectors of the processor; a second register for temporarily storing a Y coordinate of input and output vectors of the processor; first and second barrel shifters having input terminals connected to output terminals of the first register; third and fourth barrel shifters having input terminals connected to output terminals of the second register; a first multiplexer having a first input terminal connected to an output terminal of the first barrel shifter, and a second input terminal connected to an output terminal of the third barrel shifter; a second multiplexer having a first input terminal connected to an output terminal of the second barrel shifter, and a second input terminal connected to an output terminal of the fourth barrel shifter; a third multiplexer having a first input terminal connected to the output terminal of the first barrel shifter, and a second input terminal connected to an output terminal of the third barrel shifter; a fourth multiplexer having a first input terminal connected to the output terminal of the second barrel shifter, and a second input terminal connected to the output terminal of the fourth barrel shifter; a first adder/subtractor having two input terminals connected to output terminals of the first and second multiplexers, respectively; a second adder/subtractor having two input terminals connected to output terminals of the first adder/subtractor and first register, respectively, and an output terminal connected to an input terminal of the first register; a third adder/subtractor having two input terminals connected to output terminals of the third and fourth multiplexers, respectively; a fourth adder/subtractor having two input terminals connected to output terminals of the third adder/subtractor and second register, respectively, and an output terminal connected to an input terminal of the second register; and a control unit for controlling the first to fourth barrel shifters, the first to fourth multiplexers, and the first to fourth adders/subtractors to perform the micro-rotational phase operations and scaling phase operations of the CORDIC processor iteratively.