Patent ID: 6809038
Filing Date: 2004-10-26
Classification: H01L

Abstract:
A method of manufacturing a semiconductor device having a floating gate memory cell, comprising the steps of:forming a silicon oxide film on a semiconductor substrate; forming a stacked gate structure that consists of a floating gate, an intermediate insulating film, a control gate and a silicon nitride film, on said silicon oxide film; introducing impurities into a surface of said semiconductor substrate via said silicon oxide film using said silicon nitride film as a mask; and removing said silicon nitride film by etching in the state that said silicon oxide film is exposed, said etching comprising etching with an etchant comprising O2 and one or more members selected from the group consisting of CH3F and CH2F2, such that a flow rate of said O2 is at least five times greater than a flow rate of said one or more members selected from the group consisting of CH3F and CH2F2, and subjecting said silicon nitride film to a pressure of from 80 mTorr to 100 mTorr.