Patent ID: 7216273
Filing Date: 2007-05-08
Classification: G06F

Abstract:
1. A method for testing semiconductor devices that output non-deterministic entity information, the method including the steps: generating test signals with a semiconductor tester; applying the generated test signals to the device-under-test (DUT); capturing actual output entities from the DUT in response to the applied generated test signals; comparing the actual output entities to expected output entities, the actual output entities and the expected output entities each being ordered to create a correspondence between the actual output entities and the expected output entities, and identifying a failed actual output entity where a comparison fails to match an actual output entity to a corresponding expected output entity; and when a failed actual output entity is identified in the comparing step, defining a window of valid expected entities relative to the corresponding expected output entity and comparing the failed actual output entity to expected output entities in the window of valid expected entities.