Patent ID: 9190280
Filing Date: 2015-11-17
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: preparing a semiconductor substrate with a gate oxide layer on the top thereof; depositing a polycrystalline silicon layer on the gate oxide layer; depositing a protection layer overlying the top of the polycrystalline silicon layer; etching the protection layer and the polycrystalline silicon layer to form a gate body block including the protection layer and the polycrystalline silicon layer in that order from top to bottom, which remain after being etching; forming an oxide layer overlying the gate body block and the semiconductor substrate; polishing the oxide layer through Chemical Mechanical Polishing, CMP, until the top of the gate body block; removing the protection layer on the top of the gate body block; depositing a metal layer overlying the gate body block with the protection layer removed and the oxide layer; performing a first annealing process on the metal layer to have the metal layer on the gate body layer into action with the polycrystalline silicon layer to form a metal silicide layer on the gate body block with the protection layer removed; removing the metal layer; and performing a second annealing process on the metal silicide layer to further lower the resistance of the metal silicide.