Patent ID: 8592269
Filing Date: 2013-11-26
Classification: B82Y,H01L

Abstract:
1. A method of manufacturing a non-volatile memory device, the method comprising: forming a tunnel oxide layer of silicon oxide, at an upper surface of a substrate, by a thermal oxidation or CVD (chemical vapor deposition) process; forming a floating gate layer, including nano-crystalline particles comprising silicon, on the tunnel oxide layer using a deposition process employing source gas including silicon and hydrogen atoms; and prior to the forming of the floating gate layer by the deposition process, treating the tunnel oxide layer to promote the rate of crystallization and growth of silicon forming the nano-crystalline particles during the deposition process of forming of the floating gate layer, wherein the treating comprises wetting the tunnel oxide layer which has been formed by said thermal oxidation or CVD process with a solution comprising ozone and de-ionized water to form hydroxyls on a surface of the tunnel oxide layer.