Patent ID: 6972594
Filing Date: 2005-12-06
Classification: H03K

Abstract:
1. A level-shifting circuit, comprising: a level modulating circuit having an input terminal and an inverse input terminal for respectively receiving a complementary pair of small signals, and a first output terminal for outputting a voltage level in response to the complementary pair of small signals, wherein the level modulating circuit comprises: an enable circuit making the first output terminal output a predetermined voltage level signal when receiving a disable signal, wherein the enable circuit comprises: a MOS transistor having a fifth source and a fifth drain coupled between an external level and one of the first output terminal and the second output terminal, and a fifth gate coupled to the disable signal; and a pair of third NMOS transistors having sixth drains respectively coupled to the input terminal and the inverse input terminal, sixth sources coupled to the complementary pair of small signals, and sixth gates coupled to the disable signal.