Patent ID: 7615494
Filing Date: 2009-11-10
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor device, the method comprising: forming an insulation layer over a substrate; etching the insulation layer using a hard mask pattern to form a contact hole, wherein a portion of the hard mask pattern is removed during the etching of the insulation layer such that a remainder of the hard mask pattern remains over the insulation layer, the hard mask pattern comprising a nitride-based layer; filling the contact hole with a conductive layer; performing an etch-back process on the conductive layer to form a plug in the contact hole, wherein an upper surface of the plug is positioned higher than an interface between the remainder of the hard mask pattern and the insulation layer due to the remainder of the hard mask pattern; removing the remainder of the hard mask pattern to expose an upper portion of the plug using an etch gas comprising a gas mixture of C forming a metal line over the protruding plug and around the upper portion of the plug.