Patent ID: 7662718
Filing Date: 2010-02-16
Classification: H01L

Abstract:
1. A method of etching for an integrated circuit comprising: providing a first hard mask layer over a target layer, the first hard mask layer having a first thickness; providing a second hard mask layer over the first hard mask layer, the second hard mask layer having a second thickness, wherein the first thickness is substantially greater than the second thickness; providing a photoresist layer over the second hard mask layer, wherein the photoresist layer has a thickness between about 1,000 Å and about 2,000 Å; forming a pattern in the photoresist layer; transferring the pattern into the second hard mask layer; and trimming the second hard mask layer such that at least a portion of the photoresist layer protects a top surface of the second hard mask layer during all of trimming the second hard mask layer, wherein the second hard mask layer is trimmed at a rate between 1 Å and 10 Å per second on each side of the second hard mask layer such that the second hard mask layer has an average edge roughness between about 10 Å rms and about 50 Å rms.