Patent ID: 7547897
Filing Date: 2009-06-16
Classification: H01L,Y10T

Abstract:
1. A semiconductor device fabrication apparatus, comprising: a load lock chamber configured to store a plurality of wafer plates therein, the plurality of wafer plates respectively including at least one semiconductor wafer thereon, wherein at least one of the plurality of wafer plates includes an opening extending therethrough beneath the at least one semiconductor wafer thereon and having at least one dimension smaller than that of the at least one semiconductor wafer; an ion implantation target chamber hermetically connected to the load lock chamber and configured to implant an ion species into a semiconductor wafer on one of the plurality of wafer plates currently loaded therein; and a loading assembly in the load lock chamber configured to load a next one of the plurality of wafer plates from the load lock chamber into to the ion implantation target chamber, wherein the loading assembly includes an elongated arm having a key extending therefrom, and wherein the at least one of the plurality of wafer plates includes a key hole at one end thereof that is adapted to matably interface with the key of the loading assembly.