Patent ID: 8039339
Filing Date: 2011-10-18
Classification: H01L

Abstract:
1. A method of forming a semiconductor device, comprising: forming a first gate dielectric layer over a semiconductor layer; forming a first conductive layer over the first gate dielectric layer; forming a first separation layer over the first conductive layer; after forming the first separation layer, forming a trench in the semiconductor layer that separates a first mesa and a second mesa, wherein the first mesa and the second mesa each include a portion the first gate dielectric layer, a portion of the first conductive layer, a portion of the first separation layer, and a portion of the semiconductor layer; filling the trench with an isolation material to a height above a top surface of the first conductive layer such that no part of the trench below the height is unfilled as a result of the filling; removing the portion of the first conductive layer from the second mesa; after removing the portion of the first conductive layer from the second mesa, forming a second conductive layer over the portion of the first separation layer of the first mesa and over the second mesa; performing planarization to remove the second conductive layer from over the first mesa; and forming a first transistor of a first type in the first mesa and a second transistor of a second type in the second mesa.