Patent ID: 8191166
Filing Date: 2012-05-29
Classification: G06F,H04L,H04N

Abstract:
1. A set top box comprising an integrated circuit comprising a first input of the integrated circuit, a second input of the integrated circuit, a third input of the integrated circuit, a first output of the integrated circuit, a second output of the integrated circuit, a content processing block, a content output control block, a control validation block, a control decoding block, a control modifying block and an authentication application block, wherein the first input is operatively coupled to the content processing block which, in turn, is operatively coupled to the content output control block which, in turn, is operatively coupled to the first output, wherein the second input is operatively coupled to the control validation block which, in turn, is operatively coupled to the control decoding block which, in turn, is operatively coupled to the content processing block, wherein the control validation block is operatively coupled to the control modifying block which, in turn, is operatively coupled to the authentication application block which, in turn, is operatively coupled to the second output, wherein the third input is operatively coupled to the content output control block which, in turn, is operatively coupled to the first output, wherein the third input is operatively coupled to the control modifying block which, in turn, is operatively coupled to the authentication application block which, in turn, is operatively coupled to the second output; and a processor operatively coupled to the integrated circuit, wherein the integrated circuit receives digital rights management control information via the second input, wherein content received by the integrated circuit is associated with the digital rights management control information, wherein the control validation block validates the digital rights management control information received by the integrated circuit via the second input and provides the validated digital rights management control information to the control decoding block and to the control modifying block, wherein the control decoding block decodes the validated digital rights management control information and provides the decoded digital rights management control information to the content processing block and to the content output control block, wherein the processor provides, via the third input, feature control information to the content processing block and the content output control block, wherein the content processing block processes the content received via the first input of the integrated circuit in accordance with the decoded digital rights management control information and the feature control information that were received by the content processing block via the first input and provides the processed content to the content output control block, wherein the content output control block processes the content that was processed by the content processing block in accordance with the decoded digital rights management control information and the feature control information that were received by the content output control block, wherein the processing of the content output control block includes securing before sending to the first output of the integrated circuit, and wherein the control modifying block modifies the validated digital rights management control information provided by the control validation block in accordance with the feature control information that was provided by the processor and provides the modified digital rights management control information to the authentication application block.