Patent ID: 8312241
Filing Date: 2012-11-13
Classification: H04L

Abstract:
1. A serial buffer comprising: a buffer memory having a plurality of memory blocks, wherein the number of memory blocks is represented by an integer, N, and wherein each of the N memory blocks has corresponding unique memory block address; a free buffer pointer list that includes N free buffer pointer entries, each storing a free buffer address that corresponds with the memory block address of a corresponding one of the N memory blocks, and each storing a first valid indicator that indicates whether the corresponding one of the N memory blocks is available to store a request packet; a used buffer pointer list that includes N used buffer pointer entries, each storing a used buffer address that corresponds with the memory block address of a corresponding one of the N memory blocks, and each storing a second valid indicator that indicates whether the corresponding one of the N memory blocks stores a request packet to be transmitted out of the serial buffer; and a request buffer pointer list that includes N request buffer pointer entries, each storing a request buffer address that corresponds with the memory block address of a corresponding one of the N memory blocks, and each storing a third valid indicator that indicates whether a request packet has been transmitted out of the serial buffer from the corresponding one of the N memory blocks, and a corresponding response is expected.