Patent ID: 7795921
Filing Date: 2010-09-14
Classification: H03K

Abstract:
1. A semiconductor integrated circuit comprising: a sampling unit configured to sample an input signal supplied from an external circuit in synchronization with a clock signal, and output said sampled input signal as a first signal; a delay unit configured to delay said first signal in synchronization with said clock signal, and output said delayed first signal as a second signal; a first operating unit configured to operate whether or not a signal level of said input signal is sustained equal to or longer than a predetermined period based on said first and second signals, and output an output signal in synchronization with said clock signal when said signal level of said input signal is sustained equal to or longer than said predetermined period, wherein a signal level of said output signal is sustained equal to or longer than said predetermined period; and a second operating unit configured to asynchronously control said sampling unit based on said input signal and said output signal.