Patent ID: 8110439
Filing Date: 2012-02-07
Classification: H01L,Y10S

Abstract:
1. A method of assembling a semiconductor package assembly, comprising the steps of: (a) forming a first integrated circuit assembly including a substrate having a surface on which one or more semiconductor die mounted and on which a plurality of contact pads are defined; (b) affixing a plurality of electrical connectors to the plurality of contact pads, a first portion of the electrical connectors connected to the contact pads and a second portion of the electrical connectors spaced from the contact pads; (c) encapsulating the first integrated circuit assembly including the first portion of the electrical connectors and part of the second portion of the electrical connectors in a mold compound, the step of encapsulating leaving a surface of the second portion of the electrical connectors exposed through a surface of the mold compound; (d) forming a second integrated circuit assembly including a substrate having a surface on which one or more semiconductor die mounted and on which a plurality of contact pads are defined; (e) encapsulating the second integrated circuit in a mold compound; (f) affixing the first and second encapsulated integrated circuits to each other with the exposed surfaces of the second portions of the electrical connectors being electrically coupled to a plurality of contact pads on the second integrated circuit.