Patent ID: 6397279
Filing Date: 2002-05-28
Classification: G06F

Abstract:
A smart retry system for a bus system, comprising:a bus, said bus adapted to communicate information; a master device coupled to said bus, said master device adapted to communicate via said bus; a plurality of slave devices coupled to said bus, said plurality of slave devices adapted to communicate via said bus and wherein each one of said plurality of slave devices is further adapted to issue a denial signal when said slave device is busy; a single arbiter coupled to said bus, said arbiter adapted to communicate via said bus and to regulate access to said bus by said master device and said plurality of slave devices, wherein said arbiter further comprises a logic system coupled to said bus, said logic system adapted to prevent said master device from accessing each one of said plurality of slave devices when a corresponding said each one of said plurality of slave devices issues a denial signal; wherein said logic system includes a logic component adapted to mask a request signal from said master device when said slave device issues said denial signals, wherein said logic system is adapted to prevent said master device from accessing said bus.