Patent ID: 6188295
Filing Date: 2001-02-13
Classification: H05K

Abstract:
A method for making an electronic device by interconnecting a plurality of circuit elements comprising steps of:patterning a first conductive layer to form micro-strips for interconnecting said plurality of circuit elements;cutting one of said micro-strips as an open-transmission line having a first end connected to a first capacitor on said conductive layer and a second end as an open-end, into separate segments for forming a new capacitor with said separate segments wherein said new capacitor is in series connection with said first capacitor for providing a reduced combined capacitance;interconnecting a resistor to a transistor by one of said micro-strips of said first patterned conductive layer;placing a first insulation layer underneath said first patterned conductive layer and placing a second patterned conductive layer underneath said first insulation layer and connecting said second patterned conductive layer to a ground voltage;placing a second insulation layer underneath said second patterned conductive layer and placing a third patterned conductive layer underneath said second insulation layer and making said third patterned conductive layer for providing an inductive function; andopening through holes in said first and second insulation layers and filling said through holes with conductive filling-material for interconnecting said circuit elements disposed on said first patterned conductive layer to said third patterned conductive layer.