Patent ID: 6671750
Filing Date: 2003-12-30
Classification: G06F,Y02D

Abstract:
A LAN interface comprising:a terminal connected to an I/O bus; and a counter device connected to connection ports of said LAN interface; said LAN interface being connected to said I/O bus and transmitting and receiving a link pulse to confirm connection between said terminal and said counter device; said LAN interface including: a LAN controller for processing a signal transmitted from said terminal and then transmitting a processed signal to said counter device, and for processing a signal transmitted from said counter device and then transmitting a processed signal to said connection device; an isolation section connected between said LAN controller and said I/O bus, for electrically disconnecting said LAN controller from said I/O bus; an analog circuit connected between said LAN controller and said connection port, for subjecting a transmission signal and a received signal to an analog process; and a link pulse detector for operating on a predetermined voltage supplied via said I/O bus and detecting a link pulse from said counter device connected to said connection port; wherein said link pulse detector, when detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to an operation state thereof and, when not detecting a link pulse output from the counter device, controls the LAN controller and the isolation section to controllably bring them to a non-operation state.