Patent ID: 9189457
Filing Date: 2015-11-17
Classification: G06F

Abstract:
1. A method for distributing processor load in a data processing system during execution of a set of computing instructions on a last received block while receiving input values of an incoming block, wherein the last received block and the incoming block, each, comprise a number N of time-sequentially input values, wherein a timing of the input values of the incoming block subdivides the time, during which input values of an incoming block are received, into N time windows, and the method comprises: receiving the N input values of the incoming block sequentially, and processing N computing steps sequentially on the N input values of the last received block wherein the N computing steps result from dividing the operations of the set of computing instructions into N computing steps of equal size, wherein each of the computing steps is processed in one of the time windows and therefore generates an approximately identical processor load in the data processing system; wherein for each of the N input values of the incoming block received, one of the N computing steps is processed such that a result of the set of computing instructions on the last received block is returned when the N-th input value of the incoming block arrives; wherein at least a portion of the computing steps comprises several sub-computing steps, the sub-computing steps comprising several basic calculation operations; and wherein the time-sequentially input values represent digitalized multi-media signals.