Patent ID: 6306750
Filing Date: 2001-10-23
Classification: H01L

Abstract:
A method of creating a bond pad structure, on a semiconductor substrate, comprising the steps of:providing an upper level, metal interconnect structure, overlying, and contacting, underlying conductive regions, on, or in, said semiconductor substrate;forming an inter-metal dielectric, (IMD), layer, on said upper level, metal interconnect structure;performing an etching procedure to create a mesh pattern opening, in said IMD layer, exposing regions of the top surface of said upper level, metal interconnect structure, and creating unetched, isolated islands of said IMD layer,depositing a metal layer, on the top surface of said isolated islands of said IMD layer, and partially filling said mesh pattern opening;removing portions of said metal layer from the top surface of said isolated islands of said IMD layer, creating a metal mesh structure, in said mesh pattern opening, with the metal mash structure featuring a notched, or indented top surface, resulting from the partial metal fill of said mesh pattern opening;forming said bond pad structure, featuring a roughened top surface topography, as a result of the underlying notched, or indented surface, of said metal mesh structure; andforming a wire bond on said bond pad structure.