Patent ID: 7508718
Filing Date: 2009-03-24
Classification: G11C

Abstract:
1. A method for determining a set of programming and erase conditions for operating a non-volatile memory device comprising a charge-trapping layer, comprising: a) selecting a set of programming and erase conditions, b) programming the device under the programming conditions and determining a first spatial charge distribution of the charge-trapping layer, c) erasing the device under the erase conditions and determining a second spatial charge distribution of the charge trapping layer, d) determining a first net charge distribution variation profile from the difference between the first and second spatial charge distributions, e) programming the device under the programming conditions and determining a third spatial charge distribution of the charge-trapping layer, f) determining a second net charge distribution variation profile from the difference between the second and third spatial charge distributions, g) checking if the second net charge distribution variation profile is substantially the opposite of the first net charge distribution variation profile, and h) if not, optimising the set of programming and erase conditions in step a) and repeating steps b) to g).