Patent ID: 9172034
Filing Date: 2015-10-27
Classification: G11C,H01L

Abstract:
1. A memory cell, comprising: a first non-insulator; a second non-insulator, different from the first non-insulator, forming a rectifying junction with the first non-insulator; a first electrode connected to the first non-insulator; and a second electrode connected to the second non-insulator, directly or through one or more additional non-insulators; wherein at least one of the first and second non-insulators comprises an operational non-insulator having an ionic transference number less than 1 and greater than or equal to 0.5, wherein the first non-insulator and the second non-insulator are selected so that the junction has electrical rectifying characteristics of a diode junction, and wherein the diode junction occurs at the interface between the first and second non-insulators.