Patent ID: 8659086
Filing Date: 2014-02-25
Classification: H01L

Abstract:
1. An isolated ESD protection device, the device being connected between input terminals of a circuit to be protected, both the device and the circuit being formed in a semiconductor substrate of a first conductivity type, the device comprising: a floor isolation layer of a second conductivity type; multiple parallel N-type wells alternating with parallel P-type wells, each of said N-type and said P-type wells extending downward from a surface of said substrate to said floor isolation layer; a cathode contact in electrical contact with each of said N-type wells; an anode contact in electrical contact with each of said P-type wells; a field oxide layer at said surface of said substrate surrounding said N-type and said P-type wells; and a heavily-doped substrate ring of said first conductivity type at said surface of said substrate surrounding said field oxide layer, a doping concentration of said heavily-doped substrate ring being greater than a doping concentration of a portion of said substrate abutting said heavily-doped substrate ring.