Patent ID: 7915663
Filing Date: 2011-03-29
Classification: H01L

Abstract:
1. A semiconductor device comprising: an insulation layer provided on a semiconductor substrate; two or more p-type semiconductor regions comprising a first p-type semiconductor region and other p-type semiconductor regions provided on the insulation layer; a trench oxide film provided that surrounds each of the two or more p-type semiconductor regions to reach the insulation layer, wherein the trench oxide film isolates any two of the two or more p-type semiconductor regions from each other, and wherein the trench oxide film is a single contiguous film; an n-type source region and an n-type drain region provided on the first p-type semiconductor region; and a charge storage region provided above the first p-type semiconductor region between the n-type source region and the n-type drain region, wherein the charge storage region has a plurality of charge states for a memory cell.