Patent ID: 6697755
Filing Date: 2004-02-24
Classification: G01R

Abstract:
A test apparatus comprising:a comparator for comparing a response signal supplied from a device to be tested in response to a test waveform with a predetermined threshold and outputting a two-valued decision subject signal depending on a level of the response signal; timing generation means for generating a decision edge at predetermined timing for the decision subject signal; logical value storage means for extracting and storing logical values of the decision subject signal based on the decision edge; and comparison means for comparing an output of said logical value storage means with an expected value and determining whether the device to be tested should fail or pass, wherein said logical value storage means comprises: first delay means for delaying the decision edge generated by said timing generation means by a predetermined time and generating a first decision edge; second delay means for delaying the decision edge generated by said timing generation means by a predetermined time and generating a second decision edge, the second decision edge being adjusted in timing with respect to the first decision edge according to a fall time of the decision subject signal; first storage means for storing a logical value of the decision subject signal obtained at timing of the first decision edge; second storage means for storing a logical value of the decision subject signal obtained at timing of the second decision edge; and selection means for selecting either the logical value stored in the first storage means or the logical value stored in the second storage means and supplying the selected logical value to said comparison means, and wherein when the first decision edge is in or near a fall time of the decision subject signal, said selection means selects the logical value stored in said second storage means.