Patent ID: 8717075
Filing Date: 2014-05-06
Classification: H03L

Abstract:
1. A phase locked loop circuit, comprising: a phase frequency detector, generating a frequency-increasing signal and a frequency-decreasing signal according to a phase difference between an input signal and a feedback signal; a control circuit, generating a first control signal and/or a second control signal according to the frequency-increasing signal and the frequency-decreasing signal; a charge pump, generating a current signal according to the first control signal and/or the second control signal; a loop filter, generating a filtered signal according to the current signal; a voltage-controlled oscillator, comprising: a frequency divider, generating the feedback signal according to the output signal; and a voltage detector, monitoring the supply voltage, and controlling the control circuit to generate only the second control signal so as to reduce the supply voltage if the supply voltage is greater than a high reference voltage.