Patent ID: 7378306
Filing Date: 2008-05-27
Classification: H01L

Abstract:
1. A method for fabricating a semiconductor structure, comprising: forming a first semiconductor layer having a first crystal orientation; forming a second semiconductor layer and an adjacent isolation region over at least part of the first semiconductor layer, where the second semiconductor layer has a second crystal orientation that is different from the first crystal orientation and where the second semiconductor layer is electrically isolated from the first semiconductor layer; forminig a trench opening that exposes the first semiconductor layer; filling at least part of the trench opening by epitaxially growing a first epitaxial semiconductor material on at least an exposed surface of the first semiconductor layer to form a first epitaxial semiconductor layer that is higher than the isolation region; epitaxially growing a second epitaxial semiconductor material on at least an exposed surface of the second semiconductor layer to thicken the second semiconductor layer in a first circuit area so that the second semiconductor layer is higher than the isolation region; and polishing the first epitaxial semiconductor layer and the second semiconductor layer down to at least the isolation region so that the first epitaxial semiconductor layer is substantially coplanar with the second semiconductor layer.