Patent ID: 6507104
Filing Date: 2003-01-14
Classification: H01L

Abstract:
A semiconductor package, which comprises:a substrate having a first side and a second side, the first side thereof being formed with a set of first solder pads and a set of second solder pads, and the second side thereof being formed with a plurality of third solder pads; a semiconductor chip having an active side and an inactive side, the active side thereof being mounted with a plurality of solder bumps, which allow the semiconductor chip to be electrically connected to the first solder pads of the substrate; a heat-dissipating device including a heat sink and a plurality of connecting bumps, the heat sink having a first side and a second side, the second side thereof being formed with a plurality of recessed portions, wherein the connecting bumps are adhered to the recessed portions of the heat sink and further attached to the second solder pads of the substrate, allowing the connecting bumps to be interposed between the heat sink and the substrate, and wherein the connecting bumps are dimensioned larger in vertical height than the sum of the thickness of the semiconductor chip and the height of the solder bumps; a plurality of conductive elements attached to the third solder pads of the substrate, allowing the semiconductor chip to be electrically connected to external devices; and a first encapsulant encapsulating the semiconductor chip, the heat-dissipating device and the first side of the substrate, with the first side of the heat sink being exposed to the atmosphere.