Patent ID: 7198994
Filing Date: 2007-04-03
Classification: H01L

Abstract:
1. A manufacturing method of a semiconductor device, comprising: forming a first and a second dummy gate pattern on a silicon layer formed over a semiconductor substrate via an insulation film; forming impurity diffusion layers at positions of source regions and drain regions by introducing impurities into said silicon layer, using said first and said second dummy gate pattern as masks; forming an insulation film over said silicon layer so as to bury said first and said second dummy gate pattern; removing said first and said second dummy gate pattern to form a first and a second groove in said insulation film; etching said silicon layer in said first groove to reduce a thickness of a portion corresponding to a channel region of said silicon layer; forming gate insulation films over said silicon layer in said first and said second groove; and forming gate electrode layers over said gate insulation films in said first and said second groove.