Patent ID: 6531737
Filing Date: 2003-03-11
Classification: H01L

Abstract:
A semiconductor device comprising:a semiconductor substrate; a plurality of impurity regions formed on the surface of said semiconductor substrate; said impurity regions having a predetermined depth; at least an isolating region formed on the surface of said semiconductor substrate to electrically isolate said impurity regions from each other; an interlayer insulating film formed on the surface of said silicon semiconductor substrate; a contact hole which penetrates said interlayer insulating film and reaching said impurity region and said isolating region across the boundary thereof; a contact material filled in said contact hole; wherein: said isolating region includes a material having substantially high etching selectivity than said interlayer insulating film, and the bottom of said contact hole extends into said isolating region to the depth less than the depth of said impurity regions; and said impurity region has a projection intruding into said isolating region across the boundary between said impurity region and said isolating region, and said contact hole reaches said impurity region in said projection and said isolating region adjacent on both sides of said projection.