Patent ID: 6586836
Filing Date: 2003-07-01
Classification: H01L

Abstract:
An intermediate microelectronic package, comprising:a first encapsulated die assembly having an active surface and a back surface, said first encapsulated die assembly including at least one first microelectronic die having an active surface and at least one side and a first encapsulation material adjacent said at least one first microelectronic die side, wherein said first encapsulation material comprises at least a portion of said first encapsulated die assembly back surface; and a second encapsulated die assembly having an active surface and a back surface, wherein said second encapsulated die assembly back, surface is attached to said first encapsulated die assembly back surface, said second encapsulated die assembly including at least one second microelectronic die having an active surface and at least one side and a second encapsulation material adjacent said at least one second microelectronic die side, wherein said second encapsulation material comprises at least a portion of said second encapsulated die assembly back surface.