Patent ID: 7533231
Filing Date: 2009-05-12
Classification: G06F,G11C

Abstract:
1. A method for accessing data in a memory comprising one or more memory blocks, the method comprising: receiving a bank activate signal and row address data for reading contents of an identified row of memory identified by the row address data, wherein the memory comprises a row cache; responsive to the bank activate signal, using sense amplifiers to move the contents of the entire identified row of memory into the row cache in the absence of column address information at the location of the primary sense amplifiers, wherein the primary sense amplifiers are not shared between memory blocks; receiving a “read” command to access data from the identified row of memory, wherein the data to be accessed is less than the entire identified row; receiving column address data that identifies a location of the data to be accessed in the memory; and reading the data to be accessed from the contents of the identified row in the row cache at the location identified by the column address data, whereby permitting the one or more memory blocks to be refreshed concurrently with accessing the contents of the identified row in the row cache.