Patent ID: 7072224
Filing Date: 2006-07-04
Classification: G11C

Abstract:
1. A nonvolatile memory comprising: a memory array unit having a plurality of nonvolatile memory cells; a control unit; and a voltage generating unit for supplying voltages to said nonvolatile memory cells, wherein each nonvolatile memory cell is capable of storing information as a threshold voltage thereof within an arbitrary one of voltage ranges corresponding to information, wherein the control unit is capable of performing an arbitrary one of a write operation to store information into the nonvolatile memory cell, a read operation to read information stored in the nonvolatile memory cell, an erase operation to erase information stored in the nonvolatile memory cell, and a verify operation to check whether the threshold voltage is within a voltage range corresponding to information in the write operation or a voltage range corresponding to an erase state in the erase operation, wherein the voltage generating unit has an erase voltage generating unit for generating an arbitrary one of erase voltages to be supplied to the nonvolatile memory cell in the erase operation, wherein one of the erase voltages has a first voltage level and another of the erase voltages has a second voltage level higher than the first voltage level, wherein in the erase operation, the control unit performs control to supply the one erase voltage of the first voltage level and then to supply the other erase voltage of the second voltage level to the nonvolatile memory cell, and wherein the control unit does not perform the verify operation during the supply of the one erase voltage to the nonvolatile memory cell, and performs the verify operation after the supply of the other erase voltage to the nonvolatile memory cell.