Patent ID: 6058487
Filing Date: 2000-05-02
Classification: G01R

Abstract:
A period measuring circuit comprising:a timer having as an input a timer count clock signal, said timer providing as an output a count value based on the timer count clock signal input, said timer performing a counting operation;an input terminal receiving an input signal;a detection circuit connected to the input terminal, the detection circuit detecting at least one of a rising edge and a falling edge of said input signal, said detection circuit providing as an output a detection signal; anda capture register having as an input the detection signal from said detection circuit through a control circuit, said capture register also having as an input said count value from said timer, said capture register storing the count value upon receipt of said detection signal;wherein said control circuit compares a predetermined critical frequency value to a frequency of said detection signal, and wherein if said frequency of said detection signal is greater than said predetermined critical frequency value, then said control circuit disconnects said capture register from said detection circuit, and wherein if said frequency of said detection signal is not greater than said predetermined critical frequency value, then said control circuit connects said capture register to said detection circuit so that said capture register receives said detection signal and simultaneously sends a counting value clear signal to said timer so that said timer clears the count value to an initial value and subsequently re-starts its counting operation.