Patent ID: 7999305
Filing Date: 2011-08-16
Classification: H01L

Abstract:
1. A semiconductor device comprising: an element region having a channel region; a unit gate structure inducing a channel in the channel region, the unit gate structure including: a tunnel insulating film formed on the element region; a charge storage insulating film formed on the tunnel insulating film; a block insulating film formed on the charge storage insulating film; and a control gate electrode formed on the block insulating film; and an isolation region sandwiching the element region, the tunnel insulating film, and the charge storage insulating film, wherein the block insulating film and the control gate electrode are formed to extend above the element region and on the isolation region, a distance between the element region and the control gate electrode is shorter at a center portion of the unit gate structure than at both ends thereof, as viewed in a section parallel to a channel width direction, and the charge storage insulating film is entirely sandwiched by the isolation region, and an upper surface of the charge storage insulating film is entirely situated at a position lower than an upper surface of the isolation region.