Patent ID: 6014313
Filing Date: 2000-01-11
Classification: H01L

Abstract:
A three-dimensional multi-chip module comprising at least two basically planar multi-chip modules stacked on top of each other, at least two electrically isolating substrates having electrically conducting paths, one substrate included in each basically planar multi-chip module, and at least two integrated circuit chips, at least one integrated circuit chip included in each basically planar multi-chip module, each integrated circuit chip having a first surface comprising electrical terminals and a second surface opposite the first surface, each integrated circuit chip being mounted with its first surface on and electrically connected to the electrically conducting paths of the electrically isolating substrate of the respective basically planar multi-chip module, wherein theat least two integrated circuit chips included in the three-dimensional multi-chip module are electrically connected to each other, and the at least one integrated circuit chip of each basically planar multi-chip module is mounted so that its second surface is in mechanical and thermal contact with an adjacent electrically isolating substrate, this at least one integrated circuit chip serving as a distance or spacing element between adjacent electrically isolating substrates of the at least two basically planar multi-chip modules.