Patent ID: 6301682
Filing Date: 2001-10-09
Classification: G06F

Abstract:
A memory system, wherein a respective check word is co-stored together with a data word, comprising:an error monitoring system thata) generates said check word from a data word to be written in and from a write address according to a predetermined formation rule, the formation rule being an EDC code before the check word in common with the data word to be written in is stored under said write address, and thatb) generates a check word anew according to the EDC code based on a data word to be read out from the memory system, compares bits of the check word to K-bits stored for the data word and, given inequality, draws conclusions about a type of error from a pattern of equal and unequal K-bits, what is referred to as the syndrome pattern; andan internal read event that is implemented before storing a data word to be written under its write address, whereby the error monitoring system implements the error check according to feature b).