Patent ID: 7026205
Filing Date: 2006-04-11
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor device, comprising: forming first and second insulating gate portions to be spaced from each other on a semiconductor substrate, the first insulating gate portion including a first gate insulating film and a first gate electrode doped with an impurity of a first conductivity type, and the second insulating gate portion including a second gate insulating film and a second gate electrode doped with an impurity of a second conductivity type; selectively implanting impurity ions of the first conductivity type to the first gate electrode and a surface layer of the semiconductor substrate adjacent to the first insulating gate portion; selectively implanting impurity ions of the second conductivity type to the second gate electrode and the surface layer adjacent to the second insulating gate portion; after implanting the impurity ions of the first and second conductivity types, performing pre-annealing at a first substrate temperature; and after the pre-annealing, performing main activation for the impurity ions of the first and second types at a second substrate temperature higher than the first substrate temperature for a treatment period shorter than a period of the pre-annealing.