Patent ID: 6763401
Filing Date: 2004-07-13
Classification: G06F,Y02D

Abstract:
A direct memory access controller, in which an additive value or a subtractive value of a transfer destination address is equal to an additive value or a subtractive value of a transfer source address, comprising:a transfer source address storing unit that stores a present value of the transfer source address; a transfer source reload storing unit that stores an initial value of the transfer source address; a first difference calculating unit that obtains a difference between the initial value of the transfer source address and an initial value of the transfer destination address; a difference storing unit that stores the difference obtained by the first difference calculating unit; and a second difference calculating unit that calculates a present value of the transfer destination address based on the difference stored in the difference storing unit and the present value of the transfer source address stored in the transfer source address storing unit.