Patent ID: 7145209
Filing Date: 2006-12-05
Classification: H01L

Abstract:
1. A thin film transistor, comprising: an active layer formed and comprising a channel region, a first doped region and a second doped region, in which the first doped region is disposed between the channel region and the second doped region; a first gate insulating layer formed overlying the active layer and comprising a central region, a shielding region and an extending region, in which the shielding region is disposed between the central region and the extending region, the central region covers the channel region, the shielding region covers the first doped region, and the extending region covers the second doped region; a second gate insulating layer overlying the central region and the shielding region of the first gate insulating layer and exposing the extending region; and a gate layer formed overlying the second gate insulating layer, in which the gate layer covers the central region and exposes the shielding region and the extending region; wherein, the thickness of the shielding region is larger than the thickness of the extending region.