Patent ID: 6211746
Filing Date: 2001-04-03
Classification: G06G,H03K

Abstract:
An integration method having a charge step of charging an integrating capacitor within an integration period, and a voltage detection step of detecting a voltage developed at said integration capacitor, wherein said charge step comprises:a first current supply step of supplying a current proportional to a voltage level of an input signal to said integrating capacitor;a second current supply step for causing said current proportional to the voltage level of said input signal to flow from said integrating capacitor; anda control step comprising:a stop step of stopping charge of said integrating capacitor during a predetermined period;a first switching step for controlling said stop step;a second switching step for switching in association with phases opposite to phases with which said first switching step is opened or closed; anda stop signal generation step for generating a stop signal, which becomes active during said predetermined period in response to an oscillating signal.