Patent ID: 8648427
Filing Date: 2014-02-11
Classification: H01L

Abstract:
1. An electronic device including an integrated circuit comprising: a buried conductive region; a semiconductor layer overlying the buried conductive region, wherein the semiconductor layer has a primary surface and an opposing surface, and the buried conductive region lies closer to the opposing surface than to the primary surface; a high-side transistor that includes a first current-carrying electrode that is a source or an emitter, wherein: the first current-carrying electrode is electrically connected to the buried conductive region and includes a first doped region within the semiconductor layer; and the first doped region lies closer to primary surface than to the opposing surface; a low-side transistor that includes a second current-carrying electrode that is a drain or a collector, wherein: the second current-carrying electrode is electrically connected to the buried conductive region and includes a second doped region within the semiconductor layer; and the second doped region lies closer to primary surface than to the opposing surface; a first vertical conductive structure extending through the semiconductor layer and electrically connected to and adjacent to the buried conductive region and to the first doped region or the second doped region; a first insulating sidewall spacer laterally disposed between the semiconductor layer and the first vertical conductive structure; and a second vertical conductive structure extending through the semiconductor layer and electrically connected to and adjacent to the buried conductive region and the second doped region, wherein the first vertical conductive structure is electrically connected to and adjacent to the first doped region.