Patent ID: 8658486
Filing Date: 2014-02-25
Classification: H01L

Abstract:
1. A method of forming a semiconductor structure on a substrate, the method comprising: preparing a continuous active layer on a region of the substrate; depositing a first raised epitaxial layer on a first region of the continuous active layer; depositing a second raised epitaxial layer on a second region of the continuous active layer, wherein the first raised epitaxial layer is in close proximity to the second raised epitaxial layer; forming, prior to the depositing of the first and the second raised epitaxial layer, transistor gate structures associated with the first raised epitaxial layer and the second raised epitaxial layer on the continuous active layer; etching, using a first cut mask, a dummy gate region associated with the formed transistor gate structures prior to the depositing of the first and the second raised epitaxial layer on a continuous active region within the continuous active layer; etching, using a second cut mask, a trench structure into the continuous active layer at both the first and the second raised epitaxial layer; and filling the trench structure with isolation material, the isolation material electrically isolating the first raised epitaxial layer from the second raised epitaxial layer.