Patent ID: 6559892
Filing Date: 2003-05-06
Classification: H04N

Abstract:
A video signal transmission apparatus, comprising:a first PLL circuit having a first cutoff frequency lower than a frequency of a horizontal synchronization signal contained in a digital video signal, having the characteristic of causing attenuation of a phase modulation component of a frequency higher than the first cutoff frequency, and generating a first transmission clock signal of a frequency of N (integer of 2 or more) times a first dot clock signal for identifying one pixel's worth of data of the digital video signal and phase locked looped to the first dot clock signal; a first conversion means for generating a serial signal from a plurality of parallel input element signals comprising the digital video signal based on the first dot clock signal and the first transmission clock signal; a transmission channel for transmitting the serial signal; a second PLL circuit having a second cutoff frequency higher than the frequency of the horizontal synchronization signal, tracking a phase modulation of a frequency lower than the second cutoff frequency, and generating a second transmission clock signal from said serial signal input via the transmission channel; a frequency division circuit for dividing the second transmission clock signal to 1/N to generate a second dot clock signal; and a second conversion means for generating a plurality of element signals to be output in parallel from a serial signal input through the transmission channel based on the second dot clock signal and the second transmission clock signal.