Patent ID: 8401339
Filing Date: 2013-03-19
Classification: G06F,G06K,G06T,G09G,H04N

Abstract:
1. A digital image processing apparatus to process video data information of a captured input digital image comprising: a first programmable register to store a first value that corresponds to the captured input digital image width; a second programmable register to store a second value that corresponds to the captured input digital image height; a third programmable register to store a third value that corresponds to a first size information of a first quadrangle digital image; a fourth programmable register to store a fourth value that corresponds to a first location information of the first quadrangle digital image within the captured input digital image, wherein the first quadrangle digital image comprises a first portion of the captured input digital image; a fifth programmable register to store a fifth value that corresponds to a second size information of a second quadrangle digital image; a sixth programmable register to store a sixth value that corresponds to a second location information of the second quadrangle digital image within the captured input digital image, wherein the second quadrangle digital image comprises a second portion of the captured input digital image; a first logic circuitry that is coupled to the first, second, third, fourth, fifth, and sixth programmable registers, and is configured to: a second logic circuitry that is coupled to the first memory device, the third programmable register, and the fourth programmable register, and is configured to: a third logic circuitry that is coupled to the first buffer and a fourth logic circuitry, and is configured to: the fourth logic circuitry, which is coupled to a first output port, and is configured to: