Patent ID: 6498379
Filing Date: 2002-12-24
Classification: H01L

Abstract:
A semiconductor device, comprising:a semiconductor substrate in which a peripheral area and a cell area are defined; first and second gate insulating layers on the semiconductor substrate of the peripheral area and the cell area; first and second gate electrodes on the first and second gate insulating layers, respectively; first and second heavily doped source/drain regions in the semiconductor substrate to a first depth at both sides of the first and second gate electrodes, respectively; first and second lightly doped source/drain regions in the semiconductor substrate to a second depth different from the first depth, adjacent to the first and second heavily doped source/drain regions, respectively, wherein the first and second lightly doped source/drain regions have a different length; and a silicide layer on the first and second gate electrodes and in the first and second heavily doped source/drain regions.