Patent ID: 7032064
Filing Date: 2006-04-18
Classification: G11C

Abstract:
1. A single chip embedded microcontroller comprising, a processor, a first non-volatile erasable PROM array having a communication link with said processor, said processor capable of reading, erasing and writing information to and from said first non-volatile erasable PROM, wherein said erasing of said first non-volatile erasable PROM array is performed on a plurality of bytes, and where said first non-volatile erasable PROM array is an OTPROM, a second non-volatile erasable PROM array having a communication link with said processor, said processor capable of reading, erasing and writing information to and from said second non-volatile erasable PROM, wherein said erasing of said second non-volatile erasable PROM array is performed on a single byte, a high voltage generator having a communication link with said processor, said high voltage generator generating two or more different erase and write voltages, a switch communicating with said high voltage generator, said switch connects said two or more different erase and write voltages between said first and second non-volatile erasable PROM arrays, and said first non-volatile erasable PROM array contains an operating system which controls said single chip embedded microcontroller and alternately provides said two or more different erase and write voltages to said first and second non-volatile erasable PROM arrays.