Patent ID: 6365954
Filing Date: 2002-04-02
Classification: H01L

Abstract:
A stacked capacitor formed at the surface of a semiconductor substrate of a first conductivity type, comprising:a bottom plate including a well having a material of a second conductivity type diffused to a lightly doped concentration into the surface of the semiconductor substrate and a first plurality of interconnected conductive layers of a first conductive material disposed above and aligned with said well, whereby a first conductive layer of the first plurality of conductive layers is connected to the well by multiple contacts distributed over an area of said well; a top plate including a second conductive layer placed between the well and the first conductive layer of a second conductive material, having openings distributed over a surface area of said second conductive material to allow the multiple contacts to connect the well and the first conductive layer, and a second plurality of interconnected conductive layers of the first conductive material connected to the second conductive layer and interleaved between each layer of the first plurality of conductive layers; and a dielectric having a plurality of insulating layers to electrically isolate the well from the second conductive layer, the second conductive layer from the first conductive layer, and the first plurality of interconnected conductive layers from the second plurality of interconnected conductive layers.