Patent ID: 8674426
Filing Date: 2014-03-18
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a stacked body including a plurality of insulating films alternately stacked with a plurality of electrode films; a semiconductor pillar buried in the stacked body, and extending in a stacking direction of the insulating films and the electrode films; and a charge storage layer provided between the electrode films and the semiconductor pillar, one of the electrode films being divided into a first control gate electrode and a second control gate electrode in a direction perpendicular to the stacking direction, the first control gate electrode and the second control gate electrode sandwiching the semiconductor pillar, wherein lengths of each portion facing each of the first control gate electrode and the second control gate electrode on an outer edge of the semiconductor pillar in a section orthogonal to the stacking direction are mutually different, wherein a through-hole is formed in the stacked body, the semiconductor pillar being disposed in the through-hole, and the first control gate electrode and the second control gate electrode face the semiconductor pillar in the section, and a central axis of the semiconductor pillar is spaced from a straight line connecting the middle points of portions other than portions configuring the through-holes in the end edges opposing each other of the first control gate electrode and the second control gate electrode.