Patent ID: 7536531
Filing Date: 2009-05-19
Classification: G06F

Abstract:
1. A method for scaling address space utilization in a multi-threaded, multi-processor computer, the method comprising: attaching, to process memory of an exporting process, a region of virtual memory specified in a cross-memory descriptor; requesting, by an importing thread of an importing process having process memory, attachment of the region of virtual memory for exclusive use by the importing thread; and attaching, by an operating system to the process memory of the importing process, the region of virtual memory for exclusive use by the importing thread, thereby creating a lightweight attachment of the region of virtual memory; wherein attaching the region of virtual memory for exclusive use by the importing thread further comprises attaching the region of virtual memory only after resetting segment lookaside buffers if the requested region of virtual memory is larger than a quantity of process memory available from a pool of process memory of the importing process reserved for lightweight attachments; detaching the attachment to the process memory of the exporting process, including determining that all lightweight attachments to the region of virtual memory have been detached, comparing a time of a last lightweight detachment from the region of virtual memory to the time of the last address space switch on each processor in the computer, and detaching the region of virtual memory from the process memory of the exporting process if the time of the last lightweight detachment from the region of virtual memory is earlier than the time of the last address space switch on each processor in the computer.