Patent ID: 9111953
Filing Date: 2015-08-18
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a lower electrode on a substrate, the lower electrode including a seam therein; a dielectric conformally covering the lower electrode; an upper electrode covering the dielectric; a cell gate electrode in the substrate with a gate insulating layer interposed between the substrate and the cell gate electrode; a first doped region in the substrate adjacent to a first side of the cell gate electrode and electrically connected to the lower electrode; a second doped region in the substrate adjacent to a second side of the cell gate electrode; a contact plug interposed between the first doped region and the lower electrode; and an adhesion layer interposed between the contact plug and the lower electrode, wherein: a central portion of a top surface of the lower electrode is substantially coplanar with or higher than an edge portion of the top surface of the lower electrode; the lower electrode comprises a titanium nitride layer; and the adhesion layer comprises a titanium layer.