Patent ID: 6657228
Filing Date: 2003-12-02
Classification: G02F,H01L

Abstract:
A semiconductor device comprising:a first circuit having a first thin film transistor formed over a substrate, said first thin film transistor comprising: a first semiconductor layer having a first channel region and first source and drain regions; and a first gate electrode formed adjacent to said first channel region with a first gate insulating film interposed therebetween, a second circuit having a second thin film transistor formed over said substrate, said second thin film transistor comprising: a second semiconductor layer having a second channel region and second source and drain regions; and a second gate electrode formed adjacent to said second channel region with a second gate insulating film interposed therebetween, wherein said first circuit is selected from the group consisting of a shift register, a CPU, a memory circuit and a decoder circuit, wherein said second circuit is a driver circuit having at least one of a high withstand voltage circuit and a buffer circuit, wherein a thickness of said first gate insulating film is smaller than that of said second gate insulating film.