Patent ID: 7419874
Filing Date: 2008-09-02
Classification: H01L

Abstract:
1. A method of manufacturing a semiconductor device comprising a capacitor and a MOS transistor on a front surface of a same semiconductor substrate, the method comprising: forming element isolation films on the substrate to define a capacitor formation region and a transistor formation region; implanting impurity ions into the capacitor formation region to form a lower electrode layer; forming a first insulation film to cover the element isolation films, the capacitor formation region and the transistor formation region; forming a patterned photoresist layer on the first insulation film to cover an edge of one of the element isolation films defining the capacitor formation region and to cover the transistor formation region; etching the first insulation film using the patterned photoresist layer as a mask to expose the lower electrode layer; forming a second insulation film on the exposed lower electrode layer so that the second insulation film and the first insulation film covering the edge of the one of the element isolation films form a capacitor insulation film; and forming a gate electrode on the first insulation film of the transistor formation region and an upper electrode layer on the capacitor insulation film.