Patent ID: 7907104
Filing Date: 2011-03-15
Classification: G09G,G11C

Abstract:
1. A luminescent display device that comprises: a display that includes a plurality of gate lines and a plurality of data lines that extend orthogonally to the gate lines; a first shift register connected to one end of each of the gate lines, and adapted to sequentially supply first scan pulses to the gate lines; a second shift register connected to the other end of each of the gate lines, and adapted to sequentially supply second scan pulses to the gate lines, wherein an output time of the first scan pulse to be supplied to a one gate line is different from an output time of the second scan pulse to be supplied to the one gate line, and wherein the period of time between the point of time when the first scan pulse is output and the point of time when the second scan pulse is output corresponds to one subfield period; switching elements adapted to switch an ON voltage or an OFF voltage from one of the data lines in accordance with the first scan pulse from one of the gate lines, and to switch an OFF voltage from the associated data line in accordance with the second scan pulse from the associated gate line; drive switching elements adapted to generate current in accordance with the ON voltage from an associated one of the switching elements, wherein the drive switching elements are turned off in accordance with the OFF voltage from the associated switching element; capacitors connected between gate and source terminals of one of the drive switching elements; and light emitting elements adapted to emit light in accordance with the current from an associated one of the drive switching elements; wherein the first shift register includes a plurality of stages that supply a first scan pulse to an end of one of the gate lines; wherein the second shift register includes a plurality of stages that supply a second scan pulse to an end of one of the gate lines; wherein a first one of the stages included in the first shift register includes: first, third, fifth, and seventh clock transfer lines that transfer the first, third, fifth, and seventh ones of the first through eighth clock pulses output in a sequential manner; first and second power lines that transfer first and second voltages that have different polarities; a first switching element that responds to a first start pulse synchronous with the seventh clock pulse, the first switching element that outputs the first start pulse in response to the first start pulse; a second switching element that supplies the first start pulse output from the first switching element in response to the seventh clock pulse from the seventh clock transfer line; a third switching element that outputs the first clock pulse from the first clock transfer line as a first scan pulse in response to the first start pulse supplied to the first node, and supplies the first scan pulse to one end of the associated gate line and to the downstream stage; a capacitor connected to the first node at one terminal of the capacitor; a fourth switching element that connects the other end of the capacitor and one end of the associated gate line in response to the first start pulse supplied to the first node: a fifth switching element that supplies the first voltage to a second node in response to the third clock pulse from the third clock transfer line; a sixth switching element that supplies the second voltage to the first node in response to the first voltage supplied to the second node, to turn off the third and fourth switching elements; a seventh switching element that supplies the second voltage to one end of the associated gate line and to the downstream stage in response to the first voltage supplied to the second node; an eighth switching element that supplies the second voltage to the second node in response to the first start pulse, to turn off the sixth and seventh switching elements; and a ninth switching element that supplies the second voltage to the second node in response to a second start pulse synchronous with the eighth clock pulse, to turn off the sixth and seventh switching elements.