Patent ID: 6194266
Filing Date: 2001-02-27
Classification: H01L,Y10S

Abstract:
A method for fabricating a capacitor for a DRAM device, comprising:providing a semiconductor substrate, said semiconductor substrate comprises a polysilicon layer having an insulating layer disposed thereon;forming an undoped storage node upon said insulating layer as a lower electrode of the capacitor, wherein said undoped storage node comprises amorphous selective hemispherical grained (S-HSG) silicon layer;annealing said undoped storage node under an ambience having first dopant for dopant in-diffusion;implanting said undoped storage node with second dopant;performing a wet clean procedure after the implanting step;forming a capacitor dielectric layer on said lower electrode; andforming a polysilicon layer on said capacitor dielectric layer as an upper electrode of the capacitor.