Patent ID: 6545315
Filing Date: 2003-04-08
Classification: H01L

Abstract:
A method of forming a trench DMOS transistor cell comprising the steps of:providing a substrate of a first conductivity type; forming a body region on the substrate, said body region having a second conductivity type; forming a masking layer defining at least one trench; forming the trench defined by the masking layer, said trench extending through the body region and into the substrate; forming an insulating layer that lines the trench; forming a conductive electrode in the trench overlying the insulating layer; and forming a source region of the first conductivity type in the body region adjacent to the trench, wherein the step of forming the trench includes the steps of etching the trench and smoothing sidewalls of the trench with a sacrificial oxide layer before removal of the masking layer that defines the trench, and further wherein the step of forming the conductive electrode in the trench overlying the insulating layer includes the step of depositing a layer of undoped polysilicon followed by the step of depositing a layer of doped polysilicon.