Patent ID: 7786595
Filing Date: 2010-08-31
Classification: H01L

Abstract:
1. A chip-stacked package structure with leadframe having bus bar, comprising: a leadframe, composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein said die pad is provided between said plurality of inner leads arranged in rows facing each other and vertically distant from said plurality of inner leads; an offset chip-stacked structure formed with a plurality of chips stacked together, said offset chip-stacked structure being set on said die pad and electrically connected to said plurality of inner leads arranged in rows facing each other; and an encapsulant, covering said offset chip-stacked structure and said leadframe, said plurality of outer leads extending out of said encapsulant; wherein said leadframe comprises at least a bus bar provided between said plurality of inner leads arranged in rows facing each other and said die pad, said bus bar and said die pad being vertically at the same height; and wherein said each chip comprising: