Patent ID: 6306213
Filing Date: 2001-10-23
Classification: G02F,G09G,H01L

Abstract:
A method for fabricating a semiconductor circuit having at least one pair of complementary p-channel and n-channel thin film transistors, said method comprising:forming an amorphous semiconductor film on an insulating surface utilizing disilane or trisilane by low pressure chemical vapor deposition;crystallizing said amorphous semiconductor film to form crystalline semiconductor film; andetching said crystalline semiconductor film to form a first semiconductor island for said n-channel thin film transistor and a second semiconductor island for said p-channel thin film transistor,wherein at least a channel region between a source region and a drain region of said first semiconductor island comprises boron at a concentration of 1.times.10.sup.15 to 1.times.10.sup.18 atoms/cm.sup.3 to control a threshold voltage of said n-channel thin film transistor to be substantially same as a threshold voltage of said p-channel thin film transistor.