Patent ID: 6029248
Filing Date: 2000-02-22
Classification: G06F

Abstract:
A computer having a system for protecting a powered component from being corrupted by an attached, powered-off component, comprising:an integrated circuit having a locking register; anda microcontroller coupled to said integrated circuit, said integrated circuit selectively powering said microcontroller on and off, wherein when said integrated circuit powers said microcontroller off said locking register is locked thereby preventing said integrated circuit from executing instructions issued by said microcontroller, said integrated circuit being coupled to a universal serial bus and including a control interface, said microcontroller being coupled to said control interface and accessing said integrated circuit through said control interface, said integrated circuit powering said microcontroller on and off through said control interface when said universal serial bus is idle for a specified period of time, and said integrated circuit including a plurality of registers and said control interface including a write line such that when activity resumes on said universal serial bus said integrated circuit powers said microcontroller back on and said microcontroller writes an unlock sequence of data bits to said locking register, wherein said integrated circuit resumes executing instructions issued by said microcontroller when said unlock sequence unlocks said locking register, said locking register remaining locked thereby preventing said integrated circuit from executing any instructions issued by said microcontroller when said unlock sequence fails to unlock said locking register, and said unlock sequence only unlocking said locking register when said correct unlock sequence is written to said locking register with no intervening writes by said attached component to any one of said registers other than said locking register and no intervening reads by said attached component to any one of said registers.