Patent ID: 7041536
Filing Date: 2006-05-09
Classification: G06K,H01L

Abstract:
1. A method for manufacturing a semiconductor integrated circuit device comprising the steps of: forming a plurality of circuit patterns on a substrate; bonding a plurality of semiconductor integrated circuit chips onto a first surface of the substrate having the circuit patterns formed thereon, and connecting electrodes of the semiconductor integrated circuit chips to each of the circuit patterns; applying a first seal resin onto each of the semiconductor integrated circuit chips; disposing a first reinforcement metal plate above the first seal resin; applying a second seal resin onto a second reinforcement metal plate; disposing the second reinforcement metal plate on a second surface of the substrate with the second seal resin therebetween; pressurizing the first and second seal resins via the first and second reinforcement metal plates so as to let flow the first seal resin along a peripheral faces of each of the semiconductor integrated circuit chips; hardening the seal resins flown along the peripheral faces of the semiconductor integrated circuit chips; and thereafter dividing the substrate into a semiconductor integrated circuit device at every semiconductor integrated circuit chip.