Patent ID: 6320440
Filing Date: 2001-11-20
Classification: H03K

Abstract:
A method for selectively enabling one of at least first and second circuit alternatives of an integrated circuit by means of selection circuit means controlled by a bistable circuit means, the selection circuit means having first and second states, the first and second states associated with the first and a second circuit alternatives, respectively, the first state being a preferred state, the method comprising the following steps:providing the bistable circuit means with two circuit branches, a first circuit branch comprising a first and a second transistor, a second circuit branch comprising a third and a fourth transistor;providing said first and fourth transistors with a turn-on voltage lower, in absolute value, than the turn-on voltage of the second and third transistors;testing the first circuit alternative;placing the bistable circuit means in the second state;testing the second circuit alternative;choosing between the first and second alternatives; andplacing the bistable circuit means in the first or second state according to the chosen alternative.