Patent ID: 9148078
Filing Date: 2015-09-29
Classification: H02M,H02P,H03K

Abstract:
1. A switch driving circuit comprising: a switch signal generation portion that generates a first switch signal and a second switch signal to complementarily turn on/off a first switch whose first terminal is connected to an application terminal for a first voltage and a second switch whose first terminal is connected to a second terminal of the first switch and whose second terminal is connected to an application terminal for a second voltage that is lower than the first voltage; a first driver portion that receives an input of the first switch signal to generate a first gate signal for turning on/off the first switch; a second driver portion that receives an input of the second switch signal to generate a second gate signal for turning on/off the second switch; and a dead time setting portion that sets a first dead time which extends from a time when the first switch is turned off to a time when the second switch is turned on, and a second dead time which extends from a time when the second switch is turned off to a time when the first switch is turned on; wherein at least one of the first driver portion and the second driver portion includes a slew rate setting portion that changes a slew rate of each gate signal in accordance with a slew rate setting signal; and the dead time setting portion variably controls at least one of the first dead time and the second dead time in accordance with at least one of the slew rate setting signal and the first voltage.