Patent ID: 7603575
Filing Date: 2009-10-13
Classification: G06F,Y02D

Abstract:
1. An apparatus comprising: at least one digital logic circuit; and a power control circuit operable to adjust the voltage of a power signal supplied to the at least one digital logic circuit in response to a change in a clock frequency provided to the at least one digital logic circuit; wherein the power control circuit is operable to increase the voltage of the power signal applied to the digital logic circuit before a clock frequency increase is made and is operable to decrease the voltage of the power signal applied to the digital logic circuit after a clock frequency decrease is made; wherein the adjusted voltage is determined based on at least one of a temperature of the at least one digital logic circuit, a semiconductor process parameter of the at least one digital logic circuit, and a highest operating frequency within the at least one digital logic circuit; wherein the temperature of the at least one digital logic circuit, the semiconductor process parameter of the at least one digital logic circuit, and the highest operating frequency within the at least one digital logic circuit are stored in a table.