Patent ID: 6417705
Filing Date: 2002-07-09
Classification: H03K,H03L

Abstract:
An output driver circuit comprising:an adjustable output stage that is coupled to receive an input signal and a control signal, wherein the adjustable output stage has an associated driver strength that varies in response to the control signal; and a control circuit that is coupled to the adjustable output stage, the control circuit comprising a delay locked loop (DLL) circuit and a scaled adjustable output stage, wherein the control circuit generates the control signal as a function of a propagation delay of the scaled adjustable output stage that is detected by the DLL circuit, the DLL circuit comprising a clock circuit, a delay detector, and an output stage controller, wherein the clock circuit is coupled to receive a clock signal and generate an internal input signal and a reference signal in response to the clock signal, the internal input signal is propagated through the scaled adjustable output stage to provide the propagation delay, the delay detector is coupled to the clock circuit and configured to compare the propagation delay to the reference signal and generate a comparison signal in response thereto, and the output stage controller is coupled to the delay detector and the scaled adjustable output stage and is configured to generate the control signal as a function of the comparison signal, and the output stage controller comprising an up/down counter, a filter circuit, and a flip-flop circuit, wherein the up/down counter is coupled to receive the comparison signal, and configured to generate a count that is dependent on the comparison signal, the filter circuit is coupled to receive the comparison signal and generate a strobe signal, and the flip-flop circuit is coupled to the up/down counter and the filter circuit such that the flip-flop circuit is configured to store the count generated by the up/down counter when enabled by the strobe signal.