Patent ID: 9029229
Filing Date: 2015-05-12
Classification: H01L

Abstract:
1. A method comprising: forming a pair of first openings extending vertically through a sacrificial layer, a dielectric layer, and a first semiconductor layer and into a semiconductor substrate; performing an etch process that laterally expands and merges said first openings within said semiconductor substrate only so as to create a trench; depositing dielectric material on said sacrificial layer to fill upper portions of said first openings above said trench, thereby creating a trench isolation region; removing said sacrificial layer; forming a second semiconductor layer on said dielectric layer, said second semiconductor layer being any one of amorphous and polycrystalline; forming a second opening extending vertically through said second semiconductor layer and said dielectric layer to expose a monocrystalline portion of said first semiconductor layer between said first openings; and epitaxially depositing a third semiconductor layer on said second semiconductor layer and in said second opening such that said third semiconductor layer has polycrystalline section on said second semiconductor layer and a monocrystalline section on said monocrystalline portion of said first semiconductor layer in said second opening.