Patent ID: 8242533
Filing Date: 2012-08-14
Classification: H01L

Abstract:
1. A semiconductor lateral device formed on a surface of a lightly-doped semiconductor substrate of a first conductivity type comprising at least one Schottky diode of a first kind and/or at least one Schottky diode of a second kind; wherein said Schottky diode of a first kind comprises at least a zero voltage region with the same potential as that of the substrate, a first floating voltage region with a voltage variable from zero to a largest reverse bias voltage, and a first voltage sustaining region between said zero voltage region so and said first floating voltage region; wherein said Schottky diode of a second kind comprises at least a second floating voltage region with a voltage variable from a largest reverse bias voltage to zero, a largest voltage region and a second voltage sustaining region in the surface between said second floating voltage region and said largest voltage region; wherein said substrate is defined as having smallest voltage and is taken as the reference of potential; when the first conductivity type is p-type and the second conductivity type is n-type, the value of said largest voltage is positive, each floating voltage region and said largest voltage region have positive potentials; when the first conductivity type is n-type and the second conductivity type is p-type, the value of said largest voltage is negative, each floating voltage region and said largest voltage region have negative potentials, being lower than that zero potential of said substrate; wherein each of said two voltage sustaining regions comprises: at least an n-type semiconductor layer, at least a layer of a second conductivity type contacted with the substrate and layers of different conductivity types arranged alternatively starting from said substrate to semiconductor surface; wherein in each of said two voltage sustaining regions, a cathode region of each kind of Schottky diode is formed on top of a portion having the highest potential under a reverse bias; an anode region is formed on top of the portion having the lowest potential; said n-type semiconductor of said voltage sustaining region in both cathode region and anode region have two conductor layers be contacted with, said two conductor layers form cathode and anode of said Schottky diode; wherein said conductor on the portion having the lowest potential is metal, said metal and said n-type semiconductor region beneath said metal form Schottky junction; said metal is the anode of the Schottky diode; said Schottky junction has a current flow from said metal to said n-type semiconductor region beneath said metal, when a positive voltage is applied from said metal to said n-type semiconductor region, said current in said n-type semiconductor region is mainly due to a flow of electrons; said semiconductor layer of second conductivity type in contact directly with the substrate is contacted to the region having the largest voltage in the voltage sustaining region, and other semiconductor layers of second conductivity type are connected to the region having the largest voltage through a part of semiconductor of second conductivity type close to it, or through said metal forming Schottky junction; wherein each semiconductor layer of a first conductivity type is at least partly contacted directly to the region having the smallest voltage at finger edges or at the finger ends of the interdigitated layout; wherein the overall thickness of said surface voltage sustaining region should be less than that of depletion region of a one-sided abrupt parallel-plane junction made by the same substrate under a reverse bias close to the breakdown voltage; wherein the semiconductor layer of a second conductivity type in contact with the substrate is defined as the first layer; the density of the impurity of said first layer can vary with distance but should be not larger than 2D wherein at place(s) close to the largest voltage region, the value of impurity density of each layer of each voltage sustaining region should be not larger than 2D wherein the overall effective impurity density, being obtained by subtracting the sum of the effective impurity density of layers of a first conductivity type from the sum of the effective impurity density of layers of a second conductivity type, decreases gradually or stepwisely with the increase of the distance from the portion having the largest voltage in the voltage sustaining region, and approaches zero at the portion having the smallest voltage region; wherein said impurity density is obtained by dividing the sum of the number of ionized impurity in a surface area, said surface area has dimensions in any direction much smaller than the thickness of the depletion region of a one-sided abrupt parallel-plane junction made by the same substrate under a largest reverse bias; when the voltage of the largest voltage region approaches that of the smallest voltage region, except first layer of said voltage sustaining region, each layer has only a small part corresponding to the built-in potential being depleted.