Patent ID: 7555699
Filing Date: 2009-06-30
Classification: G06F

Abstract:
1. A storage control circuit comprising: a storage unit to store data in a storage area specified by an address; a check code generation unit to generate, based on data written to the storage unit and the address specified to write the data, a check code to be stored in the storage unit in correspondence with the data written to the storage unit; and a check code inspection unit to conduct an error check based on data read from the storage unit, a check code corresponding to the data read, and the address specified to read the data, wherein the check code generation unit and the check code inspection unit generate a first code whose number of non-zero bits is an even number by encoding the first code assigned to the address with the even number of bits, and generate a second code whose number of non-zero bits is an odd number by encoding the second code assigned to the data written to the storage unit with the odd number of bits; and the check code generation unit and the check code inspection unit generate or inspect a check code corresponding to the data written or the data read based on the first and second codes.