Patent ID: 8138609
Filing Date: 2012-03-20
Classification: H01L,H05K

Abstract:
1. A semiconductor device comprising: a substrate having a plurality of line conductors which penetrate the substrate from a top surface of the substrate to a bottom surface of the substrate; a semiconductor chip secured in a semiconductor-chip accommodating hole of the substrate; a first insulating layer formed on the top surface of the substrate and on a top surface of the semiconductor chip; a first wiring layer formed on the first insulating layer, the first wiring layer in a first through hole of the first insulating layer being electrically connected to the semiconductor chip, and the first wiring layer in a second through hole of the first insulating layer being electrically connected to some of the plurality of line conductors exposed to the second through hole of the first insulating layer; a second insulating layer formed on the bottom surface of the substrate and on a bottom surface of the semiconductor chip; and a second wiring layer formed on the second insulating layer, the second wiring layer in a through hole of the second insulating layer being electrically connected to some of the plurality of line conductors exposed to the through hole of the second insulating layer.