Patent ID: 8954709
Filing Date: 2015-02-10
Classification: G06F

Abstract:
1. A memory management apparatus including: a region identification information management unit that relates virtual region identification information identifying a region in a memory to be allocated for a program executed in a virtualized environment to actual region identification information identifying a region in a memory to be allocated for a virtualized environment where the program is executed in each virtualized environment so as to manage respective identification information; an overlap determining unit that determines whether the actual region identification information is allocated for a plurality of virtualized environments in an overlapped manner; an overlap region management unit that, when the overlap determining unit determines that the actual region identification information is allocated for the plurality of virtualized environments in the overlapped manner, manages, for each virtualized environment, identification information that includes, the virtual region identification information and actual region identification information of the virtualized environment corresponding with overlap information representing an overlap, the overlap corresponding with the actual region identification information; and a TLB control unit that reads, when a virtualized environment as a switching source to which execution time is allocated is switched into a virtualized environment as a switching target, the actual region identification information allocated for the virtualized environment of the switching target from the region identification information management section, determines whether the read actual region identification information is allocated for the plurality of virtualized environments in the overlapped manner with reference to the overlap information in the overlap region management unit, and sets actual region identification information in the read actual region identification information determined as being allocated in the overlap manner as a target for a TLB process.