Patent ID: 7826995
Filing Date: 2010-11-02
Classification: G01R

Abstract:
1. An apparatus for testing an integrated circuit of a device, comprising: a holder to hold the device; a tester system having at least one output channel and an interconnection scheme to connect the channel to a contact of the device, the contact being connected to the integrated circuit; a computer system having memory; a parameter file stored in the memory; a user interface module stored in the memory, the user interface module allowing for setting of a variable in the parameter file; a test program stored in the memory, the test program having a series of instructions written for testing the integrated circuit; a test application that has a variable setting instruction that selects a value from a default value and the variable in the parameter file and the test application utilizes the test program and the variable in the parameter file to provide signals through the channel and the interconnection scheme to the contact.