Patent ID: 8115246
Filing Date: 2012-02-14
Classification: H01L,Y10S

Abstract:
1. A semiconductor device, comprising: a semiconductor layer including a convex portion and a concave portion surrounding the convex portion; a protrusion type isolation layer filling the concave portion and extending upward so that an uppermost surface of the isolation layer is at a level higher than an uppermost surface of the convex portion; at least one trench in the convex portion; at least one gate structure in the at least one trench, the at least one gate structure having a gate insulating layer and a gate conductive layer that are buried in the semiconductor layer, and an uppermost surface of the at least one gate structure being at a level lower than the uppermost surface of the isolation layer; and a contact plug on and electrically connected to a source/drain region of the convex portion, the contact plug being surrounded by the isolation layer.