Patent ID: 7141881
Filing Date: 2006-11-28
Classification: H01L

Abstract:
1. A semiconductor device, comprising: a first interconnection layer comprising a first interlayer insulation film and a first interconnection pattern formed in said first interlayer insulation film so as to be exposed at a surface of said first interlayer insulation film, said first interlayer insulation film and said first interconnection pattern forming a common first planarized principal surface; a second interconnection layer comprising a second interlayer insulation film formed on said first interlayer insulation film and a second interconnection pattern formed in said second interlayer insulation film so as to be exposed at a surface of said second interlayer insulation film, said second interlayer insulation film and said second interconnection pattern forming a common second planarized principal surface; and a third interconnection layer comprising a third interlayer insulation film formed on said second interlayer insulation film and a third interconnection pattern formed in said third interlayer insulation film so as to be exposed at a surface of said third interlayer insulation film, said third interlayer insulation film and said third interconnection pattern forming a common third planarized principal surface; said second interconnection pattern being connected to said first interconnection pattern by a plurality of via-plugs extending through said second interlayer insulation film and forming a first via-plug group, said third interconnection pattern being connected to said second interconnection pattern by a plurality of via-plugs extending through said third interlayer insulation film and forming a second via-plug group, said first via-plug group including said plural via-plugs therein with a number such that a via-plug density defined as a ratio of a total area of said via-plugs forming said first via-plug group and included in a unit area to a total area of said via-plugs forming said first via-plug group and disposed in said unit area with a maximum possible number according a design rule, takes a first density value, said second via-plug group including said plural via-plugs therein with a number such that a via-plug density defined as a ratio of a total area of said via-plugs forming said second via-plug group and included in a unit area to a total area of said via-plugs forming said second via-plug group and disposed in said unit area with a maximum possible number according a design rule, takes a second density value, said first density value being smaller than said second density value, said design rule being set such that said via-plugs are disposed with a minimum pitch of 0.4 μm in any of said first and second via-plug groups, said second density value being 70% or less.