Patent ID: 6785617
Filing Date: 2004-08-31
Classification: G01B,H01L

Abstract:
A method for wafer analysis, comprising the steps of:providing a wafer with a plurality of pattern groups formed thereon, each of the pattern groups having a plurality of patterns simultaneously defined by one shot in a development manufacturing process, the patterns of the pattern groups including defective patterns failing to comply with a testing condition; defining a plurality of specific distribution maps, wherein each of the specific distribution maps respectively refers to a defect pattern distribution in a pattern group; defining a plurality of distribution features, wherein each of the specific distribution maps are related to one of the distribution features; comparing each of the pattern groups on the wafer to each of the specific distribution maps in order to relate each of the pattern groups to at least one of the specific distribution maps; relating each of the pattern groups on the wafer indirectly to at least one of the distribution features while allocating each of the distribution features indirectly related to each of the pattern groups with a respective value according to the relation between the specific distribution maps and the distribution features; summing up the values associated with each of the distribution features on the wafer respectively to obtain total values of the distribution features; and determining the defective patterns from the total values of the distribution features.