Patent ID: 8680604
Filing Date: 2014-03-25
Classification: H01L

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a first region configured to function as a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and a second region provided in a periphery of the first region, the first region comprising: a first semiconductor layer including a columnar portion extending in a perpendicular direction with respect to a substrate; a charge storage layer formed on a side surface of the columnar portion; and a plurality of first conductive layers formed on the charge storage layer, and configured to function as a control electrode of the memory cells, and the second region comprising a plurality of second conductive layers formed in the same layer as the plurality of first conductive layers, the plurality of first conductive layers configuring a stepped portion at an end vicinity of the first region, the stepped portion being formed in a stepped shape such that positions of ends of the plurality of first conductive layers differ from one another, and the plurality of second conductive layers being formed such that positions of ends thereof at an end vicinity of the second region surrounding the first region are aligned in substantially the perpendicular direction to the substrate.