Patent ID: 9218881
Filing Date: 2015-12-22
Classification: G06F,G11C,H01L,Y10T

Abstract:
1. A NAND flash memory system comprising: a first block of flash memory cells in a NAND flash memory die, each flash memory cell of the first block including a charge storage element of a first physical size; a second block of flash memory cells in a data retention partition of the NAND flash memory die, each flash memory cell of the second block including a charge storage element of a second physical size that is larger than the first physical size, the second block storing critical information that is stored during a factory initialization procedure and is read in a Power on Read (POR); and a memory controller that is configured to receive cell size information from the NAND flash memory die, the cell size information identifying at least an address of the second block as corresponding to larger flash memory cells, and to select data to be sent to the address of the second block based on at least one property of the data.