Patent ID: 6303492
Filing Date: 2001-10-16
Classification: H01L

Abstract:
A method of forming a contact in an integrated circuit, the method comprising the steps of:(a) forming an active region in a silicon substrate;(b) forming a layer of dielectric material over the active region in the substrate;(c) forming a contact hole in the layer of dielectric material to expose at least a portion of the active region in the substrate, the contact hole having side walls and a longitudinal axis, and the exposed portion of the substrate forming a bottom surface of the contact hole;(d) implanting a dopant at a positive angle relative to the longitudinal axis to form a plug implantation region in the bottom surface of the contact hole which extends into the substrate beneath the dielectric material adjacent the side walls;(e) depositing a layer of titanium within the contact hole;(f) depositing a layer of titanium nitride over the layer of titanium;(g) annealing the substrate to form a layer of titanium silicide on the bottom surface; and(h) filling the contact hole with a conductive material.