Patent ID: 7499328
Filing Date: 2009-03-03
Classification: G11C

Abstract:
1. A non-volatile memory having a memory cell array for storing data electrically, comprising: a plurality of rows of memory cells, each of said rows of memory cells including a plurality of memory cell transistors having source and drain electrodes serially interconnected between neighboring ones of the memory cell transistors; a plurality of word lines each interconnecting gate electrodes of said memory cell transistors of said rows of memory cells; a plurality of bit lines interconnecting connecting points of said memory cell transistors of said rows of memory cells in a direction substantially perpendicular to said memory rows; a first drain selector connected to ones of said bit lines at a first interval for selecting the drain electrodes of said memory cell transistors on the one bit lines, the first interval corresponding to a predetermined number of said memory cell transistors; a second drain selector connected to other ones of said bit lines at a second interval for selecting the drain electrodes of said memory cell transistors on the other bit lines, the first interval being equal to a multiple of the second intervals, said other bit lines being shifted in position from the first interval by a value equal to one-half of the predetermined number of said memory cell transistors; and a source selector for selecting the source electrodes of said memory cell transistors, said source selector being connected to said bit lines lying intermediate between the bit lines to which said first and second drain selectors are connected; said first drain selector including a first plurality of transistors having a control electrode interconnected in common to respective one of a first corresponding plurality of signal lines any one of which is selectively activated by a row decoder, said second drain selector including a second plurality of transistors having a control electrode interconnected in common to a second signal line activatable by said row decoder.