Patent ID: 6289208
Filing Date: 2001-09-11
Classification: H03J,H03L

Abstract:
A receiver, comprising:a phase-locked loop circuit including a voltage-controlled oscillator, a variable frequency divider for frequency-dividing an output of said voltage-controlled oscillator, a reference oscillator, a phase detector for outputting a phase difference signal representing a phase difference between an output of said variable frequency divider and an output of said reference oscillator, and a filter for smoothing an output voltage of said phase detector, with a resultant voltage of said filter used as a control voltage fed to said voltage-controlled oscillator;a reception unit, tuned to a frequency corresponding to an oscillation frequency of said voltage-controlled oscillator, for receiving a signal having the oscillation frequency of said voltage-controlled oscillator;control voltage measuring means for measuring the control voltage supplied to said voltage-controlled oscillator and for measuring a voltage of an output signal of said reception unit that corresponds to the tuned frequency of said reception unit; andcontrol means for producing a signal that has a voltage value measured by said control voltage measuring means and supplying the signal to said voltage-controlled oscillator when the oscillation frequency of said phase-locked loop circuit is stabilized and said phased-locked loop is open, whereinsaid control means further controls said control voltage measuring means to measure a center voltage of the output signal from said reception unit for correcting the voltage value of the produced signal according to a frequency shift when a shift in the tuned frequency of said reception unit is detected by comparing the measured center voltage to an initial center voltage measured when said phase-locked loop circuit is first stabilized.