Patent ID: 8976901
Filing Date: 2015-03-10
Classification: H03B,H03C,H04B,H04L

Abstract:
1. A phase shift keying transmitter circuit comprising: a variable frequency conversion stage adapted to receive a first data signal, wherein the variable frequency conversion stage comprises a plurality of frequency modulating elements, wherein the first data signal controls the number of the plurality of frequency modulating elements that are operated so as to control an operating frequency of the variable frequency conversion stage; and an output stage configured to switch between one of two possible outputs, the signals provided by one of the two possible outputs having an opposite polarity to the other, wherein the output stage is configured to receive a second data signal to control the switching between the two possible outputs, wherein the output stage is coupled to the variable frequency conversion stage and wherein the switching between the two possible outputs changes the phase of a signal from the variable frequency conversion stage by 180°; a first terminal to which a first terminal of the variable frequency conversion stage is coupled; a second terminal to which a second terminal of the variable frequency conversion stage is coupled, wherein the first terminals of both the variable frequency conversion stage and the output stage and the second terminals of both the variable frequency conversion stage and the output stage are located along separate signal paths of the phase shift keying transmitter circuit; a first output port; and a second output port, the output ports having an electrical connection with the first and second terminals of the output stage, wherein in one of the two possible outputs, the first terminal of the output stage is coupled to the first output port and the second terminal of the output stage is coupled to the second output port; and wherein in the other of the two possible outputs, the first terminal of the output stage is coupled to the second output port and the second terminal of the output stage is coupled to the first output port.