Patent ID: 8516414
Filing Date: 2013-08-20
Classification: G06F

Abstract:
1. A behavioral synthesis device comprising: a receiving unit that receives input of a first behavioral level description expressing an electronic circuit that operates a predetermined application and is implemented using reconfigurable hardware; an adding unit that adds, to the first behavioral level description received by the receiving unit, a profile description that is a behavioral level description that causes the electronic circuit to collect profile information for the electronic circuit and output the collected profile information, and generates a second behavioral level description; a behavioral synthesis unit that subjects the second behavioral level description generated by the adding unit to behavioral synthesis and generates a first register transfer level description; a profile unit that configures a first configuration of the electronic circuit at the reconfigurable hardware based on the first register transfer level description generated by the behavioral synthesis unit, actuates the electronic circuit, and causes the electric circuit to output the profile information from the actuated electronic circuit; and an optimizer that generates optimization information for optimizing the behavioral synthesis carried out by the behavioral synthesis unit based on the profile information that the profile unit causes the electric circuit to output, and outputs the generated optimization information to the behavioral synthesis unit, wherein the collected profile information is output from the electronic circuit during operation of the predetermined application, the behavioral synthesis unit acquires the first behavioral level description, and subjects the acquired first behavioral level description to behavioral synthesis and generates a second register transfer level description based on the optimization information output by the optimizer, and the profile unit configures a second configuration of the electronic circuit during operation of the predetermined application at the reconfigurable hardware based on the second register transfer level description which is generated by the behavioral synthesis unit.