Patent ID: 6757879
Filing Date: 2004-06-29
Classification: G06F

Abstract:
A method for routing a plurality of signals of a design in a programmable logic device, said programmable logic device being divided into a plurality of non-overlapping areas, said design containing at least one global signal, at least one power signal, at least one ground signal and a plurality of local signals, each of said local signals being related to one of said plurality of areas, said method comprising:associating a respective area constraint property to each of said power signal, said ground signal and said plurality of local signals, said area constraint property containing routing information related to one of said plurality of areas; performing a first routing of said plurality of local signals and said global signal, each of said plurality of local signals being constrained by its associated area constraint property, said global signal not being constrained to one of said plurality of areas; and performing a second routing of said plurality of local signals and said global signal, said second routing including, for each of said plurality of local signals that spans more than one of said plurality of areas, removing its associated area constraint property.