Patent ID: 7321519
Filing Date: 2008-01-22
Classification: G11C

Abstract:
1. A method of adaptively programming, testing, and sorting magnetic random access memory array without on-chip algorithm generator but using an external tester comprising the steps of: a: programming & testing said memory array, b: signalling a good SRAM die if said programming & testing said memory array indicates a good die and branching to ‘g’, c: signaling a Fail if said programming and testing said memory array indicates a bad die, d: programming and testing said memory array for one time write, e: signalling a good one time programmed EPRom die if said programming and testing said memory array for one time write indicates a pass, followed by branching to ‘g’, f: signalling a Bad Die if said programming & testing said memory array for one time write indicates a Fail, g: signalling process complete.