Patent ID: 8710504
Filing Date: 2014-04-29
Classification: G02F,H01L

Abstract:
1. A flat display panel, comprising: a plurality of pixel electrodes arranged in a matrix; a plurality of scan lines in rows, parallel to one another and extended along a first direction, for transmitting scan signals; a plurality of data lines in columns, parallel to one another and extended along a second direction which is perpendicular to the first direction, for transmitting data signals; a plurality of thin-film transistors (TFTs), coupled to the plurality of pixel electrodes, the plurality of scan lines in rows, and the plurality of data lines in columns, the plurality of TFTs for conducting the data signals from the plurality of data lines to the plurality of pixel electrodes when receiving the scan signals from the plurality of d scan lines; and a plurality of blocking lines, parallel to and overlapped with the plurality of data lines in columns, the plurality of blocking lines not connected to one another, the plurality of blocking lines and the plurality of scan lines in rows made of the same metallic layer, wherein two of the plurality of blocking lines are placed at one side of each pixel electrode, and partially overlapped with the data lines.