Patent ID: 8264969
Filing Date: 2012-09-11
Classification: H04L

Abstract:
1. Apparatus, comprising: an integrator circuit comprising a first input for receiving a reference signal of reference pulses occurring at a uniform reference pulse rate and a second input for receiving an error event signal of error event pulses occurring at a variable error event pulse rate corresponding to a rate of detected error event occurrences, wherein the integrator circuit is operable to produce from the reference signal and the error event signal an integrator output signal with a value that approaches a first boundary threshold when the reference pulse rate exceeds the error event pulse rate and approaches a second boundary threshold when the error event pulse rate exceeds the reference pulse rate; and a decision circuit that has an input coupled to receive the integrator output signal from the integrator circuit, wherein the decision circuit is operable to set a decision signal with a first value in response to a determination that the value of the received integrator output signal meets a first decision threshold, wherein the decision circuit is operable to set the decision signal to a second value in response to a determination that the value of the received integrator output signal meets a second decision threshold.