Patent ID: 7702831
Filing Date: 2010-04-20
Classification: G06F,G06K,G07C

Abstract:
1. An electronic Multi Bit Cell (MBC) flash card adapted to be accessed by a host computer that is capable of establishing a communication link, said electronic MBC flash card comprising: a card body; a MBC flash memory device mounted on the card body, the MBC flash memory device including a plurality of non volatile memory cells for storing a data file, said memory cells being arranged in at least one of a plurality of memory blocks, a plurality of pages, and a plurality of sectors; an input/output interface circuit mounted on the card body for establishing communication with the host computer, wherein the input/output interface circuit includes a Universal Serial Bus (USB) interface circuit including means for transmitting said data file using a Bulk Only Transport (BOT) protocol; and a MBC flash memory controller mounted on the card body and electrically connected to said MBC flash memory device and said input/output interface circuit, wherein the MBC flash memory controller comprises: (a) means for determining whether the MBC flash memory device is supported by a processing unit of the MBC flash memory controller in accordance with a MBC flash detection algorithm code, (b) an index for storing a plurality of logical addresses and a plurality of physical addresses such that each said physical address is assigned to an associated said logical address, where each said physical address corresponds to an associated plurality of memory cells of the MBC flash memory device, and wherein the index comprises at least one look-up-table (LUT) for storing the logical addresses and the associated physical addresses, (c) means for selectively operating in one of: (d) a ROM for storing boot code (BC) that provides initial executing sequences for said processor unit to initialize said MBC flash memory controller; and (e) a SRAM for storing look-up-tables (LUT) for translation of a logical address from said host computer and a MBC flash physical address for said programming mode and said retrieving mode operations, wherein the MBC flash memory controller further comprises arbitration logic including means for assigning each said physical address to its associated said logical address.