Patent ID: 8145000
Filing Date: 2012-03-27
Classification: H04N

Abstract:
1. An image data compressing apparatus, comprising: a first register configured to store a plurality of data components of an original image data; a second register configured to store a first bit sequence comprising a first value and a second value, the second register comprising a first group of bits associated with zero data components in the plurality of data components and a second group of bits associated with non-zero data components in the plurality of data components, each bit of the first group being assigned the first value, each bit of the second group being assigned the second value, the second value different form the first value; a third register configured to store a value shifted from the first bit sequence by a first number; a first arithmetic logic unit configured to obtain the first number of the first value continuing in the second register and a significant bit length of at least one of the plurality of data components, configured to obtain a second number of the first value continuing in the third register, and configured to translate a combination of the first number and the significant bit length to a code; and a memory access unit configured to store the code as a part of a bit stream of a compressed image data.