Patent ID: 7237133
Filing Date: 2007-06-26
Classification: G06F,G11C,Y02D

Abstract:
1. In a situation of being mounted on a same chip together with a plurality of memory modules, a power supply control circuit for memories for controlling the power supply to each of said memory modules per module or per bank in the module comprising: an observation circuit for observing each circumstance of the memory modules per module or per bank in the module; a processor responsive to a circumstance observing result from said observation circuit for generating a power supply control signal per module or per bank correspondence in order to turn off a power supply with respect to a memory module or a bank which is actually in a vacant condition, in a disused condition or an unnecessary condition, said processor configured to relocate data from a first module into an unused portion of a partially used second module without fragmentation such that the first module is placed in the disused condition; and a power supply on/off circuit responsive to the power supply control signal from said processor for turning on/off each of the power supplies to the memory modules per module or per bank.