Patent ID: 7736957
Filing Date: 2010-06-15
Classification: H01L

Abstract:
1. A method for forming a semiconductor device comprising: providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate; forming a gate electrode over the gate dielectric; forming an insulating layer over a sidewall of the gate electrode; defining source and drain regions in the semiconductor substrate adjacent to the insulating layer; implanting a dopant in the source and drain regions of the semiconductor substrate to form doped source and drain regions; forming a sidewall spacer adjacent to the insulating layer and over a first portion of the source region and a second portion of the drain region; anisotropically etching, in an etch chamber, the source and drain regions including the first and second portions using a plasma etch with an active bias source; isotropically etching, in the etch chamber and after anisotropically etching, the source and drain regions using an isotropic etch process achieved by turning off the bias source to form a first recess in the semiconductor substrate in the source region and a second recess in the semiconductor substrate in the drain region, wherein the first recess and the second recess extend underneath the sidewall spacer a predetermined distance from a channel region; and forming a stressor material in the first recess and the second recess including underneath the sidewall spacer.