Patent ID: 6319731
Filing Date: 2001-11-20
Classification: H01L

Abstract:
A method for manufacturing a nonvolatile ferroelectric memory device comprising the steps of:asymmetrically defining first and second active regions at a certain interval;forming first and second split wordlines across the respective active regions;forming first and second plug layers to be connected with one sides of the first and second active regions and to be respectively extended to regions where first and second bitlines will be formed;forming first and second bitlines respectively connected with the first and second plug layers;forming third and fourth plug layers respectively connected with other sides of the first and second active regions;forming a lower electrode of a first ferroelectric capacitor on the second split wordline to be connected with the third plug layer and forming a lower electrode of a second ferroelectric capacitor on the first split wordline;forming a first ferroelectric film on the lower electrode of the first ferroelectric capacitor and forming a second ferroelectric film on the lower electrode of the second ferroelectric capacitor; andforming an upper electrode of the first ferroelectric capacitor on the first ferroelectric film, and forming an upper electrode of the second ferroelectric capacitor on the second ferroelectric film.