Patent ID: 6691252
Filing Date: 2004-02-10
Classification: G11C

Abstract:
A method of configuring a memory array to replace faulty memory cells with spare memory cells, comprising the steps of:(i) identifying a first address space including a faulty memory cell; (ii) attempting to supply data corresponding to a second address space to a content addressable memory; (iii) attempting to access at least one memory cell addressed in response to step (ii); (iv) writing, during at least some portion of a period including the performance of at least one of steps (ii) and (iii), data into said content addressable memory corresponding to said first address space; (v) reattempting to supply said data corresponding to said second address space to said content addressable memory; (vi) reattempting to access said at least one memory cell addressed in response to step (iv); and (vii) processing data from said at least one memory cell.