Patent ID: 6933238
Filing Date: 2005-08-23
Classification: H01L

Abstract:
1. A method for manufacturing a semiconductor element using Shallow Trench Isolation, comprising sequential steps of: forming, on a substrate on which a protection oxide film for protecting an active region and a nitride film to be used as an etching stopper are formed in this order, an insulation film for protecting the nitride film; etching the insulation film, the nitride film, the protection oxide film, and the substrate on the semiconductor element separation region to form a trench; etching the insulation film to widen its aperture toward an inside of the active region; performing a heat treatment to form a thermal oxidation film inside the trench; etching the nitride film using the insulation film with the widened aperture as a mask to move a step defined by the thermal oxidation film and the nitride film from an upper edge of the trench toward the inside of the active region; forming a filling oxide film for burying the trench; selectively etching the filling oxide film and the insulation film to expose the nitride film; etching the filling oxide film inside the trench so that a surface of the substrate is substantially level with a surface of the filling oxide film; and removing the nitride film and the protection oxide film.