Patent ID: 7375422
Filing Date: 2008-05-20
Classification: H01L

Abstract:
1. A stacked-type semiconductor package comprising: an external connection terminal; a first semiconductor chip; a first tape on which the first semiconductor chip is mounted and which is formed with a common path portion and a first path portion, wherein the common path portion extends from the external connection terminal to a diverging point, and the first path portion extends from the diverging point to the first semiconductor chip; an interconnection member connected to the diverging point; a second semiconductor chip; a second tape on which the second semiconductor chip is mounted and which is formed with a second path portion extending from the interconnection member to the second semiconductor chip, wherein the first tape comprises a first base which has top and bottom surfaces; the external connection terminals are arranged on the bottom surface of the first base; the first tape comprises a chip mount section and an outer section positioned outside the chip mount section; the chip mount section and the outer section are positioned on the top surface of the first base; the first semiconductor chip mounted on the chip mount section; and the diverging point is arranged on the outer section.