Patent ID: 6479328
Filing Date: 2002-11-12
Classification: H01L

Abstract:
A method of fabricating a SOI wafer, comprising the steps of:preparing a semiconductor substrate and a base substrate; forming a pad oxide layer, a nitride layer and a mask oxide layer in sequence on one surface of the semiconductor substrate; etching the pad oxide layer, the nitride layer and a mask oxide layer to expose an isolation region of the semiconductor substrate; forming a trench by etching the exposed semiconductor substrate region; removing the mask oxide layer; forming a spacer for preventing oxidation on the side wall of the trench; forming a field oxide layer in the isolation region having bird's-beak at the edge thereof by oxidizing the low surface of the trench using the spacer and the nitride layer as the oxidation preventing layer; removing the field oxide layer; filling the trench with oxide to form a trench type isolation layer; removing the nitride layer and the pad oxide layer; depositing a first insulating layer on the isolation layer and the semiconductor substrate; depositing a second insulating layer on the base substrate; bonding the semiconductor substrate and the base substrate to contact the first insulating layer with the second insulating layer; polishing the surface of the semiconductor substrate using the isolation layer as a polishing stopper; and further polishing the surface of the semiconductor substrate to expose the bird's beak, thereby forming a semiconductor layer of a desired thickness.