Patent ID: 7019354
Filing Date: 2006-03-28
Classification: H01L

Abstract:
1. An electrically erasable programmable read only memory (EEPROM) cell, comprising: an isolation layer formed at a semiconductor substrate to define an active region; a gate oxide layer formed on the semiconductor substrate; a source region, a buried N+ region and a drain region formed at the active region and spaced apart from each other; a cell depletion region formed at the active region between the buried N+ region and the drain region, the buried N+ region being in contact with the cell depletion region; a first channel region between the source region and the buried N+ region; a second channel region between the cell depletion region and the drain region; a memory gate formed over the first channel region and the buried N+ region; a selection gate formed over the second channel region; a tunnel region formed through the gate oxide layer, wherein the tunnel region is self-aligned to the buried N+ region; and a tunnel oxide layer formed between sidewalls of the tunnel region on the buried N+ region, wherein distances between the edges of the tunnel oxide layer and the buried N+ region are equidistant as a result of the tunnel region being self-aligned to the buried N+ region.