Patent ID: 7260668
Filing Date: 2007-08-21
Classification: G06F

Abstract:
1. A network processor, comprising: a master processor; a network coprocessor; at least one network node; a first bus system connected to the master processor; a second bus system connected to the at least one network node and the network coprocessor; a first network memory that stores first layer messages, the first network memory being connected to the second bus system, the first network memory containing messages to be read or written for the at least one network node; a second network memory that stores second layer messages, the second network memory being connected to the first bus system, the second network memory containing information serving to convert the first layer messages to be read or written; and a direct memory access device that directly connects the first bus system to the second bus system and allows for direct memory access between the second network memory and the network coprocessor through the first and second bus systems by passing data from the network coprocessor directly through the direct memory access device to the second network memory.