Patent ID: 8625627
Filing Date: 2014-01-07
Classification: G06F

Abstract:
1. An integrated circuit chip, comprising: a data input for receiving data from an external source; a data output for outputting data received at the data input from the chip; data transfer means for transferring data from the data input to the data output; a control signal output for outputting control signals from the chip; and a control signal generator for generating and transmitting control signals to said control signal output for controlling the transfer of data from an external source to said data output via said data input; further comprising: a second data input for receiving data from an external source; a memory for storing said data; a second data output for outputting data from the chip; and a control signal input for receiving control signals from an external source for controlling the transfer of data from said memory to said second data output; further comprising a code output for outputting code from the chip and code transmission means adapted to transmit from said code output error detection code associated with a data packet for enabling an error in said data packet to be detected; and further comprising a code memory for storing code associated with each data packet and a memory controller responsive to a signal at said control signal input to output a requested data packet from said memory and the associated code from said code memory.