Patent ID: 8836411
Filing Date: 2014-09-16
Classification: G05F,H02M

Abstract:
1. The charge pump comprising: a plurality of pump stages arranged in successive stages, including stage N and a plurality of stages prior to N, each pump stage of the plurality of pump stages including an output node, a first node, a first transistor coupled between an input node and the first node, and a second transistor coupled between the output node and the first node; wherein the second transistor of stage N is coupled to a different stage, before or after stage N, of the pump stages arranged in successive stages to acquire a reference voltage used to discharge the first node; wherein each pump stage has a precharge circuit associated therewith; and wherein at least one of the precharge circuits of stage N or a stage after stage N includes a third transistor and a fourth transistor, with a gate of the third transistor or the fourth transistor being coupled to a second node of another pump stage of the pump stages arranged in successive stages to provide self-biased buffering to prevent high voltage breakdown of a transistor in the precharge circuit.