Patent ID: 8943296
Filing Date: 2015-01-27
Classification: G06F

Abstract:
1. A method of translating virtual addresses to physical memory pages in a computer system, comprising: receiving a first binary representation of a virtual address to be translated; modifying the first binary representation to generate a second binary representation by copying M bit values from bit position N through bit position N−(M−1) of the first binary representation to bit position L through bit position L−(M−1) of the first binary representation, wherein the bit position L is more significant than the bit position N and M is at least one; and if the bit value at the bit position N is 0, traversing a first set of page tables using the second binary representation to obtain a first page table entry that points to a first physical memory page; and if the bit value at the bit position N is 1, traversing a second set of page tables, which is different from the first set of page tables, using the second binary representation to obtain a second page table entry that points to the first physical memory page.