Patent ID: 8110864
Filing Date: 2012-02-07
Classification: G11C,H01L

Abstract:
1. A nonvolatile semiconductor memory device, comprising: a gate insulation film disposed on a semiconductor substrate; a plurality of floating gate including first portions which are periodically arranged in a first direction on the same plane of the substrate and which contact the gate insulation film and whose sectional shapes cut by a plane including directions parallel to the first direction and vertical to the substrate are rectangular, and second portions which are positioned in middle portions of the first portions and whose sectional shapes cut by a plane including directions parallel to the first direction and vertical to the substrate are rectangular and whose lengths in the direction parallel to the first direction are smaller than those of the first portions; a plurality of control gates including third portions which are periodically arranged in the first direction in such a manner that the third portions are positioned between the plurality of floating gates and on side surfaces of the floating gates positioned on opposite end portions of the arrangement of the plurality of floating gates and which are positioned between the second portion of a pair of adjacent floating gates; and an inter-gate insulating film disposed to insulate between each of the plurality of floating gates and each of the plurality of control gates and between each of the plurality of control gates and the substrate, wherein a plurality of memory cells each constituted of each of the plurality of floating gates and a pair of control gates positioned on opposite sides of the floating gate are arranged, a pair of adjacent memory cells do not share one control gate positioned between the memory cells, and each floating gate is driven by capacitor coupling between the pair of control gates positioned on the opposite sides of each floating gate in each memory cell, and the plurality of control gates are not provided in a region between the first portions of the plurality of floating gates in the first direction.