Patent ID: 6819182
Filing Date: 2004-11-16
Classification: H03F

Abstract:
A circuit for a high isolation, high speed buffer amplifier capable of handling frequencies in the range of GHz, wherein the components are built using CMOS technology, is comprising:a basic amplifier stage comprising amplifying means using the push-pull mode having an input and an output, wherein the input are signals to be amplified and the output current at the output node has a high reverse isolation from said input signals and wherein said amplifying means comprise: a means to split and to amplify the input signals in several parallel signal paths; a means to mirror the amplified signal to reduce the output load required and to increase the reverse isolation; a means to stabilize the operation; and a capacitor and an additional capacitor parallel to a resistor being hooked up to the node where several signal paths are combined, which are being used to set a frequency dependent gain and to define a frequency bandwidth; a means of power supply for said circuit; and a current source for providing the bias current for said circuit.