Patent ID: 6177895
Filing Date: 2001-01-23
Classification: G06J

Abstract:
A selective digital integrator for receiving an analog signal, and selectively and digitally integrating components of the analog signal into a pre-defined number of channels in synchrony with a reference signal; said integrator comprising a reference interface, an analog-to-digital converter, and a processor; wherein:(a) said reference interface is adapted to receive the reference signal, to recognize a pre-defined portion of the reference signal, and to output a trigger signal to said processor each time the pre-defined portion of the reference signal occurs;(b) said analog-to-digital converter is adapted to convert the analog signal to a digital signal, and to output the digital signal directly to said processor; wherein the digital signal is not stored in memory before being output to said processor; and(c) said processor is adapted to integrate the digital signal from said analog-to-digital converter, as the digital signal is received by said processor, in synchrony with the trigger signals from said reference interface, into a pre-defined number of channels that is at least five.