Patent ID: 7702981
Filing Date: 2010-04-20
Classification: G01R

Abstract:
1. An apparatus comprising: a logic unit to issue a toggle command to start testing a device under test, a toggle unit coupled to the logic unit, wherein the toggle unit is to generate a toggling signal in response to receiving the toggle command, and a plurality of boundary scan cells comprising a first boundary scan cell and a second boundary scan cell coupled to the toggle unit and the logic unit, wherein the first boundary scan cell is to transfer the toggling signal on a first signal path during a first duration in response to receiving the toggling signal and a first signal from the logic unit and the second boundary scan cell is to inhibit the transfer of the toggling signal on a second signal path coupled to the second boundary scan cell during the first duration in response to receiving the toggling signal and a second signal from the logic unit, wherein the toggling signal transferred on the first signal path is used to test at least a portion of a device under test, wherein the first signal path does not comprise a test point to provide the toggling signal, wherein the toggling unit further comprises a multiplexer comprising a first input, a second input, a select input, and a first output, a flip-flop comprising a data input, a test input, a control input, and a second output, wherein the data input is coupled to the first output, and a logic gate comprising a third, fourth, and a fifth input and a third output, wherein the third input is coupled to the second output, wherein the logic gate is to generate the toggling signal on the third output in response to a test clock signal provided on the test input of the flip-flop, a first logic value on the select input of the multiplexer, and a second logic value provided on the control input of the flip-flop and the third and fourth input of the logic gate.