Patent ID: 8072240
Filing Date: 2011-12-06
Classification: H03K

Abstract:
1. A die having integrated circuitry, the die comprising: a plurality of input/output (I/O) blocks, each of the plurality of the I/O blocks having circuitry configured to provide one or more I/O interface signals, the circuitry being configurable to supply the one or more I/O interface signals according to one of a plurality of I/O standards; a reference voltage block configured to output to each of the I/O blocks a voltage reference signal adapted to provide a reference voltage level to each of the I/O blocks; and a calibration block coupled to the voltage reference signal and configured to output to each of the I/O blocks a calibration code adapted to calibrate the circuitry of the I/O blocks to adjust the one or more I/O interface signals, the calibration code being based on the voltage reference signal and indicative of one or more circuit elements of the circuitry of the I/O blocks to be turned on or off, the calibration block comprising: