Patent ID: 8947338
Filing Date: 2015-02-03
Classification: G09G

Abstract:
1. A driving circuit of a display device, the driving circuit being configured to output an active potential sequentially to a plurality of scanning signal lines, the active potential setting a transistor conductive, the driving circuit comprising: a plurality of output circuits electrically connected respectively to the plurality of scanning signal lines, wherein one output circuit of the plurality of output circuits includes: wherein the clock signal line is configured to supply a first clock signal, further comprising: a first charging line which is connected to the second node and which is configured to supply a second clock signal, a second charging line which is connected to the second node and which is configured to supply a third clock signal, wherein each of the first, second and third clock signals is one of 8-phase clock signals and wherein all of the first, second and third clock signals have a same period and a different phase from each other, wherein the second clock signal charges the second node at the first charging time, and wherein the third clock signal charges the second node at the second charging time.