Patent ID: 6649506
Filing Date: 2003-11-18
Classification: H01L,H05K

Abstract:
A method of fabricating vias in solder pads of a BGA substrate, comprising:(a) providing a substrate and forming a plurality of vias through said substrate; (b) plating the interior surfaces of said vias with a first thin copper layer for forming electrically conductive vias; (c) plugging resin into said electrically conductive vias, each resin having an upper surface and a lower surface; (d) roughening only the upper and lower surfaces of the resins; (e) plating said substrate and the roughened upper and lower surfaces of the resins with second thin copper layers; and (f) etching said second thin copper layers to form an upper circuit layer and a lower circuit layer, and to form solder pads on said electrically conductive vias.