Patent ID: 7381652
Filing Date: 2008-06-03
Classification: H01L

Abstract:
1. A method of manufacturing a flash memory device, the method comprising the steps of: sequentially forming an etch-prevention layer, first and second interlayer insulating layers, and first, second, and third hard mask layers on a semiconductor substrate; etching the third hard mask layer to expose a portion of a region on the second hard mask layer; forming a photoresist pattern of a line shape on the entire surface such that the photoresist pattern is exposed to be narrower than the region through which the second hard mask layer is exposed, and then etching the second hard mask layer using the photoresist pattern as a mask; etching the first hard mask layer using the photoresist pattern as a mask, and then etching the second and first interlayer insulating layers using the remaining third and second hard mask layers as masks, thus forming a drain contact hole having a square shape; and etching the etch-prevention layer using the remaining second and first hard mask layers as masks, thus exposing a predetermined region of the semiconductor substrate and opening the drain contact hole.