Patent ID: 6587178
Filing Date: 2003-07-01
Classification: G02F

Abstract:
A device structure combining insulating materials for alignment posts of optical interference layers with a pattern of semiconductor devices in or over the surface of a silicon body, comprising:a silicon semiconductor wafer, said silicon semiconductor wafer having been provided with a pattern of semiconductor devices in or over the surface thereof, said silicon semiconductor wafer further having been provided with a pattern of pixels over the surface thereof, said pixels having a surface comprising a second metallic layer, said second metallic layer having been created over the surface of a layer of silicon oxide; alignment posts located between said pixels over the surface of said silicon semiconductor wafer, said device structure combining insulating materials for alignment posts with a pattern of semiconductor devices being covered with an optical interference layer; bonding pads provided over the surface of said silicon body, said bonding pads having been provided with wires attached thereto, said wires being connected to external contacts for control logic and power interconnections; liquid crystal material located in valleys below peaks of the alignment posts; a glass cover positioned over and supported by the alignment posts, said glass cover overlying said liquid crystal material, said glass cover not overlying an area not comprising liquid crystal material, bonding pads being located therein or thereover.