Patent ID: 7058980
Filing Date: 2006-06-06
Classification: G06F

Abstract:
1. A system including an electronic device containing protected data, the electronic device comprising: a local processor; memory protection logic operable to interface with memory for accessing protected data stored therein, wherein access to said protected data is restricted for access by said local processor for execution thereon within the electronic device; validation logic, operative in a first mode and a second mode, for checking the validity of said protected data and for producing a validity signal to indicate whether said protected data is valid, said validation logic being accessible from outside of the electronic device for setting the electronic device into one of said first mode and said second mode; validity signal output control logic for inhibiting an output of said validity signal to outside the electronic device while in said first mode, the electronic device remaining in said first mode until the validity of a predetermined quantity of said protected data has been checked; a system reset function for resetting the system including at least said local processor; and a device reset function for resetting said validity signal in response to said system being reset while the electronic device is in said first mode, wherein said device reset function does not reset said validity signal in response to said system being reset while the electronic device is in said second mode.