Patent ID: 8165252
Filing Date: 2012-04-24
Classification: H04L

Abstract:
1. A signal processing device comprising: sampling clock generating means configured to generate, based on a driving clock with a predetermined cycle serving as an operating timing reference, a plurality of sampling clocks having mutually different phases and the same cycle as said predetermined cycle; sampling data generating means configured to sample an input signal expressing data series using each of said plurality of sampling clocks, and generate a plurality of sampling data corresponding to said input signal; phase comparison data generating means configured to generate phase comparison data indicating phase shiftings of said sampling clocks with respect to said input signal using said plurality of sampling data; phase comparison data selecting means configured to select one of the phase comparison data of one of the sampling clocks having the phase closest to the phase of said input signal; and data generating means configured to generate data based on the selected one of phase comparison data supplied from the phase comparison data selecting means, and to supply the data to the phase comparison data selecting means.