Patent ID: 7299436
Filing Date: 2007-11-20
Classification: G06F

Abstract:
1. A method, in a data processing system, for modeling an asynchronous interface, comprising: identifying logic of the asynchronous interface in an integrated circuit design; converting the logic of the asynchronous interface into primitive logic elements; replacing the primitive logic elements with corresponding expanded primitive logic elements, wherein the expanded primitive logic elements include deterministic inputs and deterministic outputs representative of a deterministic or non-deterministic nature of data inputs and data outputs of the expanded primitive logic elements; replacing latches in the asynchronous interface of the integrated circuit design with expanded latches that receive an additional input indicative of whether a data input to the expanded latch is deterministic or not; running a simulation of the asynchronous interface using the expanded primitive logic elements to thereby model the asynchronous interface; and generating an output indicating results of running the simulation of the asynchronous interface using the expanded primitive logic elements to thereby model the asynchronous interface.