Patent ID: 6716686
Filing Date: 2004-04-06
Classification: H01L

Abstract:
A method for forming one or more FinFET devices, comprising:forming a source region and a drain region in an oxide layer, the oxide layer being disposed on a substrate; etching the oxide layer between the source region and the drain region to form a plurality of oxide walls, the areas between the plurality of oxide walls defining a plurality of respective channels for a first device; depositing a connector material over the plurality of oxide walls and channels for the first device; forming a gate mask for the first device; removing the connector material from the channels; depositing channel material in the channels for the first device; forming a gate dielectric for first device over the channels; depositing a gate material over the gate dielectric for the first device; and patterning and etching the gate material to form at least one gate electrode for the first device.