Patent ID: 8850411
Filing Date: 2014-09-30
Classification: G06F,H03K,Y02D

Abstract:
1. A computer-implemented compilation method for a reconfigurable integrated circuit, the integrated circuit having a distributed plurality of reconfigurable computational elements each having a plurality of contexts, each reconfigurable computational element having a memory storing at least one configuration control word for each context, the plurality of reconfigurable computational elements having different types of reconfigurable computational elements distributed on the reconfigurable integrated circuit, the computer-implemented method performed by a computer system having one or more processors, the method comprising: converting an algorithm into a plurality of tasks; assigning a corresponding task identifier to each task of the plurality of tasks, a first task assigned a first task identifier and a second task assigned a second task identifier; determining a first plurality of actions corresponding to the first task and determining a second plurality of actions corresponding to the second task; assigning a corresponding action identifier to each action of the first and second pluralities of actions; mapping the first and second tasks and the first and second pluralities of actions to different reconfigurable computational elements of the plurality of types of reconfigurable computational elements; determining corresponding data input linkages or data output linkages for each action of the first and second pluralities of actions; and without assigning an action to a specific reconfigurable computational element and without assigning an input data source address or an output data destination address, generating a compilation comprising, for each action of the first and second pluralities of actions, a designation of the type of reconfigurable computational element, the data input linkage or the data output linkage for the action, and at least a portion of a configuration control word for the selected type of reconfigurable computational element comprising the corresponding task identifier, the corresponding action identifier, and the corresponding configuration bits for the selected action, wherein the configuration control word is stored in the memory of the assigned reconfigurable computational element for a corresponding context; wherein the reconfigurable integrated circuit is to independently and concurrently enable and disable execution of a selected task of the plurality of tasks by enabling or disabling a corresponding plurality of contexts of the distributed plurality of different reconfigurable computational elements assigned to perform the selected task through a broadcast message having the corresponding task identifier for the selected task and transmitted to the plurality of reconfigurable computational elements, whereby only those contexts of reconfigurable computational elements having the configuration control word with a task identifier matching the corresponding task identifier of the selected task are enabled or disabled; and wherein the stored configuration control word further comprises a corresponding input data source address from the corresponding data input linkage or a corresponding output data destination address from the corresponding data output linkage.