Patent ID: 6908837
Filing Date: 2005-06-21
Classification: H01L,Y10S

Abstract:
1. A method of manufacturing a semiconductor integrated circuit device comprising the steps of: (a) depositing a first insulating film over a first conductive layer; (b) patterning said first insulating film by using a resist film as a mask to form a cap film; (c) removing said resist film; (d) after said step (c), forming a gate electrode of a MISFET by etching said first conductive layer using said cap film as a mask; (e) depositing a second insulating film over said gate electrode and said cap film; (f) forming a side wall spacer on side surfaces of said gate electrode by etching said second insulating film; and (g) after said step (f), selectively forming a salicide layer on said gate electrode, wherein said cap film is removed in said step (f) by over-etching said first insulating film to etch said cap film.