Patent ID: 6373085
Filing Date: 2002-04-16
Classification: H01L

Abstract:
A semiconductor integrated circuit device comprising:a semiconductor substrate having a trench; a capacitor having a storage electrode formed in the trench; a first epitaxial semiconductor layer formed on the semiconductor substrate and the capacitor, the first epitaxial semiconductor layer being electrically isolated from the storage electrode and having a hole extending to the storage electrode, the first epitaxial semiconductor layer being in contact with the semiconductor substrate; a connection member formed in the hole and electrically isolated from the first epitaxial semiconductor layer in a substrate in-plane direction; a second epitaxial semiconductor layer formed on a surface of the first epitaxial semiconductor layer and a surface of the connection member, where the surface of the first epitaxial semiconductor layer and the surface of the connection member on which the second epitaxial semiconductor layer is formed are co-planar and parallel to said substrate in-plane direction; a transistor formed on the second epitaxial semiconductor layer, and having a source and a drain in the second epitaxial semiconductor layer, one of the source and the drain being connected to the connection member in a direction of lamination of the substrate and the layers.