Patent ID: 7598617
Filing Date: 2009-10-06
Classification: H01L

Abstract:
1. A stack package comprising: a printed circuit board formed with circuit patterns and having electrode terminals located on an upper surface thereof and ball lands located on a lower surface thereof; at least two semiconductor chips stacked on the printed circuit board in a face-down manner, and each having first re-distribution lines which are formed on an upper surface of the semiconductor chips and connected to bonding pads, through silicon vias which are formed therethrough and connected to the first re-distribution lines, and second re-distribution lines which are formed on a lower surface that is opposite to the upper surface, and connected to the through silicon vias; first solder balls interposed between the first and second re-distribution lines of the stacked semiconductor chips, which face each other, to form electrical and physical connections therebetween; second solder balls interposed between the first re-distribution lines of the lowermost semiconductor chip of the stacked semiconductor chips and the electrode terminals of the printed circuit board, to form electrical and physical connections therebetween; a molding material for molding the upper surface of the printed circuit board including the stacked semiconductor chips; and third solder balls attached to the ball lands on the lower surface of the printed circuit board, to serve as mounting means.