Patent ID: 8679907
Filing Date: 2014-03-25
Classification: H01L

Abstract:
1. A method of manufacturing a thin-film transistor array, the method comprising: preparing a substrate; forming a plurality of gate electrodes above the substrate; forming a gate insulating layer on the plurality of gate electrodes; forming an amorphous silicon layer on the gate insulating layer; generating a crystalline silicon layer by crystallizing the amorphous silicon layer using laser light emitted from a laser; and forming a source electrode and a drain electrode for each of the plurality of gate electrodes, the source electrode and the drain electrode being located in a region above the crystalline silicon layer, wherein in the forming of the gate insulating layer, the gate insulating layer is formed such that thicknesses of the gate insulating layer on the plurality of gate electrodes are within a range in which there is a positive correlation between light absorbance of the amorphous silicon layer above the plurality of gate electrodes for the laser light and equivalent oxide thicknesses of the gate insulating layer on the plurality of gate electrodes, and in the forming of the amorphous silicon layer, the amorphous silicon layer is formed such that thicknesses of the amorphous silicon layer above the plurality of gate electrodes is within a range in which variation of the light absorbance according to variation of the thicknesses of the amorphous silicon layer is within a predetermined range from a first standard.