Patent ID: 8120159
Filing Date: 2012-02-21
Classification: H01L

Abstract:
1. A semiconductor integrated circuit comprising: a first element formation layer including a first semiconductor element, the first semiconductor element including a first semiconductor layer and first insulating layers sandwiching the first semiconductor layer; and an n-th element formation layer including an opening and an n-th semiconductor element where n is an integer of 2 or more, the n-th semiconductor element including an n-th semiconductor layer and n-th insulating layers sandwiching the n-th semiconductor layer, wherein the n-th element formation layer is stacked over the first element formation layer; a wiring is formed in the opening; the n-th element formation layer further includes a source electrode and a drain electrode each connected to the n-th semiconductor layer; at least one of the source electrode and the drain electrode is provided on a side surface of the opening; and an opening of the first element formation layer overlaps with the opening of the first element formation layer.