Patent ID: 6759275
Filing Date: 2004-07-06
Classification: H01L

Abstract:
A method for fabricating a planar inductor in high-performance high-frequency semiconductor circuits, comprising the steps of:providing a substrate having a top side and a bottom side wherein said top side has a passive surface and an active surface, wherein active devices with conductive interconnects are created over said active surface of said substrate; creating at least one pair of planar inductors overlying said passive surface of said substrate; providing a passivation layer over said passive surface and said active surface of said substrate and overlying said at least one pair of planar inductors; forming a scribe line penetrating through said passivation layer overlying said passive surface to said passive surface and separating said at least one pair of planar inductors; attaching a glass panel to said layer of passivation; cutting said substrate from said bottom side, said cutting being aligned with said passive surface of said substrate, said cutting not completely penetrating through said substrate; thereafter removing from said bottom side all of said substrate material underlying said passive surface of said substrate, exposing at least one first bond pad created on said passive surface on each side of said scribe line; and cutting said glass panel in alignment with said scribe line.