there is one thing that is obvious in this matter and that is that everyone wants to put as much circuitry as possible on an integrated circuit that's why we developed system on chips over the years  but wanting to do something is a far cry from showing how to do it and in this case that's the crux of why in our view p tap committe there is in general it referred to aspirational statement or a one sentence statement that used the word chip and then said it well everyone would have known how to do within inside an integrated circuit no one had ever disclosed how to do that before and there is no single reference that even gets close to describing  a single die and there's it's just totally unreasonable for the fact finder to take these references at their word i guess that's your position and that's what we must say if we're going to reverse that fact finding the a document says you can do these things on a single chip can do these things on a single die that has some typically you know we can take that that skilled artisans at that time had knowledge of how to do that absolutely not and i mean that's take your word for it i mean that there's nothing here the disclosures of circuitry that can be used how to use it so that you don't get your chip to blow  up i don't understand you saying that every sentence that a prior art reference says we can't take it at its word no no your honor i'm not saying that i'm saying well that's what you're asking us to do for these particular sentences and these particular prior reference  no the question is what does the arc disclose it discloses we can do this on a die that's all it discloses it's like saying it would be great to have a time machine you're not saying how you do it there aspirational statements and so it's not so much a question of looking at the sentence and saying i disagree with the sentence or not i'm not taking the sentence the question is what does the sentence be no expressway discloses implementing this number and regulatory circuitry on a typical on a chip so what i have to assume that's not on a chip or that yes well if you like a skilled arson how to do it on a chip therefore i should disregard the disclosure and so the very sentence that uses the word chad is referencing an illustration there's many illustrations but safe figure seven b use of the word on a ship if you look at the figure you can see that there's bond but they're not the same integrated circuits and that's the whole crux now i think it's relevant your honour's that well ok so what you've just said and honestly i find th about you or pretty much all of the issues that you appeal is that you've made an argument for why you need to know vote world maybe the reference shouldn't be interpreted that way your your problem though is the board did board and say there's no substantial evidence we're arguing right now about something about which maybe reasonable vines could disagree but it's a substantial evidence for of you know there's no disclosure your honor of how to put this circuitry on an integrated circuit  did you raise specifically below and on appeal to us the argument that even if the reference discloses that the reference doesn't enable it no i don't believe so i just answered designers question yes but then that on the basis of prior art consisting of patents are printed publications the practice guide that goes with that p t o says quote because an intra partes review may only be requested on the basis of prior consisting of patents or print publications expert testimony cannot take the place of disclosure from pads or printed of the publications close quote and what has been supplied the only place you find or this number circuitry on a single i c norm argument on appeal your honour's is that it doesn't disclose the use of the technology on an inner integrated circuit or how to do that the just honor is referring to the following sentence in various embody that this is the nd to last paragraph of the patent the last one is the typical lawyer disclaimer that this is everything disclosure it is in fact disclosed your saying it wouldn't be enabled and that would have required assessing whether a skilled arson would know how to do it based on that disclosure that's not the issue that this court that wasn't an issue you raised  with respect to our argument was that with the expert o shekhawat well st of all i don't believe the board relied on that statement that a single die so or didn't rely on that statement i know that intel does but what the board relied technology to be integrated circuit comma the orderly skilled artisan would know how to implement the voltage regular regulator and this never circuit on a single die that's what the holding up was the fact that you could do mosse for one aspect because it's already in the prior art does not mean that you can do every aspect within a single integrated circuit there is no description of that  limitations to be known and disclosed in the arc and then are to abandon that novel to story and now are you going to feel that six different limitations are the features that make its claims novel just to be clear i'm wondering if you're started with which is that the references are merely aspirational and they and i believe he is making that argument specifically with respect to question what reference i'll start there as judge and noted references are presumed enabled and that's the enright and tor case federal circuit two thousand and twelve and proud references need not be enabling on their own they are the question is what do they suggest to a perfect foreigner skill in the art to look to the expressed disclosure and then what a person born or skill in art would understand from that reference and here there is substantial evidence that a person of ordinary skill in the art would understand how ninety four paragraph thirty two and then his testimony supported by other references including the larson reference which explicitly put us number circuit in a voltage regulator on the same chip nine years before the two  to do that now let me step back to mr vera hovind argument on bond wires with respect to the could be no reference now again person born or skill in the eye would understand that you're referring to placing them on an integrated dye and the board evaluated intel's evidence of valuated the patent was that evidence and made a classic substantial circuit a couple of things around it makes sense doesn't well the presence i think the issue your honor is that the presence of bond wires and this is what the board found the presence of bond wires doesn't negate other connections and so what belt and suspenders kind of connections no but on the wires can be used and the dr leave testified about this bond wires can be used to make we look at figure seven b which is the figure at issue dr leap testified that the connections p u and an r the traces of an integrated circuit and then if you look specifically at figure seven b you can see that the snubber circuit three hundred is connected to trace p and the switching circuitry one  connected through another circuit to p t and so they're both connected via trace p and if that's consistent with what is in the beano paragraph one of two of and then it says each of the switching devices one hundred and thirty dollars is connected to an associate of one of the wiring patterns and you so they're both connected to the wiring pattern p which dr leave testified is the wiring pattern of an integrated doesn't have a bond wire over to the overdue so it's number circuit three hundred and so what could be you know is discussing there is that basically you can have multiple different connections and if you if you look at earlier the what the board found is that simply using showing bond wires doesn't negate that express disclosure and so again this is a classic substantial evidence determination  is that you can make these connections in a host of different ways and i think it's important to come back to what the reference pacifically discloses which is that it's on a chip and dr leave testified one of ordinary skill in the art would going to the contrary is like saying because a house has a side door it must not have a front door even though the description of the house says it has a front door the presence of bond wires doesn't negate other connections and dr levy has testified that those traces p u n n are the traces of an integrated circuit professor of mit reviewed those references and testified that person heard of or person of ordinary skill would understand that to me and on a degraded circuit so as expressly relying on the primary references were not simply revived relying on expert testimony  how to do it well how is the question for obviousness like i said everybody wants to put stuff on an integrated circuit the challenge is how do you do it what's the priority date for this  two thousand and nine i believe so well integrated circuit so all we have is dr leaves testimony that a person would know how to do it oh no we have the presumption that references are enabled that you didn't introduce any read it in the news written asked to explain what how and why it's finding that something is obvious and let's take let's take you know going we're looking at what the board says not what the tourney argument is in the board said he agrees with the expert that the use of bond wires is not inconsistent not where referred to in that excerpt of the beano is using every connection between this number and regulatory circuitry what we have here is the p tab a switch the burden of proof the burden of proof is supposed to be on the plainest burden of proof to show house that show the disclosure and explain how to explain why people would put things together it's just not exist in here all we have is  the fact that when you put stuff on chips it is chips become smaller and smaller they become more susceptible to blowing up to avoid the spikes so that the system doesn't blow up when it's on an integrated circuit that's what that's the house and it's just flowed in the actual planning and the as you say here time yeah well we will take