Position: Senior IC Verification Engineer (VLSI)
Company: Autotalks
Experience required: 3y
English level: upper

Autotalks is looking for a VLSI Verification Engineer to be a part of the VLSI verification team working on the revolutionary next-generation SoC. The main responsibilities in this role include making sure a designed SoC/IPs fully meets the specifications. The verification engineer will experience all the VLSI verification flow aspects: specification learning, verification environment development, test and coverage planning and coverage collection, gate level simulation, debugging etc.

**Required qualifications and experience:**
·        B.Sc. in Electrical Engineering
·        At least 5 years’ experience in verification
·        Proven verification capabilities 
·        Experienced in advanced verification methodologies, mainly UVM (Specman or System Verilog)
·        Familiar with AMBA subsystems
·        System understanding

**Advantage:**
·        Familiar with CPU (SoC) subsystems -
·        Familiar with WiFi 802.11 standard
·        Scripting capabilities (Perl, csh, Python)
·        Vast experience with Cadence Specman, coding, debug, coverage

**Personal characteristics:**
·        Team player
·        Excellent interpersonal skills
·        Thorough and detail oriented
·        Self-motivated
·        Ability to work in a dynamic environment