Position: RTL Design Engineer
Company: Samsung R&D Institute Ukraine
Experience required: 2y
English level: intermediate

Samsung Research and Development Institute Ukraine (SRK) is looking for **RTL Design Engineer** to join our team in Kyiv. We are looking for an engineer to take part in Verilog-based HW IP Core development targeted for Samsung consume electronics in use by hundreds of millions of users worldwide. We promise cutting-edge technologies, decision-making participation, smart team and cookies.

**More specifically you will:**

• Design, develop and test RTL code for HW IP Cores
• Participate in research activities and strategic prototyping for future Samsung products

**Qualifications and Skills:**

• 3 years of hands-on experience with HDL (Verilog, VHDL) development experience
• At least 1-year hands-on experience with C language 
• At least Bachelor degree in Electronics or related field

**Will be a plus:**

• Knowledge of microprocessor architecture and CPU behaviour
• Pseudo-random, functional coverage verification methodologies, UVM
• SystemVerilog and SystemС
• On-chip buses: AMBA(AHB, APB), PLB
• FPGA platform development and testing
• Proficiency in a Shell scripting
• Mathematical and/or algorithmic background
• Upper-intermediate English

**We offer multiple benefits which include:**

• Competitive salary, annual salary review, annual bonuses
• Official employment, as per Ukrainian labour law without tax issues
• Paid 28 days of annual vacations and sick leaves
• Paid days off on Ukrainian official holidays
• Paid maternity leaves
• International business trips
• Opportunity to become an inventor of international patents with paid bonuses
• Medical & life insurance for employees and their children
• Convenient office location (Business Center 101 Tower)
• Paid lunches
• Discounts to Samsung products, gym, restaurants, services
• English language courses
• Regular education and self-development on internal courses and seminars, office library